| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_88.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define IMMU_SKIP_IF_NO_TTE |
| 39 | #define DMMU_SKIP_IF_NO_TTE |
| 40 | #define PORTABLE_CORE |
| 41 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 42 | #define MAIN_PAGE_HV_ALSO |
| 43 | #define MAIN_PAGE_VA_IS_RA_ALSO |
| 44 | #define DISABLE_PART_LIMIT_CHECK |
| 45 | #define MAIN_PAGE_USE_CONFIG 3 |
| 46 | #define PART0_Z_TSB_SIZE_3 10 |
| 47 | #define PART0_Z_PAGE_SIZE_3 1 |
| 48 | #define PART0_NZ_TSB_SIZE_3 10 |
| 49 | #define PART0_NZ_PAGE_SIZE_3 1 |
| 50 | #define PART0_Z_TSB_SIZE_1 3 |
| 51 | #define PART0_NZ_TSB_SIZE_1 3 |
| 52 | |
| 53 | #define PART_0_BASE 0x0 |
| 54 | #define USER_PAGE_CUSTOM_MAP |
| 55 | #define MAIN_BASE_TEXT_VA 0x333000000 |
| 56 | #define MAIN_BASE_TEXT_RA 0x033000000 |
| 57 | #define MAIN_BASE_DATA_VA 0x379400000 |
| 58 | #define MAIN_BASE_DATA_RA 0x079400000 |
| 59 | |
| 60 | #d |
| 61 | # 466 "diag.j" |
| 62 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler |
| 63 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler |
| 64 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler |
| 65 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler |
| 66 | #define H_HT0_Data_access_error_0x32 data_access_error_handler |
| 67 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler |
| 68 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler |
| 69 | #define H_HT0_Store_Error_0x07 store_error_handler |
| 70 | |
| 71 | #define DAE_SKIP_IF_SOCU_ERROR |
| 72 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 73 | #ifndef T_HANDLER_RAND4_1 |
| 74 | #define T_HANDLER_RAND4_1 b .+16;\ |
| 75 | sdiv %r1, %r0, %l4;nop;nop |
| 76 | #endif |
| 77 | #ifndef T_HANDLER_RAND7_1 |
| 78 | #define T_HANDLER_RAND7_1 b .+28;\ |
| 79 | pdist %f4, %f6, %f20; \ |
| 80 | nop; nop ; nop; nop; illtrap |
| 81 | #endif |
| 82 | #ifndef T_HANDLER_RAND4_2 |
| 83 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ |
| 84 | save %i7, %g0, %i7; \ |
| 85 | restore %i7, %g0, %i7;\ |
| 86 | restore %i7, %g0, %i7; |
| 87 | #endif |
| 88 | #ifndef T_HANDLER_RAND7_2 |
| 89 | #define T_HANDLER_RAND7_2 b .+8 ;\ |
| 90 | rdpr %pstate, %l2;\ |
| 91 | b .+8 ;\ |
| 92 | rdpr %tstate, %l3;\ |
| 93 | b .+12 ;\ |
| 94 | wrpr %l3, %r0, %tstate; nop |
| 95 | #endif |
| 96 | #ifndef T_HANDLER_RAND4_3 |
| 97 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ |
| 98 | restore %i7, %g0, %i7;\ |
| 99 | save %i7, %g0, %i7; \ |
| 100 | restore %i7, %g0, %i7; |
| 101 | #endif |
| 102 | #ifndef T_HANDLER_RAND7_3 |
| 103 | #define T_HANDLER_RAND7_3 b .+8 ;\ |
| 104 | rdpr %tnpc, %l2;\ |
| 105 | and %l2, 0xfc0, %l2;\ |
| 106 | add %i7, %l2, %l2;\ |
| 107 | stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 108 | b .+8 ;\ |
| 109 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 110 | #endif |
| 111 | #ifndef T_HANDLER_RAND4_4 |
| 112 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 |
| 113 | #endif |
| 114 | #ifndef T_HANDLER_RAND7_4 |
| 115 | #define T_HANDLER_RAND7_4 b .+8;\ |
| 116 | save %i7, %g0, %i7; \ |
| 117 | b,a .+8;\ |
| 118 | b .+12;\ |
| 119 | stw %i7, [%i7];\ |
| 120 | b .-8;;\ |
| 121 | restore %i7, %g0, %i7; |
| 122 | |
| 123 | #endif |
| 124 | #ifndef T_HANDLER_RAND4_5 |
| 125 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 126 | sdiv %l4, %l5, %l7;\ |
| 127 | add %r31, 128, %l5;\ |
| 128 | stda %l4, [%i7]ASI_BLOCK_PRIMARY_LITTLE; |
| 129 | #endif |
| 130 | #ifndef T_HANDLER_RAND7_5 |
| 131 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 132 | rdpr %tnpc, %l2;\ |
| 133 | wrpr %l2, %tpc;\ |
| 134 | add %l2, 4, %l2;\ |
| 135 | wrpr %l2, %tnpc;\ |
| 136 | restore %i7, %g0, %i7;\ |
| 137 | retry; |
| 138 | #endif |
| 139 | #ifndef T_HANDLER_RAND4_6 |
| 140 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\ |
| 141 | rd %fprs, %l2; \ |
| 142 | wr %l2, 0x4, %fprs ;\ |
| 143 | stda %f0,[%r31]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 144 | #endif |
| 145 | #ifndef T_HANDLER_RAND7_6 |
| 146 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ |
| 147 | rdpr %tnpc, %l2;\ |
| 148 | wrpr %l2, %tpc;\ |
| 149 | add %l2, 4, %l2;\ |
| 150 | wrpr %l2, %tnpc;\ |
| 151 | stw %l2, [%i7];\ |
| 152 | retry; |
| 153 | #endif |
| 154 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 155 | #ifndef HT_HANDLER_RAND4_1 |
| 156 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ |
| 157 | b .+12;\ |
| 158 | stxa %l3, [%l3]0x57 ;\ |
| 159 | nop |
| 160 | #endif |
| 161 | #ifndef HT_HANDLER_RAND7_1 |
| 162 | #define HT_HANDLER_RAND7_1 b .+28;\ |
| 163 | pdist %f4, %f4, %f20;\ |
| 164 | nop; nop ; nop; nop; illtrap |
| 165 | #endif |
| 166 | #ifndef HT_HANDLER_RAND4_2 |
| 167 | #define HT_HANDLER_RAND4_2 rdpr %tstate, %l2;\ |
| 168 | b .+12;\ |
| 169 | wrpr %l2, 0x800, %tstate;\ |
| 170 | nop; |
| 171 | #endif |
| 172 | #ifndef HT_HANDLER_RAND7_2 |
| 173 | #define HT_HANDLER_RAND7_2 b .+8 ;\ |
| 174 | rdhpr %hpstate, %l2;\ |
| 175 | b .+8 ;\ |
| 176 | rdhpr %htstate, %l3;\ |
| 177 | b .+12 ;\ |
| 178 | wrhpr %l3, %r0, %htstate; nop |
| 179 | #endif |
| 180 | #ifndef HT_HANDLER_RAND4_3 |
| 181 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ |
| 182 | mov 0x80, %l3;\ |
| 183 | stxa %l3, [%l3]0x5f ;\ |
| 184 | b .+8 ;\ |
| 185 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; |
| 186 | #endif |
| 187 | #ifndef HT_HANDLER_RAND7_3 |
| 188 | #define HT_HANDLER_RAND7_3 b .+8 ;\ |
| 189 | rdpr %tnpc, %l2;\ |
| 190 | and %l2, 0xfc0, %l2;\ |
| 191 | add %i7, %l2, %l2;\ |
| 192 | stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 193 | b .+8 ;\ |
| 194 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 195 | #endif |
| 196 | #ifndef HT_HANDLER_RAND4_4 |
| 197 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\ |
| 198 | b .+12 ;\ |
| 199 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop |
| 200 | #endif |
| 201 | #ifndef HT_HANDLER_RAND7_4 |
| 202 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ |
| 203 | and %l3, 0xff, %l3;\ |
| 204 | sllx %l3, 26, %l3;\ |
| 205 | ldxa [%g0]0x45, %l4;\ |
| 206 | or %l3, %l4, %l3 ;\ |
| 207 | stxa %l3, [%g0]0x45 ;\ |
| 208 | nop; |
| 209 | #endif |
| 210 | #ifndef HT_HANDLER_RAND4_5 |
| 211 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 212 | sdiv %l4, %l5, %l6;\ |
| 213 | sdiv %l3, %l6, %l7;\ |
| 214 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; |
| 215 | #endif |
| 216 | #ifndef HT_HANDLER_RAND7_5 |
| 217 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 218 | rdpr %tnpc, %l2;\ |
| 219 | wrpr %l2, %tpc;\ |
| 220 | add %l2, 4, %l2;\ |
| 221 | wrpr %l2, %tnpc;\ |
| 222 | restore %i7, %g0, %i7;\ |
| 223 | retry; |
| 224 | #endif |
| 225 | #ifndef HT_HANDLER_RAND4_6 |
| 226 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ |
| 227 | rd %fprs, %l2; \ |
| 228 | wr %l2, 0x4, %fprs ;\ |
| 229 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 230 | #endif |
| 231 | #ifndef HT_HANDLER_RAND7_6 |
| 232 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ |
| 233 | rdpr %tnpc, %l2;\ |
| 234 | wrpr %l2, %tpc;\ |
| 235 | add %l2, 4, %l2;\ |
| 236 | wrpr %l2, %tnpc;\ |
| 237 | wrhpr %o4, %r0, %htstate;\ |
| 238 | retry; |
| 239 | #endif |
| 240 | |
| 241 | !!!!!!!!!!!!!!!!!!!!!!!!! |
| 242 | !! Disable trap checking |
| 243 | #define NO_TRAPCHECK |
| 244 | |
| 245 | ! Enable Traps |
| 246 | #define ENABLE_T1_Privileged_Opcode_0x11 |
| 247 | #define ENABLE_T1_Fp_Disabled_0x20 |
| 248 | #define ENABLE_HT0_Watchdog_Reset_0x02 |
| 249 | |
| 250 | #define FILL_TRAP_RETRY |
| 251 | #define SPILL_TRAP_RETRY |
| 252 | #define CLEAN_WIN_RETRY |
| 253 | |
| 254 | #define My_RED_Mode_Other_Reset |
| 255 | #define My_RED_Mode_Other_Reset \ |
| 256 | ba red_other_ext;\ |
| 257 | nop;retry;nop;nop;nop;nop;nop |
| 258 | |
| 259 | #define H_HT0_Software_Initiated_Reset_0x04 |
| 260 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ |
| 261 | setx Software_Reset_Handler, %g1, %g2 ;\ |
| 262 | jmp %g2 ;\ |
| 263 | nop |
| 264 | # 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 265 | #define H_T1_Clean_Window_0x24 |
| 266 | #define SUN_H_T1_Clean_Window_0x24 \ |
| 267 | rdpr %cleanwin, %l1;\ |
| 268 | add %l1,1,%l1;\ |
| 269 | wrpr %l1, %g0, %cleanwin;\ |
| 270 | retry; nop; nop; nop; nop |
| 271 | |
| 272 | #define H_T1_Clean_Window_0x25 |
| 273 | #define SUN_H_T1_Clean_Window_0x25 \ |
| 274 | rdpr %cleanwin, %l1;\ |
| 275 | add %l1,1,%l1;\ |
| 276 | wrpr %l1, %g0, %cleanwin;\ |
| 277 | retry; nop; nop; nop; nop |
| 278 | |
| 279 | #define H_T1_Clean_Window_0x26 |
| 280 | #define SUN_H_T1_Clean_Window_0x26 \ |
| 281 | rdpr %cleanwin, %l1;\ |
| 282 | add %l1,1,%l1;\ |
| 283 | wrpr %l1, %g0, %cleanwin;\ |
| 284 | retry; nop; nop; nop; nop |
| 285 | |
| 286 | #define H_T1_Clean_Window_0x27 |
| 287 | #define SUN_H_T1_Clean_Window_0x27 \ |
| 288 | rdpr %cleanwin, %l1;\ |
| 289 | add %l1,1,%l1;\ |
| 290 | wrpr %l1, %g0, %cleanwin;\ |
| 291 | retry; nop; nop; nop; nop |
| 292 | # 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 293 | #define H_HT0_Tag_Overflow |
| 294 | #define My_HT0_Tag_Overflow \ |
| 295 | HT_HANDLER_RAND7_1 ;\ |
| 296 | done |
| 297 | |
| 298 | #define H_T0_Tag_Overflow |
| 299 | #define My_T0_Tag_Overflow \ |
| 300 | T_HANDLER_RAND7_2 ;\ |
| 301 | done |
| 302 | |
| 303 | #define H_T1_Tag_Overflow_0x23 |
| 304 | #define SUN_H_T1_Tag_Overflow_0x23 \ |
| 305 | T_HANDLER_RAND7_3 ;\ |
| 306 | done |
| 307 | |
| 308 | #define H_T0_Window_Spill_0_Normal_Trap |
| 309 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 310 | |
| 311 | #define H_T0_Window_Spill_1_Normal_Trap |
| 312 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 313 | |
| 314 | #define H_T0_Window_Spill_2_Normal_Trap |
| 315 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 316 | |
| 317 | #define H_T0_Window_Spill_3_Normal_Trap |
| 318 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 319 | |
| 320 | #define H_T0_Window_Spill_4_Normal_Trap |
| 321 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 322 | |
| 323 | #define H_T0_Window_Spill_5_Normal_Trap |
| 324 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 325 | |
| 326 | #define H_T0_Window_Spill_6_Normal_Trap |
| 327 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 328 | |
| 329 | #define H_T0_Window_Spill_7_Normal_Trap |
| 330 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 331 | |
| 332 | #define H_T0_Window_Spill_0_Other_Trap |
| 333 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 334 | |
| 335 | #define H_T0_Window_Spill_1_Other_Trap |
| 336 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 337 | |
| 338 | #define H_T0_Window_Spill_2_Other_Trap |
| 339 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 340 | |
| 341 | #define H_T0_Window_Spill_3_Other_Trap |
| 342 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 343 | |
| 344 | #define H_T0_Window_Spill_4_Other_Trap |
| 345 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 346 | |
| 347 | #define H_T0_Window_Spill_5_Other_Trap |
| 348 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 349 | |
| 350 | #define H_T0_Window_Spill_6_Other_Trap |
| 351 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 352 | |
| 353 | #define H_T0_Window_Spill_7_Other_Trap |
| 354 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 355 | |
| 356 | #define H_T0_Window_Fill_0_Normal_Trap |
| 357 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 358 | |
| 359 | #define H_T0_Window_Fill_1_Normal_Trap |
| 360 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 361 | |
| 362 | #define H_T0_Window_Fill_2_Normal_Trap |
| 363 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 364 | |
| 365 | #define H_T0_Window_Fill_3_Normal_Trap |
| 366 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 367 | |
| 368 | #define H_T0_Window_Fill_4_Normal_Trap |
| 369 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 370 | |
| 371 | #define H_T0_Window_Fill_5_Normal_Trap |
| 372 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 373 | |
| 374 | #define H_T0_Window_Fill_6_Normal_Trap |
| 375 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 376 | |
| 377 | #define H_T0_Window_Fill_7_Normal_Trap |
| 378 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 379 | |
| 380 | #define H_T0_Window_Fill_0_Other_Trap |
| 381 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 382 | |
| 383 | #define H_T0_Window_Fill_1_Other_Trap |
| 384 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 385 | |
| 386 | #define H_T0_Window_Fill_2_Other_Trap |
| 387 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 388 | |
| 389 | #define H_T0_Window_Fill_3_Other_Trap |
| 390 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 391 | |
| 392 | #define H_T0_Window_Fill_4_Other_Trap |
| 393 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 394 | |
| 395 | #define H_T0_Window_Fill_5_Other_Trap |
| 396 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 397 | |
| 398 | #define H_T0_Window_Fill_6_Other_Trap |
| 399 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 400 | |
| 401 | #define H_T0_Window_Fill_7_Other_Trap |
| 402 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 403 | # 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 404 | #define H_T1_Window_Spill_0_Normal_Trap |
| 405 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 406 | |
| 407 | #define H_T1_Window_Spill_1_Normal_Trap |
| 408 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 409 | |
| 410 | #define H_T1_Window_Spill_2_Normal_Trap |
| 411 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 412 | |
| 413 | #define H_T1_Window_Spill_3_Normal_Trap |
| 414 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 415 | |
| 416 | #define H_T1_Window_Spill_4_Normal_Trap |
| 417 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 418 | |
| 419 | #define H_T1_Window_Spill_5_Normal_Trap |
| 420 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 421 | |
| 422 | #define H_T1_Window_Spill_6_Normal_Trap |
| 423 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 424 | |
| 425 | #define H_T1_Window_Spill_7_Normal_Trap |
| 426 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 427 | |
| 428 | #define H_T1_Window_Spill_0_Other_Trap |
| 429 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 430 | |
| 431 | #define H_T1_Window_Spill_1_Other_Trap |
| 432 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 433 | |
| 434 | #define H_T1_Window_Spill_2_Other_Trap |
| 435 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 436 | |
| 437 | #define H_T1_Window_Spill_3_Other_Trap |
| 438 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 439 | |
| 440 | #define H_T1_Window_Spill_4_Other_Trap |
| 441 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 442 | |
| 443 | #define H_T1_Window_Spill_5_Other_Trap |
| 444 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 445 | |
| 446 | #define H_T1_Window_Spill_6_Other_Trap |
| 447 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 448 | |
| 449 | #define H_T1_Window_Spill_7_Other_Trap |
| 450 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 451 | |
| 452 | #define H_T1_Window_Fill_0_Normal_Trap |
| 453 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 454 | |
| 455 | #define H_T1_Window_Fill_1_Normal_Trap |
| 456 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 457 | |
| 458 | #define H_T1_Window_Fill_2_Normal_Trap |
| 459 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 460 | |
| 461 | #define H_T1_Window_Fill_3_Normal_Trap |
| 462 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 463 | |
| 464 | #define H_T1_Window_Fill_4_Normal_Trap |
| 465 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 466 | |
| 467 | #define H_T1_Window_Fill_5_Normal_Trap |
| 468 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 469 | |
| 470 | #define H_T1_Window_Fill_6_Normal_Trap |
| 471 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 472 | |
| 473 | #define H_T1_Window_Fill_7_Normal_Trap |
| 474 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 475 | |
| 476 | #define H_T1_Window_Fill_0_Other_Trap |
| 477 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 478 | |
| 479 | #define H_T1_Window_Fill_1_Other_Trap |
| 480 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 481 | |
| 482 | #define H_T1_Window_Fill_2_Other_Trap |
| 483 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 484 | |
| 485 | #define H_T1_Window_Fill_3_Other_Trap |
| 486 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 487 | |
| 488 | #define H_T1_Window_Fill_4_Other_Trap |
| 489 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 490 | |
| 491 | #define H_T1_Window_Fill_5_Other_Trap |
| 492 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 493 | |
| 494 | #define H_T1_Window_Fill_6_Other_Trap |
| 495 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 496 | |
| 497 | #define H_T1_Window_Fill_7_Other_Trap |
| 498 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 499 | |
| 500 | #define H_T0_Trap_Instruction_0 |
| 501 | #define My_T0_Trap_Instruction_0 \ |
| 502 | T_HANDLER_RAND7_5 ;\ |
| 503 | done; |
| 504 | |
| 505 | #define H_T0_Trap_Instruction_1 |
| 506 | #define My_T0_Trap_Instruction_1 \ |
| 507 | T_HANDLER_RAND7_6 ;\ |
| 508 | done; |
| 509 | |
| 510 | #define H_T0_Trap_Instruction_2 |
| 511 | #define My_T0_Trap_Instruction_2 \ |
| 512 | inc %o3;\ |
| 513 | umul %o3, 2, %o4;\ |
| 514 | ba 1f; \ |
| 515 | save %i7, %g0, %i7; \ |
| 516 | 2: done; \ |
| 517 | nop; \ |
| 518 | 1: ba 2b; \ |
| 519 | restore %i7, %g0, %i7 |
| 520 | #define H_T0_Trap_Instruction_3 |
| 521 | #define My_T0_Trap_Instruction_3 \ |
| 522 | save %i7, %g0, %i7 ;\ |
| 523 | T_HANDLER_RAND4_5;\ |
| 524 | stw %o4, [%i7];\ |
| 525 | restore %i7, %g0, %i7 ;\ |
| 526 | done |
| 527 | #define H_T0_Trap_Instruction_4 |
| 528 | #define My_T0_Trap_Instruction_4 \ |
| 529 | T_HANDLER_RAND7_6 ;\ |
| 530 | done; |
| 531 | |
| 532 | #define H_T0_Trap_Instruction_5 |
| 533 | #define My_T0_Trap_Instruction_5 \ |
| 534 | T_HANDLER_RAND4_5;\ |
| 535 | done; |
| 536 | |
| 537 | #define H_T1_Trap_Instruction_0 |
| 538 | #define My_T1_Trap_Instruction_0 \ |
| 539 | inc %o4;\ |
| 540 | umul %o4, 2, %o5;\ |
| 541 | ba 3f; \ |
| 542 | save %i7, %g0, %i7; \ |
| 543 | 4: done; \ |
| 544 | nop; \ |
| 545 | 3: ba 4b; \ |
| 546 | restore %i7, %g0, %i7 |
| 547 | #define H_T1_Trap_Instruction_1 |
| 548 | #define My_T1_Trap_Instruction_1 \ |
| 549 | T_HANDLER_RAND7_3;\ |
| 550 | done |
| 551 | #define H_T1_Trap_Instruction_2 |
| 552 | #define My_T1_Trap_Instruction_2 \ |
| 553 | inc %o3;\ |
| 554 | umul %o3, 2, %o4;\ |
| 555 | ba 5f; \ |
| 556 | save %i7, %g0, %i7; \ |
| 557 | 6: done; \ |
| 558 | nop; \ |
| 559 | 5: ba 6b; \ |
| 560 | restore %i7, %g0, %i7 |
| 561 | #define H_T1_Trap_Instruction_3 |
| 562 | #define My_T1_Trap_Instruction_3 \ |
| 563 | T_HANDLER_RAND4_1;\ |
| 564 | done; |
| 565 | |
| 566 | #define H_T1_Trap_Instruction_4 |
| 567 | #define My_T1_Trap_Instruction_4 \ |
| 568 | T_HANDLER_RAND7_1;\ |
| 569 | done; |
| 570 | #define H_T1_Trap_Instruction_5 |
| 571 | #define My_T1_Trap_Instruction_5 \ |
| 572 | T_HANDLER_RAND7_2;\ |
| 573 | done |
| 574 | #define H_HT0_Trap_Instruction_0 |
| 575 | #define My_HT0_Trap_Instruction_0 \ |
| 576 | HT_HANDLER_RAND4_1 ;\ |
| 577 | done; |
| 578 | #define H_HT0_Trap_Instruction_1 |
| 579 | #define My_HT0_Trap_Instruction_1 \ |
| 580 | HT_HANDLER_RAND4_3 ;\ |
| 581 | done |
| 582 | #define H_HT0_Trap_Instruction_2 |
| 583 | #define My_HT0_Trap_Instruction_2 \ |
| 584 | HT_HANDLER_RAND7_5 ;\ |
| 585 | done; |
| 586 | #define H_HT0_Trap_Instruction_3 |
| 587 | #define My_HT0_Trap_Instruction_3 \ |
| 588 | HT_HANDLER_RAND4_5 ;\ |
| 589 | done |
| 590 | #define H_HT0_Trap_Instruction_4 |
| 591 | #define My_HT0_Trap_Instruction_4 \ |
| 592 | HT_HANDLER_RAND7_4 ;\ |
| 593 | done |
| 594 | #define H_HT0_Trap_Instruction_5 |
| 595 | #define My_HT0_Trap_Instruction_5 \ |
| 596 | ba htrap_5_ext;\ |
| 597 | nop; retry;\ |
| 598 | nop; nop; nop; nop; nop |
| 599 | |
| 600 | #define H_HT0_Mem_Address_Not_Aligned_0x34 |
| 601 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ |
| 602 | HT_HANDLER_RAND4_2 ;\ |
| 603 | done ; |
| 604 | #define H_HT0_Illegal_instruction_0x10 |
| 605 | #define My_HT0_Illegal_instruction_0x10 \ |
| 606 | HT_HANDLER_RAND4_2 ;\ |
| 607 | done; |
| 608 | |
| 609 | #define H_HT0_DAE_so_page_0x30 |
| 610 | #define My_HT0_DAE_so_page_0x30 \ |
| 611 | HT_HANDLER_RAND4_2;\ |
| 612 | done; |
| 613 | #define H_HT0_DAE_invalid_asi_0x14 |
| 614 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ |
| 615 | HT_HANDLER_RAND4_3 ;\ |
| 616 | done |
| 617 | #define H_HT0_DAE_privilege_violation_0x15 |
| 618 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ |
| 619 | HT_HANDLER_RAND4_4 ;\ |
| 620 | done; |
| 621 | #define H_HT0_Privileged_Action_0x37 |
| 622 | #define My_HT0_Privileged_Action_0x37 \ |
| 623 | done; \ |
| 624 | nop; nop |
| 625 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 |
| 626 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ |
| 627 | HT_HANDLER_RAND4_3 ;\ |
| 628 | done |
| 629 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 |
| 630 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ |
| 631 | HT_HANDLER_RAND7_1;\ |
| 632 | done |
| 633 | #define H_HT0_Fp_exception_ieee_754_0x21 |
| 634 | #define My_HT0_Fp_exception_ieee_754_0x21 \ |
| 635 | HT_HANDLER_RAND4_2 ;\ |
| 636 | done |
| 637 | #define H_HT0_Fp_exception_other_0x22 |
| 638 | #define My_HT0_Fp_exception_other_0x22 \ |
| 639 | HT_HANDLER_RAND7_2 ;\ |
| 640 | done |
| 641 | #define H_HT0_Division_By_Zero |
| 642 | #define My_HT0_Division_By_Zero \ |
| 643 | HT_HANDLER_RAND4_6;\ |
| 644 | done |
| 645 | #define H_T0_Division_By_Zero |
| 646 | #define My_T0_Division_By_Zero \ |
| 647 | T_HANDLER_RAND4_3;\ |
| 648 | done |
| 649 | #define H_T1_Division_By_Zero_0x28 |
| 650 | #define My_H_T1_Division_By_Zero_0x28 \ |
| 651 | T_HANDLER_RAND4_3;\ |
| 652 | done |
| 653 | #define H_T0_Division_By_Zero |
| 654 | #define My_T0_Division_By_Zero\ |
| 655 | T_HANDLER_RAND4_4 ;\ |
| 656 | done |
| 657 | #define H_T0_Fp_exception_ieee_754_0x21 |
| 658 | #define My_T0_Fp_exception_ieee_754_0x21 \ |
| 659 | T_HANDLER_RAND4_3 ;\ |
| 660 | done |
| 661 | #define H_T1_Fp_Exception_Ieee_754_0x21 |
| 662 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ |
| 663 | T_HANDLER_RAND4_4 ;\ |
| 664 | done |
| 665 | #define H_T1_Fp_Exception_Other_0x22 |
| 666 | #define My_H_T1_Fp_Exception_Other_0x22 \ |
| 667 | T_HANDLER_RAND4_5 ;\ |
| 668 | done |
| 669 | #define H_T1_Privileged_Opcode_0x11 |
| 670 | #define SUN_H_T1_Privileged_Opcode_0x11 \ |
| 671 | T_HANDLER_RAND4_6 ;\ |
| 672 | done |
| 673 | |
| 674 | #define H_HT0_Privileged_opcode_0x11 |
| 675 | #define My_HT0_Privileged_opcode_0x11 \ |
| 676 | HT_HANDLER_RAND4_1;\ |
| 677 | done; |
| 678 | |
| 679 | #define H_HT0_Fp_disabled_0x20 |
| 680 | #define My_HT0_Fp_disabled_0x20 \ |
| 681 | mov 0x4, %l2 ;\ |
| 682 | wr %l2, 0x0, %fprs ;\ |
| 683 | sllx %l2, 10, %l3; \ |
| 684 | rdpr %tstate, %l2;\ |
| 685 | or %l2, %l3, %l2 ;\ |
| 686 | stw %l2, [%i7];\ |
| 687 | wrpr %l2, 0x0, %tstate;\ |
| 688 | retry; |
| 689 | |
| 690 | #define H_T0_Fp_disabled_0x20 |
| 691 | #define My_T0_Fp_disabled_0x20 \ |
| 692 | mov 0x4, %l2 ;\ |
| 693 | wr %l2, 0x0, %fprs ;\ |
| 694 | sllx %l2, 10, %l3; \ |
| 695 | rdpr %tstate, %l2;\ |
| 696 | or %l2, %l3, %l2 ;\ |
| 697 | wrpr %l2, 0x0, %tstate;\ |
| 698 | retry; nop |
| 699 | |
| 700 | #define H_T1_Fp_Disabled_0x20 |
| 701 | #define My_H_T1_Fp_Disabled_0x20 \ |
| 702 | mov 0x4, %l2 ;\ |
| 703 | wr %l2, 0x0, %fprs ;\ |
| 704 | sllx %l2, 10, %l3; \ |
| 705 | rdpr %tstate, %l2;\ |
| 706 | or %l2, %l3, %l2 ;\ |
| 707 | wrpr %l2, 0x0, %tstate;\ |
| 708 | stw %l2, [%i7];\ |
| 709 | retry |
| 710 | |
| 711 | #define H_HT0_Watchdog_Reset_0x02 |
| 712 | #define My_HT0_Watchdog_Reset_0x02 \ |
| 713 | ba wdog_2_ext;\ |
| 714 | nop;retry;nop;nop;nop;nop;nop |
| 715 | |
| 716 | #define H_T0_Privileged_opcode_0x11 |
| 717 | #define My_T0_Privileged_opcode_0x11 \ |
| 718 | T_HANDLER_RAND4_4;\ |
| 719 | done |
| 720 | |
| 721 | #define H_T1_Fp_exception_other_0x22 |
| 722 | #define My_T1_Fp_exception_other_0x22 \ |
| 723 | T_HANDLER_RAND7_3 ;\ |
| 724 | done; |
| 725 | |
| 726 | #define H_T0_Fp_exception_other_0x22 |
| 727 | #define My_T0_Fp_exception_other_0x22 \ |
| 728 | T_HANDLER_RAND7_4;\ |
| 729 | done |
| 730 | |
| 731 | #define H_HT0_Trap_Level_Zero_0x5f |
| 732 | #define My_HT0_Trap_Level_Zero_0x5f \ |
| 733 | not %g0, %r13; \ |
| 734 | rdhpr %hpstate, %l3;\ |
| 735 | jmp %r13;\ |
| 736 | rdhpr %htstate, %l3;\ |
| 737 | and %l3, 0xfe, %l3;\ |
| 738 | wrhpr %l3, 0, %htstate;\ |
| 739 | stw %r13, [%i7];\ |
| 740 | retry |
| 741 | |
| 742 | #define My_Watchdog_Reset |
| 743 | #define My_Watchdog_Reset \ |
| 744 | ba wdog_red_ext;\ |
| 745 | nop;retry;nop;nop;nop;nop;nop |
| 746 | |
| 747 | #define H_HT0_Control_Transfer_Instr_0x74 |
| 748 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ |
| 749 | rdpr %tstate, %l3;\ |
| 750 | mov 1, %l4;\ |
| 751 | sllx %l4, 20, %l4;\ |
| 752 | wrpr %l3, %l4, %tstate ;\ |
| 753 | retry;nop; |
| 754 | |
| 755 | #define H_T0_Control_Transfer_Instr_0x74 |
| 756 | #define My_H_T0_Control_Transfer_Instr_0x74 \ |
| 757 | rdpr %tstate, %l3;\ |
| 758 | mov 1, %l4;\ |
| 759 | sllx %l4, 20, %l4;\ |
| 760 | wrpr %l3, %l4, %tstate ;\ |
| 761 | retry;nop; |
| 762 | |
| 763 | #define H_T1_Control_Transfer_Instr_0x74 |
| 764 | #define My_H_T1_Control_Transfer_Instr_0x74 \ |
| 765 | rdpr %tstate, %l3;\ |
| 766 | mov 1, %l4;\ |
| 767 | sllx %l4, 20, %l4;\ |
| 768 | wrpr %l3, %l4, %tstate ;\ |
| 769 | retry;nop; |
| 770 | # 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 771 | #define H_HT0_data_access_protection_0x6c |
| 772 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop |
| 773 | |
| 774 | #define H_HT0_PA_Watchpoint_0x61 |
| 775 | #define My_H_HT0_PA_Watchpoint_0x61 \ |
| 776 | HT_HANDLER_RAND7_4;\ |
| 777 | done |
| 778 | |
| 779 | #ifndef H_HT0_Data_access_error_0x32 |
| 780 | #define H_HT0_Data_access_error_0x32 |
| 781 | #define SUN_H_HT0_Data_access_error_0x32 \ |
| 782 | done;nop |
| 783 | #endif |
| 784 | # 722 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 785 | #define H_T0_VA_Watchpoint_0x62 |
| 786 | #define My_T0_VA_Watchpoint_0x62 \ |
| 787 | T_HANDLER_RAND7_5;\ |
| 788 | done |
| 789 | |
| 790 | #define H_T1_VA_Watchpoint_0x62 |
| 791 | #define SUN_H_T1_VA_Watchpoint_0x62 \ |
| 792 | T_HANDLER_RAND7_3;\ |
| 793 | done |
| 794 | |
| 795 | #define H_HT0_VA_Watchpoint_0x62 |
| 796 | #define My_H_HT0_VA_Watchpoint_0x62 \ |
| 797 | HT_HANDLER_RAND7_5;\ |
| 798 | done |
| 799 | |
| 800 | #define H_HT0_Instruction_VA_Watchpoint_0x75 |
| 801 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ |
| 802 | done; |
| 803 | |
| 804 | #define H_HT0_Instruction_Breakpoint_0x76 |
| 805 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ |
| 806 | rdhpr %htstate, %g1;\ |
| 807 | wrhpr %g1, 0x400, %htstate;\ |
| 808 | retry;nop |
| 809 | # 748 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 810 | #define H_HT0_Instruction_address_range_0x0d |
| 811 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 812 | HT_HANDLER_RAND4_1;\ |
| 813 | done; |
| 814 | |
| 815 | #define H_HT0_Instruction_real_range_0x0e |
| 816 | #define SUN_H_HT0_Instruction_real_range_0x0e \ |
| 817 | HT_HANDLER_RAND4_1;\ |
| 818 | done; |
| 819 | |
| 820 | #define H_HT0_mem_real_range_0x2d |
| 821 | #define SUN_H_HT0_mem_real_range_0x2d \ |
| 822 | HT_HANDLER_RAND4_2;\ |
| 823 | done; |
| 824 | # 764 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 825 | #define H_HT0_mem_address_range_0x2e |
| 826 | #define SUN_H_HT0_mem_address_range_0x2e \ |
| 827 | HT_HANDLER_RAND4_3;\ |
| 828 | done; |
| 829 | |
| 830 | #define H_HT0_DAE_nc_page_0x16 |
| 831 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 832 | HT_HANDLER_RAND4_4;\ |
| 833 | done; |
| 834 | |
| 835 | #define H_HT0_DAE_nfo_page_0x17 |
| 836 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 837 | HT_HANDLER_RAND4_5;\ |
| 838 | done; |
| 839 | # 780 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 840 | #define H_HT0_IAE_unauth_access_0x0b |
| 841 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 842 | HT_HANDLER_RAND7_3;\ |
| 843 | done; |
| 844 | # 786 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 845 | #define H_HT0_IAE_nfo_page_0x0c |
| 846 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 847 | HT_HANDLER_RAND7_6;\ |
| 848 | done; |
| 849 | # 792 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 850 | #define H_HT0_Reserved_0x3b |
| 851 | #define SUN_H_HT0_Reserved_0x3b \ |
| 852 | mov 0x80, %l3;\ |
| 853 | stxa %l3, [%l3]0x5f ;\ |
| 854 | stxa %l3, [%l3]0x57 ;\ |
| 855 | done; |
| 856 | # 802 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 857 | #define H_HT0_IAE_privilege_violation_0x08 |
| 858 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 859 | HT_HANDLER_RAND7_2;\ |
| 860 | done; |
| 861 | |
| 862 | #ifndef H_HT0_Instruction_Access_MMU_Error_0x71 |
| 863 | #define H_HT0_Instruction_Access_MMU_Error_0x71 |
| 864 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ |
| 865 | mov 0x80, %l3;\ |
| 866 | stxa %l3, [%l3]0x5f ;\ |
| 867 | stxa %l3, [%l3]0x57 ;\ |
| 868 | retry; |
| 869 | #endif |
| 870 | |
| 871 | #ifndef H_HT0_Data_Access_MMU_Error_0x72 |
| 872 | #define H_HT0_Data_Access_MMU_Error_0x72 |
| 873 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ |
| 874 | mov 0x80, %l3;\ |
| 875 | stxa %l3, [%l3]0x5f ;\ |
| 876 | stxa %l3, [%l3]0x57 ;\ |
| 877 | retry; |
| 878 | #endif |
| 879 | |
| 880 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 881 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 882 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 883 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! |
| 884 | |
| 885 | #ifndef INT_HANDLER_RAND4_1 |
| 886 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop |
| 887 | #endif |
| 888 | #ifndef INT_HANDLER_RAND7_1 |
| 889 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 |
| 890 | #endif |
| 891 | #ifndef INT_HANDLER_RAND4_2 |
| 892 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop |
| 893 | #endif |
| 894 | #ifndef INT_HANDLER_RAND7_2 |
| 895 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 |
| 896 | #endif |
| 897 | #ifndef INT_HANDLER_RAND4_3 |
| 898 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop |
| 899 | #endif |
| 900 | #ifndef INT_HANDLER_RAND7_3 |
| 901 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop |
| 902 | #endif |
| 903 | #define H_HT0_Externally_Initiated_Reset_0x03 |
| 904 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ |
| 905 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ |
| 906 | set cregs_lsu_ctl_reg_r64, %g1; \ |
| 907 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ |
| 908 | retry;nop |
| 909 | |
| 910 | #define My_External_Reset \ |
| 911 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ |
| 912 | set cregs_lsu_ctl_reg_r64, %l5; \ |
| 913 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ |
| 914 | retry;nop |
| 915 | |
| 916 | !!!!! SPU Interrupt Handlers |
| 917 | |
| 918 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c |
| 919 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ |
| 920 | INT_HANDLER_RAND7_1 ;\ |
| 921 | retry ; |
| 922 | |
| 923 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d |
| 924 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ |
| 925 | INT_HANDLER_RAND7_2 ;\ |
| 926 | retry ; |
| 927 | # 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 928 | !!!!! HW interrupt handlers |
| 929 | |
| 930 | #define H_HT0_Interrupt_0x60 |
| 931 | #define My_HT0_Interrupt_0x60 \ |
| 932 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ |
| 933 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ |
| 934 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ |
| 935 | INT_HANDLER_RAND4_1 ;\ |
| 936 | retry; |
| 937 | |
| 938 | !!!!! Queue interrupt handler |
| 939 | # 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 940 | #define H_T0_Cpu_Mondo_Trap_0x7c |
| 941 | #define My_T0_Cpu_Mondo_Trap_0x7c \ |
| 942 | mov 0x3c8, %g3; \ |
| 943 | ldxa [%g3] 0x25, %g5; \ |
| 944 | mov 0x3c0, %g3; \ |
| 945 | stxa %g5, [%g3] 0x25; \ |
| 946 | retry; \ |
| 947 | nop; \ |
| 948 | nop; \ |
| 949 | nop |
| 950 | |
| 951 | #define H_T0_Dev_Mondo_Trap_0x7d |
| 952 | #define My_T0_Dev_Mondo_Trap_0x7d \ |
| 953 | mov 0x3d8, %g3; \ |
| 954 | ldxa [%g3] 0x25, %g5; \ |
| 955 | mov 0x3d0, %g3; \ |
| 956 | stxa %g5, [%g3] 0x25; \ |
| 957 | retry; \ |
| 958 | nop; \ |
| 959 | nop; \ |
| 960 | nop |
| 961 | |
| 962 | #define H_T0_Resumable_Error_0x7e |
| 963 | #define My_T0_Resumable_Error_0x7e \ |
| 964 | mov 0x3e8, %g3; \ |
| 965 | ldxa [%g3] 0x25, %g5; \ |
| 966 | mov 0x3e0, %g3; \ |
| 967 | stxa %g5, [%g3] 0x25; \ |
| 968 | retry; \ |
| 969 | nop; \ |
| 970 | nop; \ |
| 971 | nop |
| 972 | |
| 973 | #define H_T1_Cpu_Mondo_Trap_0x7c |
| 974 | #define My_T1_Cpu_Mondo_Trap_0x7c \ |
| 975 | mov 0x3c8, %g3; \ |
| 976 | ldxa [%g3] 0x25, %g5; \ |
| 977 | mov 0x3c0, %g3; \ |
| 978 | stxa %g5, [%g3] 0x25; \ |
| 979 | retry; \ |
| 980 | nop; \ |
| 981 | nop; \ |
| 982 | nop |
| 983 | |
| 984 | #define H_T1_Dev_Mondo_Trap_0x7d |
| 985 | #define My_T1_Dev_Mondo_Trap_0x7d \ |
| 986 | mov 0x3d8, %g3; \ |
| 987 | ldxa [%g3] 0x25, %g5; \ |
| 988 | mov 0x3d0, %g3; \ |
| 989 | stxa %g5, [%g3] 0x25; \ |
| 990 | retry; \ |
| 991 | nop; \ |
| 992 | nop; \ |
| 993 | nop |
| 994 | |
| 995 | #define H_T1_Resumable_Error_0x7e |
| 996 | #define My_T1_Resumable_Error_0x7e \ |
| 997 | mov 0x3e8, %g3; \ |
| 998 | ldxa [%g3] 0x25, %g5; \ |
| 999 | mov 0x3e0, %g3; \ |
| 1000 | stxa %g5, [%g3] 0x25; \ |
| 1001 | retry; \ |
| 1002 | nop; \ |
| 1003 | nop; \ |
| 1004 | nop |
| 1005 | |
| 1006 | #define H_HT0_Reserved_0x7c |
| 1007 | #define SUN_H_HT0_Reserved_0x7c \ |
| 1008 | mov 0x3c8, %g3; \ |
| 1009 | ldxa [%g3] 0x25, %g5; \ |
| 1010 | mov 0x3c0, %g3; \ |
| 1011 | stxa %g5, [%g3] 0x25; \ |
| 1012 | retry; \ |
| 1013 | nop; \ |
| 1014 | nop; \ |
| 1015 | nop |
| 1016 | |
| 1017 | #define H_HT0_Reserved_0x7d |
| 1018 | #define SUN_H_HT0_Reserved_0x7d \ |
| 1019 | mov 0x3d8, %g3; \ |
| 1020 | ldxa [%g3] 0x25, %g5; \ |
| 1021 | mov 0x3d0, %g3; \ |
| 1022 | stxa %g5, [%g3] 0x25; \ |
| 1023 | retry; \ |
| 1024 | nop; \ |
| 1025 | nop; \ |
| 1026 | nop |
| 1027 | |
| 1028 | #define H_HT0_Reserved_0x7e |
| 1029 | #define SUN_H_HT0_Reserved_0x7e \ |
| 1030 | mov 0x3e8, %g3; \ |
| 1031 | ldxa [%g3] 0x25, %g5; \ |
| 1032 | mov 0x3e0, %g3; \ |
| 1033 | stxa %g5, [%g3] 0x25; \ |
| 1034 | retry; \ |
| 1035 | nop; \ |
| 1036 | nop; \ |
| 1037 | nop |
| 1038 | # 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1039 | !!!!! Hstick-match trap handler |
| 1040 | # 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1041 | #define H_T0_Reserved_0x5e |
| 1042 | #define My_T0_Reserved_0x5e \ |
| 1043 | rdhpr %hintp, %g3; \ |
| 1044 | wrhpr %g3, %g3, %hintp; \ |
| 1045 | retry; \ |
| 1046 | nop; \ |
| 1047 | nop; \ |
| 1048 | nop; \ |
| 1049 | nop; \ |
| 1050 | nop |
| 1051 | |
| 1052 | #define H_HT0_Hstick_Match_0x5e |
| 1053 | #define My_HT0_Hstick_Match_0x5e \ |
| 1054 | rdhpr %hintp, %g3; \ |
| 1055 | wrhpr %g3, %g3, %hintp; \ |
| 1056 | retry; \ |
| 1057 | nop; \ |
| 1058 | nop; \ |
| 1059 | nop; \ |
| 1060 | nop; \ |
| 1061 | nop |
| 1062 | |
| 1063 | #define H_T0_Reserved_0x5e |
| 1064 | #define My_T0_Reserved_0x5e \ |
| 1065 | rdhpr %hintp, %g3; \ |
| 1066 | wrhpr %g3, %g3, %hintp; \ |
| 1067 | retry; \ |
| 1068 | nop; \ |
| 1069 | nop; \ |
| 1070 | nop; \ |
| 1071 | nop; \ |
| 1072 | nop |
| 1073 | |
| 1074 | #define H_T1_Reserved_0x5e |
| 1075 | #define My_T1_Reserved_0x5e \ |
| 1076 | rdhpr %hintp, %g3; \ |
| 1077 | wrhpr %g3, %g3, %hintp; \ |
| 1078 | retry; \ |
| 1079 | nop; \ |
| 1080 | nop; \ |
| 1081 | nop; \ |
| 1082 | nop; \ |
| 1083 | nop |
| 1084 | # 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1085 | !!!!! SW interuupt handlers |
| 1086 | # 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1087 | #define H_T0_Interrupt_Level_14_0x4e |
| 1088 | #define My_T0_Interrupt_Level_14_0x4e \ |
| 1089 | rd %softint, %g3; \ |
| 1090 | sethi %hi(0x14000), %g3; \ |
| 1091 | or %g3, 0x1, %g3; \ |
| 1092 | wr %g3, %g0, %clear_softint; \ |
| 1093 | retry; \ |
| 1094 | nop; \ |
| 1095 | nop; \ |
| 1096 | nop |
| 1097 | |
| 1098 | #define H_T0_Interrupt_Level_1_0x41 |
| 1099 | #define My_T0_Interrupt_Level_1_0x41 \ |
| 1100 | rd %softint, %g3; \ |
| 1101 | or %g0, 0x2, %g3; \ |
| 1102 | wr %g3, %g0, %clear_softint; \ |
| 1103 | retry; \ |
| 1104 | nop; \ |
| 1105 | nop; \ |
| 1106 | nop; \ |
| 1107 | nop |
| 1108 | |
| 1109 | #define H_T0_Interrupt_Level_2_0x42 |
| 1110 | #define My_T0_Interrupt_Level_2_0x42 \ |
| 1111 | rd %softint, %g3; \ |
| 1112 | or %g0, 0x4, %g3; \ |
| 1113 | wr %g3, %g0, %clear_softint; \ |
| 1114 | retry; \ |
| 1115 | nop; \ |
| 1116 | nop; \ |
| 1117 | nop; \ |
| 1118 | nop |
| 1119 | |
| 1120 | #define H_T0_Interrupt_Level_3_0x43 |
| 1121 | #define My_T0_Interrupt_Level_3_0x43 \ |
| 1122 | rd %softint, %g3; \ |
| 1123 | or %g0, 0x8, %g3; \ |
| 1124 | wr %g3, %g0, %clear_softint; \ |
| 1125 | retry; \ |
| 1126 | nop; \ |
| 1127 | nop; \ |
| 1128 | nop; \ |
| 1129 | nop |
| 1130 | |
| 1131 | #define H_T0_Interrupt_Level_4_0x44 |
| 1132 | #define My_T0_Interrupt_Level_4_0x44 \ |
| 1133 | rd %softint, %g3; \ |
| 1134 | or %g0, 0x10, %g3; \ |
| 1135 | wr %g3, %g0, %clear_softint; \ |
| 1136 | retry; \ |
| 1137 | nop; \ |
| 1138 | nop; \ |
| 1139 | nop; \ |
| 1140 | nop |
| 1141 | |
| 1142 | #define H_T0_Interrupt_Level_5_0x45 |
| 1143 | #define My_T0_Interrupt_Level_5_0x45 \ |
| 1144 | rd %softint, %g3; \ |
| 1145 | or %g0, 0x20, %g3; \ |
| 1146 | wr %g3, %g0, %clear_softint; \ |
| 1147 | retry; \ |
| 1148 | nop; \ |
| 1149 | nop; \ |
| 1150 | nop; \ |
| 1151 | nop |
| 1152 | |
| 1153 | #define H_T0_Interrupt_Level_6_0x46 |
| 1154 | #define My_T0_Interrupt_Level_6_0x46 \ |
| 1155 | rd %softint, %g3; \ |
| 1156 | or %g0, 0x40, %g3; \ |
| 1157 | wr %g3, %g0, %clear_softint; \ |
| 1158 | retry; \ |
| 1159 | nop; \ |
| 1160 | nop; \ |
| 1161 | nop; \ |
| 1162 | nop |
| 1163 | |
| 1164 | #define H_T0_Interrupt_Level_7_0x47 |
| 1165 | #define My_T0_Interrupt_Level_7_0x47 \ |
| 1166 | rd %softint, %g3; \ |
| 1167 | or %g0, 0x80, %g3; \ |
| 1168 | wr %g3, %g0, %clear_softint; \ |
| 1169 | retry; \ |
| 1170 | nop; \ |
| 1171 | nop; \ |
| 1172 | nop; \ |
| 1173 | nop |
| 1174 | |
| 1175 | #define H_T0_Interrupt_Level_8_0x48 |
| 1176 | #define My_T0_Interrupt_Level_8_0x48 \ |
| 1177 | rd %softint, %g3; \ |
| 1178 | or %g0, 0x100, %g3; \ |
| 1179 | wr %g3, %g0, %clear_softint; \ |
| 1180 | retry; \ |
| 1181 | nop; \ |
| 1182 | nop; \ |
| 1183 | nop; \ |
| 1184 | nop |
| 1185 | |
| 1186 | #define H_T0_Interrupt_Level_9_0x49 |
| 1187 | #define My_T0_Interrupt_Level_9_0x49 \ |
| 1188 | rd %softint, %g3; \ |
| 1189 | or %g0, 0x200, %g3; \ |
| 1190 | wr %g3, %g0, %clear_softint; \ |
| 1191 | retry; \ |
| 1192 | nop; \ |
| 1193 | nop; \ |
| 1194 | nop; \ |
| 1195 | nop |
| 1196 | |
| 1197 | #define H_T0_Interrupt_Level_10_0x4a |
| 1198 | #define My_T0_Interrupt_Level_10_0x4a \ |
| 1199 | rd %softint, %g3; \ |
| 1200 | or %g0, 0x400, %g3; \ |
| 1201 | wr %g3, %g0, %clear_softint; \ |
| 1202 | retry; \ |
| 1203 | nop; \ |
| 1204 | nop; \ |
| 1205 | nop; \ |
| 1206 | nop |
| 1207 | |
| 1208 | #define H_T0_Interrupt_Level_11_0x4b |
| 1209 | #define My_T0_Interrupt_Level_11_0x4b \ |
| 1210 | rd %softint, %g3; \ |
| 1211 | or %g0, 0x800, %g3; \ |
| 1212 | wr %g3, %g0, %clear_softint; \ |
| 1213 | retry; \ |
| 1214 | nop; \ |
| 1215 | nop; \ |
| 1216 | nop; \ |
| 1217 | nop |
| 1218 | |
| 1219 | #define H_T0_Interrupt_Level_12_0x4c |
| 1220 | #define My_T0_Interrupt_Level_12_0x4c \ |
| 1221 | rd %softint, %g3; \ |
| 1222 | sethi %hi(0x1000), %g3; \ |
| 1223 | wr %g3, %g0, %clear_softint; \ |
| 1224 | retry; \ |
| 1225 | nop; \ |
| 1226 | nop; \ |
| 1227 | nop; \ |
| 1228 | nop |
| 1229 | |
| 1230 | #define H_T0_Interrupt_Level_13_0x4d |
| 1231 | #define My_T0_Interrupt_Level_13_0x4d \ |
| 1232 | rd %softint, %g3; \ |
| 1233 | sethi %hi(0x2000), %g3; \ |
| 1234 | wr %g3, %g0, %clear_softint; \ |
| 1235 | retry; \ |
| 1236 | nop; \ |
| 1237 | nop; \ |
| 1238 | nop; \ |
| 1239 | nop |
| 1240 | |
| 1241 | #define H_T0_Interrupt_Level_15_0x4f |
| 1242 | #define My_T0_Interrupt_Level_15_0x4f \ |
| 1243 | sethi %hi(0x8000), %g3; \ |
| 1244 | wr %g3, %g0, %clear_softint; \ |
| 1245 | wr %g0, %g0, %pic;\ |
| 1246 | set 0x1ff8bfff, %g4;\ |
| 1247 | wr %g4, %g0, %pcr;\ |
| 1248 | retry; |
| 1249 | |
| 1250 | #define H_T1_Interrupt_Level_14_0x4e |
| 1251 | #define My_T1_Interrupt_Level_14_0x4e \ |
| 1252 | rd %softint, %g3; \ |
| 1253 | sethi %hi(0x14000), %g3; \ |
| 1254 | or %g3, 0x1, %g3; \ |
| 1255 | wr %g3, %g0, %clear_softint; \ |
| 1256 | retry; \ |
| 1257 | nop; \ |
| 1258 | nop; \ |
| 1259 | nop |
| 1260 | |
| 1261 | #define H_T1_Interrupt_Level_1_0x41 |
| 1262 | #define My_T1_Interrupt_Level_1_0x41 \ |
| 1263 | rd %softint, %g3; \ |
| 1264 | or %g0, 0x2, %g3; \ |
| 1265 | wr %g3, %g0, %clear_softint; \ |
| 1266 | retry; \ |
| 1267 | nop; \ |
| 1268 | nop; \ |
| 1269 | nop; \ |
| 1270 | nop |
| 1271 | |
| 1272 | #define H_T1_Interrupt_Level_2_0x42 |
| 1273 | #define My_T1_Interrupt_Level_2_0x42 \ |
| 1274 | rd %softint, %g3; \ |
| 1275 | or %g0, 0x4, %g3; \ |
| 1276 | wr %g3, %g0, %clear_softint; \ |
| 1277 | retry; \ |
| 1278 | nop; \ |
| 1279 | nop; \ |
| 1280 | nop; \ |
| 1281 | nop |
| 1282 | |
| 1283 | #define H_T1_Interrupt_Level_3_0x43 |
| 1284 | #define My_T1_Interrupt_Level_3_0x43 \ |
| 1285 | rd %softint, %g3; \ |
| 1286 | or %g0, 0x8, %g3; \ |
| 1287 | wr %g3, %g0, %clear_softint; \ |
| 1288 | retry; \ |
| 1289 | nop; \ |
| 1290 | nop; \ |
| 1291 | nop; \ |
| 1292 | nop |
| 1293 | |
| 1294 | #define H_T1_Interrupt_Level_4_0x44 |
| 1295 | #define My_T1_Interrupt_Level_4_0x44 \ |
| 1296 | rd %softint, %g3; \ |
| 1297 | or %g0, 0x10, %g3; \ |
| 1298 | wr %g3, %g0, %clear_softint; \ |
| 1299 | retry; \ |
| 1300 | nop; \ |
| 1301 | nop; \ |
| 1302 | nop; \ |
| 1303 | nop |
| 1304 | |
| 1305 | #define H_T1_Interrupt_Level_5_0x45 |
| 1306 | #define My_T1_Interrupt_Level_5_0x45 \ |
| 1307 | rd %softint, %g3; \ |
| 1308 | or %g0, 0x20, %g3; \ |
| 1309 | wr %g3, %g0, %clear_softint; \ |
| 1310 | retry; \ |
| 1311 | nop; \ |
| 1312 | nop; \ |
| 1313 | nop; \ |
| 1314 | nop |
| 1315 | |
| 1316 | #define H_T1_Interrupt_Level_6_0x46 |
| 1317 | #define My_T1_Interrupt_Level_6_0x46 \ |
| 1318 | rd %softint, %g3; \ |
| 1319 | or %g0, 0x40, %g3; \ |
| 1320 | wr %g3, %g0, %clear_softint; \ |
| 1321 | retry; \ |
| 1322 | nop; \ |
| 1323 | nop; \ |
| 1324 | nop; \ |
| 1325 | nop |
| 1326 | |
| 1327 | #define H_T1_Interrupt_Level_7_0x47 |
| 1328 | #define My_T1_Interrupt_Level_7_0x47 \ |
| 1329 | rd %softint, %g3; \ |
| 1330 | or %g0, 0x80, %g3; \ |
| 1331 | wr %g3, %g0, %clear_softint; \ |
| 1332 | retry; \ |
| 1333 | nop; \ |
| 1334 | nop; \ |
| 1335 | nop; \ |
| 1336 | nop |
| 1337 | |
| 1338 | #define H_T1_Interrupt_Level_8_0x48 |
| 1339 | #define My_T1_Interrupt_Level_8_0x48 \ |
| 1340 | rd %softint, %g3; \ |
| 1341 | or %g0, 0x100, %g3; \ |
| 1342 | wr %g3, %g0, %clear_softint; \ |
| 1343 | retry; \ |
| 1344 | nop; \ |
| 1345 | nop; \ |
| 1346 | nop; \ |
| 1347 | nop |
| 1348 | |
| 1349 | #define H_T1_Interrupt_Level_9_0x49 |
| 1350 | #define My_T1_Interrupt_Level_9_0x49 \ |
| 1351 | rd %softint, %g3; \ |
| 1352 | or %g0, 0x200, %g3; \ |
| 1353 | wr %g3, %g0, %clear_softint; \ |
| 1354 | retry; \ |
| 1355 | nop; \ |
| 1356 | nop; \ |
| 1357 | nop; \ |
| 1358 | nop |
| 1359 | |
| 1360 | #define H_T1_Interrupt_Level_10_0x4a |
| 1361 | #define My_T1_Interrupt_Level_10_0x4a \ |
| 1362 | rd %softint, %g3; \ |
| 1363 | or %g0, 0x400, %g3; \ |
| 1364 | wr %g3, %g0, %clear_softint; \ |
| 1365 | retry; \ |
| 1366 | nop; \ |
| 1367 | nop; \ |
| 1368 | nop; \ |
| 1369 | nop |
| 1370 | |
| 1371 | #define H_T1_Interrupt_Level_11_0x4b |
| 1372 | #define My_T1_Interrupt_Level_11_0x4b \ |
| 1373 | rd %softint, %g3; \ |
| 1374 | or %g0, 0x800, %g3; \ |
| 1375 | wr %g3, %g0, %clear_softint; \ |
| 1376 | retry; \ |
| 1377 | nop; \ |
| 1378 | nop; \ |
| 1379 | nop; \ |
| 1380 | nop |
| 1381 | |
| 1382 | #define H_T1_Interrupt_Level_12_0x4c |
| 1383 | #define My_T1_Interrupt_Level_12_0x4c \ |
| 1384 | rd %softint, %g3; \ |
| 1385 | sethi %hi(0x1000), %g3; \ |
| 1386 | wr %g3, %g0, %clear_softint; \ |
| 1387 | retry; \ |
| 1388 | nop; \ |
| 1389 | nop; \ |
| 1390 | nop; \ |
| 1391 | nop |
| 1392 | |
| 1393 | #define H_T1_Interrupt_Level_13_0x4d |
| 1394 | #define My_T1_Interrupt_Level_13_0x4d \ |
| 1395 | rd %softint, %g3; \ |
| 1396 | sethi %hi(0x2000), %g3; \ |
| 1397 | wr %g3, %g0, %clear_softint; \ |
| 1398 | retry; \ |
| 1399 | nop; \ |
| 1400 | nop; \ |
| 1401 | nop; \ |
| 1402 | nop |
| 1403 | |
| 1404 | #define H_T1_Interrupt_Level_15_0x4f |
| 1405 | #define My_T1_Interrupt_Level_15_0x4f \ |
| 1406 | sethi %hi(0x8000), %g3; \ |
| 1407 | wr %g3, %g0, %clear_softint; \ |
| 1408 | wr %g0, %g0, %pic;\ |
| 1409 | set 0x1ff8bfff, %g4;\ |
| 1410 | wr %g4, %g0, %pcr;\ |
| 1411 | retry; |
| 1412 | |
| 1413 | #define H_HT0_Interrupt_Level_14_0x4e |
| 1414 | #define My_HT0_Interrupt_Level_14_0x4e \ |
| 1415 | rd %softint, %g3; \ |
| 1416 | sethi %hi(0x14000), %g3; \ |
| 1417 | or %g3, 0x1, %g3; \ |
| 1418 | wr %g3, %g0, %clear_softint; \ |
| 1419 | retry; \ |
| 1420 | nop; \ |
| 1421 | nop; \ |
| 1422 | nop |
| 1423 | |
| 1424 | #define H_HT0_Interrupt_Level_1_0x41 |
| 1425 | #define My_HT0_Interrupt_Level_1_0x41 \ |
| 1426 | rd %softint, %g3; \ |
| 1427 | or %g0, 0x2, %g3; \ |
| 1428 | wr %g3, %g0, %clear_softint; \ |
| 1429 | retry; \ |
| 1430 | nop; \ |
| 1431 | nop; \ |
| 1432 | nop; \ |
| 1433 | nop |
| 1434 | |
| 1435 | #define H_HT0_Interrupt_Level_2_0x42 |
| 1436 | #define My_HT0_Interrupt_Level_2_0x42 \ |
| 1437 | rd %softint, %g3; \ |
| 1438 | or %g0, 0x4, %g3; \ |
| 1439 | wr %g3, %g0, %clear_softint; \ |
| 1440 | retry; \ |
| 1441 | nop; \ |
| 1442 | nop; \ |
| 1443 | nop; \ |
| 1444 | nop |
| 1445 | |
| 1446 | #define H_HT0_Interrupt_Level_3_0x43 |
| 1447 | #define My_HT0_Interrupt_Level_3_0x43 \ |
| 1448 | rd %softint, %g3; \ |
| 1449 | or %g0, 0x8, %g3; \ |
| 1450 | wr %g3, %g0, %clear_softint; \ |
| 1451 | retry; \ |
| 1452 | nop; \ |
| 1453 | nop; \ |
| 1454 | nop; \ |
| 1455 | nop |
| 1456 | |
| 1457 | #define H_HT0_Interrupt_Level_4_0x44 |
| 1458 | #define My_HT0_Interrupt_Level_4_0x44 \ |
| 1459 | rd %softint, %g3; \ |
| 1460 | or %g0, 0x10, %g3; \ |
| 1461 | wr %g3, %g0, %clear_softint; \ |
| 1462 | retry; \ |
| 1463 | nop; \ |
| 1464 | nop; \ |
| 1465 | nop; \ |
| 1466 | nop |
| 1467 | |
| 1468 | #define H_HT0_Interrupt_Level_5_0x45 |
| 1469 | #define My_HT0_Interrupt_Level_5_0x45 \ |
| 1470 | rd %softint, %g3; \ |
| 1471 | or %g0, 0x20, %g3; \ |
| 1472 | wr %g3, %g0, %clear_softint; \ |
| 1473 | retry; \ |
| 1474 | nop; \ |
| 1475 | nop; \ |
| 1476 | nop; \ |
| 1477 | nop |
| 1478 | |
| 1479 | #define H_HT0_Interrupt_Level_6_0x46 |
| 1480 | #define My_HT0_Interrupt_Level_6_0x46 \ |
| 1481 | rd %softint, %g3; \ |
| 1482 | or %g0, 0x40, %g3; \ |
| 1483 | wr %g3, %g0, %clear_softint; \ |
| 1484 | retry; \ |
| 1485 | nop; \ |
| 1486 | nop; \ |
| 1487 | nop; \ |
| 1488 | nop |
| 1489 | |
| 1490 | #define H_HT0_Interrupt_Level_7_0x47 |
| 1491 | #define My_HT0_Interrupt_Level_7_0x47 \ |
| 1492 | rd %softint, %g3; \ |
| 1493 | or %g0, 0x80, %g3; \ |
| 1494 | wr %g3, %g0, %clear_softint; \ |
| 1495 | retry; \ |
| 1496 | nop; \ |
| 1497 | nop; \ |
| 1498 | nop; \ |
| 1499 | nop |
| 1500 | |
| 1501 | #define H_HT0_Interrupt_Level_8_0x48 |
| 1502 | #define My_HT0_Interrupt_Level_8_0x48 \ |
| 1503 | rd %softint, %g3; \ |
| 1504 | or %g0, 0x100, %g3; \ |
| 1505 | wr %g3, %g0, %clear_softint; \ |
| 1506 | retry; \ |
| 1507 | nop; \ |
| 1508 | nop; \ |
| 1509 | nop; \ |
| 1510 | nop |
| 1511 | |
| 1512 | #define H_HT0_Interrupt_Level_9_0x49 |
| 1513 | #define My_HT0_Interrupt_Level_9_0x49 \ |
| 1514 | rd %softint, %g3; \ |
| 1515 | or %g0, 0x200, %g3; \ |
| 1516 | wr %g3, %g0, %clear_softint; \ |
| 1517 | retry; \ |
| 1518 | nop; \ |
| 1519 | nop; \ |
| 1520 | nop; \ |
| 1521 | nop |
| 1522 | |
| 1523 | #define H_HT0_Interrupt_Level_10_0x4a |
| 1524 | #define My_HT0_Interrupt_Level_10_0x4a \ |
| 1525 | rd %softint, %g3; \ |
| 1526 | or %g0, 0x400, %g3; \ |
| 1527 | wr %g3, %g0, %clear_softint; \ |
| 1528 | retry; \ |
| 1529 | nop; \ |
| 1530 | nop; \ |
| 1531 | nop; \ |
| 1532 | nop |
| 1533 | |
| 1534 | #define H_HT0_Interrupt_Level_11_0x4b |
| 1535 | #define My_HT0_Interrupt_Level_11_0x4b \ |
| 1536 | rd %softint, %g3; \ |
| 1537 | or %g0, 0x800, %g3; \ |
| 1538 | wr %g3, %g0, %clear_softint; \ |
| 1539 | retry; \ |
| 1540 | nop; \ |
| 1541 | nop; \ |
| 1542 | nop; \ |
| 1543 | nop |
| 1544 | |
| 1545 | #define H_HT0_Interrupt_Level_12_0x4c |
| 1546 | #define My_HT0_Interrupt_Level_12_0x4c \ |
| 1547 | rd %softint, %g3; \ |
| 1548 | sethi %hi(0x1000), %g3; \ |
| 1549 | wr %g3, %g0, %clear_softint; \ |
| 1550 | retry; \ |
| 1551 | nop; \ |
| 1552 | nop; \ |
| 1553 | nop; \ |
| 1554 | nop |
| 1555 | |
| 1556 | #define H_HT0_Interrupt_Level_13_0x4d |
| 1557 | #define My_HT0_Interrupt_Level_13_0x4d \ |
| 1558 | rd %softint, %g3; \ |
| 1559 | sethi %hi(0x2000), %g3; \ |
| 1560 | wr %g3, %g0, %clear_softint; \ |
| 1561 | retry; \ |
| 1562 | nop; \ |
| 1563 | nop; \ |
| 1564 | nop; \ |
| 1565 | nop |
| 1566 | |
| 1567 | #define H_HT0_Interrupt_Level_15_0x4f |
| 1568 | #define My_HT0_Interrupt_Level_15_0x4f \ |
| 1569 | sethi %hi(0x8000), %g3; \ |
| 1570 | wr %g3, %g0, %clear_softint; \ |
| 1571 | wr %g0, %g0, %pic;\ |
| 1572 | set 0x1ff8bfff, %g4;\ |
| 1573 | wr %g4, %g0, %pcr;\ |
| 1574 | retry; |
| 1575 | # 713 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1576 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 1577 | # 480 "diag.j" |
| 1578 | !# Steer towards main TBA on these errors .. |
| 1579 | !# These are redefines ... |
| 1580 | #undef SUN_H_HT0_DAE_nc_page_0x16 |
| 1581 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 1582 | best_set_reg(0x120000, %r1, %r2);\ |
| 1583 | wrpr %r0, %r2, %tba; \ |
| 1584 | done;nop |
| 1585 | |
| 1586 | #undef SUN_H_HT0_DAE_nfo_page_0x17 |
| 1587 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 1588 | best_set_reg(0x120000, %r1, %r2);\ |
| 1589 | wrpr %r0, %r2, %tba; \ |
| 1590 | done;nop |
| 1591 | |
| 1592 | #undef SUN_H_HT0_IAE_unauth_access_0x0b |
| 1593 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 1594 | set resolve_bad_tte, %g3;\ |
| 1595 | jmp %g3;\ |
| 1596 | nop |
| 1597 | |
| 1598 | #undef My_HT0_IAE_privilege_violation_0x08 |
| 1599 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 1600 | set resolve_bad_tte, %g3;\ |
| 1601 | jmp %g3;\ |
| 1602 | nop |
| 1603 | |
| 1604 | #define H_HT0_Instruction_address_range_0x0d |
| 1605 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 1606 | rdpr %tpc, %g1;\ |
| 1607 | rdpr %tnpc, %g2;\ |
| 1608 | stw %g1, [%i7];\ |
| 1609 | stw %g2, [%i7+4];\ |
| 1610 | jmpl %r27+8, %r27;\ |
| 1611 | fdivd %f0, %f4, %f4;\ |
| 1612 | nop; |
| 1613 | |
| 1614 | #define H_HT0_Instruction_real_range_0x0e |
| 1615 | #define SUN_H_HT0_Instruction_real_range_0x0e \ |
| 1616 | rdpr %tpc, %g1;\ |
| 1617 | rdpr %tnpc, %g2;\ |
| 1618 | stw %g1, [%i7];\ |
| 1619 | stw %g2, [%i7+4];\ |
| 1620 | jmpl %r27+8, %r27;\ |
| 1621 | fdivd %f0, %f4, %f4;\ |
| 1622 | nop; |
| 1623 | |
| 1624 | #undef SUN_H_HT0_IAE_nfo_page_0x0c |
| 1625 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 1626 | set resolve_bad_tte, %g3;\ |
| 1627 | jmp %g3;\ |
| 1628 | nop |
| 1629 | |
| 1630 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a |
| 1631 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ |
| 1632 | set restore_range_regs, %g3;\ |
| 1633 | jmp %g3;\ |
| 1634 | nop |
| 1635 | |
| 1636 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b |
| 1637 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ |
| 1638 | set restore_range_regs, %g3;\ |
| 1639 | jmp %g3;\ |
| 1640 | nop |
| 1641 | |
| 1642 | #include "hboot.s" |
| 1643 | # 547 "diag.j" |
| 1644 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) |
| 1645 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) |
| 1646 | changequote([, ])dnl |
| 1647 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA |
| 1648 | attr_text { |
| 1649 | Name = .LOMEIN, |
| 1650 | VA= LOMEIN_TEXT_VA, |
| 1651 | RA= MAIN_BASE_TEXT_RA, |
| 1652 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), |
| 1653 | part_0_ctx_nonzero_tsb_config_1, |
| 1654 | part_0_ctx_zero_tsb_config_1, |
| 1655 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1657 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1658 | tsbonly |
| 1659 | } |
| 1660 | attr_data { |
| 1661 | Name = .LOMEIN, |
| 1662 | VA= LOMEIN_DATA_VA, |
| 1663 | RA= MAIN_BASE_DATA_RA, |
| 1664 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1665 | part_0_ctx_nonzero_tsb_config_2, |
| 1666 | part_0_ctx_zero_tsb_config_2 |
| 1667 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1668 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1669 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1670 | tsbonly |
| 1671 | } |
| 1672 | attr_data { |
| 1673 | Name = .LOMEIN, |
| 1674 | VA= LOMEIN_DATA_VA, |
| 1675 | RA= MAIN_BASE_DATA_RA, |
| 1676 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1677 | part_0_ctx_nonzero_tsb_config_3, |
| 1678 | part_0_ctx_zero_tsb_config_3 |
| 1679 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1680 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1681 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1682 | tsbonly |
| 1683 | } |
| 1684 | .text |
| 1685 | .align 0x100000 |
| 1686 | nop |
| 1687 | .data |
| 1688 | .word 0x0 |
| 1689 | |
| 1690 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA |
| 1691 | attr_text { |
| 1692 | Name = .MAIN, |
| 1693 | VA=MAIN_BASE_TEXT_VA, |
| 1694 | RA= LOMEIN_TEXT_VA, |
| 1695 | PA= LOMEIN_TEXT_VA, |
| 1696 | part_0_ctx_nonzero_tsb_config_2, |
| 1697 | part_0_ctx_zero_tsb_config_2, |
| 1698 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1699 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1700 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1701 | } |
| 1702 | |
| 1703 | attr_data { |
| 1704 | Name = .MAIN, |
| 1705 | VA=MAIN_BASE_DATA_VA |
| 1706 | RA= LOMEIN_DATA_VA, |
| 1707 | PA= LOMEIN_DATA_VA, |
| 1708 | part_0_ctx_nonzero_tsb_config_1, |
| 1709 | part_0_ctx_zero_tsb_config_1 |
| 1710 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1711 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1712 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1713 | } |
| 1714 | |
| 1715 | attr_data { |
| 1716 | Name = .MAIN, |
| 1717 | VA=MAIN_BASE_DATA_VA |
| 1718 | RA= LOMEIN_DATA_VA, |
| 1719 | PA= LOMEIN_DATA_VA, |
| 1720 | part_0_ctx_nonzero_tsb_config_3, |
| 1721 | part_0_ctx_zero_tsb_config_3 |
| 1722 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1723 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1724 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1725 | tsbonly |
| 1726 | } |
| 1727 | |
| 1728 | attr_text { |
| 1729 | Name = .MAIN, |
| 1730 | VA=MAIN_BASE_TEXT_VA, |
| 1731 | hypervisor |
| 1732 | } |
| 1733 | |
| 1734 | attr_data { |
| 1735 | Name = .MAIN, |
| 1736 | VA=MAIN_BASE_DATA_VA |
| 1737 | hypervisor |
| 1738 | } |
| 1739 | changequote(`,')dnl' |
| 1740 | |
| 1741 | .text |
| 1742 | .global main |
| 1743 | main: |
| 1744 | |
| 1745 | ! Set up ld/st area per thread |
| 1746 | ta T_CHANGE_HPRIV |
| 1747 | ldxa [%g0]0x63, %o2 |
| 1748 | and %o2, 0x7, %o1 |
| 1749 | brnz %o1, init_start |
| 1750 | mov 0xff, %r10 |
| 1751 | lock_sync_thds: |
| 1752 | set sync_thr_counter4, %r23 |
| 1753 | #ifndef SPC |
| 1754 | and %o2, 0x38, %o2 |
| 1755 | add %o2,%r23,%r23 !Core's sync counter |
| 1756 | #endif |
| 1757 | st %r10, [%r23] !lock sync_thr_counter4 |
| 1758 | add %r23, 64, %r23 |
| 1759 | st %r10, [%r23] !lock sync_thr_counter5 |
| 1760 | add %r23, 64, %r23 |
| 1761 | st %r10, [%r23] !lock sync_thr_counter6 |
| 1762 | init_start: |
| 1763 | ta T_CHANGE_NONHPRIV |
| 1764 | umul %r9, 256, %r31 |
| 1765 | setx user_data_start, %r1, %r3 |
| 1766 | add %r31, %r3, %r31 |
| 1767 | wr %r0, 0x4, %asi |
| 1768 | |
| 1769 | !Initializing integer registers |
| 1770 | ldx [%r31+0], %r0 |
| 1771 | ldx [%r31+8], %r1 |
| 1772 | ldx [%r31+16], %r2 |
| 1773 | ldx [%r31+24], %r3 |
| 1774 | ldx [%r31+32], %r4 |
| 1775 | ldx [%r31+40], %r5 |
| 1776 | ldx [%r31+48], %r6 |
| 1777 | ldx [%r31+56], %r7 |
| 1778 | ldx [%r31+64], %r8 |
| 1779 | ldx [%r31+72], %r9 |
| 1780 | ldx [%r31+80], %r10 |
| 1781 | ldx [%r31+88], %r11 |
| 1782 | ldx [%r31+96], %r12 |
| 1783 | ldx [%r31+104], %r13 |
| 1784 | ldx [%r31+112], %r14 |
| 1785 | mov %r31, %r15 |
| 1786 | ldx [%r31+128], %r16 |
| 1787 | ldx [%r31+136], %r17 |
| 1788 | ldx [%r31+144], %r18 |
| 1789 | ldx [%r31+152], %r19 |
| 1790 | ldx [%r31+160], %r20 |
| 1791 | ldx [%r31+168], %r21 |
| 1792 | ldx [%r31+176], %r22 |
| 1793 | ldx [%r31+184], %r23 |
| 1794 | ldx [%r31+192], %r24 |
| 1795 | ldx [%r31+200], %r25 |
| 1796 | ldx [%r31+208], %r26 |
| 1797 | ldx [%r31+216], %r27 |
| 1798 | ldx [%r31+224], %r28 |
| 1799 | ldx [%r31+232], %r29 |
| 1800 | mov 0xb1, %r14 |
| 1801 | mov 0xb0, %r30 |
| 1802 | save %r31, %r0, %r31 |
| 1803 | ldx [%r31+0], %r0 |
| 1804 | ldx [%r31+8], %r1 |
| 1805 | ldx [%r31+16], %r2 |
| 1806 | ldx [%r31+24], %r3 |
| 1807 | ldx [%r31+32], %r4 |
| 1808 | ldx [%r31+40], %r5 |
| 1809 | ldx [%r31+48], %r6 |
| 1810 | ldx [%r31+56], %r7 |
| 1811 | ldx [%r31+64], %r8 |
| 1812 | ldx [%r31+72], %r9 |
| 1813 | ldx [%r31+80], %r10 |
| 1814 | ldx [%r31+88], %r11 |
| 1815 | ldx [%r31+96], %r12 |
| 1816 | ldx [%r31+104], %r13 |
| 1817 | ldx [%r31+112], %r14 |
| 1818 | mov %r31, %r15 |
| 1819 | ldx [%r31+128], %r16 |
| 1820 | ldx [%r31+136], %r17 |
| 1821 | ldx [%r31+144], %r18 |
| 1822 | ldx [%r31+152], %r19 |
| 1823 | ldx [%r31+160], %r20 |
| 1824 | ldx [%r31+168], %r21 |
| 1825 | ldx [%r31+176], %r22 |
| 1826 | ldx [%r31+184], %r23 |
| 1827 | ldx [%r31+192], %r24 |
| 1828 | ldx [%r31+200], %r25 |
| 1829 | ldx [%r31+208], %r26 |
| 1830 | ldx [%r31+216], %r27 |
| 1831 | ldx [%r31+224], %r28 |
| 1832 | ldx [%r31+232], %r29 |
| 1833 | mov 0x35, %r14 |
| 1834 | mov 0x31, %r30 |
| 1835 | save %r31, %r0, %r31 |
| 1836 | ldx [%r31+0], %r0 |
| 1837 | ldx [%r31+8], %r1 |
| 1838 | ldx [%r31+16], %r2 |
| 1839 | ldx [%r31+24], %r3 |
| 1840 | ldx [%r31+32], %r4 |
| 1841 | ldx [%r31+40], %r5 |
| 1842 | ldx [%r31+48], %r6 |
| 1843 | ldx [%r31+56], %r7 |
| 1844 | ldx [%r31+64], %r8 |
| 1845 | ldx [%r31+72], %r9 |
| 1846 | ldx [%r31+80], %r10 |
| 1847 | ldx [%r31+88], %r11 |
| 1848 | ldx [%r31+96], %r12 |
| 1849 | ldx [%r31+104], %r13 |
| 1850 | ldx [%r31+112], %r14 |
| 1851 | mov %r31, %r15 |
| 1852 | ldx [%r31+128], %r16 |
| 1853 | ldx [%r31+136], %r17 |
| 1854 | ldx [%r31+144], %r18 |
| 1855 | ldx [%r31+152], %r19 |
| 1856 | ldx [%r31+160], %r20 |
| 1857 | ldx [%r31+168], %r21 |
| 1858 | ldx [%r31+176], %r22 |
| 1859 | ldx [%r31+184], %r23 |
| 1860 | ldx [%r31+192], %r24 |
| 1861 | ldx [%r31+200], %r25 |
| 1862 | ldx [%r31+208], %r26 |
| 1863 | ldx [%r31+216], %r27 |
| 1864 | ldx [%r31+224], %r28 |
| 1865 | ldx [%r31+232], %r29 |
| 1866 | mov 0x33, %r14 |
| 1867 | mov 0xb2, %r30 |
| 1868 | save %r31, %r0, %r31 |
| 1869 | ldx [%r31+0], %r0 |
| 1870 | ldx [%r31+8], %r1 |
| 1871 | ldx [%r31+16], %r2 |
| 1872 | ldx [%r31+24], %r3 |
| 1873 | ldx [%r31+32], %r4 |
| 1874 | ldx [%r31+40], %r5 |
| 1875 | ldx [%r31+48], %r6 |
| 1876 | ldx [%r31+56], %r7 |
| 1877 | ldx [%r31+64], %r8 |
| 1878 | ldx [%r31+72], %r9 |
| 1879 | ldx [%r31+80], %r10 |
| 1880 | ldx [%r31+88], %r11 |
| 1881 | ldx [%r31+96], %r12 |
| 1882 | ldx [%r31+104], %r13 |
| 1883 | ldx [%r31+112], %r14 |
| 1884 | mov %r31, %r15 |
| 1885 | ldx [%r31+128], %r16 |
| 1886 | ldx [%r31+136], %r17 |
| 1887 | ldx [%r31+144], %r18 |
| 1888 | ldx [%r31+152], %r19 |
| 1889 | ldx [%r31+160], %r20 |
| 1890 | ldx [%r31+168], %r21 |
| 1891 | ldx [%r31+176], %r22 |
| 1892 | ldx [%r31+184], %r23 |
| 1893 | ldx [%r31+192], %r24 |
| 1894 | ldx [%r31+200], %r25 |
| 1895 | ldx [%r31+208], %r26 |
| 1896 | ldx [%r31+216], %r27 |
| 1897 | ldx [%r31+224], %r28 |
| 1898 | ldx [%r31+232], %r29 |
| 1899 | mov 0x33, %r14 |
| 1900 | mov 0x34, %r30 |
| 1901 | save %r31, %r0, %r31 |
| 1902 | ldx [%r31+0], %r0 |
| 1903 | ldx [%r31+8], %r1 |
| 1904 | ldx [%r31+16], %r2 |
| 1905 | ldx [%r31+24], %r3 |
| 1906 | ldx [%r31+32], %r4 |
| 1907 | ldx [%r31+40], %r5 |
| 1908 | ldx [%r31+48], %r6 |
| 1909 | ldx [%r31+56], %r7 |
| 1910 | ldx [%r31+64], %r8 |
| 1911 | ldx [%r31+72], %r9 |
| 1912 | ldx [%r31+80], %r10 |
| 1913 | ldx [%r31+88], %r11 |
| 1914 | ldx [%r31+96], %r12 |
| 1915 | ldx [%r31+104], %r13 |
| 1916 | ldx [%r31+112], %r14 |
| 1917 | mov %r31, %r15 |
| 1918 | ldx [%r31+128], %r16 |
| 1919 | ldx [%r31+136], %r17 |
| 1920 | ldx [%r31+144], %r18 |
| 1921 | ldx [%r31+152], %r19 |
| 1922 | ldx [%r31+160], %r20 |
| 1923 | ldx [%r31+168], %r21 |
| 1924 | ldx [%r31+176], %r22 |
| 1925 | ldx [%r31+184], %r23 |
| 1926 | ldx [%r31+192], %r24 |
| 1927 | ldx [%r31+200], %r25 |
| 1928 | ldx [%r31+208], %r26 |
| 1929 | ldx [%r31+216], %r27 |
| 1930 | ldx [%r31+224], %r28 |
| 1931 | ldx [%r31+232], %r29 |
| 1932 | mov 0xb1, %r14 |
| 1933 | mov 0xb0, %r30 |
| 1934 | save %r31, %r0, %r31 |
| 1935 | ldx [%r31+0], %r0 |
| 1936 | ldx [%r31+8], %r1 |
| 1937 | ldx [%r31+16], %r2 |
| 1938 | ldx [%r31+24], %r3 |
| 1939 | ldx [%r31+32], %r4 |
| 1940 | ldx [%r31+40], %r5 |
| 1941 | ldx [%r31+48], %r6 |
| 1942 | ldx [%r31+56], %r7 |
| 1943 | ldx [%r31+64], %r8 |
| 1944 | ldx [%r31+72], %r9 |
| 1945 | ldx [%r31+80], %r10 |
| 1946 | ldx [%r31+88], %r11 |
| 1947 | ldx [%r31+96], %r12 |
| 1948 | ldx [%r31+104], %r13 |
| 1949 | ldx [%r31+112], %r14 |
| 1950 | mov %r31, %r15 |
| 1951 | ldx [%r31+128], %r16 |
| 1952 | ldx [%r31+136], %r17 |
| 1953 | ldx [%r31+144], %r18 |
| 1954 | ldx [%r31+152], %r19 |
| 1955 | ldx [%r31+160], %r20 |
| 1956 | ldx [%r31+168], %r21 |
| 1957 | ldx [%r31+176], %r22 |
| 1958 | ldx [%r31+184], %r23 |
| 1959 | ldx [%r31+192], %r24 |
| 1960 | ldx [%r31+200], %r25 |
| 1961 | ldx [%r31+208], %r26 |
| 1962 | ldx [%r31+216], %r27 |
| 1963 | ldx [%r31+224], %r28 |
| 1964 | ldx [%r31+232], %r29 |
| 1965 | mov 0x35, %r14 |
| 1966 | mov 0xb3, %r30 |
| 1967 | save %r31, %r0, %r31 |
| 1968 | ldx [%r31+0], %r0 |
| 1969 | ldx [%r31+8], %r1 |
| 1970 | ldx [%r31+16], %r2 |
| 1971 | ldx [%r31+24], %r3 |
| 1972 | ldx [%r31+32], %r4 |
| 1973 | ldx [%r31+40], %r5 |
| 1974 | ldx [%r31+48], %r6 |
| 1975 | ldx [%r31+56], %r7 |
| 1976 | ldx [%r31+64], %r8 |
| 1977 | ldx [%r31+72], %r9 |
| 1978 | ldx [%r31+80], %r10 |
| 1979 | ldx [%r31+88], %r11 |
| 1980 | ldx [%r31+96], %r12 |
| 1981 | ldx [%r31+104], %r13 |
| 1982 | ldx [%r31+112], %r14 |
| 1983 | mov %r31, %r15 |
| 1984 | ldx [%r31+128], %r16 |
| 1985 | ldx [%r31+136], %r17 |
| 1986 | ldx [%r31+144], %r18 |
| 1987 | ldx [%r31+152], %r19 |
| 1988 | ldx [%r31+160], %r20 |
| 1989 | ldx [%r31+168], %r21 |
| 1990 | ldx [%r31+176], %r22 |
| 1991 | ldx [%r31+184], %r23 |
| 1992 | ldx [%r31+192], %r24 |
| 1993 | ldx [%r31+200], %r25 |
| 1994 | ldx [%r31+208], %r26 |
| 1995 | ldx [%r31+216], %r27 |
| 1996 | ldx [%r31+224], %r28 |
| 1997 | ldx [%r31+232], %r29 |
| 1998 | mov 0x33, %r14 |
| 1999 | mov 0xb4, %r30 |
| 2000 | save %r31, %r0, %r31 |
| 2001 | restore |
| 2002 | restore |
| 2003 | restore |
| 2004 | !Initializing float registers |
| 2005 | ldd [%r31+0], %f0 |
| 2006 | ldd [%r31+16], %f2 |
| 2007 | ldd [%r31+32], %f4 |
| 2008 | ldd [%r31+48], %f6 |
| 2009 | ldd [%r31+64], %f8 |
| 2010 | ldd [%r31+80], %f10 |
| 2011 | ldd [%r31+96], %f12 |
| 2012 | ldd [%r31+112], %f14 |
| 2013 | ldd [%r31+128], %f16 |
| 2014 | ldd [%r31+144], %f18 |
| 2015 | ldd [%r31+160], %f20 |
| 2016 | ldd [%r31+176], %f22 |
| 2017 | ldd [%r31+192], %f24 |
| 2018 | ldd [%r31+208], %f26 |
| 2019 | ldd [%r31+224], %f28 |
| 2020 | ldd [%r31+240], %f30 |
| 2021 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. |
| 2022 | ta T_CHANGE_HPRIV |
| 2023 | setx diag_finish, %r29, %r28 |
| 2024 | add %r28, 4, %r29 |
| 2025 | wrpr %g0, 1, %tl |
| 2026 | wrpr %r28, %tpc |
| 2027 | wrpr %r29, %tnpc |
| 2028 | wrpr %g0, 2, %tl |
| 2029 | wrpr %r28, %tpc |
| 2030 | wrpr %r29, %tnpc |
| 2031 | wrpr %g0, 3, %tl |
| 2032 | wrpr %r28, %tpc |
| 2033 | wrpr %r29, %tnpc |
| 2034 | wrpr %g0, 4, %tl |
| 2035 | wrpr %r28, %tpc |
| 2036 | wrpr %r29, %tnpc |
| 2037 | wrpr %g0, 5, %tl |
| 2038 | wrpr %r28, %tpc |
| 2039 | wrpr %r29, %tnpc |
| 2040 | wrpr %g0, 6, %tl |
| 2041 | wrpr %r28, %tpc |
| 2042 | wrpr %r29, %tnpc |
| 2043 | wrpr %g0, 0, %tl |
| 2044 | |
| 2045 | !Initializing Tick Cmprs |
| 2046 | mov 1, %g2 |
| 2047 | sllx %g2, 63, %g2 |
| 2048 | or %g1, %g2, %g1 |
| 2049 | wrhpr %g1, %g0, %hsys_tick_cmpr |
| 2050 | wr %g1, %g0, %tick_cmpr |
| 2051 | wr %g1, %g0, %sys_tick_cmpr |
| 2052 | |
| 2053 | ! Set up fpr PMU traps |
| 2054 | set 0x1ff8bfff, %g2 |
| 2055 | b fork_threads |
| 2056 | wr %g2, %g0, %pcr |
| 2057 | |
| 2058 | common_target: |
| 2059 | nop |
| 2060 | sub %r27, 8, %r27 |
| 2061 | and %r27, 8, %r12 |
| 2062 | brz,a %r12, .+8 |
| 2063 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval |
| 2064 | jmp %r27 |
| 2065 | .word 0xc36ae483 ! 1: PREFETCH_I prefetch [%r11 + 0x0483], #one_read |
| 2066 | nop |
| 2067 | jmp %r27 |
| 2068 | nop |
| 2069 | fork_threads: |
| 2070 | ta %icc, T_RD_THID |
| 2071 | ! fork: source strm = 0xffffffff; target strm = 0x1 |
| 2072 | cmp %o1, 0 |
| 2073 | setx fork_lbl_0_1, %g2, %g3 |
| 2074 | be,a .+8 |
| 2075 | jmp %g3 |
| 2076 | nop |
| 2077 | ! fork: source strm = 0xffffffff; target strm = 0x2 |
| 2078 | cmp %o1, 1 |
| 2079 | setx fork_lbl_0_2, %g2, %g3 |
| 2080 | be,a .+8 |
| 2081 | jmp %g3 |
| 2082 | nop |
| 2083 | ! fork: source strm = 0xffffffff; target strm = 0x4 |
| 2084 | cmp %o1, 2 |
| 2085 | setx fork_lbl_0_3, %g2, %g3 |
| 2086 | be,a .+8 |
| 2087 | jmp %g3 |
| 2088 | nop |
| 2089 | ! fork: source strm = 0xffffffff; target strm = 0x8 |
| 2090 | cmp %o1, 3 |
| 2091 | setx fork_lbl_0_4, %g2, %g3 |
| 2092 | be,a .+8 |
| 2093 | jmp %g3 |
| 2094 | nop |
| 2095 | ! fork: source strm = 0xffffffff; target strm = 0x10 |
| 2096 | cmp %o1, 4 |
| 2097 | setx fork_lbl_0_5, %g2, %g3 |
| 2098 | be,a .+8 |
| 2099 | jmp %g3 |
| 2100 | nop |
| 2101 | ! fork: source strm = 0xffffffff; target strm = 0x20 |
| 2102 | cmp %o1, 5 |
| 2103 | setx fork_lbl_0_6, %g2, %g3 |
| 2104 | be,a .+8 |
| 2105 | jmp %g3 |
| 2106 | nop |
| 2107 | ! fork: source strm = 0xffffffff; target strm = 0x40 |
| 2108 | cmp %o1, 6 |
| 2109 | setx fork_lbl_0_7, %g2, %g3 |
| 2110 | be,a .+8 |
| 2111 | jmp %g3 |
| 2112 | nop |
| 2113 | ! fork: source strm = 0xffffffff; target strm = 0x80 |
| 2114 | cmp %o1, 7 |
| 2115 | setx fork_lbl_0_8, %g2, %g3 |
| 2116 | be,a .+8 |
| 2117 | jmp %g3 |
| 2118 | nop |
| 2119 | setx join_lbl_0_0, %g1, %g2 |
| 2120 | jmp %g2 |
| 2121 | nop |
| 2122 | setx join_lbl_0_0, %g1, %g2 |
| 2123 | jmp %g2 |
| 2124 | nop |
| 2125 | fork_lbl_0_8: |
| 2126 | ta T_CHANGE_NONHPRIV |
| 2127 | br_longdelay1_80_0: |
| 2128 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> |
| 2129 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 2130 | brlez,pt %r4, skip_80_1 |
| 2131 | fbn,a,pn %fcc0, skip_80_1 |
| 2132 | .align 1024 |
| 2133 | skip_80_1: |
| 2134 | .word 0xe63fc000 ! 2: STD_R std %r19, [%r31 + %r0] |
| 2135 | nop |
| 2136 | ta T_CHANGE_HPRIV |
| 2137 | mov 0x80, %r10 |
| 2138 | set sync_thr_counter6, %r23 |
| 2139 | #ifndef SPC |
| 2140 | ldxa [%g0]0x63, %o1 |
| 2141 | and %o1, 0x38, %o1 |
| 2142 | add %o1, %r23, %r23 |
| 2143 | #endif |
| 2144 | cas [%r23],%g0,%r10 !lock |
| 2145 | brnz %r10, sma_80_2 |
| 2146 | rd %asi, %r12 |
| 2147 | wr %g0, 0x40, %asi |
| 2148 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2149 | set 0x001a1fff, %g1 |
| 2150 | stxa %g1, [%g0 + 0x80] %asi |
| 2151 | wr %r12, %g0, %asi |
| 2152 | st %g0, [%r23] |
| 2153 | sma_80_2: |
| 2154 | ta T_CHANGE_NONHPRIV |
| 2155 | .word 0xe7e7e012 ! 3: CASA_R casa [%r31] %asi, %r18, %r19 |
| 2156 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 2157 | reduce_priv_lvl_80_3: |
| 2158 | ta T_CHANGE_NONHPRIV ! macro |
| 2159 | splash_decr_80_4: |
| 2160 | nop |
| 2161 | ta T_CHANGE_HPRIV |
| 2162 | mov 8, %r1 |
| 2163 | stxa %r8, [%r1] 0x45 |
| 2164 | .word 0xa781c003 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r7, %r3, %- |
| 2165 | .word 0x87a9cad3 ! 6: FCMPEd fcmped %fcc<n>, %f38, %f50 |
| 2166 | vahole_80_5: |
| 2167 | nop |
| 2168 | ta T_CHANGE_NONHPRIV |
| 2169 | setx vahole_target1, %r18, %r27 |
| 2170 | jmpl %r27+0, %r27 |
| 2171 | .word 0xe7e7e008 ! 7: CASA_R casa [%r31] %asi, %r8, %r19 |
| 2172 | memptr_80_6: |
| 2173 | set user_data_start, %r31 |
| 2174 | .word 0x858469a4 ! 8: WRCCR_I wr %r17, 0x09a4, %ccr |
| 2175 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 2176 | ceter_80_7: |
| 2177 | nop |
| 2178 | ta T_CHANGE_HPRIV |
| 2179 | mov 6, %r17 |
| 2180 | sllx %r17, 60, %r17 |
| 2181 | mov 0x18, %r16 |
| 2182 | stxa %r17, [%r16]0x4c |
| 2183 | .word 0x93410000 ! 10: RDTICK rd %tick, %r9 |
| 2184 | splash_lsu_80_8: |
| 2185 | nop |
| 2186 | ta T_CHANGE_HPRIV |
| 2187 | set 0x0122d3c9, %r2 |
| 2188 | mov 0x6, %r1 |
| 2189 | sllx %r1, 32, %r1 |
| 2190 | or %r1, %r2, %r2 |
| 2191 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 2192 | ta T_CHANGE_NONHPRIV |
| 2193 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 2194 | brcommon1_80_9: |
| 2195 | nop |
| 2196 | setx common_target, %r12, %r27 |
| 2197 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2198 | ba,a .+12 |
| 2199 | .word 0xd06fe1e0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01e0] |
| 2200 | ba,a .+8 |
| 2201 | jmpl %r27+0, %r27 |
| 2202 | .word 0xa5a4c9a9 ! 12: FDIVs fdivs %f19, %f9, %f18 |
| 2203 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 2204 | pmu_80_10: |
| 2205 | nop |
| 2206 | setx 0xfffff4adfffff15b, %g1, %g7 |
| 2207 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2208 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 2209 | pmu_80_11: |
| 2210 | nop |
| 2211 | ta T_CHANGE_PRIV |
| 2212 | setx 0xfffff777fffff177, %g1, %g7 |
| 2213 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2214 | ibp_80_12: |
| 2215 | nop |
| 2216 | .word 0xe1bfe080 ! 17: STDFA_I stda %f16, [0x0080, %r31] |
| 2217 | ibp_80_13: |
| 2218 | nop |
| 2219 | .word 0xc1bfdf20 ! 18: STDFA_R stda %f0, [%r0, %r31] |
| 2220 | .word 0xd65fe1a0 ! 19: LDX_I ldx [%r31 + 0x01a0], %r11 |
| 2221 | .word 0xd727e175 ! 20: STF_I st %f11, [0x0175, %r31] |
| 2222 | .word 0x81580000 ! 21: FLUSHW flushw |
| 2223 | #if (defined SPC || defined CMP) |
| 2224 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_14) + 8, 16, 16)) -> intp(2,0,27) |
| 2225 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_14)&0xffffffff) + 8, 16, 16)) -> intp(2,0,27) |
| 2226 | #else |
| 2227 | setx 0x588eae60029e8a94, %r1, %r28 |
| 2228 | stxa %r28, [%g0] 0x73 |
| 2229 | #endif |
| 2230 | intvec_80_14: |
| 2231 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2232 | donret_80_15: |
| 2233 | nop |
| 2234 | ta T_CHANGE_HPRIV ! macro |
| 2235 | rd %pc, %r12 |
| 2236 | add %r12, (donretarg_80_15-donret_80_15-4), %r12 |
| 2237 | mov 0x38, %r18 |
| 2238 | stxa %r12, [%r18]0x58 |
| 2239 | add %r12, 0x4, %r11 |
| 2240 | wrpr %g0, 0x2, %tl |
| 2241 | wrpr %g0, %r12, %tpc |
| 2242 | wrpr %g0, %r11, %tnpc |
| 2243 | set (0x00ba549d | (0x8a << 24)), %r13 |
| 2244 | rdpr %tstate, %r16 |
| 2245 | mov 0x1f, %r19 |
| 2246 | and %r19, %r16, %r17 |
| 2247 | andn %r16, %r19, %r16 |
| 2248 | or %r16, %r17, %r20 |
| 2249 | wrpr %r20, %g0, %tstate |
| 2250 | wrhpr %g0, 0x1d06, %htstate |
| 2251 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2252 | done |
| 2253 | donretarg_80_15: |
| 2254 | .word 0xd6ffe014 ! 23: SWAPA_I swapa %r11, [%r31 + 0x0014] %asi |
| 2255 | set 0x346b, %l3 |
| 2256 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 2257 | .word 0xa9b147c9 ! 24: PDIST pdistn %d36, %d40, %d20 |
| 2258 | .word 0xc1bfde00 ! 25: STDFA_R stda %f0, [%r0, %r31] |
| 2259 | pmu_80_16: |
| 2260 | nop |
| 2261 | ta T_CHANGE_PRIV |
| 2262 | setx 0xfffffe0dfffff203, %g1, %g7 |
| 2263 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2264 | vahole_80_17: |
| 2265 | nop |
| 2266 | ta T_CHANGE_NONHPRIV |
| 2267 | setx vahole_target1, %r18, %r27 |
| 2268 | jmpl %r27+0, %r27 |
| 2269 | .word 0xd09fc033 ! 27: LDDA_R ldda [%r31, %r19] 0x01, %r8 |
| 2270 | #if (defined SPC || defined CMP) |
| 2271 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_18)+40, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2272 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_18)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2273 | #else |
| 2274 | !! TODO:Generate XIR via RESET_GEN register |
| 2275 | ! setx 0x8900000808, %r16, %r17 |
| 2276 | ! mov 0x2, %r16 |
| 2277 | ! stw %r16, [%r17] |
| 2278 | #endif |
| 2279 | xir_80_18: |
| 2280 | .word 0xa9832e1c ! 28: WR_SET_SOFTINT_I wr %r12, 0x0e1c, %set_softint |
| 2281 | .word 0x95a0016c ! 29: FABSq dis not found |
| 2282 | |
| 2283 | donret_80_20: |
| 2284 | nop |
| 2285 | ta T_CHANGE_HPRIV ! macro |
| 2286 | rd %pc, %r12 |
| 2287 | add %r12, (donretarg_80_20-donret_80_20-8), %r12 |
| 2288 | mov 0x38, %r18 |
| 2289 | stxa %r12, [%r18]0x58 |
| 2290 | add %r12, 0x4, %r11 |
| 2291 | wrpr %g0, 0x2, %tl |
| 2292 | wrpr %g0, %r12, %tpc |
| 2293 | wrpr %g0, %r11, %tnpc |
| 2294 | set (0x00727e4d | (0x88 << 24)), %r13 |
| 2295 | rdpr %tstate, %r16 |
| 2296 | mov 0x1f, %r19 |
| 2297 | and %r19, %r16, %r17 |
| 2298 | andn %r16, %r19, %r16 |
| 2299 | or %r16, %r17, %r20 |
| 2300 | wrpr %r20, %g0, %tstate |
| 2301 | wrhpr %g0, 0x1f9e, %htstate |
| 2302 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 2303 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 2304 | retry |
| 2305 | donretarg_80_20: |
| 2306 | .word 0xe2ffe044 ! 30: SWAPA_I swapa %r17, [%r31 + 0x0044] %asi |
| 2307 | splash_decr_80_21: |
| 2308 | nop |
| 2309 | ta T_CHANGE_HPRIV |
| 2310 | mov 8, %r1 |
| 2311 | stxa %r8, [%r1] 0x45 |
| 2312 | .word 0xa7844004 ! 31: WR_GRAPHICS_STATUS_REG_R wr %r17, %r4, %- |
| 2313 | #if (defined SPC || defined CMP) |
| 2314 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_22) + 48, 16, 16)) -> intp(4,0,31) |
| 2315 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_22)&0xffffffff) + 48, 16, 16)) -> intp(4,0,31) |
| 2316 | #else |
| 2317 | setx 0x7e4feb95e345bbe5, %r1, %r28 |
| 2318 | stxa %r28, [%g0] 0x73 |
| 2319 | #endif |
| 2320 | intvec_80_22: |
| 2321 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2322 | memptr_80_23: |
| 2323 | set 0x60340000, %r31 |
| 2324 | .word 0x8582feba ! 33: WRCCR_I wr %r11, 0x1eba, %ccr |
| 2325 | unsupttte_80_24: |
| 2326 | nop |
| 2327 | ta T_CHANGE_HPRIV |
| 2328 | mov 1, %r20 |
| 2329 | sllx %r20, 63, %r20 |
| 2330 | or %r20, 2,%r20 |
| 2331 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 2332 | ta T_CHANGE_NONHPRIV |
| 2333 | .word 0xa3b1c483 ! 34: FCMPLE32 fcmple32 %d38, %d34, %r17 |
| 2334 | brcommon3_80_25: |
| 2335 | nop |
| 2336 | setx common_target, %r12, %r27 |
| 2337 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2338 | ba,a .+12 |
| 2339 | .word 0xd3e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r9 |
| 2340 | ba,a .+8 |
| 2341 | jmpl %r27+0, %r27 |
| 2342 | .word 0xd2dfc02c ! 35: LDXA_R ldxa [%r31, %r12] 0x01, %r9 |
| 2343 | jmptr_80_26: |
| 2344 | nop |
| 2345 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2346 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 2347 | splash_cmpr_80_27: |
| 2348 | mov 1, %r18 |
| 2349 | sllx %r18, 63, %r18 |
| 2350 | rd %tick, %r17 |
| 2351 | add %r17, 0x70, %r17 |
| 2352 | or %r17, %r18, %r17 |
| 2353 | ta T_CHANGE_PRIV |
| 2354 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2355 | splash_cmpr_80_28: |
| 2356 | mov 0, %r18 |
| 2357 | sllx %r18, 63, %r18 |
| 2358 | rd %tick, %r17 |
| 2359 | add %r17, 0x80, %r17 |
| 2360 | or %r17, %r18, %r17 |
| 2361 | ta T_CHANGE_PRIV |
| 2362 | .word 0xaf800011 ! 38: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2363 | mondo_80_29: |
| 2364 | nop |
| 2365 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2366 | ta T_CHANGE_PRIV |
| 2367 | stxa %r9, [%r0+0x3c0] %asi |
| 2368 | .word 0x9d904012 ! 39: WRPR_WSTATE_R wrpr %r1, %r18, %wstate |
| 2369 | brcommon3_80_30: |
| 2370 | nop |
| 2371 | setx common_target, %r12, %r27 |
| 2372 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2373 | ba,a .+12 |
| 2374 | .word 0xd26fe120 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0120] |
| 2375 | ba,a .+8 |
| 2376 | jmpl %r27+0, %r27 |
| 2377 | .word 0xd31fe190 ! 40: LDDF_I ldd [%r31, 0x0190], %f9 |
| 2378 | .word 0xd2dfe010 ! 41: LDXA_I ldxa [%r31, + 0x0010] %asi, %r9 |
| 2379 | .word 0xd327e0c5 ! 42: STF_I st %f9, [0x00c5, %r31] |
| 2380 | setx 0xb2bdae1c5098a388, %r1, %r28 |
| 2381 | stxa %r28, [%g0] 0x73 |
| 2382 | intvec_80_31: |
| 2383 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2384 | mondo_80_32: |
| 2385 | nop |
| 2386 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2387 | stxa %r8, [%r0+0x3c0] %asi |
| 2388 | .word 0x9d928008 ! 44: WRPR_WSTATE_R wrpr %r10, %r8, %wstate |
| 2389 | ceter_80_33: |
| 2390 | nop |
| 2391 | ta T_CHANGE_HPRIV |
| 2392 | mov 7, %r17 |
| 2393 | sllx %r17, 60, %r17 |
| 2394 | mov 0x18, %r16 |
| 2395 | stxa %r17, [%r16]0x4c |
| 2396 | ta T_CHANGE_NONHPRIV |
| 2397 | .word 0xa9410000 ! 45: RDTICK rd %tick, %r20 |
| 2398 | .word 0x9194400b ! 46: WRPR_PIL_R wrpr %r17, %r11, %pil |
| 2399 | splash_tba_80_35: |
| 2400 | ta T_CHANGE_PRIV |
| 2401 | setx 0x00000000003a0000, %r11, %r12 |
| 2402 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2403 | mondo_80_36: |
| 2404 | nop |
| 2405 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2406 | ta T_CHANGE_PRIV |
| 2407 | stxa %r18, [%r0+0x3e0] %asi |
| 2408 | .word 0x9d908007 ! 48: WRPR_WSTATE_R wrpr %r2, %r7, %wstate |
| 2409 | .word 0xe31fc00b ! 1: LDDF_R ldd [%r31, %r11], %f17 |
| 2410 | .word 0x9f803207 ! 49: SIR sir 0x1207 |
| 2411 | br_longdelay2_80_37: |
| 2412 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 2413 | .word 0x87afca53 ! 50: FCMPd fcmpd %fcc<n>, %f62, %f50 |
| 2414 | splash_cmpr_80_38: |
| 2415 | mov 0, %r18 |
| 2416 | sllx %r18, 63, %r18 |
| 2417 | rd %tick, %r17 |
| 2418 | add %r17, 0x60, %r17 |
| 2419 | or %r17, %r18, %r17 |
| 2420 | ta T_CHANGE_PRIV |
| 2421 | .word 0xb3800011 ! 51: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2422 | nop |
| 2423 | ta T_CHANGE_HPRIV |
| 2424 | mov 0x80, %r10 |
| 2425 | set sync_thr_counter6, %r23 |
| 2426 | #ifndef SPC |
| 2427 | ldxa [%g0]0x63, %o1 |
| 2428 | and %o1, 0x38, %o1 |
| 2429 | add %o1, %r23, %r23 |
| 2430 | #endif |
| 2431 | cas [%r23],%g0,%r10 !lock |
| 2432 | brnz %r10, sma_80_39 |
| 2433 | rd %asi, %r12 |
| 2434 | wr %g0, 0x40, %asi |
| 2435 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2436 | set 0x00021fff, %g1 |
| 2437 | stxa %g1, [%g0 + 0x80] %asi |
| 2438 | wr %r12, %g0, %asi |
| 2439 | st %g0, [%r23] |
| 2440 | sma_80_39: |
| 2441 | ta T_CHANGE_NONHPRIV |
| 2442 | .word 0xe3e7e010 ! 52: CASA_R casa [%r31] %asi, %r16, %r17 |
| 2443 | #if (defined SPC || defined CMP) |
| 2444 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_40)+56, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2445 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_40)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2446 | #else |
| 2447 | !! TODO:Generate XIR via RESET_GEN register |
| 2448 | ! setx 0x8900000808, %r16, %r17 |
| 2449 | ! mov 0x2, %r16 |
| 2450 | ! stw %r16, [%r17] |
| 2451 | #endif |
| 2452 | xir_80_40: |
| 2453 | .word 0xa985374b ! 53: WR_SET_SOFTINT_I wr %r20, 0x174b, %set_softint |
| 2454 | jmptr_80_41: |
| 2455 | nop |
| 2456 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2457 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 2458 | donret_80_42: |
| 2459 | nop |
| 2460 | ta T_CHANGE_HPRIV ! macro |
| 2461 | rd %pc, %r12 |
| 2462 | add %r12, (donretarg_80_42-donret_80_42-8), %r12 |
| 2463 | mov 0x38, %r18 |
| 2464 | stxa %r12, [%r18]0x58 |
| 2465 | add %r12, 0x4, %r11 |
| 2466 | wrpr %g0, 0x2, %tl |
| 2467 | wrpr %g0, %r12, %tpc |
| 2468 | wrpr %g0, %r11, %tnpc |
| 2469 | set (0x00d10aab | (16 << 24)), %r13 |
| 2470 | rdpr %tstate, %r16 |
| 2471 | mov 0x1f, %r19 |
| 2472 | and %r19, %r16, %r17 |
| 2473 | andn %r16, %r19, %r16 |
| 2474 | or %r16, %r17, %r20 |
| 2475 | wrpr %r20, %g0, %tstate |
| 2476 | wrhpr %g0, 0x1c85, %htstate |
| 2477 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2478 | retry |
| 2479 | donretarg_80_42: |
| 2480 | .word 0xe26fe18c ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x018c] |
| 2481 | nop |
| 2482 | ta T_CHANGE_HPRIV |
| 2483 | mov 0x80+1, %r10 |
| 2484 | set sync_thr_counter5, %r23 |
| 2485 | #ifndef SPC |
| 2486 | ldxa [%g0]0x63, %o1 |
| 2487 | and %o1, 0x38, %o1 |
| 2488 | add %o1, %r23, %r23 |
| 2489 | sllx %o1, 5, %o3 !(CID*256) |
| 2490 | #endif |
| 2491 | cas [%r23],%g0,%r10 !lock |
| 2492 | brnz %r10, cwq_80_43 |
| 2493 | rd %asi, %r12 |
| 2494 | wr %g0, 0x40, %asi |
| 2495 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2496 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2497 | cmp %l1, 1 |
| 2498 | bne cwq_80_43 |
| 2499 | set CWQ_BASE, %l6 |
| 2500 | #ifndef SPC |
| 2501 | add %l6, %o3, %l6 |
| 2502 | #endif |
| 2503 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2504 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 2505 | sllx %l2, 32, %l2 |
| 2506 | stx %l2, [%l6 + 0x0] |
| 2507 | membar #Sync |
| 2508 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2509 | sub %l2, 0x40, %l2 |
| 2510 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2511 | wr %r12, %g0, %asi |
| 2512 | st %g0, [%r23] |
| 2513 | cwq_80_43: |
| 2514 | ta T_CHANGE_NONHPRIV |
| 2515 | .word 0xa3414000 ! 56: RDPC rd %pc, %r17 |
| 2516 | splash_hpstate_80_44: |
| 2517 | .word 0x81982d07 ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x0d07, %hpstate |
| 2518 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 2519 | .word 0x8d9023b5 ! 58: WRPR_PSTATE_I wrpr %r0, 0x03b5, %pstate |
| 2520 | mondo_80_46: |
| 2521 | nop |
| 2522 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2523 | ta T_CHANGE_PRIV |
| 2524 | stxa %r8, [%r0+0x3d0] %asi |
| 2525 | .word 0x9d940010 ! 59: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 2526 | mondo_80_47: |
| 2527 | nop |
| 2528 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2529 | ta T_CHANGE_PRIV |
| 2530 | stxa %r2, [%r0+0x3e0] %asi |
| 2531 | .word 0x9d918012 ! 60: WRPR_WSTATE_R wrpr %r6, %r18, %wstate |
| 2532 | splash_hpstate_80_48: |
| 2533 | ta T_CHANGE_NONHPRIV |
| 2534 | .word 0x819836fe ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x16fe, %hpstate |
| 2535 | .word 0xd31fe078 ! 62: LDDF_I ldd [%r31, 0x0078], %f9 |
| 2536 | vahole_80_49: |
| 2537 | nop |
| 2538 | ta T_CHANGE_NONHPRIV |
| 2539 | setx vahole_target2, %r18, %r27 |
| 2540 | jmpl %r27+0, %r27 |
| 2541 | .word 0xe19fe060 ! 63: LDDFA_I ldda [%r31, 0x0060], %f16 |
| 2542 | brcommon1_80_50: |
| 2543 | nop |
| 2544 | setx common_target, %r12, %r27 |
| 2545 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2546 | ba,a .+12 |
| 2547 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 2548 | ba,a .+8 |
| 2549 | jmpl %r27+0, %r27 |
| 2550 | .word 0xa7703900 ! 64: POPC_I popc 0x1900, %r19 |
| 2551 | splash_hpstate_80_51: |
| 2552 | ta T_CHANGE_NONHPRIV |
| 2553 | .word 0x81982fc5 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0fc5, %hpstate |
| 2554 | .word 0x8d903c42 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1c42, %pstate |
| 2555 | iaw_80_53: |
| 2556 | nop |
| 2557 | ta T_CHANGE_HPRIV |
| 2558 | mov 8, %r18 |
| 2559 | rd %asi, %r12 |
| 2560 | wr %r0, 0x41, %asi |
| 2561 | set sync_thr_counter4, %r23 |
| 2562 | #ifndef SPC |
| 2563 | ldxa [%g0]0x63, %r8 |
| 2564 | and %r8, 0x38, %r8 ! Core ID |
| 2565 | add %r8, %r23, %r23 |
| 2566 | #else |
| 2567 | mov 0, %r8 |
| 2568 | #endif |
| 2569 | mov 0x80, %r16 |
| 2570 | iaw_startwait80_53: |
| 2571 | cas [%r23],%g0,%r16 !lock |
| 2572 | brz,a %r16, continue_iaw_80_53 |
| 2573 | mov (~0x80&0xf0), %r16 |
| 2574 | ld [%r23], %r16 |
| 2575 | iaw_wait80_53: |
| 2576 | brnz %r16, iaw_wait80_53 |
| 2577 | ld [%r23], %r16 |
| 2578 | ba iaw_startwait80_53 |
| 2579 | mov 0x80, %r16 |
| 2580 | continue_iaw_80_53: |
| 2581 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2582 | ldxa [0x58]%asi, %r17 !Running_status |
| 2583 | wait_for_stat_80_53: |
| 2584 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2585 | cmp %r13, %r17 |
| 2586 | bne,a wait_for_stat_80_53 |
| 2587 | ldxa [0x58]%asi, %r17 !Running_status |
| 2588 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2589 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2590 | wait_for_iaw_80_53: |
| 2591 | ldxa [0x58]%asi, %r17 !Running_status |
| 2592 | cmp %r14, %r17 |
| 2593 | bne,a wait_for_iaw_80_53 |
| 2594 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2595 | iaw_doit80_53: |
| 2596 | mov 0x38, %r18 |
| 2597 | iaw3_80_53: |
| 2598 | setx vahole_target0, %r20, %r19 |
| 2599 | or %r19, 0x1, %r19 |
| 2600 | stxa %r19, [%r18]0x50 |
| 2601 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 2602 | st %g0, [%r23] !clear lock |
| 2603 | wr %r0, %r12, %asi ! restore %asi |
| 2604 | ta T_CHANGE_NONHPRIV |
| 2605 | .word 0xe1bfe020 ! 67: STDFA_I stda %f16, [0x0020, %r31] |
| 2606 | br_badelay1_80_54: |
| 2607 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 2608 | .word 0xd337e0f0 ! 1: STQF_I - %f9, [0x00f0, %r31] |
| 2609 | .word 0x93b7c4cc ! 1: FCMPNE32 fcmpne32 %d62, %d12, %r9 |
| 2610 | normalw |
| 2611 | .word 0x99458000 ! 68: RD_SOFTINT_REG rd %softint, %r12 |
| 2612 | .word 0xd82fe059 ! 69: STB_I stb %r12, [%r31 + 0x0059] |
| 2613 | donret_80_55: |
| 2614 | nop |
| 2615 | ta T_CHANGE_HPRIV ! macro |
| 2616 | rd %pc, %r12 |
| 2617 | add %r12, (donretarg_80_55-donret_80_55-4), %r12 |
| 2618 | mov 0x38, %r18 |
| 2619 | stxa %r12, [%r18]0x58 |
| 2620 | add %r12, 0x4, %r11 |
| 2621 | wrpr %g0, 0x2, %tl |
| 2622 | wrpr %g0, %r12, %tpc |
| 2623 | wrpr %g0, %r11, %tnpc |
| 2624 | set (0x003096e7 | (0x8a << 24)), %r13 |
| 2625 | rdpr %tstate, %r16 |
| 2626 | mov 0x1f, %r19 |
| 2627 | and %r19, %r16, %r17 |
| 2628 | andn %r16, %r19, %r16 |
| 2629 | or %r16, %r17, %r20 |
| 2630 | wrpr %r20, %g0, %tstate |
| 2631 | wrhpr %g0, 0xa17, %htstate |
| 2632 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2633 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 2634 | done |
| 2635 | donretarg_80_55: |
| 2636 | .word 0xa9a409d3 ! 70: FDIVd fdivd %f16, %f50, %f20 |
| 2637 | nop |
| 2638 | ta T_CHANGE_HPRIV |
| 2639 | mov 0x80, %r10 |
| 2640 | set sync_thr_counter6, %r23 |
| 2641 | #ifndef SPC |
| 2642 | ldxa [%g0]0x63, %o1 |
| 2643 | and %o1, 0x38, %o1 |
| 2644 | add %o1, %r23, %r23 |
| 2645 | #endif |
| 2646 | cas [%r23],%g0,%r10 !lock |
| 2647 | brnz %r10, sma_80_56 |
| 2648 | rd %asi, %r12 |
| 2649 | wr %g0, 0x40, %asi |
| 2650 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2651 | set 0x000a1fff, %g1 |
| 2652 | stxa %g1, [%g0 + 0x80] %asi |
| 2653 | wr %r12, %g0, %asi |
| 2654 | st %g0, [%r23] |
| 2655 | sma_80_56: |
| 2656 | ta T_CHANGE_NONHPRIV |
| 2657 | .word 0xe7e7e014 ! 71: CASA_R casa [%r31] %asi, %r20, %r19 |
| 2658 | .word 0xe19fe040 ! 72: LDDFA_I ldda [%r31, 0x0040], %f16 |
| 2659 | mondo_80_57: |
| 2660 | nop |
| 2661 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2662 | stxa %r8, [%r0+0x3c0] %asi |
| 2663 | .word 0x9d910014 ! 73: WRPR_WSTATE_R wrpr %r4, %r20, %wstate |
| 2664 | nop |
| 2665 | mov 0x80, %g3 |
| 2666 | stxa %g3, [%g3] 0x57 |
| 2667 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 2668 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 2669 | nop |
| 2670 | ta T_CHANGE_HPRIV |
| 2671 | mov 0x80, %r10 |
| 2672 | set sync_thr_counter6, %r23 |
| 2673 | #ifndef SPC |
| 2674 | ldxa [%g0]0x63, %o1 |
| 2675 | and %o1, 0x38, %o1 |
| 2676 | add %o1, %r23, %r23 |
| 2677 | #endif |
| 2678 | cas [%r23],%g0,%r10 !lock |
| 2679 | brnz %r10, sma_80_58 |
| 2680 | rd %asi, %r12 |
| 2681 | wr %g0, 0x40, %asi |
| 2682 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2683 | set 0x001a1fff, %g1 |
| 2684 | stxa %g1, [%g0 + 0x80] %asi |
| 2685 | wr %r12, %g0, %asi |
| 2686 | st %g0, [%r23] |
| 2687 | sma_80_58: |
| 2688 | ta T_CHANGE_NONHPRIV |
| 2689 | .word 0xe7e7e010 ! 76: CASA_R casa [%r31] %asi, %r16, %r19 |
| 2690 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 2691 | nop |
| 2692 | mov 0x80, %g3 |
| 2693 | stxa %g3, [%g3] 0x57 |
| 2694 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 2695 | .word 0xa553c000 ! 79: RDPR_FQ <illegal instruction> |
| 2696 | donret_80_59: |
| 2697 | nop |
| 2698 | ta T_CHANGE_HPRIV ! macro |
| 2699 | rd %pc, %r12 |
| 2700 | add %r12, (donretarg_80_59-donret_80_59-4), %r12 |
| 2701 | mov 0x38, %r18 |
| 2702 | stxa %r12, [%r18]0x58 |
| 2703 | add %r12, 0x4, %r11 |
| 2704 | wrpr %g0, 0x2, %tl |
| 2705 | wrpr %g0, %r12, %tpc |
| 2706 | wrpr %g0, %r11, %tnpc |
| 2707 | set (0x000145a1 | (0x8b << 24)), %r13 |
| 2708 | rdpr %tstate, %r16 |
| 2709 | mov 0x1f, %r19 |
| 2710 | and %r19, %r16, %r17 |
| 2711 | andn %r16, %r19, %r16 |
| 2712 | or %r16, %r17, %r20 |
| 2713 | wrpr %r20, %g0, %tstate |
| 2714 | wrhpr %g0, 0x4aa, %htstate |
| 2715 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2716 | done |
| 2717 | donretarg_80_59: |
| 2718 | .word 0x97a489d2 ! 80: FDIVd fdivd %f18, %f18, %f42 |
| 2719 | .word 0xda8fe1d0 ! 81: LDUBA_I lduba [%r31, + 0x01d0] %asi, %r13 |
| 2720 | .word 0xe19fdc00 ! 82: LDDFA_R ldda [%r31, %r0], %f16 |
| 2721 | change_to_randtl_80_60: |
| 2722 | ta T_CHANGE_PRIV ! macro |
| 2723 | done_change_to_randtl_80_60: |
| 2724 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 2725 | splash_cmpr_80_61: |
| 2726 | mov 1, %r18 |
| 2727 | sllx %r18, 63, %r18 |
| 2728 | rd %tick, %r17 |
| 2729 | add %r17, 0x60, %r17 |
| 2730 | or %r17, %r18, %r17 |
| 2731 | ta T_CHANGE_PRIV |
| 2732 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2733 | jmptr_80_62: |
| 2734 | nop |
| 2735 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2736 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 2737 | mondo_80_63: |
| 2738 | nop |
| 2739 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2740 | ta T_CHANGE_PRIV |
| 2741 | stxa %r12, [%r0+0x3e0] %asi |
| 2742 | .word 0x9d944004 ! 86: WRPR_WSTATE_R wrpr %r17, %r4, %wstate |
| 2743 | #if (defined SPC || defined CMP) |
| 2744 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_64)+16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2745 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_64)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2746 | #else |
| 2747 | !! TODO:Generate XIR via RESET_GEN register |
| 2748 | ! setx 0x8900000808, %r16, %r17 |
| 2749 | ! mov 0x2, %r16 |
| 2750 | ! stw %r16, [%r17] |
| 2751 | #endif |
| 2752 | xir_80_64: |
| 2753 | .word 0xa9826b22 ! 87: WR_SET_SOFTINT_I wr %r9, 0x0b22, %set_softint |
| 2754 | .word 0xdb37e181 ! 88: STQF_I - %f13, [0x0181, %r31] |
| 2755 | mondo_80_65: |
| 2756 | nop |
| 2757 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2758 | ta T_CHANGE_PRIV |
| 2759 | stxa %r9, [%r0+0x3e0] %asi |
| 2760 | .word 0x9d95000a ! 89: WRPR_WSTATE_R wrpr %r20, %r10, %wstate |
| 2761 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 2762 | memptr_80_66: |
| 2763 | set user_data_start, %r31 |
| 2764 | .word 0x8580f087 ! 91: WRCCR_I wr %r3, 0x1087, %ccr |
| 2765 | jmptr_80_67: |
| 2766 | nop |
| 2767 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2768 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 2769 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 2770 | reduce_priv_lvl_80_68: |
| 2771 | ta T_CHANGE_NONPRIV ! macro |
| 2772 | otherw |
| 2773 | mov 0xb3, %r30 |
| 2774 | .word 0x83d0001e ! 94: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 2775 | vahole_80_69: |
| 2776 | nop |
| 2777 | ta T_CHANGE_NONHPRIV |
| 2778 | setx vahole_target0, %r18, %r27 |
| 2779 | jmpl %r27+0, %r27 |
| 2780 | .word 0xda3fe100 ! 95: STD_I std %r13, [%r31 + 0x0100] |
| 2781 | pmu_80_70: |
| 2782 | nop |
| 2783 | setx 0xfffffeaafffffd5c, %g1, %g7 |
| 2784 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2785 | jmptr_80_71: |
| 2786 | nop |
| 2787 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2788 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 2789 | splash_cmpr_80_72: |
| 2790 | mov 0, %r18 |
| 2791 | sllx %r18, 63, %r18 |
| 2792 | rd %tick, %r17 |
| 2793 | add %r17, 0x70, %r17 |
| 2794 | or %r17, %r18, %r17 |
| 2795 | ta T_CHANGE_HPRIV |
| 2796 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2797 | ta T_CHANGE_PRIV |
| 2798 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2799 | splash_hpstate_80_73: |
| 2800 | .word 0x81982614 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x0614, %hpstate |
| 2801 | donret_80_74: |
| 2802 | nop |
| 2803 | ta T_CHANGE_HPRIV ! macro |
| 2804 | rd %pc, %r12 |
| 2805 | add %r12, (donretarg_80_74-donret_80_74-8), %r12 |
| 2806 | mov 0x38, %r18 |
| 2807 | stxa %r12, [%r18]0x58 |
| 2808 | add %r12, 0x4, %r11 |
| 2809 | wrpr %g0, 0x1, %tl |
| 2810 | wrpr %g0, %r12, %tpc |
| 2811 | wrpr %g0, %r11, %tnpc |
| 2812 | set (0x0046a92b | (22 << 24)), %r13 |
| 2813 | rdpr %tstate, %r16 |
| 2814 | mov 0x1f, %r19 |
| 2815 | and %r19, %r16, %r17 |
| 2816 | andn %r16, %r19, %r16 |
| 2817 | or %r16, %r17, %r20 |
| 2818 | wrpr %r20, %g0, %tstate |
| 2819 | wrhpr %g0, 0x495, %htstate |
| 2820 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2821 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 2822 | retry |
| 2823 | donretarg_80_74: |
| 2824 | .word 0xda6fe0af ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x00af] |
| 2825 | change_to_randtl_80_75: |
| 2826 | ta T_CHANGE_HPRIV ! macro |
| 2827 | done_change_to_randtl_80_75: |
| 2828 | .word 0x8f902001 ! 101: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 2829 | unsupttte_80_76: |
| 2830 | nop |
| 2831 | ta T_CHANGE_HPRIV |
| 2832 | mov 1, %r20 |
| 2833 | sllx %r20, 63, %r20 |
| 2834 | or %r20, 2,%r20 |
| 2835 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 2836 | ta T_CHANGE_NONHPRIV |
| 2837 | .word 0x9ba289d0 ! 102: FDIVd fdivd %f10, %f16, %f44 |
| 2838 | .word 0x8d9021a2 ! 103: WRPR_PSTATE_I wrpr %r0, 0x01a2, %pstate |
| 2839 | intveclr_80_78: |
| 2840 | nop |
| 2841 | ta T_CHANGE_HPRIV |
| 2842 | setx 0x9d75e530629b4a72, %r1, %r28 |
| 2843 | stxa %r28, [%g0] 0x72 |
| 2844 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2845 | donret_80_79: |
| 2846 | nop |
| 2847 | ta T_CHANGE_HPRIV ! macro |
| 2848 | rd %pc, %r12 |
| 2849 | add %r12, (donretarg_80_79-donret_80_79-4), %r12 |
| 2850 | mov 0x38, %r18 |
| 2851 | stxa %r12, [%r18]0x58 |
| 2852 | add %r12, 0x4, %r11 |
| 2853 | wrpr %g0, 0x1, %tl |
| 2854 | wrpr %g0, %r12, %tpc |
| 2855 | wrpr %g0, %r11, %tnpc |
| 2856 | set (0x0006209b | (0x80 << 24)), %r13 |
| 2857 | rdpr %tstate, %r16 |
| 2858 | mov 0x1f, %r19 |
| 2859 | and %r19, %r16, %r17 |
| 2860 | andn %r16, %r19, %r16 |
| 2861 | or %r16, %r17, %r20 |
| 2862 | wrpr %r20, %g0, %tstate |
| 2863 | wrhpr %g0, 0x545, %htstate |
| 2864 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2865 | done |
| 2866 | donretarg_80_79: |
| 2867 | .word 0xa5a449d0 ! 105: FDIVd fdivd %f48, %f16, %f18 |
| 2868 | .word 0xe4d7e0f8 ! 106: LDSHA_I ldsha [%r31, + 0x00f8] %asi, %r18 |
| 2869 | tagged_80_80: |
| 2870 | tsubcctv %r4, 0x1b77, %r4 |
| 2871 | .word 0xe407e1f8 ! 107: LDUW_I lduw [%r31 + 0x01f8], %r18 |
| 2872 | nop |
| 2873 | ta T_CHANGE_HPRIV |
| 2874 | mov 0x80+1, %r10 |
| 2875 | set sync_thr_counter5, %r23 |
| 2876 | #ifndef SPC |
| 2877 | ldxa [%g0]0x63, %o1 |
| 2878 | and %o1, 0x38, %o1 |
| 2879 | add %o1, %r23, %r23 |
| 2880 | sllx %o1, 5, %o3 !(CID*256) |
| 2881 | #endif |
| 2882 | cas [%r23],%g0,%r10 !lock |
| 2883 | brnz %r10, cwq_80_81 |
| 2884 | rd %asi, %r12 |
| 2885 | wr %g0, 0x40, %asi |
| 2886 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2887 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2888 | cmp %l1, 1 |
| 2889 | bne cwq_80_81 |
| 2890 | set CWQ_BASE, %l6 |
| 2891 | #ifndef SPC |
| 2892 | add %l6, %o3, %l6 |
| 2893 | #endif |
| 2894 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2895 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 2896 | sllx %l2, 32, %l2 |
| 2897 | stx %l2, [%l6 + 0x0] |
| 2898 | membar #Sync |
| 2899 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2900 | sub %l2, 0x40, %l2 |
| 2901 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2902 | wr %r12, %g0, %asi |
| 2903 | st %g0, [%r23] |
| 2904 | cwq_80_81: |
| 2905 | ta T_CHANGE_NONHPRIV |
| 2906 | .word 0xa3414000 ! 108: RDPC rd %pc, %r17 |
| 2907 | splash_lsu_80_82: |
| 2908 | nop |
| 2909 | ta T_CHANGE_HPRIV |
| 2910 | set 0x612cf5e8, %r2 |
| 2911 | mov 0x3, %r1 |
| 2912 | sllx %r1, 32, %r1 |
| 2913 | or %r1, %r2, %r2 |
| 2914 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 2915 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 2916 | splash_cmpr_80_83: |
| 2917 | mov 0, %r18 |
| 2918 | sllx %r18, 63, %r18 |
| 2919 | rd %tick, %r17 |
| 2920 | add %r17, 0x80, %r17 |
| 2921 | or %r17, %r18, %r17 |
| 2922 | ta T_CHANGE_PRIV |
| 2923 | .word 0xb3800011 ! 110: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2924 | splash_htba_80_84: |
| 2925 | nop |
| 2926 | ta T_CHANGE_HPRIV |
| 2927 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 2928 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 2929 | mondo_80_85: |
| 2930 | nop |
| 2931 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2932 | stxa %r17, [%r0+0x3c0] %asi |
| 2933 | .word 0x9d910004 ! 112: WRPR_WSTATE_R wrpr %r4, %r4, %wstate |
| 2934 | .word 0xc1bfde00 ! 113: STDFA_R stda %f0, [%r0, %r31] |
| 2935 | .word 0xe19fd960 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 2936 | splash_cmpr_80_86: |
| 2937 | mov 1, %r18 |
| 2938 | sllx %r18, 63, %r18 |
| 2939 | rd %tick, %r17 |
| 2940 | add %r17, 0x60, %r17 |
| 2941 | or %r17, %r18, %r17 |
| 2942 | ta T_CHANGE_PRIV |
| 2943 | .word 0xb3800011 ! 115: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2944 | #if (defined SPC || defined CMP) |
| 2945 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_87)+24, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2946 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_87)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2947 | #else |
| 2948 | !! TODO:Generate XIR via RESET_GEN register |
| 2949 | ! setx 0x8900000808, %r16, %r17 |
| 2950 | ! mov 0x2, %r16 |
| 2951 | ! stw %r16, [%r17] |
| 2952 | #endif |
| 2953 | xir_80_87: |
| 2954 | .word 0xa980ea7d ! 116: WR_SET_SOFTINT_I wr %r3, 0x0a7d, %set_softint |
| 2955 | brcommon3_80_88: |
| 2956 | nop |
| 2957 | setx common_target, %r12, %r27 |
| 2958 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2959 | ba,a .+12 |
| 2960 | .word 0xd137c00a ! 1: STQF_R - %f8, [%r10, %r31] |
| 2961 | ba,a .+8 |
| 2962 | jmpl %r27+0, %r27 |
| 2963 | .word 0xd13fc010 ! 117: STDF_R std %f8, [%r16, %r31] |
| 2964 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 2965 | .word 0x8d90392d ! 118: WRPR_PSTATE_I wrpr %r0, 0x192d, %pstate |
| 2966 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 2967 | reduce_priv_lvl_80_90: |
| 2968 | ta T_CHANGE_NONPRIV ! macro |
| 2969 | #if (defined SPC || defined CMP) |
| 2970 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_91)+0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2971 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_91)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 2972 | #else |
| 2973 | !! TODO:Generate XIR via RESET_GEN register |
| 2974 | ! setx 0x8900000808, %r16, %r17 |
| 2975 | ! mov 0x2, %r16 |
| 2976 | ! stw %r16, [%r17] |
| 2977 | #endif |
| 2978 | xir_80_91: |
| 2979 | .word 0xa984381f ! 120: WR_SET_SOFTINT_I wr %r16, 0x181f, %set_softint |
| 2980 | splash_cmpr_80_92: |
| 2981 | mov 0, %r18 |
| 2982 | sllx %r18, 63, %r18 |
| 2983 | rd %tick, %r17 |
| 2984 | add %r17, 0x100, %r17 |
| 2985 | or %r17, %r18, %r17 |
| 2986 | .word 0xb3800011 ! 121: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2987 | .word 0x95a00166 ! 122: FABSq dis not found |
| 2988 | |
| 2989 | ta T_CHANGE_NONHPRIV |
| 2990 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 2991 | splash_cmpr_80_95: |
| 2992 | mov 0, %r18 |
| 2993 | sllx %r18, 63, %r18 |
| 2994 | rd %tick, %r17 |
| 2995 | add %r17, 0x100, %r17 |
| 2996 | or %r17, %r18, %r17 |
| 2997 | ta T_CHANGE_HPRIV |
| 2998 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2999 | ta T_CHANGE_PRIV |
| 3000 | .word 0xaf800011 ! 124: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3001 | .word 0xe1bfdb60 ! 125: STDFA_R stda %f16, [%r0, %r31] |
| 3002 | jmptr_80_96: |
| 3003 | nop |
| 3004 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3005 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 3006 | setx 0xc32cde87bd2830c9, %r1, %r28 |
| 3007 | stxa %r28, [%g0] 0x73 |
| 3008 | intvec_80_97: |
| 3009 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3010 | pmu_80_98: |
| 3011 | nop |
| 3012 | ta T_CHANGE_PRIV |
| 3013 | setx 0xffffff61fffffb59, %g1, %g7 |
| 3014 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3015 | donret_80_99: |
| 3016 | nop |
| 3017 | ta T_CHANGE_HPRIV ! macro |
| 3018 | rd %pc, %r12 |
| 3019 | add %r12, (donretarg_80_99-donret_80_99-4), %r12 |
| 3020 | mov 0x38, %r18 |
| 3021 | stxa %r12, [%r18]0x58 |
| 3022 | add %r12, 0x4, %r11 |
| 3023 | wrpr %g0, 0x1, %tl |
| 3024 | wrpr %g0, %r12, %tpc |
| 3025 | wrpr %g0, %r11, %tnpc |
| 3026 | set (0x00650d44 | (16 << 24)), %r13 |
| 3027 | rdpr %tstate, %r16 |
| 3028 | mov 0x1f, %r19 |
| 3029 | and %r19, %r16, %r17 |
| 3030 | andn %r16, %r19, %r16 |
| 3031 | or %r16, %r17, %r20 |
| 3032 | wrpr %r20, %g0, %tstate |
| 3033 | wrhpr %g0, 0xbcd, %htstate |
| 3034 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 3035 | done |
| 3036 | donretarg_80_99: |
| 3037 | .word 0xa5a249d4 ! 129: FDIVd fdivd %f40, %f20, %f18 |
| 3038 | pmu_80_100: |
| 3039 | nop |
| 3040 | setx 0xfffff999fffff35a, %g1, %g7 |
| 3041 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3042 | mondo_80_101: |
| 3043 | nop |
| 3044 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3045 | ta T_CHANGE_PRIV |
| 3046 | stxa %r13, [%r0+0x3c8] %asi |
| 3047 | .word 0x9d940012 ! 131: WRPR_WSTATE_R wrpr %r16, %r18, %wstate |
| 3048 | nop |
| 3049 | ta T_CHANGE_HPRIV |
| 3050 | mov 0x80, %r10 |
| 3051 | set sync_thr_counter6, %r23 |
| 3052 | #ifndef SPC |
| 3053 | ldxa [%g0]0x63, %o1 |
| 3054 | and %o1, 0x38, %o1 |
| 3055 | add %o1, %r23, %r23 |
| 3056 | #endif |
| 3057 | cas [%r23],%g0,%r10 !lock |
| 3058 | brnz %r10, sma_80_102 |
| 3059 | rd %asi, %r12 |
| 3060 | wr %g0, 0x40, %asi |
| 3061 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3062 | set 0x000e1fff, %g1 |
| 3063 | stxa %g1, [%g0 + 0x80] %asi |
| 3064 | wr %r12, %g0, %asi |
| 3065 | st %g0, [%r23] |
| 3066 | sma_80_102: |
| 3067 | ta T_CHANGE_NONHPRIV |
| 3068 | .word 0xd9e7e009 ! 132: CASA_R casa [%r31] %asi, %r9, %r12 |
| 3069 | .word 0xc1bfc2c0 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 3070 | splash_tba_80_103: |
| 3071 | ta T_CHANGE_PRIV |
| 3072 | setx 0x00000000003a0000, %r11, %r12 |
| 3073 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3074 | splash_lsu_80_104: |
| 3075 | nop |
| 3076 | ta T_CHANGE_HPRIV |
| 3077 | set 0x5802856a, %r2 |
| 3078 | mov 0x4, %r1 |
| 3079 | sllx %r1, 32, %r1 |
| 3080 | or %r1, %r2, %r2 |
| 3081 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3082 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3083 | setx 0x7d678359671c7b48, %r1, %r28 |
| 3084 | stxa %r28, [%g0] 0x73 |
| 3085 | intvec_80_105: |
| 3086 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3087 | change_to_randtl_80_106: |
| 3088 | ta T_CHANGE_PRIV ! macro |
| 3089 | done_change_to_randtl_80_106: |
| 3090 | .word 0x8f902001 ! 137: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 3091 | nop |
| 3092 | ta T_CHANGE_HPRIV |
| 3093 | mov 0x80+1, %r10 |
| 3094 | set sync_thr_counter5, %r23 |
| 3095 | #ifndef SPC |
| 3096 | ldxa [%g0]0x63, %o1 |
| 3097 | and %o1, 0x38, %o1 |
| 3098 | add %o1, %r23, %r23 |
| 3099 | sllx %o1, 5, %o3 !(CID*256) |
| 3100 | #endif |
| 3101 | cas [%r23],%g0,%r10 !lock |
| 3102 | brnz %r10, cwq_80_107 |
| 3103 | rd %asi, %r12 |
| 3104 | wr %g0, 0x40, %asi |
| 3105 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3106 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3107 | cmp %l1, 1 |
| 3108 | bne cwq_80_107 |
| 3109 | set CWQ_BASE, %l6 |
| 3110 | #ifndef SPC |
| 3111 | add %l6, %o3, %l6 |
| 3112 | #endif |
| 3113 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3114 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 3115 | sllx %l2, 32, %l2 |
| 3116 | stx %l2, [%l6 + 0x0] |
| 3117 | membar #Sync |
| 3118 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3119 | sub %l2, 0x40, %l2 |
| 3120 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3121 | wr %r12, %g0, %asi |
| 3122 | st %g0, [%r23] |
| 3123 | cwq_80_107: |
| 3124 | ta T_CHANGE_NONHPRIV |
| 3125 | .word 0xa9414000 ! 138: RDPC rd %pc, %r20 |
| 3126 | #if (defined SPC || defined CMP) |
| 3127 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_108)+0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3128 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_108)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3129 | #else |
| 3130 | !! TODO:Generate XIR via RESET_GEN register |
| 3131 | ! setx 0x8900000808, %r16, %r17 |
| 3132 | ! mov 0x2, %r16 |
| 3133 | ! stw %r16, [%r17] |
| 3134 | #endif |
| 3135 | xir_80_108: |
| 3136 | .word 0xa984bbae ! 139: WR_SET_SOFTINT_I wr %r18, 0x1bae, %set_softint |
| 3137 | br_badelay1_80_109: |
| 3138 | .word 0x87afca48 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f8 |
| 3139 | .word 0xe731b970 ! 1: STQF_I - %f19, [0x1970, %r6] |
| 3140 | .word 0xda3fc00d ! 1: STD_R std %r13, [%r31 + %r13] |
| 3141 | normalw |
| 3142 | .word 0x93458000 ! 140: RD_SOFTINT_REG rd %softint, %r9 |
| 3143 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3144 | reduce_priv_lvl_80_110: |
| 3145 | ta T_CHANGE_NONHPRIV ! macro |
| 3146 | vahole_80_111: |
| 3147 | nop |
| 3148 | ta T_CHANGE_NONHPRIV |
| 3149 | setx vahole_target1, %r18, %r27 |
| 3150 | jmpl %r27+0, %r27 |
| 3151 | .word 0xa5a349ad ! 142: FDIVs fdivs %f13, %f13, %f18 |
| 3152 | nop |
| 3153 | ta T_CHANGE_HPRIV |
| 3154 | mov 0x80+1, %r10 |
| 3155 | set sync_thr_counter5, %r23 |
| 3156 | #ifndef SPC |
| 3157 | ldxa [%g0]0x63, %o1 |
| 3158 | and %o1, 0x38, %o1 |
| 3159 | add %o1, %r23, %r23 |
| 3160 | sllx %o1, 5, %o3 !(CID*256) |
| 3161 | #endif |
| 3162 | cas [%r23],%g0,%r10 !lock |
| 3163 | brnz %r10, cwq_80_112 |
| 3164 | rd %asi, %r12 |
| 3165 | wr %g0, 0x40, %asi |
| 3166 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3167 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3168 | cmp %l1, 1 |
| 3169 | bne cwq_80_112 |
| 3170 | set CWQ_BASE, %l6 |
| 3171 | #ifndef SPC |
| 3172 | add %l6, %o3, %l6 |
| 3173 | #endif |
| 3174 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3175 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 3176 | sllx %l2, 32, %l2 |
| 3177 | stx %l2, [%l6 + 0x0] |
| 3178 | membar #Sync |
| 3179 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3180 | sub %l2, 0x40, %l2 |
| 3181 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3182 | wr %r12, %g0, %asi |
| 3183 | st %g0, [%r23] |
| 3184 | cwq_80_112: |
| 3185 | ta T_CHANGE_NONHPRIV |
| 3186 | .word 0x93414000 ! 143: RDPC rd %pc, %r9 |
| 3187 | .word 0xd91fe088 ! 144: LDDF_I ldd [%r31, 0x0088], %f12 |
| 3188 | setx 0xf30a0bd50a2d20db, %r1, %r28 |
| 3189 | stxa %r28, [%g0] 0x73 |
| 3190 | intvec_80_113: |
| 3191 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3192 | .word 0x96d40011 ! 146: UMULcc_R umulcc %r16, %r17, %r11 |
| 3193 | splash_cmpr_80_114: |
| 3194 | mov 1, %r18 |
| 3195 | sllx %r18, 63, %r18 |
| 3196 | rd %tick, %r17 |
| 3197 | add %r17, 0x50, %r17 |
| 3198 | or %r17, %r18, %r17 |
| 3199 | ta T_CHANGE_HPRIV |
| 3200 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3201 | .word 0xb3800011 ! 147: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3202 | mondo_80_115: |
| 3203 | nop |
| 3204 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3205 | ta T_CHANGE_PRIV |
| 3206 | stxa %r6, [%r0+0x3c0] %asi |
| 3207 | .word 0x9d944013 ! 148: WRPR_WSTATE_R wrpr %r17, %r19, %wstate |
| 3208 | change_to_randtl_80_116: |
| 3209 | ta T_CHANGE_PRIV ! macro |
| 3210 | done_change_to_randtl_80_116: |
| 3211 | .word 0x8f902000 ! 149: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3212 | change_to_randtl_80_117: |
| 3213 | ta T_CHANGE_HPRIV ! macro |
| 3214 | done_change_to_randtl_80_117: |
| 3215 | .word 0x8f902000 ! 150: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3216 | #if (defined SPC || defined CMP) |
| 3217 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_118) + 32, 16, 16)) -> intp(6,0,15) |
| 3218 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_118)&0xffffffff) + 32, 16, 16)) -> intp(6,0,15) |
| 3219 | #else |
| 3220 | setx 0x4812c57ba3cffbb8, %r1, %r28 |
| 3221 | stxa %r28, [%g0] 0x73 |
| 3222 | #endif |
| 3223 | intvec_80_118: |
| 3224 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3225 | memptr_80_119: |
| 3226 | set 0x60140000, %r31 |
| 3227 | .word 0x85807501 ! 152: WRCCR_I wr %r1, 0x1501, %ccr |
| 3228 | nop |
| 3229 | mov 0x80, %g3 |
| 3230 | stxa %g3, [%g3] 0x57 |
| 3231 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 3232 | .word 0x8d903c90 ! 154: WRPR_PSTATE_I wrpr %r0, 0x1c90, %pstate |
| 3233 | mondo_80_121: |
| 3234 | nop |
| 3235 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3236 | ta T_CHANGE_PRIV |
| 3237 | stxa %r3, [%r0+0x3d0] %asi |
| 3238 | .word 0x9d950002 ! 155: WRPR_WSTATE_R wrpr %r20, %r2, %wstate |
| 3239 | .word 0x8d903180 ! 156: WRPR_PSTATE_I wrpr %r0, 0x1180, %pstate |
| 3240 | .word 0x91d020b2 ! 157: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 3241 | setx 0x4a408fd538d922c0, %r1, %r28 |
| 3242 | stxa %r28, [%g0] 0x73 |
| 3243 | intvec_80_123: |
| 3244 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3245 | .word 0xc368c006 ! 159: PREFETCH_R prefetch [%r3 + %r6], #one_read |
| 3246 | fpinit_80_124: |
| 3247 | nop |
| 3248 | setx fp_data_quads, %r19, %r20 |
| 3249 | ldd [%r20], %f0 |
| 3250 | ldd [%r20+8], %f4 |
| 3251 | ld [%r20+16], %fsr |
| 3252 | ld [%r20+24], %r19 |
| 3253 | wr %r19, %g0, %gsr |
| 3254 | .word 0x89a009a4 ! 160: FDIVs fdivs %f0, %f4, %f4 |
| 3255 | splash_hpstate_80_125: |
| 3256 | ta T_CHANGE_NONHPRIV |
| 3257 | .word 0x2cca8001 ! 1: BRGZ brgz,a,pt %r10,<label_0xa8001> |
| 3258 | .word 0x81983cdb ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1cdb, %hpstate |
| 3259 | nop |
| 3260 | mov 0x80, %g3 |
| 3261 | stxa %g3, [%g3] 0x5f |
| 3262 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 3263 | nop |
| 3264 | ta T_CHANGE_HPRIV |
| 3265 | mov 0x80, %r10 |
| 3266 | set sync_thr_counter6, %r23 |
| 3267 | #ifndef SPC |
| 3268 | ldxa [%g0]0x63, %o1 |
| 3269 | and %o1, 0x38, %o1 |
| 3270 | add %o1, %r23, %r23 |
| 3271 | #endif |
| 3272 | cas [%r23],%g0,%r10 !lock |
| 3273 | brnz %r10, sma_80_126 |
| 3274 | rd %asi, %r12 |
| 3275 | wr %g0, 0x40, %asi |
| 3276 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3277 | set 0x000a1fff, %g1 |
| 3278 | stxa %g1, [%g0 + 0x80] %asi |
| 3279 | wr %r12, %g0, %asi |
| 3280 | st %g0, [%r23] |
| 3281 | sma_80_126: |
| 3282 | ta T_CHANGE_NONHPRIV |
| 3283 | .word 0xe1e7e008 ! 163: CASA_R casa [%r31] %asi, %r8, %r16 |
| 3284 | nop |
| 3285 | ta T_CHANGE_HPRIV |
| 3286 | mov 0x80, %r10 |
| 3287 | set sync_thr_counter6, %r23 |
| 3288 | #ifndef SPC |
| 3289 | ldxa [%g0]0x63, %o1 |
| 3290 | and %o1, 0x38, %o1 |
| 3291 | add %o1, %r23, %r23 |
| 3292 | #endif |
| 3293 | cas [%r23],%g0,%r10 !lock |
| 3294 | brnz %r10, sma_80_127 |
| 3295 | rd %asi, %r12 |
| 3296 | wr %g0, 0x40, %asi |
| 3297 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3298 | set 0x000a1fff, %g1 |
| 3299 | stxa %g1, [%g0 + 0x80] %asi |
| 3300 | wr %r12, %g0, %asi |
| 3301 | st %g0, [%r23] |
| 3302 | sma_80_127: |
| 3303 | ta T_CHANGE_NONHPRIV |
| 3304 | .word 0xe1e7e009 ! 164: CASA_R casa [%r31] %asi, %r9, %r16 |
| 3305 | pmu_80_128: |
| 3306 | nop |
| 3307 | ta T_CHANGE_PRIV |
| 3308 | setx 0xfffff885fffff1c4, %g1, %g7 |
| 3309 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3310 | splash_cmpr_80_129: |
| 3311 | mov 0, %r18 |
| 3312 | sllx %r18, 63, %r18 |
| 3313 | rd %tick, %r17 |
| 3314 | add %r17, 0x70, %r17 |
| 3315 | or %r17, %r18, %r17 |
| 3316 | ta T_CHANGE_PRIV |
| 3317 | .word 0xaf800011 ! 166: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3318 | ceter_80_130: |
| 3319 | nop |
| 3320 | ta T_CHANGE_HPRIV |
| 3321 | mov 7, %r17 |
| 3322 | sllx %r17, 60, %r17 |
| 3323 | mov 0x18, %r16 |
| 3324 | stxa %r17, [%r16]0x4c |
| 3325 | ta T_CHANGE_NONHPRIV |
| 3326 | .word 0xa1410000 ! 167: RDTICK rd %tick, %r16 |
| 3327 | jmptr_80_131: |
| 3328 | nop |
| 3329 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3330 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 3331 | .word 0xa96b4003 ! 169: SDIVX_R sdivx %r13, %r3, %r20 |
| 3332 | splash_cmpr_80_132: |
| 3333 | mov 0, %r18 |
| 3334 | sllx %r18, 63, %r18 |
| 3335 | rd %tick, %r17 |
| 3336 | add %r17, 0x80, %r17 |
| 3337 | or %r17, %r18, %r17 |
| 3338 | .word 0xb3800011 ! 170: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3339 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 3340 | nop |
| 3341 | ta T_CHANGE_HPRIV |
| 3342 | mov 0x80+1, %r10 |
| 3343 | set sync_thr_counter5, %r23 |
| 3344 | #ifndef SPC |
| 3345 | ldxa [%g0]0x63, %o1 |
| 3346 | and %o1, 0x38, %o1 |
| 3347 | add %o1, %r23, %r23 |
| 3348 | sllx %o1, 5, %o3 !(CID*256) |
| 3349 | #endif |
| 3350 | cas [%r23],%g0,%r10 !lock |
| 3351 | brnz %r10, cwq_80_133 |
| 3352 | rd %asi, %r12 |
| 3353 | wr %g0, 0x40, %asi |
| 3354 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3355 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3356 | cmp %l1, 1 |
| 3357 | bne cwq_80_133 |
| 3358 | set CWQ_BASE, %l6 |
| 3359 | #ifndef SPC |
| 3360 | add %l6, %o3, %l6 |
| 3361 | #endif |
| 3362 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3363 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 3364 | sllx %l2, 32, %l2 |
| 3365 | stx %l2, [%l6 + 0x0] |
| 3366 | membar #Sync |
| 3367 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3368 | sub %l2, 0x40, %l2 |
| 3369 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3370 | wr %r12, %g0, %asi |
| 3371 | st %g0, [%r23] |
| 3372 | cwq_80_133: |
| 3373 | ta T_CHANGE_NONHPRIV |
| 3374 | .word 0x95414000 ! 172: RDPC rd %pc, %r10 |
| 3375 | jmptr_80_134: |
| 3376 | nop |
| 3377 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3378 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 3379 | .word 0xe09fd160 ! 174: LDDA_R ldda [%r31, %r0] 0x8b, %r16 |
| 3380 | setx 0xfc680b7c027cd3b8, %r1, %r28 |
| 3381 | stxa %r28, [%g0] 0x73 |
| 3382 | intvec_80_135: |
| 3383 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3384 | splash_cmpr_80_136: |
| 3385 | mov 0, %r18 |
| 3386 | sllx %r18, 63, %r18 |
| 3387 | rd %tick, %r17 |
| 3388 | add %r17, 0x80, %r17 |
| 3389 | or %r17, %r18, %r17 |
| 3390 | ta T_CHANGE_HPRIV |
| 3391 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3392 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3393 | .word 0xe0d7e010 ! 177: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r16 |
| 3394 | splash_cmpr_80_137: |
| 3395 | mov 0, %r18 |
| 3396 | sllx %r18, 63, %r18 |
| 3397 | rd %tick, %r17 |
| 3398 | add %r17, 0x100, %r17 |
| 3399 | or %r17, %r18, %r17 |
| 3400 | ta T_CHANGE_HPRIV |
| 3401 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3402 | ta T_CHANGE_PRIV |
| 3403 | .word 0xb3800011 ! 178: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3404 | mondo_80_138: |
| 3405 | nop |
| 3406 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3407 | stxa %r20, [%r0+0x3d8] %asi |
| 3408 | .word 0x9d944009 ! 179: WRPR_WSTATE_R wrpr %r17, %r9, %wstate |
| 3409 | change_to_randtl_80_139: |
| 3410 | ta T_CHANGE_HPRIV ! macro |
| 3411 | done_change_to_randtl_80_139: |
| 3412 | .word 0x8f902000 ! 180: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3413 | jmptr_80_140: |
| 3414 | nop |
| 3415 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3416 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 3417 | .word 0x91950001 ! 182: WRPR_PIL_R wrpr %r20, %r1, %pil |
| 3418 | donret_80_142: |
| 3419 | nop |
| 3420 | ta T_CHANGE_HPRIV ! macro |
| 3421 | rd %pc, %r12 |
| 3422 | add %r12, (donretarg_80_142-donret_80_142-8), %r12 |
| 3423 | mov 0x38, %r18 |
| 3424 | stxa %r12, [%r18]0x58 |
| 3425 | add %r12, 0x4, %r11 |
| 3426 | wrpr %g0, 0x2, %tl |
| 3427 | wrpr %g0, %r12, %tpc |
| 3428 | wrpr %g0, %r11, %tnpc |
| 3429 | set (0x00d66ed1 | (0x55 << 24)), %r13 |
| 3430 | rdpr %tstate, %r16 |
| 3431 | mov 0x1f, %r19 |
| 3432 | and %r19, %r16, %r17 |
| 3433 | andn %r16, %r19, %r16 |
| 3434 | or %r16, %r17, %r20 |
| 3435 | wrpr %r20, %g0, %tstate |
| 3436 | wrhpr %g0, 0x596, %htstate |
| 3437 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 3438 | retry |
| 3439 | donretarg_80_142: |
| 3440 | .word 0x93a349d0 ! 183: FDIVd fdivd %f44, %f16, %f40 |
| 3441 | .word 0xe6c7e030 ! 184: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r19 |
| 3442 | .word 0xc1bfdb60 ! 185: STDFA_R stda %f0, [%r0, %r31] |
| 3443 | .word 0xe6cfe020 ! 186: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r19 |
| 3444 | splash_cmpr_80_143: |
| 3445 | mov 0, %r18 |
| 3446 | sllx %r18, 63, %r18 |
| 3447 | rd %tick, %r17 |
| 3448 | add %r17, 0x80, %r17 |
| 3449 | or %r17, %r18, %r17 |
| 3450 | ta T_CHANGE_HPRIV |
| 3451 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3452 | .word 0xaf800011 ! 187: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3453 | .word 0x90848012 ! 188: ADDcc_R addcc %r18, %r18, %r8 |
| 3454 | ibp_80_144: |
| 3455 | nop |
| 3456 | ta T_CHANGE_NONHPRIV |
| 3457 | .word 0xe1bfe160 ! 189: STDFA_I stda %f16, [0x0160, %r31] |
| 3458 | ceter_80_145: |
| 3459 | nop |
| 3460 | ta T_CHANGE_HPRIV |
| 3461 | mov 7, %r17 |
| 3462 | sllx %r17, 60, %r17 |
| 3463 | mov 0x18, %r16 |
| 3464 | stxa %r17, [%r16]0x4c |
| 3465 | ta T_CHANGE_NONHPRIV |
| 3466 | .word 0x9b410000 ! 190: RDTICK rd %tick, %r13 |
| 3467 | ceter_80_146: |
| 3468 | nop |
| 3469 | ta T_CHANGE_HPRIV |
| 3470 | mov 3, %r17 |
| 3471 | sllx %r17, 60, %r17 |
| 3472 | mov 0x18, %r16 |
| 3473 | stxa %r17, [%r16]0x4c |
| 3474 | ta T_CHANGE_NONHPRIV |
| 3475 | .word 0x99410000 ! 191: RDTICK rd %tick, %r12 |
| 3476 | setx 0x505310280c971a5b, %r1, %r28 |
| 3477 | stxa %r28, [%g0] 0x73 |
| 3478 | intvec_80_147: |
| 3479 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3480 | invtsb_80_148: |
| 3481 | nop |
| 3482 | ta T_CHANGE_HPRIV |
| 3483 | rd %asi, %r21 |
| 3484 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 3485 | mov 1, %r20 |
| 3486 | sllx %r20, 63, %r20 |
| 3487 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 3488 | xor %r22 ,%r20, %r22 |
| 3489 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 3490 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 3491 | xor %r22 ,%r20, %r22 |
| 3492 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 3493 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 3494 | xor %r22 ,%r20, %r22 |
| 3495 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 3496 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 3497 | xor %r22 ,%r20, %r22 |
| 3498 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 3499 | wr %r21, %r0, %asi |
| 3500 | ta T_CHANGE_NONHPRIV |
| 3501 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 3502 | .word 0x97a00164 ! 194: FABSq dis not found |
| 3503 | |
| 3504 | .word 0xe6c7e140 ! 195: LDSWA_I ldswa [%r31, + 0x0140] %asi, %r19 |
| 3505 | splash_lsu_80_150: |
| 3506 | nop |
| 3507 | ta T_CHANGE_HPRIV |
| 3508 | set 0xfc7381a8, %r2 |
| 3509 | mov 0x4, %r1 |
| 3510 | sllx %r1, 32, %r1 |
| 3511 | or %r1, %r2, %r2 |
| 3512 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3513 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3514 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3515 | reduce_priv_lvl_80_151: |
| 3516 | ta T_CHANGE_NONPRIV ! macro |
| 3517 | .word 0xe65fe040 ! 198: LDX_I ldx [%r31 + 0x0040], %r19 |
| 3518 | splash_hpstate_80_152: |
| 3519 | ta T_CHANGE_NONHPRIV |
| 3520 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 3521 | .word 0x819836ac ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x16ac, %hpstate |
| 3522 | .word 0x9353c000 ! 200: RDPR_FQ <illegal instruction> |
| 3523 | .word 0xd23fe1a0 ! 1: STD_I std %r9, [%r31 + 0x01a0] |
| 3524 | .word 0x9f802e0d ! 201: SIR sir 0x0e0d |
| 3525 | mondo_80_153: |
| 3526 | nop |
| 3527 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3528 | stxa %r19, [%r0+0x3c8] %asi |
| 3529 | .word 0x9d92c00b ! 202: WRPR_WSTATE_R wrpr %r11, %r11, %wstate |
| 3530 | jmptr_80_154: |
| 3531 | nop |
| 3532 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3533 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 3534 | brlez,a,pt %r8, skip_80_155 |
| 3535 | .word 0xa3b4c4d1 ! 1: FCMPNE32 fcmpne32 %d50, %d48, %r17 |
| 3536 | .align 2048 |
| 3537 | skip_80_155: |
| 3538 | .word 0x95a309c1 ! 204: FDIVd fdivd %f12, %f32, %f10 |
| 3539 | pmu_80_156: |
| 3540 | nop |
| 3541 | ta T_CHANGE_PRIV |
| 3542 | setx 0xfffff399fffff554, %g1, %g7 |
| 3543 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3544 | setx 0x1af026848cb70185, %r1, %r28 |
| 3545 | stxa %r28, [%g0] 0x73 |
| 3546 | intvec_80_157: |
| 3547 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3548 | .word 0xe677e15e ! 207: STX_I stx %r19, [%r31 + 0x015e] |
| 3549 | brcommon2_80_158: |
| 3550 | nop |
| 3551 | setx common_target, %r12, %r27 |
| 3552 | ba,a .+12 |
| 3553 | .word 0xe5110004 ! 1: LDQF_R - [%r4, %r4], %f18 |
| 3554 | ba,a .+8 |
| 3555 | jmpl %r27+0, %r27 |
| 3556 | .word 0xc1bfda00 ! 208: STDFA_R stda %f0, [%r0, %r31] |
| 3557 | .word 0xa2fc0011 ! 209: SDIVcc_R sdivcc %r16, %r17, %r17 |
| 3558 | .word 0xd897e068 ! 210: LDUHA_I lduha [%r31, + 0x0068] %asi, %r12 |
| 3559 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 3560 | change_to_randtl_80_159: |
| 3561 | ta T_CHANGE_HPRIV ! macro |
| 3562 | done_change_to_randtl_80_159: |
| 3563 | .word 0x8f902001 ! 212: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 3564 | tagged_80_160: |
| 3565 | tsubcctv %r12, 0x1b67, %r18 |
| 3566 | .word 0xd807e136 ! 213: LDUW_I lduw [%r31 + 0x0136], %r12 |
| 3567 | br_badelay1_80_161: |
| 3568 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 3569 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 3570 | .word 0xd83fc00d ! 1: STD_R std %r12, [%r31 + %r13] |
| 3571 | normalw |
| 3572 | .word 0x97458000 ! 214: RD_SOFTINT_REG rd %softint, %r11 |
| 3573 | pmu_80_162: |
| 3574 | nop |
| 3575 | setx 0xfffff2e7fffff35d, %g1, %g7 |
| 3576 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3577 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 3578 | pmu_80_164: |
| 3579 | nop |
| 3580 | ta T_CHANGE_PRIV |
| 3581 | setx 0xfffff828fffffdb1, %g1, %g7 |
| 3582 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3583 | otherw |
| 3584 | mov 0xb1, %r30 |
| 3585 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 3586 | .word 0xc1bfd960 ! 219: STDFA_R stda %f0, [%r0, %r31] |
| 3587 | .word 0xe1bfda00 ! 220: STDFA_R stda %f16, [%r0, %r31] |
| 3588 | .word 0xe1bfe1a0 ! 221: STDFA_I stda %f16, [0x01a0, %r31] |
| 3589 | setx 0x6354422c1f04248f, %r1, %r28 |
| 3590 | stxa %r28, [%g0] 0x73 |
| 3591 | intvec_80_165: |
| 3592 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3593 | br_longdelay1_80_166: |
| 3594 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 3595 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 3596 | nop |
| 3597 | ta T_CHANGE_HPRIV |
| 3598 | mov 0x80, %r10 |
| 3599 | set sync_thr_counter6, %r23 |
| 3600 | #ifndef SPC |
| 3601 | ldxa [%g0]0x63, %o1 |
| 3602 | and %o1, 0x38, %o1 |
| 3603 | add %o1, %r23, %r23 |
| 3604 | #endif |
| 3605 | cas [%r23],%g0,%r10 !lock |
| 3606 | brnz %r10, sma_80_167 |
| 3607 | rd %asi, %r12 |
| 3608 | wr %g0, 0x40, %asi |
| 3609 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3610 | set 0x00021fff, %g1 |
| 3611 | stxa %g1, [%g0 + 0x80] %asi |
| 3612 | wr %r12, %g0, %asi |
| 3613 | st %g0, [%r23] |
| 3614 | sma_80_167: |
| 3615 | ta T_CHANGE_NONHPRIV |
| 3616 | .word 0xe1e7e00a ! 224: CASA_R casa [%r31] %asi, %r10, %r16 |
| 3617 | jmptr_80_168: |
| 3618 | nop |
| 3619 | best_set_reg(0xe0a00000, %r20, %r27) |
| 3620 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 3621 | setx 0x7a448ee32ff63e2d, %r1, %r28 |
| 3622 | stxa %r28, [%g0] 0x73 |
| 3623 | intvec_80_169: |
| 3624 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3625 | mondo_80_170: |
| 3626 | nop |
| 3627 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3628 | ta T_CHANGE_PRIV |
| 3629 | stxa %r19, [%r0+0x3c0] %asi |
| 3630 | .word 0x9d94c012 ! 227: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 3631 | splash_cmpr_80_171: |
| 3632 | mov 0, %r18 |
| 3633 | sllx %r18, 63, %r18 |
| 3634 | rd %tick, %r17 |
| 3635 | add %r17, 0x100, %r17 |
| 3636 | or %r17, %r18, %r17 |
| 3637 | ta T_CHANGE_PRIV |
| 3638 | .word 0xb3800011 ! 228: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3639 | pmu_80_172: |
| 3640 | nop |
| 3641 | ta T_CHANGE_PRIV |
| 3642 | setx 0xfffffc30fffff793, %g1, %g7 |
| 3643 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3644 | splash_lsu_80_173: |
| 3645 | nop |
| 3646 | ta T_CHANGE_HPRIV |
| 3647 | set 0xaa210a65, %r2 |
| 3648 | mov 0x2, %r1 |
| 3649 | sllx %r1, 32, %r1 |
| 3650 | or %r1, %r2, %r2 |
| 3651 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3652 | ta T_CHANGE_NONHPRIV |
| 3653 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3654 | mondo_80_174: |
| 3655 | nop |
| 3656 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3657 | ta T_CHANGE_PRIV |
| 3658 | stxa %r16, [%r0+0x3e0] %asi |
| 3659 | .word 0x9d95000b ! 231: WRPR_WSTATE_R wrpr %r20, %r11, %wstate |
| 3660 | memptr_80_175: |
| 3661 | set 0x60740000, %r31 |
| 3662 | .word 0x8584394b ! 232: WRCCR_I wr %r16, 0x194b, %ccr |
| 3663 | mondo_80_176: |
| 3664 | nop |
| 3665 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3666 | ta T_CHANGE_PRIV |
| 3667 | stxa %r8, [%r0+0x3d8] %asi |
| 3668 | .word 0x9d940005 ! 233: WRPR_WSTATE_R wrpr %r16, %r5, %wstate |
| 3669 | #if (defined SPC || defined CMP) |
| 3670 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_177)+16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3671 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_177)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3672 | #else |
| 3673 | !! TODO:Generate XIR via RESET_GEN register |
| 3674 | ! setx 0x8900000808, %r16, %r17 |
| 3675 | ! mov 0x2, %r16 |
| 3676 | ! stw %r16, [%r17] |
| 3677 | #endif |
| 3678 | xir_80_177: |
| 3679 | .word 0xa9842909 ! 234: WR_SET_SOFTINT_I wr %r16, 0x0909, %set_softint |
| 3680 | splash_lsu_80_178: |
| 3681 | nop |
| 3682 | ta T_CHANGE_HPRIV |
| 3683 | set 0x64460993, %r2 |
| 3684 | mov 0x4, %r1 |
| 3685 | sllx %r1, 32, %r1 |
| 3686 | or %r1, %r2, %r2 |
| 3687 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3688 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3689 | pmu_80_179: |
| 3690 | nop |
| 3691 | setx 0xfffff10cfffffcb7, %g1, %g7 |
| 3692 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3693 | splash_lsu_80_180: |
| 3694 | nop |
| 3695 | ta T_CHANGE_HPRIV |
| 3696 | set 0x8bfa2101, %r2 |
| 3697 | mov 0x3, %r1 |
| 3698 | sllx %r1, 32, %r1 |
| 3699 | or %r1, %r2, %r2 |
| 3700 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3701 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3702 | splash_cmpr_80_181: |
| 3703 | mov 0, %r18 |
| 3704 | sllx %r18, 63, %r18 |
| 3705 | rd %tick, %r17 |
| 3706 | add %r17, 0x80, %r17 |
| 3707 | or %r17, %r18, %r17 |
| 3708 | ta T_CHANGE_HPRIV |
| 3709 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3710 | .word 0xb3800011 ! 238: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3711 | .word 0xe057e038 ! 239: LDSH_I ldsh [%r31 + 0x0038], %r16 |
| 3712 | donret_80_182: |
| 3713 | nop |
| 3714 | ta T_CHANGE_HPRIV ! macro |
| 3715 | rd %pc, %r12 |
| 3716 | add %r12, (donretarg_80_182-donret_80_182-8), %r12 |
| 3717 | mov 0x38, %r18 |
| 3718 | stxa %r12, [%r18]0x58 |
| 3719 | add %r12, 0x4, %r11 |
| 3720 | wrpr %g0, 0x1, %tl |
| 3721 | wrpr %g0, %r12, %tpc |
| 3722 | wrpr %g0, %r11, %tnpc |
| 3723 | set (0x00285b06 | (0x55 << 24)), %r13 |
| 3724 | rdpr %tstate, %r16 |
| 3725 | mov 0x1f, %r19 |
| 3726 | and %r19, %r16, %r17 |
| 3727 | andn %r16, %r19, %r16 |
| 3728 | or %r16, %r17, %r20 |
| 3729 | wrpr %r20, %g0, %tstate |
| 3730 | wrhpr %g0, 0x4f4, %htstate |
| 3731 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 3732 | retry |
| 3733 | donretarg_80_182: |
| 3734 | .word 0xe0ffe0f5 ! 240: SWAPA_I swapa %r16, [%r31 + 0x00f5] %asi |
| 3735 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 3736 | reduce_priv_lvl_80_183: |
| 3737 | ta T_CHANGE_NONPRIV ! macro |
| 3738 | .word 0xc1bfe060 ! 242: STDFA_I stda %f0, [0x0060, %r31] |
| 3739 | #if (defined SPC || defined CMP) |
| 3740 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_184)+0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3741 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_184)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 3742 | #else |
| 3743 | !! TODO:Generate XIR via RESET_GEN register |
| 3744 | ! setx 0x8900000808, %r16, %r17 |
| 3745 | ! mov 0x2, %r16 |
| 3746 | ! stw %r16, [%r17] |
| 3747 | #endif |
| 3748 | xir_80_184: |
| 3749 | .word 0xa9836751 ! 243: WR_SET_SOFTINT_I wr %r13, 0x0751, %set_softint |
| 3750 | unsupttte_80_185: |
| 3751 | nop |
| 3752 | ta T_CHANGE_HPRIV |
| 3753 | mov 1, %r20 |
| 3754 | sllx %r20, 63, %r20 |
| 3755 | or %r20, 2,%r20 |
| 3756 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 3757 | ta T_CHANGE_NONHPRIV |
| 3758 | .word 0xa7b4c492 ! 244: FCMPLE32 fcmple32 %d50, %d18, %r19 |
| 3759 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 3760 | nop |
| 3761 | ta T_CHANGE_HPRIV |
| 3762 | mov 0x80+1, %r10 |
| 3763 | set sync_thr_counter5, %r23 |
| 3764 | #ifndef SPC |
| 3765 | ldxa [%g0]0x63, %o1 |
| 3766 | and %o1, 0x38, %o1 |
| 3767 | add %o1, %r23, %r23 |
| 3768 | sllx %o1, 5, %o3 !(CID*256) |
| 3769 | #endif |
| 3770 | cas [%r23],%g0,%r10 !lock |
| 3771 | brnz %r10, cwq_80_186 |
| 3772 | rd %asi, %r12 |
| 3773 | wr %g0, 0x40, %asi |
| 3774 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3775 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3776 | cmp %l1, 1 |
| 3777 | bne cwq_80_186 |
| 3778 | set CWQ_BASE, %l6 |
| 3779 | #ifndef SPC |
| 3780 | add %l6, %o3, %l6 |
| 3781 | #endif |
| 3782 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3783 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 3784 | sllx %l2, 32, %l2 |
| 3785 | stx %l2, [%l6 + 0x0] |
| 3786 | membar #Sync |
| 3787 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3788 | sub %l2, 0x40, %l2 |
| 3789 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3790 | wr %r12, %g0, %asi |
| 3791 | st %g0, [%r23] |
| 3792 | cwq_80_186: |
| 3793 | ta T_CHANGE_NONHPRIV |
| 3794 | .word 0x9b414000 ! 246: RDPC rd %pc, %r13 |
| 3795 | setx 0xb1a4ed3671e52fdd, %r1, %r28 |
| 3796 | stxa %r28, [%g0] 0x73 |
| 3797 | intvec_80_187: |
| 3798 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3799 | pmu_80_188: |
| 3800 | nop |
| 3801 | setx 0xfffff60afffff9a8, %g1, %g7 |
| 3802 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3803 | splash_cmpr_80_189: |
| 3804 | mov 0, %r18 |
| 3805 | sllx %r18, 63, %r18 |
| 3806 | rd %tick, %r17 |
| 3807 | add %r17, 0x80, %r17 |
| 3808 | or %r17, %r18, %r17 |
| 3809 | ta T_CHANGE_HPRIV |
| 3810 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3811 | .word 0xaf800011 ! 249: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3812 | donret_80_190: |
| 3813 | nop |
| 3814 | ta T_CHANGE_HPRIV ! macro |
| 3815 | rd %pc, %r12 |
| 3816 | add %r12, (donretarg_80_190-donret_80_190-8), %r12 |
| 3817 | mov 0x38, %r18 |
| 3818 | stxa %r12, [%r18]0x58 |
| 3819 | add %r12, 0x4, %r11 |
| 3820 | wrpr %g0, 0x1, %tl |
| 3821 | wrpr %g0, %r12, %tpc |
| 3822 | wrpr %g0, %r11, %tnpc |
| 3823 | set (0x006f798a | (0x55 << 24)), %r13 |
| 3824 | rdpr %tstate, %r16 |
| 3825 | mov 0x1f, %r19 |
| 3826 | and %r19, %r16, %r17 |
| 3827 | andn %r16, %r19, %r16 |
| 3828 | or %r16, %r17, %r20 |
| 3829 | wrpr %r20, %g0, %tstate |
| 3830 | wrhpr %g0, 0x105d, %htstate |
| 3831 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3832 | retry |
| 3833 | donretarg_80_190: |
| 3834 | .word 0x99a349d4 ! 250: FDIVd fdivd %f44, %f20, %f12 |
| 3835 | memptr_80_191: |
| 3836 | set 0x60340000, %r31 |
| 3837 | .word 0x85842357 ! 251: WRCCR_I wr %r16, 0x0357, %ccr |
| 3838 | .word 0xe49fc540 ! 252: LDDA_R ldda [%r31, %r0] 0x2a, %r18 |
| 3839 | invtsb_80_192: |
| 3840 | nop |
| 3841 | ta T_CHANGE_HPRIV |
| 3842 | rd %asi, %r21 |
| 3843 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 3844 | mov 1, %r20 |
| 3845 | sllx %r20, 63, %r20 |
| 3846 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 3847 | xor %r22 ,%r20, %r22 |
| 3848 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 3849 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 3850 | xor %r22 ,%r20, %r22 |
| 3851 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 3852 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 3853 | xor %r22 ,%r20, %r22 |
| 3854 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 3855 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 3856 | xor %r22 ,%r20, %r22 |
| 3857 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 3858 | wr %r21, %r0, %asi |
| 3859 | ta T_CHANGE_NONHPRIV |
| 3860 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 3861 | nop |
| 3862 | ta T_CHANGE_HPRIV |
| 3863 | mov 0x80+1, %r10 |
| 3864 | set sync_thr_counter5, %r23 |
| 3865 | #ifndef SPC |
| 3866 | ldxa [%g0]0x63, %o1 |
| 3867 | and %o1, 0x38, %o1 |
| 3868 | add %o1, %r23, %r23 |
| 3869 | sllx %o1, 5, %o3 !(CID*256) |
| 3870 | #endif |
| 3871 | cas [%r23],%g0,%r10 !lock |
| 3872 | brnz %r10, cwq_80_193 |
| 3873 | rd %asi, %r12 |
| 3874 | wr %g0, 0x40, %asi |
| 3875 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3876 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3877 | cmp %l1, 1 |
| 3878 | bne cwq_80_193 |
| 3879 | set CWQ_BASE, %l6 |
| 3880 | #ifndef SPC |
| 3881 | add %l6, %o3, %l6 |
| 3882 | #endif |
| 3883 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3884 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 3885 | sllx %l2, 32, %l2 |
| 3886 | stx %l2, [%l6 + 0x0] |
| 3887 | membar #Sync |
| 3888 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3889 | sub %l2, 0x40, %l2 |
| 3890 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3891 | wr %r12, %g0, %asi |
| 3892 | st %g0, [%r23] |
| 3893 | cwq_80_193: |
| 3894 | ta T_CHANGE_NONHPRIV |
| 3895 | .word 0xa9414000 ! 254: RDPC rd %pc, %r20 |
| 3896 | splash_lsu_80_194: |
| 3897 | nop |
| 3898 | ta T_CHANGE_HPRIV |
| 3899 | set 0x03a4ce82, %r2 |
| 3900 | mov 0x6, %r1 |
| 3901 | sllx %r1, 32, %r1 |
| 3902 | or %r1, %r2, %r2 |
| 3903 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3904 | ta T_CHANGE_NONHPRIV |
| 3905 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3906 | .word 0xa953c000 ! 256: RDPR_FQ <illegal instruction> |
| 3907 | vahole_80_195: |
| 3908 | nop |
| 3909 | ta T_CHANGE_NONHPRIV |
| 3910 | setx vahole_target2, %r18, %r27 |
| 3911 | jmpl %r27+0, %r27 |
| 3912 | .word 0xe91fe1d0 ! 257: LDDF_I ldd [%r31, 0x01d0], %f20 |
| 3913 | #if (defined SPC || defined CMP) |
| 3914 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_196) + 8, 16, 16)) -> intp(5,0,11) |
| 3915 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_196)&0xffffffff) + 8, 16, 16)) -> intp(5,0,11) |
| 3916 | #else |
| 3917 | setx 0xeb2b1ed40b6256bb, %r1, %r28 |
| 3918 | stxa %r28, [%g0] 0x73 |
| 3919 | #endif |
| 3920 | intvec_80_196: |
| 3921 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3922 | nop |
| 3923 | ta T_CHANGE_HPRIV |
| 3924 | mov 0x80, %r10 |
| 3925 | set sync_thr_counter6, %r23 |
| 3926 | #ifndef SPC |
| 3927 | ldxa [%g0]0x63, %o1 |
| 3928 | and %o1, 0x38, %o1 |
| 3929 | add %o1, %r23, %r23 |
| 3930 | #endif |
| 3931 | cas [%r23],%g0,%r10 !lock |
| 3932 | brnz %r10, sma_80_197 |
| 3933 | rd %asi, %r12 |
| 3934 | wr %g0, 0x40, %asi |
| 3935 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3936 | set 0x00161fff, %g1 |
| 3937 | stxa %g1, [%g0 + 0x80] %asi |
| 3938 | wr %r12, %g0, %asi |
| 3939 | st %g0, [%r23] |
| 3940 | sma_80_197: |
| 3941 | ta T_CHANGE_NONHPRIV |
| 3942 | .word 0xe9e7e00b ! 259: CASA_R casa [%r31] %asi, %r11, %r20 |
| 3943 | .word 0xe8c7e180 ! 260: LDSWA_I ldswa [%r31, + 0x0180] %asi, %r20 |
| 3944 | vahole_80_198: |
| 3945 | nop |
| 3946 | ta T_CHANGE_NONHPRIV |
| 3947 | setx vahole_target3, %r18, %r27 |
| 3948 | jmpl %r27+0, %r27 |
| 3949 | .word 0x9ba0c9d3 ! 261: FDIVd fdivd %f34, %f50, %f44 |
| 3950 | .word 0xd697e0c0 ! 262: LDUHA_I lduha [%r31, + 0x00c0] %asi, %r11 |
| 3951 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 3952 | .word 0xd68fe018 ! 264: LDUBA_I lduba [%r31, + 0x0018] %asi, %r11 |
| 3953 | pmu_80_199: |
| 3954 | nop |
| 3955 | setx 0xfffff2eefffffe54, %g1, %g7 |
| 3956 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3957 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 3958 | vahole_80_201: |
| 3959 | nop |
| 3960 | ta T_CHANGE_NONHPRIV |
| 3961 | setx vahole_target1, %r18, %r27 |
| 3962 | jmpl %r27+0, %r27 |
| 3963 | .word 0xc3e90033 ! 267: PREFETCHA_R prefetcha [%r4, %r19] 0x01, #one_read |
| 3964 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 3965 | .word 0x8d903fc3 ! 268: WRPR_PSTATE_I wrpr %r0, 0x1fc3, %pstate |
| 3966 | .word 0xe097e1a0 ! 269: LDUHA_I lduha [%r31, + 0x01a0] %asi, %r16 |
| 3967 | nop |
| 3968 | ta T_CHANGE_HPRIV |
| 3969 | mov 0x80, %r10 |
| 3970 | set sync_thr_counter6, %r23 |
| 3971 | #ifndef SPC |
| 3972 | ldxa [%g0]0x63, %o1 |
| 3973 | and %o1, 0x38, %o1 |
| 3974 | add %o1, %r23, %r23 |
| 3975 | #endif |
| 3976 | cas [%r23],%g0,%r10 !lock |
| 3977 | brnz %r10, sma_80_203 |
| 3978 | rd %asi, %r12 |
| 3979 | wr %g0, 0x40, %asi |
| 3980 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3981 | set 0x00061fff, %g1 |
| 3982 | stxa %g1, [%g0 + 0x80] %asi |
| 3983 | wr %r12, %g0, %asi |
| 3984 | st %g0, [%r23] |
| 3985 | sma_80_203: |
| 3986 | ta T_CHANGE_NONHPRIV |
| 3987 | .word 0xe1e7e008 ! 270: CASA_R casa [%r31] %asi, %r8, %r16 |
| 3988 | .word 0xe07fe110 ! 271: SWAP_I swap %r16, [%r31 + 0x0110] |
| 3989 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 3990 | cwp_80_204: |
| 3991 | set user_data_start, %o7 |
| 3992 | .word 0x93902000 ! 273: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 3993 | pmu_80_205: |
| 3994 | nop |
| 3995 | ta T_CHANGE_PRIV |
| 3996 | setx 0xfffff25bfffffa7c, %g1, %g7 |
| 3997 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3998 | mondo_80_206: |
| 3999 | nop |
| 4000 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4001 | ta T_CHANGE_PRIV |
| 4002 | stxa %r11, [%r0+0x3d8] %asi |
| 4003 | .word 0x9d944010 ! 275: WRPR_WSTATE_R wrpr %r17, %r16, %wstate |
| 4004 | br_badelay3_80_207: |
| 4005 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 4006 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 4007 | .word 0xa7a0054a ! 1: FSQRTd fsqrt |
| 4008 | .word 0x97a40827 ! 276: FADDs fadds %f16, %f7, %f11 |
| 4009 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 4010 | reduce_priv_lvl_80_208: |
| 4011 | ta T_CHANGE_NONPRIV ! macro |
| 4012 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 4013 | mondo_80_210: |
| 4014 | nop |
| 4015 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4016 | stxa %r16, [%r0+0x3c0] %asi |
| 4017 | .word 0x9d94c012 ! 279: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 4018 | donret_80_211: |
| 4019 | nop |
| 4020 | ta T_CHANGE_HPRIV ! macro |
| 4021 | rd %pc, %r12 |
| 4022 | add %r12, (donretarg_80_211-donret_80_211-4), %r12 |
| 4023 | mov 0x38, %r18 |
| 4024 | stxa %r12, [%r18]0x58 |
| 4025 | add %r12, 0x4, %r11 |
| 4026 | wrpr %g0, 0x2, %tl |
| 4027 | wrpr %g0, %r12, %tpc |
| 4028 | wrpr %g0, %r11, %tnpc |
| 4029 | set (0x00f712e1 | (16 << 24)), %r13 |
| 4030 | rdpr %tstate, %r16 |
| 4031 | mov 0x1f, %r19 |
| 4032 | and %r19, %r16, %r17 |
| 4033 | andn %r16, %r19, %r16 |
| 4034 | or %r16, %r17, %r20 |
| 4035 | wrpr %r20, %g0, %tstate |
| 4036 | wrhpr %g0, 0x1542, %htstate |
| 4037 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 4038 | done |
| 4039 | donretarg_80_211: |
| 4040 | .word 0xd86fe10d ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x010d] |
| 4041 | donret_80_212: |
| 4042 | nop |
| 4043 | ta T_CHANGE_HPRIV ! macro |
| 4044 | rd %pc, %r12 |
| 4045 | add %r12, (donretarg_80_212-donret_80_212-8), %r12 |
| 4046 | mov 0x38, %r18 |
| 4047 | stxa %r12, [%r18]0x58 |
| 4048 | add %r12, 0x4, %r11 |
| 4049 | wrpr %g0, 0x1, %tl |
| 4050 | wrpr %g0, %r12, %tpc |
| 4051 | wrpr %g0, %r11, %tnpc |
| 4052 | set (0x0024b52e | (0x55 << 24)), %r13 |
| 4053 | rdpr %tstate, %r16 |
| 4054 | mov 0x1f, %r19 |
| 4055 | and %r19, %r16, %r17 |
| 4056 | andn %r16, %r19, %r16 |
| 4057 | or %r16, %r17, %r20 |
| 4058 | wrpr %r20, %g0, %tstate |
| 4059 | wrhpr %g0, 0x1946, %htstate |
| 4060 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 4061 | retry |
| 4062 | donretarg_80_212: |
| 4063 | .word 0xa1a509d0 ! 281: FDIVd fdivd %f20, %f16, %f16 |
| 4064 | brcommon1_80_213: |
| 4065 | nop |
| 4066 | setx common_target, %r12, %r27 |
| 4067 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4068 | ba,a .+12 |
| 4069 | .word 0xe9e7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r20 |
| 4070 | ba,a .+8 |
| 4071 | jmpl %r27+0, %r27 |
| 4072 | .word 0xa5b047d3 ! 282: PDIST pdistn %d32, %d50, %d18 |
| 4073 | .word 0xe19fe0a0 ! 283: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 4074 | .word 0x8d903583 ! 284: WRPR_PSTATE_I wrpr %r0, 0x1583, %pstate |
| 4075 | splash_cmpr_80_215: |
| 4076 | mov 0, %r18 |
| 4077 | sllx %r18, 63, %r18 |
| 4078 | rd %tick, %r17 |
| 4079 | add %r17, 0x50, %r17 |
| 4080 | or %r17, %r18, %r17 |
| 4081 | ta T_CHANGE_PRIV |
| 4082 | .word 0xaf800011 ! 285: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4083 | splash_cmpr_80_216: |
| 4084 | mov 0, %r18 |
| 4085 | sllx %r18, 63, %r18 |
| 4086 | rd %tick, %r17 |
| 4087 | add %r17, 0x70, %r17 |
| 4088 | or %r17, %r18, %r17 |
| 4089 | ta T_CHANGE_HPRIV |
| 4090 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4091 | .word 0xaf800011 ! 286: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4092 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4093 | reduce_priv_lvl_80_217: |
| 4094 | ta T_CHANGE_NONPRIV ! macro |
| 4095 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4096 | .word 0x8d9032f1 ! 288: WRPR_PSTATE_I wrpr %r0, 0x12f1, %pstate |
| 4097 | splash_lsu_80_219: |
| 4098 | nop |
| 4099 | ta T_CHANGE_HPRIV |
| 4100 | set 0xbc6b92d9, %r2 |
| 4101 | mov 0x4, %r1 |
| 4102 | sllx %r1, 32, %r1 |
| 4103 | or %r1, %r2, %r2 |
| 4104 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4105 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4106 | donret_80_220: |
| 4107 | nop |
| 4108 | ta T_CHANGE_HPRIV ! macro |
| 4109 | rd %pc, %r12 |
| 4110 | add %r12, (donretarg_80_220-donret_80_220-8), %r12 |
| 4111 | mov 0x38, %r18 |
| 4112 | stxa %r12, [%r18]0x58 |
| 4113 | add %r12, 0x4, %r11 |
| 4114 | wrpr %g0, 0x1, %tl |
| 4115 | wrpr %g0, %r12, %tpc |
| 4116 | wrpr %g0, %r11, %tnpc |
| 4117 | set (0x004f9e37 | (0x89 << 24)), %r13 |
| 4118 | rdpr %tstate, %r16 |
| 4119 | mov 0x1f, %r19 |
| 4120 | and %r19, %r16, %r17 |
| 4121 | andn %r16, %r19, %r16 |
| 4122 | or %r16, %r17, %r20 |
| 4123 | wrpr %r20, %g0, %tstate |
| 4124 | wrhpr %g0, 0x60f, %htstate |
| 4125 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 4126 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 4127 | retry |
| 4128 | donretarg_80_220: |
| 4129 | .word 0xd66fe013 ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x0013] |
| 4130 | .word 0x91d02034 ! 291: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 4131 | setx 0x626ac130b112b3ec, %r1, %r28 |
| 4132 | stxa %r28, [%g0] 0x73 |
| 4133 | intvec_80_221: |
| 4134 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4135 | brcommon3_80_222: |
| 4136 | nop |
| 4137 | setx common_target, %r12, %r27 |
| 4138 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4139 | ba,a .+12 |
| 4140 | .word 0xd737e050 ! 1: STQF_I - %f11, [0x0050, %r31] |
| 4141 | ba,a .+8 |
| 4142 | jmpl %r27+0, %r27 |
| 4143 | .word 0xd6bfc034 ! 293: STDA_R stda %r11, [%r31 + %r20] 0x01 |
| 4144 | .word 0xd6d7e140 ! 294: LDSHA_I ldsha [%r31, + 0x0140] %asi, %r11 |
| 4145 | pmu_80_223: |
| 4146 | nop |
| 4147 | ta T_CHANGE_PRIV |
| 4148 | setx 0xffffff84fffffe8a, %g1, %g7 |
| 4149 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4150 | .word 0x9ba00161 ! 296: FABSq dis not found |
| 4151 | |
| 4152 | #if (defined SPC || defined CMP) |
| 4153 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_225)+48, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4154 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_225)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4155 | #else |
| 4156 | !! TODO:Generate XIR via RESET_GEN register |
| 4157 | ! setx 0x8900000808, %r16, %r17 |
| 4158 | ! mov 0x2, %r16 |
| 4159 | ! stw %r16, [%r17] |
| 4160 | #endif |
| 4161 | xir_80_225: |
| 4162 | .word 0xa98435d8 ! 297: WR_SET_SOFTINT_I wr %r16, 0x15d8, %set_softint |
| 4163 | memptr_80_226: |
| 4164 | set 0x60740000, %r31 |
| 4165 | .word 0x8583352e ! 298: WRCCR_I wr %r12, 0x152e, %ccr |
| 4166 | mondo_80_227: |
| 4167 | nop |
| 4168 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4169 | ta T_CHANGE_PRIV |
| 4170 | stxa %r20, [%r0+0x3d8] %asi |
| 4171 | .word 0x9d948001 ! 299: WRPR_WSTATE_R wrpr %r18, %r1, %wstate |
| 4172 | .word 0xd297e1c8 ! 300: LDUHA_I lduha [%r31, + 0x01c8] %asi, %r9 |
| 4173 | vahole_80_228: |
| 4174 | nop |
| 4175 | ta T_CHANGE_NONHPRIV |
| 4176 | setx vahole_target2, %r18, %r27 |
| 4177 | jmpl %r27+0, %r27 |
| 4178 | .word 0xa9702953 ! 301: POPC_I popc 0x0953, %r20 |
| 4179 | #if (defined SPC || defined CMP) |
| 4180 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_229)+0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4181 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_229)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4182 | #else |
| 4183 | !! TODO:Generate XIR via RESET_GEN register |
| 4184 | ! setx 0x8900000808, %r16, %r17 |
| 4185 | ! mov 0x2, %r16 |
| 4186 | ! stw %r16, [%r17] |
| 4187 | #endif |
| 4188 | xir_80_229: |
| 4189 | .word 0xa982329e ! 302: WR_SET_SOFTINT_I wr %r8, 0x129e, %set_softint |
| 4190 | .word 0x8d902ca1 ! 303: WRPR_PSTATE_I wrpr %r0, 0x0ca1, %pstate |
| 4191 | vahole_80_231: |
| 4192 | nop |
| 4193 | ta T_CHANGE_NONHPRIV |
| 4194 | setx vahole_target0, %r18, %r27 |
| 4195 | jmpl %r27+0, %r27 |
| 4196 | .word 0xe8dfc028 ! 304: LDXA_R ldxa [%r31, %r8] 0x01, %r20 |
| 4197 | trapasi_80_232: |
| 4198 | nop |
| 4199 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 4200 | .word 0xe8d04980 ! 305: LDSHA_R ldsha [%r1, %r0] 0x4c, %r20 |
| 4201 | #if (defined SPC || defined CMP) |
| 4202 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_233)+0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4203 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_233)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4204 | #else |
| 4205 | !! TODO:Generate XIR via RESET_GEN register |
| 4206 | ! setx 0x8900000808, %r16, %r17 |
| 4207 | ! mov 0x2, %r16 |
| 4208 | ! stw %r16, [%r17] |
| 4209 | #endif |
| 4210 | xir_80_233: |
| 4211 | .word 0xa981bbda ! 306: WR_SET_SOFTINT_I wr %r6, 0x1bda, %set_softint |
| 4212 | #if (defined SPC || defined CMP) |
| 4213 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_234) + 16, 16, 16)) -> intp(6,0,23) |
| 4214 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_234)&0xffffffff) + 16, 16, 16)) -> intp(6,0,23) |
| 4215 | #else |
| 4216 | setx 0xcfc79531950ccb6b, %r1, %r28 |
| 4217 | stxa %r28, [%g0] 0x73 |
| 4218 | #endif |
| 4219 | intvec_80_234: |
| 4220 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4221 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 4222 | pmu_80_235: |
| 4223 | nop |
| 4224 | ta T_CHANGE_PRIV |
| 4225 | setx 0xfffff3e2fffffeec, %g1, %g7 |
| 4226 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4227 | nop |
| 4228 | ta T_CHANGE_HPRIV |
| 4229 | mov 0x80+1, %r10 |
| 4230 | set sync_thr_counter5, %r23 |
| 4231 | #ifndef SPC |
| 4232 | ldxa [%g0]0x63, %o1 |
| 4233 | and %o1, 0x38, %o1 |
| 4234 | add %o1, %r23, %r23 |
| 4235 | sllx %o1, 5, %o3 !(CID*256) |
| 4236 | #endif |
| 4237 | cas [%r23],%g0,%r10 !lock |
| 4238 | brnz %r10, cwq_80_236 |
| 4239 | rd %asi, %r12 |
| 4240 | wr %g0, 0x40, %asi |
| 4241 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4242 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4243 | cmp %l1, 1 |
| 4244 | bne cwq_80_236 |
| 4245 | set CWQ_BASE, %l6 |
| 4246 | #ifndef SPC |
| 4247 | add %l6, %o3, %l6 |
| 4248 | #endif |
| 4249 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4250 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 4251 | sllx %l2, 32, %l2 |
| 4252 | stx %l2, [%l6 + 0x0] |
| 4253 | membar #Sync |
| 4254 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4255 | sub %l2, 0x40, %l2 |
| 4256 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4257 | wr %r12, %g0, %asi |
| 4258 | st %g0, [%r23] |
| 4259 | cwq_80_236: |
| 4260 | ta T_CHANGE_NONHPRIV |
| 4261 | .word 0xa7414000 ! 310: RDPC rd %pc, %r19 |
| 4262 | nop |
| 4263 | ta T_CHANGE_HPRIV |
| 4264 | mov 0x80, %r10 |
| 4265 | set sync_thr_counter6, %r23 |
| 4266 | #ifndef SPC |
| 4267 | ldxa [%g0]0x63, %o1 |
| 4268 | and %o1, 0x38, %o1 |
| 4269 | add %o1, %r23, %r23 |
| 4270 | #endif |
| 4271 | cas [%r23],%g0,%r10 !lock |
| 4272 | brnz %r10, sma_80_237 |
| 4273 | rd %asi, %r12 |
| 4274 | wr %g0, 0x40, %asi |
| 4275 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4276 | set 0x001e1fff, %g1 |
| 4277 | stxa %g1, [%g0 + 0x80] %asi |
| 4278 | wr %r12, %g0, %asi |
| 4279 | st %g0, [%r23] |
| 4280 | sma_80_237: |
| 4281 | ta T_CHANGE_NONHPRIV |
| 4282 | .word 0xd1e7e011 ! 311: CASA_R casa [%r31] %asi, %r17, %r8 |
| 4283 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 4284 | reduce_priv_lvl_80_238: |
| 4285 | ta T_CHANGE_NONPRIV ! macro |
| 4286 | nop |
| 4287 | ta T_CHANGE_HPRIV |
| 4288 | mov 0x80, %r10 |
| 4289 | set sync_thr_counter6, %r23 |
| 4290 | #ifndef SPC |
| 4291 | ldxa [%g0]0x63, %o1 |
| 4292 | and %o1, 0x38, %o1 |
| 4293 | add %o1, %r23, %r23 |
| 4294 | #endif |
| 4295 | cas [%r23],%g0,%r10 !lock |
| 4296 | brnz %r10, sma_80_239 |
| 4297 | rd %asi, %r12 |
| 4298 | wr %g0, 0x40, %asi |
| 4299 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4300 | set 0x001a1fff, %g1 |
| 4301 | stxa %g1, [%g0 + 0x80] %asi |
| 4302 | wr %r12, %g0, %asi |
| 4303 | st %g0, [%r23] |
| 4304 | sma_80_239: |
| 4305 | ta T_CHANGE_NONHPRIV |
| 4306 | .word 0xd1e7e009 ! 313: CASA_R casa [%r31] %asi, %r9, %r8 |
| 4307 | .word 0xc32fc00d ! 1: STXFSR_R st-sfr %f1, [%r13, %r31] |
| 4308 | .word 0x9f802c42 ! 314: SIR sir 0x0c42 |
| 4309 | .word 0x91d020b4 ! 315: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 4310 | splash_cmpr_80_240: |
| 4311 | mov 0, %r18 |
| 4312 | sllx %r18, 63, %r18 |
| 4313 | rd %tick, %r17 |
| 4314 | add %r17, 0x70, %r17 |
| 4315 | or %r17, %r18, %r17 |
| 4316 | ta T_CHANGE_HPRIV |
| 4317 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4318 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4319 | mondo_80_241: |
| 4320 | nop |
| 4321 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4322 | stxa %r1, [%r0+0x3c8] %asi |
| 4323 | .word 0x9d904007 ! 317: WRPR_WSTATE_R wrpr %r1, %r7, %wstate |
| 4324 | nop |
| 4325 | mov 0x80, %g3 |
| 4326 | stxa %g3, [%g3] 0x5f |
| 4327 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 4328 | nop |
| 4329 | ta T_CHANGE_HPRIV |
| 4330 | mov 0x80, %r10 |
| 4331 | set sync_thr_counter6, %r23 |
| 4332 | #ifndef SPC |
| 4333 | ldxa [%g0]0x63, %o1 |
| 4334 | and %o1, 0x38, %o1 |
| 4335 | add %o1, %r23, %r23 |
| 4336 | #endif |
| 4337 | cas [%r23],%g0,%r10 !lock |
| 4338 | brnz %r10, sma_80_242 |
| 4339 | rd %asi, %r12 |
| 4340 | wr %g0, 0x40, %asi |
| 4341 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4342 | set 0x000e1fff, %g1 |
| 4343 | stxa %g1, [%g0 + 0x80] %asi |
| 4344 | wr %r12, %g0, %asi |
| 4345 | st %g0, [%r23] |
| 4346 | sma_80_242: |
| 4347 | ta T_CHANGE_NONHPRIV |
| 4348 | .word 0xd1e7e009 ! 319: CASA_R casa [%r31] %asi, %r9, %r8 |
| 4349 | br_longdelay1_80_243: |
| 4350 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> |
| 4351 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 4352 | splash_cmpr_80_244: |
| 4353 | mov 0, %r18 |
| 4354 | sllx %r18, 63, %r18 |
| 4355 | rd %tick, %r17 |
| 4356 | add %r17, 0x50, %r17 |
| 4357 | or %r17, %r18, %r17 |
| 4358 | ta T_CHANGE_HPRIV |
| 4359 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4360 | .word 0xb3800011 ! 321: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4361 | pmu_80_245: |
| 4362 | nop |
| 4363 | ta T_CHANGE_PRIV |
| 4364 | setx 0xfffff785fffff7c7, %g1, %g7 |
| 4365 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4366 | pmu_80_246: |
| 4367 | nop |
| 4368 | setx 0xfffff405fffff3cd, %g1, %g7 |
| 4369 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4370 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 4371 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 4372 | .word 0xa1a00171 ! 326: FABSq dis not found |
| 4373 | |
| 4374 | mondo_80_249: |
| 4375 | nop |
| 4376 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4377 | stxa %r2, [%r0+0x3e8] %asi |
| 4378 | .word 0x9d904013 ! 327: WRPR_WSTATE_R wrpr %r1, %r19, %wstate |
| 4379 | #if (defined SPC || defined CMP) |
| 4380 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_250) + 24, 16, 16)) -> intp(5,0,15) |
| 4381 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_250)&0xffffffff) + 24, 16, 16)) -> intp(5,0,15) |
| 4382 | #else |
| 4383 | setx 0x7b5d3b618b516345, %r1, %r28 |
| 4384 | stxa %r28, [%g0] 0x73 |
| 4385 | #endif |
| 4386 | intvec_80_250: |
| 4387 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4388 | donret_80_251: |
| 4389 | nop |
| 4390 | ta T_CHANGE_HPRIV ! macro |
| 4391 | rd %pc, %r12 |
| 4392 | add %r12, (donretarg_80_251-donret_80_251-4), %r12 |
| 4393 | mov 0x38, %r18 |
| 4394 | stxa %r12, [%r18]0x58 |
| 4395 | add %r12, 0x4, %r11 |
| 4396 | wrpr %g0, 0x2, %tl |
| 4397 | wrpr %g0, %r12, %tpc |
| 4398 | wrpr %g0, %r11, %tnpc |
| 4399 | set (0x00a2ddc9 | (0x89 << 24)), %r13 |
| 4400 | rdpr %tstate, %r16 |
| 4401 | mov 0x1f, %r19 |
| 4402 | and %r19, %r16, %r17 |
| 4403 | andn %r16, %r19, %r16 |
| 4404 | or %r16, %r17, %r20 |
| 4405 | wrpr %r20, %g0, %tstate |
| 4406 | wrhpr %g0, 0xac5, %htstate |
| 4407 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 4408 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 4409 | done |
| 4410 | donretarg_80_251: |
| 4411 | .word 0x91a209d4 ! 329: FDIVd fdivd %f8, %f20, %f8 |
| 4412 | .word 0xd4c7e158 ! 330: LDSWA_I ldswa [%r31, + 0x0158] %asi, %r10 |
| 4413 | .word 0xc1bfe140 ! 331: STDFA_I stda %f0, [0x0140, %r31] |
| 4414 | nop |
| 4415 | mov 0x80, %g3 |
| 4416 | stxa %g3, [%g3] 0x57 |
| 4417 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 4418 | br_badelay3_80_252: |
| 4419 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 4420 | .word 0x897af0b9 ! Random illegal ? |
| 4421 | .word 0x95a00554 ! 1: FSQRTd fsqrt |
| 4422 | .word 0x9ba4c82a ! 333: FADDs fadds %f19, %f10, %f13 |
| 4423 | splash_hpstate_80_253: |
| 4424 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 4425 | .word 0x81982c56 ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x0c56, %hpstate |
| 4426 | mondo_80_254: |
| 4427 | nop |
| 4428 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4429 | ta T_CHANGE_PRIV |
| 4430 | stxa %r20, [%r0+0x3c0] %asi |
| 4431 | .word 0x9d94000b ! 335: WRPR_WSTATE_R wrpr %r16, %r11, %wstate |
| 4432 | .word 0xe33fc010 ! 1: STDF_R std %f17, [%r16, %r31] |
| 4433 | .word 0x9f802e60 ! 336: SIR sir 0x0e60 |
| 4434 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4435 | reduce_priv_lvl_80_255: |
| 4436 | ta T_CHANGE_NONHPRIV ! macro |
| 4437 | .word 0xe277e1a6 ! 338: STX_I stx %r17, [%r31 + 0x01a6] |
| 4438 | pmu_80_256: |
| 4439 | nop |
| 4440 | ta T_CHANGE_PRIV |
| 4441 | setx 0xfffff715fffff641, %g1, %g7 |
| 4442 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4443 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 4444 | otherw |
| 4445 | mov 0x32, %r30 |
| 4446 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 4447 | .word 0xe227e188 ! 342: STW_I stw %r17, [%r31 + 0x0188] |
| 4448 | setx 0xccc14dd6b57aa4f9, %r1, %r28 |
| 4449 | stxa %r28, [%g0] 0x73 |
| 4450 | intvec_80_257: |
| 4451 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4452 | jmptr_80_258: |
| 4453 | nop |
| 4454 | best_set_reg(0xe0a00000, %r20, %r27) |
| 4455 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 4456 | donret_80_259: |
| 4457 | nop |
| 4458 | ta T_CHANGE_HPRIV ! macro |
| 4459 | rd %pc, %r12 |
| 4460 | add %r12, (donretarg_80_259-donret_80_259-4), %r12 |
| 4461 | mov 0x38, %r18 |
| 4462 | stxa %r12, [%r18]0x58 |
| 4463 | add %r12, 0x4, %r11 |
| 4464 | wrpr %g0, 0x2, %tl |
| 4465 | wrpr %g0, %r12, %tpc |
| 4466 | wrpr %g0, %r11, %tnpc |
| 4467 | set (0x009de0b3 | (0x83 << 24)), %r13 |
| 4468 | rdpr %tstate, %r16 |
| 4469 | mov 0x1f, %r19 |
| 4470 | and %r19, %r16, %r17 |
| 4471 | andn %r16, %r19, %r16 |
| 4472 | or %r16, %r17, %r20 |
| 4473 | wrpr %r20, %g0, %tstate |
| 4474 | wrhpr %g0, 0x1c1b, %htstate |
| 4475 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 4476 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 4477 | done |
| 4478 | donretarg_80_259: |
| 4479 | .word 0x95a409c3 ! 345: FDIVd fdivd %f16, %f34, %f10 |
| 4480 | jmptr_80_260: |
| 4481 | nop |
| 4482 | best_set_reg(0xe0a00000, %r20, %r27) |
| 4483 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 4484 | .word 0xa9a00165 ! 347: FABSq dis not found |
| 4485 | |
| 4486 | .word 0xa4c4b62b ! 348: ADDCcc_I addccc %r18, 0xfffff62b, %r18 |
| 4487 | mondo_80_262: |
| 4488 | nop |
| 4489 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4490 | stxa %r17, [%r0+0x3e8] %asi |
| 4491 | .word 0x9d94c006 ! 349: WRPR_WSTATE_R wrpr %r19, %r6, %wstate |
| 4492 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 4493 | .word 0x8d903e6f ! 350: WRPR_PSTATE_I wrpr %r0, 0x1e6f, %pstate |
| 4494 | .word 0xe19fe080 ! 351: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 4495 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 4496 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4497 | reduce_priv_lvl_80_265: |
| 4498 | ta T_CHANGE_NONHPRIV ! macro |
| 4499 | #if (defined SPC || defined CMP) |
| 4500 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_266) + 40, 16, 16)) -> intp(1,0,23) |
| 4501 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_266)&0xffffffff) + 40, 16, 16)) -> intp(1,0,23) |
| 4502 | #else |
| 4503 | setx 0xf808d178c2f0f615, %r1, %r28 |
| 4504 | stxa %r28, [%g0] 0x73 |
| 4505 | #endif |
| 4506 | intvec_80_266: |
| 4507 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4508 | vahole_80_267: |
| 4509 | nop |
| 4510 | ta T_CHANGE_NONHPRIV |
| 4511 | setx vahole_target1, %r18, %r27 |
| 4512 | jmpl %r27+0, %r27 |
| 4513 | .word 0xe69fe090 ! 355: LDDA_I ldda [%r31, + 0x0090] %asi, %r19 |
| 4514 | .word 0xc19fe180 ! 356: LDDFA_I ldda [%r31, 0x0180], %f0 |
| 4515 | #if (defined SPC || defined CMP) |
| 4516 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_268)+40, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4517 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_268)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4518 | #else |
| 4519 | !! TODO:Generate XIR via RESET_GEN register |
| 4520 | ! setx 0x8900000808, %r16, %r17 |
| 4521 | ! mov 0x2, %r16 |
| 4522 | ! stw %r16, [%r17] |
| 4523 | #endif |
| 4524 | xir_80_268: |
| 4525 | .word 0xa9816d7c ! 357: WR_SET_SOFTINT_I wr %r5, 0x0d7c, %set_softint |
| 4526 | setx 0xb39735ff13694140, %r1, %r28 |
| 4527 | stxa %r28, [%g0] 0x73 |
| 4528 | intvec_80_269: |
| 4529 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4530 | nop |
| 4531 | ta T_CHANGE_HPRIV |
| 4532 | mov 0x80+1, %r10 |
| 4533 | set sync_thr_counter5, %r23 |
| 4534 | #ifndef SPC |
| 4535 | ldxa [%g0]0x63, %o1 |
| 4536 | and %o1, 0x38, %o1 |
| 4537 | add %o1, %r23, %r23 |
| 4538 | sllx %o1, 5, %o3 !(CID*256) |
| 4539 | #endif |
| 4540 | cas [%r23],%g0,%r10 !lock |
| 4541 | brnz %r10, cwq_80_270 |
| 4542 | rd %asi, %r12 |
| 4543 | wr %g0, 0x40, %asi |
| 4544 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4545 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4546 | cmp %l1, 1 |
| 4547 | bne cwq_80_270 |
| 4548 | set CWQ_BASE, %l6 |
| 4549 | #ifndef SPC |
| 4550 | add %l6, %o3, %l6 |
| 4551 | #endif |
| 4552 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4553 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 4554 | sllx %l2, 32, %l2 |
| 4555 | stx %l2, [%l6 + 0x0] |
| 4556 | membar #Sync |
| 4557 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4558 | sub %l2, 0x40, %l2 |
| 4559 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4560 | wr %r12, %g0, %asi |
| 4561 | st %g0, [%r23] |
| 4562 | cwq_80_270: |
| 4563 | ta T_CHANGE_NONHPRIV |
| 4564 | .word 0xa3414000 ! 359: RDPC rd %pc, %r17 |
| 4565 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 4566 | br_longdelay1_80_272: |
| 4567 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 4568 | .word 0xbfefc000 ! 361: RESTORE_R restore %r31, %r0, %r31 |
| 4569 | fpinit_80_273: |
| 4570 | nop |
| 4571 | setx fp_data_quads, %r19, %r20 |
| 4572 | ldd [%r20], %f0 |
| 4573 | ldd [%r20+8], %f4 |
| 4574 | ld [%r20+16], %fsr |
| 4575 | ld [%r20+24], %r19 |
| 4576 | wr %r19, %g0, %gsr |
| 4577 | .word 0xc3e8376b ! 362: PREFETCHA_I prefetcha [%r0, + 0xfffff76b] %asi, #one_read |
| 4578 | jmptr_80_274: |
| 4579 | nop |
| 4580 | best_set_reg(0xe0a00000, %r20, %r27) |
| 4581 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 4582 | ta T_CHANGE_NONHPRIV |
| 4583 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 4584 | intveclr_80_276: |
| 4585 | nop |
| 4586 | ta T_CHANGE_HPRIV |
| 4587 | setx 0x7c4b67a3577f2b7e, %r1, %r28 |
| 4588 | stxa %r28, [%g0] 0x72 |
| 4589 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4590 | nop |
| 4591 | ta T_CHANGE_HPRIV |
| 4592 | mov 0x80+1, %r10 |
| 4593 | set sync_thr_counter5, %r23 |
| 4594 | #ifndef SPC |
| 4595 | ldxa [%g0]0x63, %o1 |
| 4596 | and %o1, 0x38, %o1 |
| 4597 | add %o1, %r23, %r23 |
| 4598 | sllx %o1, 5, %o3 !(CID*256) |
| 4599 | #endif |
| 4600 | cas [%r23],%g0,%r10 !lock |
| 4601 | brnz %r10, cwq_80_277 |
| 4602 | rd %asi, %r12 |
| 4603 | wr %g0, 0x40, %asi |
| 4604 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4605 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4606 | cmp %l1, 1 |
| 4607 | bne cwq_80_277 |
| 4608 | set CWQ_BASE, %l6 |
| 4609 | #ifndef SPC |
| 4610 | add %l6, %o3, %l6 |
| 4611 | #endif |
| 4612 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4613 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 4614 | sllx %l2, 32, %l2 |
| 4615 | stx %l2, [%l6 + 0x0] |
| 4616 | membar #Sync |
| 4617 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4618 | sub %l2, 0x40, %l2 |
| 4619 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4620 | wr %r12, %g0, %asi |
| 4621 | st %g0, [%r23] |
| 4622 | cwq_80_277: |
| 4623 | ta T_CHANGE_NONHPRIV |
| 4624 | .word 0xa1414000 ! 366: RDPC rd %pc, %r16 |
| 4625 | brcommon3_80_278: |
| 4626 | nop |
| 4627 | setx common_target, %r12, %r27 |
| 4628 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4629 | ba,a .+12 |
| 4630 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 4631 | ba,a .+8 |
| 4632 | jmpl %r27+0, %r27 |
| 4633 | .word 0xd89fc02d ! 367: LDDA_R ldda [%r31, %r13] 0x01, %r12 |
| 4634 | .word 0xd827e084 ! 368: STW_I stw %r12, [%r31 + 0x0084] |
| 4635 | .word 0xd8c7e158 ! 369: LDSWA_I ldswa [%r31, + 0x0158] %asi, %r12 |
| 4636 | #if (defined SPC || defined CMP) |
| 4637 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_279)+16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4638 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_279)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 4639 | #else |
| 4640 | !! TODO:Generate XIR via RESET_GEN register |
| 4641 | ! setx 0x8900000808, %r16, %r17 |
| 4642 | ! mov 0x2, %r16 |
| 4643 | ! stw %r16, [%r17] |
| 4644 | #endif |
| 4645 | xir_80_279: |
| 4646 | .word 0xa981e3d7 ! 370: WR_SET_SOFTINT_I wr %r7, 0x03d7, %set_softint |
| 4647 | nop |
| 4648 | ta T_CHANGE_HPRIV |
| 4649 | mov 0x80+1, %r10 |
| 4650 | set sync_thr_counter5, %r23 |
| 4651 | #ifndef SPC |
| 4652 | ldxa [%g0]0x63, %o1 |
| 4653 | and %o1, 0x38, %o1 |
| 4654 | add %o1, %r23, %r23 |
| 4655 | sllx %o1, 5, %o3 !(CID*256) |
| 4656 | #endif |
| 4657 | cas [%r23],%g0,%r10 !lock |
| 4658 | brnz %r10, cwq_80_280 |
| 4659 | rd %asi, %r12 |
| 4660 | wr %g0, 0x40, %asi |
| 4661 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4662 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4663 | cmp %l1, 1 |
| 4664 | bne cwq_80_280 |
| 4665 | set CWQ_BASE, %l6 |
| 4666 | #ifndef SPC |
| 4667 | add %l6, %o3, %l6 |
| 4668 | #endif |
| 4669 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4670 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 4671 | sllx %l2, 32, %l2 |
| 4672 | stx %l2, [%l6 + 0x0] |
| 4673 | membar #Sync |
| 4674 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4675 | sub %l2, 0x40, %l2 |
| 4676 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4677 | wr %r12, %g0, %asi |
| 4678 | st %g0, [%r23] |
| 4679 | cwq_80_280: |
| 4680 | ta T_CHANGE_NONHPRIV |
| 4681 | .word 0x93414000 ! 371: RDPC rd %pc, %r9 |
| 4682 | .word 0xd4cfe058 ! 372: LDSBA_I ldsba [%r31, + 0x0058] %asi, %r10 |
| 4683 | splash_cmpr_80_281: |
| 4684 | mov 0, %r18 |
| 4685 | sllx %r18, 63, %r18 |
| 4686 | rd %tick, %r17 |
| 4687 | add %r17, 0x70, %r17 |
| 4688 | or %r17, %r18, %r17 |
| 4689 | ta T_CHANGE_HPRIV |
| 4690 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4691 | .word 0xaf800011 ! 373: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4692 | nop |
| 4693 | ta T_CHANGE_HPRIV |
| 4694 | mov 0x80, %r10 |
| 4695 | set sync_thr_counter6, %r23 |
| 4696 | #ifndef SPC |
| 4697 | ldxa [%g0]0x63, %o1 |
| 4698 | and %o1, 0x38, %o1 |
| 4699 | add %o1, %r23, %r23 |
| 4700 | #endif |
| 4701 | cas [%r23],%g0,%r10 !lock |
| 4702 | brnz %r10, sma_80_282 |
| 4703 | rd %asi, %r12 |
| 4704 | wr %g0, 0x40, %asi |
| 4705 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4706 | set 0x00161fff, %g1 |
| 4707 | stxa %g1, [%g0 + 0x80] %asi |
| 4708 | wr %r12, %g0, %asi |
| 4709 | st %g0, [%r23] |
| 4710 | sma_80_282: |
| 4711 | ta T_CHANGE_NONHPRIV |
| 4712 | .word 0xd5e7e012 ! 374: CASA_R casa [%r31] %asi, %r18, %r10 |
| 4713 | br_badelay2_80_283: |
| 4714 | .word 0x93a509c6 ! 1: FDIVd fdivd %f20, %f6, %f40 |
| 4715 | pdist %f22, %f4, %f22 |
| 4716 | .word 0x91b14310 ! 375: ALIGNADDRESS alignaddr %r5, %r16, %r8 |
| 4717 | .word 0xc19fe000 ! 376: LDDFA_I ldda [%r31, 0x0000], %f0 |
| 4718 | .word 0xd43fc00c ! 1: STD_R std %r10, [%r31 + %r12] |
| 4719 | .word 0x9f802373 ! 377: SIR sir 0x0373 |
| 4720 | .word 0xc1bfdc00 ! 378: STDFA_R stda %f0, [%r0, %r31] |
| 4721 | .word 0x98dc0012 ! 379: SMULcc_R smulcc %r16, %r18, %r12 |
| 4722 | fbge skip_80_284 |
| 4723 | fbn skip_80_284 |
| 4724 | .align 2048 |
| 4725 | skip_80_284: |
| 4726 | .word 0xe83fc000 ! 380: STD_R std %r20, [%r31 + %r0] |
| 4727 | nop |
| 4728 | ta T_CHANGE_HPRIV |
| 4729 | mov 0x80+1, %r10 |
| 4730 | set sync_thr_counter5, %r23 |
| 4731 | #ifndef SPC |
| 4732 | ldxa [%g0]0x63, %o1 |
| 4733 | and %o1, 0x38, %o1 |
| 4734 | add %o1, %r23, %r23 |
| 4735 | sllx %o1, 5, %o3 !(CID*256) |
| 4736 | #endif |
| 4737 | cas [%r23],%g0,%r10 !lock |
| 4738 | brnz %r10, cwq_80_285 |
| 4739 | rd %asi, %r12 |
| 4740 | wr %g0, 0x40, %asi |
| 4741 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4742 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4743 | cmp %l1, 1 |
| 4744 | bne cwq_80_285 |
| 4745 | set CWQ_BASE, %l6 |
| 4746 | #ifndef SPC |
| 4747 | add %l6, %o3, %l6 |
| 4748 | #endif |
| 4749 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4750 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 4751 | sllx %l2, 32, %l2 |
| 4752 | stx %l2, [%l6 + 0x0] |
| 4753 | membar #Sync |
| 4754 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4755 | sub %l2, 0x40, %l2 |
| 4756 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4757 | wr %r12, %g0, %asi |
| 4758 | st %g0, [%r23] |
| 4759 | cwq_80_285: |
| 4760 | ta T_CHANGE_NONHPRIV |
| 4761 | .word 0xa5414000 ! 381: RDPC rd %pc, %r18 |
| 4762 | brcommon3_80_286: |
| 4763 | nop |
| 4764 | setx common_target, %r12, %r27 |
| 4765 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4766 | ba,a .+12 |
| 4767 | .word 0xdb37c010 ! 1: STQF_R - %f13, [%r16, %r31] |
| 4768 | ba,a .+8 |
| 4769 | jmpl %r27+0, %r27 |
| 4770 | .word 0xdbe7e00b ! 382: CASA_R casa [%r31] %asi, %r11, %r13 |
| 4771 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 4772 | iaw_80_287: |
| 4773 | nop |
| 4774 | ta T_CHANGE_HPRIV |
| 4775 | mov 8, %r18 |
| 4776 | rd %asi, %r12 |
| 4777 | wr %r0, 0x41, %asi |
| 4778 | set sync_thr_counter4, %r23 |
| 4779 | #ifndef SPC |
| 4780 | ldxa [%g0]0x63, %r8 |
| 4781 | and %r8, 0x38, %r8 ! Core ID |
| 4782 | add %r8, %r23, %r23 |
| 4783 | #else |
| 4784 | mov 0, %r8 |
| 4785 | #endif |
| 4786 | mov 0x80, %r16 |
| 4787 | iaw_startwait80_287: |
| 4788 | cas [%r23],%g0,%r16 !lock |
| 4789 | brz,a %r16, continue_iaw_80_287 |
| 4790 | mov (~0x80&0xf0), %r16 |
| 4791 | ld [%r23], %r16 |
| 4792 | iaw_wait80_287: |
| 4793 | brnz %r16, iaw_wait80_287 |
| 4794 | ld [%r23], %r16 |
| 4795 | ba iaw_startwait80_287 |
| 4796 | mov 0x80, %r16 |
| 4797 | continue_iaw_80_287: |
| 4798 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4799 | ldxa [0x58]%asi, %r17 !Running_status |
| 4800 | wait_for_stat_80_287: |
| 4801 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4802 | cmp %r13, %r17 |
| 4803 | bne,a wait_for_stat_80_287 |
| 4804 | ldxa [0x58]%asi, %r17 !Running_status |
| 4805 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4806 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4807 | wait_for_iaw_80_287: |
| 4808 | ldxa [0x58]%asi, %r17 !Running_status |
| 4809 | cmp %r14, %r17 |
| 4810 | bne,a wait_for_iaw_80_287 |
| 4811 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4812 | iaw_doit80_287: |
| 4813 | mov 0x38, %r18 |
| 4814 | iaw4_80_287: |
| 4815 | setx common_target, %r20, %r19 |
| 4816 | or %r19, 0x1, %r19 |
| 4817 | stxa %r19, [%r18]0x50 |
| 4818 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4819 | st %g0, [%r23] !clear lock |
| 4820 | wr %r0, %r12, %asi ! restore %asi |
| 4821 | ta T_CHANGE_NONHPRIV |
| 4822 | .word 0xdb1fe190 ! 384: LDDF_I ldd [%r31, 0x0190], %f13 |
| 4823 | #if (defined SPC || defined CMP) |
| 4824 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_288) + 56, 16, 16)) -> intp(1,0,10) |
| 4825 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_288)&0xffffffff) + 56, 16, 16)) -> intp(1,0,10) |
| 4826 | #else |
| 4827 | setx 0xda0a01bf0f0d69dc, %r1, %r28 |
| 4828 | stxa %r28, [%g0] 0x73 |
| 4829 | #endif |
| 4830 | intvec_80_288: |
| 4831 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4832 | tagged_80_289: |
| 4833 | taddcctv %r5, 0x1618, %r18 |
| 4834 | .word 0xda07e110 ! 386: LDUW_I lduw [%r31 + 0x0110], %r13 |
| 4835 | ibp_80_290: |
| 4836 | nop |
| 4837 | .word 0xc1bfda00 ! 387: STDFA_R stda %f0, [%r0, %r31] |
| 4838 | cwp_80_291: |
| 4839 | set user_data_start, %o7 |
| 4840 | .word 0x93902007 ! 388: WRPR_CWP_I wrpr %r0, 0x0007, %cwp |
| 4841 | pmu_80_292: |
| 4842 | nop |
| 4843 | ta T_CHANGE_PRIV |
| 4844 | setx 0xfffff483fffff2d9, %g1, %g7 |
| 4845 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4846 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4847 | reduce_priv_lvl_80_293: |
| 4848 | ta T_CHANGE_NONPRIV ! macro |
| 4849 | ceter_80_294: |
| 4850 | nop |
| 4851 | ta T_CHANGE_HPRIV |
| 4852 | mov 3, %r17 |
| 4853 | sllx %r17, 60, %r17 |
| 4854 | mov 0x18, %r16 |
| 4855 | stxa %r17, [%r16]0x4c |
| 4856 | .word 0x97410000 ! 391: RDTICK rd %tick, %r11 |
| 4857 | cwp_80_295: |
| 4858 | set user_data_start, %o7 |
| 4859 | .word 0x93902003 ! 392: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 4860 | splash_lsu_80_296: |
| 4861 | nop |
| 4862 | ta T_CHANGE_HPRIV |
| 4863 | set 0xff34dc49, %r2 |
| 4864 | mov 0x7, %r1 |
| 4865 | sllx %r1, 32, %r1 |
| 4866 | or %r1, %r2, %r2 |
| 4867 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4868 | ta T_CHANGE_NONHPRIV |
| 4869 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4870 | intveclr_80_297: |
| 4871 | nop |
| 4872 | ta T_CHANGE_HPRIV |
| 4873 | setx 0xd48d4d471b443b9f, %r1, %r28 |
| 4874 | stxa %r28, [%g0] 0x72 |
| 4875 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4876 | nop |
| 4877 | mov 0x80, %g3 |
| 4878 | stxa %g3, [%g3] 0x57 |
| 4879 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 4880 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4881 | reduce_priv_lvl_80_298: |
| 4882 | ta T_CHANGE_NONPRIV ! macro |
| 4883 | dvapa_80_299: |
| 4884 | nop |
| 4885 | ta T_CHANGE_HPRIV |
| 4886 | mov 0x908, %r20 |
| 4887 | mov 0xc, %r19 |
| 4888 | sllx %r20, 23, %r20 |
| 4889 | or %r19, %r20, %r19 |
| 4890 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4891 | mov 0x38, %r18 |
| 4892 | stxa %r31, [%r18]0x58 |
| 4893 | ta T_CHANGE_NONHPRIV |
| 4894 | .word 0xe31fe1e0 ! 397: LDDF_I ldd [%r31, 0x01e0], %f17 |
| 4895 | mondo_80_300: |
| 4896 | nop |
| 4897 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4898 | stxa %r9, [%r0+0x3c0] %asi |
| 4899 | .word 0x9d914013 ! 398: WRPR_WSTATE_R wrpr %r5, %r19, %wstate |
| 4900 | .word 0xe19fc2c0 ! 399: LDDFA_R ldda [%r31, %r0], %f16 |
| 4901 | splash_decr_80_301: |
| 4902 | nop |
| 4903 | ta T_CHANGE_HPRIV |
| 4904 | mov 8, %r1 |
| 4905 | stxa %r8, [%r1] 0x45 |
| 4906 | .word 0xa7850013 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r20, %r19, %- |
| 4907 | #if (defined SPC || defined CMP) |
| 4908 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_302) + 40, 16, 16)) -> intp(0,0,5) |
| 4909 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_302)&0xffffffff) + 40, 16, 16)) -> intp(0,0,5) |
| 4910 | #else |
| 4911 | setx 0x2ca8add2c77b2524, %r1, %r28 |
| 4912 | stxa %r28, [%g0] 0x73 |
| 4913 | #endif |
| 4914 | intvec_80_302: |
| 4915 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4916 | brcommon2_80_303: |
| 4917 | nop |
| 4918 | setx common_target, %r12, %r27 |
| 4919 | ba,a .+12 |
| 4920 | .word 0x9ba00546 ! 1: FSQRTd fsqrt |
| 4921 | ba,a .+8 |
| 4922 | jmpl %r27+0, %r27 |
| 4923 | .word 0xe19fda00 ! 402: LDDFA_R ldda [%r31, %r0], %f16 |
| 4924 | nop |
| 4925 | ta T_CHANGE_HPRIV |
| 4926 | mov 0x80, %r10 |
| 4927 | set sync_thr_counter6, %r23 |
| 4928 | #ifndef SPC |
| 4929 | ldxa [%g0]0x63, %o1 |
| 4930 | and %o1, 0x38, %o1 |
| 4931 | add %o1, %r23, %r23 |
| 4932 | #endif |
| 4933 | cas [%r23],%g0,%r10 !lock |
| 4934 | brnz %r10, sma_80_304 |
| 4935 | rd %asi, %r12 |
| 4936 | wr %g0, 0x40, %asi |
| 4937 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4938 | set 0x00021fff, %g1 |
| 4939 | stxa %g1, [%g0 + 0x80] %asi |
| 4940 | wr %r12, %g0, %asi |
| 4941 | st %g0, [%r23] |
| 4942 | sma_80_304: |
| 4943 | ta T_CHANGE_NONHPRIV |
| 4944 | .word 0xd3e7e011 ! 403: CASA_R casa [%r31] %asi, %r17, %r9 |
| 4945 | pmu_80_305: |
| 4946 | nop |
| 4947 | setx 0xfffffd78fffffe42, %g1, %g7 |
| 4948 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4949 | jmptr_80_306: |
| 4950 | nop |
| 4951 | best_set_reg(0xe0a00000, %r20, %r27) |
| 4952 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 4953 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 4954 | #if (defined SPC || defined CMP) |
| 4955 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_308) + 0, 16, 16)) -> intp(3,0,9) |
| 4956 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_308)&0xffffffff) + 0, 16, 16)) -> intp(3,0,9) |
| 4957 | #else |
| 4958 | setx 0xfdef7f71976709a2, %r1, %r28 |
| 4959 | stxa %r28, [%g0] 0x73 |
| 4960 | #endif |
| 4961 | intvec_80_308: |
| 4962 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4963 | splash_hpstate_80_309: |
| 4964 | .word 0x819838df ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x18df, %hpstate |
| 4965 | br_badelay2_80_310: |
| 4966 | .word 0xa5a4c9c3 ! 1: FDIVd fdivd %f50, %f34, %f18 |
| 4967 | pdist %f2, %f16, %f24 |
| 4968 | .word 0x99b44306 ! 409: ALIGNADDRESS alignaddr %r17, %r6, %r12 |
| 4969 | splash_cmpr_80_311: |
| 4970 | mov 0, %r18 |
| 4971 | sllx %r18, 63, %r18 |
| 4972 | rd %tick, %r17 |
| 4973 | add %r17, 0x80, %r17 |
| 4974 | or %r17, %r18, %r17 |
| 4975 | ta T_CHANGE_HPRIV |
| 4976 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4977 | ta T_CHANGE_PRIV |
| 4978 | .word 0xaf800011 ! 410: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4979 | nop |
| 4980 | ta T_CHANGE_HPRIV |
| 4981 | mov 0x80, %r10 |
| 4982 | set sync_thr_counter6, %r23 |
| 4983 | #ifndef SPC |
| 4984 | ldxa [%g0]0x63, %o1 |
| 4985 | and %o1, 0x38, %o1 |
| 4986 | add %o1, %r23, %r23 |
| 4987 | #endif |
| 4988 | cas [%r23],%g0,%r10 !lock |
| 4989 | brnz %r10, sma_80_312 |
| 4990 | rd %asi, %r12 |
| 4991 | wr %g0, 0x40, %asi |
| 4992 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4993 | set 0x00021fff, %g1 |
| 4994 | stxa %g1, [%g0 + 0x80] %asi |
| 4995 | wr %r12, %g0, %asi |
| 4996 | st %g0, [%r23] |
| 4997 | sma_80_312: |
| 4998 | ta T_CHANGE_NONHPRIV |
| 4999 | .word 0xe5e7e014 ! 411: CASA_R casa [%r31] %asi, %r20, %r18 |
| 5000 | #if (defined SPC || defined CMP) |
| 5001 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_313)+16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 5002 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_313)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 5003 | #else |
| 5004 | !! TODO:Generate XIR via RESET_GEN register |
| 5005 | ! setx 0x8900000808, %r16, %r17 |
| 5006 | ! mov 0x2, %r16 |
| 5007 | ! stw %r16, [%r17] |
| 5008 | #endif |
| 5009 | xir_80_313: |
| 5010 | .word 0xa9842d89 ! 412: WR_SET_SOFTINT_I wr %r16, 0x0d89, %set_softint |
| 5011 | memptr_80_314: |
| 5012 | set 0x60740000, %r31 |
| 5013 | .word 0x8582aae7 ! 413: WRCCR_I wr %r10, 0x0ae7, %ccr |
| 5014 | .word 0x91944005 ! 414: WRPR_PIL_R wrpr %r17, %r5, %pil |
| 5015 | .word 0xe4dfc034 ! 1: LDXA_R ldxa [%r31, %r20] 0x01, %r18 |
| 5016 | .word 0x9f802647 ! 415: SIR sir 0x0647 |
| 5017 | nop |
| 5018 | ta T_CHANGE_HPRIV |
| 5019 | mov 0x80+1, %r10 |
| 5020 | set sync_thr_counter5, %r23 |
| 5021 | #ifndef SPC |
| 5022 | ldxa [%g0]0x63, %o1 |
| 5023 | and %o1, 0x38, %o1 |
| 5024 | add %o1, %r23, %r23 |
| 5025 | sllx %o1, 5, %o3 !(CID*256) |
| 5026 | #endif |
| 5027 | cas [%r23],%g0,%r10 !lock |
| 5028 | brnz %r10, cwq_80_316 |
| 5029 | rd %asi, %r12 |
| 5030 | wr %g0, 0x40, %asi |
| 5031 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5032 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5033 | cmp %l1, 1 |
| 5034 | bne cwq_80_316 |
| 5035 | set CWQ_BASE, %l6 |
| 5036 | #ifndef SPC |
| 5037 | add %l6, %o3, %l6 |
| 5038 | #endif |
| 5039 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5040 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 5041 | sllx %l2, 32, %l2 |
| 5042 | stx %l2, [%l6 + 0x0] |
| 5043 | membar #Sync |
| 5044 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5045 | sub %l2, 0x40, %l2 |
| 5046 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5047 | wr %r12, %g0, %asi |
| 5048 | st %g0, [%r23] |
| 5049 | cwq_80_316: |
| 5050 | ta T_CHANGE_NONHPRIV |
| 5051 | .word 0x97414000 ! 416: RDPC rd %pc, %r11 |
| 5052 | intveclr_80_317: |
| 5053 | nop |
| 5054 | ta T_CHANGE_HPRIV |
| 5055 | setx 0xa93bf5bf27573783, %r1, %r28 |
| 5056 | stxa %r28, [%g0] 0x72 |
| 5057 | ta T_CHANGE_NONHPRIV |
| 5058 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5059 | splash_cmpr_80_318: |
| 5060 | mov 0, %r18 |
| 5061 | sllx %r18, 63, %r18 |
| 5062 | rd %tick, %r17 |
| 5063 | add %r17, 0x50, %r17 |
| 5064 | or %r17, %r18, %r17 |
| 5065 | ta T_CHANGE_HPRIV |
| 5066 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5067 | ta T_CHANGE_PRIV |
| 5068 | .word 0xaf800011 ! 418: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5069 | setx 0x0865abc4825f0c7e, %r1, %r28 |
| 5070 | stxa %r28, [%g0] 0x73 |
| 5071 | intvec_80_319: |
| 5072 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5073 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5074 | reduce_priv_lvl_80_320: |
| 5075 | ta T_CHANGE_NONHPRIV ! macro |
| 5076 | mondo_80_321: |
| 5077 | nop |
| 5078 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5079 | stxa %r19, [%r0+0x3d8] %asi |
| 5080 | .word 0x9d94c005 ! 421: WRPR_WSTATE_R wrpr %r19, %r5, %wstate |
| 5081 | splash_lsu_80_322: |
| 5082 | nop |
| 5083 | ta T_CHANGE_HPRIV |
| 5084 | set 0xcc05f1ea, %r2 |
| 5085 | mov 0x1, %r1 |
| 5086 | sllx %r1, 32, %r1 |
| 5087 | or %r1, %r2, %r2 |
| 5088 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5089 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5090 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 5091 | .word 0xda3fe0f1 ! 424: STD_I std %r13, [%r31 + 0x00f1] |
| 5092 | .word 0x91d02035 ! 425: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 5093 | otherw |
| 5094 | mov 0x32, %r30 |
| 5095 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 5096 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 5097 | .word 0x8d903035 ! 427: WRPR_PSTATE_I wrpr %r0, 0x1035, %pstate |
| 5098 | br_badelay2_80_324: |
| 5099 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 5100 | allclean |
| 5101 | .word 0x93b18307 ! 428: ALIGNADDRESS alignaddr %r6, %r7, %r9 |
| 5102 | vahole_80_325: |
| 5103 | nop |
| 5104 | ta T_CHANGE_NONHPRIV |
| 5105 | setx vahole_target0, %r18, %r27 |
| 5106 | jmpl %r27+0, %r27 |
| 5107 | .word 0xd697c034 ! 429: LDUHA_R lduha [%r31, %r20] 0x01, %r11 |
| 5108 | #if (defined SPC || defined CMP) |
| 5109 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_326) + 56, 16, 16)) -> intp(5,0,9) |
| 5110 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_326)&0xffffffff) + 56, 16, 16)) -> intp(5,0,9) |
| 5111 | #else |
| 5112 | setx 0x9a423153b99dc8ab, %r1, %r28 |
| 5113 | stxa %r28, [%g0] 0x73 |
| 5114 | #endif |
| 5115 | intvec_80_326: |
| 5116 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5117 | splash_hpstate_80_327: |
| 5118 | ta T_CHANGE_NONHPRIV |
| 5119 | .word 0x8198378f ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x178f, %hpstate |
| 5120 | splash_htba_80_328: |
| 5121 | nop |
| 5122 | ta T_CHANGE_HPRIV |
| 5123 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 5124 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 5125 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 5126 | .word 0x93b44549 ! 434: FCMPEQ16 fcmpeq16 %d48, %d40, %r9 |
| 5127 | donret_80_329: |
| 5128 | nop |
| 5129 | ta T_CHANGE_HPRIV ! macro |
| 5130 | rd %pc, %r12 |
| 5131 | add %r12, (donretarg_80_329-donret_80_329-4), %r12 |
| 5132 | mov 0x38, %r18 |
| 5133 | stxa %r12, [%r18]0x58 |
| 5134 | add %r12, 0x4, %r11 |
| 5135 | wrpr %g0, 0x1, %tl |
| 5136 | wrpr %g0, %r12, %tpc |
| 5137 | wrpr %g0, %r11, %tnpc |
| 5138 | set (0x00230d52 | (0x8b << 24)), %r13 |
| 5139 | rdpr %tstate, %r16 |
| 5140 | mov 0x1f, %r19 |
| 5141 | and %r19, %r16, %r17 |
| 5142 | andn %r16, %r19, %r16 |
| 5143 | or %r16, %r17, %r20 |
| 5144 | wrpr %r20, %g0, %tstate |
| 5145 | wrhpr %g0, 0xf0f, %htstate |
| 5146 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 5147 | done |
| 5148 | donretarg_80_329: |
| 5149 | .word 0xd8ffe1a2 ! 435: SWAPA_I swapa %r12, [%r31 + 0x01a2] %asi |
| 5150 | .word 0x91a18d26 ! 436: FsMULd fsmuld %f6, %f6, %f8 |
| 5151 | splash_tba_80_330: |
| 5152 | ta T_CHANGE_PRIV |
| 5153 | setx 0x00000000003a0000, %r11, %r12 |
| 5154 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5155 | nop |
| 5156 | mov 0x80, %g3 |
| 5157 | stxa %g3, [%g3] 0x57 |
| 5158 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 5159 | nop |
| 5160 | mov 0x80, %g3 |
| 5161 | stxa %g3, [%g3] 0x57 |
| 5162 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 5163 | donret_80_331: |
| 5164 | nop |
| 5165 | ta T_CHANGE_HPRIV ! macro |
| 5166 | rd %pc, %r12 |
| 5167 | add %r12, (donretarg_80_331-donret_80_331-4), %r12 |
| 5168 | mov 0x38, %r18 |
| 5169 | stxa %r12, [%r18]0x58 |
| 5170 | add %r12, 0x4, %r11 |
| 5171 | wrpr %g0, 0x1, %tl |
| 5172 | wrpr %g0, %r12, %tpc |
| 5173 | wrpr %g0, %r11, %tnpc |
| 5174 | set (0x00e03399 | (0x8a << 24)), %r13 |
| 5175 | rdpr %tstate, %r16 |
| 5176 | mov 0x1f, %r19 |
| 5177 | and %r19, %r16, %r17 |
| 5178 | andn %r16, %r19, %r16 |
| 5179 | or %r16, %r17, %r20 |
| 5180 | wrpr %r20, %g0, %tstate |
| 5181 | wrhpr %g0, 0x14f, %htstate |
| 5182 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 5183 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 5184 | done |
| 5185 | donretarg_80_331: |
| 5186 | .word 0xe26fe03e ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x003e] |
| 5187 | donret_80_332: |
| 5188 | nop |
| 5189 | ta T_CHANGE_HPRIV ! macro |
| 5190 | rd %pc, %r12 |
| 5191 | add %r12, (donretarg_80_332-donret_80_332-8), %r12 |
| 5192 | mov 0x38, %r18 |
| 5193 | stxa %r12, [%r18]0x58 |
| 5194 | add %r12, 0x4, %r11 |
| 5195 | wrpr %g0, 0x2, %tl |
| 5196 | wrpr %g0, %r12, %tpc |
| 5197 | wrpr %g0, %r11, %tnpc |
| 5198 | set (0x008ed0e5 | (4 << 24)), %r13 |
| 5199 | rdpr %tstate, %r16 |
| 5200 | mov 0x1f, %r19 |
| 5201 | and %r19, %r16, %r17 |
| 5202 | andn %r16, %r19, %r16 |
| 5203 | or %r16, %r17, %r20 |
| 5204 | wrpr %r20, %g0, %tstate |
| 5205 | wrhpr %g0, 0x1714, %htstate |
| 5206 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 5207 | retry |
| 5208 | donretarg_80_332: |
| 5209 | .word 0xa1a209c9 ! 441: FDIVd fdivd %f8, %f40, %f16 |
| 5210 | setx 0x763ca5ba3fcbcd89, %r1, %r28 |
| 5211 | stxa %r28, [%g0] 0x73 |
| 5212 | intvec_80_333: |
| 5213 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5214 | .word 0xe88fe000 ! 443: LDUBA_I lduba [%r31, + 0x0000] %asi, %r20 |
| 5215 | .word 0xe937e021 ! 444: STQF_I - %f20, [0x0021, %r31] |
| 5216 | ta T_CHANGE_NONHPRIV |
| 5217 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 5218 | iaw_80_335: |
| 5219 | nop |
| 5220 | ta T_CHANGE_HPRIV |
| 5221 | mov 8, %r18 |
| 5222 | rd %asi, %r12 |
| 5223 | wr %r0, 0x41, %asi |
| 5224 | set sync_thr_counter4, %r23 |
| 5225 | #ifndef SPC |
| 5226 | ldxa [%g0]0x63, %r8 |
| 5227 | and %r8, 0x38, %r8 ! Core ID |
| 5228 | add %r8, %r23, %r23 |
| 5229 | #else |
| 5230 | mov 0, %r8 |
| 5231 | #endif |
| 5232 | mov 0x80, %r16 |
| 5233 | iaw_startwait80_335: |
| 5234 | cas [%r23],%g0,%r16 !lock |
| 5235 | brz,a %r16, continue_iaw_80_335 |
| 5236 | mov (~0x80&0xf0), %r16 |
| 5237 | ld [%r23], %r16 |
| 5238 | iaw_wait80_335: |
| 5239 | brnz %r16, iaw_wait80_335 |
| 5240 | ld [%r23], %r16 |
| 5241 | ba iaw_startwait80_335 |
| 5242 | mov 0x80, %r16 |
| 5243 | continue_iaw_80_335: |
| 5244 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5245 | ldxa [0x58]%asi, %r17 !Running_status |
| 5246 | wait_for_stat_80_335: |
| 5247 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5248 | cmp %r13, %r17 |
| 5249 | bne,a wait_for_stat_80_335 |
| 5250 | ldxa [0x58]%asi, %r17 !Running_status |
| 5251 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5252 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5253 | wait_for_iaw_80_335: |
| 5254 | ldxa [0x58]%asi, %r17 !Running_status |
| 5255 | cmp %r14, %r17 |
| 5256 | bne,a wait_for_iaw_80_335 |
| 5257 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5258 | iaw_doit80_335: |
| 5259 | mov 0x38, %r18 |
| 5260 | iaw4_80_335: |
| 5261 | setx common_target, %r20, %r19 |
| 5262 | or %r19, 0x1, %r19 |
| 5263 | stxa %r19, [%r18]0x50 |
| 5264 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 5265 | st %g0, [%r23] !clear lock |
| 5266 | wr %r0, %r12, %asi ! restore %asi |
| 5267 | ta T_CHANGE_NONHPRIV |
| 5268 | .word 0xa7a089a3 ! 446: FDIVs fdivs %f2, %f3, %f19 |
| 5269 | brcommon2_80_336: |
| 5270 | nop |
| 5271 | setx common_target, %r12, %r27 |
| 5272 | ba,a .+12 |
| 5273 | .word 0xd512c011 ! 1: LDQF_R - [%r11, %r17], %f10 |
| 5274 | ba,a .+8 |
| 5275 | jmpl %r27+0, %r27 |
| 5276 | .word 0xe1bfdc00 ! 447: STDFA_R stda %f16, [%r0, %r31] |
| 5277 | .word 0xa24d0012 ! 448: MULX_R mulx %r20, %r18, %r17 |
| 5278 | splash_lsu_80_337: |
| 5279 | nop |
| 5280 | ta T_CHANGE_HPRIV |
| 5281 | set 0xadcd0119, %r2 |
| 5282 | mov 0x3, %r1 |
| 5283 | sllx %r1, 32, %r1 |
| 5284 | or %r1, %r2, %r2 |
| 5285 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5286 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5287 | mondo_80_338: |
| 5288 | nop |
| 5289 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5290 | ta T_CHANGE_PRIV |
| 5291 | stxa %r18, [%r0+0x3d8] %asi |
| 5292 | .word 0x9d914006 ! 450: WRPR_WSTATE_R wrpr %r5, %r6, %wstate |
| 5293 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 5294 | splash_hpstate_80_340: |
| 5295 | ta T_CHANGE_NONHPRIV |
| 5296 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 5297 | .word 0x81982c0d ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x0c0d, %hpstate |
| 5298 | pmu_80_341: |
| 5299 | nop |
| 5300 | ta T_CHANGE_PRIV |
| 5301 | setx 0xfffff421fffffdb8, %g1, %g7 |
| 5302 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5303 | .word 0x91d02033 ! 454: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 5304 | .word 0x9ba309ad ! 455: FDIVs fdivs %f12, %f13, %f13 |
| 5305 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 5306 | cwp_80_342: |
| 5307 | set user_data_start, %o7 |
| 5308 | .word 0x93902000 ! 457: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 5309 | jmptr_80_343: |
| 5310 | nop |
| 5311 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5312 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 5313 | jmptr_80_344: |
| 5314 | nop |
| 5315 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5316 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 5317 | jmptr_80_345: |
| 5318 | nop |
| 5319 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5320 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 5321 | iaw_80_346: |
| 5322 | nop |
| 5323 | ta T_CHANGE_HPRIV |
| 5324 | mov 8, %r18 |
| 5325 | rd %asi, %r12 |
| 5326 | wr %r0, 0x41, %asi |
| 5327 | set sync_thr_counter4, %r23 |
| 5328 | #ifndef SPC |
| 5329 | ldxa [%g0]0x63, %r8 |
| 5330 | and %r8, 0x38, %r8 ! Core ID |
| 5331 | add %r8, %r23, %r23 |
| 5332 | #else |
| 5333 | mov 0, %r8 |
| 5334 | #endif |
| 5335 | mov 0x80, %r16 |
| 5336 | iaw_startwait80_346: |
| 5337 | cas [%r23],%g0,%r16 !lock |
| 5338 | brz,a %r16, continue_iaw_80_346 |
| 5339 | mov (~0x80&0xf0), %r16 |
| 5340 | ld [%r23], %r16 |
| 5341 | iaw_wait80_346: |
| 5342 | brnz %r16, iaw_wait80_346 |
| 5343 | ld [%r23], %r16 |
| 5344 | ba iaw_startwait80_346 |
| 5345 | mov 0x80, %r16 |
| 5346 | continue_iaw_80_346: |
| 5347 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5348 | ldxa [0x58]%asi, %r17 !Running_status |
| 5349 | wait_for_stat_80_346: |
| 5350 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5351 | cmp %r13, %r17 |
| 5352 | bne,a wait_for_stat_80_346 |
| 5353 | ldxa [0x58]%asi, %r17 !Running_status |
| 5354 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5355 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5356 | wait_for_iaw_80_346: |
| 5357 | ldxa [0x58]%asi, %r17 !Running_status |
| 5358 | cmp %r14, %r17 |
| 5359 | bne,a wait_for_iaw_80_346 |
| 5360 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5361 | iaw_doit80_346: |
| 5362 | mov 0x38, %r18 |
| 5363 | iaw1_80_346: |
| 5364 | best_set_reg(0x00000000e0a00000, %r20, %r19) |
| 5365 | or %r19, 0x1, %r19 |
| 5366 | stxa %r19, [%r18]0x50 |
| 5367 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 5368 | st %g0, [%r23] !clear lock |
| 5369 | wr %r0, %r12, %asi ! restore %asi |
| 5370 | ta T_CHANGE_NONHPRIV |
| 5371 | .word 0xe71fe120 ! 461: LDDF_I ldd [%r31, 0x0120], %f19 |
| 5372 | brcommon1_80_347: |
| 5373 | nop |
| 5374 | setx common_target, %r12, %r27 |
| 5375 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5376 | ba,a .+12 |
| 5377 | .word 0xa77020d0 ! 1: POPC_I popc 0x00d0, %r19 |
| 5378 | ba,a .+8 |
| 5379 | jmpl %r27+0, %r27 |
| 5380 | .word 0x99b0c7cb ! 462: PDIST pdistn %d34, %d42, %d12 |
| 5381 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 5382 | ceter_80_349: |
| 5383 | nop |
| 5384 | ta T_CHANGE_HPRIV |
| 5385 | mov 7, %r17 |
| 5386 | sllx %r17, 60, %r17 |
| 5387 | mov 0x18, %r16 |
| 5388 | stxa %r17, [%r16]0x4c |
| 5389 | ta T_CHANGE_NONHPRIV |
| 5390 | .word 0x99410000 ! 464: RDTICK rd %tick, %r12 |
| 5391 | splash_cmpr_80_350: |
| 5392 | mov 0, %r18 |
| 5393 | sllx %r18, 63, %r18 |
| 5394 | rd %tick, %r17 |
| 5395 | add %r17, 0x70, %r17 |
| 5396 | or %r17, %r18, %r17 |
| 5397 | ta T_CHANGE_HPRIV |
| 5398 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5399 | .word 0xaf800011 ! 465: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5400 | .word 0xa0840014 ! 466: ADDcc_R addcc %r16, %r20, %r16 |
| 5401 | .word 0xd28008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 |
| 5402 | memptr_80_351: |
| 5403 | set user_data_start, %r31 |
| 5404 | .word 0x8580b2d4 ! 468: WRCCR_I wr %r2, 0x12d4, %ccr |
| 5405 | .word 0xd27fe120 ! 469: SWAP_I swap %r9, [%r31 + 0x0120] |
| 5406 | .word 0x93b7c489 ! 1: FCMPLE32 fcmple32 %d62, %d40, %r9 |
| 5407 | .word 0x9f802212 ! 470: SIR sir 0x0212 |
| 5408 | .word 0x91924006 ! 471: WRPR_PIL_R wrpr %r9, %r6, %pil |
| 5409 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 5410 | jmptr_80_353: |
| 5411 | nop |
| 5412 | best_set_reg(0xe1a00000, %r20, %r27) |
| 5413 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 5414 | iaw_80_354: |
| 5415 | nop |
| 5416 | ta T_CHANGE_HPRIV |
| 5417 | mov 8, %r18 |
| 5418 | rd %asi, %r12 |
| 5419 | wr %r0, 0x41, %asi |
| 5420 | set sync_thr_counter4, %r23 |
| 5421 | #ifndef SPC |
| 5422 | ldxa [%g0]0x63, %r8 |
| 5423 | and %r8, 0x38, %r8 ! Core ID |
| 5424 | add %r8, %r23, %r23 |
| 5425 | #else |
| 5426 | mov 0, %r8 |
| 5427 | #endif |
| 5428 | mov 0x80, %r16 |
| 5429 | iaw_startwait80_354: |
| 5430 | cas [%r23],%g0,%r16 !lock |
| 5431 | brz,a %r16, continue_iaw_80_354 |
| 5432 | mov (~0x80&0xf0), %r16 |
| 5433 | ld [%r23], %r16 |
| 5434 | iaw_wait80_354: |
| 5435 | brnz %r16, iaw_wait80_354 |
| 5436 | ld [%r23], %r16 |
| 5437 | ba iaw_startwait80_354 |
| 5438 | mov 0x80, %r16 |
| 5439 | continue_iaw_80_354: |
| 5440 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5441 | ldxa [0x58]%asi, %r17 !Running_status |
| 5442 | wait_for_stat_80_354: |
| 5443 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5444 | cmp %r13, %r17 |
| 5445 | bne,a wait_for_stat_80_354 |
| 5446 | ldxa [0x58]%asi, %r17 !Running_status |
| 5447 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5448 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5449 | wait_for_iaw_80_354: |
| 5450 | ldxa [0x58]%asi, %r17 !Running_status |
| 5451 | cmp %r14, %r17 |
| 5452 | bne,a wait_for_iaw_80_354 |
| 5453 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5454 | iaw_doit80_354: |
| 5455 | mov 0x38, %r18 |
| 5456 | iaw1_80_354: |
| 5457 | best_set_reg(0x00000000e1a00000, %r20, %r19) |
| 5458 | or %r19, 0x1, %r19 |
| 5459 | stxa %r19, [%r18]0x50 |
| 5460 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 5461 | st %g0, [%r23] !clear lock |
| 5462 | wr %r0, %r12, %asi ! restore %asi |
| 5463 | ta T_CHANGE_NONHPRIV |
| 5464 | .word 0x99a289d1 ! 474: FDIVd fdivd %f10, %f48, %f12 |
| 5465 | unsupttte_80_355: |
| 5466 | nop |
| 5467 | ta T_CHANGE_HPRIV |
| 5468 | mov 1, %r20 |
| 5469 | sllx %r20, 63, %r20 |
| 5470 | or %r20, 2,%r20 |
| 5471 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 5472 | ta T_CHANGE_NONHPRIV |
| 5473 | .word 0x87aaca51 ! 475: FCMPd fcmpd %fcc<n>, %f42, %f48 |
| 5474 | #if (defined SPC || defined CMP) |
| 5475 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_356)+8, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 5476 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_356)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x80),1,3) |
| 5477 | #else |
| 5478 | !! TODO:Generate XIR via RESET_GEN register |
| 5479 | ! setx 0x8900000808, %r16, %r17 |
| 5480 | ! mov 0x2, %r16 |
| 5481 | ! stw %r16, [%r17] |
| 5482 | #endif |
| 5483 | xir_80_356: |
| 5484 | .word 0xa980bb55 ! 476: WR_SET_SOFTINT_I wr %r2, 0x1b55, %set_softint |
| 5485 | trapasi_80_357: |
| 5486 | nop |
| 5487 | mov 0x20, %r1 ! (VA for ASI 0x4c) |
| 5488 | .word 0xd8d84980 ! 477: LDXA_R ldxa [%r1, %r0] 0x4c, %r12 |
| 5489 | .word 0xe19fe020 ! 478: LDDFA_I ldda [%r31, 0x0020], %f16 |
| 5490 | donret_80_358: |
| 5491 | nop |
| 5492 | ta T_CHANGE_HPRIV ! macro |
| 5493 | rd %pc, %r12 |
| 5494 | add %r12, (donretarg_80_358-donret_80_358-8), %r12 |
| 5495 | mov 0x38, %r18 |
| 5496 | stxa %r12, [%r18]0x58 |
| 5497 | add %r12, 0x4, %r11 |
| 5498 | wrpr %g0, 0x1, %tl |
| 5499 | wrpr %g0, %r12, %tpc |
| 5500 | wrpr %g0, %r11, %tnpc |
| 5501 | set (0x0007535c | (16 << 24)), %r13 |
| 5502 | rdpr %tstate, %r16 |
| 5503 | mov 0x1f, %r19 |
| 5504 | and %r19, %r16, %r17 |
| 5505 | andn %r16, %r19, %r16 |
| 5506 | or %r16, %r17, %r20 |
| 5507 | wrpr %r20, %g0, %tstate |
| 5508 | wrhpr %g0, 0x517, %htstate |
| 5509 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 5510 | retry |
| 5511 | donretarg_80_358: |
| 5512 | .word 0xd8ffe01e ! 479: SWAPA_I swapa %r12, [%r31 + 0x001e] %asi |
| 5513 | invtsb_80_359: |
| 5514 | nop |
| 5515 | ta T_CHANGE_HPRIV |
| 5516 | rd %asi, %r21 |
| 5517 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 5518 | mov 1, %r20 |
| 5519 | sllx %r20, 63, %r20 |
| 5520 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 5521 | xor %r22 ,%r20, %r22 |
| 5522 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 5523 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 5524 | xor %r22 ,%r20, %r22 |
| 5525 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 5526 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 5527 | xor %r22 ,%r20, %r22 |
| 5528 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 5529 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 5530 | xor %r22 ,%r20, %r22 |
| 5531 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 5532 | wr %r21, %r0, %asi |
| 5533 | ta T_CHANGE_NONHPRIV |
| 5534 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 5535 | mondo_80_360: |
| 5536 | nop |
| 5537 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5538 | stxa %r12, [%r0+0x3c8] %asi |
| 5539 | .word 0x9d948013 ! 481: WRPR_WSTATE_R wrpr %r18, %r19, %wstate |
| 5540 | .word 0xc19fd960 ! 482: LDDFA_R ldda [%r31, %r0], %f0 |
| 5541 | br_badelay1_80_361: |
| 5542 | .word 0x24cc0001 ! 1: BRLEZ brlez,a,pt %r16,<label_0xc0001> |
| 5543 | .word 0xd937c010 ! 1: STQF_R - %f12, [%r16, %r31] |
| 5544 | .word 0xd83fc014 ! 1: STD_R std %r12, [%r31 + %r20] |
| 5545 | normalw |
| 5546 | .word 0xa5458000 ! 483: RD_SOFTINT_REG rd %softint, %r18 |
| 5547 | .word 0xc32fc014 ! 1: STXFSR_R st-sfr %f1, [%r20, %r31] |
| 5548 | .word 0x9f803cda ! 484: SIR sir 0x1cda |
| 5549 | .word 0xdb27e19a ! 485: STF_I st %f13, [0x019a, %r31] |
| 5550 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 5551 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 5552 | pmu_80_362: |
| 5553 | nop |
| 5554 | setx 0xfffff175fffff9da, %g1, %g7 |
| 5555 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5556 | .word 0x8d902c0f ! 489: WRPR_PSTATE_I wrpr %r0, 0x0c0f, %pstate |
| 5557 | brgez,a,pt %r12, skip_80_364 |
| 5558 | fbuge skip_80_364 |
| 5559 | .align 32 |
| 5560 | skip_80_364: |
| 5561 | .word 0xc32fc000 ! 490: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 5562 | donret_80_365: |
| 5563 | nop |
| 5564 | ta T_CHANGE_HPRIV ! macro |
| 5565 | rd %pc, %r12 |
| 5566 | add %r12, (donretarg_80_365-donret_80_365-4), %r12 |
| 5567 | mov 0x38, %r18 |
| 5568 | stxa %r12, [%r18]0x58 |
| 5569 | add %r12, 0x4, %r11 |
| 5570 | wrpr %g0, 0x2, %tl |
| 5571 | wrpr %g0, %r12, %tpc |
| 5572 | wrpr %g0, %r11, %tnpc |
| 5573 | set (0x001931e3 | (0x88 << 24)), %r13 |
| 5574 | rdpr %tstate, %r16 |
| 5575 | mov 0x1f, %r19 |
| 5576 | and %r19, %r16, %r17 |
| 5577 | andn %r16, %r19, %r16 |
| 5578 | or %r16, %r17, %r20 |
| 5579 | wrpr %r20, %g0, %tstate |
| 5580 | wrhpr %g0, 0x3a5, %htstate |
| 5581 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 5582 | done |
| 5583 | donretarg_80_365: |
| 5584 | .word 0xdaffe138 ! 491: SWAPA_I swapa %r13, [%r31 + 0x0138] %asi |
| 5585 | .word 0xdb27e034 ! 492: STF_I st %f13, [0x0034, %r31] |
| 5586 | .word 0xdaffc02d ! 493: SWAPA_R swapa %r13, [%r31 + %r13] 0x01 |
| 5587 | splash_cmpr_80_366: |
| 5588 | mov 0, %r18 |
| 5589 | sllx %r18, 63, %r18 |
| 5590 | rd %tick, %r17 |
| 5591 | add %r17, 0x50, %r17 |
| 5592 | or %r17, %r18, %r17 |
| 5593 | ta T_CHANGE_PRIV |
| 5594 | .word 0xaf800011 ! 494: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5595 | nop |
| 5596 | mov 0x80, %g3 |
| 5597 | stxa %g3, [%g3] 0x57 |
| 5598 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 5599 | .word 0x9b702000 ! 1: POPC_I popc 0x0000, %r13 |
| 5600 | .word 0x9f803adf ! 496: SIR sir 0x1adf |
| 5601 | pmu_80_367: |
| 5602 | nop |
| 5603 | ta T_CHANGE_PRIV |
| 5604 | setx 0xfffff305fffff178, %g1, %g7 |
| 5605 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5606 | nop |
| 5607 | ta T_CHANGE_HPRIV |
| 5608 | mov 0x80+1, %r10 |
| 5609 | set sync_thr_counter5, %r23 |
| 5610 | #ifndef SPC |
| 5611 | ldxa [%g0]0x63, %o1 |
| 5612 | and %o1, 0x38, %o1 |
| 5613 | add %o1, %r23, %r23 |
| 5614 | sllx %o1, 5, %o3 !(CID*256) |
| 5615 | #endif |
| 5616 | cas [%r23],%g0,%r10 !lock |
| 5617 | brnz %r10, cwq_80_368 |
| 5618 | rd %asi, %r12 |
| 5619 | wr %g0, 0x40, %asi |
| 5620 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5621 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5622 | cmp %l1, 1 |
| 5623 | bne cwq_80_368 |
| 5624 | set CWQ_BASE, %l6 |
| 5625 | #ifndef SPC |
| 5626 | add %l6, %o3, %l6 |
| 5627 | #endif |
| 5628 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5629 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 5630 | sllx %l2, 32, %l2 |
| 5631 | stx %l2, [%l6 + 0x0] |
| 5632 | membar #Sync |
| 5633 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5634 | sub %l2, 0x40, %l2 |
| 5635 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5636 | wr %r12, %g0, %asi |
| 5637 | st %g0, [%r23] |
| 5638 | cwq_80_368: |
| 5639 | ta T_CHANGE_NONHPRIV |
| 5640 | .word 0xa3414000 ! 498: RDPC rd %pc, %r17 |
| 5641 | change_to_randtl_80_369: |
| 5642 | ta T_CHANGE_HPRIV ! macro |
| 5643 | done_change_to_randtl_80_369: |
| 5644 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5645 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 5646 | mondo_80_370: |
| 5647 | nop |
| 5648 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5649 | stxa %r7, [%r0+0x3d0] %asi |
| 5650 | .word 0x9d940005 ! 501: WRPR_WSTATE_R wrpr %r16, %r5, %wstate |
| 5651 | nop |
| 5652 | nop |
| 5653 | ta T_CHANGE_PRIV |
| 5654 | wrpr %g0, %g0, %gl |
| 5655 | nop |
| 5656 | nop |
| 5657 | setx join_lbl_0_0, %g1, %g2 |
| 5658 | jmp %g2 |
| 5659 | nop |
| 5660 | fork_lbl_0_7: |
| 5661 | ta T_CHANGE_NONHPRIV |
| 5662 | br_longdelay1_40_0: |
| 5663 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 5664 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 5665 | brnz,pn %r10, skip_40_1 |
| 5666 | fbule,a,pn %fcc0, skip_40_1 |
| 5667 | .align 1024 |
| 5668 | skip_40_1: |
| 5669 | .word 0xc30fc000 ! 2: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 5670 | nop |
| 5671 | ta T_CHANGE_HPRIV |
| 5672 | mov 0x40, %r10 |
| 5673 | set sync_thr_counter6, %r23 |
| 5674 | #ifndef SPC |
| 5675 | ldxa [%g0]0x63, %o1 |
| 5676 | and %o1, 0x38, %o1 |
| 5677 | add %o1, %r23, %r23 |
| 5678 | #endif |
| 5679 | cas [%r23],%g0,%r10 !lock |
| 5680 | brnz %r10, sma_40_2 |
| 5681 | rd %asi, %r12 |
| 5682 | wr %g0, 0x40, %asi |
| 5683 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5684 | set 0x001e1fff, %g1 |
| 5685 | stxa %g1, [%g0 + 0x80] %asi |
| 5686 | wr %r12, %g0, %asi |
| 5687 | st %g0, [%r23] |
| 5688 | sma_40_2: |
| 5689 | ta T_CHANGE_NONHPRIV |
| 5690 | .word 0xe7e7e014 ! 3: CASA_R casa [%r31] %asi, %r20, %r19 |
| 5691 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5692 | reduce_priv_lvl_40_3: |
| 5693 | ta T_CHANGE_NONHPRIV ! macro |
| 5694 | splash_decr_40_4: |
| 5695 | nop |
| 5696 | ta T_CHANGE_HPRIV |
| 5697 | mov 8, %r1 |
| 5698 | stxa %r15, [%r1] 0x45 |
| 5699 | .word 0xa7820012 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r8, %r18, %- |
| 5700 | .word 0x87ac8ad2 ! 6: FCMPEd fcmped %fcc<n>, %f18, %f18 |
| 5701 | vahole_40_5: |
| 5702 | nop |
| 5703 | ta T_CHANGE_NONHPRIV |
| 5704 | setx vahole_target1, %r18, %r27 |
| 5705 | jmpl %r27+0, %r27 |
| 5706 | .word 0xe63fe130 ! 7: STD_I std %r19, [%r31 + 0x0130] |
| 5707 | memptr_40_6: |
| 5708 | set user_data_start, %r31 |
| 5709 | .word 0x8584b2fb ! 8: WRCCR_I wr %r18, 0x12fb, %ccr |
| 5710 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 5711 | ceter_40_7: |
| 5712 | nop |
| 5713 | ta T_CHANGE_HPRIV |
| 5714 | mov 7, %r17 |
| 5715 | sllx %r17, 60, %r17 |
| 5716 | mov 0x18, %r16 |
| 5717 | stxa %r17, [%r16]0x4c |
| 5718 | .word 0xa5410000 ! 10: RDTICK rd %tick, %r18 |
| 5719 | splash_lsu_40_8: |
| 5720 | nop |
| 5721 | ta T_CHANGE_HPRIV |
| 5722 | set 0xa209061d, %r2 |
| 5723 | mov 0x6, %r1 |
| 5724 | sllx %r1, 32, %r1 |
| 5725 | or %r1, %r2, %r2 |
| 5726 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5727 | ta T_CHANGE_NONHPRIV |
| 5728 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5729 | brcommon1_40_9: |
| 5730 | nop |
| 5731 | setx common_target, %r12, %r27 |
| 5732 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5733 | ba,a .+12 |
| 5734 | .word 0xd06fe190 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0190] |
| 5735 | ba,a .+8 |
| 5736 | jmpl %r27+0, %r27 |
| 5737 | .word 0xc3e8c032 ! 12: PREFETCHA_R prefetcha [%r3, %r18] 0x01, #one_read |
| 5738 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 5739 | pmu_40_10: |
| 5740 | nop |
| 5741 | setx 0xfffff31efffff428, %g1, %g7 |
| 5742 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5743 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 5744 | pmu_40_11: |
| 5745 | nop |
| 5746 | ta T_CHANGE_PRIV |
| 5747 | setx 0xfffff58cfffff238, %g1, %g7 |
| 5748 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5749 | ibp_40_12: |
| 5750 | nop |
| 5751 | ta T_CHANGE_HPRIV |
| 5752 | mov 8, %r18 |
| 5753 | rd %asi, %r12 |
| 5754 | wr %r0, 0x41, %asi |
| 5755 | set sync_thr_counter4, %r23 |
| 5756 | #ifndef SPC |
| 5757 | ldxa [%g0]0x63, %r8 |
| 5758 | and %r8, 0x38, %r8 ! Core ID |
| 5759 | add %r8, %r23, %r23 |
| 5760 | #else |
| 5761 | mov 0, %r8 |
| 5762 | #endif |
| 5763 | mov 0x40, %r16 |
| 5764 | ibp_startwait40_12: |
| 5765 | cas [%r23],%g0,%r16 !lock |
| 5766 | brz,a %r16, continue_ibp_40_12 |
| 5767 | mov (~0x40&0xf0), %r16 |
| 5768 | ld [%r23], %r16 |
| 5769 | ibp_wait40_12: |
| 5770 | brnz %r16, ibp_wait40_12 |
| 5771 | ld [%r23], %r16 |
| 5772 | ba ibp_startwait40_12 |
| 5773 | mov 0x40, %r16 |
| 5774 | continue_ibp_40_12: |
| 5775 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5776 | ldxa [0x58]%asi, %r17 !Running_status |
| 5777 | wait_for_stat_40_12: |
| 5778 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5779 | cmp %r13, %r17 |
| 5780 | bne,a wait_for_stat_40_12 |
| 5781 | ldxa [0x58]%asi, %r17 !Running_status |
| 5782 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5783 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5784 | wait_for_ibp_40_12: |
| 5785 | ldxa [0x58]%asi, %r17 !Running_status |
| 5786 | cmp %r14, %r17 |
| 5787 | bne,a wait_for_ibp_40_12 |
| 5788 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5789 | ibp_doit40_12: |
| 5790 | best_set_reg(0x00000050f2c00079,%r19, %r20) |
| 5791 | stxa %r20, [%r18]0x42 |
| 5792 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 5793 | st %g0, [%r23] !clear lock |
| 5794 | wr %r0, %r12, %asi !restore %asi |
| 5795 | .word 0xc19fe040 ! 17: LDDFA_I ldda [%r31, 0x0040], %f0 |
| 5796 | ibp_40_13: |
| 5797 | nop |
| 5798 | ta T_CHANGE_HPRIV |
| 5799 | mov 8, %r18 |
| 5800 | rd %asi, %r12 |
| 5801 | wr %r0, 0x41, %asi |
| 5802 | set sync_thr_counter4, %r23 |
| 5803 | #ifndef SPC |
| 5804 | ldxa [%g0]0x63, %r8 |
| 5805 | and %r8, 0x38, %r8 ! Core ID |
| 5806 | add %r8, %r23, %r23 |
| 5807 | #else |
| 5808 | mov 0, %r8 |
| 5809 | #endif |
| 5810 | mov 0x40, %r16 |
| 5811 | ibp_startwait40_13: |
| 5812 | cas [%r23],%g0,%r16 !lock |
| 5813 | brz,a %r16, continue_ibp_40_13 |
| 5814 | mov (~0x40&0xf0), %r16 |
| 5815 | ld [%r23], %r16 |
| 5816 | ibp_wait40_13: |
| 5817 | brnz %r16, ibp_wait40_13 |
| 5818 | ld [%r23], %r16 |
| 5819 | ba ibp_startwait40_13 |
| 5820 | mov 0x40, %r16 |
| 5821 | continue_ibp_40_13: |
| 5822 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5823 | ldxa [0x58]%asi, %r17 !Running_status |
| 5824 | wait_for_stat_40_13: |
| 5825 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5826 | cmp %r13, %r17 |
| 5827 | bne,a wait_for_stat_40_13 |
| 5828 | ldxa [0x58]%asi, %r17 !Running_status |
| 5829 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5830 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5831 | wait_for_ibp_40_13: |
| 5832 | ldxa [0x58]%asi, %r17 !Running_status |
| 5833 | cmp %r14, %r17 |
| 5834 | bne,a wait_for_ibp_40_13 |
| 5835 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5836 | ibp_doit40_13: |
| 5837 | best_set_reg(0x00000050dac0792b,%r19, %r20) |
| 5838 | stxa %r20, [%r18]0x42 |
| 5839 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 5840 | st %g0, [%r23] !clear lock |
| 5841 | wr %r0, %r12, %asi !restore %asi |
| 5842 | .word 0xe1bfe160 ! 18: STDFA_I stda %f16, [0x0160, %r31] |
| 5843 | .word 0xd65fe188 ! 19: LDX_I ldx [%r31 + 0x0188], %r11 |
| 5844 | .word 0xd727e155 ! 20: STF_I st %f11, [0x0155, %r31] |
| 5845 | .word 0x81580000 ! 21: FLUSHW flushw |
| 5846 | #if (defined SPC || defined CMP) |
| 5847 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_14) + 16, 16, 16)) -> intp(0,0,25) |
| 5848 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_14)&0xffffffff) + 16, 16, 16)) -> intp(0,0,25) |
| 5849 | #else |
| 5850 | setx 0xc20ebae602cdbece, %r1, %r28 |
| 5851 | stxa %r28, [%g0] 0x73 |
| 5852 | #endif |
| 5853 | intvec_40_14: |
| 5854 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5855 | donret_40_15: |
| 5856 | nop |
| 5857 | ta T_CHANGE_HPRIV ! macro |
| 5858 | rd %pc, %r12 |
| 5859 | add %r12, (donretarg_40_15-donret_40_15-4), %r12 |
| 5860 | mov 0x38, %r18 |
| 5861 | stxa %r12, [%r18]0x58 |
| 5862 | add %r12, 0x4, %r11 |
| 5863 | wrpr %g0, 0x1, %tl |
| 5864 | wrpr %g0, %r12, %tpc |
| 5865 | wrpr %g0, %r11, %tnpc |
| 5866 | set (0x007ad81a | (28 << 24)), %r13 |
| 5867 | rdpr %tstate, %r16 |
| 5868 | mov 0x1f, %r19 |
| 5869 | and %r19, %r16, %r17 |
| 5870 | andn %r16, %r19, %r16 |
| 5871 | or %r16, %r17, %r20 |
| 5872 | wrpr %r20, %g0, %tstate |
| 5873 | wrhpr %g0, 0x716, %htstate |
| 5874 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 5875 | done |
| 5876 | donretarg_40_15: |
| 5877 | .word 0xd6ffe164 ! 23: SWAPA_I swapa %r11, [%r31 + 0x0164] %asi |
| 5878 | set 0x1938, %l3 |
| 5879 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 5880 | .word 0xa3b287d1 ! 24: PDIST pdistn %d10, %d48, %d48 |
| 5881 | .word 0xe1bfde00 ! 25: STDFA_R stda %f16, [%r0, %r31] |
| 5882 | pmu_40_16: |
| 5883 | nop |
| 5884 | ta T_CHANGE_PRIV |
| 5885 | setx 0xfffff177fffff6ff, %g1, %g7 |
| 5886 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5887 | vahole_40_17: |
| 5888 | nop |
| 5889 | ta T_CHANGE_NONHPRIV |
| 5890 | setx vahole_target1, %r18, %r27 |
| 5891 | jmpl %r27+0, %r27 |
| 5892 | .word 0xd097c032 ! 27: LDUHA_R lduha [%r31, %r18] 0x01, %r8 |
| 5893 | #if (defined SPC || defined CMP) |
| 5894 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_18)+56, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 5895 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_18)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 5896 | #else |
| 5897 | !! TODO:Generate XIR via RESET_GEN register |
| 5898 | ! setx 0x8900000808, %r16, %r17 |
| 5899 | ! mov 0x2, %r16 |
| 5900 | ! stw %r16, [%r17] |
| 5901 | #endif |
| 5902 | xir_40_18: |
| 5903 | .word 0xa9843e72 ! 28: WR_SET_SOFTINT_I wr %r16, 0x1e72, %set_softint |
| 5904 | .word 0x91a00171 ! 29: FABSq dis not found |
| 5905 | |
| 5906 | donret_40_20: |
| 5907 | nop |
| 5908 | ta T_CHANGE_HPRIV ! macro |
| 5909 | rd %pc, %r12 |
| 5910 | add %r12, (donretarg_40_20-donret_40_20-8), %r12 |
| 5911 | mov 0x38, %r18 |
| 5912 | stxa %r12, [%r18]0x58 |
| 5913 | add %r12, 0x4, %r11 |
| 5914 | wrpr %g0, 0x2, %tl |
| 5915 | wrpr %g0, %r12, %tpc |
| 5916 | wrpr %g0, %r11, %tnpc |
| 5917 | set (0x001ddf63 | (16 << 24)), %r13 |
| 5918 | rdpr %tstate, %r16 |
| 5919 | mov 0x1f, %r19 |
| 5920 | and %r19, %r16, %r17 |
| 5921 | andn %r16, %r19, %r16 |
| 5922 | or %r16, %r17, %r20 |
| 5923 | wrpr %r20, %g0, %tstate |
| 5924 | wrhpr %g0, 0x1f95, %htstate |
| 5925 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 5926 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> |
| 5927 | retry |
| 5928 | donretarg_40_20: |
| 5929 | .word 0xe2ffe041 ! 30: SWAPA_I swapa %r17, [%r31 + 0x0041] %asi |
| 5930 | splash_decr_40_21: |
| 5931 | nop |
| 5932 | ta T_CHANGE_HPRIV |
| 5933 | mov 8, %r1 |
| 5934 | stxa %r7, [%r1] 0x45 |
| 5935 | .word 0xa784c004 ! 31: WR_GRAPHICS_STATUS_REG_R wr %r19, %r4, %- |
| 5936 | #if (defined SPC || defined CMP) |
| 5937 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_22) + 32, 16, 16)) -> intp(5,0,22) |
| 5938 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_22)&0xffffffff) + 32, 16, 16)) -> intp(5,0,22) |
| 5939 | #else |
| 5940 | setx 0x10a9f3fe9ffe41c3, %r1, %r28 |
| 5941 | stxa %r28, [%g0] 0x73 |
| 5942 | #endif |
| 5943 | intvec_40_22: |
| 5944 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5945 | memptr_40_23: |
| 5946 | set 0x60740000, %r31 |
| 5947 | .word 0x85806acf ! 33: WRCCR_I wr %r1, 0x0acf, %ccr |
| 5948 | unsupttte_40_24: |
| 5949 | nop |
| 5950 | ta T_CHANGE_HPRIV |
| 5951 | mov 1, %r20 |
| 5952 | sllx %r20, 63, %r20 |
| 5953 | or %r20, 2,%r20 |
| 5954 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 5955 | ta T_CHANGE_NONHPRIV |
| 5956 | .word 0xa9b0c494 ! 34: FCMPLE32 fcmple32 %d34, %d20, %r20 |
| 5957 | brcommon3_40_25: |
| 5958 | nop |
| 5959 | setx common_target, %r12, %r27 |
| 5960 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5961 | ba,a .+12 |
| 5962 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 5963 | ba,a .+8 |
| 5964 | jmpl %r27+0, %r27 |
| 5965 | .word 0xd23fe070 ! 35: STD_I std %r9, [%r31 + 0x0070] |
| 5966 | jmptr_40_26: |
| 5967 | nop |
| 5968 | best_set_reg(0xe1200000, %r20, %r27) |
| 5969 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 5970 | splash_cmpr_40_27: |
| 5971 | mov 0, %r18 |
| 5972 | sllx %r18, 63, %r18 |
| 5973 | rd %tick, %r17 |
| 5974 | add %r17, 0x100, %r17 |
| 5975 | or %r17, %r18, %r17 |
| 5976 | ta T_CHANGE_PRIV |
| 5977 | .word 0xaf800011 ! 37: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5978 | splash_cmpr_40_28: |
| 5979 | mov 0, %r18 |
| 5980 | sllx %r18, 63, %r18 |
| 5981 | rd %tick, %r17 |
| 5982 | add %r17, 0x100, %r17 |
| 5983 | or %r17, %r18, %r17 |
| 5984 | ta T_CHANGE_PRIV |
| 5985 | .word 0xaf800011 ! 38: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5986 | mondo_40_29: |
| 5987 | nop |
| 5988 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5989 | ta T_CHANGE_PRIV |
| 5990 | stxa %r20, [%r0+0x3c8] %asi |
| 5991 | .word 0x9d92c00d ! 39: WRPR_WSTATE_R wrpr %r11, %r13, %wstate |
| 5992 | brcommon3_40_30: |
| 5993 | nop |
| 5994 | setx common_target, %r12, %r27 |
| 5995 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5996 | ba,a .+12 |
| 5997 | .word 0xd26fe0c0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00c0] |
| 5998 | ba,a .+8 |
| 5999 | jmpl %r27+0, %r27 |
| 6000 | .word 0xd33fc00a ! 40: STDF_R std %f9, [%r10, %r31] |
| 6001 | .word 0xd2dfe030 ! 41: LDXA_I ldxa [%r31, + 0x0030] %asi, %r9 |
| 6002 | .word 0xd327e0a0 ! 42: STF_I st %f9, [0x00a0, %r31] |
| 6003 | setx 0x8b7f461f0e0f2031, %r1, %r28 |
| 6004 | stxa %r28, [%g0] 0x73 |
| 6005 | intvec_40_31: |
| 6006 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6007 | mondo_40_32: |
| 6008 | nop |
| 6009 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6010 | stxa %r5, [%r0+0x3d8] %asi |
| 6011 | .word 0x9d91c011 ! 44: WRPR_WSTATE_R wrpr %r7, %r17, %wstate |
| 6012 | ceter_40_33: |
| 6013 | nop |
| 6014 | ta T_CHANGE_HPRIV |
| 6015 | mov 7, %r17 |
| 6016 | sllx %r17, 60, %r17 |
| 6017 | mov 0x18, %r16 |
| 6018 | stxa %r17, [%r16]0x4c |
| 6019 | ta T_CHANGE_NONHPRIV |
| 6020 | .word 0x97410000 ! 45: RDTICK rd %tick, %r11 |
| 6021 | .word 0x9194c00a ! 46: WRPR_PIL_R wrpr %r19, %r10, %pil |
| 6022 | splash_tba_40_35: |
| 6023 | ta T_CHANGE_PRIV |
| 6024 | setx 0x0000000400380000, %r11, %r12 |
| 6025 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6026 | mondo_40_36: |
| 6027 | nop |
| 6028 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6029 | ta T_CHANGE_PRIV |
| 6030 | stxa %r11, [%r0+0x3e8] %asi |
| 6031 | .word 0x9d930014 ! 48: WRPR_WSTATE_R wrpr %r12, %r20, %wstate |
| 6032 | .word 0xe31fc011 ! 1: LDDF_R ldd [%r31, %r17], %f17 |
| 6033 | .word 0x9f80322c ! 49: SIR sir 0x122c |
| 6034 | br_longdelay2_40_37: |
| 6035 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 6036 | .word 0xe3e7c02a ! 50: CASA_I casa [%r31] 0x 1, %r10, %r17 |
| 6037 | splash_cmpr_40_38: |
| 6038 | mov 0, %r18 |
| 6039 | sllx %r18, 63, %r18 |
| 6040 | rd %tick, %r17 |
| 6041 | add %r17, 0x80, %r17 |
| 6042 | or %r17, %r18, %r17 |
| 6043 | ta T_CHANGE_PRIV |
| 6044 | .word 0xaf800011 ! 51: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6045 | nop |
| 6046 | ta T_CHANGE_HPRIV |
| 6047 | mov 0x40, %r10 |
| 6048 | set sync_thr_counter6, %r23 |
| 6049 | #ifndef SPC |
| 6050 | ldxa [%g0]0x63, %o1 |
| 6051 | and %o1, 0x38, %o1 |
| 6052 | add %o1, %r23, %r23 |
| 6053 | #endif |
| 6054 | cas [%r23],%g0,%r10 !lock |
| 6055 | brnz %r10, sma_40_39 |
| 6056 | rd %asi, %r12 |
| 6057 | wr %g0, 0x40, %asi |
| 6058 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6059 | set 0x00121fff, %g1 |
| 6060 | stxa %g1, [%g0 + 0x80] %asi |
| 6061 | wr %r12, %g0, %asi |
| 6062 | st %g0, [%r23] |
| 6063 | sma_40_39: |
| 6064 | ta T_CHANGE_NONHPRIV |
| 6065 | .word 0xe3e7e012 ! 52: CASA_R casa [%r31] %asi, %r18, %r17 |
| 6066 | #if (defined SPC || defined CMP) |
| 6067 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_40)+16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6068 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_40)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6069 | #else |
| 6070 | !! TODO:Generate XIR via RESET_GEN register |
| 6071 | ! setx 0x8900000808, %r16, %r17 |
| 6072 | ! mov 0x2, %r16 |
| 6073 | ! stw %r16, [%r17] |
| 6074 | #endif |
| 6075 | xir_40_40: |
| 6076 | .word 0xa982b798 ! 53: WR_SET_SOFTINT_I wr %r10, 0x1798, %set_softint |
| 6077 | jmptr_40_41: |
| 6078 | nop |
| 6079 | best_set_reg(0xe1200000, %r20, %r27) |
| 6080 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 6081 | donret_40_42: |
| 6082 | nop |
| 6083 | ta T_CHANGE_HPRIV ! macro |
| 6084 | rd %pc, %r12 |
| 6085 | add %r12, (donretarg_40_42-donret_40_42-8), %r12 |
| 6086 | mov 0x38, %r18 |
| 6087 | stxa %r12, [%r18]0x58 |
| 6088 | add %r12, 0x4, %r11 |
| 6089 | wrpr %g0, 0x2, %tl |
| 6090 | wrpr %g0, %r12, %tpc |
| 6091 | wrpr %g0, %r11, %tnpc |
| 6092 | set (0x00d7de21 | (0x58 << 24)), %r13 |
| 6093 | rdpr %tstate, %r16 |
| 6094 | mov 0x1f, %r19 |
| 6095 | and %r19, %r16, %r17 |
| 6096 | andn %r16, %r19, %r16 |
| 6097 | or %r16, %r17, %r20 |
| 6098 | wrpr %r20, %g0, %tstate |
| 6099 | wrhpr %g0, 0x43c, %htstate |
| 6100 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6101 | retry |
| 6102 | donretarg_40_42: |
| 6103 | .word 0xe26fe168 ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x0168] |
| 6104 | nop |
| 6105 | ta T_CHANGE_HPRIV |
| 6106 | mov 0x40+1, %r10 |
| 6107 | set sync_thr_counter5, %r23 |
| 6108 | #ifndef SPC |
| 6109 | ldxa [%g0]0x63, %o1 |
| 6110 | and %o1, 0x38, %o1 |
| 6111 | add %o1, %r23, %r23 |
| 6112 | sllx %o1, 5, %o3 !(CID*256) |
| 6113 | #endif |
| 6114 | cas [%r23],%g0,%r10 !lock |
| 6115 | brnz %r10, cwq_40_43 |
| 6116 | rd %asi, %r12 |
| 6117 | wr %g0, 0x40, %asi |
| 6118 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6119 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6120 | cmp %l1, 1 |
| 6121 | bne cwq_40_43 |
| 6122 | set CWQ_BASE, %l6 |
| 6123 | #ifndef SPC |
| 6124 | add %l6, %o3, %l6 |
| 6125 | #endif |
| 6126 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6127 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 6128 | sllx %l2, 32, %l2 |
| 6129 | stx %l2, [%l6 + 0x0] |
| 6130 | membar #Sync |
| 6131 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6132 | sub %l2, 0x40, %l2 |
| 6133 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6134 | wr %r12, %g0, %asi |
| 6135 | st %g0, [%r23] |
| 6136 | cwq_40_43: |
| 6137 | ta T_CHANGE_NONHPRIV |
| 6138 | .word 0x93414000 ! 56: RDPC rd %pc, %r9 |
| 6139 | splash_hpstate_40_44: |
| 6140 | .word 0x8198314d ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x114d, %hpstate |
| 6141 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 6142 | .word 0x8d90318d ! 58: WRPR_PSTATE_I wrpr %r0, 0x118d, %pstate |
| 6143 | mondo_40_46: |
| 6144 | nop |
| 6145 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6146 | ta T_CHANGE_PRIV |
| 6147 | stxa %r11, [%r0+0x3c8] %asi |
| 6148 | .word 0x9d940008 ! 59: WRPR_WSTATE_R wrpr %r16, %r8, %wstate |
| 6149 | mondo_40_47: |
| 6150 | nop |
| 6151 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6152 | ta T_CHANGE_PRIV |
| 6153 | stxa %r5, [%r0+0x3c0] %asi |
| 6154 | .word 0x9d918005 ! 60: WRPR_WSTATE_R wrpr %r6, %r5, %wstate |
| 6155 | splash_hpstate_40_48: |
| 6156 | ta T_CHANGE_NONHPRIV |
| 6157 | .word 0x81982647 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x0647, %hpstate |
| 6158 | .word 0xd31fe178 ! 62: LDDF_I ldd [%r31, 0x0178], %f9 |
| 6159 | vahole_40_49: |
| 6160 | nop |
| 6161 | ta T_CHANGE_NONHPRIV |
| 6162 | setx vahole_target2, %r18, %r27 |
| 6163 | jmpl %r27+0, %r27 |
| 6164 | .word 0xe1bfde00 ! 63: STDFA_R stda %f16, [%r0, %r31] |
| 6165 | brcommon1_40_50: |
| 6166 | nop |
| 6167 | setx common_target, %r12, %r27 |
| 6168 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6169 | ba,a .+12 |
| 6170 | .word 0xd3e7c030 ! 1: CASA_I casa [%r31] 0x 1, %r16, %r9 |
| 6171 | ba,a .+8 |
| 6172 | jmpl %r27+0, %r27 |
| 6173 | .word 0x9970341f ! 64: POPC_I popc 0x141f, %r12 |
| 6174 | splash_hpstate_40_51: |
| 6175 | ta T_CHANGE_NONHPRIV |
| 6176 | .word 0x81982d86 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0d86, %hpstate |
| 6177 | .word 0x8d90241b ! 66: WRPR_PSTATE_I wrpr %r0, 0x041b, %pstate |
| 6178 | .word 0xe19fe1a0 ! 67: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 6179 | br_badelay1_40_54: |
| 6180 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 6181 | .word 0xd337e0a0 ! 1: STQF_I - %f9, [0x00a0, %r31] |
| 6182 | .word 0x87afca54 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f20 |
| 6183 | normalw |
| 6184 | .word 0x93458000 ! 68: RD_SOFTINT_REG rd %softint, %r9 |
| 6185 | .word 0xd82fe0f1 ! 69: STB_I stb %r12, [%r31 + 0x00f1] |
| 6186 | donret_40_55: |
| 6187 | nop |
| 6188 | ta T_CHANGE_HPRIV ! macro |
| 6189 | rd %pc, %r12 |
| 6190 | add %r12, (donretarg_40_55-donret_40_55-4), %r12 |
| 6191 | mov 0x38, %r18 |
| 6192 | stxa %r12, [%r18]0x58 |
| 6193 | add %r12, 0x4, %r11 |
| 6194 | wrpr %g0, 0x1, %tl |
| 6195 | wrpr %g0, %r12, %tpc |
| 6196 | wrpr %g0, %r11, %tnpc |
| 6197 | set (0x00d47c1f | (4 << 24)), %r13 |
| 6198 | rdpr %tstate, %r16 |
| 6199 | mov 0x1f, %r19 |
| 6200 | and %r19, %r16, %r17 |
| 6201 | andn %r16, %r19, %r16 |
| 6202 | or %r16, %r17, %r20 |
| 6203 | wrpr %r20, %g0, %tstate |
| 6204 | wrhpr %g0, 0x8d9, %htstate |
| 6205 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6206 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6207 | done |
| 6208 | donretarg_40_55: |
| 6209 | .word 0xa1a449c9 ! 70: FDIVd fdivd %f48, %f40, %f16 |
| 6210 | nop |
| 6211 | ta T_CHANGE_HPRIV |
| 6212 | mov 0x40, %r10 |
| 6213 | set sync_thr_counter6, %r23 |
| 6214 | #ifndef SPC |
| 6215 | ldxa [%g0]0x63, %o1 |
| 6216 | and %o1, 0x38, %o1 |
| 6217 | add %o1, %r23, %r23 |
| 6218 | #endif |
| 6219 | cas [%r23],%g0,%r10 !lock |
| 6220 | brnz %r10, sma_40_56 |
| 6221 | rd %asi, %r12 |
| 6222 | wr %g0, 0x40, %asi |
| 6223 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6224 | set 0x00121fff, %g1 |
| 6225 | stxa %g1, [%g0 + 0x80] %asi |
| 6226 | wr %r12, %g0, %asi |
| 6227 | st %g0, [%r23] |
| 6228 | sma_40_56: |
| 6229 | ta T_CHANGE_NONHPRIV |
| 6230 | .word 0xe7e7e014 ! 71: CASA_R casa [%r31] %asi, %r20, %r19 |
| 6231 | .word 0xe19fe040 ! 72: LDDFA_I ldda [%r31, 0x0040], %f16 |
| 6232 | mondo_40_57: |
| 6233 | nop |
| 6234 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6235 | stxa %r3, [%r0+0x3d8] %asi |
| 6236 | .word 0x9d92c010 ! 73: WRPR_WSTATE_R wrpr %r11, %r16, %wstate |
| 6237 | nop |
| 6238 | mov 0x80, %g3 |
| 6239 | stxa %g3, [%g3] 0x5f |
| 6240 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 6241 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 6242 | nop |
| 6243 | ta T_CHANGE_HPRIV |
| 6244 | mov 0x40, %r10 |
| 6245 | set sync_thr_counter6, %r23 |
| 6246 | #ifndef SPC |
| 6247 | ldxa [%g0]0x63, %o1 |
| 6248 | and %o1, 0x38, %o1 |
| 6249 | add %o1, %r23, %r23 |
| 6250 | #endif |
| 6251 | cas [%r23],%g0,%r10 !lock |
| 6252 | brnz %r10, sma_40_58 |
| 6253 | rd %asi, %r12 |
| 6254 | wr %g0, 0x40, %asi |
| 6255 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6256 | set 0x000a1fff, %g1 |
| 6257 | stxa %g1, [%g0 + 0x80] %asi |
| 6258 | wr %r12, %g0, %asi |
| 6259 | st %g0, [%r23] |
| 6260 | sma_40_58: |
| 6261 | ta T_CHANGE_NONHPRIV |
| 6262 | .word 0xe7e7e00b ! 76: CASA_R casa [%r31] %asi, %r11, %r19 |
| 6263 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 6264 | nop |
| 6265 | mov 0x80, %g3 |
| 6266 | stxa %g3, [%g3] 0x57 |
| 6267 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 6268 | .word 0x9553c000 ! 79: RDPR_FQ <illegal instruction> |
| 6269 | donret_40_59: |
| 6270 | nop |
| 6271 | ta T_CHANGE_HPRIV ! macro |
| 6272 | rd %pc, %r12 |
| 6273 | add %r12, (donretarg_40_59-donret_40_59-4), %r12 |
| 6274 | mov 0x38, %r18 |
| 6275 | stxa %r12, [%r18]0x58 |
| 6276 | add %r12, 0x4, %r11 |
| 6277 | wrpr %g0, 0x2, %tl |
| 6278 | wrpr %g0, %r12, %tpc |
| 6279 | wrpr %g0, %r11, %tnpc |
| 6280 | set (0x00a5d7a3 | (0x83 << 24)), %r13 |
| 6281 | rdpr %tstate, %r16 |
| 6282 | mov 0x1f, %r19 |
| 6283 | and %r19, %r16, %r17 |
| 6284 | andn %r16, %r19, %r16 |
| 6285 | or %r16, %r17, %r20 |
| 6286 | wrpr %r20, %g0, %tstate |
| 6287 | wrhpr %g0, 0x150f, %htstate |
| 6288 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6289 | done |
| 6290 | donretarg_40_59: |
| 6291 | .word 0x95a489d1 ! 80: FDIVd fdivd %f18, %f48, %f10 |
| 6292 | .word 0xda8fe030 ! 81: LDUBA_I lduba [%r31, + 0x0030] %asi, %r13 |
| 6293 | .word 0xc19fda00 ! 82: LDDFA_R ldda [%r31, %r0], %f0 |
| 6294 | change_to_randtl_40_60: |
| 6295 | ta T_CHANGE_PRIV ! macro |
| 6296 | done_change_to_randtl_40_60: |
| 6297 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6298 | splash_cmpr_40_61: |
| 6299 | mov 0, %r18 |
| 6300 | sllx %r18, 63, %r18 |
| 6301 | rd %tick, %r17 |
| 6302 | add %r17, 0x100, %r17 |
| 6303 | or %r17, %r18, %r17 |
| 6304 | ta T_CHANGE_PRIV |
| 6305 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6306 | jmptr_40_62: |
| 6307 | nop |
| 6308 | best_set_reg(0xe1200000, %r20, %r27) |
| 6309 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 6310 | mondo_40_63: |
| 6311 | nop |
| 6312 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6313 | ta T_CHANGE_PRIV |
| 6314 | stxa %r19, [%r0+0x3d8] %asi |
| 6315 | .word 0x9d94c014 ! 86: WRPR_WSTATE_R wrpr %r19, %r20, %wstate |
| 6316 | #if (defined SPC || defined CMP) |
| 6317 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_64)+16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6318 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_64)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6319 | #else |
| 6320 | !! TODO:Generate XIR via RESET_GEN register |
| 6321 | ! setx 0x8900000808, %r16, %r17 |
| 6322 | ! mov 0x2, %r16 |
| 6323 | ! stw %r16, [%r17] |
| 6324 | #endif |
| 6325 | xir_40_64: |
| 6326 | .word 0xa9816184 ! 87: WR_SET_SOFTINT_I wr %r5, 0x0184, %set_softint |
| 6327 | .word 0xdb37e009 ! 88: STQF_I - %f13, [0x0009, %r31] |
| 6328 | mondo_40_65: |
| 6329 | nop |
| 6330 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6331 | ta T_CHANGE_PRIV |
| 6332 | stxa %r18, [%r0+0x3d0] %asi |
| 6333 | .word 0x9d904006 ! 89: WRPR_WSTATE_R wrpr %r1, %r6, %wstate |
| 6334 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 6335 | memptr_40_66: |
| 6336 | set user_data_start, %r31 |
| 6337 | .word 0x85842e9b ! 91: WRCCR_I wr %r16, 0x0e9b, %ccr |
| 6338 | jmptr_40_67: |
| 6339 | nop |
| 6340 | best_set_reg(0xe1200000, %r20, %r27) |
| 6341 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 6342 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 6343 | reduce_priv_lvl_40_68: |
| 6344 | ta T_CHANGE_NONPRIV ! macro |
| 6345 | otherw |
| 6346 | mov 0x35, %r30 |
| 6347 | .word 0x91d0001e ! 94: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 6348 | vahole_40_69: |
| 6349 | nop |
| 6350 | ta T_CHANGE_NONHPRIV |
| 6351 | setx vahole_target0, %r18, %r27 |
| 6352 | jmpl %r27+0, %r27 |
| 6353 | .word 0xdb1fc00b ! 95: LDDF_R ldd [%r31, %r11], %f13 |
| 6354 | pmu_40_70: |
| 6355 | nop |
| 6356 | setx 0xfffff685fffff890, %g1, %g7 |
| 6357 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6358 | jmptr_40_71: |
| 6359 | nop |
| 6360 | best_set_reg(0xe1200000, %r20, %r27) |
| 6361 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 6362 | splash_cmpr_40_72: |
| 6363 | mov 0, %r18 |
| 6364 | sllx %r18, 63, %r18 |
| 6365 | rd %tick, %r17 |
| 6366 | add %r17, 0x80, %r17 |
| 6367 | or %r17, %r18, %r17 |
| 6368 | ta T_CHANGE_HPRIV |
| 6369 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6370 | ta T_CHANGE_PRIV |
| 6371 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6372 | splash_hpstate_40_73: |
| 6373 | .word 0x81982e15 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x0e15, %hpstate |
| 6374 | donret_40_74: |
| 6375 | nop |
| 6376 | ta T_CHANGE_HPRIV ! macro |
| 6377 | rd %pc, %r12 |
| 6378 | add %r12, (donretarg_40_74-donret_40_74-8), %r12 |
| 6379 | mov 0x38, %r18 |
| 6380 | stxa %r12, [%r18]0x58 |
| 6381 | add %r12, 0x4, %r11 |
| 6382 | wrpr %g0, 0x2, %tl |
| 6383 | wrpr %g0, %r12, %tpc |
| 6384 | wrpr %g0, %r11, %tnpc |
| 6385 | set (0x0062777f | (16 << 24)), %r13 |
| 6386 | rdpr %tstate, %r16 |
| 6387 | mov 0x1f, %r19 |
| 6388 | and %r19, %r16, %r17 |
| 6389 | andn %r16, %r19, %r16 |
| 6390 | or %r16, %r17, %r20 |
| 6391 | wrpr %r20, %g0, %tstate |
| 6392 | wrhpr %g0, 0xf8d, %htstate |
| 6393 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6394 | .word 0x26cc0001 ! 1: BRLZ brlz,a,pt %r16,<label_0xc0001> |
| 6395 | retry |
| 6396 | donretarg_40_74: |
| 6397 | .word 0xda6fe1e9 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x01e9] |
| 6398 | change_to_randtl_40_75: |
| 6399 | ta T_CHANGE_HPRIV ! macro |
| 6400 | done_change_to_randtl_40_75: |
| 6401 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6402 | unsupttte_40_76: |
| 6403 | nop |
| 6404 | ta T_CHANGE_HPRIV |
| 6405 | mov 1, %r20 |
| 6406 | sllx %r20, 63, %r20 |
| 6407 | or %r20, 2,%r20 |
| 6408 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 6409 | ta T_CHANGE_NONHPRIV |
| 6410 | .word 0xc3ea0025 ! 102: PREFETCHA_R prefetcha [%r8, %r5] 0x01, #one_read |
| 6411 | .word 0x8d903ab3 ! 103: WRPR_PSTATE_I wrpr %r0, 0x1ab3, %pstate |
| 6412 | intveclr_40_78: |
| 6413 | nop |
| 6414 | ta T_CHANGE_HPRIV |
| 6415 | setx 0xbba736654dad3396, %r1, %r28 |
| 6416 | stxa %r28, [%g0] 0x72 |
| 6417 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6418 | donret_40_79: |
| 6419 | nop |
| 6420 | ta T_CHANGE_HPRIV ! macro |
| 6421 | rd %pc, %r12 |
| 6422 | add %r12, (donretarg_40_79-donret_40_79-4), %r12 |
| 6423 | mov 0x38, %r18 |
| 6424 | stxa %r12, [%r18]0x58 |
| 6425 | add %r12, 0x4, %r11 |
| 6426 | wrpr %g0, 0x1, %tl |
| 6427 | wrpr %g0, %r12, %tpc |
| 6428 | wrpr %g0, %r11, %tnpc |
| 6429 | set (0x0036a6f0 | (0x55 << 24)), %r13 |
| 6430 | rdpr %tstate, %r16 |
| 6431 | mov 0x1f, %r19 |
| 6432 | and %r19, %r16, %r17 |
| 6433 | andn %r16, %r19, %r16 |
| 6434 | or %r16, %r17, %r20 |
| 6435 | wrpr %r20, %g0, %tstate |
| 6436 | wrhpr %g0, 0x1405, %htstate |
| 6437 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6438 | done |
| 6439 | donretarg_40_79: |
| 6440 | .word 0xa7a0c9cd ! 105: FDIVd fdivd %f34, %f44, %f50 |
| 6441 | .word 0xe4d7e038 ! 106: LDSHA_I ldsha [%r31, + 0x0038] %asi, %r18 |
| 6442 | tagged_40_80: |
| 6443 | tsubcctv %r13, 0x17b8, %r13 |
| 6444 | .word 0xe407e10b ! 107: LDUW_I lduw [%r31 + 0x010b], %r18 |
| 6445 | nop |
| 6446 | ta T_CHANGE_HPRIV |
| 6447 | mov 0x40+1, %r10 |
| 6448 | set sync_thr_counter5, %r23 |
| 6449 | #ifndef SPC |
| 6450 | ldxa [%g0]0x63, %o1 |
| 6451 | and %o1, 0x38, %o1 |
| 6452 | add %o1, %r23, %r23 |
| 6453 | sllx %o1, 5, %o3 !(CID*256) |
| 6454 | #endif |
| 6455 | cas [%r23],%g0,%r10 !lock |
| 6456 | brnz %r10, cwq_40_81 |
| 6457 | rd %asi, %r12 |
| 6458 | wr %g0, 0x40, %asi |
| 6459 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6460 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6461 | cmp %l1, 1 |
| 6462 | bne cwq_40_81 |
| 6463 | set CWQ_BASE, %l6 |
| 6464 | #ifndef SPC |
| 6465 | add %l6, %o3, %l6 |
| 6466 | #endif |
| 6467 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6468 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 6469 | sllx %l2, 32, %l2 |
| 6470 | stx %l2, [%l6 + 0x0] |
| 6471 | membar #Sync |
| 6472 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6473 | sub %l2, 0x40, %l2 |
| 6474 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6475 | wr %r12, %g0, %asi |
| 6476 | st %g0, [%r23] |
| 6477 | cwq_40_81: |
| 6478 | ta T_CHANGE_NONHPRIV |
| 6479 | .word 0x9b414000 ! 108: RDPC rd %pc, %r13 |
| 6480 | splash_lsu_40_82: |
| 6481 | nop |
| 6482 | ta T_CHANGE_HPRIV |
| 6483 | set 0xbb49a20f, %r2 |
| 6484 | mov 0x2, %r1 |
| 6485 | sllx %r1, 32, %r1 |
| 6486 | or %r1, %r2, %r2 |
| 6487 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6488 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6489 | splash_cmpr_40_83: |
| 6490 | mov 0, %r18 |
| 6491 | sllx %r18, 63, %r18 |
| 6492 | rd %tick, %r17 |
| 6493 | add %r17, 0x100, %r17 |
| 6494 | or %r17, %r18, %r17 |
| 6495 | ta T_CHANGE_PRIV |
| 6496 | .word 0xaf800011 ! 110: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6497 | splash_htba_40_84: |
| 6498 | nop |
| 6499 | ta T_CHANGE_HPRIV |
| 6500 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 6501 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 6502 | mondo_40_85: |
| 6503 | nop |
| 6504 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6505 | stxa %r8, [%r0+0x3d0] %asi |
| 6506 | .word 0x9d940012 ! 112: WRPR_WSTATE_R wrpr %r16, %r18, %wstate |
| 6507 | .word 0xe1bfc3e0 ! 113: STDFA_R stda %f16, [%r0, %r31] |
| 6508 | .word 0xe19fdf20 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 6509 | splash_cmpr_40_86: |
| 6510 | mov 0, %r18 |
| 6511 | sllx %r18, 63, %r18 |
| 6512 | rd %tick, %r17 |
| 6513 | add %r17, 0x100, %r17 |
| 6514 | or %r17, %r18, %r17 |
| 6515 | ta T_CHANGE_PRIV |
| 6516 | .word 0xaf800011 ! 115: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6517 | #if (defined SPC || defined CMP) |
| 6518 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_87)+48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6519 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_87)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6520 | #else |
| 6521 | !! TODO:Generate XIR via RESET_GEN register |
| 6522 | ! setx 0x8900000808, %r16, %r17 |
| 6523 | ! mov 0x2, %r16 |
| 6524 | ! stw %r16, [%r17] |
| 6525 | #endif |
| 6526 | xir_40_87: |
| 6527 | .word 0xa982b54c ! 116: WR_SET_SOFTINT_I wr %r10, 0x154c, %set_softint |
| 6528 | brcommon3_40_88: |
| 6529 | nop |
| 6530 | setx common_target, %r12, %r27 |
| 6531 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6532 | ba,a .+12 |
| 6533 | .word 0xd137c010 ! 1: STQF_R - %f8, [%r16, %r31] |
| 6534 | ba,a .+8 |
| 6535 | jmpl %r27+0, %r27 |
| 6536 | .word 0xd11fc008 ! 117: LDDF_R ldd [%r31, %r8], %f8 |
| 6537 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 6538 | .word 0x8d90351a ! 118: WRPR_PSTATE_I wrpr %r0, 0x151a, %pstate |
| 6539 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6540 | reduce_priv_lvl_40_90: |
| 6541 | ta T_CHANGE_NONPRIV ! macro |
| 6542 | #if (defined SPC || defined CMP) |
| 6543 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_91)+8, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6544 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_91)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6545 | #else |
| 6546 | !! TODO:Generate XIR via RESET_GEN register |
| 6547 | ! setx 0x8900000808, %r16, %r17 |
| 6548 | ! mov 0x2, %r16 |
| 6549 | ! stw %r16, [%r17] |
| 6550 | #endif |
| 6551 | xir_40_91: |
| 6552 | .word 0xa982f145 ! 120: WR_SET_SOFTINT_I wr %r11, 0x1145, %set_softint |
| 6553 | splash_cmpr_40_92: |
| 6554 | mov 0, %r18 |
| 6555 | sllx %r18, 63, %r18 |
| 6556 | rd %tick, %r17 |
| 6557 | add %r17, 0x80, %r17 |
| 6558 | or %r17, %r18, %r17 |
| 6559 | .word 0xb3800011 ! 121: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6560 | .word 0x9ba00163 ! 122: FABSq dis not found |
| 6561 | |
| 6562 | ta T_CHANGE_NONHPRIV |
| 6563 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 6564 | splash_cmpr_40_95: |
| 6565 | mov 0, %r18 |
| 6566 | sllx %r18, 63, %r18 |
| 6567 | rd %tick, %r17 |
| 6568 | add %r17, 0x100, %r17 |
| 6569 | or %r17, %r18, %r17 |
| 6570 | ta T_CHANGE_HPRIV |
| 6571 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6572 | ta T_CHANGE_PRIV |
| 6573 | .word 0xb3800011 ! 124: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6574 | .word 0xc1bfdf20 ! 125: STDFA_R stda %f0, [%r0, %r31] |
| 6575 | jmptr_40_96: |
| 6576 | nop |
| 6577 | best_set_reg(0xe1200000, %r20, %r27) |
| 6578 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 6579 | setx 0x5fcbfbb68d58eeaf, %r1, %r28 |
| 6580 | stxa %r28, [%g0] 0x73 |
| 6581 | intvec_40_97: |
| 6582 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6583 | pmu_40_98: |
| 6584 | nop |
| 6585 | ta T_CHANGE_PRIV |
| 6586 | setx 0xfffff267fffff248, %g1, %g7 |
| 6587 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6588 | donret_40_99: |
| 6589 | nop |
| 6590 | ta T_CHANGE_HPRIV ! macro |
| 6591 | rd %pc, %r12 |
| 6592 | add %r12, (donretarg_40_99-donret_40_99-4), %r12 |
| 6593 | mov 0x38, %r18 |
| 6594 | stxa %r12, [%r18]0x58 |
| 6595 | add %r12, 0x4, %r11 |
| 6596 | wrpr %g0, 0x2, %tl |
| 6597 | wrpr %g0, %r12, %tpc |
| 6598 | wrpr %g0, %r11, %tnpc |
| 6599 | set (0x0091051f | (0x83 << 24)), %r13 |
| 6600 | rdpr %tstate, %r16 |
| 6601 | mov 0x1f, %r19 |
| 6602 | and %r19, %r16, %r17 |
| 6603 | andn %r16, %r19, %r16 |
| 6604 | or %r16, %r17, %r20 |
| 6605 | wrpr %r20, %g0, %tstate |
| 6606 | wrhpr %g0, 0x126f, %htstate |
| 6607 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 6608 | done |
| 6609 | donretarg_40_99: |
| 6610 | .word 0xa9a4c9d0 ! 129: FDIVd fdivd %f50, %f16, %f20 |
| 6611 | pmu_40_100: |
| 6612 | nop |
| 6613 | setx 0xfffff562fffffeb5, %g1, %g7 |
| 6614 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6615 | mondo_40_101: |
| 6616 | nop |
| 6617 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6618 | ta T_CHANGE_PRIV |
| 6619 | stxa %r8, [%r0+0x3e0] %asi |
| 6620 | .word 0x9d914010 ! 131: WRPR_WSTATE_R wrpr %r5, %r16, %wstate |
| 6621 | nop |
| 6622 | ta T_CHANGE_HPRIV |
| 6623 | mov 0x40, %r10 |
| 6624 | set sync_thr_counter6, %r23 |
| 6625 | #ifndef SPC |
| 6626 | ldxa [%g0]0x63, %o1 |
| 6627 | and %o1, 0x38, %o1 |
| 6628 | add %o1, %r23, %r23 |
| 6629 | #endif |
| 6630 | cas [%r23],%g0,%r10 !lock |
| 6631 | brnz %r10, sma_40_102 |
| 6632 | rd %asi, %r12 |
| 6633 | wr %g0, 0x40, %asi |
| 6634 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6635 | set 0x001e1fff, %g1 |
| 6636 | stxa %g1, [%g0 + 0x80] %asi |
| 6637 | wr %r12, %g0, %asi |
| 6638 | st %g0, [%r23] |
| 6639 | sma_40_102: |
| 6640 | ta T_CHANGE_NONHPRIV |
| 6641 | .word 0xd9e7e00a ! 132: CASA_R casa [%r31] %asi, %r10, %r12 |
| 6642 | .word 0xc1bfdc00 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 6643 | splash_tba_40_103: |
| 6644 | ta T_CHANGE_PRIV |
| 6645 | setx 0x0000000400380000, %r11, %r12 |
| 6646 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6647 | splash_lsu_40_104: |
| 6648 | nop |
| 6649 | ta T_CHANGE_HPRIV |
| 6650 | set 0x6843d871, %r2 |
| 6651 | mov 0x4, %r1 |
| 6652 | sllx %r1, 32, %r1 |
| 6653 | or %r1, %r2, %r2 |
| 6654 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6655 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6656 | setx 0xdbabbd90502885d1, %r1, %r28 |
| 6657 | stxa %r28, [%g0] 0x73 |
| 6658 | intvec_40_105: |
| 6659 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6660 | change_to_randtl_40_106: |
| 6661 | ta T_CHANGE_PRIV ! macro |
| 6662 | done_change_to_randtl_40_106: |
| 6663 | .word 0x8f902001 ! 137: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 6664 | nop |
| 6665 | ta T_CHANGE_HPRIV |
| 6666 | mov 0x40+1, %r10 |
| 6667 | set sync_thr_counter5, %r23 |
| 6668 | #ifndef SPC |
| 6669 | ldxa [%g0]0x63, %o1 |
| 6670 | and %o1, 0x38, %o1 |
| 6671 | add %o1, %r23, %r23 |
| 6672 | sllx %o1, 5, %o3 !(CID*256) |
| 6673 | #endif |
| 6674 | cas [%r23],%g0,%r10 !lock |
| 6675 | brnz %r10, cwq_40_107 |
| 6676 | rd %asi, %r12 |
| 6677 | wr %g0, 0x40, %asi |
| 6678 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6679 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6680 | cmp %l1, 1 |
| 6681 | bne cwq_40_107 |
| 6682 | set CWQ_BASE, %l6 |
| 6683 | #ifndef SPC |
| 6684 | add %l6, %o3, %l6 |
| 6685 | #endif |
| 6686 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6687 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 6688 | sllx %l2, 32, %l2 |
| 6689 | stx %l2, [%l6 + 0x0] |
| 6690 | membar #Sync |
| 6691 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6692 | sub %l2, 0x40, %l2 |
| 6693 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6694 | wr %r12, %g0, %asi |
| 6695 | st %g0, [%r23] |
| 6696 | cwq_40_107: |
| 6697 | ta T_CHANGE_NONHPRIV |
| 6698 | .word 0xa1414000 ! 138: RDPC rd %pc, %r16 |
| 6699 | #if (defined SPC || defined CMP) |
| 6700 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_108)+24, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6701 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_108)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 6702 | #else |
| 6703 | !! TODO:Generate XIR via RESET_GEN register |
| 6704 | ! setx 0x8900000808, %r16, %r17 |
| 6705 | ! mov 0x2, %r16 |
| 6706 | ! stw %r16, [%r17] |
| 6707 | #endif |
| 6708 | xir_40_108: |
| 6709 | .word 0xa9843447 ! 139: WR_SET_SOFTINT_I wr %r16, 0x1447, %set_softint |
| 6710 | br_badelay1_40_109: |
| 6711 | .word 0x87afca53 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f50 |
| 6712 | .word 0xd13423f3 ! 1: STQF_I - %f8, [0x03f3, %r16] |
| 6713 | .word 0x9ba7c9ca ! 1: FDIVd fdivd %f62, %f10, %f44 |
| 6714 | normalw |
| 6715 | .word 0x93458000 ! 140: RD_SOFTINT_REG rd %softint, %r9 |
| 6716 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 6717 | reduce_priv_lvl_40_110: |
| 6718 | ta T_CHANGE_NONHPRIV ! macro |
| 6719 | vahole_40_111: |
| 6720 | nop |
| 6721 | ta T_CHANGE_NONHPRIV |
| 6722 | setx vahole_target1, %r18, %r27 |
| 6723 | jmpl %r27+0, %r27 |
| 6724 | .word 0xa5a2c9c9 ! 142: FDIVd fdivd %f42, %f40, %f18 |
| 6725 | nop |
| 6726 | ta T_CHANGE_HPRIV |
| 6727 | mov 0x40+1, %r10 |
| 6728 | set sync_thr_counter5, %r23 |
| 6729 | #ifndef SPC |
| 6730 | ldxa [%g0]0x63, %o1 |
| 6731 | and %o1, 0x38, %o1 |
| 6732 | add %o1, %r23, %r23 |
| 6733 | sllx %o1, 5, %o3 !(CID*256) |
| 6734 | #endif |
| 6735 | cas [%r23],%g0,%r10 !lock |
| 6736 | brnz %r10, cwq_40_112 |
| 6737 | rd %asi, %r12 |
| 6738 | wr %g0, 0x40, %asi |
| 6739 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6740 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6741 | cmp %l1, 1 |
| 6742 | bne cwq_40_112 |
| 6743 | set CWQ_BASE, %l6 |
| 6744 | #ifndef SPC |
| 6745 | add %l6, %o3, %l6 |
| 6746 | #endif |
| 6747 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6748 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 6749 | sllx %l2, 32, %l2 |
| 6750 | stx %l2, [%l6 + 0x0] |
| 6751 | membar #Sync |
| 6752 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6753 | sub %l2, 0x40, %l2 |
| 6754 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6755 | wr %r12, %g0, %asi |
| 6756 | st %g0, [%r23] |
| 6757 | cwq_40_112: |
| 6758 | ta T_CHANGE_NONHPRIV |
| 6759 | .word 0x99414000 ! 143: RDPC rd %pc, %r12 |
| 6760 | .word 0xd91fe040 ! 144: LDDF_I ldd [%r31, 0x0040], %f12 |
| 6761 | setx 0xa73e72bcbe7026a6, %r1, %r28 |
| 6762 | stxa %r28, [%g0] 0x73 |
| 6763 | intvec_40_113: |
| 6764 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6765 | .word 0xa2d20006 ! 146: UMULcc_R umulcc %r8, %r6, %r17 |
| 6766 | splash_cmpr_40_114: |
| 6767 | mov 1, %r18 |
| 6768 | sllx %r18, 63, %r18 |
| 6769 | rd %tick, %r17 |
| 6770 | add %r17, 0x100, %r17 |
| 6771 | or %r17, %r18, %r17 |
| 6772 | ta T_CHANGE_HPRIV |
| 6773 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6774 | .word 0xb3800011 ! 147: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6775 | mondo_40_115: |
| 6776 | nop |
| 6777 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6778 | ta T_CHANGE_PRIV |
| 6779 | stxa %r16, [%r0+0x3e8] %asi |
| 6780 | .word 0x9d908011 ! 148: WRPR_WSTATE_R wrpr %r2, %r17, %wstate |
| 6781 | change_to_randtl_40_116: |
| 6782 | ta T_CHANGE_PRIV ! macro |
| 6783 | done_change_to_randtl_40_116: |
| 6784 | .word 0x8f902000 ! 149: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6785 | change_to_randtl_40_117: |
| 6786 | ta T_CHANGE_HPRIV ! macro |
| 6787 | done_change_to_randtl_40_117: |
| 6788 | .word 0x8f902000 ! 150: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6789 | #if (defined SPC || defined CMP) |
| 6790 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_118) + 56, 16, 16)) -> intp(0,0,26) |
| 6791 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_118)&0xffffffff) + 56, 16, 16)) -> intp(0,0,26) |
| 6792 | #else |
| 6793 | setx 0xf794bacc2b0d191f, %r1, %r28 |
| 6794 | stxa %r28, [%g0] 0x73 |
| 6795 | #endif |
| 6796 | intvec_40_118: |
| 6797 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6798 | memptr_40_119: |
| 6799 | set 0x60340000, %r31 |
| 6800 | .word 0x858466e8 ! 152: WRCCR_I wr %r17, 0x06e8, %ccr |
| 6801 | nop |
| 6802 | mov 0x80, %g3 |
| 6803 | stxa %g3, [%g3] 0x57 |
| 6804 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 6805 | .word 0x8d90398b ! 154: WRPR_PSTATE_I wrpr %r0, 0x198b, %pstate |
| 6806 | mondo_40_121: |
| 6807 | nop |
| 6808 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6809 | ta T_CHANGE_PRIV |
| 6810 | stxa %r16, [%r0+0x3c0] %asi |
| 6811 | .word 0x9d91c012 ! 155: WRPR_WSTATE_R wrpr %r7, %r18, %wstate |
| 6812 | .word 0x8d902517 ! 156: WRPR_PSTATE_I wrpr %r0, 0x0517, %pstate |
| 6813 | .word 0x91d020b2 ! 157: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 6814 | setx 0xece1b7b9235c77df, %r1, %r28 |
| 6815 | stxa %r28, [%g0] 0x73 |
| 6816 | intvec_40_123: |
| 6817 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6818 | .word 0xc36c0013 ! 159: PREFETCH_R prefetch [%r16 + %r19], #one_read |
| 6819 | fpinit_40_124: |
| 6820 | nop |
| 6821 | setx fp_data_quads, %r19, %r20 |
| 6822 | ldd [%r20], %f0 |
| 6823 | ldd [%r20+8], %f4 |
| 6824 | ld [%r20+16], %fsr |
| 6825 | ld [%r20+24], %r19 |
| 6826 | wr %r19, %g0, %gsr |
| 6827 | .word 0x87a80a44 ! 160: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 6828 | splash_hpstate_40_125: |
| 6829 | ta T_CHANGE_NONHPRIV |
| 6830 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> |
| 6831 | .word 0x81982cd9 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0cd9, %hpstate |
| 6832 | nop |
| 6833 | mov 0x80, %g3 |
| 6834 | stxa %g3, [%g3] 0x5f |
| 6835 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 6836 | nop |
| 6837 | ta T_CHANGE_HPRIV |
| 6838 | mov 0x40, %r10 |
| 6839 | set sync_thr_counter6, %r23 |
| 6840 | #ifndef SPC |
| 6841 | ldxa [%g0]0x63, %o1 |
| 6842 | and %o1, 0x38, %o1 |
| 6843 | add %o1, %r23, %r23 |
| 6844 | #endif |
| 6845 | cas [%r23],%g0,%r10 !lock |
| 6846 | brnz %r10, sma_40_126 |
| 6847 | rd %asi, %r12 |
| 6848 | wr %g0, 0x40, %asi |
| 6849 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6850 | set 0x000e1fff, %g1 |
| 6851 | stxa %g1, [%g0 + 0x80] %asi |
| 6852 | wr %r12, %g0, %asi |
| 6853 | st %g0, [%r23] |
| 6854 | sma_40_126: |
| 6855 | ta T_CHANGE_NONHPRIV |
| 6856 | .word 0xe1e7e00c ! 163: CASA_R casa [%r31] %asi, %r12, %r16 |
| 6857 | nop |
| 6858 | ta T_CHANGE_HPRIV |
| 6859 | mov 0x40, %r10 |
| 6860 | set sync_thr_counter6, %r23 |
| 6861 | #ifndef SPC |
| 6862 | ldxa [%g0]0x63, %o1 |
| 6863 | and %o1, 0x38, %o1 |
| 6864 | add %o1, %r23, %r23 |
| 6865 | #endif |
| 6866 | cas [%r23],%g0,%r10 !lock |
| 6867 | brnz %r10, sma_40_127 |
| 6868 | rd %asi, %r12 |
| 6869 | wr %g0, 0x40, %asi |
| 6870 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6871 | set 0x000e1fff, %g1 |
| 6872 | stxa %g1, [%g0 + 0x80] %asi |
| 6873 | wr %r12, %g0, %asi |
| 6874 | st %g0, [%r23] |
| 6875 | sma_40_127: |
| 6876 | ta T_CHANGE_NONHPRIV |
| 6877 | .word 0xe1e7e00a ! 164: CASA_R casa [%r31] %asi, %r10, %r16 |
| 6878 | pmu_40_128: |
| 6879 | nop |
| 6880 | ta T_CHANGE_PRIV |
| 6881 | setx 0xfffff862fffff1e2, %g1, %g7 |
| 6882 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6883 | splash_cmpr_40_129: |
| 6884 | mov 0, %r18 |
| 6885 | sllx %r18, 63, %r18 |
| 6886 | rd %tick, %r17 |
| 6887 | add %r17, 0x60, %r17 |
| 6888 | or %r17, %r18, %r17 |
| 6889 | ta T_CHANGE_PRIV |
| 6890 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6891 | ceter_40_130: |
| 6892 | nop |
| 6893 | ta T_CHANGE_HPRIV |
| 6894 | mov 7, %r17 |
| 6895 | sllx %r17, 60, %r17 |
| 6896 | mov 0x18, %r16 |
| 6897 | stxa %r17, [%r16]0x4c |
| 6898 | ta T_CHANGE_NONHPRIV |
| 6899 | .word 0xa9410000 ! 167: RDTICK rd %tick, %r20 |
| 6900 | jmptr_40_131: |
| 6901 | nop |
| 6902 | best_set_reg(0xe1200000, %r20, %r27) |
| 6903 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 6904 | .word 0x9b6b0011 ! 169: SDIVX_R sdivx %r12, %r17, %r13 |
| 6905 | splash_cmpr_40_132: |
| 6906 | mov 0, %r18 |
| 6907 | sllx %r18, 63, %r18 |
| 6908 | rd %tick, %r17 |
| 6909 | add %r17, 0x100, %r17 |
| 6910 | or %r17, %r18, %r17 |
| 6911 | .word 0xb3800011 ! 170: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6912 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 6913 | nop |
| 6914 | ta T_CHANGE_HPRIV |
| 6915 | mov 0x40+1, %r10 |
| 6916 | set sync_thr_counter5, %r23 |
| 6917 | #ifndef SPC |
| 6918 | ldxa [%g0]0x63, %o1 |
| 6919 | and %o1, 0x38, %o1 |
| 6920 | add %o1, %r23, %r23 |
| 6921 | sllx %o1, 5, %o3 !(CID*256) |
| 6922 | #endif |
| 6923 | cas [%r23],%g0,%r10 !lock |
| 6924 | brnz %r10, cwq_40_133 |
| 6925 | rd %asi, %r12 |
| 6926 | wr %g0, 0x40, %asi |
| 6927 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6928 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6929 | cmp %l1, 1 |
| 6930 | bne cwq_40_133 |
| 6931 | set CWQ_BASE, %l6 |
| 6932 | #ifndef SPC |
| 6933 | add %l6, %o3, %l6 |
| 6934 | #endif |
| 6935 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6936 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 6937 | sllx %l2, 32, %l2 |
| 6938 | stx %l2, [%l6 + 0x0] |
| 6939 | membar #Sync |
| 6940 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6941 | sub %l2, 0x40, %l2 |
| 6942 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6943 | wr %r12, %g0, %asi |
| 6944 | st %g0, [%r23] |
| 6945 | cwq_40_133: |
| 6946 | ta T_CHANGE_NONHPRIV |
| 6947 | .word 0x9b414000 ! 172: RDPC rd %pc, %r13 |
| 6948 | jmptr_40_134: |
| 6949 | nop |
| 6950 | best_set_reg(0xe1200000, %r20, %r27) |
| 6951 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 6952 | .word 0xe09fd060 ! 174: LDDA_R ldda [%r31, %r0] 0x83, %r16 |
| 6953 | setx 0xde098c1e77a9ea0d, %r1, %r28 |
| 6954 | stxa %r28, [%g0] 0x73 |
| 6955 | intvec_40_135: |
| 6956 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6957 | splash_cmpr_40_136: |
| 6958 | mov 0, %r18 |
| 6959 | sllx %r18, 63, %r18 |
| 6960 | rd %tick, %r17 |
| 6961 | add %r17, 0x70, %r17 |
| 6962 | or %r17, %r18, %r17 |
| 6963 | ta T_CHANGE_HPRIV |
| 6964 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6965 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6966 | .word 0xe0d7e090 ! 177: LDSHA_I ldsha [%r31, + 0x0090] %asi, %r16 |
| 6967 | splash_cmpr_40_137: |
| 6968 | mov 0, %r18 |
| 6969 | sllx %r18, 63, %r18 |
| 6970 | rd %tick, %r17 |
| 6971 | add %r17, 0x70, %r17 |
| 6972 | or %r17, %r18, %r17 |
| 6973 | ta T_CHANGE_HPRIV |
| 6974 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6975 | ta T_CHANGE_PRIV |
| 6976 | .word 0xaf800011 ! 178: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6977 | mondo_40_138: |
| 6978 | nop |
| 6979 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6980 | stxa %r8, [%r0+0x3c0] %asi |
| 6981 | .word 0x9d91c002 ! 179: WRPR_WSTATE_R wrpr %r7, %r2, %wstate |
| 6982 | change_to_randtl_40_139: |
| 6983 | ta T_CHANGE_HPRIV ! macro |
| 6984 | done_change_to_randtl_40_139: |
| 6985 | .word 0x8f902000 ! 180: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6986 | jmptr_40_140: |
| 6987 | nop |
| 6988 | best_set_reg(0xe1200000, %r20, %r27) |
| 6989 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 6990 | .word 0x9191c013 ! 182: WRPR_PIL_R wrpr %r7, %r19, %pil |
| 6991 | donret_40_142: |
| 6992 | nop |
| 6993 | ta T_CHANGE_HPRIV ! macro |
| 6994 | rd %pc, %r12 |
| 6995 | add %r12, (donretarg_40_142-donret_40_142-8), %r12 |
| 6996 | mov 0x38, %r18 |
| 6997 | stxa %r12, [%r18]0x58 |
| 6998 | add %r12, 0x4, %r11 |
| 6999 | wrpr %g0, 0x1, %tl |
| 7000 | wrpr %g0, %r12, %tpc |
| 7001 | wrpr %g0, %r11, %tnpc |
| 7002 | set (0x0030d05a | (22 << 24)), %r13 |
| 7003 | rdpr %tstate, %r16 |
| 7004 | mov 0x1f, %r19 |
| 7005 | and %r19, %r16, %r17 |
| 7006 | andn %r16, %r19, %r16 |
| 7007 | or %r16, %r17, %r20 |
| 7008 | wrpr %r20, %g0, %tstate |
| 7009 | wrhpr %g0, 0x17cd, %htstate |
| 7010 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 7011 | retry |
| 7012 | donretarg_40_142: |
| 7013 | .word 0x9ba1c9c9 ! 183: FDIVd fdivd %f38, %f40, %f44 |
| 7014 | .word 0xe6c7e0b8 ! 184: LDSWA_I ldswa [%r31, + 0x00b8] %asi, %r19 |
| 7015 | .word 0xe1bfdb60 ! 185: STDFA_R stda %f16, [%r0, %r31] |
| 7016 | .word 0xe6cfe168 ! 186: LDSBA_I ldsba [%r31, + 0x0168] %asi, %r19 |
| 7017 | splash_cmpr_40_143: |
| 7018 | mov 0, %r18 |
| 7019 | sllx %r18, 63, %r18 |
| 7020 | rd %tick, %r17 |
| 7021 | add %r17, 0x50, %r17 |
| 7022 | or %r17, %r18, %r17 |
| 7023 | ta T_CHANGE_HPRIV |
| 7024 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7025 | .word 0xaf800011 ! 187: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7026 | .word 0x96844007 ! 188: ADDcc_R addcc %r17, %r7, %r11 |
| 7027 | ibp_40_144: |
| 7028 | nop |
| 7029 | ta T_CHANGE_HPRIV |
| 7030 | mov 8, %r18 |
| 7031 | rd %asi, %r12 |
| 7032 | wr %r0, 0x41, %asi |
| 7033 | set sync_thr_counter4, %r23 |
| 7034 | #ifndef SPC |
| 7035 | ldxa [%g0]0x63, %r8 |
| 7036 | and %r8, 0x38, %r8 ! Core ID |
| 7037 | add %r8, %r23, %r23 |
| 7038 | #else |
| 7039 | mov 0, %r8 |
| 7040 | #endif |
| 7041 | mov 0x40, %r16 |
| 7042 | ibp_startwait40_144: |
| 7043 | cas [%r23],%g0,%r16 !lock |
| 7044 | brz,a %r16, continue_ibp_40_144 |
| 7045 | mov (~0x40&0xf0), %r16 |
| 7046 | ld [%r23], %r16 |
| 7047 | ibp_wait40_144: |
| 7048 | brnz %r16, ibp_wait40_144 |
| 7049 | ld [%r23], %r16 |
| 7050 | ba ibp_startwait40_144 |
| 7051 | mov 0x40, %r16 |
| 7052 | continue_ibp_40_144: |
| 7053 | sllx %r16, %r8, %r16 !Mask for my core only |
| 7054 | ldxa [0x58]%asi, %r17 !Running_status |
| 7055 | wait_for_stat_40_144: |
| 7056 | ldxa [0x50]%asi, %r13 !Running_rw |
| 7057 | cmp %r13, %r17 |
| 7058 | bne,a wait_for_stat_40_144 |
| 7059 | ldxa [0x58]%asi, %r17 !Running_status |
| 7060 | stxa %r16, [0x68]%asi !Park (W1C) |
| 7061 | ldxa [0x50]%asi, %r14 !Running_rw |
| 7062 | wait_for_ibp_40_144: |
| 7063 | ldxa [0x58]%asi, %r17 !Running_status |
| 7064 | cmp %r14, %r17 |
| 7065 | bne,a wait_for_ibp_40_144 |
| 7066 | ldxa [0x50]%asi, %r14 !Running_rw |
| 7067 | ibp_doit40_144: |
| 7068 | best_set_reg(0x000000400bf92b1c,%r19, %r20) |
| 7069 | stxa %r20, [%r18]0x42 |
| 7070 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 7071 | st %g0, [%r23] !clear lock |
| 7072 | wr %r0, %r12, %asi !restore %asi |
| 7073 | ta T_CHANGE_NONHPRIV |
| 7074 | .word 0xe19fe120 ! 189: LDDFA_I ldda [%r31, 0x0120], %f16 |
| 7075 | ceter_40_145: |
| 7076 | nop |
| 7077 | ta T_CHANGE_HPRIV |
| 7078 | mov 5, %r17 |
| 7079 | sllx %r17, 60, %r17 |
| 7080 | mov 0x18, %r16 |
| 7081 | stxa %r17, [%r16]0x4c |
| 7082 | ta T_CHANGE_NONHPRIV |
| 7083 | .word 0x99410000 ! 190: RDTICK rd %tick, %r12 |
| 7084 | ceter_40_146: |
| 7085 | nop |
| 7086 | ta T_CHANGE_HPRIV |
| 7087 | mov 7, %r17 |
| 7088 | sllx %r17, 60, %r17 |
| 7089 | mov 0x18, %r16 |
| 7090 | stxa %r17, [%r16]0x4c |
| 7091 | ta T_CHANGE_NONHPRIV |
| 7092 | .word 0x93410000 ! 191: RDTICK rd %tick, %r9 |
| 7093 | setx 0xdd73d4dc9bcf6538, %r1, %r28 |
| 7094 | stxa %r28, [%g0] 0x73 |
| 7095 | intvec_40_147: |
| 7096 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7097 | invtsb_40_148: |
| 7098 | nop |
| 7099 | ta T_CHANGE_HPRIV |
| 7100 | rd %asi, %r21 |
| 7101 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 7102 | mov 1, %r20 |
| 7103 | sllx %r20, 63, %r20 |
| 7104 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 7105 | xor %r22 ,%r20, %r22 |
| 7106 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 7107 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 7108 | xor %r22 ,%r20, %r22 |
| 7109 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 7110 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 7111 | xor %r22 ,%r20, %r22 |
| 7112 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 7113 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 7114 | xor %r22 ,%r20, %r22 |
| 7115 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 7116 | wr %r21, %r0, %asi |
| 7117 | ta T_CHANGE_NONHPRIV |
| 7118 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 7119 | .word 0x95a00165 ! 194: FABSq dis not found |
| 7120 | |
| 7121 | .word 0xe6c7e170 ! 195: LDSWA_I ldswa [%r31, + 0x0170] %asi, %r19 |
| 7122 | splash_lsu_40_150: |
| 7123 | nop |
| 7124 | ta T_CHANGE_HPRIV |
| 7125 | set 0x0b66414c, %r2 |
| 7126 | mov 0x3, %r1 |
| 7127 | sllx %r1, 32, %r1 |
| 7128 | or %r1, %r2, %r2 |
| 7129 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7130 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7131 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 7132 | reduce_priv_lvl_40_151: |
| 7133 | ta T_CHANGE_NONPRIV ! macro |
| 7134 | .word 0xe65fe0e8 ! 198: LDX_I ldx [%r31 + 0x00e8], %r19 |
| 7135 | splash_hpstate_40_152: |
| 7136 | ta T_CHANGE_NONHPRIV |
| 7137 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 7138 | .word 0x8198244b ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x044b, %hpstate |
| 7139 | .word 0x9353c000 ! 200: RDPR_FQ <illegal instruction> |
| 7140 | .word 0xc32fc012 ! 1: STXFSR_R st-sfr %f1, [%r18, %r31] |
| 7141 | .word 0x9f803d69 ! 201: SIR sir 0x1d69 |
| 7142 | mondo_40_153: |
| 7143 | nop |
| 7144 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7145 | stxa %r20, [%r0+0x3e0] %asi |
| 7146 | .word 0x9d940013 ! 202: WRPR_WSTATE_R wrpr %r16, %r19, %wstate |
| 7147 | jmptr_40_154: |
| 7148 | nop |
| 7149 | best_set_reg(0xe1200000, %r20, %r27) |
| 7150 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 7151 | brnz,a,pn %r13, skip_40_155 |
| 7152 | brlez,a,pn %r4, skip_40_155 |
| 7153 | .align 2048 |
| 7154 | skip_40_155: |
| 7155 | .word 0x87ac8a50 ! 204: FCMPd fcmpd %fcc<n>, %f18, %f16 |
| 7156 | pmu_40_156: |
| 7157 | nop |
| 7158 | ta T_CHANGE_PRIV |
| 7159 | setx 0xffffff3dfffff036, %g1, %g7 |
| 7160 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7161 | setx 0x52964d968890063e, %r1, %r28 |
| 7162 | stxa %r28, [%g0] 0x73 |
| 7163 | intvec_40_157: |
| 7164 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7165 | .word 0xe677e024 ! 207: STX_I stx %r19, [%r31 + 0x0024] |
| 7166 | brcommon2_40_158: |
| 7167 | nop |
| 7168 | setx common_target, %r12, %r27 |
| 7169 | ba,a .+12 |
| 7170 | .word 0xa7a7c973 ! 1: FMULq dis not found |
| 7171 | |
| 7172 | ba,a .+8 |
| 7173 | jmpl %r27+0, %r27 |
| 7174 | .word 0xe19fe060 ! 208: LDDFA_I ldda [%r31, 0x0060], %f16 |
| 7175 | .word 0x98fc4013 ! 209: SDIVcc_R sdivcc %r17, %r19, %r12 |
| 7176 | .word 0xd897e1e0 ! 210: LDUHA_I lduha [%r31, + 0x01e0] %asi, %r12 |
| 7177 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 7178 | change_to_randtl_40_159: |
| 7179 | ta T_CHANGE_HPRIV ! macro |
| 7180 | done_change_to_randtl_40_159: |
| 7181 | .word 0x8f902002 ! 212: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 7182 | tagged_40_160: |
| 7183 | tsubcctv %r18, 0x1464, %r1 |
| 7184 | .word 0xd807e100 ! 213: LDUW_I lduw [%r31 + 0x0100], %r12 |
| 7185 | br_badelay1_40_161: |
| 7186 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> |
| 7187 | .word 0xd937c010 ! 1: STQF_R - %f12, [%r16, %r31] |
| 7188 | .word 0x99a7c9d0 ! 1: FDIVd fdivd %f62, %f16, %f12 |
| 7189 | normalw |
| 7190 | .word 0xa3458000 ! 214: RD_SOFTINT_REG rd %softint, %r17 |
| 7191 | pmu_40_162: |
| 7192 | nop |
| 7193 | setx 0xffffff3ffffff456, %g1, %g7 |
| 7194 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7195 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 7196 | pmu_40_164: |
| 7197 | nop |
| 7198 | ta T_CHANGE_PRIV |
| 7199 | setx 0xfffffd90fffffb8f, %g1, %g7 |
| 7200 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7201 | otherw |
| 7202 | mov 0x35, %r30 |
| 7203 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 7204 | .word 0xe1bfde00 ! 219: STDFA_R stda %f16, [%r0, %r31] |
| 7205 | .word 0xc1bfc3e0 ! 220: STDFA_R stda %f0, [%r0, %r31] |
| 7206 | .word 0xe1bfe1c0 ! 221: STDFA_I stda %f16, [0x01c0, %r31] |
| 7207 | setx 0x6d5e9221c151ff93, %r1, %r28 |
| 7208 | stxa %r28, [%g0] 0x73 |
| 7209 | intvec_40_165: |
| 7210 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7211 | br_longdelay1_40_166: |
| 7212 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 7213 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 7214 | nop |
| 7215 | ta T_CHANGE_HPRIV |
| 7216 | mov 0x40, %r10 |
| 7217 | set sync_thr_counter6, %r23 |
| 7218 | #ifndef SPC |
| 7219 | ldxa [%g0]0x63, %o1 |
| 7220 | and %o1, 0x38, %o1 |
| 7221 | add %o1, %r23, %r23 |
| 7222 | #endif |
| 7223 | cas [%r23],%g0,%r10 !lock |
| 7224 | brnz %r10, sma_40_167 |
| 7225 | rd %asi, %r12 |
| 7226 | wr %g0, 0x40, %asi |
| 7227 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7228 | set 0x000a1fff, %g1 |
| 7229 | stxa %g1, [%g0 + 0x80] %asi |
| 7230 | wr %r12, %g0, %asi |
| 7231 | st %g0, [%r23] |
| 7232 | sma_40_167: |
| 7233 | ta T_CHANGE_NONHPRIV |
| 7234 | .word 0xe1e7e011 ! 224: CASA_R casa [%r31] %asi, %r17, %r16 |
| 7235 | jmptr_40_168: |
| 7236 | nop |
| 7237 | best_set_reg(0xe1200000, %r20, %r27) |
| 7238 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 7239 | setx 0xb7f5b59561862335, %r1, %r28 |
| 7240 | stxa %r28, [%g0] 0x73 |
| 7241 | intvec_40_169: |
| 7242 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7243 | mondo_40_170: |
| 7244 | nop |
| 7245 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7246 | ta T_CHANGE_PRIV |
| 7247 | stxa %r16, [%r0+0x3c0] %asi |
| 7248 | .word 0x9d948002 ! 227: WRPR_WSTATE_R wrpr %r18, %r2, %wstate |
| 7249 | splash_cmpr_40_171: |
| 7250 | mov 0, %r18 |
| 7251 | sllx %r18, 63, %r18 |
| 7252 | rd %tick, %r17 |
| 7253 | add %r17, 0x60, %r17 |
| 7254 | or %r17, %r18, %r17 |
| 7255 | ta T_CHANGE_PRIV |
| 7256 | .word 0xb3800011 ! 228: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7257 | pmu_40_172: |
| 7258 | nop |
| 7259 | ta T_CHANGE_PRIV |
| 7260 | setx 0xfffffd97fffff760, %g1, %g7 |
| 7261 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7262 | splash_lsu_40_173: |
| 7263 | nop |
| 7264 | ta T_CHANGE_HPRIV |
| 7265 | set 0xafed0d9b, %r2 |
| 7266 | mov 0x3, %r1 |
| 7267 | sllx %r1, 32, %r1 |
| 7268 | or %r1, %r2, %r2 |
| 7269 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7270 | ta T_CHANGE_NONHPRIV |
| 7271 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7272 | mondo_40_174: |
| 7273 | nop |
| 7274 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7275 | ta T_CHANGE_PRIV |
| 7276 | stxa %r4, [%r0+0x3d0] %asi |
| 7277 | .word 0x9d950007 ! 231: WRPR_WSTATE_R wrpr %r20, %r7, %wstate |
| 7278 | memptr_40_175: |
| 7279 | set 0x60740000, %r31 |
| 7280 | .word 0x858437b9 ! 232: WRCCR_I wr %r16, 0x17b9, %ccr |
| 7281 | mondo_40_176: |
| 7282 | nop |
| 7283 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7284 | ta T_CHANGE_PRIV |
| 7285 | stxa %r8, [%r0+0x3d8] %asi |
| 7286 | .word 0x9d940010 ! 233: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 7287 | #if (defined SPC || defined CMP) |
| 7288 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_177)+32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7289 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_177)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7290 | #else |
| 7291 | !! TODO:Generate XIR via RESET_GEN register |
| 7292 | ! setx 0x8900000808, %r16, %r17 |
| 7293 | ! mov 0x2, %r16 |
| 7294 | ! stw %r16, [%r17] |
| 7295 | #endif |
| 7296 | xir_40_177: |
| 7297 | .word 0xa9847dc1 ! 234: WR_SET_SOFTINT_I wr %r17, 0x1dc1, %set_softint |
| 7298 | splash_lsu_40_178: |
| 7299 | nop |
| 7300 | ta T_CHANGE_HPRIV |
| 7301 | set 0x50212139, %r2 |
| 7302 | mov 0x2, %r1 |
| 7303 | sllx %r1, 32, %r1 |
| 7304 | or %r1, %r2, %r2 |
| 7305 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7306 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7307 | pmu_40_179: |
| 7308 | nop |
| 7309 | setx 0xfffff5fafffff355, %g1, %g7 |
| 7310 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7311 | splash_lsu_40_180: |
| 7312 | nop |
| 7313 | ta T_CHANGE_HPRIV |
| 7314 | set 0xaadb9487, %r2 |
| 7315 | mov 0x1, %r1 |
| 7316 | sllx %r1, 32, %r1 |
| 7317 | or %r1, %r2, %r2 |
| 7318 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7319 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7320 | splash_cmpr_40_181: |
| 7321 | mov 0, %r18 |
| 7322 | sllx %r18, 63, %r18 |
| 7323 | rd %tick, %r17 |
| 7324 | add %r17, 0x70, %r17 |
| 7325 | or %r17, %r18, %r17 |
| 7326 | ta T_CHANGE_HPRIV |
| 7327 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7328 | .word 0xaf800011 ! 238: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7329 | .word 0xe057e0f8 ! 239: LDSH_I ldsh [%r31 + 0x00f8], %r16 |
| 7330 | donret_40_182: |
| 7331 | nop |
| 7332 | ta T_CHANGE_HPRIV ! macro |
| 7333 | rd %pc, %r12 |
| 7334 | add %r12, (donretarg_40_182-donret_40_182-8), %r12 |
| 7335 | mov 0x38, %r18 |
| 7336 | stxa %r12, [%r18]0x58 |
| 7337 | add %r12, 0x4, %r11 |
| 7338 | wrpr %g0, 0x2, %tl |
| 7339 | wrpr %g0, %r12, %tpc |
| 7340 | wrpr %g0, %r11, %tnpc |
| 7341 | set (0x0007a7b8 | (0x83 << 24)), %r13 |
| 7342 | rdpr %tstate, %r16 |
| 7343 | mov 0x1f, %r19 |
| 7344 | and %r19, %r16, %r17 |
| 7345 | andn %r16, %r19, %r16 |
| 7346 | or %r16, %r17, %r20 |
| 7347 | wrpr %r20, %g0, %tstate |
| 7348 | wrhpr %g0, 0x897, %htstate |
| 7349 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 7350 | retry |
| 7351 | donretarg_40_182: |
| 7352 | .word 0xe0ffe0d8 ! 240: SWAPA_I swapa %r16, [%r31 + 0x00d8] %asi |
| 7353 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7354 | reduce_priv_lvl_40_183: |
| 7355 | ta T_CHANGE_NONPRIV ! macro |
| 7356 | .word 0xe1bfe0e0 ! 242: STDFA_I stda %f16, [0x00e0, %r31] |
| 7357 | #if (defined SPC || defined CMP) |
| 7358 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_184)+48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7359 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_184)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7360 | #else |
| 7361 | !! TODO:Generate XIR via RESET_GEN register |
| 7362 | ! setx 0x8900000808, %r16, %r17 |
| 7363 | ! mov 0x2, %r16 |
| 7364 | ! stw %r16, [%r17] |
| 7365 | #endif |
| 7366 | xir_40_184: |
| 7367 | .word 0xa9837f51 ! 243: WR_SET_SOFTINT_I wr %r13, 0x1f51, %set_softint |
| 7368 | unsupttte_40_185: |
| 7369 | nop |
| 7370 | ta T_CHANGE_HPRIV |
| 7371 | mov 1, %r20 |
| 7372 | sllx %r20, 63, %r20 |
| 7373 | or %r20, 2,%r20 |
| 7374 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 7375 | ta T_CHANGE_NONHPRIV |
| 7376 | .word 0xa9a409b0 ! 244: FDIVs fdivs %f16, %f16, %f20 |
| 7377 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 7378 | nop |
| 7379 | ta T_CHANGE_HPRIV |
| 7380 | mov 0x40+1, %r10 |
| 7381 | set sync_thr_counter5, %r23 |
| 7382 | #ifndef SPC |
| 7383 | ldxa [%g0]0x63, %o1 |
| 7384 | and %o1, 0x38, %o1 |
| 7385 | add %o1, %r23, %r23 |
| 7386 | sllx %o1, 5, %o3 !(CID*256) |
| 7387 | #endif |
| 7388 | cas [%r23],%g0,%r10 !lock |
| 7389 | brnz %r10, cwq_40_186 |
| 7390 | rd %asi, %r12 |
| 7391 | wr %g0, 0x40, %asi |
| 7392 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7393 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7394 | cmp %l1, 1 |
| 7395 | bne cwq_40_186 |
| 7396 | set CWQ_BASE, %l6 |
| 7397 | #ifndef SPC |
| 7398 | add %l6, %o3, %l6 |
| 7399 | #endif |
| 7400 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7401 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 7402 | sllx %l2, 32, %l2 |
| 7403 | stx %l2, [%l6 + 0x0] |
| 7404 | membar #Sync |
| 7405 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7406 | sub %l2, 0x40, %l2 |
| 7407 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7408 | wr %r12, %g0, %asi |
| 7409 | st %g0, [%r23] |
| 7410 | cwq_40_186: |
| 7411 | ta T_CHANGE_NONHPRIV |
| 7412 | .word 0x95414000 ! 246: RDPC rd %pc, %r10 |
| 7413 | setx 0x1e9072ee17f67cf0, %r1, %r28 |
| 7414 | stxa %r28, [%g0] 0x73 |
| 7415 | intvec_40_187: |
| 7416 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7417 | pmu_40_188: |
| 7418 | nop |
| 7419 | setx 0xfffff1fafffff4eb, %g1, %g7 |
| 7420 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7421 | splash_cmpr_40_189: |
| 7422 | mov 0, %r18 |
| 7423 | sllx %r18, 63, %r18 |
| 7424 | rd %tick, %r17 |
| 7425 | add %r17, 0x50, %r17 |
| 7426 | or %r17, %r18, %r17 |
| 7427 | ta T_CHANGE_HPRIV |
| 7428 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7429 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7430 | donret_40_190: |
| 7431 | nop |
| 7432 | ta T_CHANGE_HPRIV ! macro |
| 7433 | rd %pc, %r12 |
| 7434 | add %r12, (donretarg_40_190-donret_40_190-8), %r12 |
| 7435 | mov 0x38, %r18 |
| 7436 | stxa %r12, [%r18]0x58 |
| 7437 | add %r12, 0x4, %r11 |
| 7438 | wrpr %g0, 0x2, %tl |
| 7439 | wrpr %g0, %r12, %tpc |
| 7440 | wrpr %g0, %r11, %tnpc |
| 7441 | set (0x00f771a1 | (0x8a << 24)), %r13 |
| 7442 | rdpr %tstate, %r16 |
| 7443 | mov 0x1f, %r19 |
| 7444 | and %r19, %r16, %r17 |
| 7445 | andn %r16, %r19, %r16 |
| 7446 | or %r16, %r17, %r20 |
| 7447 | wrpr %r20, %g0, %tstate |
| 7448 | wrhpr %g0, 0x697, %htstate |
| 7449 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 7450 | retry |
| 7451 | donretarg_40_190: |
| 7452 | .word 0x9ba409d4 ! 250: FDIVd fdivd %f16, %f20, %f44 |
| 7453 | memptr_40_191: |
| 7454 | set 0x60140000, %r31 |
| 7455 | .word 0x85817fef ! 251: WRCCR_I wr %r5, 0x1fef, %ccr |
| 7456 | .word 0xe49fc540 ! 252: LDDA_R ldda [%r31, %r0] 0x2a, %r18 |
| 7457 | invtsb_40_192: |
| 7458 | nop |
| 7459 | ta T_CHANGE_HPRIV |
| 7460 | rd %asi, %r21 |
| 7461 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 7462 | mov 1, %r20 |
| 7463 | sllx %r20, 63, %r20 |
| 7464 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 7465 | xor %r22 ,%r20, %r22 |
| 7466 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 7467 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 7468 | xor %r22 ,%r20, %r22 |
| 7469 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 7470 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 7471 | xor %r22 ,%r20, %r22 |
| 7472 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 7473 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 7474 | xor %r22 ,%r20, %r22 |
| 7475 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 7476 | wr %r21, %r0, %asi |
| 7477 | ta T_CHANGE_NONHPRIV |
| 7478 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 7479 | nop |
| 7480 | ta T_CHANGE_HPRIV |
| 7481 | mov 0x40+1, %r10 |
| 7482 | set sync_thr_counter5, %r23 |
| 7483 | #ifndef SPC |
| 7484 | ldxa [%g0]0x63, %o1 |
| 7485 | and %o1, 0x38, %o1 |
| 7486 | add %o1, %r23, %r23 |
| 7487 | sllx %o1, 5, %o3 !(CID*256) |
| 7488 | #endif |
| 7489 | cas [%r23],%g0,%r10 !lock |
| 7490 | brnz %r10, cwq_40_193 |
| 7491 | rd %asi, %r12 |
| 7492 | wr %g0, 0x40, %asi |
| 7493 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7494 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7495 | cmp %l1, 1 |
| 7496 | bne cwq_40_193 |
| 7497 | set CWQ_BASE, %l6 |
| 7498 | #ifndef SPC |
| 7499 | add %l6, %o3, %l6 |
| 7500 | #endif |
| 7501 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7502 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 7503 | sllx %l2, 32, %l2 |
| 7504 | stx %l2, [%l6 + 0x0] |
| 7505 | membar #Sync |
| 7506 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7507 | sub %l2, 0x40, %l2 |
| 7508 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7509 | wr %r12, %g0, %asi |
| 7510 | st %g0, [%r23] |
| 7511 | cwq_40_193: |
| 7512 | ta T_CHANGE_NONHPRIV |
| 7513 | .word 0xa7414000 ! 254: RDPC rd %pc, %r19 |
| 7514 | splash_lsu_40_194: |
| 7515 | nop |
| 7516 | ta T_CHANGE_HPRIV |
| 7517 | set 0x7a6367ed, %r2 |
| 7518 | mov 0x2, %r1 |
| 7519 | sllx %r1, 32, %r1 |
| 7520 | or %r1, %r2, %r2 |
| 7521 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7522 | ta T_CHANGE_NONHPRIV |
| 7523 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7524 | .word 0x9b53c000 ! 256: RDPR_FQ <illegal instruction> |
| 7525 | vahole_40_195: |
| 7526 | nop |
| 7527 | ta T_CHANGE_NONHPRIV |
| 7528 | setx vahole_target2, %r18, %r27 |
| 7529 | jmpl %r27+0, %r27 |
| 7530 | .word 0xe83fe1d0 ! 257: STD_I std %r20, [%r31 + 0x01d0] |
| 7531 | #if (defined SPC || defined CMP) |
| 7532 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_196) + 8, 16, 16)) -> intp(0,0,13) |
| 7533 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_196)&0xffffffff) + 8, 16, 16)) -> intp(0,0,13) |
| 7534 | #else |
| 7535 | setx 0xc4e3ec66950ee723, %r1, %r28 |
| 7536 | stxa %r28, [%g0] 0x73 |
| 7537 | #endif |
| 7538 | intvec_40_196: |
| 7539 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7540 | nop |
| 7541 | ta T_CHANGE_HPRIV |
| 7542 | mov 0x40, %r10 |
| 7543 | set sync_thr_counter6, %r23 |
| 7544 | #ifndef SPC |
| 7545 | ldxa [%g0]0x63, %o1 |
| 7546 | and %o1, 0x38, %o1 |
| 7547 | add %o1, %r23, %r23 |
| 7548 | #endif |
| 7549 | cas [%r23],%g0,%r10 !lock |
| 7550 | brnz %r10, sma_40_197 |
| 7551 | rd %asi, %r12 |
| 7552 | wr %g0, 0x40, %asi |
| 7553 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7554 | set 0x00061fff, %g1 |
| 7555 | stxa %g1, [%g0 + 0x80] %asi |
| 7556 | wr %r12, %g0, %asi |
| 7557 | st %g0, [%r23] |
| 7558 | sma_40_197: |
| 7559 | ta T_CHANGE_NONHPRIV |
| 7560 | .word 0xe9e7e00b ! 259: CASA_R casa [%r31] %asi, %r11, %r20 |
| 7561 | .word 0xe8c7e180 ! 260: LDSWA_I ldswa [%r31, + 0x0180] %asi, %r20 |
| 7562 | vahole_40_198: |
| 7563 | nop |
| 7564 | ta T_CHANGE_NONHPRIV |
| 7565 | setx vahole_target3, %r18, %r27 |
| 7566 | jmpl %r27+0, %r27 |
| 7567 | .word 0xa9703162 ! 261: POPC_I popc 0x1162, %r20 |
| 7568 | .word 0xd697e1e8 ! 262: LDUHA_I lduha [%r31, + 0x01e8] %asi, %r11 |
| 7569 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 7570 | .word 0xd68fe1c8 ! 264: LDUBA_I lduba [%r31, + 0x01c8] %asi, %r11 |
| 7571 | pmu_40_199: |
| 7572 | nop |
| 7573 | setx 0xfffff43bfffffc0b, %g1, %g7 |
| 7574 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7575 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 7576 | vahole_40_201: |
| 7577 | nop |
| 7578 | ta T_CHANGE_NONHPRIV |
| 7579 | setx vahole_target1, %r18, %r27 |
| 7580 | jmpl %r27+0, %r27 |
| 7581 | .word 0x95a309b2 ! 267: FDIVs fdivs %f12, %f18, %f10 |
| 7582 | .word 0x24cd0001 ! 1: BRLEZ brlez,a,pt %r20,<label_0xd0001> |
| 7583 | .word 0x8d903305 ! 268: WRPR_PSTATE_I wrpr %r0, 0x1305, %pstate |
| 7584 | .word 0xe097e0d8 ! 269: LDUHA_I lduha [%r31, + 0x00d8] %asi, %r16 |
| 7585 | nop |
| 7586 | ta T_CHANGE_HPRIV |
| 7587 | mov 0x40, %r10 |
| 7588 | set sync_thr_counter6, %r23 |
| 7589 | #ifndef SPC |
| 7590 | ldxa [%g0]0x63, %o1 |
| 7591 | and %o1, 0x38, %o1 |
| 7592 | add %o1, %r23, %r23 |
| 7593 | #endif |
| 7594 | cas [%r23],%g0,%r10 !lock |
| 7595 | brnz %r10, sma_40_203 |
| 7596 | rd %asi, %r12 |
| 7597 | wr %g0, 0x40, %asi |
| 7598 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7599 | set 0x001e1fff, %g1 |
| 7600 | stxa %g1, [%g0 + 0x80] %asi |
| 7601 | wr %r12, %g0, %asi |
| 7602 | st %g0, [%r23] |
| 7603 | sma_40_203: |
| 7604 | ta T_CHANGE_NONHPRIV |
| 7605 | .word 0xe1e7e011 ! 270: CASA_R casa [%r31] %asi, %r17, %r16 |
| 7606 | .word 0xe07fe140 ! 271: SWAP_I swap %r16, [%r31 + 0x0140] |
| 7607 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 7608 | cwp_40_204: |
| 7609 | set user_data_start, %o7 |
| 7610 | .word 0x93902007 ! 273: WRPR_CWP_I wrpr %r0, 0x0007, %cwp |
| 7611 | pmu_40_205: |
| 7612 | nop |
| 7613 | ta T_CHANGE_PRIV |
| 7614 | setx 0xfffff2e8fffff71d, %g1, %g7 |
| 7615 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7616 | mondo_40_206: |
| 7617 | nop |
| 7618 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7619 | ta T_CHANGE_PRIV |
| 7620 | stxa %r5, [%r0+0x3c8] %asi |
| 7621 | .word 0x9d910005 ! 275: WRPR_WSTATE_R wrpr %r4, %r5, %wstate |
| 7622 | br_badelay3_40_207: |
| 7623 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 7624 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 7625 | .word 0x93a0054b ! 1: FSQRTd fsqrt |
| 7626 | .word 0xa5a4c82a ! 276: FADDs fadds %f19, %f10, %f18 |
| 7627 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7628 | reduce_priv_lvl_40_208: |
| 7629 | ta T_CHANGE_NONPRIV ! macro |
| 7630 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 7631 | mondo_40_210: |
| 7632 | nop |
| 7633 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7634 | stxa %r16, [%r0+0x3e0] %asi |
| 7635 | .word 0x9d920004 ! 279: WRPR_WSTATE_R wrpr %r8, %r4, %wstate |
| 7636 | donret_40_211: |
| 7637 | nop |
| 7638 | ta T_CHANGE_HPRIV ! macro |
| 7639 | rd %pc, %r12 |
| 7640 | add %r12, (donretarg_40_211-donret_40_211-4), %r12 |
| 7641 | mov 0x38, %r18 |
| 7642 | stxa %r12, [%r18]0x58 |
| 7643 | add %r12, 0x4, %r11 |
| 7644 | wrpr %g0, 0x1, %tl |
| 7645 | wrpr %g0, %r12, %tpc |
| 7646 | wrpr %g0, %r11, %tnpc |
| 7647 | set (0x00a10e30 | (0x55 << 24)), %r13 |
| 7648 | rdpr %tstate, %r16 |
| 7649 | mov 0x1f, %r19 |
| 7650 | and %r19, %r16, %r17 |
| 7651 | andn %r16, %r19, %r16 |
| 7652 | or %r16, %r17, %r20 |
| 7653 | wrpr %r20, %g0, %tstate |
| 7654 | wrhpr %g0, 0x465, %htstate |
| 7655 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 7656 | done |
| 7657 | donretarg_40_211: |
| 7658 | .word 0xd86fe0d2 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x00d2] |
| 7659 | donret_40_212: |
| 7660 | nop |
| 7661 | ta T_CHANGE_HPRIV ! macro |
| 7662 | rd %pc, %r12 |
| 7663 | add %r12, (donretarg_40_212-donret_40_212-8), %r12 |
| 7664 | mov 0x38, %r18 |
| 7665 | stxa %r12, [%r18]0x58 |
| 7666 | add %r12, 0x4, %r11 |
| 7667 | wrpr %g0, 0x1, %tl |
| 7668 | wrpr %g0, %r12, %tpc |
| 7669 | wrpr %g0, %r11, %tnpc |
| 7670 | set (0x002c0b06 | (0x8a << 24)), %r13 |
| 7671 | rdpr %tstate, %r16 |
| 7672 | mov 0x1f, %r19 |
| 7673 | and %r19, %r16, %r17 |
| 7674 | andn %r16, %r19, %r16 |
| 7675 | or %r16, %r17, %r20 |
| 7676 | wrpr %r20, %g0, %tstate |
| 7677 | wrhpr %g0, 0x317, %htstate |
| 7678 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 7679 | retry |
| 7680 | donretarg_40_212: |
| 7681 | .word 0x93a149d1 ! 281: FDIVd fdivd %f36, %f48, %f40 |
| 7682 | brcommon1_40_213: |
| 7683 | nop |
| 7684 | setx common_target, %r12, %r27 |
| 7685 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7686 | ba,a .+12 |
| 7687 | .word 0xe9e7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r20 |
| 7688 | ba,a .+8 |
| 7689 | jmpl %r27+0, %r27 |
| 7690 | .word 0x91b48494 ! 282: FCMPLE32 fcmple32 %d18, %d20, %r8 |
| 7691 | .word 0xc19fe000 ! 283: LDDFA_I ldda [%r31, 0x0000], %f0 |
| 7692 | .word 0x8d903022 ! 284: WRPR_PSTATE_I wrpr %r0, 0x1022, %pstate |
| 7693 | splash_cmpr_40_215: |
| 7694 | mov 0, %r18 |
| 7695 | sllx %r18, 63, %r18 |
| 7696 | rd %tick, %r17 |
| 7697 | add %r17, 0x100, %r17 |
| 7698 | or %r17, %r18, %r17 |
| 7699 | ta T_CHANGE_PRIV |
| 7700 | .word 0xb3800011 ! 285: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7701 | splash_cmpr_40_216: |
| 7702 | mov 0, %r18 |
| 7703 | sllx %r18, 63, %r18 |
| 7704 | rd %tick, %r17 |
| 7705 | add %r17, 0x70, %r17 |
| 7706 | or %r17, %r18, %r17 |
| 7707 | ta T_CHANGE_HPRIV |
| 7708 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7709 | .word 0xb3800011 ! 286: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7710 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7711 | reduce_priv_lvl_40_217: |
| 7712 | ta T_CHANGE_NONPRIV ! macro |
| 7713 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 7714 | .word 0x8d9025a3 ! 288: WRPR_PSTATE_I wrpr %r0, 0x05a3, %pstate |
| 7715 | splash_lsu_40_219: |
| 7716 | nop |
| 7717 | ta T_CHANGE_HPRIV |
| 7718 | set 0x9c0d0457, %r2 |
| 7719 | mov 0x7, %r1 |
| 7720 | sllx %r1, 32, %r1 |
| 7721 | or %r1, %r2, %r2 |
| 7722 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7723 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7724 | donret_40_220: |
| 7725 | nop |
| 7726 | ta T_CHANGE_HPRIV ! macro |
| 7727 | rd %pc, %r12 |
| 7728 | add %r12, (donretarg_40_220-donret_40_220-8), %r12 |
| 7729 | mov 0x38, %r18 |
| 7730 | stxa %r12, [%r18]0x58 |
| 7731 | add %r12, 0x4, %r11 |
| 7732 | wrpr %g0, 0x1, %tl |
| 7733 | wrpr %g0, %r12, %tpc |
| 7734 | wrpr %g0, %r11, %tnpc |
| 7735 | set (0x00207627 | (0x80 << 24)), %r13 |
| 7736 | rdpr %tstate, %r16 |
| 7737 | mov 0x1f, %r19 |
| 7738 | and %r19, %r16, %r17 |
| 7739 | andn %r16, %r19, %r16 |
| 7740 | or %r16, %r17, %r20 |
| 7741 | wrpr %r20, %g0, %tstate |
| 7742 | wrhpr %g0, 0xbd7, %htstate |
| 7743 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 7744 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 7745 | retry |
| 7746 | donretarg_40_220: |
| 7747 | .word 0xd66fe152 ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x0152] |
| 7748 | .word 0x91d020b3 ! 291: Tcc_I ta icc_or_xcc, %r0 + 179 |
| 7749 | setx 0x939a03e24493f88e, %r1, %r28 |
| 7750 | stxa %r28, [%g0] 0x73 |
| 7751 | intvec_40_221: |
| 7752 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7753 | brcommon3_40_222: |
| 7754 | nop |
| 7755 | setx common_target, %r12, %r27 |
| 7756 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7757 | ba,a .+12 |
| 7758 | .word 0xd737e1f0 ! 1: STQF_I - %f11, [0x01f0, %r31] |
| 7759 | ba,a .+8 |
| 7760 | jmpl %r27+0, %r27 |
| 7761 | .word 0xd697c028 ! 293: LDUHA_R lduha [%r31, %r8] 0x01, %r11 |
| 7762 | .word 0xd6d7e098 ! 294: LDSHA_I ldsha [%r31, + 0x0098] %asi, %r11 |
| 7763 | pmu_40_223: |
| 7764 | nop |
| 7765 | ta T_CHANGE_PRIV |
| 7766 | setx 0xfffff9c5fffff750, %g1, %g7 |
| 7767 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7768 | .word 0x9ba00170 ! 296: FABSq dis not found |
| 7769 | |
| 7770 | #if (defined SPC || defined CMP) |
| 7771 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_225)+16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7772 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_225)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7773 | #else |
| 7774 | !! TODO:Generate XIR via RESET_GEN register |
| 7775 | ! setx 0x8900000808, %r16, %r17 |
| 7776 | ! mov 0x2, %r16 |
| 7777 | ! stw %r16, [%r17] |
| 7778 | #endif |
| 7779 | xir_40_225: |
| 7780 | .word 0xa9813dcb ! 297: WR_SET_SOFTINT_I wr %r4, 0x1dcb, %set_softint |
| 7781 | memptr_40_226: |
| 7782 | set 0x60540000, %r31 |
| 7783 | .word 0x8581a65b ! 298: WRCCR_I wr %r6, 0x065b, %ccr |
| 7784 | mondo_40_227: |
| 7785 | nop |
| 7786 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7787 | ta T_CHANGE_PRIV |
| 7788 | stxa %r19, [%r0+0x3e0] %asi |
| 7789 | .word 0x9d908007 ! 299: WRPR_WSTATE_R wrpr %r2, %r7, %wstate |
| 7790 | .word 0xd297e1b8 ! 300: LDUHA_I lduha [%r31, + 0x01b8] %asi, %r9 |
| 7791 | vahole_40_228: |
| 7792 | nop |
| 7793 | ta T_CHANGE_NONHPRIV |
| 7794 | setx vahole_target2, %r18, %r27 |
| 7795 | jmpl %r27+0, %r27 |
| 7796 | .word 0x95b447c9 ! 301: PDIST pdistn %d48, %d40, %d10 |
| 7797 | #if (defined SPC || defined CMP) |
| 7798 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_229)+32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7799 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_229)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7800 | #else |
| 7801 | !! TODO:Generate XIR via RESET_GEN register |
| 7802 | ! setx 0x8900000808, %r16, %r17 |
| 7803 | ! mov 0x2, %r16 |
| 7804 | ! stw %r16, [%r17] |
| 7805 | #endif |
| 7806 | xir_40_229: |
| 7807 | .word 0xa984a6f2 ! 302: WR_SET_SOFTINT_I wr %r18, 0x06f2, %set_softint |
| 7808 | .word 0x8d903f47 ! 303: WRPR_PSTATE_I wrpr %r0, 0x1f47, %pstate |
| 7809 | vahole_40_231: |
| 7810 | nop |
| 7811 | ta T_CHANGE_NONHPRIV |
| 7812 | setx vahole_target0, %r18, %r27 |
| 7813 | jmpl %r27+0, %r27 |
| 7814 | .word 0xe9e7e014 ! 304: CASA_R casa [%r31] %asi, %r20, %r20 |
| 7815 | trapasi_40_232: |
| 7816 | nop |
| 7817 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 7818 | .word 0xe8884980 ! 305: LDUBA_R lduba [%r1, %r0] 0x4c, %r20 |
| 7819 | #if (defined SPC || defined CMP) |
| 7820 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_233)+40, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7821 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_233)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 7822 | #else |
| 7823 | !! TODO:Generate XIR via RESET_GEN register |
| 7824 | ! setx 0x8900000808, %r16, %r17 |
| 7825 | ! mov 0x2, %r16 |
| 7826 | ! stw %r16, [%r17] |
| 7827 | #endif |
| 7828 | xir_40_233: |
| 7829 | .word 0xa9832b72 ! 306: WR_SET_SOFTINT_I wr %r12, 0x0b72, %set_softint |
| 7830 | #if (defined SPC || defined CMP) |
| 7831 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_234) + 56, 16, 16)) -> intp(2,0,1) |
| 7832 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_234)&0xffffffff) + 56, 16, 16)) -> intp(2,0,1) |
| 7833 | #else |
| 7834 | setx 0x771f1d7f65afe563, %r1, %r28 |
| 7835 | stxa %r28, [%g0] 0x73 |
| 7836 | #endif |
| 7837 | intvec_40_234: |
| 7838 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7839 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 7840 | pmu_40_235: |
| 7841 | nop |
| 7842 | ta T_CHANGE_PRIV |
| 7843 | setx 0xfffffe2afffff347, %g1, %g7 |
| 7844 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7845 | nop |
| 7846 | ta T_CHANGE_HPRIV |
| 7847 | mov 0x40+1, %r10 |
| 7848 | set sync_thr_counter5, %r23 |
| 7849 | #ifndef SPC |
| 7850 | ldxa [%g0]0x63, %o1 |
| 7851 | and %o1, 0x38, %o1 |
| 7852 | add %o1, %r23, %r23 |
| 7853 | sllx %o1, 5, %o3 !(CID*256) |
| 7854 | #endif |
| 7855 | cas [%r23],%g0,%r10 !lock |
| 7856 | brnz %r10, cwq_40_236 |
| 7857 | rd %asi, %r12 |
| 7858 | wr %g0, 0x40, %asi |
| 7859 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7860 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7861 | cmp %l1, 1 |
| 7862 | bne cwq_40_236 |
| 7863 | set CWQ_BASE, %l6 |
| 7864 | #ifndef SPC |
| 7865 | add %l6, %o3, %l6 |
| 7866 | #endif |
| 7867 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7868 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 7869 | sllx %l2, 32, %l2 |
| 7870 | stx %l2, [%l6 + 0x0] |
| 7871 | membar #Sync |
| 7872 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7873 | sub %l2, 0x40, %l2 |
| 7874 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7875 | wr %r12, %g0, %asi |
| 7876 | st %g0, [%r23] |
| 7877 | cwq_40_236: |
| 7878 | ta T_CHANGE_NONHPRIV |
| 7879 | .word 0xa5414000 ! 310: RDPC rd %pc, %r18 |
| 7880 | nop |
| 7881 | ta T_CHANGE_HPRIV |
| 7882 | mov 0x40, %r10 |
| 7883 | set sync_thr_counter6, %r23 |
| 7884 | #ifndef SPC |
| 7885 | ldxa [%g0]0x63, %o1 |
| 7886 | and %o1, 0x38, %o1 |
| 7887 | add %o1, %r23, %r23 |
| 7888 | #endif |
| 7889 | cas [%r23],%g0,%r10 !lock |
| 7890 | brnz %r10, sma_40_237 |
| 7891 | rd %asi, %r12 |
| 7892 | wr %g0, 0x40, %asi |
| 7893 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7894 | set 0x000a1fff, %g1 |
| 7895 | stxa %g1, [%g0 + 0x80] %asi |
| 7896 | wr %r12, %g0, %asi |
| 7897 | st %g0, [%r23] |
| 7898 | sma_40_237: |
| 7899 | ta T_CHANGE_NONHPRIV |
| 7900 | .word 0xd1e7e00b ! 311: CASA_R casa [%r31] %asi, %r11, %r8 |
| 7901 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7902 | reduce_priv_lvl_40_238: |
| 7903 | ta T_CHANGE_NONPRIV ! macro |
| 7904 | nop |
| 7905 | ta T_CHANGE_HPRIV |
| 7906 | mov 0x40, %r10 |
| 7907 | set sync_thr_counter6, %r23 |
| 7908 | #ifndef SPC |
| 7909 | ldxa [%g0]0x63, %o1 |
| 7910 | and %o1, 0x38, %o1 |
| 7911 | add %o1, %r23, %r23 |
| 7912 | #endif |
| 7913 | cas [%r23],%g0,%r10 !lock |
| 7914 | brnz %r10, sma_40_239 |
| 7915 | rd %asi, %r12 |
| 7916 | wr %g0, 0x40, %asi |
| 7917 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7918 | set 0x001a1fff, %g1 |
| 7919 | stxa %g1, [%g0 + 0x80] %asi |
| 7920 | wr %r12, %g0, %asi |
| 7921 | st %g0, [%r23] |
| 7922 | sma_40_239: |
| 7923 | ta T_CHANGE_NONHPRIV |
| 7924 | .word 0xd1e7e00a ! 313: CASA_R casa [%r31] %asi, %r10, %r8 |
| 7925 | .word 0xd03fc008 ! 1: STD_R std %r8, [%r31 + %r8] |
| 7926 | .word 0x9f80305e ! 314: SIR sir 0x105e |
| 7927 | .word 0x83d02033 ! 315: Tcc_I te icc_or_xcc, %r0 + 51 |
| 7928 | splash_cmpr_40_240: |
| 7929 | mov 1, %r18 |
| 7930 | sllx %r18, 63, %r18 |
| 7931 | rd %tick, %r17 |
| 7932 | add %r17, 0x100, %r17 |
| 7933 | or %r17, %r18, %r17 |
| 7934 | ta T_CHANGE_HPRIV |
| 7935 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7936 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7937 | mondo_40_241: |
| 7938 | nop |
| 7939 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7940 | stxa %r12, [%r0+0x3e0] %asi |
| 7941 | .word 0x9d940003 ! 317: WRPR_WSTATE_R wrpr %r16, %r3, %wstate |
| 7942 | nop |
| 7943 | mov 0x80, %g3 |
| 7944 | stxa %g3, [%g3] 0x57 |
| 7945 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 7946 | nop |
| 7947 | ta T_CHANGE_HPRIV |
| 7948 | mov 0x40, %r10 |
| 7949 | set sync_thr_counter6, %r23 |
| 7950 | #ifndef SPC |
| 7951 | ldxa [%g0]0x63, %o1 |
| 7952 | and %o1, 0x38, %o1 |
| 7953 | add %o1, %r23, %r23 |
| 7954 | #endif |
| 7955 | cas [%r23],%g0,%r10 !lock |
| 7956 | brnz %r10, sma_40_242 |
| 7957 | rd %asi, %r12 |
| 7958 | wr %g0, 0x40, %asi |
| 7959 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7960 | set 0x001a1fff, %g1 |
| 7961 | stxa %g1, [%g0 + 0x80] %asi |
| 7962 | wr %r12, %g0, %asi |
| 7963 | st %g0, [%r23] |
| 7964 | sma_40_242: |
| 7965 | ta T_CHANGE_NONHPRIV |
| 7966 | .word 0xd1e7e00b ! 319: CASA_R casa [%r31] %asi, %r11, %r8 |
| 7967 | br_longdelay1_40_243: |
| 7968 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 7969 | .word 0xbfe7c000 ! 320: SAVE_R save %r31, %r0, %r31 |
| 7970 | splash_cmpr_40_244: |
| 7971 | mov 1, %r18 |
| 7972 | sllx %r18, 63, %r18 |
| 7973 | rd %tick, %r17 |
| 7974 | add %r17, 0x60, %r17 |
| 7975 | or %r17, %r18, %r17 |
| 7976 | ta T_CHANGE_HPRIV |
| 7977 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7978 | .word 0xb3800011 ! 321: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7979 | pmu_40_245: |
| 7980 | nop |
| 7981 | ta T_CHANGE_PRIV |
| 7982 | setx 0xfffff861fffff64b, %g1, %g7 |
| 7983 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7984 | pmu_40_246: |
| 7985 | nop |
| 7986 | setx 0xfffff3fcfffff313, %g1, %g7 |
| 7987 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7988 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 7989 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 7990 | .word 0x99a00171 ! 326: FABSq dis not found |
| 7991 | |
| 7992 | mondo_40_249: |
| 7993 | nop |
| 7994 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7995 | stxa %r10, [%r0+0x3d0] %asi |
| 7996 | .word 0x9d94800c ! 327: WRPR_WSTATE_R wrpr %r18, %r12, %wstate |
| 7997 | #if (defined SPC || defined CMP) |
| 7998 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_250) + 40, 16, 16)) -> intp(7,0,14) |
| 7999 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_250)&0xffffffff) + 40, 16, 16)) -> intp(7,0,14) |
| 8000 | #else |
| 8001 | setx 0xebabeedfdafae1fe, %r1, %r28 |
| 8002 | stxa %r28, [%g0] 0x73 |
| 8003 | #endif |
| 8004 | intvec_40_250: |
| 8005 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8006 | donret_40_251: |
| 8007 | nop |
| 8008 | ta T_CHANGE_HPRIV ! macro |
| 8009 | rd %pc, %r12 |
| 8010 | add %r12, (donretarg_40_251-donret_40_251-4), %r12 |
| 8011 | mov 0x38, %r18 |
| 8012 | stxa %r12, [%r18]0x58 |
| 8013 | add %r12, 0x4, %r11 |
| 8014 | wrpr %g0, 0x1, %tl |
| 8015 | wrpr %g0, %r12, %tpc |
| 8016 | wrpr %g0, %r11, %tnpc |
| 8017 | set (0x008c4c8c | (0x8b << 24)), %r13 |
| 8018 | rdpr %tstate, %r16 |
| 8019 | mov 0x1f, %r19 |
| 8020 | and %r19, %r16, %r17 |
| 8021 | andn %r16, %r19, %r16 |
| 8022 | or %r16, %r17, %r20 |
| 8023 | wrpr %r20, %g0, %tstate |
| 8024 | wrhpr %g0, 0xc87, %htstate |
| 8025 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 8026 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 8027 | done |
| 8028 | donretarg_40_251: |
| 8029 | .word 0x91a049c4 ! 329: FDIVd fdivd %f32, %f4, %f8 |
| 8030 | .word 0xd4c7e138 ! 330: LDSWA_I ldswa [%r31, + 0x0138] %asi, %r10 |
| 8031 | .word 0xe1bfe0a0 ! 331: STDFA_I stda %f16, [0x00a0, %r31] |
| 8032 | nop |
| 8033 | mov 0x80, %g3 |
| 8034 | stxa %g3, [%g3] 0x5f |
| 8035 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 8036 | br_badelay3_40_252: |
| 8037 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 8038 | .word 0xc150f358 ! Random illegal ? |
| 8039 | .word 0x9ba00543 ! 1: FSQRTd fsqrt |
| 8040 | .word 0xa3a28827 ! 333: FADDs fadds %f10, %f7, %f17 |
| 8041 | splash_hpstate_40_253: |
| 8042 | .word 0x2ecd0001 ! 1: BRGEZ brgez,a,pt %r20,<label_0xd0001> |
| 8043 | .word 0x81982e07 ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x0e07, %hpstate |
| 8044 | mondo_40_254: |
| 8045 | nop |
| 8046 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8047 | ta T_CHANGE_PRIV |
| 8048 | stxa %r20, [%r0+0x3c0] %asi |
| 8049 | .word 0x9d92c007 ! 335: WRPR_WSTATE_R wrpr %r11, %r7, %wstate |
| 8050 | .word 0xe33fc010 ! 1: STDF_R std %f17, [%r16, %r31] |
| 8051 | .word 0x9f802b03 ! 336: SIR sir 0x0b03 |
| 8052 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8053 | reduce_priv_lvl_40_255: |
| 8054 | ta T_CHANGE_NONHPRIV ! macro |
| 8055 | .word 0xe277e1a0 ! 338: STX_I stx %r17, [%r31 + 0x01a0] |
| 8056 | pmu_40_256: |
| 8057 | nop |
| 8058 | ta T_CHANGE_PRIV |
| 8059 | setx 0xfffff498fffff944, %g1, %g7 |
| 8060 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8061 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 8062 | otherw |
| 8063 | mov 0xb1, %r30 |
| 8064 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 8065 | .word 0xe227e08c ! 342: STW_I stw %r17, [%r31 + 0x008c] |
| 8066 | setx 0x502431329d32e1ea, %r1, %r28 |
| 8067 | stxa %r28, [%g0] 0x73 |
| 8068 | intvec_40_257: |
| 8069 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8070 | jmptr_40_258: |
| 8071 | nop |
| 8072 | best_set_reg(0xe1200000, %r20, %r27) |
| 8073 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 8074 | donret_40_259: |
| 8075 | nop |
| 8076 | ta T_CHANGE_HPRIV ! macro |
| 8077 | rd %pc, %r12 |
| 8078 | add %r12, (donretarg_40_259-donret_40_259-4), %r12 |
| 8079 | mov 0x38, %r18 |
| 8080 | stxa %r12, [%r18]0x58 |
| 8081 | add %r12, 0x4, %r11 |
| 8082 | wrpr %g0, 0x2, %tl |
| 8083 | wrpr %g0, %r12, %tpc |
| 8084 | wrpr %g0, %r11, %tnpc |
| 8085 | set (0x00637509 | (0x89 << 24)), %r13 |
| 8086 | rdpr %tstate, %r16 |
| 8087 | mov 0x1f, %r19 |
| 8088 | and %r19, %r16, %r17 |
| 8089 | andn %r16, %r19, %r16 |
| 8090 | or %r16, %r17, %r20 |
| 8091 | wrpr %r20, %g0, %tstate |
| 8092 | wrhpr %g0, 0xb2f, %htstate |
| 8093 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 8094 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 8095 | done |
| 8096 | donretarg_40_259: |
| 8097 | .word 0xa3a309d4 ! 345: FDIVd fdivd %f12, %f20, %f48 |
| 8098 | jmptr_40_260: |
| 8099 | nop |
| 8100 | best_set_reg(0xe1200000, %r20, %r27) |
| 8101 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 8102 | .word 0x97a00166 ! 347: FABSq dis not found |
| 8103 | |
| 8104 | .word 0x92c42b38 ! 348: ADDCcc_I addccc %r16, 0x0b38, %r9 |
| 8105 | mondo_40_262: |
| 8106 | nop |
| 8107 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8108 | stxa %r2, [%r0+0x3e0] %asi |
| 8109 | .word 0x9d948011 ! 349: WRPR_WSTATE_R wrpr %r18, %r17, %wstate |
| 8110 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 8111 | .word 0x8d903bfb ! 350: WRPR_PSTATE_I wrpr %r0, 0x1bfb, %pstate |
| 8112 | .word 0xe19fe0a0 ! 351: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 8113 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 8114 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8115 | reduce_priv_lvl_40_265: |
| 8116 | ta T_CHANGE_NONHPRIV ! macro |
| 8117 | #if (defined SPC || defined CMP) |
| 8118 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_266) + 16, 16, 16)) -> intp(7,0,22) |
| 8119 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_266)&0xffffffff) + 16, 16, 16)) -> intp(7,0,22) |
| 8120 | #else |
| 8121 | setx 0xf29f1d118eea728b, %r1, %r28 |
| 8122 | stxa %r28, [%g0] 0x73 |
| 8123 | #endif |
| 8124 | intvec_40_266: |
| 8125 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8126 | vahole_40_267: |
| 8127 | nop |
| 8128 | ta T_CHANGE_NONHPRIV |
| 8129 | setx vahole_target1, %r18, %r27 |
| 8130 | jmpl %r27+0, %r27 |
| 8131 | .word 0xe69fe1b0 ! 355: LDDA_I ldda [%r31, + 0x01b0] %asi, %r19 |
| 8132 | .word 0xe19fe160 ! 356: LDDFA_I ldda [%r31, 0x0160], %f16 |
| 8133 | #if (defined SPC || defined CMP) |
| 8134 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_268)+48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8135 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_268)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8136 | #else |
| 8137 | !! TODO:Generate XIR via RESET_GEN register |
| 8138 | ! setx 0x8900000808, %r16, %r17 |
| 8139 | ! mov 0x2, %r16 |
| 8140 | ! stw %r16, [%r17] |
| 8141 | #endif |
| 8142 | xir_40_268: |
| 8143 | .word 0xa984be61 ! 357: WR_SET_SOFTINT_I wr %r18, 0x1e61, %set_softint |
| 8144 | setx 0x2af69eec2b1d8013, %r1, %r28 |
| 8145 | stxa %r28, [%g0] 0x73 |
| 8146 | intvec_40_269: |
| 8147 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8148 | nop |
| 8149 | ta T_CHANGE_HPRIV |
| 8150 | mov 0x40+1, %r10 |
| 8151 | set sync_thr_counter5, %r23 |
| 8152 | #ifndef SPC |
| 8153 | ldxa [%g0]0x63, %o1 |
| 8154 | and %o1, 0x38, %o1 |
| 8155 | add %o1, %r23, %r23 |
| 8156 | sllx %o1, 5, %o3 !(CID*256) |
| 8157 | #endif |
| 8158 | cas [%r23],%g0,%r10 !lock |
| 8159 | brnz %r10, cwq_40_270 |
| 8160 | rd %asi, %r12 |
| 8161 | wr %g0, 0x40, %asi |
| 8162 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8163 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8164 | cmp %l1, 1 |
| 8165 | bne cwq_40_270 |
| 8166 | set CWQ_BASE, %l6 |
| 8167 | #ifndef SPC |
| 8168 | add %l6, %o3, %l6 |
| 8169 | #endif |
| 8170 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8171 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 8172 | sllx %l2, 32, %l2 |
| 8173 | stx %l2, [%l6 + 0x0] |
| 8174 | membar #Sync |
| 8175 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8176 | sub %l2, 0x40, %l2 |
| 8177 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8178 | wr %r12, %g0, %asi |
| 8179 | st %g0, [%r23] |
| 8180 | cwq_40_270: |
| 8181 | ta T_CHANGE_NONHPRIV |
| 8182 | .word 0x9b414000 ! 359: RDPC rd %pc, %r13 |
| 8183 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 8184 | br_longdelay1_40_272: |
| 8185 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 8186 | .word 0x9d97c000 ! 361: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 8187 | fpinit_40_273: |
| 8188 | nop |
| 8189 | setx fp_data_quads, %r19, %r20 |
| 8190 | ldd [%r20], %f0 |
| 8191 | ldd [%r20+8], %f4 |
| 8192 | ld [%r20+16], %fsr |
| 8193 | ld [%r20+24], %r19 |
| 8194 | wr %r19, %g0, %gsr |
| 8195 | .word 0x87a80a44 ! 362: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 8196 | jmptr_40_274: |
| 8197 | nop |
| 8198 | best_set_reg(0xe1200000, %r20, %r27) |
| 8199 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 8200 | ta T_CHANGE_NONHPRIV |
| 8201 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 8202 | intveclr_40_276: |
| 8203 | nop |
| 8204 | ta T_CHANGE_HPRIV |
| 8205 | setx 0x2570409bb4caec48, %r1, %r28 |
| 8206 | stxa %r28, [%g0] 0x72 |
| 8207 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8208 | nop |
| 8209 | ta T_CHANGE_HPRIV |
| 8210 | mov 0x40+1, %r10 |
| 8211 | set sync_thr_counter5, %r23 |
| 8212 | #ifndef SPC |
| 8213 | ldxa [%g0]0x63, %o1 |
| 8214 | and %o1, 0x38, %o1 |
| 8215 | add %o1, %r23, %r23 |
| 8216 | sllx %o1, 5, %o3 !(CID*256) |
| 8217 | #endif |
| 8218 | cas [%r23],%g0,%r10 !lock |
| 8219 | brnz %r10, cwq_40_277 |
| 8220 | rd %asi, %r12 |
| 8221 | wr %g0, 0x40, %asi |
| 8222 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8223 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8224 | cmp %l1, 1 |
| 8225 | bne cwq_40_277 |
| 8226 | set CWQ_BASE, %l6 |
| 8227 | #ifndef SPC |
| 8228 | add %l6, %o3, %l6 |
| 8229 | #endif |
| 8230 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8231 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 8232 | sllx %l2, 32, %l2 |
| 8233 | stx %l2, [%l6 + 0x0] |
| 8234 | membar #Sync |
| 8235 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8236 | sub %l2, 0x40, %l2 |
| 8237 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8238 | wr %r12, %g0, %asi |
| 8239 | st %g0, [%r23] |
| 8240 | cwq_40_277: |
| 8241 | ta T_CHANGE_NONHPRIV |
| 8242 | .word 0x99414000 ! 366: RDPC rd %pc, %r12 |
| 8243 | brcommon3_40_278: |
| 8244 | nop |
| 8245 | setx common_target, %r12, %r27 |
| 8246 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8247 | ba,a .+12 |
| 8248 | .word 0xd937c010 ! 1: STQF_R - %f12, [%r16, %r31] |
| 8249 | ba,a .+8 |
| 8250 | jmpl %r27+0, %r27 |
| 8251 | .word 0xd897c034 ! 367: LDUHA_R lduha [%r31, %r20] 0x01, %r12 |
| 8252 | .word 0xd827e110 ! 368: STW_I stw %r12, [%r31 + 0x0110] |
| 8253 | .word 0xd8c7e128 ! 369: LDSWA_I ldswa [%r31, + 0x0128] %asi, %r12 |
| 8254 | #if (defined SPC || defined CMP) |
| 8255 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_279)+32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8256 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_279)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8257 | #else |
| 8258 | !! TODO:Generate XIR via RESET_GEN register |
| 8259 | ! setx 0x8900000808, %r16, %r17 |
| 8260 | ! mov 0x2, %r16 |
| 8261 | ! stw %r16, [%r17] |
| 8262 | #endif |
| 8263 | xir_40_279: |
| 8264 | .word 0xa98522f0 ! 370: WR_SET_SOFTINT_I wr %r20, 0x02f0, %set_softint |
| 8265 | nop |
| 8266 | ta T_CHANGE_HPRIV |
| 8267 | mov 0x40+1, %r10 |
| 8268 | set sync_thr_counter5, %r23 |
| 8269 | #ifndef SPC |
| 8270 | ldxa [%g0]0x63, %o1 |
| 8271 | and %o1, 0x38, %o1 |
| 8272 | add %o1, %r23, %r23 |
| 8273 | sllx %o1, 5, %o3 !(CID*256) |
| 8274 | #endif |
| 8275 | cas [%r23],%g0,%r10 !lock |
| 8276 | brnz %r10, cwq_40_280 |
| 8277 | rd %asi, %r12 |
| 8278 | wr %g0, 0x40, %asi |
| 8279 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8280 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8281 | cmp %l1, 1 |
| 8282 | bne cwq_40_280 |
| 8283 | set CWQ_BASE, %l6 |
| 8284 | #ifndef SPC |
| 8285 | add %l6, %o3, %l6 |
| 8286 | #endif |
| 8287 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8288 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 8289 | sllx %l2, 32, %l2 |
| 8290 | stx %l2, [%l6 + 0x0] |
| 8291 | membar #Sync |
| 8292 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8293 | sub %l2, 0x40, %l2 |
| 8294 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8295 | wr %r12, %g0, %asi |
| 8296 | st %g0, [%r23] |
| 8297 | cwq_40_280: |
| 8298 | ta T_CHANGE_NONHPRIV |
| 8299 | .word 0x95414000 ! 371: RDPC rd %pc, %r10 |
| 8300 | .word 0xd4cfe000 ! 372: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r10 |
| 8301 | splash_cmpr_40_281: |
| 8302 | mov 0, %r18 |
| 8303 | sllx %r18, 63, %r18 |
| 8304 | rd %tick, %r17 |
| 8305 | add %r17, 0x100, %r17 |
| 8306 | or %r17, %r18, %r17 |
| 8307 | ta T_CHANGE_HPRIV |
| 8308 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8309 | .word 0xaf800011 ! 373: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8310 | nop |
| 8311 | ta T_CHANGE_HPRIV |
| 8312 | mov 0x40, %r10 |
| 8313 | set sync_thr_counter6, %r23 |
| 8314 | #ifndef SPC |
| 8315 | ldxa [%g0]0x63, %o1 |
| 8316 | and %o1, 0x38, %o1 |
| 8317 | add %o1, %r23, %r23 |
| 8318 | #endif |
| 8319 | cas [%r23],%g0,%r10 !lock |
| 8320 | brnz %r10, sma_40_282 |
| 8321 | rd %asi, %r12 |
| 8322 | wr %g0, 0x40, %asi |
| 8323 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8324 | set 0x000e1fff, %g1 |
| 8325 | stxa %g1, [%g0 + 0x80] %asi |
| 8326 | wr %r12, %g0, %asi |
| 8327 | st %g0, [%r23] |
| 8328 | sma_40_282: |
| 8329 | ta T_CHANGE_NONHPRIV |
| 8330 | .word 0xd5e7e00c ! 374: CASA_R casa [%r31] %asi, %r12, %r10 |
| 8331 | br_badelay2_40_283: |
| 8332 | .word 0x97a149d1 ! 1: FDIVd fdivd %f36, %f48, %f42 |
| 8333 | pdist %f28, %f22, %f6 |
| 8334 | .word 0x93b50310 ! 375: ALIGNADDRESS alignaddr %r20, %r16, %r9 |
| 8335 | .word 0xe19fe180 ! 376: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 8336 | .word 0xc36fe190 ! 1: PREFETCH_I prefetch [%r31 + 0x0190], #one_read |
| 8337 | .word 0x9f803180 ! 377: SIR sir 0x1180 |
| 8338 | .word 0xe1bfd920 ! 378: STDFA_R stda %f16, [%r0, %r31] |
| 8339 | .word 0xa2dc0010 ! 379: SMULcc_R smulcc %r16, %r16, %r17 |
| 8340 | fbul,a,pn %fcc0, skip_40_284 |
| 8341 | fbl skip_40_284 |
| 8342 | .align 2048 |
| 8343 | skip_40_284: |
| 8344 | .word 0xc36fe054 ! 380: PREFETCH_I prefetch [%r31 + 0x0054], #one_read |
| 8345 | nop |
| 8346 | ta T_CHANGE_HPRIV |
| 8347 | mov 0x40+1, %r10 |
| 8348 | set sync_thr_counter5, %r23 |
| 8349 | #ifndef SPC |
| 8350 | ldxa [%g0]0x63, %o1 |
| 8351 | and %o1, 0x38, %o1 |
| 8352 | add %o1, %r23, %r23 |
| 8353 | sllx %o1, 5, %o3 !(CID*256) |
| 8354 | #endif |
| 8355 | cas [%r23],%g0,%r10 !lock |
| 8356 | brnz %r10, cwq_40_285 |
| 8357 | rd %asi, %r12 |
| 8358 | wr %g0, 0x40, %asi |
| 8359 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8360 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8361 | cmp %l1, 1 |
| 8362 | bne cwq_40_285 |
| 8363 | set CWQ_BASE, %l6 |
| 8364 | #ifndef SPC |
| 8365 | add %l6, %o3, %l6 |
| 8366 | #endif |
| 8367 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8368 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 8369 | sllx %l2, 32, %l2 |
| 8370 | stx %l2, [%l6 + 0x0] |
| 8371 | membar #Sync |
| 8372 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8373 | sub %l2, 0x40, %l2 |
| 8374 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8375 | wr %r12, %g0, %asi |
| 8376 | st %g0, [%r23] |
| 8377 | cwq_40_285: |
| 8378 | ta T_CHANGE_NONHPRIV |
| 8379 | .word 0xa9414000 ! 381: RDPC rd %pc, %r20 |
| 8380 | brcommon3_40_286: |
| 8381 | nop |
| 8382 | setx common_target, %r12, %r27 |
| 8383 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8384 | ba,a .+12 |
| 8385 | .word 0xdb37c009 ! 1: STQF_R - %f13, [%r9, %r31] |
| 8386 | ba,a .+8 |
| 8387 | jmpl %r27+0, %r27 |
| 8388 | .word 0xda9fc02a ! 382: LDDA_R ldda [%r31, %r10] 0x01, %r13 |
| 8389 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 8390 | .word 0xdadfc028 ! 384: LDXA_R ldxa [%r31, %r8] 0x01, %r13 |
| 8391 | #if (defined SPC || defined CMP) |
| 8392 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_288) + 16, 16, 16)) -> intp(3,0,1) |
| 8393 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_288)&0xffffffff) + 16, 16, 16)) -> intp(3,0,1) |
| 8394 | #else |
| 8395 | setx 0xc65b32f1f95b8109, %r1, %r28 |
| 8396 | stxa %r28, [%g0] 0x73 |
| 8397 | #endif |
| 8398 | intvec_40_288: |
| 8399 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8400 | tagged_40_289: |
| 8401 | taddcctv %r0, 0x1e23, %r16 |
| 8402 | .word 0xda07e0ac ! 386: LDUW_I lduw [%r31 + 0x00ac], %r13 |
| 8403 | ibp_40_290: |
| 8404 | nop |
| 8405 | ta T_CHANGE_HPRIV |
| 8406 | mov 8, %r18 |
| 8407 | rd %asi, %r12 |
| 8408 | wr %r0, 0x41, %asi |
| 8409 | set sync_thr_counter4, %r23 |
| 8410 | #ifndef SPC |
| 8411 | ldxa [%g0]0x63, %r8 |
| 8412 | and %r8, 0x38, %r8 ! Core ID |
| 8413 | add %r8, %r23, %r23 |
| 8414 | #else |
| 8415 | mov 0, %r8 |
| 8416 | #endif |
| 8417 | mov 0x40, %r16 |
| 8418 | ibp_startwait40_290: |
| 8419 | cas [%r23],%g0,%r16 !lock |
| 8420 | brz,a %r16, continue_ibp_40_290 |
| 8421 | mov (~0x40&0xf0), %r16 |
| 8422 | ld [%r23], %r16 |
| 8423 | ibp_wait40_290: |
| 8424 | brnz %r16, ibp_wait40_290 |
| 8425 | ld [%r23], %r16 |
| 8426 | ba ibp_startwait40_290 |
| 8427 | mov 0x40, %r16 |
| 8428 | continue_ibp_40_290: |
| 8429 | sllx %r16, %r8, %r16 !Mask for my core only |
| 8430 | ldxa [0x58]%asi, %r17 !Running_status |
| 8431 | wait_for_stat_40_290: |
| 8432 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8433 | cmp %r13, %r17 |
| 8434 | bne,a wait_for_stat_40_290 |
| 8435 | ldxa [0x58]%asi, %r17 !Running_status |
| 8436 | stxa %r16, [0x68]%asi !Park (W1C) |
| 8437 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8438 | wait_for_ibp_40_290: |
| 8439 | ldxa [0x58]%asi, %r17 !Running_status |
| 8440 | cmp %r14, %r17 |
| 8441 | bne,a wait_for_ibp_40_290 |
| 8442 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8443 | ibp_doit40_290: |
| 8444 | best_set_reg(0x0000004089eb1c28,%r19, %r20) |
| 8445 | stxa %r20, [%r18]0x42 |
| 8446 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 8447 | st %g0, [%r23] !clear lock |
| 8448 | wr %r0, %r12, %asi !restore %asi |
| 8449 | .word 0xe19fe1c0 ! 387: LDDFA_I ldda [%r31, 0x01c0], %f16 |
| 8450 | cwp_40_291: |
| 8451 | set user_data_start, %o7 |
| 8452 | .word 0x93902002 ! 388: WRPR_CWP_I wrpr %r0, 0x0002, %cwp |
| 8453 | pmu_40_292: |
| 8454 | nop |
| 8455 | ta T_CHANGE_PRIV |
| 8456 | setx 0xfffff0d4fffff430, %g1, %g7 |
| 8457 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8458 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 8459 | reduce_priv_lvl_40_293: |
| 8460 | ta T_CHANGE_NONPRIV ! macro |
| 8461 | ceter_40_294: |
| 8462 | nop |
| 8463 | ta T_CHANGE_HPRIV |
| 8464 | mov 7, %r17 |
| 8465 | sllx %r17, 60, %r17 |
| 8466 | mov 0x18, %r16 |
| 8467 | stxa %r17, [%r16]0x4c |
| 8468 | .word 0xa3410000 ! 391: RDTICK rd %tick, %r17 |
| 8469 | cwp_40_295: |
| 8470 | set user_data_start, %o7 |
| 8471 | .word 0x93902002 ! 392: WRPR_CWP_I wrpr %r0, 0x0002, %cwp |
| 8472 | splash_lsu_40_296: |
| 8473 | nop |
| 8474 | ta T_CHANGE_HPRIV |
| 8475 | set 0x1a4c27b4, %r2 |
| 8476 | mov 0x5, %r1 |
| 8477 | sllx %r1, 32, %r1 |
| 8478 | or %r1, %r2, %r2 |
| 8479 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8480 | ta T_CHANGE_NONHPRIV |
| 8481 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8482 | intveclr_40_297: |
| 8483 | nop |
| 8484 | ta T_CHANGE_HPRIV |
| 8485 | setx 0x343f9a6b4438e77f, %r1, %r28 |
| 8486 | stxa %r28, [%g0] 0x72 |
| 8487 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8488 | nop |
| 8489 | mov 0x80, %g3 |
| 8490 | stxa %g3, [%g3] 0x57 |
| 8491 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 8492 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8493 | reduce_priv_lvl_40_298: |
| 8494 | ta T_CHANGE_NONPRIV ! macro |
| 8495 | dvapa_40_299: |
| 8496 | nop |
| 8497 | ta T_CHANGE_HPRIV |
| 8498 | mov 0xd06, %r20 |
| 8499 | mov 0x8, %r19 |
| 8500 | sllx %r20, 23, %r20 |
| 8501 | or %r19, %r20, %r19 |
| 8502 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8503 | mov 0x38, %r18 |
| 8504 | stxa %r31, [%r18]0x58 |
| 8505 | ta T_CHANGE_NONHPRIV |
| 8506 | .word 0xc32fc013 ! 397: STXFSR_R st-sfr %f1, [%r19, %r31] |
| 8507 | mondo_40_300: |
| 8508 | nop |
| 8509 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8510 | stxa %r12, [%r0+0x3e8] %asi |
| 8511 | .word 0x9d934002 ! 398: WRPR_WSTATE_R wrpr %r13, %r2, %wstate |
| 8512 | .word 0xc19fdc00 ! 399: LDDFA_R ldda [%r31, %r0], %f0 |
| 8513 | splash_decr_40_301: |
| 8514 | nop |
| 8515 | ta T_CHANGE_HPRIV |
| 8516 | mov 8, %r1 |
| 8517 | stxa %r14, [%r1] 0x45 |
| 8518 | .word 0xa7824002 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r9, %r2, %- |
| 8519 | #if (defined SPC || defined CMP) |
| 8520 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_302) + 0, 16, 16)) -> intp(7,0,17) |
| 8521 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_302)&0xffffffff) + 0, 16, 16)) -> intp(7,0,17) |
| 8522 | #else |
| 8523 | setx 0xb3d94d2eb38995b4, %r1, %r28 |
| 8524 | stxa %r28, [%g0] 0x73 |
| 8525 | #endif |
| 8526 | intvec_40_302: |
| 8527 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8528 | brcommon2_40_303: |
| 8529 | nop |
| 8530 | setx common_target, %r12, %r27 |
| 8531 | ba,a .+12 |
| 8532 | .word 0x9f8021d0 ! 1: SIR sir 0x01d0 |
| 8533 | ba,a .+8 |
| 8534 | jmpl %r27+0, %r27 |
| 8535 | .word 0xe1bfd920 ! 402: STDFA_R stda %f16, [%r0, %r31] |
| 8536 | nop |
| 8537 | ta T_CHANGE_HPRIV |
| 8538 | mov 0x40, %r10 |
| 8539 | set sync_thr_counter6, %r23 |
| 8540 | #ifndef SPC |
| 8541 | ldxa [%g0]0x63, %o1 |
| 8542 | and %o1, 0x38, %o1 |
| 8543 | add %o1, %r23, %r23 |
| 8544 | #endif |
| 8545 | cas [%r23],%g0,%r10 !lock |
| 8546 | brnz %r10, sma_40_304 |
| 8547 | rd %asi, %r12 |
| 8548 | wr %g0, 0x40, %asi |
| 8549 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8550 | set 0x00021fff, %g1 |
| 8551 | stxa %g1, [%g0 + 0x80] %asi |
| 8552 | wr %r12, %g0, %asi |
| 8553 | st %g0, [%r23] |
| 8554 | sma_40_304: |
| 8555 | ta T_CHANGE_NONHPRIV |
| 8556 | .word 0xd3e7e011 ! 403: CASA_R casa [%r31] %asi, %r17, %r9 |
| 8557 | pmu_40_305: |
| 8558 | nop |
| 8559 | setx 0xfffff55dfffffb63, %g1, %g7 |
| 8560 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8561 | jmptr_40_306: |
| 8562 | nop |
| 8563 | best_set_reg(0xe1200000, %r20, %r27) |
| 8564 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 8565 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 8566 | #if (defined SPC || defined CMP) |
| 8567 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_308) + 56, 16, 16)) -> intp(2,0,21) |
| 8568 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_308)&0xffffffff) + 56, 16, 16)) -> intp(2,0,21) |
| 8569 | #else |
| 8570 | setx 0xf4b5e7a73a948077, %r1, %r28 |
| 8571 | stxa %r28, [%g0] 0x73 |
| 8572 | #endif |
| 8573 | intvec_40_308: |
| 8574 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8575 | splash_hpstate_40_309: |
| 8576 | .word 0x81983607 ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x1607, %hpstate |
| 8577 | br_badelay2_40_310: |
| 8578 | .word 0x99a509d4 ! 1: FDIVd fdivd %f20, %f20, %f12 |
| 8579 | pdist %f16, %f22, %f22 |
| 8580 | .word 0xa9b34314 ! 409: ALIGNADDRESS alignaddr %r13, %r20, %r20 |
| 8581 | splash_cmpr_40_311: |
| 8582 | mov 0, %r18 |
| 8583 | sllx %r18, 63, %r18 |
| 8584 | rd %tick, %r17 |
| 8585 | add %r17, 0x80, %r17 |
| 8586 | or %r17, %r18, %r17 |
| 8587 | ta T_CHANGE_HPRIV |
| 8588 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8589 | ta T_CHANGE_PRIV |
| 8590 | .word 0xb3800011 ! 410: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8591 | nop |
| 8592 | ta T_CHANGE_HPRIV |
| 8593 | mov 0x40, %r10 |
| 8594 | set sync_thr_counter6, %r23 |
| 8595 | #ifndef SPC |
| 8596 | ldxa [%g0]0x63, %o1 |
| 8597 | and %o1, 0x38, %o1 |
| 8598 | add %o1, %r23, %r23 |
| 8599 | #endif |
| 8600 | cas [%r23],%g0,%r10 !lock |
| 8601 | brnz %r10, sma_40_312 |
| 8602 | rd %asi, %r12 |
| 8603 | wr %g0, 0x40, %asi |
| 8604 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8605 | set 0x00161fff, %g1 |
| 8606 | stxa %g1, [%g0 + 0x80] %asi |
| 8607 | wr %r12, %g0, %asi |
| 8608 | st %g0, [%r23] |
| 8609 | sma_40_312: |
| 8610 | ta T_CHANGE_NONHPRIV |
| 8611 | .word 0xe5e7e00a ! 411: CASA_R casa [%r31] %asi, %r10, %r18 |
| 8612 | #if (defined SPC || defined CMP) |
| 8613 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_313)+56, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8614 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_313)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8615 | #else |
| 8616 | !! TODO:Generate XIR via RESET_GEN register |
| 8617 | ! setx 0x8900000808, %r16, %r17 |
| 8618 | ! mov 0x2, %r16 |
| 8619 | ! stw %r16, [%r17] |
| 8620 | #endif |
| 8621 | xir_40_313: |
| 8622 | .word 0xa981b959 ! 412: WR_SET_SOFTINT_I wr %r6, 0x1959, %set_softint |
| 8623 | memptr_40_314: |
| 8624 | set 0x60340000, %r31 |
| 8625 | .word 0x8584256a ! 413: WRCCR_I wr %r16, 0x056a, %ccr |
| 8626 | .word 0x91930001 ! 414: WRPR_PIL_R wrpr %r12, %r1, %pil |
| 8627 | .word 0xe51fe110 ! 1: LDDF_I ldd [%r31, 0x0110], %f18 |
| 8628 | .word 0x9f802fae ! 415: SIR sir 0x0fae |
| 8629 | nop |
| 8630 | ta T_CHANGE_HPRIV |
| 8631 | mov 0x40+1, %r10 |
| 8632 | set sync_thr_counter5, %r23 |
| 8633 | #ifndef SPC |
| 8634 | ldxa [%g0]0x63, %o1 |
| 8635 | and %o1, 0x38, %o1 |
| 8636 | add %o1, %r23, %r23 |
| 8637 | sllx %o1, 5, %o3 !(CID*256) |
| 8638 | #endif |
| 8639 | cas [%r23],%g0,%r10 !lock |
| 8640 | brnz %r10, cwq_40_316 |
| 8641 | rd %asi, %r12 |
| 8642 | wr %g0, 0x40, %asi |
| 8643 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8644 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8645 | cmp %l1, 1 |
| 8646 | bne cwq_40_316 |
| 8647 | set CWQ_BASE, %l6 |
| 8648 | #ifndef SPC |
| 8649 | add %l6, %o3, %l6 |
| 8650 | #endif |
| 8651 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8652 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 8653 | sllx %l2, 32, %l2 |
| 8654 | stx %l2, [%l6 + 0x0] |
| 8655 | membar #Sync |
| 8656 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8657 | sub %l2, 0x40, %l2 |
| 8658 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8659 | wr %r12, %g0, %asi |
| 8660 | st %g0, [%r23] |
| 8661 | cwq_40_316: |
| 8662 | ta T_CHANGE_NONHPRIV |
| 8663 | .word 0x97414000 ! 416: RDPC rd %pc, %r11 |
| 8664 | intveclr_40_317: |
| 8665 | nop |
| 8666 | ta T_CHANGE_HPRIV |
| 8667 | setx 0x4fd992e26e44da7b, %r1, %r28 |
| 8668 | stxa %r28, [%g0] 0x72 |
| 8669 | ta T_CHANGE_NONHPRIV |
| 8670 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8671 | splash_cmpr_40_318: |
| 8672 | mov 0, %r18 |
| 8673 | sllx %r18, 63, %r18 |
| 8674 | rd %tick, %r17 |
| 8675 | add %r17, 0x60, %r17 |
| 8676 | or %r17, %r18, %r17 |
| 8677 | ta T_CHANGE_HPRIV |
| 8678 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8679 | ta T_CHANGE_PRIV |
| 8680 | .word 0xaf800011 ! 418: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8681 | setx 0x78fca6d8ba2d4319, %r1, %r28 |
| 8682 | stxa %r28, [%g0] 0x73 |
| 8683 | intvec_40_319: |
| 8684 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8685 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 8686 | reduce_priv_lvl_40_320: |
| 8687 | ta T_CHANGE_NONHPRIV ! macro |
| 8688 | mondo_40_321: |
| 8689 | nop |
| 8690 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8691 | stxa %r11, [%r0+0x3e8] %asi |
| 8692 | .word 0x9d950010 ! 421: WRPR_WSTATE_R wrpr %r20, %r16, %wstate |
| 8693 | splash_lsu_40_322: |
| 8694 | nop |
| 8695 | ta T_CHANGE_HPRIV |
| 8696 | set 0x067559ab, %r2 |
| 8697 | mov 0x7, %r1 |
| 8698 | sllx %r1, 32, %r1 |
| 8699 | or %r1, %r2, %r2 |
| 8700 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8701 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8702 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 8703 | .word 0xda3fe008 ! 424: STD_I std %r13, [%r31 + 0x0008] |
| 8704 | .word 0x91d02034 ! 425: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 8705 | otherw |
| 8706 | mov 0xb2, %r30 |
| 8707 | .word 0x83d0001e ! 426: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 8708 | .word 0x2ccb0001 ! 1: BRGZ brgz,a,pt %r12,<label_0xb0001> |
| 8709 | .word 0x8d903c8b ! 427: WRPR_PSTATE_I wrpr %r0, 0x1c8b, %pstate |
| 8710 | br_badelay2_40_324: |
| 8711 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 8712 | allclean |
| 8713 | .word 0x91b1030a ! 428: ALIGNADDRESS alignaddr %r4, %r10, %r8 |
| 8714 | vahole_40_325: |
| 8715 | nop |
| 8716 | ta T_CHANGE_NONHPRIV |
| 8717 | setx vahole_target0, %r18, %r27 |
| 8718 | jmpl %r27+0, %r27 |
| 8719 | .word 0xd7e7e013 ! 429: CASA_R casa [%r31] %asi, %r19, %r11 |
| 8720 | #if (defined SPC || defined CMP) |
| 8721 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_326) + 8, 16, 16)) -> intp(1,0,8) |
| 8722 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_326)&0xffffffff) + 8, 16, 16)) -> intp(1,0,8) |
| 8723 | #else |
| 8724 | setx 0x95ebb5c7179ef203, %r1, %r28 |
| 8725 | stxa %r28, [%g0] 0x73 |
| 8726 | #endif |
| 8727 | intvec_40_326: |
| 8728 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8729 | splash_hpstate_40_327: |
| 8730 | ta T_CHANGE_NONHPRIV |
| 8731 | .word 0x81983fed ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x1fed, %hpstate |
| 8732 | splash_htba_40_328: |
| 8733 | nop |
| 8734 | ta T_CHANGE_HPRIV |
| 8735 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 8736 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 8737 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 8738 | .word 0x97b04548 ! 434: FCMPEQ16 fcmpeq16 %d32, %d8, %r11 |
| 8739 | donret_40_329: |
| 8740 | nop |
| 8741 | ta T_CHANGE_HPRIV ! macro |
| 8742 | rd %pc, %r12 |
| 8743 | add %r12, (donretarg_40_329-donret_40_329-4), %r12 |
| 8744 | mov 0x38, %r18 |
| 8745 | stxa %r12, [%r18]0x58 |
| 8746 | add %r12, 0x4, %r11 |
| 8747 | wrpr %g0, 0x2, %tl |
| 8748 | wrpr %g0, %r12, %tpc |
| 8749 | wrpr %g0, %r11, %tnpc |
| 8750 | set (0x00ef27e2 | (32 << 24)), %r13 |
| 8751 | rdpr %tstate, %r16 |
| 8752 | mov 0x1f, %r19 |
| 8753 | and %r19, %r16, %r17 |
| 8754 | andn %r16, %r19, %r16 |
| 8755 | or %r16, %r17, %r20 |
| 8756 | wrpr %r20, %g0, %tstate |
| 8757 | wrhpr %g0, 0x1111, %htstate |
| 8758 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 8759 | done |
| 8760 | donretarg_40_329: |
| 8761 | .word 0xd8ffe05c ! 435: SWAPA_I swapa %r12, [%r31 + 0x005c] %asi |
| 8762 | .word 0xa7a4cd34 ! 436: FsMULd fsmuld %f19, %f20, %f50 |
| 8763 | splash_tba_40_330: |
| 8764 | ta T_CHANGE_PRIV |
| 8765 | setx 0x0000000400380000, %r11, %r12 |
| 8766 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8767 | nop |
| 8768 | mov 0x80, %g3 |
| 8769 | stxa %g3, [%g3] 0x57 |
| 8770 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 8771 | nop |
| 8772 | mov 0x80, %g3 |
| 8773 | stxa %g3, [%g3] 0x57 |
| 8774 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 8775 | donret_40_331: |
| 8776 | nop |
| 8777 | ta T_CHANGE_HPRIV ! macro |
| 8778 | rd %pc, %r12 |
| 8779 | add %r12, (donretarg_40_331-donret_40_331-4), %r12 |
| 8780 | mov 0x38, %r18 |
| 8781 | stxa %r12, [%r18]0x58 |
| 8782 | add %r12, 0x4, %r11 |
| 8783 | wrpr %g0, 0x2, %tl |
| 8784 | wrpr %g0, %r12, %tpc |
| 8785 | wrpr %g0, %r11, %tnpc |
| 8786 | set (0x00e1d746 | (16 << 24)), %r13 |
| 8787 | rdpr %tstate, %r16 |
| 8788 | mov 0x1f, %r19 |
| 8789 | and %r19, %r16, %r17 |
| 8790 | andn %r16, %r19, %r16 |
| 8791 | or %r16, %r17, %r20 |
| 8792 | wrpr %r20, %g0, %tstate |
| 8793 | wrhpr %g0, 0x1ead, %htstate |
| 8794 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 8795 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 8796 | done |
| 8797 | donretarg_40_331: |
| 8798 | .word 0xe26fe10c ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x010c] |
| 8799 | donret_40_332: |
| 8800 | nop |
| 8801 | ta T_CHANGE_HPRIV ! macro |
| 8802 | rd %pc, %r12 |
| 8803 | add %r12, (donretarg_40_332-donret_40_332-8), %r12 |
| 8804 | mov 0x38, %r18 |
| 8805 | stxa %r12, [%r18]0x58 |
| 8806 | add %r12, 0x4, %r11 |
| 8807 | wrpr %g0, 0x1, %tl |
| 8808 | wrpr %g0, %r12, %tpc |
| 8809 | wrpr %g0, %r11, %tnpc |
| 8810 | set (0x000dcbca | (22 << 24)), %r13 |
| 8811 | rdpr %tstate, %r16 |
| 8812 | mov 0x1f, %r19 |
| 8813 | and %r19, %r16, %r17 |
| 8814 | andn %r16, %r19, %r16 |
| 8815 | or %r16, %r17, %r20 |
| 8816 | wrpr %r20, %g0, %tstate |
| 8817 | wrhpr %g0, 0x743, %htstate |
| 8818 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 8819 | retry |
| 8820 | donretarg_40_332: |
| 8821 | .word 0x91a509d0 ! 441: FDIVd fdivd %f20, %f16, %f8 |
| 8822 | setx 0x7ae7159b2f449b09, %r1, %r28 |
| 8823 | stxa %r28, [%g0] 0x73 |
| 8824 | intvec_40_333: |
| 8825 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8826 | .word 0xe88fe170 ! 443: LDUBA_I lduba [%r31, + 0x0170] %asi, %r20 |
| 8827 | .word 0xe937e128 ! 444: STQF_I - %f20, [0x0128, %r31] |
| 8828 | ta T_CHANGE_NONHPRIV |
| 8829 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 8830 | .word 0x9bb5048b ! 446: FCMPLE32 fcmple32 %d20, %d42, %r13 |
| 8831 | brcommon2_40_336: |
| 8832 | nop |
| 8833 | setx common_target, %r12, %r27 |
| 8834 | ba,a .+12 |
| 8835 | .word 0xa9b7c714 ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f20, %d20 |
| 8836 | ba,a .+8 |
| 8837 | jmpl %r27+0, %r27 |
| 8838 | .word 0xc19fc2c0 ! 447: LDDFA_R ldda [%r31, %r0], %f0 |
| 8839 | .word 0xa24a0010 ! 448: MULX_R mulx %r8, %r16, %r17 |
| 8840 | splash_lsu_40_337: |
| 8841 | nop |
| 8842 | ta T_CHANGE_HPRIV |
| 8843 | set 0xaed6d48a, %r2 |
| 8844 | mov 0x3, %r1 |
| 8845 | sllx %r1, 32, %r1 |
| 8846 | or %r1, %r2, %r2 |
| 8847 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8848 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8849 | mondo_40_338: |
| 8850 | nop |
| 8851 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8852 | ta T_CHANGE_PRIV |
| 8853 | stxa %r11, [%r0+0x3d8] %asi |
| 8854 | .word 0x9d940013 ! 450: WRPR_WSTATE_R wrpr %r16, %r19, %wstate |
| 8855 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 8856 | splash_hpstate_40_340: |
| 8857 | ta T_CHANGE_NONHPRIV |
| 8858 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 8859 | .word 0x81982d3d ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x0d3d, %hpstate |
| 8860 | pmu_40_341: |
| 8861 | nop |
| 8862 | ta T_CHANGE_PRIV |
| 8863 | setx 0xfffff2d8fffffba0, %g1, %g7 |
| 8864 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8865 | .word 0x91d02035 ! 454: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 8866 | .word 0x93a049b3 ! 455: FDIVs fdivs %f1, %f19, %f9 |
| 8867 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 8868 | cwp_40_342: |
| 8869 | set user_data_start, %o7 |
| 8870 | .word 0x93902007 ! 457: WRPR_CWP_I wrpr %r0, 0x0007, %cwp |
| 8871 | jmptr_40_343: |
| 8872 | nop |
| 8873 | best_set_reg(0xe1200000, %r20, %r27) |
| 8874 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 8875 | jmptr_40_344: |
| 8876 | nop |
| 8877 | best_set_reg(0xe1200000, %r20, %r27) |
| 8878 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 8879 | jmptr_40_345: |
| 8880 | nop |
| 8881 | best_set_reg(0xe1200000, %r20, %r27) |
| 8882 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 8883 | .word 0xe6bfc031 ! 461: STDA_R stda %r19, [%r31 + %r17] 0x01 |
| 8884 | brcommon1_40_347: |
| 8885 | nop |
| 8886 | setx common_target, %r12, %r27 |
| 8887 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8888 | ba,a .+12 |
| 8889 | .word 0xa7702190 ! 1: POPC_I popc 0x0190, %r19 |
| 8890 | ba,a .+8 |
| 8891 | jmpl %r27+0, %r27 |
| 8892 | .word 0xc3ec8030 ! 462: PREFETCHA_R prefetcha [%r18, %r16] 0x01, #one_read |
| 8893 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 8894 | ceter_40_349: |
| 8895 | nop |
| 8896 | ta T_CHANGE_HPRIV |
| 8897 | mov 3, %r17 |
| 8898 | sllx %r17, 60, %r17 |
| 8899 | mov 0x18, %r16 |
| 8900 | stxa %r17, [%r16]0x4c |
| 8901 | ta T_CHANGE_NONHPRIV |
| 8902 | .word 0xa9410000 ! 464: RDTICK rd %tick, %r20 |
| 8903 | splash_cmpr_40_350: |
| 8904 | mov 0, %r18 |
| 8905 | sllx %r18, 63, %r18 |
| 8906 | rd %tick, %r17 |
| 8907 | add %r17, 0x60, %r17 |
| 8908 | or %r17, %r18, %r17 |
| 8909 | ta T_CHANGE_HPRIV |
| 8910 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8911 | .word 0xb3800011 ! 465: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8912 | .word 0x94844002 ! 466: ADDcc_R addcc %r17, %r2, %r10 |
| 8913 | .word 0xd2800c60 ! 467: LDUWA_R lduwa [%r0, %r0] 0x63, %r9 |
| 8914 | memptr_40_351: |
| 8915 | set user_data_start, %r31 |
| 8916 | .word 0x85822c6d ! 468: WRCCR_I wr %r8, 0x0c6d, %ccr |
| 8917 | .word 0xd27fe050 ! 469: SWAP_I swap %r9, [%r31 + 0x0050] |
| 8918 | .word 0x93b7c7cc ! 1: PDIST pdistn %d62, %d12, %d40 |
| 8919 | .word 0x9f80270d ! 470: SIR sir 0x070d |
| 8920 | .word 0x91944008 ! 471: WRPR_PIL_R wrpr %r17, %r8, %pil |
| 8921 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 8922 | jmptr_40_353: |
| 8923 | nop |
| 8924 | best_set_reg(0xe0200000, %r20, %r27) |
| 8925 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 8926 | .word 0x95703261 ! 474: POPC_I popc 0x1261, %r10 |
| 8927 | unsupttte_40_355: |
| 8928 | nop |
| 8929 | ta T_CHANGE_HPRIV |
| 8930 | mov 1, %r20 |
| 8931 | sllx %r20, 63, %r20 |
| 8932 | or %r20, 2,%r20 |
| 8933 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 8934 | ta T_CHANGE_NONHPRIV |
| 8935 | .word 0x97b4048d ! 475: FCMPLE32 fcmple32 %d16, %d44, %r11 |
| 8936 | #if (defined SPC || defined CMP) |
| 8937 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_356)+32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8938 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_356)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x40),1,3) |
| 8939 | #else |
| 8940 | !! TODO:Generate XIR via RESET_GEN register |
| 8941 | ! setx 0x8900000808, %r16, %r17 |
| 8942 | ! mov 0x2, %r16 |
| 8943 | ! stw %r16, [%r17] |
| 8944 | #endif |
| 8945 | xir_40_356: |
| 8946 | .word 0xa9827645 ! 476: WR_SET_SOFTINT_I wr %r9, 0x1645, %set_softint |
| 8947 | trapasi_40_357: |
| 8948 | nop |
| 8949 | mov 0x0, %r1 ! (VA for ASI 0x4c) |
| 8950 | .word 0xd8c84980 ! 477: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 |
| 8951 | .word 0xe19fe060 ! 478: LDDFA_I ldda [%r31, 0x0060], %f16 |
| 8952 | donret_40_358: |
| 8953 | nop |
| 8954 | ta T_CHANGE_HPRIV ! macro |
| 8955 | rd %pc, %r12 |
| 8956 | add %r12, (donretarg_40_358-donret_40_358-8), %r12 |
| 8957 | mov 0x38, %r18 |
| 8958 | stxa %r12, [%r18]0x58 |
| 8959 | add %r12, 0x4, %r11 |
| 8960 | wrpr %g0, 0x1, %tl |
| 8961 | wrpr %g0, %r12, %tpc |
| 8962 | wrpr %g0, %r11, %tnpc |
| 8963 | set (0x00d94a77 | (0x88 << 24)), %r13 |
| 8964 | rdpr %tstate, %r16 |
| 8965 | mov 0x1f, %r19 |
| 8966 | and %r19, %r16, %r17 |
| 8967 | andn %r16, %r19, %r16 |
| 8968 | or %r16, %r17, %r20 |
| 8969 | wrpr %r20, %g0, %tstate |
| 8970 | wrhpr %g0, 0x2df, %htstate |
| 8971 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 8972 | retry |
| 8973 | donretarg_40_358: |
| 8974 | .word 0xd8ffe144 ! 479: SWAPA_I swapa %r12, [%r31 + 0x0144] %asi |
| 8975 | invtsb_40_359: |
| 8976 | nop |
| 8977 | ta T_CHANGE_HPRIV |
| 8978 | rd %asi, %r21 |
| 8979 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 8980 | mov 1, %r20 |
| 8981 | sllx %r20, 63, %r20 |
| 8982 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 8983 | xor %r22 ,%r20, %r22 |
| 8984 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 8985 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 8986 | xor %r22 ,%r20, %r22 |
| 8987 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 8988 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 8989 | xor %r22 ,%r20, %r22 |
| 8990 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 8991 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 8992 | xor %r22 ,%r20, %r22 |
| 8993 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 8994 | wr %r21, %r0, %asi |
| 8995 | ta T_CHANGE_NONHPRIV |
| 8996 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 8997 | mondo_40_360: |
| 8998 | nop |
| 8999 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9000 | stxa %r18, [%r0+0x3c8] %asi |
| 9001 | .word 0x9d91c012 ! 481: WRPR_WSTATE_R wrpr %r7, %r18, %wstate |
| 9002 | .word 0xc19fc3e0 ! 482: LDDFA_R ldda [%r31, %r0], %f0 |
| 9003 | br_badelay1_40_361: |
| 9004 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9005 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 9006 | .word 0xd9e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r12 |
| 9007 | normalw |
| 9008 | .word 0x9b458000 ! 483: RD_SOFTINT_REG rd %softint, %r13 |
| 9009 | .word 0xc36fe0f0 ! 1: PREFETCH_I prefetch [%r31 + 0x00f0], #one_read |
| 9010 | .word 0x9f802afc ! 484: SIR sir 0x0afc |
| 9011 | .word 0xdb27e0c6 ! 485: STF_I st %f13, [0x00c6, %r31] |
| 9012 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 9013 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 9014 | pmu_40_362: |
| 9015 | nop |
| 9016 | setx 0xfffffc6efffff233, %g1, %g7 |
| 9017 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9018 | .word 0x8d903bbb ! 489: WRPR_PSTATE_I wrpr %r0, 0x1bbb, %pstate |
| 9019 | bcs skip_40_364 |
| 9020 | .word 0xc36cb1e1 ! 1: PREFETCH_I prefetch [%r18 + 0xfffff1e1], #one_read |
| 9021 | .align 32 |
| 9022 | skip_40_364: |
| 9023 | .word 0xc36fe1d4 ! 490: PREFETCH_I prefetch [%r31 + 0x01d4], #one_read |
| 9024 | donret_40_365: |
| 9025 | nop |
| 9026 | ta T_CHANGE_HPRIV ! macro |
| 9027 | rd %pc, %r12 |
| 9028 | add %r12, (donretarg_40_365-donret_40_365-4), %r12 |
| 9029 | mov 0x38, %r18 |
| 9030 | stxa %r12, [%r18]0x58 |
| 9031 | add %r12, 0x4, %r11 |
| 9032 | wrpr %g0, 0x1, %tl |
| 9033 | wrpr %g0, %r12, %tpc |
| 9034 | wrpr %g0, %r11, %tnpc |
| 9035 | set (0x00c80f28 | (16 << 24)), %r13 |
| 9036 | rdpr %tstate, %r16 |
| 9037 | mov 0x1f, %r19 |
| 9038 | and %r19, %r16, %r17 |
| 9039 | andn %r16, %r19, %r16 |
| 9040 | or %r16, %r17, %r20 |
| 9041 | wrpr %r20, %g0, %tstate |
| 9042 | wrhpr %g0, 0x597, %htstate |
| 9043 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 9044 | done |
| 9045 | donretarg_40_365: |
| 9046 | .word 0xdaffe13a ! 491: SWAPA_I swapa %r13, [%r31 + 0x013a] %asi |
| 9047 | .word 0xdb27e046 ! 492: STF_I st %f13, [0x0046, %r31] |
| 9048 | .word 0xdaffc034 ! 493: SWAPA_R swapa %r13, [%r31 + %r20] 0x01 |
| 9049 | splash_cmpr_40_366: |
| 9050 | mov 0, %r18 |
| 9051 | sllx %r18, 63, %r18 |
| 9052 | rd %tick, %r17 |
| 9053 | add %r17, 0x50, %r17 |
| 9054 | or %r17, %r18, %r17 |
| 9055 | ta T_CHANGE_PRIV |
| 9056 | .word 0xb3800011 ! 494: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9057 | nop |
| 9058 | mov 0x80, %g3 |
| 9059 | stxa %g3, [%g3] 0x5f |
| 9060 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 9061 | .word 0x87afca4a ! 1: FCMPd fcmpd %fcc<n>, %f62, %f10 |
| 9062 | .word 0x9f80357c ! 496: SIR sir 0x157c |
| 9063 | pmu_40_367: |
| 9064 | nop |
| 9065 | ta T_CHANGE_PRIV |
| 9066 | setx 0xfffff52afffff787, %g1, %g7 |
| 9067 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9068 | nop |
| 9069 | ta T_CHANGE_HPRIV |
| 9070 | mov 0x40+1, %r10 |
| 9071 | set sync_thr_counter5, %r23 |
| 9072 | #ifndef SPC |
| 9073 | ldxa [%g0]0x63, %o1 |
| 9074 | and %o1, 0x38, %o1 |
| 9075 | add %o1, %r23, %r23 |
| 9076 | sllx %o1, 5, %o3 !(CID*256) |
| 9077 | #endif |
| 9078 | cas [%r23],%g0,%r10 !lock |
| 9079 | brnz %r10, cwq_40_368 |
| 9080 | rd %asi, %r12 |
| 9081 | wr %g0, 0x40, %asi |
| 9082 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9083 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9084 | cmp %l1, 1 |
| 9085 | bne cwq_40_368 |
| 9086 | set CWQ_BASE, %l6 |
| 9087 | #ifndef SPC |
| 9088 | add %l6, %o3, %l6 |
| 9089 | #endif |
| 9090 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9091 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 9092 | sllx %l2, 32, %l2 |
| 9093 | stx %l2, [%l6 + 0x0] |
| 9094 | membar #Sync |
| 9095 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9096 | sub %l2, 0x40, %l2 |
| 9097 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9098 | wr %r12, %g0, %asi |
| 9099 | st %g0, [%r23] |
| 9100 | cwq_40_368: |
| 9101 | ta T_CHANGE_NONHPRIV |
| 9102 | .word 0xa9414000 ! 498: RDPC rd %pc, %r20 |
| 9103 | change_to_randtl_40_369: |
| 9104 | ta T_CHANGE_HPRIV ! macro |
| 9105 | done_change_to_randtl_40_369: |
| 9106 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9107 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 9108 | mondo_40_370: |
| 9109 | nop |
| 9110 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9111 | stxa %r8, [%r0+0x3c8] %asi |
| 9112 | .word 0x9d950011 ! 501: WRPR_WSTATE_R wrpr %r20, %r17, %wstate |
| 9113 | nop |
| 9114 | nop |
| 9115 | ta T_CHANGE_PRIV |
| 9116 | wrpr %g0, %g0, %gl |
| 9117 | nop |
| 9118 | nop |
| 9119 | setx join_lbl_0_0, %g1, %g2 |
| 9120 | jmp %g2 |
| 9121 | nop |
| 9122 | fork_lbl_0_6: |
| 9123 | ta T_CHANGE_NONHPRIV |
| 9124 | br_longdelay1_20_0: |
| 9125 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9126 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 9127 | bcc,a skip_20_1 |
| 9128 | brgz,a,pt %r16, skip_20_1 |
| 9129 | .align 1024 |
| 9130 | skip_20_1: |
| 9131 | .word 0xc32fc000 ! 2: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 9132 | nop |
| 9133 | ta T_CHANGE_HPRIV |
| 9134 | mov 0x20, %r10 |
| 9135 | set sync_thr_counter6, %r23 |
| 9136 | #ifndef SPC |
| 9137 | ldxa [%g0]0x63, %o1 |
| 9138 | and %o1, 0x38, %o1 |
| 9139 | add %o1, %r23, %r23 |
| 9140 | #endif |
| 9141 | cas [%r23],%g0,%r10 !lock |
| 9142 | brnz %r10, sma_20_2 |
| 9143 | rd %asi, %r12 |
| 9144 | wr %g0, 0x40, %asi |
| 9145 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9146 | set 0x000a1fff, %g1 |
| 9147 | stxa %g1, [%g0 + 0x80] %asi |
| 9148 | wr %r12, %g0, %asi |
| 9149 | st %g0, [%r23] |
| 9150 | sma_20_2: |
| 9151 | ta T_CHANGE_NONHPRIV |
| 9152 | .word 0xe7e7e010 ! 3: CASA_R casa [%r31] %asi, %r16, %r19 |
| 9153 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9154 | reduce_priv_lvl_20_3: |
| 9155 | ta T_CHANGE_NONHPRIV ! macro |
| 9156 | splash_decr_20_4: |
| 9157 | nop |
| 9158 | ta T_CHANGE_HPRIV |
| 9159 | mov 8, %r1 |
| 9160 | stxa %r16, [%r1] 0x45 |
| 9161 | .word 0xa781c008 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r7, %r8, %- |
| 9162 | .word 0x87ac4ac8 ! 6: FCMPEd fcmped %fcc<n>, %f48, %f8 |
| 9163 | vahole_20_5: |
| 9164 | nop |
| 9165 | ta T_CHANGE_NONHPRIV |
| 9166 | setx vahole_target1, %r18, %r27 |
| 9167 | jmpl %r27+0, %r27 |
| 9168 | .word 0xc32fc00b ! 7: STXFSR_R st-sfr %f1, [%r11, %r31] |
| 9169 | memptr_20_6: |
| 9170 | set user_data_start, %r31 |
| 9171 | .word 0x85842319 ! 8: WRCCR_I wr %r16, 0x0319, %ccr |
| 9172 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 9173 | ceter_20_7: |
| 9174 | nop |
| 9175 | ta T_CHANGE_HPRIV |
| 9176 | mov 7, %r17 |
| 9177 | sllx %r17, 60, %r17 |
| 9178 | mov 0x18, %r16 |
| 9179 | stxa %r17, [%r16]0x4c |
| 9180 | .word 0xa7410000 ! 10: RDTICK rd %tick, %r19 |
| 9181 | splash_lsu_20_8: |
| 9182 | nop |
| 9183 | ta T_CHANGE_HPRIV |
| 9184 | set 0x6e4ddb1a, %r2 |
| 9185 | mov 0x5, %r1 |
| 9186 | sllx %r1, 32, %r1 |
| 9187 | or %r1, %r2, %r2 |
| 9188 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9189 | ta T_CHANGE_NONHPRIV |
| 9190 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9191 | brcommon1_20_9: |
| 9192 | nop |
| 9193 | setx common_target, %r12, %r27 |
| 9194 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9195 | ba,a .+12 |
| 9196 | .word 0xd06fe160 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0160] |
| 9197 | ba,a .+8 |
| 9198 | jmpl %r27+0, %r27 |
| 9199 | .word 0xa3b287d4 ! 12: PDIST pdistn %d10, %d20, %d48 |
| 9200 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 9201 | pmu_20_10: |
| 9202 | nop |
| 9203 | setx 0xfffff6cafffff3c0, %g1, %g7 |
| 9204 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9205 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 9206 | pmu_20_11: |
| 9207 | nop |
| 9208 | ta T_CHANGE_PRIV |
| 9209 | setx 0xffffffc7ffffff70, %g1, %g7 |
| 9210 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9211 | ibp_20_12: |
| 9212 | nop |
| 9213 | .word 0xc19fe1a0 ! 17: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 9214 | ibp_20_13: |
| 9215 | nop |
| 9216 | .word 0xe1bfdb60 ! 18: STDFA_R stda %f16, [%r0, %r31] |
| 9217 | .word 0xd65fe108 ! 19: LDX_I ldx [%r31 + 0x0108], %r11 |
| 9218 | .word 0xd727e042 ! 20: STF_I st %f11, [0x0042, %r31] |
| 9219 | .word 0x81580000 ! 21: FLUSHW flushw |
| 9220 | #if (defined SPC || defined CMP) |
| 9221 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_14) + 0, 16, 16)) -> intp(4,0,13) |
| 9222 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_14)&0xffffffff) + 0, 16, 16)) -> intp(4,0,13) |
| 9223 | #else |
| 9224 | setx 0x9694d3fbc3b1836f, %r1, %r28 |
| 9225 | stxa %r28, [%g0] 0x73 |
| 9226 | #endif |
| 9227 | intvec_20_14: |
| 9228 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9229 | donret_20_15: |
| 9230 | nop |
| 9231 | ta T_CHANGE_HPRIV ! macro |
| 9232 | rd %pc, %r12 |
| 9233 | add %r12, (donretarg_20_15-donret_20_15-4), %r12 |
| 9234 | mov 0x38, %r18 |
| 9235 | stxa %r12, [%r18]0x58 |
| 9236 | add %r12, 0x4, %r11 |
| 9237 | wrpr %g0, 0x1, %tl |
| 9238 | wrpr %g0, %r12, %tpc |
| 9239 | wrpr %g0, %r11, %tnpc |
| 9240 | set (0x00e59ca4 | (22 << 24)), %r13 |
| 9241 | rdpr %tstate, %r16 |
| 9242 | mov 0x1f, %r19 |
| 9243 | and %r19, %r16, %r17 |
| 9244 | andn %r16, %r19, %r16 |
| 9245 | or %r16, %r17, %r20 |
| 9246 | wrpr %r20, %g0, %tstate |
| 9247 | wrhpr %g0, 0x6cf, %htstate |
| 9248 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9249 | done |
| 9250 | donretarg_20_15: |
| 9251 | .word 0xd6ffe0a0 ! 23: SWAPA_I swapa %r11, [%r31 + 0x00a0] %asi |
| 9252 | set 0x2d60, %l3 |
| 9253 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 9254 | .word 0xa3b4c7d4 ! 24: PDIST pdistn %d50, %d20, %d48 |
| 9255 | .word 0xc1bfde00 ! 25: STDFA_R stda %f0, [%r0, %r31] |
| 9256 | pmu_20_16: |
| 9257 | nop |
| 9258 | ta T_CHANGE_PRIV |
| 9259 | setx 0xfffff03efffffd5c, %g1, %g7 |
| 9260 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9261 | vahole_20_17: |
| 9262 | nop |
| 9263 | ta T_CHANGE_NONHPRIV |
| 9264 | setx vahole_target1, %r18, %r27 |
| 9265 | jmpl %r27+0, %r27 |
| 9266 | .word 0xd11fc013 ! 27: LDDF_R ldd [%r31, %r19], %f8 |
| 9267 | #if (defined SPC || defined CMP) |
| 9268 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_18)+32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9269 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_18)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9270 | #else |
| 9271 | !! TODO:Generate XIR via RESET_GEN register |
| 9272 | ! setx 0x8900000808, %r16, %r17 |
| 9273 | ! mov 0x2, %r16 |
| 9274 | ! stw %r16, [%r17] |
| 9275 | #endif |
| 9276 | xir_20_18: |
| 9277 | .word 0xa984f602 ! 28: WR_SET_SOFTINT_I wr %r19, 0x1602, %set_softint |
| 9278 | .word 0xa3a00166 ! 29: FABSq dis not found |
| 9279 | |
| 9280 | donret_20_20: |
| 9281 | nop |
| 9282 | ta T_CHANGE_HPRIV ! macro |
| 9283 | rd %pc, %r12 |
| 9284 | add %r12, (donretarg_20_20-donret_20_20-8), %r12 |
| 9285 | mov 0x38, %r18 |
| 9286 | stxa %r12, [%r18]0x58 |
| 9287 | add %r12, 0x4, %r11 |
| 9288 | wrpr %g0, 0x1, %tl |
| 9289 | wrpr %g0, %r12, %tpc |
| 9290 | wrpr %g0, %r11, %tnpc |
| 9291 | set (0x006dc92b | (28 << 24)), %r13 |
| 9292 | rdpr %tstate, %r16 |
| 9293 | mov 0x1f, %r19 |
| 9294 | and %r19, %r16, %r17 |
| 9295 | andn %r16, %r19, %r16 |
| 9296 | or %r16, %r17, %r20 |
| 9297 | wrpr %r20, %g0, %tstate |
| 9298 | wrhpr %g0, 0x17d4, %htstate |
| 9299 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 9300 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> |
| 9301 | retry |
| 9302 | donretarg_20_20: |
| 9303 | .word 0xe2ffe150 ! 30: SWAPA_I swapa %r17, [%r31 + 0x0150] %asi |
| 9304 | splash_decr_20_21: |
| 9305 | nop |
| 9306 | ta T_CHANGE_HPRIV |
| 9307 | mov 8, %r1 |
| 9308 | stxa %r14, [%r1] 0x45 |
| 9309 | .word 0xa7840001 ! 31: WR_GRAPHICS_STATUS_REG_R wr %r16, %r1, %- |
| 9310 | #if (defined SPC || defined CMP) |
| 9311 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_22) + 40, 16, 16)) -> intp(5,0,28) |
| 9312 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_22)&0xffffffff) + 40, 16, 16)) -> intp(5,0,28) |
| 9313 | #else |
| 9314 | setx 0xbebdf247df603ddc, %r1, %r28 |
| 9315 | stxa %r28, [%g0] 0x73 |
| 9316 | #endif |
| 9317 | intvec_20_22: |
| 9318 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9319 | memptr_20_23: |
| 9320 | set 0x60540000, %r31 |
| 9321 | .word 0x8582ee1d ! 33: WRCCR_I wr %r11, 0x0e1d, %ccr |
| 9322 | unsupttte_20_24: |
| 9323 | nop |
| 9324 | ta T_CHANGE_HPRIV |
| 9325 | mov 1, %r20 |
| 9326 | sllx %r20, 63, %r20 |
| 9327 | or %r20, 2,%r20 |
| 9328 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 9329 | ta T_CHANGE_NONHPRIV |
| 9330 | .word 0x97a509c8 ! 34: FDIVd fdivd %f20, %f8, %f42 |
| 9331 | brcommon3_20_25: |
| 9332 | nop |
| 9333 | setx common_target, %r12, %r27 |
| 9334 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9335 | ba,a .+12 |
| 9336 | .word 0xd3e7c030 ! 1: CASA_I casa [%r31] 0x 1, %r16, %r9 |
| 9337 | ba,a .+8 |
| 9338 | jmpl %r27+0, %r27 |
| 9339 | .word 0xd2bfc032 ! 35: STDA_R stda %r9, [%r31 + %r18] 0x01 |
| 9340 | jmptr_20_26: |
| 9341 | nop |
| 9342 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9343 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 9344 | splash_cmpr_20_27: |
| 9345 | mov 0, %r18 |
| 9346 | sllx %r18, 63, %r18 |
| 9347 | rd %tick, %r17 |
| 9348 | add %r17, 0x80, %r17 |
| 9349 | or %r17, %r18, %r17 |
| 9350 | ta T_CHANGE_PRIV |
| 9351 | .word 0xaf800011 ! 37: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9352 | splash_cmpr_20_28: |
| 9353 | mov 0, %r18 |
| 9354 | sllx %r18, 63, %r18 |
| 9355 | rd %tick, %r17 |
| 9356 | add %r17, 0x50, %r17 |
| 9357 | or %r17, %r18, %r17 |
| 9358 | ta T_CHANGE_PRIV |
| 9359 | .word 0xb3800011 ! 38: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9360 | mondo_20_29: |
| 9361 | nop |
| 9362 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9363 | ta T_CHANGE_PRIV |
| 9364 | stxa %r5, [%r0+0x3d8] %asi |
| 9365 | .word 0x9d910013 ! 39: WRPR_WSTATE_R wrpr %r4, %r19, %wstate |
| 9366 | brcommon3_20_30: |
| 9367 | nop |
| 9368 | setx common_target, %r12, %r27 |
| 9369 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9370 | ba,a .+12 |
| 9371 | .word 0xd26fe100 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0100] |
| 9372 | ba,a .+8 |
| 9373 | jmpl %r27+0, %r27 |
| 9374 | .word 0xc32fc00d ! 40: STXFSR_R st-sfr %f1, [%r13, %r31] |
| 9375 | .word 0xd2dfe048 ! 41: LDXA_I ldxa [%r31, + 0x0048] %asi, %r9 |
| 9376 | .word 0xd327e0f9 ! 42: STF_I st %f9, [0x00f9, %r31] |
| 9377 | setx 0x9196b8a25cd73aed, %r1, %r28 |
| 9378 | stxa %r28, [%g0] 0x73 |
| 9379 | intvec_20_31: |
| 9380 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9381 | mondo_20_32: |
| 9382 | nop |
| 9383 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9384 | stxa %r18, [%r0+0x3c8] %asi |
| 9385 | .word 0x9d918003 ! 44: WRPR_WSTATE_R wrpr %r6, %r3, %wstate |
| 9386 | ceter_20_33: |
| 9387 | nop |
| 9388 | ta T_CHANGE_HPRIV |
| 9389 | mov 7, %r17 |
| 9390 | sllx %r17, 60, %r17 |
| 9391 | mov 0x18, %r16 |
| 9392 | stxa %r17, [%r16]0x4c |
| 9393 | ta T_CHANGE_NONHPRIV |
| 9394 | .word 0x91410000 ! 45: RDTICK rd %tick, %r8 |
| 9395 | .word 0x91944010 ! 46: WRPR_PIL_R wrpr %r17, %r16, %pil |
| 9396 | splash_tba_20_35: |
| 9397 | ta T_CHANGE_PRIV |
| 9398 | setx 0x00000004003a0000, %r11, %r12 |
| 9399 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9400 | mondo_20_36: |
| 9401 | nop |
| 9402 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9403 | ta T_CHANGE_PRIV |
| 9404 | stxa %r11, [%r0+0x3e0] %asi |
| 9405 | .word 0x9d91c014 ! 48: WRPR_WSTATE_R wrpr %r7, %r20, %wstate |
| 9406 | .word 0xe2dfc033 ! 1: LDXA_R ldxa [%r31, %r19] 0x01, %r17 |
| 9407 | .word 0x9f803ad2 ! 49: SIR sir 0x1ad2 |
| 9408 | br_longdelay2_20_37: |
| 9409 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 9410 | .word 0x39400001 ! 50: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9411 | splash_cmpr_20_38: |
| 9412 | mov 0, %r18 |
| 9413 | sllx %r18, 63, %r18 |
| 9414 | rd %tick, %r17 |
| 9415 | add %r17, 0x70, %r17 |
| 9416 | or %r17, %r18, %r17 |
| 9417 | ta T_CHANGE_PRIV |
| 9418 | .word 0xb3800011 ! 51: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9419 | nop |
| 9420 | ta T_CHANGE_HPRIV |
| 9421 | mov 0x20, %r10 |
| 9422 | set sync_thr_counter6, %r23 |
| 9423 | #ifndef SPC |
| 9424 | ldxa [%g0]0x63, %o1 |
| 9425 | and %o1, 0x38, %o1 |
| 9426 | add %o1, %r23, %r23 |
| 9427 | #endif |
| 9428 | cas [%r23],%g0,%r10 !lock |
| 9429 | brnz %r10, sma_20_39 |
| 9430 | rd %asi, %r12 |
| 9431 | wr %g0, 0x40, %asi |
| 9432 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9433 | set 0x001a1fff, %g1 |
| 9434 | stxa %g1, [%g0 + 0x80] %asi |
| 9435 | wr %r12, %g0, %asi |
| 9436 | st %g0, [%r23] |
| 9437 | sma_20_39: |
| 9438 | ta T_CHANGE_NONHPRIV |
| 9439 | .word 0xe3e7e014 ! 52: CASA_R casa [%r31] %asi, %r20, %r17 |
| 9440 | #if (defined SPC || defined CMP) |
| 9441 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_40)+56, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9442 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_40)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9443 | #else |
| 9444 | !! TODO:Generate XIR via RESET_GEN register |
| 9445 | ! setx 0x8900000808, %r16, %r17 |
| 9446 | ! mov 0x2, %r16 |
| 9447 | ! stw %r16, [%r17] |
| 9448 | #endif |
| 9449 | xir_20_40: |
| 9450 | .word 0xa98528bf ! 53: WR_SET_SOFTINT_I wr %r20, 0x08bf, %set_softint |
| 9451 | jmptr_20_41: |
| 9452 | nop |
| 9453 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9454 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 9455 | donret_20_42: |
| 9456 | nop |
| 9457 | ta T_CHANGE_HPRIV ! macro |
| 9458 | rd %pc, %r12 |
| 9459 | add %r12, (donretarg_20_42-donret_20_42-8), %r12 |
| 9460 | mov 0x38, %r18 |
| 9461 | stxa %r12, [%r18]0x58 |
| 9462 | add %r12, 0x4, %r11 |
| 9463 | wrpr %g0, 0x1, %tl |
| 9464 | wrpr %g0, %r12, %tpc |
| 9465 | wrpr %g0, %r11, %tnpc |
| 9466 | set (0x00d2c729 | (0x8a << 24)), %r13 |
| 9467 | rdpr %tstate, %r16 |
| 9468 | mov 0x1f, %r19 |
| 9469 | and %r19, %r16, %r17 |
| 9470 | andn %r16, %r19, %r16 |
| 9471 | or %r16, %r17, %r20 |
| 9472 | wrpr %r20, %g0, %tstate |
| 9473 | wrhpr %g0, 0x1226, %htstate |
| 9474 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9475 | retry |
| 9476 | donretarg_20_42: |
| 9477 | .word 0xe26fe172 ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x0172] |
| 9478 | nop |
| 9479 | ta T_CHANGE_HPRIV |
| 9480 | mov 0x20+1, %r10 |
| 9481 | set sync_thr_counter5, %r23 |
| 9482 | #ifndef SPC |
| 9483 | ldxa [%g0]0x63, %o1 |
| 9484 | and %o1, 0x38, %o1 |
| 9485 | add %o1, %r23, %r23 |
| 9486 | sllx %o1, 5, %o3 !(CID*256) |
| 9487 | #endif |
| 9488 | cas [%r23],%g0,%r10 !lock |
| 9489 | brnz %r10, cwq_20_43 |
| 9490 | rd %asi, %r12 |
| 9491 | wr %g0, 0x40, %asi |
| 9492 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9493 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9494 | cmp %l1, 1 |
| 9495 | bne cwq_20_43 |
| 9496 | set CWQ_BASE, %l6 |
| 9497 | #ifndef SPC |
| 9498 | add %l6, %o3, %l6 |
| 9499 | #endif |
| 9500 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9501 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 9502 | sllx %l2, 32, %l2 |
| 9503 | stx %l2, [%l6 + 0x0] |
| 9504 | membar #Sync |
| 9505 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9506 | sub %l2, 0x40, %l2 |
| 9507 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9508 | wr %r12, %g0, %asi |
| 9509 | st %g0, [%r23] |
| 9510 | cwq_20_43: |
| 9511 | ta T_CHANGE_NONHPRIV |
| 9512 | .word 0x91414000 ! 56: RDPC rd %pc, %r8 |
| 9513 | splash_hpstate_20_44: |
| 9514 | .word 0x81982cd7 ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x0cd7, %hpstate |
| 9515 | .word 0x2acd0001 ! 1: BRNZ brnz,a,pt %r20,<label_0xd0001> |
| 9516 | .word 0x8d9037b9 ! 58: WRPR_PSTATE_I wrpr %r0, 0x17b9, %pstate |
| 9517 | mondo_20_46: |
| 9518 | nop |
| 9519 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9520 | ta T_CHANGE_PRIV |
| 9521 | stxa %r3, [%r0+0x3c0] %asi |
| 9522 | .word 0x9d91c003 ! 59: WRPR_WSTATE_R wrpr %r7, %r3, %wstate |
| 9523 | mondo_20_47: |
| 9524 | nop |
| 9525 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9526 | ta T_CHANGE_PRIV |
| 9527 | stxa %r16, [%r0+0x3d0] %asi |
| 9528 | .word 0x9d91800d ! 60: WRPR_WSTATE_R wrpr %r6, %r13, %wstate |
| 9529 | splash_hpstate_20_48: |
| 9530 | ta T_CHANGE_NONHPRIV |
| 9531 | .word 0x81983ef3 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x1ef3, %hpstate |
| 9532 | .word 0xd31fe020 ! 62: LDDF_I ldd [%r31, 0x0020], %f9 |
| 9533 | vahole_20_49: |
| 9534 | nop |
| 9535 | ta T_CHANGE_NONHPRIV |
| 9536 | setx vahole_target2, %r18, %r27 |
| 9537 | jmpl %r27+0, %r27 |
| 9538 | .word 0xc19fe0a0 ! 63: LDDFA_I ldda [%r31, 0x00a0], %f0 |
| 9539 | brcommon1_20_50: |
| 9540 | nop |
| 9541 | setx common_target, %r12, %r27 |
| 9542 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9543 | ba,a .+12 |
| 9544 | .word 0xd3e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r9 |
| 9545 | ba,a .+8 |
| 9546 | jmpl %r27+0, %r27 |
| 9547 | .word 0x99a489a8 ! 64: FDIVs fdivs %f18, %f8, %f12 |
| 9548 | splash_hpstate_20_51: |
| 9549 | ta T_CHANGE_NONHPRIV |
| 9550 | .word 0x819826d8 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x06d8, %hpstate |
| 9551 | .word 0x8d9034b1 ! 66: WRPR_PSTATE_I wrpr %r0, 0x14b1, %pstate |
| 9552 | .word 0xc1bfc3e0 ! 67: STDFA_R stda %f0, [%r0, %r31] |
| 9553 | br_badelay1_20_54: |
| 9554 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 9555 | .word 0xd337e1a0 ! 1: STQF_I - %f9, [0x01a0, %r31] |
| 9556 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 9557 | normalw |
| 9558 | .word 0xa9458000 ! 68: RD_SOFTINT_REG rd %softint, %r20 |
| 9559 | .word 0xd82fe00e ! 69: STB_I stb %r12, [%r31 + 0x000e] |
| 9560 | donret_20_55: |
| 9561 | nop |
| 9562 | ta T_CHANGE_HPRIV ! macro |
| 9563 | rd %pc, %r12 |
| 9564 | add %r12, (donretarg_20_55-donret_20_55-4), %r12 |
| 9565 | mov 0x38, %r18 |
| 9566 | stxa %r12, [%r18]0x58 |
| 9567 | add %r12, 0x4, %r11 |
| 9568 | wrpr %g0, 0x1, %tl |
| 9569 | wrpr %g0, %r12, %tpc |
| 9570 | wrpr %g0, %r11, %tnpc |
| 9571 | set (0x00f5b7b5 | (0x4f << 24)), %r13 |
| 9572 | rdpr %tstate, %r16 |
| 9573 | mov 0x1f, %r19 |
| 9574 | and %r19, %r16, %r17 |
| 9575 | andn %r16, %r19, %r16 |
| 9576 | or %r16, %r17, %r20 |
| 9577 | wrpr %r20, %g0, %tstate |
| 9578 | wrhpr %g0, 0x1707, %htstate |
| 9579 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9580 | .word 0x22c98001 ! 1: BRZ brz,a,pt %r6,<label_0x98001> |
| 9581 | done |
| 9582 | donretarg_20_55: |
| 9583 | .word 0x95a1c9cc ! 70: FDIVd fdivd %f38, %f12, %f10 |
| 9584 | nop |
| 9585 | ta T_CHANGE_HPRIV |
| 9586 | mov 0x20, %r10 |
| 9587 | set sync_thr_counter6, %r23 |
| 9588 | #ifndef SPC |
| 9589 | ldxa [%g0]0x63, %o1 |
| 9590 | and %o1, 0x38, %o1 |
| 9591 | add %o1, %r23, %r23 |
| 9592 | #endif |
| 9593 | cas [%r23],%g0,%r10 !lock |
| 9594 | brnz %r10, sma_20_56 |
| 9595 | rd %asi, %r12 |
| 9596 | wr %g0, 0x40, %asi |
| 9597 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9598 | set 0x00121fff, %g1 |
| 9599 | stxa %g1, [%g0 + 0x80] %asi |
| 9600 | wr %r12, %g0, %asi |
| 9601 | st %g0, [%r23] |
| 9602 | sma_20_56: |
| 9603 | ta T_CHANGE_NONHPRIV |
| 9604 | .word 0xe7e7e009 ! 71: CASA_R casa [%r31] %asi, %r9, %r19 |
| 9605 | .word 0xc19fe0e0 ! 72: LDDFA_I ldda [%r31, 0x00e0], %f0 |
| 9606 | mondo_20_57: |
| 9607 | nop |
| 9608 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9609 | stxa %r20, [%r0+0x3c8] %asi |
| 9610 | .word 0x9d908010 ! 73: WRPR_WSTATE_R wrpr %r2, %r16, %wstate |
| 9611 | nop |
| 9612 | mov 0x80, %g3 |
| 9613 | stxa %g3, [%g3] 0x57 |
| 9614 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 9615 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 9616 | nop |
| 9617 | ta T_CHANGE_HPRIV |
| 9618 | mov 0x20, %r10 |
| 9619 | set sync_thr_counter6, %r23 |
| 9620 | #ifndef SPC |
| 9621 | ldxa [%g0]0x63, %o1 |
| 9622 | and %o1, 0x38, %o1 |
| 9623 | add %o1, %r23, %r23 |
| 9624 | #endif |
| 9625 | cas [%r23],%g0,%r10 !lock |
| 9626 | brnz %r10, sma_20_58 |
| 9627 | rd %asi, %r12 |
| 9628 | wr %g0, 0x40, %asi |
| 9629 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9630 | set 0x00021fff, %g1 |
| 9631 | stxa %g1, [%g0 + 0x80] %asi |
| 9632 | wr %r12, %g0, %asi |
| 9633 | st %g0, [%r23] |
| 9634 | sma_20_58: |
| 9635 | ta T_CHANGE_NONHPRIV |
| 9636 | .word 0xe7e7e00b ! 76: CASA_R casa [%r31] %asi, %r11, %r19 |
| 9637 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 9638 | nop |
| 9639 | mov 0x80, %g3 |
| 9640 | stxa %g3, [%g3] 0x5f |
| 9641 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 9642 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 9643 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 9644 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 9645 | .word 0x9753c000 ! 79: RDPR_FQ <illegal instruction> |
| 9646 | donret_20_59: |
| 9647 | nop |
| 9648 | ta T_CHANGE_HPRIV ! macro |
| 9649 | rd %pc, %r12 |
| 9650 | add %r12, (donretarg_20_59-donret_20_59-4), %r12 |
| 9651 | mov 0x38, %r18 |
| 9652 | stxa %r12, [%r18]0x58 |
| 9653 | add %r12, 0x4, %r11 |
| 9654 | wrpr %g0, 0x2, %tl |
| 9655 | wrpr %g0, %r12, %tpc |
| 9656 | wrpr %g0, %r11, %tnpc |
| 9657 | set (0x0054924f | (16 << 24)), %r13 |
| 9658 | rdpr %tstate, %r16 |
| 9659 | mov 0x1f, %r19 |
| 9660 | and %r19, %r16, %r17 |
| 9661 | andn %r16, %r19, %r16 |
| 9662 | or %r16, %r17, %r20 |
| 9663 | wrpr %r20, %g0, %tstate |
| 9664 | wrhpr %g0, 0x1adb, %htstate |
| 9665 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9666 | done |
| 9667 | donretarg_20_59: |
| 9668 | .word 0x9ba489cc ! 80: FDIVd fdivd %f18, %f12, %f44 |
| 9669 | .word 0xda8fe1c8 ! 81: LDUBA_I lduba [%r31, + 0x01c8] %asi, %r13 |
| 9670 | .word 0xc19fdf20 ! 82: LDDFA_R ldda [%r31, %r0], %f0 |
| 9671 | change_to_randtl_20_60: |
| 9672 | ta T_CHANGE_PRIV ! macro |
| 9673 | done_change_to_randtl_20_60: |
| 9674 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9675 | splash_cmpr_20_61: |
| 9676 | mov 0, %r18 |
| 9677 | sllx %r18, 63, %r18 |
| 9678 | rd %tick, %r17 |
| 9679 | add %r17, 0x100, %r17 |
| 9680 | or %r17, %r18, %r17 |
| 9681 | ta T_CHANGE_PRIV |
| 9682 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9683 | jmptr_20_62: |
| 9684 | nop |
| 9685 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9686 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 9687 | mondo_20_63: |
| 9688 | nop |
| 9689 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9690 | ta T_CHANGE_PRIV |
| 9691 | stxa %r20, [%r0+0x3e0] %asi |
| 9692 | .word 0x9d94c005 ! 86: WRPR_WSTATE_R wrpr %r19, %r5, %wstate |
| 9693 | #if (defined SPC || defined CMP) |
| 9694 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_64)+32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9695 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_64)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9696 | #else |
| 9697 | !! TODO:Generate XIR via RESET_GEN register |
| 9698 | ! setx 0x8900000808, %r16, %r17 |
| 9699 | ! mov 0x2, %r16 |
| 9700 | ! stw %r16, [%r17] |
| 9701 | #endif |
| 9702 | xir_20_64: |
| 9703 | .word 0xa9846aea ! 87: WR_SET_SOFTINT_I wr %r17, 0x0aea, %set_softint |
| 9704 | .word 0xdb37e058 ! 88: STQF_I - %f13, [0x0058, %r31] |
| 9705 | mondo_20_65: |
| 9706 | nop |
| 9707 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9708 | ta T_CHANGE_PRIV |
| 9709 | stxa %r1, [%r0+0x3c8] %asi |
| 9710 | .word 0x9d90c004 ! 89: WRPR_WSTATE_R wrpr %r3, %r4, %wstate |
| 9711 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 9712 | memptr_20_66: |
| 9713 | set user_data_start, %r31 |
| 9714 | .word 0x85846f60 ! 91: WRCCR_I wr %r17, 0x0f60, %ccr |
| 9715 | jmptr_20_67: |
| 9716 | nop |
| 9717 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9718 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 9719 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9720 | reduce_priv_lvl_20_68: |
| 9721 | ta T_CHANGE_NONPRIV ! macro |
| 9722 | otherw |
| 9723 | mov 0xb5, %r30 |
| 9724 | .word 0x91d0001e ! 94: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 9725 | vahole_20_69: |
| 9726 | nop |
| 9727 | ta T_CHANGE_NONHPRIV |
| 9728 | setx vahole_target0, %r18, %r27 |
| 9729 | jmpl %r27+0, %r27 |
| 9730 | .word 0xda9fe070 ! 95: LDDA_I ldda [%r31, + 0x0070] %asi, %r13 |
| 9731 | pmu_20_70: |
| 9732 | nop |
| 9733 | setx 0xfffff790ffffffe3, %g1, %g7 |
| 9734 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9735 | jmptr_20_71: |
| 9736 | nop |
| 9737 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9738 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 9739 | splash_cmpr_20_72: |
| 9740 | mov 0, %r18 |
| 9741 | sllx %r18, 63, %r18 |
| 9742 | rd %tick, %r17 |
| 9743 | add %r17, 0x70, %r17 |
| 9744 | or %r17, %r18, %r17 |
| 9745 | ta T_CHANGE_HPRIV |
| 9746 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9747 | ta T_CHANGE_PRIV |
| 9748 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9749 | splash_hpstate_20_73: |
| 9750 | .word 0x8198379f ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x179f, %hpstate |
| 9751 | donret_20_74: |
| 9752 | nop |
| 9753 | ta T_CHANGE_HPRIV ! macro |
| 9754 | rd %pc, %r12 |
| 9755 | add %r12, (donretarg_20_74-donret_20_74-8), %r12 |
| 9756 | mov 0x38, %r18 |
| 9757 | stxa %r12, [%r18]0x58 |
| 9758 | add %r12, 0x4, %r11 |
| 9759 | wrpr %g0, 0x1, %tl |
| 9760 | wrpr %g0, %r12, %tpc |
| 9761 | wrpr %g0, %r11, %tnpc |
| 9762 | set (0x00395589 | (0x55 << 24)), %r13 |
| 9763 | rdpr %tstate, %r16 |
| 9764 | mov 0x1f, %r19 |
| 9765 | and %r19, %r16, %r17 |
| 9766 | andn %r16, %r19, %r16 |
| 9767 | or %r16, %r17, %r20 |
| 9768 | wrpr %r20, %g0, %tstate |
| 9769 | wrhpr %g0, 0x155, %htstate |
| 9770 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9771 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9772 | retry |
| 9773 | donretarg_20_74: |
| 9774 | .word 0xda6fe003 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x0003] |
| 9775 | change_to_randtl_20_75: |
| 9776 | ta T_CHANGE_HPRIV ! macro |
| 9777 | done_change_to_randtl_20_75: |
| 9778 | .word 0x8f902002 ! 101: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 9779 | unsupttte_20_76: |
| 9780 | nop |
| 9781 | ta T_CHANGE_HPRIV |
| 9782 | mov 1, %r20 |
| 9783 | sllx %r20, 63, %r20 |
| 9784 | or %r20, 2,%r20 |
| 9785 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 9786 | ta T_CHANGE_NONHPRIV |
| 9787 | .word 0xc3ed002c ! 102: PREFETCHA_R prefetcha [%r20, %r12] 0x01, #one_read |
| 9788 | .word 0x8d9037bf ! 103: WRPR_PSTATE_I wrpr %r0, 0x17bf, %pstate |
| 9789 | intveclr_20_78: |
| 9790 | nop |
| 9791 | ta T_CHANGE_HPRIV |
| 9792 | setx 0x6e241fd17c9bb99a, %r1, %r28 |
| 9793 | stxa %r28, [%g0] 0x72 |
| 9794 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9795 | donret_20_79: |
| 9796 | nop |
| 9797 | ta T_CHANGE_HPRIV ! macro |
| 9798 | rd %pc, %r12 |
| 9799 | add %r12, (donretarg_20_79-donret_20_79-4), %r12 |
| 9800 | mov 0x38, %r18 |
| 9801 | stxa %r12, [%r18]0x58 |
| 9802 | add %r12, 0x4, %r11 |
| 9803 | wrpr %g0, 0x1, %tl |
| 9804 | wrpr %g0, %r12, %tpc |
| 9805 | wrpr %g0, %r11, %tnpc |
| 9806 | set (0x007e381a | (32 << 24)), %r13 |
| 9807 | rdpr %tstate, %r16 |
| 9808 | mov 0x1f, %r19 |
| 9809 | and %r19, %r16, %r17 |
| 9810 | andn %r16, %r19, %r16 |
| 9811 | or %r16, %r17, %r20 |
| 9812 | wrpr %r20, %g0, %tstate |
| 9813 | wrhpr %g0, 0x4d5, %htstate |
| 9814 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9815 | done |
| 9816 | donretarg_20_79: |
| 9817 | .word 0x95a489c5 ! 105: FDIVd fdivd %f18, %f36, %f10 |
| 9818 | .word 0xe4d7e038 ! 106: LDSHA_I ldsha [%r31, + 0x0038] %asi, %r18 |
| 9819 | tagged_20_80: |
| 9820 | tsubcctv %r12, 0x14e3, %r20 |
| 9821 | .word 0xe407e029 ! 107: LDUW_I lduw [%r31 + 0x0029], %r18 |
| 9822 | nop |
| 9823 | ta T_CHANGE_HPRIV |
| 9824 | mov 0x20+1, %r10 |
| 9825 | set sync_thr_counter5, %r23 |
| 9826 | #ifndef SPC |
| 9827 | ldxa [%g0]0x63, %o1 |
| 9828 | and %o1, 0x38, %o1 |
| 9829 | add %o1, %r23, %r23 |
| 9830 | sllx %o1, 5, %o3 !(CID*256) |
| 9831 | #endif |
| 9832 | cas [%r23],%g0,%r10 !lock |
| 9833 | brnz %r10, cwq_20_81 |
| 9834 | rd %asi, %r12 |
| 9835 | wr %g0, 0x40, %asi |
| 9836 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9837 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9838 | cmp %l1, 1 |
| 9839 | bne cwq_20_81 |
| 9840 | set CWQ_BASE, %l6 |
| 9841 | #ifndef SPC |
| 9842 | add %l6, %o3, %l6 |
| 9843 | #endif |
| 9844 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9845 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 9846 | sllx %l2, 32, %l2 |
| 9847 | stx %l2, [%l6 + 0x0] |
| 9848 | membar #Sync |
| 9849 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9850 | sub %l2, 0x40, %l2 |
| 9851 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9852 | wr %r12, %g0, %asi |
| 9853 | st %g0, [%r23] |
| 9854 | cwq_20_81: |
| 9855 | ta T_CHANGE_NONHPRIV |
| 9856 | .word 0x97414000 ! 108: RDPC rd %pc, %r11 |
| 9857 | splash_lsu_20_82: |
| 9858 | nop |
| 9859 | ta T_CHANGE_HPRIV |
| 9860 | set 0xa6060588, %r2 |
| 9861 | mov 0x3, %r1 |
| 9862 | sllx %r1, 32, %r1 |
| 9863 | or %r1, %r2, %r2 |
| 9864 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9865 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9866 | splash_cmpr_20_83: |
| 9867 | mov 0, %r18 |
| 9868 | sllx %r18, 63, %r18 |
| 9869 | rd %tick, %r17 |
| 9870 | add %r17, 0x60, %r17 |
| 9871 | or %r17, %r18, %r17 |
| 9872 | ta T_CHANGE_PRIV |
| 9873 | .word 0xb3800011 ! 110: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9874 | splash_htba_20_84: |
| 9875 | nop |
| 9876 | ta T_CHANGE_HPRIV |
| 9877 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 9878 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 9879 | mondo_20_85: |
| 9880 | nop |
| 9881 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9882 | stxa %r12, [%r0+0x3c0] %asi |
| 9883 | .word 0x9d944012 ! 112: WRPR_WSTATE_R wrpr %r17, %r18, %wstate |
| 9884 | .word 0xc1bfde00 ! 113: STDFA_R stda %f0, [%r0, %r31] |
| 9885 | .word 0xe19fc3e0 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 9886 | splash_cmpr_20_86: |
| 9887 | mov 0, %r18 |
| 9888 | sllx %r18, 63, %r18 |
| 9889 | rd %tick, %r17 |
| 9890 | add %r17, 0x70, %r17 |
| 9891 | or %r17, %r18, %r17 |
| 9892 | ta T_CHANGE_PRIV |
| 9893 | .word 0xaf800011 ! 115: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9894 | #if (defined SPC || defined CMP) |
| 9895 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_87)+8, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9896 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_87)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9897 | #else |
| 9898 | !! TODO:Generate XIR via RESET_GEN register |
| 9899 | ! setx 0x8900000808, %r16, %r17 |
| 9900 | ! mov 0x2, %r16 |
| 9901 | ! stw %r16, [%r17] |
| 9902 | #endif |
| 9903 | xir_20_87: |
| 9904 | .word 0xa984fe75 ! 116: WR_SET_SOFTINT_I wr %r19, 0x1e75, %set_softint |
| 9905 | brcommon3_20_88: |
| 9906 | nop |
| 9907 | setx common_target, %r12, %r27 |
| 9908 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9909 | ba,a .+12 |
| 9910 | .word 0xd137c014 ! 1: STQF_R - %f8, [%r20, %r31] |
| 9911 | ba,a .+8 |
| 9912 | jmpl %r27+0, %r27 |
| 9913 | .word 0xd03fe1c0 ! 117: STD_I std %r8, [%r31 + 0x01c0] |
| 9914 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 9915 | .word 0x8d9024f3 ! 118: WRPR_PSTATE_I wrpr %r0, 0x04f3, %pstate |
| 9916 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9917 | reduce_priv_lvl_20_90: |
| 9918 | ta T_CHANGE_NONPRIV ! macro |
| 9919 | #if (defined SPC || defined CMP) |
| 9920 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_91)+0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9921 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_91)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 9922 | #else |
| 9923 | !! TODO:Generate XIR via RESET_GEN register |
| 9924 | ! setx 0x8900000808, %r16, %r17 |
| 9925 | ! mov 0x2, %r16 |
| 9926 | ! stw %r16, [%r17] |
| 9927 | #endif |
| 9928 | xir_20_91: |
| 9929 | .word 0xa982675f ! 120: WR_SET_SOFTINT_I wr %r9, 0x075f, %set_softint |
| 9930 | splash_cmpr_20_92: |
| 9931 | mov 0, %r18 |
| 9932 | sllx %r18, 63, %r18 |
| 9933 | rd %tick, %r17 |
| 9934 | add %r17, 0x80, %r17 |
| 9935 | or %r17, %r18, %r17 |
| 9936 | .word 0xaf800011 ! 121: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9937 | .word 0x93a00172 ! 122: FABSq dis not found |
| 9938 | |
| 9939 | ta T_CHANGE_NONHPRIV |
| 9940 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 9941 | splash_cmpr_20_95: |
| 9942 | mov 0, %r18 |
| 9943 | sllx %r18, 63, %r18 |
| 9944 | rd %tick, %r17 |
| 9945 | add %r17, 0x50, %r17 |
| 9946 | or %r17, %r18, %r17 |
| 9947 | ta T_CHANGE_HPRIV |
| 9948 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9949 | ta T_CHANGE_PRIV |
| 9950 | .word 0xb3800011 ! 124: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9951 | .word 0xe1bfde00 ! 125: STDFA_R stda %f16, [%r0, %r31] |
| 9952 | jmptr_20_96: |
| 9953 | nop |
| 9954 | best_set_reg(0xe1a00000, %r20, %r27) |
| 9955 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 9956 | setx 0x3186bb01efbe9f99, %r1, %r28 |
| 9957 | stxa %r28, [%g0] 0x73 |
| 9958 | intvec_20_97: |
| 9959 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9960 | pmu_20_98: |
| 9961 | nop |
| 9962 | ta T_CHANGE_PRIV |
| 9963 | setx 0xfffff433fffffd5b, %g1, %g7 |
| 9964 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9965 | donret_20_99: |
| 9966 | nop |
| 9967 | ta T_CHANGE_HPRIV ! macro |
| 9968 | rd %pc, %r12 |
| 9969 | add %r12, (donretarg_20_99-donret_20_99-4), %r12 |
| 9970 | mov 0x38, %r18 |
| 9971 | stxa %r12, [%r18]0x58 |
| 9972 | add %r12, 0x4, %r11 |
| 9973 | wrpr %g0, 0x2, %tl |
| 9974 | wrpr %g0, %r12, %tpc |
| 9975 | wrpr %g0, %r11, %tnpc |
| 9976 | set (0x0096eff5 | (0x89 << 24)), %r13 |
| 9977 | rdpr %tstate, %r16 |
| 9978 | mov 0x1f, %r19 |
| 9979 | and %r19, %r16, %r17 |
| 9980 | andn %r16, %r19, %r16 |
| 9981 | or %r16, %r17, %r20 |
| 9982 | wrpr %r20, %g0, %tstate |
| 9983 | wrhpr %g0, 0x15ac, %htstate |
| 9984 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 9985 | done |
| 9986 | donretarg_20_99: |
| 9987 | .word 0xa1a409d2 ! 129: FDIVd fdivd %f16, %f18, %f16 |
| 9988 | pmu_20_100: |
| 9989 | nop |
| 9990 | setx 0xfffff1f7fffff4e0, %g1, %g7 |
| 9991 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9992 | mondo_20_101: |
| 9993 | nop |
| 9994 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9995 | ta T_CHANGE_PRIV |
| 9996 | stxa %r18, [%r0+0x3e0] %asi |
| 9997 | .word 0x9d94c001 ! 131: WRPR_WSTATE_R wrpr %r19, %r1, %wstate |
| 9998 | nop |
| 9999 | ta T_CHANGE_HPRIV |
| 10000 | mov 0x20, %r10 |
| 10001 | set sync_thr_counter6, %r23 |
| 10002 | #ifndef SPC |
| 10003 | ldxa [%g0]0x63, %o1 |
| 10004 | and %o1, 0x38, %o1 |
| 10005 | add %o1, %r23, %r23 |
| 10006 | #endif |
| 10007 | cas [%r23],%g0,%r10 !lock |
| 10008 | brnz %r10, sma_20_102 |
| 10009 | rd %asi, %r12 |
| 10010 | wr %g0, 0x40, %asi |
| 10011 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10012 | set 0x000a1fff, %g1 |
| 10013 | stxa %g1, [%g0 + 0x80] %asi |
| 10014 | wr %r12, %g0, %asi |
| 10015 | st %g0, [%r23] |
| 10016 | sma_20_102: |
| 10017 | ta T_CHANGE_NONHPRIV |
| 10018 | .word 0xd9e7e008 ! 132: CASA_R casa [%r31] %asi, %r8, %r12 |
| 10019 | .word 0xc1bfc3e0 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 10020 | splash_tba_20_103: |
| 10021 | ta T_CHANGE_PRIV |
| 10022 | setx 0x00000004003a0000, %r11, %r12 |
| 10023 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 10024 | splash_lsu_20_104: |
| 10025 | nop |
| 10026 | ta T_CHANGE_HPRIV |
| 10027 | set 0x79e627e2, %r2 |
| 10028 | mov 0x5, %r1 |
| 10029 | sllx %r1, 32, %r1 |
| 10030 | or %r1, %r2, %r2 |
| 10031 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10032 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10033 | setx 0xcebd9153d90abf42, %r1, %r28 |
| 10034 | stxa %r28, [%g0] 0x73 |
| 10035 | intvec_20_105: |
| 10036 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10037 | change_to_randtl_20_106: |
| 10038 | ta T_CHANGE_PRIV ! macro |
| 10039 | done_change_to_randtl_20_106: |
| 10040 | .word 0x8f902001 ! 137: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 10041 | nop |
| 10042 | ta T_CHANGE_HPRIV |
| 10043 | mov 0x20+1, %r10 |
| 10044 | set sync_thr_counter5, %r23 |
| 10045 | #ifndef SPC |
| 10046 | ldxa [%g0]0x63, %o1 |
| 10047 | and %o1, 0x38, %o1 |
| 10048 | add %o1, %r23, %r23 |
| 10049 | sllx %o1, 5, %o3 !(CID*256) |
| 10050 | #endif |
| 10051 | cas [%r23],%g0,%r10 !lock |
| 10052 | brnz %r10, cwq_20_107 |
| 10053 | rd %asi, %r12 |
| 10054 | wr %g0, 0x40, %asi |
| 10055 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10056 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10057 | cmp %l1, 1 |
| 10058 | bne cwq_20_107 |
| 10059 | set CWQ_BASE, %l6 |
| 10060 | #ifndef SPC |
| 10061 | add %l6, %o3, %l6 |
| 10062 | #endif |
| 10063 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10064 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 10065 | sllx %l2, 32, %l2 |
| 10066 | stx %l2, [%l6 + 0x0] |
| 10067 | membar #Sync |
| 10068 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10069 | sub %l2, 0x40, %l2 |
| 10070 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10071 | wr %r12, %g0, %asi |
| 10072 | st %g0, [%r23] |
| 10073 | cwq_20_107: |
| 10074 | ta T_CHANGE_NONHPRIV |
| 10075 | .word 0x99414000 ! 138: RDPC rd %pc, %r12 |
| 10076 | #if (defined SPC || defined CMP) |
| 10077 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_108)+16, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10078 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_108)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10079 | #else |
| 10080 | !! TODO:Generate XIR via RESET_GEN register |
| 10081 | ! setx 0x8900000808, %r16, %r17 |
| 10082 | ! mov 0x2, %r16 |
| 10083 | ! stw %r16, [%r17] |
| 10084 | #endif |
| 10085 | xir_20_108: |
| 10086 | .word 0xa9812e05 ! 139: WR_SET_SOFTINT_I wr %r4, 0x0e05, %set_softint |
| 10087 | br_badelay1_20_109: |
| 10088 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10089 | .word 0xe930a66d ! 1: STQF_I - %f20, [0x066d, %r2] |
| 10090 | .word 0xdbe7c028 ! 1: CASA_I casa [%r31] 0x 1, %r8, %r13 |
| 10091 | normalw |
| 10092 | .word 0x95458000 ! 140: RD_SOFTINT_REG rd %softint, %r10 |
| 10093 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10094 | reduce_priv_lvl_20_110: |
| 10095 | ta T_CHANGE_NONHPRIV ! macro |
| 10096 | vahole_20_111: |
| 10097 | nop |
| 10098 | ta T_CHANGE_NONHPRIV |
| 10099 | setx vahole_target1, %r18, %r27 |
| 10100 | jmpl %r27+0, %r27 |
| 10101 | .word 0x87ac0a50 ! 142: FCMPd fcmpd %fcc<n>, %f16, %f16 |
| 10102 | nop |
| 10103 | ta T_CHANGE_HPRIV |
| 10104 | mov 0x20+1, %r10 |
| 10105 | set sync_thr_counter5, %r23 |
| 10106 | #ifndef SPC |
| 10107 | ldxa [%g0]0x63, %o1 |
| 10108 | and %o1, 0x38, %o1 |
| 10109 | add %o1, %r23, %r23 |
| 10110 | sllx %o1, 5, %o3 !(CID*256) |
| 10111 | #endif |
| 10112 | cas [%r23],%g0,%r10 !lock |
| 10113 | brnz %r10, cwq_20_112 |
| 10114 | rd %asi, %r12 |
| 10115 | wr %g0, 0x40, %asi |
| 10116 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10117 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10118 | cmp %l1, 1 |
| 10119 | bne cwq_20_112 |
| 10120 | set CWQ_BASE, %l6 |
| 10121 | #ifndef SPC |
| 10122 | add %l6, %o3, %l6 |
| 10123 | #endif |
| 10124 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10125 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 10126 | sllx %l2, 32, %l2 |
| 10127 | stx %l2, [%l6 + 0x0] |
| 10128 | membar #Sync |
| 10129 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10130 | sub %l2, 0x40, %l2 |
| 10131 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10132 | wr %r12, %g0, %asi |
| 10133 | st %g0, [%r23] |
| 10134 | cwq_20_112: |
| 10135 | ta T_CHANGE_NONHPRIV |
| 10136 | .word 0xa9414000 ! 143: RDPC rd %pc, %r20 |
| 10137 | .word 0xd91fe088 ! 144: LDDF_I ldd [%r31, 0x0088], %f12 |
| 10138 | setx 0x6be1f1e0c9d3ddc1, %r1, %r28 |
| 10139 | stxa %r28, [%g0] 0x73 |
| 10140 | intvec_20_113: |
| 10141 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10142 | .word 0xa6d48006 ! 146: UMULcc_R umulcc %r18, %r6, %r19 |
| 10143 | splash_cmpr_20_114: |
| 10144 | mov 0, %r18 |
| 10145 | sllx %r18, 63, %r18 |
| 10146 | rd %tick, %r17 |
| 10147 | add %r17, 0x60, %r17 |
| 10148 | or %r17, %r18, %r17 |
| 10149 | ta T_CHANGE_HPRIV |
| 10150 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10151 | .word 0xb3800011 ! 147: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10152 | mondo_20_115: |
| 10153 | nop |
| 10154 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10155 | ta T_CHANGE_PRIV |
| 10156 | stxa %r19, [%r0+0x3c8] %asi |
| 10157 | .word 0x9d94c004 ! 148: WRPR_WSTATE_R wrpr %r19, %r4, %wstate |
| 10158 | change_to_randtl_20_116: |
| 10159 | ta T_CHANGE_PRIV ! macro |
| 10160 | done_change_to_randtl_20_116: |
| 10161 | .word 0x8f902001 ! 149: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 10162 | change_to_randtl_20_117: |
| 10163 | ta T_CHANGE_HPRIV ! macro |
| 10164 | done_change_to_randtl_20_117: |
| 10165 | .word 0x8f902000 ! 150: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10166 | #if (defined SPC || defined CMP) |
| 10167 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_118) + 40, 16, 16)) -> intp(1,0,26) |
| 10168 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_118)&0xffffffff) + 40, 16, 16)) -> intp(1,0,26) |
| 10169 | #else |
| 10170 | setx 0x20587d4c7389b639, %r1, %r28 |
| 10171 | stxa %r28, [%g0] 0x73 |
| 10172 | #endif |
| 10173 | intvec_20_118: |
| 10174 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10175 | memptr_20_119: |
| 10176 | set 0x60340000, %r31 |
| 10177 | .word 0x8582782c ! 152: WRCCR_I wr %r9, 0x182c, %ccr |
| 10178 | nop |
| 10179 | mov 0x80, %g3 |
| 10180 | stxa %g3, [%g3] 0x57 |
| 10181 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 10182 | .word 0x8d903781 ! 154: WRPR_PSTATE_I wrpr %r0, 0x1781, %pstate |
| 10183 | mondo_20_121: |
| 10184 | nop |
| 10185 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10186 | ta T_CHANGE_PRIV |
| 10187 | stxa %r16, [%r0+0x3e8] %asi |
| 10188 | .word 0x9d950013 ! 155: WRPR_WSTATE_R wrpr %r20, %r19, %wstate |
| 10189 | .word 0x8d902d53 ! 156: WRPR_PSTATE_I wrpr %r0, 0x0d53, %pstate |
| 10190 | .word 0x91d020b5 ! 157: Tcc_I ta icc_or_xcc, %r0 + 181 |
| 10191 | setx 0x2ecbeb1c08b38ba0, %r1, %r28 |
| 10192 | stxa %r28, [%g0] 0x73 |
| 10193 | intvec_20_123: |
| 10194 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10195 | .word 0xc36d0012 ! 159: PREFETCH_R prefetch [%r20 + %r18], #one_read |
| 10196 | fpinit_20_124: |
| 10197 | nop |
| 10198 | setx fp_data_quads, %r19, %r20 |
| 10199 | ldd [%r20], %f0 |
| 10200 | ldd [%r20+8], %f4 |
| 10201 | ld [%r20+16], %fsr |
| 10202 | ld [%r20+24], %r19 |
| 10203 | wr %r19, %g0, %gsr |
| 10204 | .word 0x91a009a4 ! 160: FDIVs fdivs %f0, %f4, %f8 |
| 10205 | splash_hpstate_20_125: |
| 10206 | ta T_CHANGE_NONHPRIV |
| 10207 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 10208 | .word 0x81983691 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1691, %hpstate |
| 10209 | nop |
| 10210 | mov 0x80, %g3 |
| 10211 | stxa %g3, [%g3] 0x5f |
| 10212 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 10213 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 10214 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 10215 | nop |
| 10216 | ta T_CHANGE_HPRIV |
| 10217 | mov 0x20, %r10 |
| 10218 | set sync_thr_counter6, %r23 |
| 10219 | #ifndef SPC |
| 10220 | ldxa [%g0]0x63, %o1 |
| 10221 | and %o1, 0x38, %o1 |
| 10222 | add %o1, %r23, %r23 |
| 10223 | #endif |
| 10224 | cas [%r23],%g0,%r10 !lock |
| 10225 | brnz %r10, sma_20_126 |
| 10226 | rd %asi, %r12 |
| 10227 | wr %g0, 0x40, %asi |
| 10228 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10229 | set 0x000e1fff, %g1 |
| 10230 | stxa %g1, [%g0 + 0x80] %asi |
| 10231 | wr %r12, %g0, %asi |
| 10232 | st %g0, [%r23] |
| 10233 | sma_20_126: |
| 10234 | ta T_CHANGE_NONHPRIV |
| 10235 | .word 0xe1e7e008 ! 163: CASA_R casa [%r31] %asi, %r8, %r16 |
| 10236 | nop |
| 10237 | ta T_CHANGE_HPRIV |
| 10238 | mov 0x20, %r10 |
| 10239 | set sync_thr_counter6, %r23 |
| 10240 | #ifndef SPC |
| 10241 | ldxa [%g0]0x63, %o1 |
| 10242 | and %o1, 0x38, %o1 |
| 10243 | add %o1, %r23, %r23 |
| 10244 | #endif |
| 10245 | cas [%r23],%g0,%r10 !lock |
| 10246 | brnz %r10, sma_20_127 |
| 10247 | rd %asi, %r12 |
| 10248 | wr %g0, 0x40, %asi |
| 10249 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10250 | set 0x001e1fff, %g1 |
| 10251 | stxa %g1, [%g0 + 0x80] %asi |
| 10252 | wr %r12, %g0, %asi |
| 10253 | st %g0, [%r23] |
| 10254 | sma_20_127: |
| 10255 | ta T_CHANGE_NONHPRIV |
| 10256 | .word 0xe1e7e00b ! 164: CASA_R casa [%r31] %asi, %r11, %r16 |
| 10257 | pmu_20_128: |
| 10258 | nop |
| 10259 | ta T_CHANGE_PRIV |
| 10260 | setx 0xfffff786fffff8a9, %g1, %g7 |
| 10261 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10262 | splash_cmpr_20_129: |
| 10263 | mov 0, %r18 |
| 10264 | sllx %r18, 63, %r18 |
| 10265 | rd %tick, %r17 |
| 10266 | add %r17, 0x80, %r17 |
| 10267 | or %r17, %r18, %r17 |
| 10268 | ta T_CHANGE_PRIV |
| 10269 | .word 0xaf800011 ! 166: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10270 | ceter_20_130: |
| 10271 | nop |
| 10272 | ta T_CHANGE_HPRIV |
| 10273 | mov 7, %r17 |
| 10274 | sllx %r17, 60, %r17 |
| 10275 | mov 0x18, %r16 |
| 10276 | stxa %r17, [%r16]0x4c |
| 10277 | ta T_CHANGE_NONHPRIV |
| 10278 | .word 0xa9410000 ! 167: RDTICK rd %tick, %r20 |
| 10279 | jmptr_20_131: |
| 10280 | nop |
| 10281 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10282 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 10283 | .word 0x9b69c012 ! 169: SDIVX_R sdivx %r7, %r18, %r13 |
| 10284 | splash_cmpr_20_132: |
| 10285 | mov 0, %r18 |
| 10286 | sllx %r18, 63, %r18 |
| 10287 | rd %tick, %r17 |
| 10288 | add %r17, 0x100, %r17 |
| 10289 | or %r17, %r18, %r17 |
| 10290 | .word 0xb3800011 ! 170: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10291 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 10292 | nop |
| 10293 | ta T_CHANGE_HPRIV |
| 10294 | mov 0x20+1, %r10 |
| 10295 | set sync_thr_counter5, %r23 |
| 10296 | #ifndef SPC |
| 10297 | ldxa [%g0]0x63, %o1 |
| 10298 | and %o1, 0x38, %o1 |
| 10299 | add %o1, %r23, %r23 |
| 10300 | sllx %o1, 5, %o3 !(CID*256) |
| 10301 | #endif |
| 10302 | cas [%r23],%g0,%r10 !lock |
| 10303 | brnz %r10, cwq_20_133 |
| 10304 | rd %asi, %r12 |
| 10305 | wr %g0, 0x40, %asi |
| 10306 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10307 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10308 | cmp %l1, 1 |
| 10309 | bne cwq_20_133 |
| 10310 | set CWQ_BASE, %l6 |
| 10311 | #ifndef SPC |
| 10312 | add %l6, %o3, %l6 |
| 10313 | #endif |
| 10314 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10315 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 10316 | sllx %l2, 32, %l2 |
| 10317 | stx %l2, [%l6 + 0x0] |
| 10318 | membar #Sync |
| 10319 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10320 | sub %l2, 0x40, %l2 |
| 10321 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10322 | wr %r12, %g0, %asi |
| 10323 | st %g0, [%r23] |
| 10324 | cwq_20_133: |
| 10325 | ta T_CHANGE_NONHPRIV |
| 10326 | .word 0xa1414000 ! 172: RDPC rd %pc, %r16 |
| 10327 | jmptr_20_134: |
| 10328 | nop |
| 10329 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10330 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 10331 | .word 0xe09fd140 ! 174: LDDA_R ldda [%r31, %r0] 0x8a, %r16 |
| 10332 | setx 0x99e0c1c07ee5761d, %r1, %r28 |
| 10333 | stxa %r28, [%g0] 0x73 |
| 10334 | intvec_20_135: |
| 10335 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10336 | splash_cmpr_20_136: |
| 10337 | mov 1, %r18 |
| 10338 | sllx %r18, 63, %r18 |
| 10339 | rd %tick, %r17 |
| 10340 | add %r17, 0x50, %r17 |
| 10341 | or %r17, %r18, %r17 |
| 10342 | ta T_CHANGE_HPRIV |
| 10343 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10344 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10345 | .word 0xe0d7e168 ! 177: LDSHA_I ldsha [%r31, + 0x0168] %asi, %r16 |
| 10346 | splash_cmpr_20_137: |
| 10347 | mov 1, %r18 |
| 10348 | sllx %r18, 63, %r18 |
| 10349 | rd %tick, %r17 |
| 10350 | add %r17, 0x60, %r17 |
| 10351 | or %r17, %r18, %r17 |
| 10352 | ta T_CHANGE_HPRIV |
| 10353 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10354 | ta T_CHANGE_PRIV |
| 10355 | .word 0xaf800011 ! 178: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10356 | mondo_20_138: |
| 10357 | nop |
| 10358 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10359 | stxa %r18, [%r0+0x3d8] %asi |
| 10360 | .word 0x9d94c014 ! 179: WRPR_WSTATE_R wrpr %r19, %r20, %wstate |
| 10361 | change_to_randtl_20_139: |
| 10362 | ta T_CHANGE_HPRIV ! macro |
| 10363 | done_change_to_randtl_20_139: |
| 10364 | .word 0x8f902000 ! 180: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10365 | jmptr_20_140: |
| 10366 | nop |
| 10367 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10368 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 10369 | .word 0x91944013 ! 182: WRPR_PIL_R wrpr %r17, %r19, %pil |
| 10370 | donret_20_142: |
| 10371 | nop |
| 10372 | ta T_CHANGE_HPRIV ! macro |
| 10373 | rd %pc, %r12 |
| 10374 | add %r12, (donretarg_20_142-donret_20_142-8), %r12 |
| 10375 | mov 0x38, %r18 |
| 10376 | stxa %r12, [%r18]0x58 |
| 10377 | add %r12, 0x4, %r11 |
| 10378 | wrpr %g0, 0x1, %tl |
| 10379 | wrpr %g0, %r12, %tpc |
| 10380 | wrpr %g0, %r11, %tnpc |
| 10381 | set (0x004eaa7b | (0x55 << 24)), %r13 |
| 10382 | rdpr %tstate, %r16 |
| 10383 | mov 0x1f, %r19 |
| 10384 | and %r19, %r16, %r17 |
| 10385 | andn %r16, %r19, %r16 |
| 10386 | or %r16, %r17, %r20 |
| 10387 | wrpr %r20, %g0, %tstate |
| 10388 | wrhpr %g0, 0x1f02, %htstate |
| 10389 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 10390 | retry |
| 10391 | donretarg_20_142: |
| 10392 | .word 0xa7a409d0 ! 183: FDIVd fdivd %f16, %f16, %f50 |
| 10393 | .word 0xe6c7e0a8 ! 184: LDSWA_I ldswa [%r31, + 0x00a8] %asi, %r19 |
| 10394 | .word 0xc1bfc3e0 ! 185: STDFA_R stda %f0, [%r0, %r31] |
| 10395 | .word 0xe6cfe1e8 ! 186: LDSBA_I ldsba [%r31, + 0x01e8] %asi, %r19 |
| 10396 | splash_cmpr_20_143: |
| 10397 | mov 1, %r18 |
| 10398 | sllx %r18, 63, %r18 |
| 10399 | rd %tick, %r17 |
| 10400 | add %r17, 0x80, %r17 |
| 10401 | or %r17, %r18, %r17 |
| 10402 | ta T_CHANGE_HPRIV |
| 10403 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10404 | .word 0xaf800011 ! 187: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10405 | .word 0x96850010 ! 188: ADDcc_R addcc %r20, %r16, %r11 |
| 10406 | ibp_20_144: |
| 10407 | nop |
| 10408 | ta T_CHANGE_NONHPRIV |
| 10409 | .word 0xc1bfd920 ! 189: STDFA_R stda %f0, [%r0, %r31] |
| 10410 | ceter_20_145: |
| 10411 | nop |
| 10412 | ta T_CHANGE_HPRIV |
| 10413 | mov 7, %r17 |
| 10414 | sllx %r17, 60, %r17 |
| 10415 | mov 0x18, %r16 |
| 10416 | stxa %r17, [%r16]0x4c |
| 10417 | ta T_CHANGE_NONHPRIV |
| 10418 | .word 0x99410000 ! 190: RDTICK rd %tick, %r12 |
| 10419 | ceter_20_146: |
| 10420 | nop |
| 10421 | ta T_CHANGE_HPRIV |
| 10422 | mov 7, %r17 |
| 10423 | sllx %r17, 60, %r17 |
| 10424 | mov 0x18, %r16 |
| 10425 | stxa %r17, [%r16]0x4c |
| 10426 | ta T_CHANGE_NONHPRIV |
| 10427 | .word 0x9b410000 ! 191: RDTICK rd %tick, %r13 |
| 10428 | setx 0x869b6a62eb12be5f, %r1, %r28 |
| 10429 | stxa %r28, [%g0] 0x73 |
| 10430 | intvec_20_147: |
| 10431 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10432 | invtsb_20_148: |
| 10433 | nop |
| 10434 | ta T_CHANGE_HPRIV |
| 10435 | rd %asi, %r21 |
| 10436 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 10437 | mov 1, %r20 |
| 10438 | sllx %r20, 63, %r20 |
| 10439 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 10440 | xor %r22 ,%r20, %r22 |
| 10441 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 10442 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 10443 | xor %r22 ,%r20, %r22 |
| 10444 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 10445 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 10446 | xor %r22 ,%r20, %r22 |
| 10447 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 10448 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 10449 | xor %r22 ,%r20, %r22 |
| 10450 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 10451 | wr %r21, %r0, %asi |
| 10452 | ta T_CHANGE_NONHPRIV |
| 10453 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 10454 | .word 0xa9a00172 ! 194: FABSq dis not found |
| 10455 | |
| 10456 | .word 0xe6c7e138 ! 195: LDSWA_I ldswa [%r31, + 0x0138] %asi, %r19 |
| 10457 | splash_lsu_20_150: |
| 10458 | nop |
| 10459 | ta T_CHANGE_HPRIV |
| 10460 | set 0x72d75940, %r2 |
| 10461 | mov 0x2, %r1 |
| 10462 | sllx %r1, 32, %r1 |
| 10463 | or %r1, %r2, %r2 |
| 10464 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10465 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10466 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 10467 | reduce_priv_lvl_20_151: |
| 10468 | ta T_CHANGE_NONPRIV ! macro |
| 10469 | .word 0xe65fe108 ! 198: LDX_I ldx [%r31 + 0x0108], %r19 |
| 10470 | splash_hpstate_20_152: |
| 10471 | ta T_CHANGE_NONHPRIV |
| 10472 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 10473 | .word 0x81983417 ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x1417, %hpstate |
| 10474 | .word 0x9753c000 ! 200: RDPR_FQ <illegal instruction> |
| 10475 | .word 0xd31fe1a0 ! 1: LDDF_I ldd [%r31, 0x01a0], %f9 |
| 10476 | .word 0x9f8030d4 ! 201: SIR sir 0x10d4 |
| 10477 | mondo_20_153: |
| 10478 | nop |
| 10479 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10480 | stxa %r3, [%r0+0x3c8] %asi |
| 10481 | .word 0x9d910010 ! 202: WRPR_WSTATE_R wrpr %r4, %r16, %wstate |
| 10482 | jmptr_20_154: |
| 10483 | nop |
| 10484 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10485 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 10486 | brlez,a,pt %r9, skip_20_155 |
| 10487 | .word 0xc36a3ccf ! 1: PREFETCH_I prefetch [%r8 + 0xfffffccf], #one_read |
| 10488 | .align 2048 |
| 10489 | skip_20_155: |
| 10490 | .word 0xc36d3508 ! 204: PREFETCH_I prefetch [%r20 + 0xfffff508], #one_read |
| 10491 | pmu_20_156: |
| 10492 | nop |
| 10493 | ta T_CHANGE_PRIV |
| 10494 | setx 0xfffff88efffffae8, %g1, %g7 |
| 10495 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10496 | setx 0xa8e93279d0b401c4, %r1, %r28 |
| 10497 | stxa %r28, [%g0] 0x73 |
| 10498 | intvec_20_157: |
| 10499 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10500 | .word 0xe677e14a ! 207: STX_I stx %r19, [%r31 + 0x014a] |
| 10501 | brcommon2_20_158: |
| 10502 | nop |
| 10503 | setx common_target, %r12, %r27 |
| 10504 | ba,a .+12 |
| 10505 | .word 0xd9110005 ! 1: LDQF_R - [%r4, %r5], %f12 |
| 10506 | ba,a .+8 |
| 10507 | jmpl %r27+0, %r27 |
| 10508 | .word 0xe1bfe140 ! 208: STDFA_I stda %f16, [0x0140, %r31] |
| 10509 | .word 0x9afc8010 ! 209: SDIVcc_R sdivcc %r18, %r16, %r13 |
| 10510 | .word 0xd897e028 ! 210: LDUHA_I lduha [%r31, + 0x0028] %asi, %r12 |
| 10511 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 10512 | change_to_randtl_20_159: |
| 10513 | ta T_CHANGE_HPRIV ! macro |
| 10514 | done_change_to_randtl_20_159: |
| 10515 | .word 0x8f902000 ! 212: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10516 | tagged_20_160: |
| 10517 | tsubcctv %r12, 0x1b85, %r9 |
| 10518 | .word 0xd807e090 ! 213: LDUW_I lduw [%r31 + 0x0090], %r12 |
| 10519 | br_badelay1_20_161: |
| 10520 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 10521 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 10522 | .word 0x99b7c4c8 ! 1: FCMPNE32 fcmpne32 %d62, %d8, %r12 |
| 10523 | normalw |
| 10524 | .word 0xa7458000 ! 214: RD_SOFTINT_REG rd %softint, %r19 |
| 10525 | pmu_20_162: |
| 10526 | nop |
| 10527 | setx 0xfffff30bfffff1d8, %g1, %g7 |
| 10528 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10529 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 10530 | pmu_20_164: |
| 10531 | nop |
| 10532 | ta T_CHANGE_PRIV |
| 10533 | setx 0xfffffd2cfffff4db, %g1, %g7 |
| 10534 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10535 | otherw |
| 10536 | mov 0x32, %r30 |
| 10537 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 10538 | .word 0xe1bfda00 ! 219: STDFA_R stda %f16, [%r0, %r31] |
| 10539 | .word 0xc1bfdc00 ! 220: STDFA_R stda %f0, [%r0, %r31] |
| 10540 | .word 0xc1bfe040 ! 221: STDFA_I stda %f0, [0x0040, %r31] |
| 10541 | setx 0x2530778fd122f4ea, %r1, %r28 |
| 10542 | stxa %r28, [%g0] 0x73 |
| 10543 | intvec_20_165: |
| 10544 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10545 | br_longdelay1_20_166: |
| 10546 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 10547 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 10548 | nop |
| 10549 | ta T_CHANGE_HPRIV |
| 10550 | mov 0x20, %r10 |
| 10551 | set sync_thr_counter6, %r23 |
| 10552 | #ifndef SPC |
| 10553 | ldxa [%g0]0x63, %o1 |
| 10554 | and %o1, 0x38, %o1 |
| 10555 | add %o1, %r23, %r23 |
| 10556 | #endif |
| 10557 | cas [%r23],%g0,%r10 !lock |
| 10558 | brnz %r10, sma_20_167 |
| 10559 | rd %asi, %r12 |
| 10560 | wr %g0, 0x40, %asi |
| 10561 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10562 | set 0x001a1fff, %g1 |
| 10563 | stxa %g1, [%g0 + 0x80] %asi |
| 10564 | wr %r12, %g0, %asi |
| 10565 | st %g0, [%r23] |
| 10566 | sma_20_167: |
| 10567 | ta T_CHANGE_NONHPRIV |
| 10568 | .word 0xe1e7e012 ! 224: CASA_R casa [%r31] %asi, %r18, %r16 |
| 10569 | jmptr_20_168: |
| 10570 | nop |
| 10571 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10572 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 10573 | setx 0xa0e0c6333a4adb01, %r1, %r28 |
| 10574 | stxa %r28, [%g0] 0x73 |
| 10575 | intvec_20_169: |
| 10576 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10577 | mondo_20_170: |
| 10578 | nop |
| 10579 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10580 | ta T_CHANGE_PRIV |
| 10581 | stxa %r19, [%r0+0x3d8] %asi |
| 10582 | .word 0x9d948003 ! 227: WRPR_WSTATE_R wrpr %r18, %r3, %wstate |
| 10583 | splash_cmpr_20_171: |
| 10584 | mov 1, %r18 |
| 10585 | sllx %r18, 63, %r18 |
| 10586 | rd %tick, %r17 |
| 10587 | add %r17, 0x80, %r17 |
| 10588 | or %r17, %r18, %r17 |
| 10589 | ta T_CHANGE_PRIV |
| 10590 | .word 0xaf800011 ! 228: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10591 | pmu_20_172: |
| 10592 | nop |
| 10593 | ta T_CHANGE_PRIV |
| 10594 | setx 0xfffff2ecfffff8f5, %g1, %g7 |
| 10595 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10596 | splash_lsu_20_173: |
| 10597 | nop |
| 10598 | ta T_CHANGE_HPRIV |
| 10599 | set 0xd69b57f2, %r2 |
| 10600 | mov 0x6, %r1 |
| 10601 | sllx %r1, 32, %r1 |
| 10602 | or %r1, %r2, %r2 |
| 10603 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10604 | ta T_CHANGE_NONHPRIV |
| 10605 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10606 | mondo_20_174: |
| 10607 | nop |
| 10608 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10609 | ta T_CHANGE_PRIV |
| 10610 | stxa %r20, [%r0+0x3d8] %asi |
| 10611 | .word 0x9d944007 ! 231: WRPR_WSTATE_R wrpr %r17, %r7, %wstate |
| 10612 | memptr_20_175: |
| 10613 | set 0x60340000, %r31 |
| 10614 | .word 0x85847bcc ! 232: WRCCR_I wr %r17, 0x1bcc, %ccr |
| 10615 | mondo_20_176: |
| 10616 | nop |
| 10617 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10618 | ta T_CHANGE_PRIV |
| 10619 | stxa %r13, [%r0+0x3c0] %asi |
| 10620 | .word 0x9d908002 ! 233: WRPR_WSTATE_R wrpr %r2, %r2, %wstate |
| 10621 | #if (defined SPC || defined CMP) |
| 10622 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_177)+32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10623 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_177)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10624 | #else |
| 10625 | !! TODO:Generate XIR via RESET_GEN register |
| 10626 | ! setx 0x8900000808, %r16, %r17 |
| 10627 | ! mov 0x2, %r16 |
| 10628 | ! stw %r16, [%r17] |
| 10629 | #endif |
| 10630 | xir_20_177: |
| 10631 | .word 0xa984b7ef ! 234: WR_SET_SOFTINT_I wr %r18, 0x17ef, %set_softint |
| 10632 | splash_lsu_20_178: |
| 10633 | nop |
| 10634 | ta T_CHANGE_HPRIV |
| 10635 | set 0x224786a9, %r2 |
| 10636 | mov 0x6, %r1 |
| 10637 | sllx %r1, 32, %r1 |
| 10638 | or %r1, %r2, %r2 |
| 10639 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10640 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10641 | pmu_20_179: |
| 10642 | nop |
| 10643 | setx 0xfffff48dfffff56a, %g1, %g7 |
| 10644 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10645 | splash_lsu_20_180: |
| 10646 | nop |
| 10647 | ta T_CHANGE_HPRIV |
| 10648 | set 0x5ecc6f49, %r2 |
| 10649 | mov 0x6, %r1 |
| 10650 | sllx %r1, 32, %r1 |
| 10651 | or %r1, %r2, %r2 |
| 10652 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10653 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10654 | splash_cmpr_20_181: |
| 10655 | mov 0, %r18 |
| 10656 | sllx %r18, 63, %r18 |
| 10657 | rd %tick, %r17 |
| 10658 | add %r17, 0x80, %r17 |
| 10659 | or %r17, %r18, %r17 |
| 10660 | ta T_CHANGE_HPRIV |
| 10661 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10662 | .word 0xaf800011 ! 238: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10663 | .word 0xe057e048 ! 239: LDSH_I ldsh [%r31 + 0x0048], %r16 |
| 10664 | donret_20_182: |
| 10665 | nop |
| 10666 | ta T_CHANGE_HPRIV ! macro |
| 10667 | rd %pc, %r12 |
| 10668 | add %r12, (donretarg_20_182-donret_20_182-8), %r12 |
| 10669 | mov 0x38, %r18 |
| 10670 | stxa %r12, [%r18]0x58 |
| 10671 | add %r12, 0x4, %r11 |
| 10672 | wrpr %g0, 0x2, %tl |
| 10673 | wrpr %g0, %r12, %tpc |
| 10674 | wrpr %g0, %r11, %tnpc |
| 10675 | set (0x00d9a480 | (0x89 << 24)), %r13 |
| 10676 | rdpr %tstate, %r16 |
| 10677 | mov 0x1f, %r19 |
| 10678 | and %r19, %r16, %r17 |
| 10679 | andn %r16, %r19, %r16 |
| 10680 | or %r16, %r17, %r20 |
| 10681 | wrpr %r20, %g0, %tstate |
| 10682 | wrhpr %g0, 0x1fcf, %htstate |
| 10683 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 10684 | retry |
| 10685 | donretarg_20_182: |
| 10686 | .word 0xe0ffe024 ! 240: SWAPA_I swapa %r16, [%r31 + 0x0024] %asi |
| 10687 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10688 | reduce_priv_lvl_20_183: |
| 10689 | ta T_CHANGE_NONPRIV ! macro |
| 10690 | .word 0xc1bfe160 ! 242: STDFA_I stda %f0, [0x0160, %r31] |
| 10691 | #if (defined SPC || defined CMP) |
| 10692 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_184)+24, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10693 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_184)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 10694 | #else |
| 10695 | !! TODO:Generate XIR via RESET_GEN register |
| 10696 | ! setx 0x8900000808, %r16, %r17 |
| 10697 | ! mov 0x2, %r16 |
| 10698 | ! stw %r16, [%r17] |
| 10699 | #endif |
| 10700 | xir_20_184: |
| 10701 | .word 0xa9823f16 ! 243: WR_SET_SOFTINT_I wr %r8, 0x1f16, %set_softint |
| 10702 | unsupttte_20_185: |
| 10703 | nop |
| 10704 | ta T_CHANGE_HPRIV |
| 10705 | mov 1, %r20 |
| 10706 | sllx %r20, 63, %r20 |
| 10707 | or %r20, 2,%r20 |
| 10708 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 10709 | ta T_CHANGE_NONHPRIV |
| 10710 | .word 0xa1b08491 ! 244: FCMPLE32 fcmple32 %d2, %d48, %r16 |
| 10711 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 10712 | nop |
| 10713 | ta T_CHANGE_HPRIV |
| 10714 | mov 0x20+1, %r10 |
| 10715 | set sync_thr_counter5, %r23 |
| 10716 | #ifndef SPC |
| 10717 | ldxa [%g0]0x63, %o1 |
| 10718 | and %o1, 0x38, %o1 |
| 10719 | add %o1, %r23, %r23 |
| 10720 | sllx %o1, 5, %o3 !(CID*256) |
| 10721 | #endif |
| 10722 | cas [%r23],%g0,%r10 !lock |
| 10723 | brnz %r10, cwq_20_186 |
| 10724 | rd %asi, %r12 |
| 10725 | wr %g0, 0x40, %asi |
| 10726 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10727 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10728 | cmp %l1, 1 |
| 10729 | bne cwq_20_186 |
| 10730 | set CWQ_BASE, %l6 |
| 10731 | #ifndef SPC |
| 10732 | add %l6, %o3, %l6 |
| 10733 | #endif |
| 10734 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10735 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 10736 | sllx %l2, 32, %l2 |
| 10737 | stx %l2, [%l6 + 0x0] |
| 10738 | membar #Sync |
| 10739 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10740 | sub %l2, 0x40, %l2 |
| 10741 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10742 | wr %r12, %g0, %asi |
| 10743 | st %g0, [%r23] |
| 10744 | cwq_20_186: |
| 10745 | ta T_CHANGE_NONHPRIV |
| 10746 | .word 0x97414000 ! 246: RDPC rd %pc, %r11 |
| 10747 | setx 0xa0c40def4c65cf8d, %r1, %r28 |
| 10748 | stxa %r28, [%g0] 0x73 |
| 10749 | intvec_20_187: |
| 10750 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10751 | pmu_20_188: |
| 10752 | nop |
| 10753 | setx 0xfffffa94fffff3ce, %g1, %g7 |
| 10754 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10755 | splash_cmpr_20_189: |
| 10756 | mov 1, %r18 |
| 10757 | sllx %r18, 63, %r18 |
| 10758 | rd %tick, %r17 |
| 10759 | add %r17, 0x70, %r17 |
| 10760 | or %r17, %r18, %r17 |
| 10761 | ta T_CHANGE_HPRIV |
| 10762 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10763 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10764 | donret_20_190: |
| 10765 | nop |
| 10766 | ta T_CHANGE_HPRIV ! macro |
| 10767 | rd %pc, %r12 |
| 10768 | add %r12, (donretarg_20_190-donret_20_190-8), %r12 |
| 10769 | mov 0x38, %r18 |
| 10770 | stxa %r12, [%r18]0x58 |
| 10771 | add %r12, 0x4, %r11 |
| 10772 | wrpr %g0, 0x2, %tl |
| 10773 | wrpr %g0, %r12, %tpc |
| 10774 | wrpr %g0, %r11, %tnpc |
| 10775 | set (0x00289e03 | (0x88 << 24)), %r13 |
| 10776 | rdpr %tstate, %r16 |
| 10777 | mov 0x1f, %r19 |
| 10778 | and %r19, %r16, %r17 |
| 10779 | andn %r16, %r19, %r16 |
| 10780 | or %r16, %r17, %r20 |
| 10781 | wrpr %r20, %g0, %tstate |
| 10782 | wrhpr %g0, 0x7cf, %htstate |
| 10783 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 10784 | retry |
| 10785 | donretarg_20_190: |
| 10786 | .word 0xa9a289c7 ! 250: FDIVd fdivd %f10, %f38, %f20 |
| 10787 | memptr_20_191: |
| 10788 | set 0x60340000, %r31 |
| 10789 | .word 0x8581f44d ! 251: WRCCR_I wr %r7, 0x144d, %ccr |
| 10790 | .word 0xe49fdc40 ! 252: LDDA_R ldda [%r31, %r0] 0xe2, %r18 |
| 10791 | invtsb_20_192: |
| 10792 | nop |
| 10793 | ta T_CHANGE_HPRIV |
| 10794 | rd %asi, %r21 |
| 10795 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 10796 | mov 1, %r20 |
| 10797 | sllx %r20, 63, %r20 |
| 10798 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 10799 | xor %r22 ,%r20, %r22 |
| 10800 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 10801 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 10802 | xor %r22 ,%r20, %r22 |
| 10803 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 10804 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 10805 | xor %r22 ,%r20, %r22 |
| 10806 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 10807 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 10808 | xor %r22 ,%r20, %r22 |
| 10809 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 10810 | wr %r21, %r0, %asi |
| 10811 | ta T_CHANGE_NONHPRIV |
| 10812 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 10813 | nop |
| 10814 | ta T_CHANGE_HPRIV |
| 10815 | mov 0x20+1, %r10 |
| 10816 | set sync_thr_counter5, %r23 |
| 10817 | #ifndef SPC |
| 10818 | ldxa [%g0]0x63, %o1 |
| 10819 | and %o1, 0x38, %o1 |
| 10820 | add %o1, %r23, %r23 |
| 10821 | sllx %o1, 5, %o3 !(CID*256) |
| 10822 | #endif |
| 10823 | cas [%r23],%g0,%r10 !lock |
| 10824 | brnz %r10, cwq_20_193 |
| 10825 | rd %asi, %r12 |
| 10826 | wr %g0, 0x40, %asi |
| 10827 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10828 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10829 | cmp %l1, 1 |
| 10830 | bne cwq_20_193 |
| 10831 | set CWQ_BASE, %l6 |
| 10832 | #ifndef SPC |
| 10833 | add %l6, %o3, %l6 |
| 10834 | #endif |
| 10835 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10836 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 10837 | sllx %l2, 32, %l2 |
| 10838 | stx %l2, [%l6 + 0x0] |
| 10839 | membar #Sync |
| 10840 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10841 | sub %l2, 0x40, %l2 |
| 10842 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10843 | wr %r12, %g0, %asi |
| 10844 | st %g0, [%r23] |
| 10845 | cwq_20_193: |
| 10846 | ta T_CHANGE_NONHPRIV |
| 10847 | .word 0xa7414000 ! 254: RDPC rd %pc, %r19 |
| 10848 | splash_lsu_20_194: |
| 10849 | nop |
| 10850 | ta T_CHANGE_HPRIV |
| 10851 | set 0xb06ec3df, %r2 |
| 10852 | mov 0x2, %r1 |
| 10853 | sllx %r1, 32, %r1 |
| 10854 | or %r1, %r2, %r2 |
| 10855 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10856 | ta T_CHANGE_NONHPRIV |
| 10857 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10858 | .word 0x9153c000 ! 256: RDPR_FQ <illegal instruction> |
| 10859 | vahole_20_195: |
| 10860 | nop |
| 10861 | ta T_CHANGE_NONHPRIV |
| 10862 | setx vahole_target2, %r18, %r27 |
| 10863 | jmpl %r27+0, %r27 |
| 10864 | .word 0xe83fe0a0 ! 257: STD_I std %r20, [%r31 + 0x00a0] |
| 10865 | #if (defined SPC || defined CMP) |
| 10866 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_196) + 40, 16, 16)) -> intp(2,0,3) |
| 10867 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_196)&0xffffffff) + 40, 16, 16)) -> intp(2,0,3) |
| 10868 | #else |
| 10869 | setx 0x0e550a4b6ed2bf74, %r1, %r28 |
| 10870 | stxa %r28, [%g0] 0x73 |
| 10871 | #endif |
| 10872 | intvec_20_196: |
| 10873 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10874 | nop |
| 10875 | ta T_CHANGE_HPRIV |
| 10876 | mov 0x20, %r10 |
| 10877 | set sync_thr_counter6, %r23 |
| 10878 | #ifndef SPC |
| 10879 | ldxa [%g0]0x63, %o1 |
| 10880 | and %o1, 0x38, %o1 |
| 10881 | add %o1, %r23, %r23 |
| 10882 | #endif |
| 10883 | cas [%r23],%g0,%r10 !lock |
| 10884 | brnz %r10, sma_20_197 |
| 10885 | rd %asi, %r12 |
| 10886 | wr %g0, 0x40, %asi |
| 10887 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10888 | set 0x001e1fff, %g1 |
| 10889 | stxa %g1, [%g0 + 0x80] %asi |
| 10890 | wr %r12, %g0, %asi |
| 10891 | st %g0, [%r23] |
| 10892 | sma_20_197: |
| 10893 | ta T_CHANGE_NONHPRIV |
| 10894 | .word 0xe9e7e014 ! 259: CASA_R casa [%r31] %asi, %r20, %r20 |
| 10895 | .word 0xe8c7e1a8 ! 260: LDSWA_I ldswa [%r31, + 0x01a8] %asi, %r20 |
| 10896 | vahole_20_198: |
| 10897 | nop |
| 10898 | ta T_CHANGE_NONHPRIV |
| 10899 | setx vahole_target3, %r18, %r27 |
| 10900 | jmpl %r27+0, %r27 |
| 10901 | .word 0x87ac0a48 ! 261: FCMPd fcmpd %fcc<n>, %f16, %f8 |
| 10902 | .word 0xd697e068 ! 262: LDUHA_I lduha [%r31, + 0x0068] %asi, %r11 |
| 10903 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 10904 | .word 0xd68fe110 ! 264: LDUBA_I lduba [%r31, + 0x0110] %asi, %r11 |
| 10905 | pmu_20_199: |
| 10906 | nop |
| 10907 | setx 0xfffff284fffff20d, %g1, %g7 |
| 10908 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10909 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 10910 | vahole_20_201: |
| 10911 | nop |
| 10912 | ta T_CHANGE_NONHPRIV |
| 10913 | setx vahole_target1, %r18, %r27 |
| 10914 | jmpl %r27+0, %r27 |
| 10915 | .word 0x95a0c9b3 ! 267: FDIVs fdivs %f3, %f19, %f10 |
| 10916 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 10917 | .word 0x8d902f7f ! 268: WRPR_PSTATE_I wrpr %r0, 0x0f7f, %pstate |
| 10918 | .word 0xe097e0f0 ! 269: LDUHA_I lduha [%r31, + 0x00f0] %asi, %r16 |
| 10919 | nop |
| 10920 | ta T_CHANGE_HPRIV |
| 10921 | mov 0x20, %r10 |
| 10922 | set sync_thr_counter6, %r23 |
| 10923 | #ifndef SPC |
| 10924 | ldxa [%g0]0x63, %o1 |
| 10925 | and %o1, 0x38, %o1 |
| 10926 | add %o1, %r23, %r23 |
| 10927 | #endif |
| 10928 | cas [%r23],%g0,%r10 !lock |
| 10929 | brnz %r10, sma_20_203 |
| 10930 | rd %asi, %r12 |
| 10931 | wr %g0, 0x40, %asi |
| 10932 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10933 | set 0x00121fff, %g1 |
| 10934 | stxa %g1, [%g0 + 0x80] %asi |
| 10935 | wr %r12, %g0, %asi |
| 10936 | st %g0, [%r23] |
| 10937 | sma_20_203: |
| 10938 | ta T_CHANGE_NONHPRIV |
| 10939 | .word 0xe1e7e00c ! 270: CASA_R casa [%r31] %asi, %r12, %r16 |
| 10940 | .word 0xe07fe010 ! 271: SWAP_I swap %r16, [%r31 + 0x0010] |
| 10941 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 10942 | cwp_20_204: |
| 10943 | set user_data_start, %o7 |
| 10944 | .word 0x93902003 ! 273: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 10945 | pmu_20_205: |
| 10946 | nop |
| 10947 | ta T_CHANGE_PRIV |
| 10948 | setx 0xfffff686fffffea5, %g1, %g7 |
| 10949 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10950 | mondo_20_206: |
| 10951 | nop |
| 10952 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10953 | ta T_CHANGE_PRIV |
| 10954 | stxa %r20, [%r0+0x3e0] %asi |
| 10955 | .word 0x9d934011 ! 275: WRPR_WSTATE_R wrpr %r13, %r17, %wstate |
| 10956 | br_badelay3_20_207: |
| 10957 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 10958 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 10959 | .word 0xa9a0054d ! 1: FSQRTd fsqrt |
| 10960 | .word 0xa3a28830 ! 276: FADDs fadds %f10, %f16, %f17 |
| 10961 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10962 | reduce_priv_lvl_20_208: |
| 10963 | ta T_CHANGE_NONPRIV ! macro |
| 10964 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 10965 | mondo_20_210: |
| 10966 | nop |
| 10967 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10968 | stxa %r1, [%r0+0x3c0] %asi |
| 10969 | .word 0x9d944004 ! 279: WRPR_WSTATE_R wrpr %r17, %r4, %wstate |
| 10970 | donret_20_211: |
| 10971 | nop |
| 10972 | ta T_CHANGE_HPRIV ! macro |
| 10973 | rd %pc, %r12 |
| 10974 | add %r12, (donretarg_20_211-donret_20_211-4), %r12 |
| 10975 | mov 0x38, %r18 |
| 10976 | stxa %r12, [%r18]0x58 |
| 10977 | add %r12, 0x4, %r11 |
| 10978 | wrpr %g0, 0x1, %tl |
| 10979 | wrpr %g0, %r12, %tpc |
| 10980 | wrpr %g0, %r11, %tnpc |
| 10981 | set (0x00659b85 | (0x58 << 24)), %r13 |
| 10982 | rdpr %tstate, %r16 |
| 10983 | mov 0x1f, %r19 |
| 10984 | and %r19, %r16, %r17 |
| 10985 | andn %r16, %r19, %r16 |
| 10986 | or %r16, %r17, %r20 |
| 10987 | wrpr %r20, %g0, %tstate |
| 10988 | wrhpr %g0, 0x1505, %htstate |
| 10989 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 10990 | done |
| 10991 | donretarg_20_211: |
| 10992 | .word 0xd86fe1d5 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x01d5] |
| 10993 | donret_20_212: |
| 10994 | nop |
| 10995 | ta T_CHANGE_HPRIV ! macro |
| 10996 | rd %pc, %r12 |
| 10997 | add %r12, (donretarg_20_212-donret_20_212-8), %r12 |
| 10998 | mov 0x38, %r18 |
| 10999 | stxa %r12, [%r18]0x58 |
| 11000 | add %r12, 0x4, %r11 |
| 11001 | wrpr %g0, 0x1, %tl |
| 11002 | wrpr %g0, %r12, %tpc |
| 11003 | wrpr %g0, %r11, %tnpc |
| 11004 | set (0x0049a58e | (0x82 << 24)), %r13 |
| 11005 | rdpr %tstate, %r16 |
| 11006 | mov 0x1f, %r19 |
| 11007 | and %r19, %r16, %r17 |
| 11008 | andn %r16, %r19, %r16 |
| 11009 | or %r16, %r17, %r20 |
| 11010 | wrpr %r20, %g0, %tstate |
| 11011 | wrhpr %g0, 0x111f, %htstate |
| 11012 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 11013 | retry |
| 11014 | donretarg_20_212: |
| 11015 | .word 0x99a309c1 ! 281: FDIVd fdivd %f12, %f32, %f12 |
| 11016 | brcommon1_20_213: |
| 11017 | nop |
| 11018 | setx common_target, %r12, %r27 |
| 11019 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11020 | ba,a .+12 |
| 11021 | .word 0xe9e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r20 |
| 11022 | ba,a .+8 |
| 11023 | jmpl %r27+0, %r27 |
| 11024 | .word 0x95a049c4 ! 282: FDIVd fdivd %f32, %f4, %f10 |
| 11025 | .word 0xc19fe1c0 ! 283: LDDFA_I ldda [%r31, 0x01c0], %f0 |
| 11026 | .word 0x8d9037af ! 284: WRPR_PSTATE_I wrpr %r0, 0x17af, %pstate |
| 11027 | splash_cmpr_20_215: |
| 11028 | mov 0, %r18 |
| 11029 | sllx %r18, 63, %r18 |
| 11030 | rd %tick, %r17 |
| 11031 | add %r17, 0x50, %r17 |
| 11032 | or %r17, %r18, %r17 |
| 11033 | ta T_CHANGE_PRIV |
| 11034 | .word 0xb3800011 ! 285: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11035 | splash_cmpr_20_216: |
| 11036 | mov 0, %r18 |
| 11037 | sllx %r18, 63, %r18 |
| 11038 | rd %tick, %r17 |
| 11039 | add %r17, 0x50, %r17 |
| 11040 | or %r17, %r18, %r17 |
| 11041 | ta T_CHANGE_HPRIV |
| 11042 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11043 | .word 0xaf800011 ! 286: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11044 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11045 | reduce_priv_lvl_20_217: |
| 11046 | ta T_CHANGE_NONPRIV ! macro |
| 11047 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 11048 | .word 0x8d9035a7 ! 288: WRPR_PSTATE_I wrpr %r0, 0x15a7, %pstate |
| 11049 | splash_lsu_20_219: |
| 11050 | nop |
| 11051 | ta T_CHANGE_HPRIV |
| 11052 | set 0xb6059e1f, %r2 |
| 11053 | mov 0x2, %r1 |
| 11054 | sllx %r1, 32, %r1 |
| 11055 | or %r1, %r2, %r2 |
| 11056 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11057 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11058 | donret_20_220: |
| 11059 | nop |
| 11060 | ta T_CHANGE_HPRIV ! macro |
| 11061 | rd %pc, %r12 |
| 11062 | add %r12, (donretarg_20_220-donret_20_220-8), %r12 |
| 11063 | mov 0x38, %r18 |
| 11064 | stxa %r12, [%r18]0x58 |
| 11065 | add %r12, 0x4, %r11 |
| 11066 | wrpr %g0, 0x2, %tl |
| 11067 | wrpr %g0, %r12, %tpc |
| 11068 | wrpr %g0, %r11, %tnpc |
| 11069 | set (0x00905cf1 | (0x80 << 24)), %r13 |
| 11070 | rdpr %tstate, %r16 |
| 11071 | mov 0x1f, %r19 |
| 11072 | and %r19, %r16, %r17 |
| 11073 | andn %r16, %r19, %r16 |
| 11074 | or %r16, %r17, %r20 |
| 11075 | wrpr %r20, %g0, %tstate |
| 11076 | wrhpr %g0, 0x1486, %htstate |
| 11077 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 11078 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 11079 | retry |
| 11080 | donretarg_20_220: |
| 11081 | .word 0xd66fe1ff ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x01ff] |
| 11082 | .word 0x93d020b5 ! 291: Tcc_I tne icc_or_xcc, %r0 + 181 |
| 11083 | setx 0x693e3c632af50f6c, %r1, %r28 |
| 11084 | stxa %r28, [%g0] 0x73 |
| 11085 | intvec_20_221: |
| 11086 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11087 | brcommon3_20_222: |
| 11088 | nop |
| 11089 | setx common_target, %r12, %r27 |
| 11090 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11091 | ba,a .+12 |
| 11092 | .word 0xd737e010 ! 1: STQF_I - %f11, [0x0010, %r31] |
| 11093 | ba,a .+8 |
| 11094 | jmpl %r27+0, %r27 |
| 11095 | .word 0xd7e7e012 ! 293: CASA_R casa [%r31] %asi, %r18, %r11 |
| 11096 | .word 0xd6d7e128 ! 294: LDSHA_I ldsha [%r31, + 0x0128] %asi, %r11 |
| 11097 | pmu_20_223: |
| 11098 | nop |
| 11099 | ta T_CHANGE_PRIV |
| 11100 | setx 0xfffff15bfffff2b0, %g1, %g7 |
| 11101 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11102 | .word 0x99a00171 ! 296: FABSq dis not found |
| 11103 | |
| 11104 | #if (defined SPC || defined CMP) |
| 11105 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_225)+0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11106 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_225)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11107 | #else |
| 11108 | !! TODO:Generate XIR via RESET_GEN register |
| 11109 | ! setx 0x8900000808, %r16, %r17 |
| 11110 | ! mov 0x2, %r16 |
| 11111 | ! stw %r16, [%r17] |
| 11112 | #endif |
| 11113 | xir_20_225: |
| 11114 | .word 0xa984f0ef ! 297: WR_SET_SOFTINT_I wr %r19, 0x10ef, %set_softint |
| 11115 | memptr_20_226: |
| 11116 | set 0x60140000, %r31 |
| 11117 | .word 0x8584aab2 ! 298: WRCCR_I wr %r18, 0x0ab2, %ccr |
| 11118 | mondo_20_227: |
| 11119 | nop |
| 11120 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11121 | ta T_CHANGE_PRIV |
| 11122 | stxa %r13, [%r0+0x3e8] %asi |
| 11123 | .word 0x9d928011 ! 299: WRPR_WSTATE_R wrpr %r10, %r17, %wstate |
| 11124 | .word 0xd297e170 ! 300: LDUHA_I lduha [%r31, + 0x0170] %asi, %r9 |
| 11125 | vahole_20_228: |
| 11126 | nop |
| 11127 | ta T_CHANGE_NONHPRIV |
| 11128 | setx vahole_target2, %r18, %r27 |
| 11129 | jmpl %r27+0, %r27 |
| 11130 | .word 0x99a4c9d3 ! 301: FDIVd fdivd %f50, %f50, %f12 |
| 11131 | #if (defined SPC || defined CMP) |
| 11132 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_229)+48, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11133 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_229)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11134 | #else |
| 11135 | !! TODO:Generate XIR via RESET_GEN register |
| 11136 | ! setx 0x8900000808, %r16, %r17 |
| 11137 | ! mov 0x2, %r16 |
| 11138 | ! stw %r16, [%r17] |
| 11139 | #endif |
| 11140 | xir_20_229: |
| 11141 | .word 0xa984a0ee ! 302: WR_SET_SOFTINT_I wr %r18, 0x00ee, %set_softint |
| 11142 | .word 0x8d903bb7 ! 303: WRPR_PSTATE_I wrpr %r0, 0x1bb7, %pstate |
| 11143 | vahole_20_231: |
| 11144 | nop |
| 11145 | ta T_CHANGE_NONHPRIV |
| 11146 | setx vahole_target0, %r18, %r27 |
| 11147 | jmpl %r27+0, %r27 |
| 11148 | .word 0xe91fc009 ! 304: LDDF_R ldd [%r31, %r9], %f20 |
| 11149 | trapasi_20_232: |
| 11150 | nop |
| 11151 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 11152 | .word 0xe8d04980 ! 305: LDSHA_R ldsha [%r1, %r0] 0x4c, %r20 |
| 11153 | #if (defined SPC || defined CMP) |
| 11154 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_233)+0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11155 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_233)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11156 | #else |
| 11157 | !! TODO:Generate XIR via RESET_GEN register |
| 11158 | ! setx 0x8900000808, %r16, %r17 |
| 11159 | ! mov 0x2, %r16 |
| 11160 | ! stw %r16, [%r17] |
| 11161 | #endif |
| 11162 | xir_20_233: |
| 11163 | .word 0xa98477df ! 306: WR_SET_SOFTINT_I wr %r17, 0x17df, %set_softint |
| 11164 | #if (defined SPC || defined CMP) |
| 11165 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_234) + 48, 16, 16)) -> intp(0,0,28) |
| 11166 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_234)&0xffffffff) + 48, 16, 16)) -> intp(0,0,28) |
| 11167 | #else |
| 11168 | setx 0x373392c1d1268766, %r1, %r28 |
| 11169 | stxa %r28, [%g0] 0x73 |
| 11170 | #endif |
| 11171 | intvec_20_234: |
| 11172 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11173 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 11174 | pmu_20_235: |
| 11175 | nop |
| 11176 | ta T_CHANGE_PRIV |
| 11177 | setx 0xfffff7bffffff3be, %g1, %g7 |
| 11178 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11179 | nop |
| 11180 | ta T_CHANGE_HPRIV |
| 11181 | mov 0x20+1, %r10 |
| 11182 | set sync_thr_counter5, %r23 |
| 11183 | #ifndef SPC |
| 11184 | ldxa [%g0]0x63, %o1 |
| 11185 | and %o1, 0x38, %o1 |
| 11186 | add %o1, %r23, %r23 |
| 11187 | sllx %o1, 5, %o3 !(CID*256) |
| 11188 | #endif |
| 11189 | cas [%r23],%g0,%r10 !lock |
| 11190 | brnz %r10, cwq_20_236 |
| 11191 | rd %asi, %r12 |
| 11192 | wr %g0, 0x40, %asi |
| 11193 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11194 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11195 | cmp %l1, 1 |
| 11196 | bne cwq_20_236 |
| 11197 | set CWQ_BASE, %l6 |
| 11198 | #ifndef SPC |
| 11199 | add %l6, %o3, %l6 |
| 11200 | #endif |
| 11201 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11202 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 11203 | sllx %l2, 32, %l2 |
| 11204 | stx %l2, [%l6 + 0x0] |
| 11205 | membar #Sync |
| 11206 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11207 | sub %l2, 0x40, %l2 |
| 11208 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11209 | wr %r12, %g0, %asi |
| 11210 | st %g0, [%r23] |
| 11211 | cwq_20_236: |
| 11212 | ta T_CHANGE_NONHPRIV |
| 11213 | .word 0xa3414000 ! 310: RDPC rd %pc, %r17 |
| 11214 | nop |
| 11215 | ta T_CHANGE_HPRIV |
| 11216 | mov 0x20, %r10 |
| 11217 | set sync_thr_counter6, %r23 |
| 11218 | #ifndef SPC |
| 11219 | ldxa [%g0]0x63, %o1 |
| 11220 | and %o1, 0x38, %o1 |
| 11221 | add %o1, %r23, %r23 |
| 11222 | #endif |
| 11223 | cas [%r23],%g0,%r10 !lock |
| 11224 | brnz %r10, sma_20_237 |
| 11225 | rd %asi, %r12 |
| 11226 | wr %g0, 0x40, %asi |
| 11227 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11228 | set 0x00121fff, %g1 |
| 11229 | stxa %g1, [%g0 + 0x80] %asi |
| 11230 | wr %r12, %g0, %asi |
| 11231 | st %g0, [%r23] |
| 11232 | sma_20_237: |
| 11233 | ta T_CHANGE_NONHPRIV |
| 11234 | .word 0xd1e7e012 ! 311: CASA_R casa [%r31] %asi, %r18, %r8 |
| 11235 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11236 | reduce_priv_lvl_20_238: |
| 11237 | ta T_CHANGE_NONPRIV ! macro |
| 11238 | nop |
| 11239 | ta T_CHANGE_HPRIV |
| 11240 | mov 0x20, %r10 |
| 11241 | set sync_thr_counter6, %r23 |
| 11242 | #ifndef SPC |
| 11243 | ldxa [%g0]0x63, %o1 |
| 11244 | and %o1, 0x38, %o1 |
| 11245 | add %o1, %r23, %r23 |
| 11246 | #endif |
| 11247 | cas [%r23],%g0,%r10 !lock |
| 11248 | brnz %r10, sma_20_239 |
| 11249 | rd %asi, %r12 |
| 11250 | wr %g0, 0x40, %asi |
| 11251 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11252 | set 0x001e1fff, %g1 |
| 11253 | stxa %g1, [%g0 + 0x80] %asi |
| 11254 | wr %r12, %g0, %asi |
| 11255 | st %g0, [%r23] |
| 11256 | sma_20_239: |
| 11257 | ta T_CHANGE_NONHPRIV |
| 11258 | .word 0xd1e7e013 ! 313: CASA_R casa [%r31] %asi, %r19, %r8 |
| 11259 | .word 0xd1e7c028 ! 1: CASA_I casa [%r31] 0x 1, %r8, %r8 |
| 11260 | .word 0x9f802958 ! 314: SIR sir 0x0958 |
| 11261 | .word 0x93d02033 ! 315: Tcc_I tne icc_or_xcc, %r0 + 51 |
| 11262 | splash_cmpr_20_240: |
| 11263 | mov 0, %r18 |
| 11264 | sllx %r18, 63, %r18 |
| 11265 | rd %tick, %r17 |
| 11266 | add %r17, 0x70, %r17 |
| 11267 | or %r17, %r18, %r17 |
| 11268 | ta T_CHANGE_HPRIV |
| 11269 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11270 | .word 0xb3800011 ! 316: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11271 | mondo_20_241: |
| 11272 | nop |
| 11273 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11274 | stxa %r7, [%r0+0x3e8] %asi |
| 11275 | .word 0x9d940007 ! 317: WRPR_WSTATE_R wrpr %r16, %r7, %wstate |
| 11276 | nop |
| 11277 | mov 0x80, %g3 |
| 11278 | stxa %g3, [%g3] 0x57 |
| 11279 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 11280 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 11281 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 11282 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 11283 | nop |
| 11284 | ta T_CHANGE_HPRIV |
| 11285 | mov 0x20, %r10 |
| 11286 | set sync_thr_counter6, %r23 |
| 11287 | #ifndef SPC |
| 11288 | ldxa [%g0]0x63, %o1 |
| 11289 | and %o1, 0x38, %o1 |
| 11290 | add %o1, %r23, %r23 |
| 11291 | #endif |
| 11292 | cas [%r23],%g0,%r10 !lock |
| 11293 | brnz %r10, sma_20_242 |
| 11294 | rd %asi, %r12 |
| 11295 | wr %g0, 0x40, %asi |
| 11296 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11297 | set 0x000e1fff, %g1 |
| 11298 | stxa %g1, [%g0 + 0x80] %asi |
| 11299 | wr %r12, %g0, %asi |
| 11300 | st %g0, [%r23] |
| 11301 | sma_20_242: |
| 11302 | ta T_CHANGE_NONHPRIV |
| 11303 | .word 0xd1e7e00b ! 319: CASA_R casa [%r31] %asi, %r11, %r8 |
| 11304 | br_longdelay1_20_243: |
| 11305 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 11306 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 11307 | splash_cmpr_20_244: |
| 11308 | mov 0, %r18 |
| 11309 | sllx %r18, 63, %r18 |
| 11310 | rd %tick, %r17 |
| 11311 | add %r17, 0x60, %r17 |
| 11312 | or %r17, %r18, %r17 |
| 11313 | ta T_CHANGE_HPRIV |
| 11314 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11315 | .word 0xaf800011 ! 321: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11316 | pmu_20_245: |
| 11317 | nop |
| 11318 | ta T_CHANGE_PRIV |
| 11319 | setx 0xfffff4b2fffff3a1, %g1, %g7 |
| 11320 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11321 | pmu_20_246: |
| 11322 | nop |
| 11323 | setx 0xfffffaa4fffffceb, %g1, %g7 |
| 11324 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11325 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 11326 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 11327 | .word 0x9ba00172 ! 326: FABSq dis not found |
| 11328 | |
| 11329 | mondo_20_249: |
| 11330 | nop |
| 11331 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11332 | stxa %r1, [%r0+0x3e0] %asi |
| 11333 | .word 0x9d92c001 ! 327: WRPR_WSTATE_R wrpr %r11, %r1, %wstate |
| 11334 | #if (defined SPC || defined CMP) |
| 11335 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_250) + 8, 16, 16)) -> intp(0,0,4) |
| 11336 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_250)&0xffffffff) + 8, 16, 16)) -> intp(0,0,4) |
| 11337 | #else |
| 11338 | setx 0xa7e621cc0b9fb2ef, %r1, %r28 |
| 11339 | stxa %r28, [%g0] 0x73 |
| 11340 | #endif |
| 11341 | intvec_20_250: |
| 11342 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11343 | donret_20_251: |
| 11344 | nop |
| 11345 | ta T_CHANGE_HPRIV ! macro |
| 11346 | rd %pc, %r12 |
| 11347 | add %r12, (donretarg_20_251-donret_20_251-4), %r12 |
| 11348 | mov 0x38, %r18 |
| 11349 | stxa %r12, [%r18]0x58 |
| 11350 | add %r12, 0x4, %r11 |
| 11351 | wrpr %g0, 0x2, %tl |
| 11352 | wrpr %g0, %r12, %tpc |
| 11353 | wrpr %g0, %r11, %tnpc |
| 11354 | set (0x00415a35 | (32 << 24)), %r13 |
| 11355 | rdpr %tstate, %r16 |
| 11356 | mov 0x1f, %r19 |
| 11357 | and %r19, %r16, %r17 |
| 11358 | andn %r16, %r19, %r16 |
| 11359 | or %r16, %r17, %r20 |
| 11360 | wrpr %r20, %g0, %tstate |
| 11361 | wrhpr %g0, 0xf73, %htstate |
| 11362 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 11363 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 11364 | done |
| 11365 | donretarg_20_251: |
| 11366 | .word 0xa3a349d0 ! 329: FDIVd fdivd %f44, %f16, %f48 |
| 11367 | .word 0xd4c7e000 ! 330: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r10 |
| 11368 | .word 0xe1bfe180 ! 331: STDFA_I stda %f16, [0x0180, %r31] |
| 11369 | nop |
| 11370 | mov 0x80, %g3 |
| 11371 | stxa %g3, [%g3] 0x5f |
| 11372 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 11373 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 11374 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 11375 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 11376 | br_badelay3_20_252: |
| 11377 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 11378 | .word 0xdb5dae7f ! Random illegal ? |
| 11379 | .word 0xa7a00553 ! 1: FSQRTd fsqrt |
| 11380 | .word 0xa3a48823 ! 333: FADDs fadds %f18, %f3, %f17 |
| 11381 | splash_hpstate_20_253: |
| 11382 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 11383 | .word 0x81982dc5 ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x0dc5, %hpstate |
| 11384 | mondo_20_254: |
| 11385 | nop |
| 11386 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11387 | ta T_CHANGE_PRIV |
| 11388 | stxa %r1, [%r0+0x3c8] %asi |
| 11389 | .word 0x9d908006 ! 335: WRPR_WSTATE_R wrpr %r2, %r6, %wstate |
| 11390 | .word 0xe31fc011 ! 1: LDDF_R ldd [%r31, %r17], %f17 |
| 11391 | .word 0x9f803e71 ! 336: SIR sir 0x1e71 |
| 11392 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11393 | reduce_priv_lvl_20_255: |
| 11394 | ta T_CHANGE_NONHPRIV ! macro |
| 11395 | .word 0xe277e000 ! 338: STX_I stx %r17, [%r31 + 0x0000] |
| 11396 | pmu_20_256: |
| 11397 | nop |
| 11398 | ta T_CHANGE_PRIV |
| 11399 | setx 0xfffff457fffff601, %g1, %g7 |
| 11400 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11401 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 11402 | otherw |
| 11403 | mov 0x31, %r30 |
| 11404 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 11405 | .word 0xe227e0d8 ! 342: STW_I stw %r17, [%r31 + 0x00d8] |
| 11406 | setx 0x27556a6762a1daab, %r1, %r28 |
| 11407 | stxa %r28, [%g0] 0x73 |
| 11408 | intvec_20_257: |
| 11409 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11410 | jmptr_20_258: |
| 11411 | nop |
| 11412 | best_set_reg(0xe1a00000, %r20, %r27) |
| 11413 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 11414 | donret_20_259: |
| 11415 | nop |
| 11416 | ta T_CHANGE_HPRIV ! macro |
| 11417 | rd %pc, %r12 |
| 11418 | add %r12, (donretarg_20_259-donret_20_259-4), %r12 |
| 11419 | mov 0x38, %r18 |
| 11420 | stxa %r12, [%r18]0x58 |
| 11421 | add %r12, 0x4, %r11 |
| 11422 | wrpr %g0, 0x1, %tl |
| 11423 | wrpr %g0, %r12, %tpc |
| 11424 | wrpr %g0, %r11, %tnpc |
| 11425 | set (0x0042c1cb | (0x8b << 24)), %r13 |
| 11426 | rdpr %tstate, %r16 |
| 11427 | mov 0x1f, %r19 |
| 11428 | and %r19, %r16, %r17 |
| 11429 | andn %r16, %r19, %r16 |
| 11430 | or %r16, %r17, %r20 |
| 11431 | wrpr %r20, %g0, %tstate |
| 11432 | wrhpr %g0, 0xccd, %htstate |
| 11433 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 11434 | .word 0x2ec8c001 ! 1: BRGEZ brgez,a,pt %r3,<label_0x8c001> |
| 11435 | done |
| 11436 | donretarg_20_259: |
| 11437 | .word 0xa9a4c9c9 ! 345: FDIVd fdivd %f50, %f40, %f20 |
| 11438 | jmptr_20_260: |
| 11439 | nop |
| 11440 | best_set_reg(0xe1a00000, %r20, %r27) |
| 11441 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 11442 | .word 0x95a00163 ! 347: FABSq dis not found |
| 11443 | |
| 11444 | .word 0x94c12c76 ! 348: ADDCcc_I addccc %r4, 0x0c76, %r10 |
| 11445 | mondo_20_262: |
| 11446 | nop |
| 11447 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11448 | stxa %r7, [%r0+0x3d0] %asi |
| 11449 | .word 0x9d90c00a ! 349: WRPR_WSTATE_R wrpr %r3, %r10, %wstate |
| 11450 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 11451 | .word 0x8d903d3c ! 350: WRPR_PSTATE_I wrpr %r0, 0x1d3c, %pstate |
| 11452 | .word 0xe19fe0e0 ! 351: LDDFA_I ldda [%r31, 0x00e0], %f16 |
| 11453 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 11454 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11455 | reduce_priv_lvl_20_265: |
| 11456 | ta T_CHANGE_NONHPRIV ! macro |
| 11457 | #if (defined SPC || defined CMP) |
| 11458 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_266) + 32, 16, 16)) -> intp(0,0,4) |
| 11459 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_266)&0xffffffff) + 32, 16, 16)) -> intp(0,0,4) |
| 11460 | #else |
| 11461 | setx 0x0809df1e93cdb108, %r1, %r28 |
| 11462 | stxa %r28, [%g0] 0x73 |
| 11463 | #endif |
| 11464 | intvec_20_266: |
| 11465 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11466 | vahole_20_267: |
| 11467 | nop |
| 11468 | ta T_CHANGE_NONHPRIV |
| 11469 | setx vahole_target1, %r18, %r27 |
| 11470 | jmpl %r27+0, %r27 |
| 11471 | .word 0xe69fe1e0 ! 355: LDDA_I ldda [%r31, + 0x01e0] %asi, %r19 |
| 11472 | .word 0xe19fe0a0 ! 356: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 11473 | #if (defined SPC || defined CMP) |
| 11474 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_268)+40, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11475 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_268)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11476 | #else |
| 11477 | !! TODO:Generate XIR via RESET_GEN register |
| 11478 | ! setx 0x8900000808, %r16, %r17 |
| 11479 | ! mov 0x2, %r16 |
| 11480 | ! stw %r16, [%r17] |
| 11481 | #endif |
| 11482 | xir_20_268: |
| 11483 | .word 0xa981a1a6 ! 357: WR_SET_SOFTINT_I wr %r6, 0x01a6, %set_softint |
| 11484 | setx 0x7dee86617e586102, %r1, %r28 |
| 11485 | stxa %r28, [%g0] 0x73 |
| 11486 | intvec_20_269: |
| 11487 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11488 | nop |
| 11489 | ta T_CHANGE_HPRIV |
| 11490 | mov 0x20+1, %r10 |
| 11491 | set sync_thr_counter5, %r23 |
| 11492 | #ifndef SPC |
| 11493 | ldxa [%g0]0x63, %o1 |
| 11494 | and %o1, 0x38, %o1 |
| 11495 | add %o1, %r23, %r23 |
| 11496 | sllx %o1, 5, %o3 !(CID*256) |
| 11497 | #endif |
| 11498 | cas [%r23],%g0,%r10 !lock |
| 11499 | brnz %r10, cwq_20_270 |
| 11500 | rd %asi, %r12 |
| 11501 | wr %g0, 0x40, %asi |
| 11502 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11503 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11504 | cmp %l1, 1 |
| 11505 | bne cwq_20_270 |
| 11506 | set CWQ_BASE, %l6 |
| 11507 | #ifndef SPC |
| 11508 | add %l6, %o3, %l6 |
| 11509 | #endif |
| 11510 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11511 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 11512 | sllx %l2, 32, %l2 |
| 11513 | stx %l2, [%l6 + 0x0] |
| 11514 | membar #Sync |
| 11515 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11516 | sub %l2, 0x40, %l2 |
| 11517 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11518 | wr %r12, %g0, %asi |
| 11519 | st %g0, [%r23] |
| 11520 | cwq_20_270: |
| 11521 | ta T_CHANGE_NONHPRIV |
| 11522 | .word 0xa9414000 ! 359: RDPC rd %pc, %r20 |
| 11523 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 11524 | br_longdelay1_20_272: |
| 11525 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 11526 | .word 0xbfefc000 ! 361: RESTORE_R restore %r31, %r0, %r31 |
| 11527 | fpinit_20_273: |
| 11528 | nop |
| 11529 | setx fp_data_quads, %r19, %r20 |
| 11530 | ldd [%r20], %f0 |
| 11531 | ldd [%r20+8], %f4 |
| 11532 | ld [%r20+16], %fsr |
| 11533 | ld [%r20+24], %r19 |
| 11534 | wr %r19, %g0, %gsr |
| 11535 | .word 0x91a009a4 ! 362: FDIVs fdivs %f0, %f4, %f8 |
| 11536 | jmptr_20_274: |
| 11537 | nop |
| 11538 | best_set_reg(0xe1a00000, %r20, %r27) |
| 11539 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 11540 | ta T_CHANGE_NONHPRIV |
| 11541 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 11542 | intveclr_20_276: |
| 11543 | nop |
| 11544 | ta T_CHANGE_HPRIV |
| 11545 | setx 0xe0b986416522f1b5, %r1, %r28 |
| 11546 | stxa %r28, [%g0] 0x72 |
| 11547 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11548 | nop |
| 11549 | ta T_CHANGE_HPRIV |
| 11550 | mov 0x20+1, %r10 |
| 11551 | set sync_thr_counter5, %r23 |
| 11552 | #ifndef SPC |
| 11553 | ldxa [%g0]0x63, %o1 |
| 11554 | and %o1, 0x38, %o1 |
| 11555 | add %o1, %r23, %r23 |
| 11556 | sllx %o1, 5, %o3 !(CID*256) |
| 11557 | #endif |
| 11558 | cas [%r23],%g0,%r10 !lock |
| 11559 | brnz %r10, cwq_20_277 |
| 11560 | rd %asi, %r12 |
| 11561 | wr %g0, 0x40, %asi |
| 11562 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11563 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11564 | cmp %l1, 1 |
| 11565 | bne cwq_20_277 |
| 11566 | set CWQ_BASE, %l6 |
| 11567 | #ifndef SPC |
| 11568 | add %l6, %o3, %l6 |
| 11569 | #endif |
| 11570 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11571 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 11572 | sllx %l2, 32, %l2 |
| 11573 | stx %l2, [%l6 + 0x0] |
| 11574 | membar #Sync |
| 11575 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11576 | sub %l2, 0x40, %l2 |
| 11577 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11578 | wr %r12, %g0, %asi |
| 11579 | st %g0, [%r23] |
| 11580 | cwq_20_277: |
| 11581 | ta T_CHANGE_NONHPRIV |
| 11582 | .word 0x97414000 ! 366: RDPC rd %pc, %r11 |
| 11583 | brcommon3_20_278: |
| 11584 | nop |
| 11585 | setx common_target, %r12, %r27 |
| 11586 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11587 | ba,a .+12 |
| 11588 | .word 0xd937c00d ! 1: STQF_R - %f12, [%r13, %r31] |
| 11589 | ba,a .+8 |
| 11590 | jmpl %r27+0, %r27 |
| 11591 | .word 0xd91fc010 ! 367: LDDF_R ldd [%r31, %r16], %f12 |
| 11592 | .word 0xd827e165 ! 368: STW_I stw %r12, [%r31 + 0x0165] |
| 11593 | .word 0xd8c7e050 ! 369: LDSWA_I ldswa [%r31, + 0x0050] %asi, %r12 |
| 11594 | #if (defined SPC || defined CMP) |
| 11595 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_279)+32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11596 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_279)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11597 | #else |
| 11598 | !! TODO:Generate XIR via RESET_GEN register |
| 11599 | ! setx 0x8900000808, %r16, %r17 |
| 11600 | ! mov 0x2, %r16 |
| 11601 | ! stw %r16, [%r17] |
| 11602 | #endif |
| 11603 | xir_20_279: |
| 11604 | .word 0xa980aa89 ! 370: WR_SET_SOFTINT_I wr %r2, 0x0a89, %set_softint |
| 11605 | nop |
| 11606 | ta T_CHANGE_HPRIV |
| 11607 | mov 0x20+1, %r10 |
| 11608 | set sync_thr_counter5, %r23 |
| 11609 | #ifndef SPC |
| 11610 | ldxa [%g0]0x63, %o1 |
| 11611 | and %o1, 0x38, %o1 |
| 11612 | add %o1, %r23, %r23 |
| 11613 | sllx %o1, 5, %o3 !(CID*256) |
| 11614 | #endif |
| 11615 | cas [%r23],%g0,%r10 !lock |
| 11616 | brnz %r10, cwq_20_280 |
| 11617 | rd %asi, %r12 |
| 11618 | wr %g0, 0x40, %asi |
| 11619 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11620 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11621 | cmp %l1, 1 |
| 11622 | bne cwq_20_280 |
| 11623 | set CWQ_BASE, %l6 |
| 11624 | #ifndef SPC |
| 11625 | add %l6, %o3, %l6 |
| 11626 | #endif |
| 11627 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11628 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 11629 | sllx %l2, 32, %l2 |
| 11630 | stx %l2, [%l6 + 0x0] |
| 11631 | membar #Sync |
| 11632 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11633 | sub %l2, 0x40, %l2 |
| 11634 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11635 | wr %r12, %g0, %asi |
| 11636 | st %g0, [%r23] |
| 11637 | cwq_20_280: |
| 11638 | ta T_CHANGE_NONHPRIV |
| 11639 | .word 0xa7414000 ! 371: RDPC rd %pc, %r19 |
| 11640 | .word 0xd4cfe0a8 ! 372: LDSBA_I ldsba [%r31, + 0x00a8] %asi, %r10 |
| 11641 | splash_cmpr_20_281: |
| 11642 | mov 0, %r18 |
| 11643 | sllx %r18, 63, %r18 |
| 11644 | rd %tick, %r17 |
| 11645 | add %r17, 0x50, %r17 |
| 11646 | or %r17, %r18, %r17 |
| 11647 | ta T_CHANGE_HPRIV |
| 11648 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11649 | .word 0xb3800011 ! 373: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11650 | nop |
| 11651 | ta T_CHANGE_HPRIV |
| 11652 | mov 0x20, %r10 |
| 11653 | set sync_thr_counter6, %r23 |
| 11654 | #ifndef SPC |
| 11655 | ldxa [%g0]0x63, %o1 |
| 11656 | and %o1, 0x38, %o1 |
| 11657 | add %o1, %r23, %r23 |
| 11658 | #endif |
| 11659 | cas [%r23],%g0,%r10 !lock |
| 11660 | brnz %r10, sma_20_282 |
| 11661 | rd %asi, %r12 |
| 11662 | wr %g0, 0x40, %asi |
| 11663 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11664 | set 0x00121fff, %g1 |
| 11665 | stxa %g1, [%g0 + 0x80] %asi |
| 11666 | wr %r12, %g0, %asi |
| 11667 | st %g0, [%r23] |
| 11668 | sma_20_282: |
| 11669 | ta T_CHANGE_NONHPRIV |
| 11670 | .word 0xd5e7e009 ! 374: CASA_R casa [%r31] %asi, %r9, %r10 |
| 11671 | br_badelay2_20_283: |
| 11672 | .word 0x93a209d2 ! 1: FDIVd fdivd %f8, %f18, %f40 |
| 11673 | pdist %f28, %f10, %f18 |
| 11674 | .word 0x99b40301 ! 375: ALIGNADDRESS alignaddr %r16, %r1, %r12 |
| 11675 | .word 0xe19fe100 ! 376: LDDFA_I ldda [%r31, 0x0100], %f16 |
| 11676 | .word 0xc30fc00a ! 1: LDXFSR_R ld-fsr [%r31, %r10], %f1 |
| 11677 | .word 0x9f802b9a ! 377: SIR sir 0x0b9a |
| 11678 | .word 0xc1bfdc00 ! 378: STDFA_R stda %f0, [%r0, %r31] |
| 11679 | .word 0xa8dd000d ! 379: SMULcc_R smulcc %r20, %r13, %r20 |
| 11680 | brlz,a,pt %r19, skip_20_284 |
| 11681 | fbg skip_20_284 |
| 11682 | .align 2048 |
| 11683 | skip_20_284: |
| 11684 | .word 0xe9e7c020 ! 380: CASA_I casa [%r31] 0x 1, %r0, %r20 |
| 11685 | nop |
| 11686 | ta T_CHANGE_HPRIV |
| 11687 | mov 0x20+1, %r10 |
| 11688 | set sync_thr_counter5, %r23 |
| 11689 | #ifndef SPC |
| 11690 | ldxa [%g0]0x63, %o1 |
| 11691 | and %o1, 0x38, %o1 |
| 11692 | add %o1, %r23, %r23 |
| 11693 | sllx %o1, 5, %o3 !(CID*256) |
| 11694 | #endif |
| 11695 | cas [%r23],%g0,%r10 !lock |
| 11696 | brnz %r10, cwq_20_285 |
| 11697 | rd %asi, %r12 |
| 11698 | wr %g0, 0x40, %asi |
| 11699 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11700 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11701 | cmp %l1, 1 |
| 11702 | bne cwq_20_285 |
| 11703 | set CWQ_BASE, %l6 |
| 11704 | #ifndef SPC |
| 11705 | add %l6, %o3, %l6 |
| 11706 | #endif |
| 11707 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11708 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 11709 | sllx %l2, 32, %l2 |
| 11710 | stx %l2, [%l6 + 0x0] |
| 11711 | membar #Sync |
| 11712 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11713 | sub %l2, 0x40, %l2 |
| 11714 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11715 | wr %r12, %g0, %asi |
| 11716 | st %g0, [%r23] |
| 11717 | cwq_20_285: |
| 11718 | ta T_CHANGE_NONHPRIV |
| 11719 | .word 0xa3414000 ! 381: RDPC rd %pc, %r17 |
| 11720 | brcommon3_20_286: |
| 11721 | nop |
| 11722 | setx common_target, %r12, %r27 |
| 11723 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11724 | ba,a .+12 |
| 11725 | .word 0xdb37c012 ! 1: STQF_R - %f13, [%r18, %r31] |
| 11726 | ba,a .+8 |
| 11727 | jmpl %r27+0, %r27 |
| 11728 | .word 0xdb3fc014 ! 382: STDF_R std %f13, [%r20, %r31] |
| 11729 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 11730 | .word 0xdb1fe1a0 ! 384: LDDF_I ldd [%r31, 0x01a0], %f13 |
| 11731 | #if (defined SPC || defined CMP) |
| 11732 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_288) + 8, 16, 16)) -> intp(6,0,4) |
| 11733 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_288)&0xffffffff) + 8, 16, 16)) -> intp(6,0,4) |
| 11734 | #else |
| 11735 | setx 0x2b0d077d5329150c, %r1, %r28 |
| 11736 | stxa %r28, [%g0] 0x73 |
| 11737 | #endif |
| 11738 | intvec_20_288: |
| 11739 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11740 | tagged_20_289: |
| 11741 | taddcctv %r3, 0x1d4d, %r17 |
| 11742 | .word 0xda07e198 ! 386: LDUW_I lduw [%r31 + 0x0198], %r13 |
| 11743 | ibp_20_290: |
| 11744 | nop |
| 11745 | .word 0xc1bfda00 ! 387: STDFA_R stda %f0, [%r0, %r31] |
| 11746 | cwp_20_291: |
| 11747 | set user_data_start, %o7 |
| 11748 | .word 0x93902000 ! 388: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 11749 | pmu_20_292: |
| 11750 | nop |
| 11751 | ta T_CHANGE_PRIV |
| 11752 | setx 0xfffff140fffff67f, %g1, %g7 |
| 11753 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11754 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11755 | reduce_priv_lvl_20_293: |
| 11756 | ta T_CHANGE_NONPRIV ! macro |
| 11757 | ceter_20_294: |
| 11758 | nop |
| 11759 | ta T_CHANGE_HPRIV |
| 11760 | mov 7, %r17 |
| 11761 | sllx %r17, 60, %r17 |
| 11762 | mov 0x18, %r16 |
| 11763 | stxa %r17, [%r16]0x4c |
| 11764 | .word 0x95410000 ! 391: RDTICK rd %tick, %r10 |
| 11765 | cwp_20_295: |
| 11766 | set user_data_start, %o7 |
| 11767 | .word 0x93902000 ! 392: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 11768 | splash_lsu_20_296: |
| 11769 | nop |
| 11770 | ta T_CHANGE_HPRIV |
| 11771 | set 0x4f501005, %r2 |
| 11772 | mov 0x7, %r1 |
| 11773 | sllx %r1, 32, %r1 |
| 11774 | or %r1, %r2, %r2 |
| 11775 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11776 | ta T_CHANGE_NONHPRIV |
| 11777 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11778 | intveclr_20_297: |
| 11779 | nop |
| 11780 | ta T_CHANGE_HPRIV |
| 11781 | setx 0x550347884561ba7e, %r1, %r28 |
| 11782 | stxa %r28, [%g0] 0x72 |
| 11783 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11784 | nop |
| 11785 | mov 0x80, %g3 |
| 11786 | stxa %g3, [%g3] 0x5f |
| 11787 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 11788 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11789 | reduce_priv_lvl_20_298: |
| 11790 | ta T_CHANGE_NONPRIV ! macro |
| 11791 | dvapa_20_299: |
| 11792 | nop |
| 11793 | ta T_CHANGE_HPRIV |
| 11794 | mov 0xbd6, %r20 |
| 11795 | mov 0x14, %r19 |
| 11796 | sllx %r20, 23, %r20 |
| 11797 | or %r19, %r20, %r19 |
| 11798 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11799 | mov 0x38, %r18 |
| 11800 | stxa %r31, [%r18]0x58 |
| 11801 | ta T_CHANGE_NONHPRIV |
| 11802 | .word 0xe31fe110 ! 397: LDDF_I ldd [%r31, 0x0110], %f17 |
| 11803 | mondo_20_300: |
| 11804 | nop |
| 11805 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11806 | stxa %r11, [%r0+0x3c0] %asi |
| 11807 | .word 0x9d950001 ! 398: WRPR_WSTATE_R wrpr %r20, %r1, %wstate |
| 11808 | .word 0xe19fd920 ! 399: LDDFA_R ldda [%r31, %r0], %f16 |
| 11809 | splash_decr_20_301: |
| 11810 | nop |
| 11811 | ta T_CHANGE_HPRIV |
| 11812 | mov 8, %r1 |
| 11813 | stxa %r14, [%r1] 0x45 |
| 11814 | .word 0xa7840013 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r16, %r19, %- |
| 11815 | #if (defined SPC || defined CMP) |
| 11816 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_302) + 0, 16, 16)) -> intp(5,0,1) |
| 11817 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_302)&0xffffffff) + 0, 16, 16)) -> intp(5,0,1) |
| 11818 | #else |
| 11819 | setx 0x13c70b920b4455e5, %r1, %r28 |
| 11820 | stxa %r28, [%g0] 0x73 |
| 11821 | #endif |
| 11822 | intvec_20_302: |
| 11823 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11824 | brcommon2_20_303: |
| 11825 | nop |
| 11826 | setx common_target, %r12, %r27 |
| 11827 | ba,a .+12 |
| 11828 | .word 0xa5a00550 ! 1: FSQRTd fsqrt |
| 11829 | ba,a .+8 |
| 11830 | jmpl %r27+0, %r27 |
| 11831 | .word 0xc1bfe1a0 ! 402: STDFA_I stda %f0, [0x01a0, %r31] |
| 11832 | nop |
| 11833 | ta T_CHANGE_HPRIV |
| 11834 | mov 0x20, %r10 |
| 11835 | set sync_thr_counter6, %r23 |
| 11836 | #ifndef SPC |
| 11837 | ldxa [%g0]0x63, %o1 |
| 11838 | and %o1, 0x38, %o1 |
| 11839 | add %o1, %r23, %r23 |
| 11840 | #endif |
| 11841 | cas [%r23],%g0,%r10 !lock |
| 11842 | brnz %r10, sma_20_304 |
| 11843 | rd %asi, %r12 |
| 11844 | wr %g0, 0x40, %asi |
| 11845 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11846 | set 0x00161fff, %g1 |
| 11847 | stxa %g1, [%g0 + 0x80] %asi |
| 11848 | wr %r12, %g0, %asi |
| 11849 | st %g0, [%r23] |
| 11850 | sma_20_304: |
| 11851 | ta T_CHANGE_NONHPRIV |
| 11852 | .word 0xd3e7e00a ! 403: CASA_R casa [%r31] %asi, %r10, %r9 |
| 11853 | pmu_20_305: |
| 11854 | nop |
| 11855 | setx 0xfffff0b3fffffab6, %g1, %g7 |
| 11856 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11857 | jmptr_20_306: |
| 11858 | nop |
| 11859 | best_set_reg(0xe1a00000, %r20, %r27) |
| 11860 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 11861 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 11862 | #if (defined SPC || defined CMP) |
| 11863 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_308) + 48, 16, 16)) -> intp(3,0,5) |
| 11864 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_308)&0xffffffff) + 48, 16, 16)) -> intp(3,0,5) |
| 11865 | #else |
| 11866 | setx 0xd23f188784f0b496, %r1, %r28 |
| 11867 | stxa %r28, [%g0] 0x73 |
| 11868 | #endif |
| 11869 | intvec_20_308: |
| 11870 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11871 | splash_hpstate_20_309: |
| 11872 | .word 0x81983d91 ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x1d91, %hpstate |
| 11873 | br_badelay2_20_310: |
| 11874 | .word 0xa1a489d2 ! 1: FDIVd fdivd %f18, %f18, %f16 |
| 11875 | pdist %f20, %f4, %f28 |
| 11876 | .word 0xa5b4c304 ! 409: ALIGNADDRESS alignaddr %r19, %r4, %r18 |
| 11877 | splash_cmpr_20_311: |
| 11878 | mov 1, %r18 |
| 11879 | sllx %r18, 63, %r18 |
| 11880 | rd %tick, %r17 |
| 11881 | add %r17, 0x50, %r17 |
| 11882 | or %r17, %r18, %r17 |
| 11883 | ta T_CHANGE_HPRIV |
| 11884 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11885 | ta T_CHANGE_PRIV |
| 11886 | .word 0xb3800011 ! 410: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11887 | nop |
| 11888 | ta T_CHANGE_HPRIV |
| 11889 | mov 0x20, %r10 |
| 11890 | set sync_thr_counter6, %r23 |
| 11891 | #ifndef SPC |
| 11892 | ldxa [%g0]0x63, %o1 |
| 11893 | and %o1, 0x38, %o1 |
| 11894 | add %o1, %r23, %r23 |
| 11895 | #endif |
| 11896 | cas [%r23],%g0,%r10 !lock |
| 11897 | brnz %r10, sma_20_312 |
| 11898 | rd %asi, %r12 |
| 11899 | wr %g0, 0x40, %asi |
| 11900 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11901 | set 0x000e1fff, %g1 |
| 11902 | stxa %g1, [%g0 + 0x80] %asi |
| 11903 | wr %r12, %g0, %asi |
| 11904 | st %g0, [%r23] |
| 11905 | sma_20_312: |
| 11906 | ta T_CHANGE_NONHPRIV |
| 11907 | .word 0xe5e7e008 ! 411: CASA_R casa [%r31] %asi, %r8, %r18 |
| 11908 | #if (defined SPC || defined CMP) |
| 11909 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_313)+8, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11910 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_313)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 11911 | #else |
| 11912 | !! TODO:Generate XIR via RESET_GEN register |
| 11913 | ! setx 0x8900000808, %r16, %r17 |
| 11914 | ! mov 0x2, %r16 |
| 11915 | ! stw %r16, [%r17] |
| 11916 | #endif |
| 11917 | xir_20_313: |
| 11918 | .word 0xa982fa72 ! 412: WR_SET_SOFTINT_I wr %r11, 0x1a72, %set_softint |
| 11919 | memptr_20_314: |
| 11920 | set 0x60540000, %r31 |
| 11921 | .word 0x8582ab30 ! 413: WRCCR_I wr %r10, 0x0b30, %ccr |
| 11922 | .word 0x9191c007 ! 414: WRPR_PIL_R wrpr %r7, %r7, %pil |
| 11923 | .word 0xe497c032 ! 1: LDUHA_R lduha [%r31, %r18] 0x01, %r18 |
| 11924 | .word 0x9f802865 ! 415: SIR sir 0x0865 |
| 11925 | nop |
| 11926 | ta T_CHANGE_HPRIV |
| 11927 | mov 0x20+1, %r10 |
| 11928 | set sync_thr_counter5, %r23 |
| 11929 | #ifndef SPC |
| 11930 | ldxa [%g0]0x63, %o1 |
| 11931 | and %o1, 0x38, %o1 |
| 11932 | add %o1, %r23, %r23 |
| 11933 | sllx %o1, 5, %o3 !(CID*256) |
| 11934 | #endif |
| 11935 | cas [%r23],%g0,%r10 !lock |
| 11936 | brnz %r10, cwq_20_316 |
| 11937 | rd %asi, %r12 |
| 11938 | wr %g0, 0x40, %asi |
| 11939 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11940 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11941 | cmp %l1, 1 |
| 11942 | bne cwq_20_316 |
| 11943 | set CWQ_BASE, %l6 |
| 11944 | #ifndef SPC |
| 11945 | add %l6, %o3, %l6 |
| 11946 | #endif |
| 11947 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11948 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 11949 | sllx %l2, 32, %l2 |
| 11950 | stx %l2, [%l6 + 0x0] |
| 11951 | membar #Sync |
| 11952 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11953 | sub %l2, 0x40, %l2 |
| 11954 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11955 | wr %r12, %g0, %asi |
| 11956 | st %g0, [%r23] |
| 11957 | cwq_20_316: |
| 11958 | ta T_CHANGE_NONHPRIV |
| 11959 | .word 0xa3414000 ! 416: RDPC rd %pc, %r17 |
| 11960 | intveclr_20_317: |
| 11961 | nop |
| 11962 | ta T_CHANGE_HPRIV |
| 11963 | setx 0xc91d96a726a4af62, %r1, %r28 |
| 11964 | stxa %r28, [%g0] 0x72 |
| 11965 | ta T_CHANGE_NONHPRIV |
| 11966 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11967 | splash_cmpr_20_318: |
| 11968 | mov 0, %r18 |
| 11969 | sllx %r18, 63, %r18 |
| 11970 | rd %tick, %r17 |
| 11971 | add %r17, 0x80, %r17 |
| 11972 | or %r17, %r18, %r17 |
| 11973 | ta T_CHANGE_HPRIV |
| 11974 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11975 | ta T_CHANGE_PRIV |
| 11976 | .word 0xaf800011 ! 418: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11977 | setx 0x82ad2ffbf2490b7c, %r1, %r28 |
| 11978 | stxa %r28, [%g0] 0x73 |
| 11979 | intvec_20_319: |
| 11980 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11981 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11982 | reduce_priv_lvl_20_320: |
| 11983 | ta T_CHANGE_NONHPRIV ! macro |
| 11984 | mondo_20_321: |
| 11985 | nop |
| 11986 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11987 | stxa %r18, [%r0+0x3e8] %asi |
| 11988 | .word 0x9d950003 ! 421: WRPR_WSTATE_R wrpr %r20, %r3, %wstate |
| 11989 | splash_lsu_20_322: |
| 11990 | nop |
| 11991 | ta T_CHANGE_HPRIV |
| 11992 | set 0x7fc8a7eb, %r2 |
| 11993 | mov 0x7, %r1 |
| 11994 | sllx %r1, 32, %r1 |
| 11995 | or %r1, %r2, %r2 |
| 11996 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11997 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11998 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 11999 | .word 0xda3fe0ab ! 424: STD_I std %r13, [%r31 + 0x00ab] |
| 12000 | .word 0x91d020b4 ! 425: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 12001 | otherw |
| 12002 | mov 0x30, %r30 |
| 12003 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 12004 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 12005 | .word 0x8d902c0c ! 427: WRPR_PSTATE_I wrpr %r0, 0x0c0c, %pstate |
| 12006 | br_badelay2_20_324: |
| 12007 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 12008 | allclean |
| 12009 | .word 0xa9b0430b ! 428: ALIGNADDRESS alignaddr %r1, %r11, %r20 |
| 12010 | vahole_20_325: |
| 12011 | nop |
| 12012 | ta T_CHANGE_NONHPRIV |
| 12013 | setx vahole_target0, %r18, %r27 |
| 12014 | jmpl %r27+0, %r27 |
| 12015 | .word 0xd69fc034 ! 429: LDDA_R ldda [%r31, %r20] 0x01, %r11 |
| 12016 | #if (defined SPC || defined CMP) |
| 12017 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_326) + 56, 16, 16)) -> intp(5,0,24) |
| 12018 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_326)&0xffffffff) + 56, 16, 16)) -> intp(5,0,24) |
| 12019 | #else |
| 12020 | setx 0x3d030e1c688cf288, %r1, %r28 |
| 12021 | stxa %r28, [%g0] 0x73 |
| 12022 | #endif |
| 12023 | intvec_20_326: |
| 12024 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12025 | splash_hpstate_20_327: |
| 12026 | ta T_CHANGE_NONHPRIV |
| 12027 | .word 0x819834d1 ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x14d1, %hpstate |
| 12028 | splash_htba_20_328: |
| 12029 | nop |
| 12030 | ta T_CHANGE_HPRIV |
| 12031 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 12032 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 12033 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 12034 | .word 0xa5b50551 ! 434: FCMPEQ16 fcmpeq16 %d20, %d48, %r18 |
| 12035 | donret_20_329: |
| 12036 | nop |
| 12037 | ta T_CHANGE_HPRIV ! macro |
| 12038 | rd %pc, %r12 |
| 12039 | add %r12, (donretarg_20_329-donret_20_329-4), %r12 |
| 12040 | mov 0x38, %r18 |
| 12041 | stxa %r12, [%r18]0x58 |
| 12042 | add %r12, 0x4, %r11 |
| 12043 | wrpr %g0, 0x2, %tl |
| 12044 | wrpr %g0, %r12, %tpc |
| 12045 | wrpr %g0, %r11, %tnpc |
| 12046 | set (0x00fc2af5 | (0x82 << 24)), %r13 |
| 12047 | rdpr %tstate, %r16 |
| 12048 | mov 0x1f, %r19 |
| 12049 | and %r19, %r16, %r17 |
| 12050 | andn %r16, %r19, %r16 |
| 12051 | or %r16, %r17, %r20 |
| 12052 | wrpr %r20, %g0, %tstate |
| 12053 | wrhpr %g0, 0xc49, %htstate |
| 12054 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 12055 | done |
| 12056 | donretarg_20_329: |
| 12057 | .word 0xd8ffe0d4 ! 435: SWAPA_I swapa %r12, [%r31 + 0x00d4] %asi |
| 12058 | .word 0xa1a40d23 ! 436: FsMULd fsmuld %f16, %f34, %f16 |
| 12059 | splash_tba_20_330: |
| 12060 | ta T_CHANGE_PRIV |
| 12061 | setx 0x00000004003a0000, %r11, %r12 |
| 12062 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12063 | nop |
| 12064 | mov 0x80, %g3 |
| 12065 | stxa %g3, [%g3] 0x57 |
| 12066 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 12067 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12068 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 12069 | nop |
| 12070 | mov 0x80, %g3 |
| 12071 | stxa %g3, [%g3] 0x5f |
| 12072 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12073 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 12074 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 12075 | donret_20_331: |
| 12076 | nop |
| 12077 | ta T_CHANGE_HPRIV ! macro |
| 12078 | rd %pc, %r12 |
| 12079 | add %r12, (donretarg_20_331-donret_20_331-4), %r12 |
| 12080 | mov 0x38, %r18 |
| 12081 | stxa %r12, [%r18]0x58 |
| 12082 | add %r12, 0x4, %r11 |
| 12083 | wrpr %g0, 0x2, %tl |
| 12084 | wrpr %g0, %r12, %tpc |
| 12085 | wrpr %g0, %r11, %tnpc |
| 12086 | set (0x004da436 | (0x83 << 24)), %r13 |
| 12087 | rdpr %tstate, %r16 |
| 12088 | mov 0x1f, %r19 |
| 12089 | and %r19, %r16, %r17 |
| 12090 | andn %r16, %r19, %r16 |
| 12091 | or %r16, %r17, %r20 |
| 12092 | wrpr %r20, %g0, %tstate |
| 12093 | wrhpr %g0, 0x96, %htstate |
| 12094 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 12095 | .word 0x24c8c001 ! 1: BRLEZ brlez,a,pt %r3,<label_0x8c001> |
| 12096 | done |
| 12097 | donretarg_20_331: |
| 12098 | .word 0xe26fe0d6 ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x00d6] |
| 12099 | donret_20_332: |
| 12100 | nop |
| 12101 | ta T_CHANGE_HPRIV ! macro |
| 12102 | rd %pc, %r12 |
| 12103 | add %r12, (donretarg_20_332-donret_20_332-8), %r12 |
| 12104 | mov 0x38, %r18 |
| 12105 | stxa %r12, [%r18]0x58 |
| 12106 | add %r12, 0x4, %r11 |
| 12107 | wrpr %g0, 0x1, %tl |
| 12108 | wrpr %g0, %r12, %tpc |
| 12109 | wrpr %g0, %r11, %tnpc |
| 12110 | set (0x00665569 | (22 << 24)), %r13 |
| 12111 | rdpr %tstate, %r16 |
| 12112 | mov 0x1f, %r19 |
| 12113 | and %r19, %r16, %r17 |
| 12114 | andn %r16, %r19, %r16 |
| 12115 | or %r16, %r17, %r20 |
| 12116 | wrpr %r20, %g0, %tstate |
| 12117 | wrhpr %g0, 0xd44, %htstate |
| 12118 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 12119 | retry |
| 12120 | donretarg_20_332: |
| 12121 | .word 0x9ba4c9c7 ! 441: FDIVd fdivd %f50, %f38, %f44 |
| 12122 | setx 0xcc19be796bcca753, %r1, %r28 |
| 12123 | stxa %r28, [%g0] 0x73 |
| 12124 | intvec_20_333: |
| 12125 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12126 | .word 0xe88fe1b8 ! 443: LDUBA_I lduba [%r31, + 0x01b8] %asi, %r20 |
| 12127 | .word 0xe937e150 ! 444: STQF_I - %f20, [0x0150, %r31] |
| 12128 | ta T_CHANGE_NONHPRIV |
| 12129 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 12130 | .word 0xa1702d5d ! 446: POPC_I popc 0x0d5d, %r16 |
| 12131 | brcommon2_20_336: |
| 12132 | nop |
| 12133 | setx common_target, %r12, %r27 |
| 12134 | ba,a .+12 |
| 12135 | .word 0xe1108007 ! 1: LDQF_R - [%r2, %r7], %f16 |
| 12136 | ba,a .+8 |
| 12137 | jmpl %r27+0, %r27 |
| 12138 | .word 0xc19fdf20 ! 447: LDDFA_R ldda [%r31, %r0], %f0 |
| 12139 | .word 0xa44ac004 ! 448: MULX_R mulx %r11, %r4, %r18 |
| 12140 | splash_lsu_20_337: |
| 12141 | nop |
| 12142 | ta T_CHANGE_HPRIV |
| 12143 | set 0x7c0f9714, %r2 |
| 12144 | mov 0x6, %r1 |
| 12145 | sllx %r1, 32, %r1 |
| 12146 | or %r1, %r2, %r2 |
| 12147 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12148 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12149 | mondo_20_338: |
| 12150 | nop |
| 12151 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12152 | ta T_CHANGE_PRIV |
| 12153 | stxa %r17, [%r0+0x3e0] %asi |
| 12154 | .word 0x9d948014 ! 450: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 12155 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 12156 | splash_hpstate_20_340: |
| 12157 | ta T_CHANGE_NONHPRIV |
| 12158 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 12159 | .word 0x81983c9b ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x1c9b, %hpstate |
| 12160 | pmu_20_341: |
| 12161 | nop |
| 12162 | ta T_CHANGE_PRIV |
| 12163 | setx 0xfffff056fffffe56, %g1, %g7 |
| 12164 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12165 | .word 0x83d02035 ! 454: Tcc_I te icc_or_xcc, %r0 + 53 |
| 12166 | .word 0x93a409b4 ! 455: FDIVs fdivs %f16, %f20, %f9 |
| 12167 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 12168 | cwp_20_342: |
| 12169 | set user_data_start, %o7 |
| 12170 | .word 0x93902006 ! 457: WRPR_CWP_I wrpr %r0, 0x0006, %cwp |
| 12171 | jmptr_20_343: |
| 12172 | nop |
| 12173 | best_set_reg(0xe1a00000, %r20, %r27) |
| 12174 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 12175 | jmptr_20_344: |
| 12176 | nop |
| 12177 | best_set_reg(0xe1a00000, %r20, %r27) |
| 12178 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 12179 | jmptr_20_345: |
| 12180 | nop |
| 12181 | best_set_reg(0xe1a00000, %r20, %r27) |
| 12182 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 12183 | .word 0xe73fc014 ! 461: STDF_R std %f19, [%r20, %r31] |
| 12184 | brcommon1_20_347: |
| 12185 | nop |
| 12186 | setx common_target, %r12, %r27 |
| 12187 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12188 | ba,a .+12 |
| 12189 | .word 0xa7702120 ! 1: POPC_I popc 0x0120, %r19 |
| 12190 | ba,a .+8 |
| 12191 | jmpl %r27+0, %r27 |
| 12192 | .word 0xa1a2c9cd ! 462: FDIVd fdivd %f42, %f44, %f16 |
| 12193 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 12194 | ceter_20_349: |
| 12195 | nop |
| 12196 | ta T_CHANGE_HPRIV |
| 12197 | mov 7, %r17 |
| 12198 | sllx %r17, 60, %r17 |
| 12199 | mov 0x18, %r16 |
| 12200 | stxa %r17, [%r16]0x4c |
| 12201 | ta T_CHANGE_NONHPRIV |
| 12202 | .word 0xa5410000 ! 464: RDTICK rd %tick, %r18 |
| 12203 | splash_cmpr_20_350: |
| 12204 | mov 0, %r18 |
| 12205 | sllx %r18, 63, %r18 |
| 12206 | rd %tick, %r17 |
| 12207 | add %r17, 0x50, %r17 |
| 12208 | or %r17, %r18, %r17 |
| 12209 | ta T_CHANGE_HPRIV |
| 12210 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12211 | .word 0xaf800011 ! 465: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12212 | .word 0xa2818013 ! 466: ADDcc_R addcc %r6, %r19, %r17 |
| 12213 | .word 0xd28008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 |
| 12214 | memptr_20_351: |
| 12215 | set user_data_start, %r31 |
| 12216 | .word 0x8581a839 ! 468: WRCCR_I wr %r6, 0x0839, %ccr |
| 12217 | .word 0xd27fe1f0 ! 469: SWAP_I swap %r9, [%r31 + 0x01f0] |
| 12218 | .word 0xc3efc032 ! 1: PREFETCHA_R prefetcha [%r31, %r18] 0x01, #one_read |
| 12219 | .word 0x9f802861 ! 470: SIR sir 0x0861 |
| 12220 | .word 0x9191400b ! 471: WRPR_PIL_R wrpr %r5, %r11, %pil |
| 12221 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 12222 | jmptr_20_353: |
| 12223 | nop |
| 12224 | best_set_reg(0xe0a00000, %r20, %r27) |
| 12225 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 12226 | .word 0xc3ecc030 ! 474: PREFETCHA_R prefetcha [%r19, %r16] 0x01, #one_read |
| 12227 | unsupttte_20_355: |
| 12228 | nop |
| 12229 | ta T_CHANGE_HPRIV |
| 12230 | mov 1, %r20 |
| 12231 | sllx %r20, 63, %r20 |
| 12232 | or %r20, 2,%r20 |
| 12233 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 12234 | ta T_CHANGE_NONHPRIV |
| 12235 | .word 0x9ba489c8 ! 475: FDIVd fdivd %f18, %f8, %f44 |
| 12236 | #if (defined SPC || defined CMP) |
| 12237 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_356)+24, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 12238 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_356)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x20),1,3) |
| 12239 | #else |
| 12240 | !! TODO:Generate XIR via RESET_GEN register |
| 12241 | ! setx 0x8900000808, %r16, %r17 |
| 12242 | ! mov 0x2, %r16 |
| 12243 | ! stw %r16, [%r17] |
| 12244 | #endif |
| 12245 | xir_20_356: |
| 12246 | .word 0xa9832e60 ! 476: WR_SET_SOFTINT_I wr %r12, 0x0e60, %set_softint |
| 12247 | trapasi_20_357: |
| 12248 | nop |
| 12249 | mov 0x20, %r1 ! (VA for ASI 0x4c) |
| 12250 | .word 0xd8904980 ! 477: LDUHA_R lduha [%r1, %r0] 0x4c, %r12 |
| 12251 | .word 0xc19fe080 ! 478: LDDFA_I ldda [%r31, 0x0080], %f0 |
| 12252 | donret_20_358: |
| 12253 | nop |
| 12254 | ta T_CHANGE_HPRIV ! macro |
| 12255 | rd %pc, %r12 |
| 12256 | add %r12, (donretarg_20_358-donret_20_358-8), %r12 |
| 12257 | mov 0x38, %r18 |
| 12258 | stxa %r12, [%r18]0x58 |
| 12259 | add %r12, 0x4, %r11 |
| 12260 | wrpr %g0, 0x2, %tl |
| 12261 | wrpr %g0, %r12, %tpc |
| 12262 | wrpr %g0, %r11, %tnpc |
| 12263 | set (0x00d4f573 | (0x80 << 24)), %r13 |
| 12264 | rdpr %tstate, %r16 |
| 12265 | mov 0x1f, %r19 |
| 12266 | and %r19, %r16, %r17 |
| 12267 | andn %r16, %r19, %r16 |
| 12268 | or %r16, %r17, %r20 |
| 12269 | wrpr %r20, %g0, %tstate |
| 12270 | wrhpr %g0, 0x4cd, %htstate |
| 12271 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 12272 | retry |
| 12273 | donretarg_20_358: |
| 12274 | .word 0xd8ffe0cc ! 479: SWAPA_I swapa %r12, [%r31 + 0x00cc] %asi |
| 12275 | invtsb_20_359: |
| 12276 | nop |
| 12277 | ta T_CHANGE_HPRIV |
| 12278 | rd %asi, %r21 |
| 12279 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 12280 | mov 1, %r20 |
| 12281 | sllx %r20, 63, %r20 |
| 12282 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 12283 | xor %r22 ,%r20, %r22 |
| 12284 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 12285 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 12286 | xor %r22 ,%r20, %r22 |
| 12287 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 12288 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 12289 | xor %r22 ,%r20, %r22 |
| 12290 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 12291 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 12292 | xor %r22 ,%r20, %r22 |
| 12293 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 12294 | wr %r21, %r0, %asi |
| 12295 | ta T_CHANGE_NONHPRIV |
| 12296 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 12297 | mondo_20_360: |
| 12298 | nop |
| 12299 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12300 | stxa %r3, [%r0+0x3d0] %asi |
| 12301 | .word 0x9d940010 ! 481: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 12302 | .word 0xc19fdb60 ! 482: LDDFA_R ldda [%r31, %r0], %f0 |
| 12303 | br_badelay1_20_361: |
| 12304 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 12305 | .word 0xd937c014 ! 1: STQF_R - %f12, [%r20, %r31] |
| 12306 | .word 0x87afca54 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f20 |
| 12307 | normalw |
| 12308 | .word 0xa1458000 ! 483: RD_SOFTINT_REG rd %softint, %r16 |
| 12309 | .word 0xdbe7c032 ! 1: CASA_I casa [%r31] 0x 1, %r18, %r13 |
| 12310 | .word 0x9f8021a3 ! 484: SIR sir 0x01a3 |
| 12311 | .word 0xdb27e0e0 ! 485: STF_I st %f13, [0x00e0, %r31] |
| 12312 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 12313 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 12314 | pmu_20_362: |
| 12315 | nop |
| 12316 | setx 0xfffff871fffff968, %g1, %g7 |
| 12317 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12318 | .word 0x8d9034d1 ! 489: WRPR_PSTATE_I wrpr %r0, 0x14d1, %pstate |
| 12319 | fbug,a,pn %fcc0, skip_20_364 |
| 12320 | .word 0x87ac0a42 ! 1: FCMPd fcmpd %fcc<n>, %f16, %f2 |
| 12321 | .align 32 |
| 12322 | skip_20_364: |
| 12323 | .word 0xc30fc000 ! 490: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 12324 | donret_20_365: |
| 12325 | nop |
| 12326 | ta T_CHANGE_HPRIV ! macro |
| 12327 | rd %pc, %r12 |
| 12328 | add %r12, (donretarg_20_365-donret_20_365-4), %r12 |
| 12329 | mov 0x38, %r18 |
| 12330 | stxa %r12, [%r18]0x58 |
| 12331 | add %r12, 0x4, %r11 |
| 12332 | wrpr %g0, 0x2, %tl |
| 12333 | wrpr %g0, %r12, %tpc |
| 12334 | wrpr %g0, %r11, %tnpc |
| 12335 | set (0x0034a198 | (0x89 << 24)), %r13 |
| 12336 | rdpr %tstate, %r16 |
| 12337 | mov 0x1f, %r19 |
| 12338 | and %r19, %r16, %r17 |
| 12339 | andn %r16, %r19, %r16 |
| 12340 | or %r16, %r17, %r20 |
| 12341 | wrpr %r20, %g0, %tstate |
| 12342 | wrhpr %g0, 0x517, %htstate |
| 12343 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 12344 | done |
| 12345 | donretarg_20_365: |
| 12346 | .word 0xdaffe13c ! 491: SWAPA_I swapa %r13, [%r31 + 0x013c] %asi |
| 12347 | .word 0xdb27e0f4 ! 492: STF_I st %f13, [0x00f4, %r31] |
| 12348 | .word 0xdaffc02b ! 493: SWAPA_R swapa %r13, [%r31 + %r11] 0x01 |
| 12349 | splash_cmpr_20_366: |
| 12350 | mov 0, %r18 |
| 12351 | sllx %r18, 63, %r18 |
| 12352 | rd %tick, %r17 |
| 12353 | add %r17, 0x60, %r17 |
| 12354 | or %r17, %r18, %r17 |
| 12355 | ta T_CHANGE_PRIV |
| 12356 | .word 0xb3800011 ! 494: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12357 | nop |
| 12358 | mov 0x80, %g3 |
| 12359 | stxa %g3, [%g3] 0x57 |
| 12360 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 12361 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 12362 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 12363 | .word 0x9bb7c7cd ! 1: PDIST pdistn %d62, %d44, %d44 |
| 12364 | .word 0x9f80249a ! 496: SIR sir 0x049a |
| 12365 | pmu_20_367: |
| 12366 | nop |
| 12367 | ta T_CHANGE_PRIV |
| 12368 | setx 0xfffffc31fffff36b, %g1, %g7 |
| 12369 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12370 | nop |
| 12371 | ta T_CHANGE_HPRIV |
| 12372 | mov 0x20+1, %r10 |
| 12373 | set sync_thr_counter5, %r23 |
| 12374 | #ifndef SPC |
| 12375 | ldxa [%g0]0x63, %o1 |
| 12376 | and %o1, 0x38, %o1 |
| 12377 | add %o1, %r23, %r23 |
| 12378 | sllx %o1, 5, %o3 !(CID*256) |
| 12379 | #endif |
| 12380 | cas [%r23],%g0,%r10 !lock |
| 12381 | brnz %r10, cwq_20_368 |
| 12382 | rd %asi, %r12 |
| 12383 | wr %g0, 0x40, %asi |
| 12384 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12385 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12386 | cmp %l1, 1 |
| 12387 | bne cwq_20_368 |
| 12388 | set CWQ_BASE, %l6 |
| 12389 | #ifndef SPC |
| 12390 | add %l6, %o3, %l6 |
| 12391 | #endif |
| 12392 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12393 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 12394 | sllx %l2, 32, %l2 |
| 12395 | stx %l2, [%l6 + 0x0] |
| 12396 | membar #Sync |
| 12397 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12398 | sub %l2, 0x40, %l2 |
| 12399 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12400 | wr %r12, %g0, %asi |
| 12401 | st %g0, [%r23] |
| 12402 | cwq_20_368: |
| 12403 | ta T_CHANGE_NONHPRIV |
| 12404 | .word 0x9b414000 ! 498: RDPC rd %pc, %r13 |
| 12405 | change_to_randtl_20_369: |
| 12406 | ta T_CHANGE_HPRIV ! macro |
| 12407 | done_change_to_randtl_20_369: |
| 12408 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 12409 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 12410 | mondo_20_370: |
| 12411 | nop |
| 12412 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12413 | stxa %r19, [%r0+0x3c0] %asi |
| 12414 | .word 0x9d90c00d ! 501: WRPR_WSTATE_R wrpr %r3, %r13, %wstate |
| 12415 | nop |
| 12416 | nop |
| 12417 | ta T_CHANGE_PRIV |
| 12418 | wrpr %g0, %g0, %gl |
| 12419 | nop |
| 12420 | nop |
| 12421 | setx join_lbl_0_0, %g1, %g2 |
| 12422 | jmp %g2 |
| 12423 | nop |
| 12424 | fork_lbl_0_5: |
| 12425 | ta T_CHANGE_NONHPRIV |
| 12426 | br_longdelay1_10_0: |
| 12427 | .word 0x2ecb0001 ! 1: BRGEZ brgez,a,pt %r12,<label_0xb0001> |
| 12428 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 12429 | .word 0xc36fe134 ! 2: PREFETCH_I prefetch [%r31 + 0x0134], #one_read |
| 12430 | nop |
| 12431 | ta T_CHANGE_HPRIV |
| 12432 | mov 0x10, %r10 |
| 12433 | set sync_thr_counter6, %r23 |
| 12434 | #ifndef SPC |
| 12435 | ldxa [%g0]0x63, %o1 |
| 12436 | and %o1, 0x38, %o1 |
| 12437 | add %o1, %r23, %r23 |
| 12438 | #endif |
| 12439 | cas [%r23],%g0,%r10 !lock |
| 12440 | brnz %r10, sma_10_2 |
| 12441 | rd %asi, %r12 |
| 12442 | wr %g0, 0x40, %asi |
| 12443 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12444 | set 0x00021fff, %g1 |
| 12445 | stxa %g1, [%g0 + 0x80] %asi |
| 12446 | wr %r12, %g0, %asi |
| 12447 | st %g0, [%r23] |
| 12448 | sma_10_2: |
| 12449 | ta T_CHANGE_NONHPRIV |
| 12450 | .word 0xe7e7e011 ! 3: CASA_R casa [%r31] %asi, %r17, %r19 |
| 12451 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 12452 | reduce_priv_lvl_10_3: |
| 12453 | ta T_CHANGE_NONHPRIV ! macro |
| 12454 | .word 0xa782c011 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r11, %r17, %- |
| 12455 | .word 0x87ab0ac5 ! 6: FCMPEd fcmped %fcc<n>, %f12, %f36 |
| 12456 | setx vahole_target1, %r18, %r27 |
| 12457 | .word 0xe6bfc034 ! 7: STDA_R stda %r19, [%r31 + %r20] 0x01 |
| 12458 | memptr_10_6: |
| 12459 | set user_data_start, %r31 |
| 12460 | .word 0x8582b46a ! 8: WRCCR_I wr %r10, 0x146a, %ccr |
| 12461 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 12462 | ceter_10_7: |
| 12463 | nop |
| 12464 | ta T_CHANGE_HPRIV |
| 12465 | mov 7, %r17 |
| 12466 | sllx %r17, 60, %r17 |
| 12467 | mov 0x18, %r16 |
| 12468 | stxa %r17, [%r16]0x4c |
| 12469 | .word 0xa9410000 ! 10: RDTICK rd %tick, %r20 |
| 12470 | splash_lsu_10_8: |
| 12471 | nop |
| 12472 | ta T_CHANGE_HPRIV |
| 12473 | set 0x10b1cc51, %r2 |
| 12474 | mov 0x5, %r1 |
| 12475 | sllx %r1, 32, %r1 |
| 12476 | or %r1, %r2, %r2 |
| 12477 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12478 | ta T_CHANGE_NONHPRIV |
| 12479 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12480 | brcommon1_10_9: |
| 12481 | nop |
| 12482 | setx common_target, %r12, %r27 |
| 12483 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12484 | ba,a .+12 |
| 12485 | .word 0xd06fe000 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0000] |
| 12486 | ba,a .+8 |
| 12487 | jmpl %r27+0, %r27 |
| 12488 | .word 0x95a449d3 ! 12: FDIVd fdivd %f48, %f50, %f10 |
| 12489 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 12490 | pmu_10_10: |
| 12491 | nop |
| 12492 | setx 0xfffffd80fffffb3e, %g1, %g7 |
| 12493 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12494 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 12495 | pmu_10_11: |
| 12496 | nop |
| 12497 | ta T_CHANGE_PRIV |
| 12498 | setx 0xfffffc40fffffba9, %g1, %g7 |
| 12499 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12500 | ibp_10_12: |
| 12501 | nop |
| 12502 | .word 0xc19fde00 ! 17: LDDFA_R ldda [%r31, %r0], %f0 |
| 12503 | ibp_10_13: |
| 12504 | nop |
| 12505 | .word 0xe1bfdf20 ! 18: STDFA_R stda %f16, [%r0, %r31] |
| 12506 | .word 0xd65fe198 ! 19: LDX_I ldx [%r31 + 0x0198], %r11 |
| 12507 | .word 0xd727e1ce ! 20: STF_I st %f11, [0x01ce, %r31] |
| 12508 | .word 0x81580000 ! 21: FLUSHW flushw |
| 12509 | #if (defined SPC || defined CMP) |
| 12510 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_14) + 48, 16, 16)) -> intp(5,0,20) |
| 12511 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_14)&0xffffffff) + 48, 16, 16)) -> intp(5,0,20) |
| 12512 | #else |
| 12513 | setx 0xcb2245389f2771a0, %r1, %r28 |
| 12514 | stxa %r28, [%g0] 0x73 |
| 12515 | #endif |
| 12516 | intvec_10_14: |
| 12517 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12518 | donret_10_15: |
| 12519 | nop |
| 12520 | ta T_CHANGE_HPRIV ! macro |
| 12521 | rd %pc, %r12 |
| 12522 | add %r12, (donretarg_10_15-donret_10_15-4), %r12 |
| 12523 | mov 0x38, %r18 |
| 12524 | stxa %r12, [%r18]0x58 |
| 12525 | add %r12, 0x4, %r11 |
| 12526 | wrpr %g0, 0x1, %tl |
| 12527 | wrpr %g0, %r12, %tpc |
| 12528 | wrpr %g0, %r11, %tnpc |
| 12529 | set (0x0096ed84 | (0x4f << 24)), %r13 |
| 12530 | rdpr %tstate, %r16 |
| 12531 | mov 0x1f, %r19 |
| 12532 | and %r19, %r16, %r17 |
| 12533 | andn %r16, %r19, %r16 |
| 12534 | or %r16, %r17, %r20 |
| 12535 | wrpr %r20, %g0, %tstate |
| 12536 | wrhpr %g0, 0x513, %htstate |
| 12537 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 12538 | done |
| 12539 | donretarg_10_15: |
| 12540 | .word 0xd6ffe17b ! 23: SWAPA_I swapa %r11, [%r31 + 0x017b] %asi |
| 12541 | set 0x10b, %l3 |
| 12542 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 12543 | .word 0x9bb507c4 ! 24: PDIST pdistn %d20, %d4, %d44 |
| 12544 | .word 0xe1bfc3e0 ! 25: STDFA_R stda %f16, [%r0, %r31] |
| 12545 | pmu_10_16: |
| 12546 | nop |
| 12547 | ta T_CHANGE_PRIV |
| 12548 | setx 0xfffffe4dfffff999, %g1, %g7 |
| 12549 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12550 | setx vahole_target1, %r18, %r27 |
| 12551 | .word 0xd03fe120 ! 27: STD_I std %r8, [%r31 + 0x0120] |
| 12552 | #if (defined SPC || defined CMP) |
| 12553 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_18)+0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12554 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_18)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12555 | #else |
| 12556 | !! TODO:Generate XIR via RESET_GEN register |
| 12557 | ! setx 0x8900000808, %r16, %r17 |
| 12558 | ! mov 0x2, %r16 |
| 12559 | ! stw %r16, [%r17] |
| 12560 | #endif |
| 12561 | xir_10_18: |
| 12562 | .word 0xa98173e8 ! 28: WR_SET_SOFTINT_I wr %r5, 0x13e8, %set_softint |
| 12563 | .word 0xa5a0016a ! 29: FABSq dis not found |
| 12564 | |
| 12565 | donret_10_20: |
| 12566 | nop |
| 12567 | ta T_CHANGE_HPRIV ! macro |
| 12568 | rd %pc, %r12 |
| 12569 | add %r12, (donretarg_10_20-donret_10_20-8), %r12 |
| 12570 | mov 0x38, %r18 |
| 12571 | stxa %r12, [%r18]0x58 |
| 12572 | add %r12, 0x4, %r11 |
| 12573 | wrpr %g0, 0x2, %tl |
| 12574 | wrpr %g0, %r12, %tpc |
| 12575 | wrpr %g0, %r11, %tnpc |
| 12576 | set (0x00729101 | (4 << 24)), %r13 |
| 12577 | rdpr %tstate, %r16 |
| 12578 | mov 0x1f, %r19 |
| 12579 | and %r19, %r16, %r17 |
| 12580 | andn %r16, %r19, %r16 |
| 12581 | or %r16, %r17, %r20 |
| 12582 | wrpr %r20, %g0, %tstate |
| 12583 | wrhpr %g0, 0xf98, %htstate |
| 12584 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 12585 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 12586 | retry |
| 12587 | donretarg_10_20: |
| 12588 | .word 0xe2ffe0cc ! 30: SWAPA_I swapa %r17, [%r31 + 0x00cc] %asi |
| 12589 | .word 0xa781800c ! 31: WR_GRAPHICS_STATUS_REG_R wr %r6, %r12, %- |
| 12590 | #if (defined SPC || defined CMP) |
| 12591 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_22) + 32, 16, 16)) -> intp(6,0,22) |
| 12592 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_22)&0xffffffff) + 32, 16, 16)) -> intp(6,0,22) |
| 12593 | #else |
| 12594 | setx 0x780da242da59efda, %r1, %r28 |
| 12595 | stxa %r28, [%g0] 0x73 |
| 12596 | #endif |
| 12597 | intvec_10_22: |
| 12598 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12599 | memptr_10_23: |
| 12600 | set 0x60340000, %r31 |
| 12601 | .word 0x8582b274 ! 33: WRCCR_I wr %r10, 0x1274, %ccr |
| 12602 | .word 0xc3e8c032 ! 34: PREFETCHA_R prefetcha [%r3, %r18] 0x01, #one_read |
| 12603 | brcommon3_10_25: |
| 12604 | nop |
| 12605 | setx common_target, %r12, %r27 |
| 12606 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12607 | ba,a .+12 |
| 12608 | .word 0xd3e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r9 |
| 12609 | ba,a .+8 |
| 12610 | jmpl %r27+0, %r27 |
| 12611 | .word 0xc32fc011 ! 35: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 12612 | jmptr_10_26: |
| 12613 | nop |
| 12614 | best_set_reg(0xe0200000, %r20, %r27) |
| 12615 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 12616 | splash_cmpr_10_27: |
| 12617 | mov 0, %r18 |
| 12618 | sllx %r18, 63, %r18 |
| 12619 | rd %tick, %r17 |
| 12620 | add %r17, 0x100, %r17 |
| 12621 | or %r17, %r18, %r17 |
| 12622 | ta T_CHANGE_PRIV |
| 12623 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12624 | splash_cmpr_10_28: |
| 12625 | mov 0, %r18 |
| 12626 | sllx %r18, 63, %r18 |
| 12627 | rd %tick, %r17 |
| 12628 | add %r17, 0x50, %r17 |
| 12629 | or %r17, %r18, %r17 |
| 12630 | ta T_CHANGE_PRIV |
| 12631 | .word 0xb3800011 ! 38: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12632 | mondo_10_29: |
| 12633 | nop |
| 12634 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12635 | ta T_CHANGE_PRIV |
| 12636 | stxa %r5, [%r0+0x3e0] %asi |
| 12637 | .word 0x9d948011 ! 39: WRPR_WSTATE_R wrpr %r18, %r17, %wstate |
| 12638 | brcommon3_10_30: |
| 12639 | nop |
| 12640 | setx common_target, %r12, %r27 |
| 12641 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12642 | ba,a .+12 |
| 12643 | .word 0xd26fe040 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0040] |
| 12644 | ba,a .+8 |
| 12645 | jmpl %r27+0, %r27 |
| 12646 | .word 0xc32fc008 ! 40: STXFSR_R st-sfr %f1, [%r8, %r31] |
| 12647 | .word 0xd2dfe0f8 ! 41: LDXA_I ldxa [%r31, + 0x00f8] %asi, %r9 |
| 12648 | .word 0xd327e085 ! 42: STF_I st %f9, [0x0085, %r31] |
| 12649 | setx 0xcfd835b6afb2cbbe, %r1, %r28 |
| 12650 | stxa %r28, [%g0] 0x73 |
| 12651 | intvec_10_31: |
| 12652 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12653 | mondo_10_32: |
| 12654 | nop |
| 12655 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12656 | stxa %r16, [%r0+0x3d8] %asi |
| 12657 | .word 0x9d91c009 ! 44: WRPR_WSTATE_R wrpr %r7, %r9, %wstate |
| 12658 | ceter_10_33: |
| 12659 | nop |
| 12660 | ta T_CHANGE_HPRIV |
| 12661 | mov 7, %r17 |
| 12662 | sllx %r17, 60, %r17 |
| 12663 | mov 0x18, %r16 |
| 12664 | stxa %r17, [%r16]0x4c |
| 12665 | ta T_CHANGE_NONHPRIV |
| 12666 | .word 0xa7410000 ! 45: RDTICK rd %tick, %r19 |
| 12667 | .word 0x91948013 ! 46: WRPR_PIL_R wrpr %r18, %r19, %pil |
| 12668 | splash_tba_10_35: |
| 12669 | ta T_CHANGE_PRIV |
| 12670 | setx 0x0000000000380000, %r11, %r12 |
| 12671 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12672 | mondo_10_36: |
| 12673 | nop |
| 12674 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12675 | ta T_CHANGE_PRIV |
| 12676 | stxa %r19, [%r0+0x3c8] %asi |
| 12677 | .word 0x9d914012 ! 48: WRPR_WSTATE_R wrpr %r5, %r18, %wstate |
| 12678 | .word 0x9f8022d3 ! 49: SIR sir 0x02d3 |
| 12679 | br_longdelay2_10_37: |
| 12680 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 12681 | .word 0xa3a7c9d4 ! 50: FDIVd fdivd %f62, %f20, %f48 |
| 12682 | splash_cmpr_10_38: |
| 12683 | mov 0, %r18 |
| 12684 | sllx %r18, 63, %r18 |
| 12685 | rd %tick, %r17 |
| 12686 | add %r17, 0x80, %r17 |
| 12687 | or %r17, %r18, %r17 |
| 12688 | ta T_CHANGE_PRIV |
| 12689 | .word 0xb3800011 ! 51: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12690 | nop |
| 12691 | ta T_CHANGE_HPRIV |
| 12692 | mov 0x10, %r10 |
| 12693 | set sync_thr_counter6, %r23 |
| 12694 | #ifndef SPC |
| 12695 | ldxa [%g0]0x63, %o1 |
| 12696 | and %o1, 0x38, %o1 |
| 12697 | add %o1, %r23, %r23 |
| 12698 | #endif |
| 12699 | cas [%r23],%g0,%r10 !lock |
| 12700 | brnz %r10, sma_10_39 |
| 12701 | rd %asi, %r12 |
| 12702 | wr %g0, 0x40, %asi |
| 12703 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12704 | set 0x001a1fff, %g1 |
| 12705 | stxa %g1, [%g0 + 0x80] %asi |
| 12706 | wr %r12, %g0, %asi |
| 12707 | st %g0, [%r23] |
| 12708 | sma_10_39: |
| 12709 | ta T_CHANGE_NONHPRIV |
| 12710 | .word 0xe3e7e00d ! 52: CASA_R casa [%r31] %asi, %r13, %r17 |
| 12711 | #if (defined SPC || defined CMP) |
| 12712 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_40)+48, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12713 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_40)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12714 | #else |
| 12715 | !! TODO:Generate XIR via RESET_GEN register |
| 12716 | ! setx 0x8900000808, %r16, %r17 |
| 12717 | ! mov 0x2, %r16 |
| 12718 | ! stw %r16, [%r17] |
| 12719 | #endif |
| 12720 | xir_10_40: |
| 12721 | .word 0xa9832864 ! 53: WR_SET_SOFTINT_I wr %r12, 0x0864, %set_softint |
| 12722 | jmptr_10_41: |
| 12723 | nop |
| 12724 | best_set_reg(0xe0200000, %r20, %r27) |
| 12725 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 12726 | donret_10_42: |
| 12727 | nop |
| 12728 | ta T_CHANGE_HPRIV ! macro |
| 12729 | rd %pc, %r12 |
| 12730 | add %r12, (donretarg_10_42-donret_10_42-8), %r12 |
| 12731 | mov 0x38, %r18 |
| 12732 | stxa %r12, [%r18]0x58 |
| 12733 | add %r12, 0x4, %r11 |
| 12734 | wrpr %g0, 0x1, %tl |
| 12735 | wrpr %g0, %r12, %tpc |
| 12736 | wrpr %g0, %r11, %tnpc |
| 12737 | set (0x00970562 | (0x8b << 24)), %r13 |
| 12738 | rdpr %tstate, %r16 |
| 12739 | mov 0x1f, %r19 |
| 12740 | and %r19, %r16, %r17 |
| 12741 | andn %r16, %r19, %r16 |
| 12742 | or %r16, %r17, %r20 |
| 12743 | wrpr %r20, %g0, %tstate |
| 12744 | wrhpr %g0, 0xe11, %htstate |
| 12745 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 12746 | retry |
| 12747 | donretarg_10_42: |
| 12748 | .word 0xe26fe0a5 ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x00a5] |
| 12749 | nop |
| 12750 | ta T_CHANGE_HPRIV |
| 12751 | mov 0x10+1, %r10 |
| 12752 | set sync_thr_counter5, %r23 |
| 12753 | #ifndef SPC |
| 12754 | ldxa [%g0]0x63, %o1 |
| 12755 | and %o1, 0x38, %o1 |
| 12756 | add %o1, %r23, %r23 |
| 12757 | sllx %o1, 5, %o3 !(CID*256) |
| 12758 | #endif |
| 12759 | cas [%r23],%g0,%r10 !lock |
| 12760 | brnz %r10, cwq_10_43 |
| 12761 | rd %asi, %r12 |
| 12762 | wr %g0, 0x40, %asi |
| 12763 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12764 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12765 | cmp %l1, 1 |
| 12766 | bne cwq_10_43 |
| 12767 | set CWQ_BASE, %l6 |
| 12768 | #ifndef SPC |
| 12769 | add %l6, %o3, %l6 |
| 12770 | #endif |
| 12771 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12772 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 12773 | sllx %l2, 32, %l2 |
| 12774 | stx %l2, [%l6 + 0x0] |
| 12775 | membar #Sync |
| 12776 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12777 | sub %l2, 0x40, %l2 |
| 12778 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12779 | wr %r12, %g0, %asi |
| 12780 | st %g0, [%r23] |
| 12781 | cwq_10_43: |
| 12782 | ta T_CHANGE_NONHPRIV |
| 12783 | .word 0xa9414000 ! 56: RDPC rd %pc, %r20 |
| 12784 | splash_hpstate_10_44: |
| 12785 | .word 0x8198218d ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x018d, %hpstate |
| 12786 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 12787 | .word 0x8d903c8d ! 58: WRPR_PSTATE_I wrpr %r0, 0x1c8d, %pstate |
| 12788 | mondo_10_46: |
| 12789 | nop |
| 12790 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12791 | ta T_CHANGE_PRIV |
| 12792 | stxa %r20, [%r0+0x3e0] %asi |
| 12793 | .word 0x9d940012 ! 59: WRPR_WSTATE_R wrpr %r16, %r18, %wstate |
| 12794 | mondo_10_47: |
| 12795 | nop |
| 12796 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12797 | ta T_CHANGE_PRIV |
| 12798 | stxa %r17, [%r0+0x3e8] %asi |
| 12799 | .word 0x9d908005 ! 60: WRPR_WSTATE_R wrpr %r2, %r5, %wstate |
| 12800 | splash_hpstate_10_48: |
| 12801 | ta T_CHANGE_NONHPRIV |
| 12802 | .word 0x819830c7 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x10c7, %hpstate |
| 12803 | .word 0xd31fe090 ! 62: LDDF_I ldd [%r31, 0x0090], %f9 |
| 12804 | setx vahole_target2, %r18, %r27 |
| 12805 | .word 0xc1bfe1e0 ! 63: STDFA_I stda %f0, [0x01e0, %r31] |
| 12806 | brcommon1_10_50: |
| 12807 | nop |
| 12808 | setx common_target, %r12, %r27 |
| 12809 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12810 | ba,a .+12 |
| 12811 | .word 0xd3e7c034 ! 1: CASA_I casa [%r31] 0x 1, %r20, %r9 |
| 12812 | ba,a .+8 |
| 12813 | jmpl %r27+0, %r27 |
| 12814 | .word 0x9f803d97 ! 64: SIR sir 0x1d97 |
| 12815 | splash_hpstate_10_51: |
| 12816 | ta T_CHANGE_NONHPRIV |
| 12817 | .word 0x81983a17 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x1a17, %hpstate |
| 12818 | .word 0x8d90362a ! 66: WRPR_PSTATE_I wrpr %r0, 0x162a, %pstate |
| 12819 | .word 0xe19fde00 ! 67: LDDFA_R ldda [%r31, %r0], %f16 |
| 12820 | br_badelay1_10_54: |
| 12821 | .word 0x2ec84001 ! 1: BRGEZ brgez,a,pt %r1,<label_0x84001> |
| 12822 | .word 0xd337e160 ! 1: STQF_I - %f9, [0x0160, %r31] |
| 12823 | .word 0x87afca51 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f48 |
| 12824 | normalw |
| 12825 | .word 0xa3458000 ! 68: RD_SOFTINT_REG rd %softint, %r17 |
| 12826 | .word 0xd82fe10f ! 69: STB_I stb %r12, [%r31 + 0x010f] |
| 12827 | donret_10_55: |
| 12828 | nop |
| 12829 | ta T_CHANGE_HPRIV ! macro |
| 12830 | rd %pc, %r12 |
| 12831 | add %r12, (donretarg_10_55-donret_10_55-4), %r12 |
| 12832 | mov 0x38, %r18 |
| 12833 | stxa %r12, [%r18]0x58 |
| 12834 | add %r12, 0x4, %r11 |
| 12835 | wrpr %g0, 0x1, %tl |
| 12836 | wrpr %g0, %r12, %tpc |
| 12837 | wrpr %g0, %r11, %tnpc |
| 12838 | set (0x0050867c | (32 << 24)), %r13 |
| 12839 | rdpr %tstate, %r16 |
| 12840 | mov 0x1f, %r19 |
| 12841 | and %r19, %r16, %r17 |
| 12842 | andn %r16, %r19, %r16 |
| 12843 | or %r16, %r17, %r20 |
| 12844 | wrpr %r20, %g0, %tstate |
| 12845 | wrhpr %g0, 0x1b01, %htstate |
| 12846 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 12847 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 12848 | done |
| 12849 | donretarg_10_55: |
| 12850 | .word 0x9ba089cd ! 70: FDIVd fdivd %f2, %f44, %f44 |
| 12851 | nop |
| 12852 | ta T_CHANGE_HPRIV |
| 12853 | mov 0x10, %r10 |
| 12854 | set sync_thr_counter6, %r23 |
| 12855 | #ifndef SPC |
| 12856 | ldxa [%g0]0x63, %o1 |
| 12857 | and %o1, 0x38, %o1 |
| 12858 | add %o1, %r23, %r23 |
| 12859 | #endif |
| 12860 | cas [%r23],%g0,%r10 !lock |
| 12861 | brnz %r10, sma_10_56 |
| 12862 | rd %asi, %r12 |
| 12863 | wr %g0, 0x40, %asi |
| 12864 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12865 | set 0x00021fff, %g1 |
| 12866 | stxa %g1, [%g0 + 0x80] %asi |
| 12867 | wr %r12, %g0, %asi |
| 12868 | st %g0, [%r23] |
| 12869 | sma_10_56: |
| 12870 | ta T_CHANGE_NONHPRIV |
| 12871 | .word 0xe7e7e00d ! 71: CASA_R casa [%r31] %asi, %r13, %r19 |
| 12872 | .word 0xe19fe140 ! 72: LDDFA_I ldda [%r31, 0x0140], %f16 |
| 12873 | mondo_10_57: |
| 12874 | nop |
| 12875 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12876 | stxa %r18, [%r0+0x3d8] %asi |
| 12877 | .word 0x9d94c00a ! 73: WRPR_WSTATE_R wrpr %r19, %r10, %wstate |
| 12878 | nop |
| 12879 | mov 0x80, %g3 |
| 12880 | stxa %g3, [%g3] 0x57 |
| 12881 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 12882 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 12883 | nop |
| 12884 | ta T_CHANGE_HPRIV |
| 12885 | mov 0x10, %r10 |
| 12886 | set sync_thr_counter6, %r23 |
| 12887 | #ifndef SPC |
| 12888 | ldxa [%g0]0x63, %o1 |
| 12889 | and %o1, 0x38, %o1 |
| 12890 | add %o1, %r23, %r23 |
| 12891 | #endif |
| 12892 | cas [%r23],%g0,%r10 !lock |
| 12893 | brnz %r10, sma_10_58 |
| 12894 | rd %asi, %r12 |
| 12895 | wr %g0, 0x40, %asi |
| 12896 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12897 | set 0x00061fff, %g1 |
| 12898 | stxa %g1, [%g0 + 0x80] %asi |
| 12899 | wr %r12, %g0, %asi |
| 12900 | st %g0, [%r23] |
| 12901 | sma_10_58: |
| 12902 | ta T_CHANGE_NONHPRIV |
| 12903 | .word 0xe7e7e00b ! 76: CASA_R casa [%r31] %asi, %r11, %r19 |
| 12904 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 12905 | nop |
| 12906 | mov 0x80, %g3 |
| 12907 | stxa %g3, [%g3] 0x5f |
| 12908 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 12909 | .word 0x9153c000 ! 79: RDPR_FQ <illegal instruction> |
| 12910 | donret_10_59: |
| 12911 | nop |
| 12912 | ta T_CHANGE_HPRIV ! macro |
| 12913 | rd %pc, %r12 |
| 12914 | add %r12, (donretarg_10_59-donret_10_59-4), %r12 |
| 12915 | mov 0x38, %r18 |
| 12916 | stxa %r12, [%r18]0x58 |
| 12917 | add %r12, 0x4, %r11 |
| 12918 | wrpr %g0, 0x1, %tl |
| 12919 | wrpr %g0, %r12, %tpc |
| 12920 | wrpr %g0, %r11, %tnpc |
| 12921 | set (0x00516fb9 | (28 << 24)), %r13 |
| 12922 | rdpr %tstate, %r16 |
| 12923 | mov 0x1f, %r19 |
| 12924 | and %r19, %r16, %r17 |
| 12925 | andn %r16, %r19, %r16 |
| 12926 | or %r16, %r17, %r20 |
| 12927 | wrpr %r20, %g0, %tstate |
| 12928 | wrhpr %g0, 0x1545, %htstate |
| 12929 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 12930 | done |
| 12931 | donretarg_10_59: |
| 12932 | .word 0x9ba409d3 ! 80: FDIVd fdivd %f16, %f50, %f44 |
| 12933 | .word 0xda8fe090 ! 81: LDUBA_I lduba [%r31, + 0x0090] %asi, %r13 |
| 12934 | .word 0xe19fdf20 ! 82: LDDFA_R ldda [%r31, %r0], %f16 |
| 12935 | change_to_randtl_10_60: |
| 12936 | ta T_CHANGE_PRIV ! macro |
| 12937 | done_change_to_randtl_10_60: |
| 12938 | .word 0x8f902001 ! 83: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 12939 | splash_cmpr_10_61: |
| 12940 | mov 1, %r18 |
| 12941 | sllx %r18, 63, %r18 |
| 12942 | rd %tick, %r17 |
| 12943 | add %r17, 0x70, %r17 |
| 12944 | or %r17, %r18, %r17 |
| 12945 | ta T_CHANGE_PRIV |
| 12946 | .word 0xaf800011 ! 84: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12947 | jmptr_10_62: |
| 12948 | nop |
| 12949 | best_set_reg(0xe0200000, %r20, %r27) |
| 12950 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 12951 | mondo_10_63: |
| 12952 | nop |
| 12953 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12954 | ta T_CHANGE_PRIV |
| 12955 | stxa %r5, [%r0+0x3c8] %asi |
| 12956 | .word 0x9d94c003 ! 86: WRPR_WSTATE_R wrpr %r19, %r3, %wstate |
| 12957 | #if (defined SPC || defined CMP) |
| 12958 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_64)+0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12959 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_64)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 12960 | #else |
| 12961 | !! TODO:Generate XIR via RESET_GEN register |
| 12962 | ! setx 0x8900000808, %r16, %r17 |
| 12963 | ! mov 0x2, %r16 |
| 12964 | ! stw %r16, [%r17] |
| 12965 | #endif |
| 12966 | xir_10_64: |
| 12967 | .word 0xa98424f6 ! 87: WR_SET_SOFTINT_I wr %r16, 0x04f6, %set_softint |
| 12968 | .word 0xdb37e082 ! 88: STQF_I - %f13, [0x0082, %r31] |
| 12969 | mondo_10_65: |
| 12970 | nop |
| 12971 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12972 | ta T_CHANGE_PRIV |
| 12973 | stxa %r17, [%r0+0x3d0] %asi |
| 12974 | .word 0x9d948014 ! 89: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 12975 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 12976 | memptr_10_66: |
| 12977 | set user_data_start, %r31 |
| 12978 | .word 0x8584e9f5 ! 91: WRCCR_I wr %r19, 0x09f5, %ccr |
| 12979 | jmptr_10_67: |
| 12980 | nop |
| 12981 | best_set_reg(0xe0200000, %r20, %r27) |
| 12982 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 12983 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 12984 | reduce_priv_lvl_10_68: |
| 12985 | ta T_CHANGE_NONPRIV ! macro |
| 12986 | otherw |
| 12987 | mov 0x34, %r30 |
| 12988 | .word 0x93d0001e ! 94: Tcc_R tne icc_or_xcc, %r0 + %r30 |
| 12989 | setx vahole_target0, %r18, %r27 |
| 12990 | .word 0xdb1fc00b ! 95: LDDF_R ldd [%r31, %r11], %f13 |
| 12991 | pmu_10_70: |
| 12992 | nop |
| 12993 | setx 0xfffffc55fffff347, %g1, %g7 |
| 12994 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12995 | jmptr_10_71: |
| 12996 | nop |
| 12997 | best_set_reg(0xe0200000, %r20, %r27) |
| 12998 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 12999 | splash_cmpr_10_72: |
| 13000 | mov 0, %r18 |
| 13001 | sllx %r18, 63, %r18 |
| 13002 | rd %tick, %r17 |
| 13003 | add %r17, 0x50, %r17 |
| 13004 | or %r17, %r18, %r17 |
| 13005 | ta T_CHANGE_HPRIV |
| 13006 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13007 | ta T_CHANGE_PRIV |
| 13008 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13009 | splash_hpstate_10_73: |
| 13010 | .word 0x819828de ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x08de, %hpstate |
| 13011 | donret_10_74: |
| 13012 | nop |
| 13013 | ta T_CHANGE_HPRIV ! macro |
| 13014 | rd %pc, %r12 |
| 13015 | add %r12, (donretarg_10_74-donret_10_74-8), %r12 |
| 13016 | mov 0x38, %r18 |
| 13017 | stxa %r12, [%r18]0x58 |
| 13018 | add %r12, 0x4, %r11 |
| 13019 | wrpr %g0, 0x1, %tl |
| 13020 | wrpr %g0, %r12, %tpc |
| 13021 | wrpr %g0, %r11, %tnpc |
| 13022 | set (0x0005456b | (20 << 24)), %r13 |
| 13023 | rdpr %tstate, %r16 |
| 13024 | mov 0x1f, %r19 |
| 13025 | and %r19, %r16, %r17 |
| 13026 | andn %r16, %r19, %r16 |
| 13027 | or %r16, %r17, %r20 |
| 13028 | wrpr %r20, %g0, %tstate |
| 13029 | wrhpr %g0, 0x1605, %htstate |
| 13030 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 13031 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 13032 | retry |
| 13033 | donretarg_10_74: |
| 13034 | .word 0xda6fe193 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x0193] |
| 13035 | change_to_randtl_10_75: |
| 13036 | ta T_CHANGE_HPRIV ! macro |
| 13037 | done_change_to_randtl_10_75: |
| 13038 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13039 | .word 0x9ba0c9c7 ! 102: FDIVd fdivd %f34, %f38, %f44 |
| 13040 | .word 0x8d903f7d ! 103: WRPR_PSTATE_I wrpr %r0, 0x1f7d, %pstate |
| 13041 | intveclr_10_78: |
| 13042 | nop |
| 13043 | ta T_CHANGE_HPRIV |
| 13044 | setx 0x50045632e22f1db2, %r1, %r28 |
| 13045 | stxa %r28, [%g0] 0x72 |
| 13046 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 13047 | donret_10_79: |
| 13048 | nop |
| 13049 | ta T_CHANGE_HPRIV ! macro |
| 13050 | rd %pc, %r12 |
| 13051 | add %r12, (donretarg_10_79-donret_10_79-4), %r12 |
| 13052 | mov 0x38, %r18 |
| 13053 | stxa %r12, [%r18]0x58 |
| 13054 | add %r12, 0x4, %r11 |
| 13055 | wrpr %g0, 0x1, %tl |
| 13056 | wrpr %g0, %r12, %tpc |
| 13057 | wrpr %g0, %r11, %tnpc |
| 13058 | set (0x007b56d2 | (0x8b << 24)), %r13 |
| 13059 | rdpr %tstate, %r16 |
| 13060 | mov 0x1f, %r19 |
| 13061 | and %r19, %r16, %r17 |
| 13062 | andn %r16, %r19, %r16 |
| 13063 | or %r16, %r17, %r20 |
| 13064 | wrpr %r20, %g0, %tstate |
| 13065 | wrhpr %g0, 0xddf, %htstate |
| 13066 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 13067 | done |
| 13068 | donretarg_10_79: |
| 13069 | .word 0x95a509d4 ! 105: FDIVd fdivd %f20, %f20, %f10 |
| 13070 | .word 0xe4d7e0a0 ! 106: LDSHA_I ldsha [%r31, + 0x00a0] %asi, %r18 |
| 13071 | tagged_10_80: |
| 13072 | tsubcctv %r17, 0x142d, %r17 |
| 13073 | .word 0xe407e190 ! 107: LDUW_I lduw [%r31 + 0x0190], %r18 |
| 13074 | nop |
| 13075 | ta T_CHANGE_HPRIV |
| 13076 | mov 0x10+1, %r10 |
| 13077 | set sync_thr_counter5, %r23 |
| 13078 | #ifndef SPC |
| 13079 | ldxa [%g0]0x63, %o1 |
| 13080 | and %o1, 0x38, %o1 |
| 13081 | add %o1, %r23, %r23 |
| 13082 | sllx %o1, 5, %o3 !(CID*256) |
| 13083 | #endif |
| 13084 | cas [%r23],%g0,%r10 !lock |
| 13085 | brnz %r10, cwq_10_81 |
| 13086 | rd %asi, %r12 |
| 13087 | wr %g0, 0x40, %asi |
| 13088 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13089 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13090 | cmp %l1, 1 |
| 13091 | bne cwq_10_81 |
| 13092 | set CWQ_BASE, %l6 |
| 13093 | #ifndef SPC |
| 13094 | add %l6, %o3, %l6 |
| 13095 | #endif |
| 13096 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13097 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 13098 | sllx %l2, 32, %l2 |
| 13099 | stx %l2, [%l6 + 0x0] |
| 13100 | membar #Sync |
| 13101 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13102 | sub %l2, 0x40, %l2 |
| 13103 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13104 | wr %r12, %g0, %asi |
| 13105 | st %g0, [%r23] |
| 13106 | cwq_10_81: |
| 13107 | ta T_CHANGE_NONHPRIV |
| 13108 | .word 0xa5414000 ! 108: RDPC rd %pc, %r18 |
| 13109 | splash_lsu_10_82: |
| 13110 | nop |
| 13111 | ta T_CHANGE_HPRIV |
| 13112 | set 0x760da187, %r2 |
| 13113 | mov 0x1, %r1 |
| 13114 | sllx %r1, 32, %r1 |
| 13115 | or %r1, %r2, %r2 |
| 13116 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13117 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13118 | splash_cmpr_10_83: |
| 13119 | mov 0, %r18 |
| 13120 | sllx %r18, 63, %r18 |
| 13121 | rd %tick, %r17 |
| 13122 | add %r17, 0x50, %r17 |
| 13123 | or %r17, %r18, %r17 |
| 13124 | ta T_CHANGE_PRIV |
| 13125 | .word 0xaf800011 ! 110: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 13126 | splash_htba_10_84: |
| 13127 | nop |
| 13128 | ta T_CHANGE_HPRIV |
| 13129 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 13130 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 13131 | mondo_10_85: |
| 13132 | nop |
| 13133 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13134 | stxa %r6, [%r0+0x3d0] %asi |
| 13135 | .word 0x9d94800a ! 112: WRPR_WSTATE_R wrpr %r18, %r10, %wstate |
| 13136 | .word 0xc1bfd960 ! 113: STDFA_R stda %f0, [%r0, %r31] |
| 13137 | .word 0xc19fde00 ! 114: LDDFA_R ldda [%r31, %r0], %f0 |
| 13138 | splash_cmpr_10_86: |
| 13139 | mov 0, %r18 |
| 13140 | sllx %r18, 63, %r18 |
| 13141 | rd %tick, %r17 |
| 13142 | add %r17, 0x50, %r17 |
| 13143 | or %r17, %r18, %r17 |
| 13144 | ta T_CHANGE_PRIV |
| 13145 | .word 0xb3800011 ! 115: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13146 | #if (defined SPC || defined CMP) |
| 13147 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_87)+32, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13148 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_87)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13149 | #else |
| 13150 | !! TODO:Generate XIR via RESET_GEN register |
| 13151 | ! setx 0x8900000808, %r16, %r17 |
| 13152 | ! mov 0x2, %r16 |
| 13153 | ! stw %r16, [%r17] |
| 13154 | #endif |
| 13155 | xir_10_87: |
| 13156 | .word 0xa98461de ! 116: WR_SET_SOFTINT_I wr %r17, 0x01de, %set_softint |
| 13157 | brcommon3_10_88: |
| 13158 | nop |
| 13159 | setx common_target, %r12, %r27 |
| 13160 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 13161 | ba,a .+12 |
| 13162 | .word 0xd137c009 ! 1: STQF_R - %f8, [%r9, %r31] |
| 13163 | ba,a .+8 |
| 13164 | jmpl %r27+0, %r27 |
| 13165 | .word 0xd097c033 ! 117: LDUHA_R lduha [%r31, %r19] 0x01, %r8 |
| 13166 | .word 0x26cc0001 ! 1: BRLZ brlz,a,pt %r16,<label_0xc0001> |
| 13167 | .word 0x8d903fd9 ! 118: WRPR_PSTATE_I wrpr %r0, 0x1fd9, %pstate |
| 13168 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13169 | reduce_priv_lvl_10_90: |
| 13170 | ta T_CHANGE_NONPRIV ! macro |
| 13171 | #if (defined SPC || defined CMP) |
| 13172 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_91)+32, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13173 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_91)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13174 | #else |
| 13175 | !! TODO:Generate XIR via RESET_GEN register |
| 13176 | ! setx 0x8900000808, %r16, %r17 |
| 13177 | ! mov 0x2, %r16 |
| 13178 | ! stw %r16, [%r17] |
| 13179 | #endif |
| 13180 | xir_10_91: |
| 13181 | .word 0xa980f742 ! 120: WR_SET_SOFTINT_I wr %r3, 0x1742, %set_softint |
| 13182 | splash_cmpr_10_92: |
| 13183 | mov 0, %r18 |
| 13184 | sllx %r18, 63, %r18 |
| 13185 | rd %tick, %r17 |
| 13186 | add %r17, 0x60, %r17 |
| 13187 | or %r17, %r18, %r17 |
| 13188 | .word 0xb3800011 ! 121: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13189 | .word 0x91a00172 ! 122: FABSq dis not found |
| 13190 | |
| 13191 | ta T_CHANGE_NONHPRIV |
| 13192 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 13193 | splash_cmpr_10_95: |
| 13194 | mov 0, %r18 |
| 13195 | sllx %r18, 63, %r18 |
| 13196 | rd %tick, %r17 |
| 13197 | add %r17, 0x80, %r17 |
| 13198 | or %r17, %r18, %r17 |
| 13199 | ta T_CHANGE_HPRIV |
| 13200 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13201 | ta T_CHANGE_PRIV |
| 13202 | .word 0xb3800011 ! 124: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13203 | .word 0xe1bfda00 ! 125: STDFA_R stda %f16, [%r0, %r31] |
| 13204 | jmptr_10_96: |
| 13205 | nop |
| 13206 | best_set_reg(0xe0200000, %r20, %r27) |
| 13207 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 13208 | setx 0x4021df01bdcf8e2e, %r1, %r28 |
| 13209 | stxa %r28, [%g0] 0x73 |
| 13210 | intvec_10_97: |
| 13211 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13212 | pmu_10_98: |
| 13213 | nop |
| 13214 | ta T_CHANGE_PRIV |
| 13215 | setx 0xfffff45cfffffc50, %g1, %g7 |
| 13216 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13217 | donret_10_99: |
| 13218 | nop |
| 13219 | ta T_CHANGE_HPRIV ! macro |
| 13220 | rd %pc, %r12 |
| 13221 | add %r12, (donretarg_10_99-donret_10_99-4), %r12 |
| 13222 | mov 0x38, %r18 |
| 13223 | stxa %r12, [%r18]0x58 |
| 13224 | add %r12, 0x4, %r11 |
| 13225 | wrpr %g0, 0x1, %tl |
| 13226 | wrpr %g0, %r12, %tpc |
| 13227 | wrpr %g0, %r11, %tnpc |
| 13228 | set (0x005cafa6 | (4 << 24)), %r13 |
| 13229 | rdpr %tstate, %r16 |
| 13230 | mov 0x1f, %r19 |
| 13231 | and %r19, %r16, %r17 |
| 13232 | andn %r16, %r19, %r16 |
| 13233 | or %r16, %r17, %r20 |
| 13234 | wrpr %r20, %g0, %tstate |
| 13235 | wrhpr %g0, 0x1717, %htstate |
| 13236 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 13237 | done |
| 13238 | donretarg_10_99: |
| 13239 | .word 0x99a049c4 ! 129: FDIVd fdivd %f32, %f4, %f12 |
| 13240 | pmu_10_100: |
| 13241 | nop |
| 13242 | setx 0xfffff611ffffff0f, %g1, %g7 |
| 13243 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13244 | mondo_10_101: |
| 13245 | nop |
| 13246 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13247 | ta T_CHANGE_PRIV |
| 13248 | stxa %r13, [%r0+0x3e8] %asi |
| 13249 | .word 0x9d950007 ! 131: WRPR_WSTATE_R wrpr %r20, %r7, %wstate |
| 13250 | nop |
| 13251 | ta T_CHANGE_HPRIV |
| 13252 | mov 0x10, %r10 |
| 13253 | set sync_thr_counter6, %r23 |
| 13254 | #ifndef SPC |
| 13255 | ldxa [%g0]0x63, %o1 |
| 13256 | and %o1, 0x38, %o1 |
| 13257 | add %o1, %r23, %r23 |
| 13258 | #endif |
| 13259 | cas [%r23],%g0,%r10 !lock |
| 13260 | brnz %r10, sma_10_102 |
| 13261 | rd %asi, %r12 |
| 13262 | wr %g0, 0x40, %asi |
| 13263 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 13264 | set 0x00061fff, %g1 |
| 13265 | stxa %g1, [%g0 + 0x80] %asi |
| 13266 | wr %r12, %g0, %asi |
| 13267 | st %g0, [%r23] |
| 13268 | sma_10_102: |
| 13269 | ta T_CHANGE_NONHPRIV |
| 13270 | .word 0xd9e7e00b ! 132: CASA_R casa [%r31] %asi, %r11, %r12 |
| 13271 | .word 0xe1bfdc00 ! 133: STDFA_R stda %f16, [%r0, %r31] |
| 13272 | splash_tba_10_103: |
| 13273 | ta T_CHANGE_PRIV |
| 13274 | setx 0x0000000000380000, %r11, %r12 |
| 13275 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 13276 | splash_lsu_10_104: |
| 13277 | nop |
| 13278 | ta T_CHANGE_HPRIV |
| 13279 | set 0xfe91ae99, %r2 |
| 13280 | mov 0x5, %r1 |
| 13281 | sllx %r1, 32, %r1 |
| 13282 | or %r1, %r2, %r2 |
| 13283 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13284 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13285 | setx 0xc6faa98eb99c7282, %r1, %r28 |
| 13286 | stxa %r28, [%g0] 0x73 |
| 13287 | intvec_10_105: |
| 13288 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13289 | change_to_randtl_10_106: |
| 13290 | ta T_CHANGE_PRIV ! macro |
| 13291 | done_change_to_randtl_10_106: |
| 13292 | .word 0x8f902000 ! 137: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13293 | nop |
| 13294 | ta T_CHANGE_HPRIV |
| 13295 | mov 0x10+1, %r10 |
| 13296 | set sync_thr_counter5, %r23 |
| 13297 | #ifndef SPC |
| 13298 | ldxa [%g0]0x63, %o1 |
| 13299 | and %o1, 0x38, %o1 |
| 13300 | add %o1, %r23, %r23 |
| 13301 | sllx %o1, 5, %o3 !(CID*256) |
| 13302 | #endif |
| 13303 | cas [%r23],%g0,%r10 !lock |
| 13304 | brnz %r10, cwq_10_107 |
| 13305 | rd %asi, %r12 |
| 13306 | wr %g0, 0x40, %asi |
| 13307 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13308 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13309 | cmp %l1, 1 |
| 13310 | bne cwq_10_107 |
| 13311 | set CWQ_BASE, %l6 |
| 13312 | #ifndef SPC |
| 13313 | add %l6, %o3, %l6 |
| 13314 | #endif |
| 13315 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13316 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 13317 | sllx %l2, 32, %l2 |
| 13318 | stx %l2, [%l6 + 0x0] |
| 13319 | membar #Sync |
| 13320 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13321 | sub %l2, 0x40, %l2 |
| 13322 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13323 | wr %r12, %g0, %asi |
| 13324 | st %g0, [%r23] |
| 13325 | cwq_10_107: |
| 13326 | ta T_CHANGE_NONHPRIV |
| 13327 | .word 0x99414000 ! 138: RDPC rd %pc, %r12 |
| 13328 | #if (defined SPC || defined CMP) |
| 13329 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_108)+48, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13330 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_108)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13331 | #else |
| 13332 | !! TODO:Generate XIR via RESET_GEN register |
| 13333 | ! setx 0x8900000808, %r16, %r17 |
| 13334 | ! mov 0x2, %r16 |
| 13335 | ! stw %r16, [%r17] |
| 13336 | #endif |
| 13337 | xir_10_108: |
| 13338 | .word 0xa9826c76 ! 139: WR_SET_SOFTINT_I wr %r9, 0x0c76, %set_softint |
| 13339 | br_badelay1_10_109: |
| 13340 | .word 0xe5e7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r18 |
| 13341 | .word 0xd9307382 ! 1: STQF_I - %f12, [0x1382, %r1] |
| 13342 | .word 0xdbe7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r13 |
| 13343 | normalw |
| 13344 | .word 0xa5458000 ! 140: RD_SOFTINT_REG rd %softint, %r18 |
| 13345 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13346 | reduce_priv_lvl_10_110: |
| 13347 | ta T_CHANGE_NONHPRIV ! macro |
| 13348 | setx vahole_target1, %r18, %r27 |
| 13349 | .word 0xa7b44493 ! 142: FCMPLE32 fcmple32 %d48, %d50, %r19 |
| 13350 | nop |
| 13351 | ta T_CHANGE_HPRIV |
| 13352 | mov 0x10+1, %r10 |
| 13353 | set sync_thr_counter5, %r23 |
| 13354 | #ifndef SPC |
| 13355 | ldxa [%g0]0x63, %o1 |
| 13356 | and %o1, 0x38, %o1 |
| 13357 | add %o1, %r23, %r23 |
| 13358 | sllx %o1, 5, %o3 !(CID*256) |
| 13359 | #endif |
| 13360 | cas [%r23],%g0,%r10 !lock |
| 13361 | brnz %r10, cwq_10_112 |
| 13362 | rd %asi, %r12 |
| 13363 | wr %g0, 0x40, %asi |
| 13364 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13365 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13366 | cmp %l1, 1 |
| 13367 | bne cwq_10_112 |
| 13368 | set CWQ_BASE, %l6 |
| 13369 | #ifndef SPC |
| 13370 | add %l6, %o3, %l6 |
| 13371 | #endif |
| 13372 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13373 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 13374 | sllx %l2, 32, %l2 |
| 13375 | stx %l2, [%l6 + 0x0] |
| 13376 | membar #Sync |
| 13377 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13378 | sub %l2, 0x40, %l2 |
| 13379 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13380 | wr %r12, %g0, %asi |
| 13381 | st %g0, [%r23] |
| 13382 | cwq_10_112: |
| 13383 | ta T_CHANGE_NONHPRIV |
| 13384 | .word 0x9b414000 ! 143: RDPC rd %pc, %r13 |
| 13385 | .word 0xd91fe020 ! 144: LDDF_I ldd [%r31, 0x0020], %f12 |
| 13386 | setx 0xc2bb670f0d77b2b4, %r1, %r28 |
| 13387 | stxa %r28, [%g0] 0x73 |
| 13388 | intvec_10_113: |
| 13389 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13390 | .word 0xa0d1c009 ! 146: UMULcc_R umulcc %r7, %r9, %r16 |
| 13391 | splash_cmpr_10_114: |
| 13392 | mov 0, %r18 |
| 13393 | sllx %r18, 63, %r18 |
| 13394 | rd %tick, %r17 |
| 13395 | add %r17, 0x60, %r17 |
| 13396 | or %r17, %r18, %r17 |
| 13397 | ta T_CHANGE_HPRIV |
| 13398 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13399 | .word 0xb3800011 ! 147: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13400 | mondo_10_115: |
| 13401 | nop |
| 13402 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13403 | ta T_CHANGE_PRIV |
| 13404 | stxa %r9, [%r0+0x3c8] %asi |
| 13405 | .word 0x9d928014 ! 148: WRPR_WSTATE_R wrpr %r10, %r20, %wstate |
| 13406 | change_to_randtl_10_116: |
| 13407 | ta T_CHANGE_PRIV ! macro |
| 13408 | done_change_to_randtl_10_116: |
| 13409 | .word 0x8f902000 ! 149: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13410 | change_to_randtl_10_117: |
| 13411 | ta T_CHANGE_HPRIV ! macro |
| 13412 | done_change_to_randtl_10_117: |
| 13413 | .word 0x8f902002 ! 150: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 13414 | #if (defined SPC || defined CMP) |
| 13415 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_118) + 48, 16, 16)) -> intp(5,0,2) |
| 13416 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_118)&0xffffffff) + 48, 16, 16)) -> intp(5,0,2) |
| 13417 | #else |
| 13418 | setx 0xe299edc47e273fd2, %r1, %r28 |
| 13419 | stxa %r28, [%g0] 0x73 |
| 13420 | #endif |
| 13421 | intvec_10_118: |
| 13422 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13423 | memptr_10_119: |
| 13424 | set 0x60340000, %r31 |
| 13425 | .word 0x8584f6d2 ! 152: WRCCR_I wr %r19, 0x16d2, %ccr |
| 13426 | nop |
| 13427 | mov 0x80, %g3 |
| 13428 | stxa %g3, [%g3] 0x5f |
| 13429 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 13430 | .word 0x8d902d89 ! 154: WRPR_PSTATE_I wrpr %r0, 0x0d89, %pstate |
| 13431 | mondo_10_121: |
| 13432 | nop |
| 13433 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13434 | ta T_CHANGE_PRIV |
| 13435 | stxa %r12, [%r0+0x3c8] %asi |
| 13436 | .word 0x9d90c003 ! 155: WRPR_WSTATE_R wrpr %r3, %r3, %wstate |
| 13437 | .word 0x8d902743 ! 156: WRPR_PSTATE_I wrpr %r0, 0x0743, %pstate |
| 13438 | .word 0x91d02035 ! 157: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 13439 | setx 0x7bead1f9b9fd19da, %r1, %r28 |
| 13440 | stxa %r28, [%g0] 0x73 |
| 13441 | intvec_10_123: |
| 13442 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13443 | .word 0xc36d0011 ! 159: PREFETCH_R prefetch [%r20 + %r17], #one_read |
| 13444 | fpinit_10_124: |
| 13445 | nop |
| 13446 | setx fp_data_quads, %r19, %r20 |
| 13447 | ldd [%r20], %f0 |
| 13448 | ldd [%r20+8], %f4 |
| 13449 | ld [%r20+16], %fsr |
| 13450 | ld [%r20+24], %r19 |
| 13451 | wr %r19, %g0, %gsr |
| 13452 | .word 0x87a80a44 ! 160: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 13453 | splash_hpstate_10_125: |
| 13454 | ta T_CHANGE_NONHPRIV |
| 13455 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 13456 | .word 0x81982d8c ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0d8c, %hpstate |
| 13457 | nop |
| 13458 | mov 0x80, %g3 |
| 13459 | stxa %g3, [%g3] 0x5f |
| 13460 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 13461 | nop |
| 13462 | ta T_CHANGE_HPRIV |
| 13463 | mov 0x10, %r10 |
| 13464 | set sync_thr_counter6, %r23 |
| 13465 | #ifndef SPC |
| 13466 | ldxa [%g0]0x63, %o1 |
| 13467 | and %o1, 0x38, %o1 |
| 13468 | add %o1, %r23, %r23 |
| 13469 | #endif |
| 13470 | cas [%r23],%g0,%r10 !lock |
| 13471 | brnz %r10, sma_10_126 |
| 13472 | rd %asi, %r12 |
| 13473 | wr %g0, 0x40, %asi |
| 13474 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 13475 | set 0x00121fff, %g1 |
| 13476 | stxa %g1, [%g0 + 0x80] %asi |
| 13477 | wr %r12, %g0, %asi |
| 13478 | st %g0, [%r23] |
| 13479 | sma_10_126: |
| 13480 | ta T_CHANGE_NONHPRIV |
| 13481 | .word 0xe1e7e011 ! 163: CASA_R casa [%r31] %asi, %r17, %r16 |
| 13482 | nop |
| 13483 | ta T_CHANGE_HPRIV |
| 13484 | mov 0x10, %r10 |
| 13485 | set sync_thr_counter6, %r23 |
| 13486 | #ifndef SPC |
| 13487 | ldxa [%g0]0x63, %o1 |
| 13488 | and %o1, 0x38, %o1 |
| 13489 | add %o1, %r23, %r23 |
| 13490 | #endif |
| 13491 | cas [%r23],%g0,%r10 !lock |
| 13492 | brnz %r10, sma_10_127 |
| 13493 | rd %asi, %r12 |
| 13494 | wr %g0, 0x40, %asi |
| 13495 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 13496 | set 0x00061fff, %g1 |
| 13497 | stxa %g1, [%g0 + 0x80] %asi |
| 13498 | wr %r12, %g0, %asi |
| 13499 | st %g0, [%r23] |
| 13500 | sma_10_127: |
| 13501 | ta T_CHANGE_NONHPRIV |
| 13502 | .word 0xe1e7e008 ! 164: CASA_R casa [%r31] %asi, %r8, %r16 |
| 13503 | pmu_10_128: |
| 13504 | nop |
| 13505 | ta T_CHANGE_PRIV |
| 13506 | setx 0xfffff5c3fffff82d, %g1, %g7 |
| 13507 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13508 | splash_cmpr_10_129: |
| 13509 | mov 0, %r18 |
| 13510 | sllx %r18, 63, %r18 |
| 13511 | rd %tick, %r17 |
| 13512 | add %r17, 0x100, %r17 |
| 13513 | or %r17, %r18, %r17 |
| 13514 | ta T_CHANGE_PRIV |
| 13515 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13516 | ceter_10_130: |
| 13517 | nop |
| 13518 | ta T_CHANGE_HPRIV |
| 13519 | mov 7, %r17 |
| 13520 | sllx %r17, 60, %r17 |
| 13521 | mov 0x18, %r16 |
| 13522 | stxa %r17, [%r16]0x4c |
| 13523 | ta T_CHANGE_NONHPRIV |
| 13524 | .word 0xa3410000 ! 167: RDTICK rd %tick, %r17 |
| 13525 | jmptr_10_131: |
| 13526 | nop |
| 13527 | best_set_reg(0xe0200000, %r20, %r27) |
| 13528 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 13529 | .word 0xa56a4012 ! 169: SDIVX_R sdivx %r9, %r18, %r18 |
| 13530 | splash_cmpr_10_132: |
| 13531 | mov 0, %r18 |
| 13532 | sllx %r18, 63, %r18 |
| 13533 | rd %tick, %r17 |
| 13534 | add %r17, 0x80, %r17 |
| 13535 | or %r17, %r18, %r17 |
| 13536 | .word 0xaf800011 ! 170: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 13537 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 13538 | nop |
| 13539 | ta T_CHANGE_HPRIV |
| 13540 | mov 0x10+1, %r10 |
| 13541 | set sync_thr_counter5, %r23 |
| 13542 | #ifndef SPC |
| 13543 | ldxa [%g0]0x63, %o1 |
| 13544 | and %o1, 0x38, %o1 |
| 13545 | add %o1, %r23, %r23 |
| 13546 | sllx %o1, 5, %o3 !(CID*256) |
| 13547 | #endif |
| 13548 | cas [%r23],%g0,%r10 !lock |
| 13549 | brnz %r10, cwq_10_133 |
| 13550 | rd %asi, %r12 |
| 13551 | wr %g0, 0x40, %asi |
| 13552 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13553 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13554 | cmp %l1, 1 |
| 13555 | bne cwq_10_133 |
| 13556 | set CWQ_BASE, %l6 |
| 13557 | #ifndef SPC |
| 13558 | add %l6, %o3, %l6 |
| 13559 | #endif |
| 13560 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13561 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 13562 | sllx %l2, 32, %l2 |
| 13563 | stx %l2, [%l6 + 0x0] |
| 13564 | membar #Sync |
| 13565 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13566 | sub %l2, 0x40, %l2 |
| 13567 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13568 | wr %r12, %g0, %asi |
| 13569 | st %g0, [%r23] |
| 13570 | cwq_10_133: |
| 13571 | ta T_CHANGE_NONHPRIV |
| 13572 | .word 0xa9414000 ! 172: RDPC rd %pc, %r20 |
| 13573 | jmptr_10_134: |
| 13574 | nop |
| 13575 | best_set_reg(0xe0200000, %r20, %r27) |
| 13576 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 13577 | .word 0xe09fd140 ! 174: LDDA_R ldda [%r31, %r0] 0x8a, %r16 |
| 13578 | setx 0x1935ca90dcf5ef83, %r1, %r28 |
| 13579 | stxa %r28, [%g0] 0x73 |
| 13580 | intvec_10_135: |
| 13581 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13582 | splash_cmpr_10_136: |
| 13583 | mov 0, %r18 |
| 13584 | sllx %r18, 63, %r18 |
| 13585 | rd %tick, %r17 |
| 13586 | add %r17, 0x60, %r17 |
| 13587 | or %r17, %r18, %r17 |
| 13588 | ta T_CHANGE_HPRIV |
| 13589 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13590 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13591 | .word 0xe0d7e0f8 ! 177: LDSHA_I ldsha [%r31, + 0x00f8] %asi, %r16 |
| 13592 | splash_cmpr_10_137: |
| 13593 | mov 0, %r18 |
| 13594 | sllx %r18, 63, %r18 |
| 13595 | rd %tick, %r17 |
| 13596 | add %r17, 0x60, %r17 |
| 13597 | or %r17, %r18, %r17 |
| 13598 | ta T_CHANGE_HPRIV |
| 13599 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13600 | ta T_CHANGE_PRIV |
| 13601 | .word 0xaf800011 ! 178: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 13602 | mondo_10_138: |
| 13603 | nop |
| 13604 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13605 | stxa %r4, [%r0+0x3c8] %asi |
| 13606 | .word 0x9d940013 ! 179: WRPR_WSTATE_R wrpr %r16, %r19, %wstate |
| 13607 | change_to_randtl_10_139: |
| 13608 | ta T_CHANGE_HPRIV ! macro |
| 13609 | done_change_to_randtl_10_139: |
| 13610 | .word 0x8f902000 ! 180: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13611 | jmptr_10_140: |
| 13612 | nop |
| 13613 | best_set_reg(0xe0200000, %r20, %r27) |
| 13614 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 13615 | .word 0x9195000d ! 182: WRPR_PIL_R wrpr %r20, %r13, %pil |
| 13616 | donret_10_142: |
| 13617 | nop |
| 13618 | ta T_CHANGE_HPRIV ! macro |
| 13619 | rd %pc, %r12 |
| 13620 | add %r12, (donretarg_10_142-donret_10_142-8), %r12 |
| 13621 | mov 0x38, %r18 |
| 13622 | stxa %r12, [%r18]0x58 |
| 13623 | add %r12, 0x4, %r11 |
| 13624 | wrpr %g0, 0x1, %tl |
| 13625 | wrpr %g0, %r12, %tpc |
| 13626 | wrpr %g0, %r11, %tnpc |
| 13627 | set (0x00c8d450 | (0x89 << 24)), %r13 |
| 13628 | rdpr %tstate, %r16 |
| 13629 | mov 0x1f, %r19 |
| 13630 | and %r19, %r16, %r17 |
| 13631 | andn %r16, %r19, %r16 |
| 13632 | or %r16, %r17, %r20 |
| 13633 | wrpr %r20, %g0, %tstate |
| 13634 | wrhpr %g0, 0x1715, %htstate |
| 13635 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 13636 | retry |
| 13637 | donretarg_10_142: |
| 13638 | .word 0x95a409c8 ! 183: FDIVd fdivd %f16, %f8, %f10 |
| 13639 | .word 0xe6c7e1e0 ! 184: LDSWA_I ldswa [%r31, + 0x01e0] %asi, %r19 |
| 13640 | .word 0xc1bfde00 ! 185: STDFA_R stda %f0, [%r0, %r31] |
| 13641 | .word 0xe6cfe1e8 ! 186: LDSBA_I ldsba [%r31, + 0x01e8] %asi, %r19 |
| 13642 | splash_cmpr_10_143: |
| 13643 | mov 1, %r18 |
| 13644 | sllx %r18, 63, %r18 |
| 13645 | rd %tick, %r17 |
| 13646 | add %r17, 0x100, %r17 |
| 13647 | or %r17, %r18, %r17 |
| 13648 | ta T_CHANGE_HPRIV |
| 13649 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13650 | .word 0xb3800011 ! 187: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13651 | .word 0x9a828003 ! 188: ADDcc_R addcc %r10, %r3, %r13 |
| 13652 | ibp_10_144: |
| 13653 | nop |
| 13654 | ta T_CHANGE_NONHPRIV |
| 13655 | .word 0xe19fd960 ! 189: LDDFA_R ldda [%r31, %r0], %f16 |
| 13656 | ceter_10_145: |
| 13657 | nop |
| 13658 | ta T_CHANGE_HPRIV |
| 13659 | mov 7, %r17 |
| 13660 | sllx %r17, 60, %r17 |
| 13661 | mov 0x18, %r16 |
| 13662 | stxa %r17, [%r16]0x4c |
| 13663 | ta T_CHANGE_NONHPRIV |
| 13664 | .word 0xa9410000 ! 190: RDTICK rd %tick, %r20 |
| 13665 | ceter_10_146: |
| 13666 | nop |
| 13667 | ta T_CHANGE_HPRIV |
| 13668 | mov 4, %r17 |
| 13669 | sllx %r17, 60, %r17 |
| 13670 | mov 0x18, %r16 |
| 13671 | stxa %r17, [%r16]0x4c |
| 13672 | ta T_CHANGE_NONHPRIV |
| 13673 | .word 0xa1410000 ! 191: RDTICK rd %tick, %r16 |
| 13674 | setx 0x01809d2bbc4f12a7, %r1, %r28 |
| 13675 | stxa %r28, [%g0] 0x73 |
| 13676 | intvec_10_147: |
| 13677 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13678 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 13679 | .word 0x91a00173 ! 194: FABSq dis not found |
| 13680 | |
| 13681 | .word 0xe6c7e100 ! 195: LDSWA_I ldswa [%r31, + 0x0100] %asi, %r19 |
| 13682 | splash_lsu_10_150: |
| 13683 | nop |
| 13684 | ta T_CHANGE_HPRIV |
| 13685 | set 0x3379da30, %r2 |
| 13686 | mov 0x6, %r1 |
| 13687 | sllx %r1, 32, %r1 |
| 13688 | or %r1, %r2, %r2 |
| 13689 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13690 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13691 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13692 | reduce_priv_lvl_10_151: |
| 13693 | ta T_CHANGE_NONPRIV ! macro |
| 13694 | .word 0xe65fe1f0 ! 198: LDX_I ldx [%r31 + 0x01f0], %r19 |
| 13695 | splash_hpstate_10_152: |
| 13696 | ta T_CHANGE_NONHPRIV |
| 13697 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> |
| 13698 | .word 0x81982015 ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x0015, %hpstate |
| 13699 | .word 0x9353c000 ! 200: RDPR_FQ <illegal instruction> |
| 13700 | .word 0x9f803fb5 ! 201: SIR sir 0x1fb5 |
| 13701 | mondo_10_153: |
| 13702 | nop |
| 13703 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13704 | stxa %r16, [%r0+0x3e0] %asi |
| 13705 | .word 0x9d940011 ! 202: WRPR_WSTATE_R wrpr %r16, %r17, %wstate |
| 13706 | jmptr_10_154: |
| 13707 | nop |
| 13708 | best_set_reg(0xe0200000, %r20, %r27) |
| 13709 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 13710 | .word 0x24c8c001 ! 204: BRLEZ brlez,a,pt %r3,<label_0x8c001> |
| 13711 | pmu_10_156: |
| 13712 | nop |
| 13713 | ta T_CHANGE_PRIV |
| 13714 | setx 0xfffff702ffffffbe, %g1, %g7 |
| 13715 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13716 | setx 0xb2c9a0a7760df14a, %r1, %r28 |
| 13717 | stxa %r28, [%g0] 0x73 |
| 13718 | intvec_10_157: |
| 13719 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13720 | .word 0xe677e088 ! 207: STX_I stx %r19, [%r31 + 0x0088] |
| 13721 | brcommon2_10_158: |
| 13722 | nop |
| 13723 | setx common_target, %r12, %r27 |
| 13724 | ba,a .+12 |
| 13725 | .word 0xa7a7c973 ! 1: FMULq dis not found |
| 13726 | |
| 13727 | ba,a .+8 |
| 13728 | jmpl %r27+0, %r27 |
| 13729 | .word 0xc19fe1e0 ! 208: LDDFA_I ldda [%r31, 0x01e0], %f0 |
| 13730 | .word 0xa2fc4014 ! 209: SDIVcc_R sdivcc %r17, %r20, %r17 |
| 13731 | .word 0xd897e068 ! 210: LDUHA_I lduha [%r31, + 0x0068] %asi, %r12 |
| 13732 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 13733 | change_to_randtl_10_159: |
| 13734 | ta T_CHANGE_HPRIV ! macro |
| 13735 | done_change_to_randtl_10_159: |
| 13736 | .word 0x8f902002 ! 212: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 13737 | tagged_10_160: |
| 13738 | tsubcctv %r7, 0x1fed, %r11 |
| 13739 | .word 0xd807e0dc ! 213: LDUW_I lduw [%r31 + 0x00dc], %r12 |
| 13740 | br_badelay1_10_161: |
| 13741 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 13742 | .word 0xd937c013 ! 1: STQF_R - %f12, [%r19, %r31] |
| 13743 | .word 0xd83fc012 ! 1: STD_R std %r12, [%r31 + %r18] |
| 13744 | normalw |
| 13745 | .word 0xa1458000 ! 214: RD_SOFTINT_REG rd %softint, %r16 |
| 13746 | pmu_10_162: |
| 13747 | nop |
| 13748 | setx 0xfffff4cafffffca6, %g1, %g7 |
| 13749 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13750 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 13751 | pmu_10_164: |
| 13752 | nop |
| 13753 | ta T_CHANGE_PRIV |
| 13754 | setx 0xfffff112fffff989, %g1, %g7 |
| 13755 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13756 | otherw |
| 13757 | mov 0xb5, %r30 |
| 13758 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 13759 | .word 0xc1bfc3e0 ! 219: STDFA_R stda %f0, [%r0, %r31] |
| 13760 | .word 0xc1bfc2c0 ! 220: STDFA_R stda %f0, [%r0, %r31] |
| 13761 | .word 0xc1bfe0c0 ! 221: STDFA_I stda %f0, [0x00c0, %r31] |
| 13762 | setx 0xd05f7fc9c9820ecd, %r1, %r28 |
| 13763 | stxa %r28, [%g0] 0x73 |
| 13764 | intvec_10_165: |
| 13765 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13766 | br_longdelay1_10_166: |
| 13767 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 13768 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 13769 | nop |
| 13770 | ta T_CHANGE_HPRIV |
| 13771 | mov 0x10, %r10 |
| 13772 | set sync_thr_counter6, %r23 |
| 13773 | #ifndef SPC |
| 13774 | ldxa [%g0]0x63, %o1 |
| 13775 | and %o1, 0x38, %o1 |
| 13776 | add %o1, %r23, %r23 |
| 13777 | #endif |
| 13778 | cas [%r23],%g0,%r10 !lock |
| 13779 | brnz %r10, sma_10_167 |
| 13780 | rd %asi, %r12 |
| 13781 | wr %g0, 0x40, %asi |
| 13782 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 13783 | set 0x001e1fff, %g1 |
| 13784 | stxa %g1, [%g0 + 0x80] %asi |
| 13785 | wr %r12, %g0, %asi |
| 13786 | st %g0, [%r23] |
| 13787 | sma_10_167: |
| 13788 | ta T_CHANGE_NONHPRIV |
| 13789 | .word 0xe1e7e011 ! 224: CASA_R casa [%r31] %asi, %r17, %r16 |
| 13790 | jmptr_10_168: |
| 13791 | nop |
| 13792 | best_set_reg(0xe0200000, %r20, %r27) |
| 13793 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 13794 | setx 0xed4e4d2aeb6de012, %r1, %r28 |
| 13795 | stxa %r28, [%g0] 0x73 |
| 13796 | intvec_10_169: |
| 13797 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13798 | mondo_10_170: |
| 13799 | nop |
| 13800 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13801 | ta T_CHANGE_PRIV |
| 13802 | stxa %r17, [%r0+0x3e0] %asi |
| 13803 | .word 0x9d90c00a ! 227: WRPR_WSTATE_R wrpr %r3, %r10, %wstate |
| 13804 | splash_cmpr_10_171: |
| 13805 | mov 0, %r18 |
| 13806 | sllx %r18, 63, %r18 |
| 13807 | rd %tick, %r17 |
| 13808 | add %r17, 0x50, %r17 |
| 13809 | or %r17, %r18, %r17 |
| 13810 | ta T_CHANGE_PRIV |
| 13811 | .word 0xb3800011 ! 228: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 13812 | pmu_10_172: |
| 13813 | nop |
| 13814 | ta T_CHANGE_PRIV |
| 13815 | setx 0xfffff992fffff4e1, %g1, %g7 |
| 13816 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13817 | splash_lsu_10_173: |
| 13818 | nop |
| 13819 | ta T_CHANGE_HPRIV |
| 13820 | set 0xb5cc2436, %r2 |
| 13821 | mov 0x7, %r1 |
| 13822 | sllx %r1, 32, %r1 |
| 13823 | or %r1, %r2, %r2 |
| 13824 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13825 | ta T_CHANGE_NONHPRIV |
| 13826 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13827 | mondo_10_174: |
| 13828 | nop |
| 13829 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13830 | ta T_CHANGE_PRIV |
| 13831 | stxa %r16, [%r0+0x3e0] %asi |
| 13832 | .word 0x9d92c00a ! 231: WRPR_WSTATE_R wrpr %r11, %r10, %wstate |
| 13833 | memptr_10_175: |
| 13834 | set 0x60740000, %r31 |
| 13835 | .word 0x8582addf ! 232: WRCCR_I wr %r10, 0x0ddf, %ccr |
| 13836 | mondo_10_176: |
| 13837 | nop |
| 13838 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13839 | ta T_CHANGE_PRIV |
| 13840 | stxa %r6, [%r0+0x3e0] %asi |
| 13841 | .word 0x9d95000d ! 233: WRPR_WSTATE_R wrpr %r20, %r13, %wstate |
| 13842 | #if (defined SPC || defined CMP) |
| 13843 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_177)+24, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13844 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_177)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13845 | #else |
| 13846 | !! TODO:Generate XIR via RESET_GEN register |
| 13847 | ! setx 0x8900000808, %r16, %r17 |
| 13848 | ! mov 0x2, %r16 |
| 13849 | ! stw %r16, [%r17] |
| 13850 | #endif |
| 13851 | xir_10_177: |
| 13852 | .word 0xa98469ca ! 234: WR_SET_SOFTINT_I wr %r17, 0x09ca, %set_softint |
| 13853 | splash_lsu_10_178: |
| 13854 | nop |
| 13855 | ta T_CHANGE_HPRIV |
| 13856 | set 0x7ba63b1e, %r2 |
| 13857 | mov 0x4, %r1 |
| 13858 | sllx %r1, 32, %r1 |
| 13859 | or %r1, %r2, %r2 |
| 13860 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13861 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13862 | pmu_10_179: |
| 13863 | nop |
| 13864 | setx 0xffffff18fffff753, %g1, %g7 |
| 13865 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13866 | splash_lsu_10_180: |
| 13867 | nop |
| 13868 | ta T_CHANGE_HPRIV |
| 13869 | set 0x01b5858f, %r2 |
| 13870 | mov 0x2, %r1 |
| 13871 | sllx %r1, 32, %r1 |
| 13872 | or %r1, %r2, %r2 |
| 13873 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13874 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13875 | splash_cmpr_10_181: |
| 13876 | mov 0, %r18 |
| 13877 | sllx %r18, 63, %r18 |
| 13878 | rd %tick, %r17 |
| 13879 | add %r17, 0x100, %r17 |
| 13880 | or %r17, %r18, %r17 |
| 13881 | ta T_CHANGE_HPRIV |
| 13882 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13883 | .word 0xaf800011 ! 238: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 13884 | .word 0xe057e0d0 ! 239: LDSH_I ldsh [%r31 + 0x00d0], %r16 |
| 13885 | donret_10_182: |
| 13886 | nop |
| 13887 | ta T_CHANGE_HPRIV ! macro |
| 13888 | rd %pc, %r12 |
| 13889 | add %r12, (donretarg_10_182-donret_10_182-8), %r12 |
| 13890 | mov 0x38, %r18 |
| 13891 | stxa %r12, [%r18]0x58 |
| 13892 | add %r12, 0x4, %r11 |
| 13893 | wrpr %g0, 0x2, %tl |
| 13894 | wrpr %g0, %r12, %tpc |
| 13895 | wrpr %g0, %r11, %tnpc |
| 13896 | set (0x001c6e1c | (0x55 << 24)), %r13 |
| 13897 | rdpr %tstate, %r16 |
| 13898 | mov 0x1f, %r19 |
| 13899 | and %r19, %r16, %r17 |
| 13900 | andn %r16, %r19, %r16 |
| 13901 | or %r16, %r17, %r20 |
| 13902 | wrpr %r20, %g0, %tstate |
| 13903 | wrhpr %g0, 0x1d9d, %htstate |
| 13904 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 13905 | retry |
| 13906 | donretarg_10_182: |
| 13907 | .word 0xe0ffe016 ! 240: SWAPA_I swapa %r16, [%r31 + 0x0016] %asi |
| 13908 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 13909 | reduce_priv_lvl_10_183: |
| 13910 | ta T_CHANGE_NONPRIV ! macro |
| 13911 | .word 0xc1bfe0a0 ! 242: STDFA_I stda %f0, [0x00a0, %r31] |
| 13912 | #if (defined SPC || defined CMP) |
| 13913 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_184)+40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13914 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_184)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 13915 | #else |
| 13916 | !! TODO:Generate XIR via RESET_GEN register |
| 13917 | ! setx 0x8900000808, %r16, %r17 |
| 13918 | ! mov 0x2, %r16 |
| 13919 | ! stw %r16, [%r17] |
| 13920 | #endif |
| 13921 | xir_10_184: |
| 13922 | .word 0xa980b57a ! 243: WR_SET_SOFTINT_I wr %r2, 0x157a, %set_softint |
| 13923 | .word 0x87ab4a53 ! 244: FCMPd fcmpd %fcc<n>, %f44, %f50 |
| 13924 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 13925 | nop |
| 13926 | ta T_CHANGE_HPRIV |
| 13927 | mov 0x10+1, %r10 |
| 13928 | set sync_thr_counter5, %r23 |
| 13929 | #ifndef SPC |
| 13930 | ldxa [%g0]0x63, %o1 |
| 13931 | and %o1, 0x38, %o1 |
| 13932 | add %o1, %r23, %r23 |
| 13933 | sllx %o1, 5, %o3 !(CID*256) |
| 13934 | #endif |
| 13935 | cas [%r23],%g0,%r10 !lock |
| 13936 | brnz %r10, cwq_10_186 |
| 13937 | rd %asi, %r12 |
| 13938 | wr %g0, 0x40, %asi |
| 13939 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13940 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13941 | cmp %l1, 1 |
| 13942 | bne cwq_10_186 |
| 13943 | set CWQ_BASE, %l6 |
| 13944 | #ifndef SPC |
| 13945 | add %l6, %o3, %l6 |
| 13946 | #endif |
| 13947 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13948 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 13949 | sllx %l2, 32, %l2 |
| 13950 | stx %l2, [%l6 + 0x0] |
| 13951 | membar #Sync |
| 13952 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13953 | sub %l2, 0x40, %l2 |
| 13954 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13955 | wr %r12, %g0, %asi |
| 13956 | st %g0, [%r23] |
| 13957 | cwq_10_186: |
| 13958 | ta T_CHANGE_NONHPRIV |
| 13959 | .word 0xa7414000 ! 246: RDPC rd %pc, %r19 |
| 13960 | setx 0xe9577a6dcaeff96d, %r1, %r28 |
| 13961 | stxa %r28, [%g0] 0x73 |
| 13962 | intvec_10_187: |
| 13963 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13964 | pmu_10_188: |
| 13965 | nop |
| 13966 | setx 0xfffff9a8fffff6ca, %g1, %g7 |
| 13967 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 13968 | splash_cmpr_10_189: |
| 13969 | mov 0, %r18 |
| 13970 | sllx %r18, 63, %r18 |
| 13971 | rd %tick, %r17 |
| 13972 | add %r17, 0x60, %r17 |
| 13973 | or %r17, %r18, %r17 |
| 13974 | ta T_CHANGE_HPRIV |
| 13975 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 13976 | .word 0xaf800011 ! 249: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 13977 | donret_10_190: |
| 13978 | nop |
| 13979 | ta T_CHANGE_HPRIV ! macro |
| 13980 | rd %pc, %r12 |
| 13981 | add %r12, (donretarg_10_190-donret_10_190-8), %r12 |
| 13982 | mov 0x38, %r18 |
| 13983 | stxa %r12, [%r18]0x58 |
| 13984 | add %r12, 0x4, %r11 |
| 13985 | wrpr %g0, 0x1, %tl |
| 13986 | wrpr %g0, %r12, %tpc |
| 13987 | wrpr %g0, %r11, %tnpc |
| 13988 | set (0x00e1175e | (32 << 24)), %r13 |
| 13989 | rdpr %tstate, %r16 |
| 13990 | mov 0x1f, %r19 |
| 13991 | and %r19, %r16, %r17 |
| 13992 | andn %r16, %r19, %r16 |
| 13993 | or %r16, %r17, %r20 |
| 13994 | wrpr %r20, %g0, %tstate |
| 13995 | wrhpr %g0, 0x1c55, %htstate |
| 13996 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 13997 | retry |
| 13998 | donretarg_10_190: |
| 13999 | .word 0xa5a4c9ca ! 250: FDIVd fdivd %f50, %f10, %f18 |
| 14000 | memptr_10_191: |
| 14001 | set 0x60340000, %r31 |
| 14002 | .word 0x8580e060 ! 251: WRCCR_I wr %r3, 0x0060, %ccr |
| 14003 | .word 0xe49fc240 ! 252: LDDA_R ldda [%r31, %r0] 0x12, %r18 |
| 14004 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 14005 | nop |
| 14006 | ta T_CHANGE_HPRIV |
| 14007 | mov 0x10+1, %r10 |
| 14008 | set sync_thr_counter5, %r23 |
| 14009 | #ifndef SPC |
| 14010 | ldxa [%g0]0x63, %o1 |
| 14011 | and %o1, 0x38, %o1 |
| 14012 | add %o1, %r23, %r23 |
| 14013 | sllx %o1, 5, %o3 !(CID*256) |
| 14014 | #endif |
| 14015 | cas [%r23],%g0,%r10 !lock |
| 14016 | brnz %r10, cwq_10_193 |
| 14017 | rd %asi, %r12 |
| 14018 | wr %g0, 0x40, %asi |
| 14019 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14020 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14021 | cmp %l1, 1 |
| 14022 | bne cwq_10_193 |
| 14023 | set CWQ_BASE, %l6 |
| 14024 | #ifndef SPC |
| 14025 | add %l6, %o3, %l6 |
| 14026 | #endif |
| 14027 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14028 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 14029 | sllx %l2, 32, %l2 |
| 14030 | stx %l2, [%l6 + 0x0] |
| 14031 | membar #Sync |
| 14032 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14033 | sub %l2, 0x40, %l2 |
| 14034 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14035 | wr %r12, %g0, %asi |
| 14036 | st %g0, [%r23] |
| 14037 | cwq_10_193: |
| 14038 | ta T_CHANGE_NONHPRIV |
| 14039 | .word 0xa9414000 ! 254: RDPC rd %pc, %r20 |
| 14040 | splash_lsu_10_194: |
| 14041 | nop |
| 14042 | ta T_CHANGE_HPRIV |
| 14043 | set 0x756f1ae0, %r2 |
| 14044 | mov 0x7, %r1 |
| 14045 | sllx %r1, 32, %r1 |
| 14046 | or %r1, %r2, %r2 |
| 14047 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 14048 | ta T_CHANGE_NONHPRIV |
| 14049 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 14050 | .word 0x9953c000 ! 256: RDPR_FQ <illegal instruction> |
| 14051 | setx vahole_target2, %r18, %r27 |
| 14052 | .word 0xe91fe170 ! 257: LDDF_I ldd [%r31, 0x0170], %f20 |
| 14053 | #if (defined SPC || defined CMP) |
| 14054 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_196) + 40, 16, 16)) -> intp(0,0,7) |
| 14055 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_196)&0xffffffff) + 40, 16, 16)) -> intp(0,0,7) |
| 14056 | #else |
| 14057 | setx 0xf1ac696d70211ca6, %r1, %r28 |
| 14058 | stxa %r28, [%g0] 0x73 |
| 14059 | #endif |
| 14060 | intvec_10_196: |
| 14061 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14062 | nop |
| 14063 | ta T_CHANGE_HPRIV |
| 14064 | mov 0x10, %r10 |
| 14065 | set sync_thr_counter6, %r23 |
| 14066 | #ifndef SPC |
| 14067 | ldxa [%g0]0x63, %o1 |
| 14068 | and %o1, 0x38, %o1 |
| 14069 | add %o1, %r23, %r23 |
| 14070 | #endif |
| 14071 | cas [%r23],%g0,%r10 !lock |
| 14072 | brnz %r10, sma_10_197 |
| 14073 | rd %asi, %r12 |
| 14074 | wr %g0, 0x40, %asi |
| 14075 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14076 | set 0x00061fff, %g1 |
| 14077 | stxa %g1, [%g0 + 0x80] %asi |
| 14078 | wr %r12, %g0, %asi |
| 14079 | st %g0, [%r23] |
| 14080 | sma_10_197: |
| 14081 | ta T_CHANGE_NONHPRIV |
| 14082 | .word 0xe9e7e013 ! 259: CASA_R casa [%r31] %asi, %r19, %r20 |
| 14083 | .word 0xe8c7e068 ! 260: LDSWA_I ldswa [%r31, + 0x0068] %asi, %r20 |
| 14084 | setx vahole_target3, %r18, %r27 |
| 14085 | .word 0x9bb2c7d4 ! 261: PDIST pdistn %d42, %d20, %d44 |
| 14086 | .word 0xd697e048 ! 262: LDUHA_I lduha [%r31, + 0x0048] %asi, %r11 |
| 14087 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 14088 | .word 0xd68fe100 ! 264: LDUBA_I lduba [%r31, + 0x0100] %asi, %r11 |
| 14089 | pmu_10_199: |
| 14090 | nop |
| 14091 | setx 0xfffff382fffff9f4, %g1, %g7 |
| 14092 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14093 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 14094 | setx vahole_target1, %r18, %r27 |
| 14095 | .word 0x95b10486 ! 267: FCMPLE32 fcmple32 %d4, %d6, %r10 |
| 14096 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 14097 | .word 0x8d90350f ! 268: WRPR_PSTATE_I wrpr %r0, 0x150f, %pstate |
| 14098 | .word 0xe097e128 ! 269: LDUHA_I lduha [%r31, + 0x0128] %asi, %r16 |
| 14099 | nop |
| 14100 | ta T_CHANGE_HPRIV |
| 14101 | mov 0x10, %r10 |
| 14102 | set sync_thr_counter6, %r23 |
| 14103 | #ifndef SPC |
| 14104 | ldxa [%g0]0x63, %o1 |
| 14105 | and %o1, 0x38, %o1 |
| 14106 | add %o1, %r23, %r23 |
| 14107 | #endif |
| 14108 | cas [%r23],%g0,%r10 !lock |
| 14109 | brnz %r10, sma_10_203 |
| 14110 | rd %asi, %r12 |
| 14111 | wr %g0, 0x40, %asi |
| 14112 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14113 | set 0x00021fff, %g1 |
| 14114 | stxa %g1, [%g0 + 0x80] %asi |
| 14115 | wr %r12, %g0, %asi |
| 14116 | st %g0, [%r23] |
| 14117 | sma_10_203: |
| 14118 | ta T_CHANGE_NONHPRIV |
| 14119 | .word 0xe1e7e00d ! 270: CASA_R casa [%r31] %asi, %r13, %r16 |
| 14120 | .word 0xe07fe1e0 ! 271: SWAP_I swap %r16, [%r31 + 0x01e0] |
| 14121 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 14122 | cwp_10_204: |
| 14123 | set user_data_start, %o7 |
| 14124 | .word 0x93902004 ! 273: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 14125 | pmu_10_205: |
| 14126 | nop |
| 14127 | ta T_CHANGE_PRIV |
| 14128 | setx 0xfffff4a8fffff702, %g1, %g7 |
| 14129 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14130 | mondo_10_206: |
| 14131 | nop |
| 14132 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14133 | ta T_CHANGE_PRIV |
| 14134 | stxa %r1, [%r0+0x3c8] %asi |
| 14135 | .word 0x9d90c014 ! 275: WRPR_WSTATE_R wrpr %r3, %r20, %wstate |
| 14136 | br_badelay3_10_207: |
| 14137 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 14138 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 14139 | .word 0xa9a0054a ! 1: FSQRTd fsqrt |
| 14140 | .word 0x91a40830 ! 276: FADDs fadds %f16, %f16, %f8 |
| 14141 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 14142 | reduce_priv_lvl_10_208: |
| 14143 | ta T_CHANGE_NONPRIV ! macro |
| 14144 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 14145 | mondo_10_210: |
| 14146 | nop |
| 14147 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14148 | stxa %r16, [%r0+0x3c0] %asi |
| 14149 | .word 0x9d904013 ! 279: WRPR_WSTATE_R wrpr %r1, %r19, %wstate |
| 14150 | donret_10_211: |
| 14151 | nop |
| 14152 | ta T_CHANGE_HPRIV ! macro |
| 14153 | rd %pc, %r12 |
| 14154 | add %r12, (donretarg_10_211-donret_10_211-4), %r12 |
| 14155 | mov 0x38, %r18 |
| 14156 | stxa %r12, [%r18]0x58 |
| 14157 | add %r12, 0x4, %r11 |
| 14158 | wrpr %g0, 0x2, %tl |
| 14159 | wrpr %g0, %r12, %tpc |
| 14160 | wrpr %g0, %r11, %tnpc |
| 14161 | set (0x003ec246 | (28 << 24)), %r13 |
| 14162 | rdpr %tstate, %r16 |
| 14163 | mov 0x1f, %r19 |
| 14164 | and %r19, %r16, %r17 |
| 14165 | andn %r16, %r19, %r16 |
| 14166 | or %r16, %r17, %r20 |
| 14167 | wrpr %r20, %g0, %tstate |
| 14168 | wrhpr %g0, 0xc45, %htstate |
| 14169 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 14170 | done |
| 14171 | donretarg_10_211: |
| 14172 | .word 0xd86fe06e ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x006e] |
| 14173 | donret_10_212: |
| 14174 | nop |
| 14175 | ta T_CHANGE_HPRIV ! macro |
| 14176 | rd %pc, %r12 |
| 14177 | add %r12, (donretarg_10_212-donret_10_212-8), %r12 |
| 14178 | mov 0x38, %r18 |
| 14179 | stxa %r12, [%r18]0x58 |
| 14180 | add %r12, 0x4, %r11 |
| 14181 | wrpr %g0, 0x1, %tl |
| 14182 | wrpr %g0, %r12, %tpc |
| 14183 | wrpr %g0, %r11, %tnpc |
| 14184 | set (0x0082a39a | (0x55 << 24)), %r13 |
| 14185 | rdpr %tstate, %r16 |
| 14186 | mov 0x1f, %r19 |
| 14187 | and %r19, %r16, %r17 |
| 14188 | andn %r16, %r19, %r16 |
| 14189 | or %r16, %r17, %r20 |
| 14190 | wrpr %r20, %g0, %tstate |
| 14191 | wrhpr %g0, 0x496, %htstate |
| 14192 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 14193 | retry |
| 14194 | donretarg_10_212: |
| 14195 | .word 0x99a409d3 ! 281: FDIVd fdivd %f16, %f50, %f12 |
| 14196 | brcommon1_10_213: |
| 14197 | nop |
| 14198 | setx common_target, %r12, %r27 |
| 14199 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 14200 | ba,a .+12 |
| 14201 | .word 0xe9e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r20 |
| 14202 | ba,a .+8 |
| 14203 | jmpl %r27+0, %r27 |
| 14204 | .word 0x93703194 ! 282: POPC_I popc 0x1194, %r9 |
| 14205 | .word 0xe19fe080 ! 283: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 14206 | .word 0x8d903539 ! 284: WRPR_PSTATE_I wrpr %r0, 0x1539, %pstate |
| 14207 | splash_cmpr_10_215: |
| 14208 | mov 0, %r18 |
| 14209 | sllx %r18, 63, %r18 |
| 14210 | rd %tick, %r17 |
| 14211 | add %r17, 0x100, %r17 |
| 14212 | or %r17, %r18, %r17 |
| 14213 | ta T_CHANGE_PRIV |
| 14214 | .word 0xb3800011 ! 285: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 14215 | splash_cmpr_10_216: |
| 14216 | mov 0, %r18 |
| 14217 | sllx %r18, 63, %r18 |
| 14218 | rd %tick, %r17 |
| 14219 | add %r17, 0x50, %r17 |
| 14220 | or %r17, %r18, %r17 |
| 14221 | ta T_CHANGE_HPRIV |
| 14222 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 14223 | .word 0xaf800011 ! 286: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 14224 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 14225 | reduce_priv_lvl_10_217: |
| 14226 | ta T_CHANGE_NONPRIV ! macro |
| 14227 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 14228 | .word 0x8d902895 ! 288: WRPR_PSTATE_I wrpr %r0, 0x0895, %pstate |
| 14229 | splash_lsu_10_219: |
| 14230 | nop |
| 14231 | ta T_CHANGE_HPRIV |
| 14232 | set 0x718fbdc8, %r2 |
| 14233 | mov 0x7, %r1 |
| 14234 | sllx %r1, 32, %r1 |
| 14235 | or %r1, %r2, %r2 |
| 14236 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 14237 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 14238 | donret_10_220: |
| 14239 | nop |
| 14240 | ta T_CHANGE_HPRIV ! macro |
| 14241 | rd %pc, %r12 |
| 14242 | add %r12, (donretarg_10_220-donret_10_220-8), %r12 |
| 14243 | mov 0x38, %r18 |
| 14244 | stxa %r12, [%r18]0x58 |
| 14245 | add %r12, 0x4, %r11 |
| 14246 | wrpr %g0, 0x1, %tl |
| 14247 | wrpr %g0, %r12, %tpc |
| 14248 | wrpr %g0, %r11, %tnpc |
| 14249 | set (0x00ff4f63 | (22 << 24)), %r13 |
| 14250 | rdpr %tstate, %r16 |
| 14251 | mov 0x1f, %r19 |
| 14252 | and %r19, %r16, %r17 |
| 14253 | andn %r16, %r19, %r16 |
| 14254 | or %r16, %r17, %r20 |
| 14255 | wrpr %r20, %g0, %tstate |
| 14256 | wrhpr %g0, 0x84e, %htstate |
| 14257 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 14258 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 14259 | retry |
| 14260 | donretarg_10_220: |
| 14261 | .word 0xd66fe0ed ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x00ed] |
| 14262 | .word 0x91d02035 ! 291: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 14263 | setx 0x3e089e7962cbadf3, %r1, %r28 |
| 14264 | stxa %r28, [%g0] 0x73 |
| 14265 | intvec_10_221: |
| 14266 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14267 | brcommon3_10_222: |
| 14268 | nop |
| 14269 | setx common_target, %r12, %r27 |
| 14270 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 14271 | ba,a .+12 |
| 14272 | .word 0xd737e100 ! 1: STQF_I - %f11, [0x0100, %r31] |
| 14273 | ba,a .+8 |
| 14274 | jmpl %r27+0, %r27 |
| 14275 | .word 0xd697c033 ! 293: LDUHA_R lduha [%r31, %r19] 0x01, %r11 |
| 14276 | .word 0xd6d7e050 ! 294: LDSHA_I ldsha [%r31, + 0x0050] %asi, %r11 |
| 14277 | pmu_10_223: |
| 14278 | nop |
| 14279 | ta T_CHANGE_PRIV |
| 14280 | setx 0xfffff128fffffdd0, %g1, %g7 |
| 14281 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14282 | .word 0xa1a00174 ! 296: FABSq dis not found |
| 14283 | |
| 14284 | #if (defined SPC || defined CMP) |
| 14285 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_225)+56, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14286 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_225)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14287 | #else |
| 14288 | !! TODO:Generate XIR via RESET_GEN register |
| 14289 | ! setx 0x8900000808, %r16, %r17 |
| 14290 | ! mov 0x2, %r16 |
| 14291 | ! stw %r16, [%r17] |
| 14292 | #endif |
| 14293 | xir_10_225: |
| 14294 | .word 0xa981afb4 ! 297: WR_SET_SOFTINT_I wr %r6, 0x0fb4, %set_softint |
| 14295 | memptr_10_226: |
| 14296 | set 0x60740000, %r31 |
| 14297 | .word 0x8582f779 ! 298: WRCCR_I wr %r11, 0x1779, %ccr |
| 14298 | mondo_10_227: |
| 14299 | nop |
| 14300 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14301 | ta T_CHANGE_PRIV |
| 14302 | stxa %r18, [%r0+0x3d8] %asi |
| 14303 | .word 0x9d90c004 ! 299: WRPR_WSTATE_R wrpr %r3, %r4, %wstate |
| 14304 | .word 0xd297e0c8 ! 300: LDUHA_I lduha [%r31, + 0x00c8] %asi, %r9 |
| 14305 | setx vahole_target2, %r18, %r27 |
| 14306 | .word 0x87ac0a4d ! 301: FCMPd fcmpd %fcc<n>, %f16, %f44 |
| 14307 | #if (defined SPC || defined CMP) |
| 14308 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_229)+24, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14309 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_229)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14310 | #else |
| 14311 | !! TODO:Generate XIR via RESET_GEN register |
| 14312 | ! setx 0x8900000808, %r16, %r17 |
| 14313 | ! mov 0x2, %r16 |
| 14314 | ! stw %r16, [%r17] |
| 14315 | #endif |
| 14316 | xir_10_229: |
| 14317 | .word 0xa9846b73 ! 302: WR_SET_SOFTINT_I wr %r17, 0x0b73, %set_softint |
| 14318 | .word 0x8d903301 ! 303: WRPR_PSTATE_I wrpr %r0, 0x1301, %pstate |
| 14319 | setx vahole_target0, %r18, %r27 |
| 14320 | .word 0xe8bfc031 ! 304: STDA_R stda %r20, [%r31 + %r17] 0x01 |
| 14321 | trapasi_10_232: |
| 14322 | nop |
| 14323 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 14324 | .word 0xe8884980 ! 305: LDUBA_R lduba [%r1, %r0] 0x4c, %r20 |
| 14325 | #if (defined SPC || defined CMP) |
| 14326 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_233)+0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14327 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_233)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14328 | #else |
| 14329 | !! TODO:Generate XIR via RESET_GEN register |
| 14330 | ! setx 0x8900000808, %r16, %r17 |
| 14331 | ! mov 0x2, %r16 |
| 14332 | ! stw %r16, [%r17] |
| 14333 | #endif |
| 14334 | xir_10_233: |
| 14335 | .word 0xa9847b9a ! 306: WR_SET_SOFTINT_I wr %r17, 0x1b9a, %set_softint |
| 14336 | #if (defined SPC || defined CMP) |
| 14337 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_234) + 24, 16, 16)) -> intp(5,0,5) |
| 14338 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_234)&0xffffffff) + 24, 16, 16)) -> intp(5,0,5) |
| 14339 | #else |
| 14340 | setx 0x07cba0aae0777f03, %r1, %r28 |
| 14341 | stxa %r28, [%g0] 0x73 |
| 14342 | #endif |
| 14343 | intvec_10_234: |
| 14344 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14345 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 14346 | pmu_10_235: |
| 14347 | nop |
| 14348 | ta T_CHANGE_PRIV |
| 14349 | setx 0xfffff58afffff72f, %g1, %g7 |
| 14350 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14351 | nop |
| 14352 | ta T_CHANGE_HPRIV |
| 14353 | mov 0x10+1, %r10 |
| 14354 | set sync_thr_counter5, %r23 |
| 14355 | #ifndef SPC |
| 14356 | ldxa [%g0]0x63, %o1 |
| 14357 | and %o1, 0x38, %o1 |
| 14358 | add %o1, %r23, %r23 |
| 14359 | sllx %o1, 5, %o3 !(CID*256) |
| 14360 | #endif |
| 14361 | cas [%r23],%g0,%r10 !lock |
| 14362 | brnz %r10, cwq_10_236 |
| 14363 | rd %asi, %r12 |
| 14364 | wr %g0, 0x40, %asi |
| 14365 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14366 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14367 | cmp %l1, 1 |
| 14368 | bne cwq_10_236 |
| 14369 | set CWQ_BASE, %l6 |
| 14370 | #ifndef SPC |
| 14371 | add %l6, %o3, %l6 |
| 14372 | #endif |
| 14373 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14374 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 14375 | sllx %l2, 32, %l2 |
| 14376 | stx %l2, [%l6 + 0x0] |
| 14377 | membar #Sync |
| 14378 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14379 | sub %l2, 0x40, %l2 |
| 14380 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14381 | wr %r12, %g0, %asi |
| 14382 | st %g0, [%r23] |
| 14383 | cwq_10_236: |
| 14384 | ta T_CHANGE_NONHPRIV |
| 14385 | .word 0xa7414000 ! 310: RDPC rd %pc, %r19 |
| 14386 | nop |
| 14387 | ta T_CHANGE_HPRIV |
| 14388 | mov 0x10, %r10 |
| 14389 | set sync_thr_counter6, %r23 |
| 14390 | #ifndef SPC |
| 14391 | ldxa [%g0]0x63, %o1 |
| 14392 | and %o1, 0x38, %o1 |
| 14393 | add %o1, %r23, %r23 |
| 14394 | #endif |
| 14395 | cas [%r23],%g0,%r10 !lock |
| 14396 | brnz %r10, sma_10_237 |
| 14397 | rd %asi, %r12 |
| 14398 | wr %g0, 0x40, %asi |
| 14399 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14400 | set 0x000a1fff, %g1 |
| 14401 | stxa %g1, [%g0 + 0x80] %asi |
| 14402 | wr %r12, %g0, %asi |
| 14403 | st %g0, [%r23] |
| 14404 | sma_10_237: |
| 14405 | ta T_CHANGE_NONHPRIV |
| 14406 | .word 0xd1e7e011 ! 311: CASA_R casa [%r31] %asi, %r17, %r8 |
| 14407 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 14408 | reduce_priv_lvl_10_238: |
| 14409 | ta T_CHANGE_NONPRIV ! macro |
| 14410 | nop |
| 14411 | ta T_CHANGE_HPRIV |
| 14412 | mov 0x10, %r10 |
| 14413 | set sync_thr_counter6, %r23 |
| 14414 | #ifndef SPC |
| 14415 | ldxa [%g0]0x63, %o1 |
| 14416 | and %o1, 0x38, %o1 |
| 14417 | add %o1, %r23, %r23 |
| 14418 | #endif |
| 14419 | cas [%r23],%g0,%r10 !lock |
| 14420 | brnz %r10, sma_10_239 |
| 14421 | rd %asi, %r12 |
| 14422 | wr %g0, 0x40, %asi |
| 14423 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14424 | set 0x00021fff, %g1 |
| 14425 | stxa %g1, [%g0 + 0x80] %asi |
| 14426 | wr %r12, %g0, %asi |
| 14427 | st %g0, [%r23] |
| 14428 | sma_10_239: |
| 14429 | ta T_CHANGE_NONHPRIV |
| 14430 | .word 0xd1e7e010 ! 313: CASA_R casa [%r31] %asi, %r16, %r8 |
| 14431 | .word 0x9f802b60 ! 314: SIR sir 0x0b60 |
| 14432 | .word 0x91d020b3 ! 315: Tcc_I ta icc_or_xcc, %r0 + 179 |
| 14433 | splash_cmpr_10_240: |
| 14434 | mov 0, %r18 |
| 14435 | sllx %r18, 63, %r18 |
| 14436 | rd %tick, %r17 |
| 14437 | add %r17, 0x70, %r17 |
| 14438 | or %r17, %r18, %r17 |
| 14439 | ta T_CHANGE_HPRIV |
| 14440 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 14441 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 14442 | mondo_10_241: |
| 14443 | nop |
| 14444 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14445 | stxa %r17, [%r0+0x3d0] %asi |
| 14446 | .word 0x9d920007 ! 317: WRPR_WSTATE_R wrpr %r8, %r7, %wstate |
| 14447 | nop |
| 14448 | mov 0x80, %g3 |
| 14449 | stxa %g3, [%g3] 0x5f |
| 14450 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 14451 | nop |
| 14452 | ta T_CHANGE_HPRIV |
| 14453 | mov 0x10, %r10 |
| 14454 | set sync_thr_counter6, %r23 |
| 14455 | #ifndef SPC |
| 14456 | ldxa [%g0]0x63, %o1 |
| 14457 | and %o1, 0x38, %o1 |
| 14458 | add %o1, %r23, %r23 |
| 14459 | #endif |
| 14460 | cas [%r23],%g0,%r10 !lock |
| 14461 | brnz %r10, sma_10_242 |
| 14462 | rd %asi, %r12 |
| 14463 | wr %g0, 0x40, %asi |
| 14464 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14465 | set 0x00161fff, %g1 |
| 14466 | stxa %g1, [%g0 + 0x80] %asi |
| 14467 | wr %r12, %g0, %asi |
| 14468 | st %g0, [%r23] |
| 14469 | sma_10_242: |
| 14470 | ta T_CHANGE_NONHPRIV |
| 14471 | .word 0xd1e7e014 ! 319: CASA_R casa [%r31] %asi, %r20, %r8 |
| 14472 | br_longdelay1_10_243: |
| 14473 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 14474 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 14475 | splash_cmpr_10_244: |
| 14476 | mov 1, %r18 |
| 14477 | sllx %r18, 63, %r18 |
| 14478 | rd %tick, %r17 |
| 14479 | add %r17, 0x50, %r17 |
| 14480 | or %r17, %r18, %r17 |
| 14481 | ta T_CHANGE_HPRIV |
| 14482 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 14483 | .word 0xaf800011 ! 321: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 14484 | pmu_10_245: |
| 14485 | nop |
| 14486 | ta T_CHANGE_PRIV |
| 14487 | setx 0xfffffabafffff313, %g1, %g7 |
| 14488 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14489 | pmu_10_246: |
| 14490 | nop |
| 14491 | setx 0xfffffc2bfffffd61, %g1, %g7 |
| 14492 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14493 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 14494 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 14495 | .word 0x9ba00171 ! 326: FABSq dis not found |
| 14496 | |
| 14497 | mondo_10_249: |
| 14498 | nop |
| 14499 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14500 | stxa %r16, [%r0+0x3c8] %asi |
| 14501 | .word 0x9d94c011 ! 327: WRPR_WSTATE_R wrpr %r19, %r17, %wstate |
| 14502 | #if (defined SPC || defined CMP) |
| 14503 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_250) + 48, 16, 16)) -> intp(6,0,17) |
| 14504 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_250)&0xffffffff) + 48, 16, 16)) -> intp(6,0,17) |
| 14505 | #else |
| 14506 | setx 0xafeea9bc011b3b42, %r1, %r28 |
| 14507 | stxa %r28, [%g0] 0x73 |
| 14508 | #endif |
| 14509 | intvec_10_250: |
| 14510 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14511 | donret_10_251: |
| 14512 | nop |
| 14513 | ta T_CHANGE_HPRIV ! macro |
| 14514 | rd %pc, %r12 |
| 14515 | add %r12, (donretarg_10_251-donret_10_251-4), %r12 |
| 14516 | mov 0x38, %r18 |
| 14517 | stxa %r12, [%r18]0x58 |
| 14518 | add %r12, 0x4, %r11 |
| 14519 | wrpr %g0, 0x2, %tl |
| 14520 | wrpr %g0, %r12, %tpc |
| 14521 | wrpr %g0, %r11, %tnpc |
| 14522 | set (0x005e5fa2 | (0x89 << 24)), %r13 |
| 14523 | rdpr %tstate, %r16 |
| 14524 | mov 0x1f, %r19 |
| 14525 | and %r19, %r16, %r17 |
| 14526 | andn %r16, %r19, %r16 |
| 14527 | or %r16, %r17, %r20 |
| 14528 | wrpr %r20, %g0, %tstate |
| 14529 | wrhpr %g0, 0xdd5, %htstate |
| 14530 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 14531 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 14532 | done |
| 14533 | donretarg_10_251: |
| 14534 | .word 0xa1a489d2 ! 329: FDIVd fdivd %f18, %f18, %f16 |
| 14535 | .word 0xd4c7e008 ! 330: LDSWA_I ldswa [%r31, + 0x0008] %asi, %r10 |
| 14536 | .word 0xe1bfe0e0 ! 331: STDFA_I stda %f16, [0x00e0, %r31] |
| 14537 | nop |
| 14538 | mov 0x80, %g3 |
| 14539 | stxa %g3, [%g3] 0x57 |
| 14540 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 14541 | br_badelay3_10_252: |
| 14542 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 14543 | .word 0xe578d806 ! Random illegal ? |
| 14544 | .word 0x99a00554 ! 1: FSQRTd fsqrt |
| 14545 | .word 0xa5a24832 ! 333: FADDs fadds %f9, %f18, %f18 |
| 14546 | splash_hpstate_10_253: |
| 14547 | .word 0x2acb0001 ! 1: BRNZ brnz,a,pt %r12,<label_0xb0001> |
| 14548 | .word 0x81983a4b ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x1a4b, %hpstate |
| 14549 | mondo_10_254: |
| 14550 | nop |
| 14551 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14552 | ta T_CHANGE_PRIV |
| 14553 | stxa %r5, [%r0+0x3c8] %asi |
| 14554 | .word 0x9d950005 ! 335: WRPR_WSTATE_R wrpr %r20, %r5, %wstate |
| 14555 | .word 0x9f803b8a ! 336: SIR sir 0x1b8a |
| 14556 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 14557 | reduce_priv_lvl_10_255: |
| 14558 | ta T_CHANGE_NONHPRIV ! macro |
| 14559 | .word 0xe277e0e0 ! 338: STX_I stx %r17, [%r31 + 0x00e0] |
| 14560 | pmu_10_256: |
| 14561 | nop |
| 14562 | ta T_CHANGE_PRIV |
| 14563 | setx 0xfffff5b9fffff990, %g1, %g7 |
| 14564 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14565 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 14566 | otherw |
| 14567 | mov 0x30, %r30 |
| 14568 | .word 0x83d0001e ! 341: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 14569 | .word 0xe227e1e2 ! 342: STW_I stw %r17, [%r31 + 0x01e2] |
| 14570 | setx 0xf147c530a577dc66, %r1, %r28 |
| 14571 | stxa %r28, [%g0] 0x73 |
| 14572 | intvec_10_257: |
| 14573 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14574 | jmptr_10_258: |
| 14575 | nop |
| 14576 | best_set_reg(0xe0200000, %r20, %r27) |
| 14577 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 14578 | donret_10_259: |
| 14579 | nop |
| 14580 | ta T_CHANGE_HPRIV ! macro |
| 14581 | rd %pc, %r12 |
| 14582 | add %r12, (donretarg_10_259-donret_10_259-4), %r12 |
| 14583 | mov 0x38, %r18 |
| 14584 | stxa %r12, [%r18]0x58 |
| 14585 | add %r12, 0x4, %r11 |
| 14586 | wrpr %g0, 0x2, %tl |
| 14587 | wrpr %g0, %r12, %tpc |
| 14588 | wrpr %g0, %r11, %tnpc |
| 14589 | set (0x0081c6ec | (0x82 << 24)), %r13 |
| 14590 | rdpr %tstate, %r16 |
| 14591 | mov 0x1f, %r19 |
| 14592 | and %r19, %r16, %r17 |
| 14593 | andn %r16, %r19, %r16 |
| 14594 | or %r16, %r17, %r20 |
| 14595 | wrpr %r20, %g0, %tstate |
| 14596 | wrhpr %g0, 0x715, %htstate |
| 14597 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 14598 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 14599 | done |
| 14600 | donretarg_10_259: |
| 14601 | .word 0x95a149d3 ! 345: FDIVd fdivd %f36, %f50, %f10 |
| 14602 | jmptr_10_260: |
| 14603 | nop |
| 14604 | best_set_reg(0xe0200000, %r20, %r27) |
| 14605 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 14606 | .word 0xa3a00167 ! 347: FABSq dis not found |
| 14607 | |
| 14608 | .word 0x96c0f5cb ! 348: ADDCcc_I addccc %r3, 0xfffff5cb, %r11 |
| 14609 | mondo_10_262: |
| 14610 | nop |
| 14611 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14612 | stxa %r2, [%r0+0x3e8] %asi |
| 14613 | .word 0x9d928013 ! 349: WRPR_WSTATE_R wrpr %r10, %r19, %wstate |
| 14614 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 14615 | .word 0x8d903218 ! 350: WRPR_PSTATE_I wrpr %r0, 0x1218, %pstate |
| 14616 | .word 0xe19fe0e0 ! 351: LDDFA_I ldda [%r31, 0x00e0], %f16 |
| 14617 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 14618 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 14619 | reduce_priv_lvl_10_265: |
| 14620 | ta T_CHANGE_NONHPRIV ! macro |
| 14621 | #if (defined SPC || defined CMP) |
| 14622 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_266) + 56, 16, 16)) -> intp(7,0,7) |
| 14623 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_266)&0xffffffff) + 56, 16, 16)) -> intp(7,0,7) |
| 14624 | #else |
| 14625 | setx 0x7122ac1e27db9ea9, %r1, %r28 |
| 14626 | stxa %r28, [%g0] 0x73 |
| 14627 | #endif |
| 14628 | intvec_10_266: |
| 14629 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14630 | setx vahole_target1, %r18, %r27 |
| 14631 | .word 0xe63fe090 ! 355: STD_I std %r19, [%r31 + 0x0090] |
| 14632 | .word 0xc19fe080 ! 356: LDDFA_I ldda [%r31, 0x0080], %f0 |
| 14633 | #if (defined SPC || defined CMP) |
| 14634 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_268)+40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14635 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_268)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14636 | #else |
| 14637 | !! TODO:Generate XIR via RESET_GEN register |
| 14638 | ! setx 0x8900000808, %r16, %r17 |
| 14639 | ! mov 0x2, %r16 |
| 14640 | ! stw %r16, [%r17] |
| 14641 | #endif |
| 14642 | xir_10_268: |
| 14643 | .word 0xa9842312 ! 357: WR_SET_SOFTINT_I wr %r16, 0x0312, %set_softint |
| 14644 | setx 0x7186f64451a600ba, %r1, %r28 |
| 14645 | stxa %r28, [%g0] 0x73 |
| 14646 | intvec_10_269: |
| 14647 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14648 | nop |
| 14649 | ta T_CHANGE_HPRIV |
| 14650 | mov 0x10+1, %r10 |
| 14651 | set sync_thr_counter5, %r23 |
| 14652 | #ifndef SPC |
| 14653 | ldxa [%g0]0x63, %o1 |
| 14654 | and %o1, 0x38, %o1 |
| 14655 | add %o1, %r23, %r23 |
| 14656 | sllx %o1, 5, %o3 !(CID*256) |
| 14657 | #endif |
| 14658 | cas [%r23],%g0,%r10 !lock |
| 14659 | brnz %r10, cwq_10_270 |
| 14660 | rd %asi, %r12 |
| 14661 | wr %g0, 0x40, %asi |
| 14662 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14663 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14664 | cmp %l1, 1 |
| 14665 | bne cwq_10_270 |
| 14666 | set CWQ_BASE, %l6 |
| 14667 | #ifndef SPC |
| 14668 | add %l6, %o3, %l6 |
| 14669 | #endif |
| 14670 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14671 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 14672 | sllx %l2, 32, %l2 |
| 14673 | stx %l2, [%l6 + 0x0] |
| 14674 | membar #Sync |
| 14675 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14676 | sub %l2, 0x40, %l2 |
| 14677 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14678 | wr %r12, %g0, %asi |
| 14679 | st %g0, [%r23] |
| 14680 | cwq_10_270: |
| 14681 | ta T_CHANGE_NONHPRIV |
| 14682 | .word 0x95414000 ! 359: RDPC rd %pc, %r10 |
| 14683 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 14684 | br_longdelay1_10_272: |
| 14685 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 14686 | .word 0x9d97c000 ! 361: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 14687 | fpinit_10_273: |
| 14688 | nop |
| 14689 | setx fp_data_quads, %r19, %r20 |
| 14690 | ldd [%r20], %f0 |
| 14691 | ldd [%r20+8], %f4 |
| 14692 | ld [%r20+16], %fsr |
| 14693 | ld [%r20+24], %r19 |
| 14694 | wr %r19, %g0, %gsr |
| 14695 | .word 0xc3e8376b ! 362: PREFETCHA_I prefetcha [%r0, + 0xfffff76b] %asi, #one_read |
| 14696 | jmptr_10_274: |
| 14697 | nop |
| 14698 | best_set_reg(0xe0200000, %r20, %r27) |
| 14699 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 14700 | ta T_CHANGE_NONHPRIV |
| 14701 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 14702 | intveclr_10_276: |
| 14703 | nop |
| 14704 | ta T_CHANGE_HPRIV |
| 14705 | setx 0xaa830dec8669510d, %r1, %r28 |
| 14706 | stxa %r28, [%g0] 0x72 |
| 14707 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 14708 | nop |
| 14709 | ta T_CHANGE_HPRIV |
| 14710 | mov 0x10+1, %r10 |
| 14711 | set sync_thr_counter5, %r23 |
| 14712 | #ifndef SPC |
| 14713 | ldxa [%g0]0x63, %o1 |
| 14714 | and %o1, 0x38, %o1 |
| 14715 | add %o1, %r23, %r23 |
| 14716 | sllx %o1, 5, %o3 !(CID*256) |
| 14717 | #endif |
| 14718 | cas [%r23],%g0,%r10 !lock |
| 14719 | brnz %r10, cwq_10_277 |
| 14720 | rd %asi, %r12 |
| 14721 | wr %g0, 0x40, %asi |
| 14722 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14723 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14724 | cmp %l1, 1 |
| 14725 | bne cwq_10_277 |
| 14726 | set CWQ_BASE, %l6 |
| 14727 | #ifndef SPC |
| 14728 | add %l6, %o3, %l6 |
| 14729 | #endif |
| 14730 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14731 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 14732 | sllx %l2, 32, %l2 |
| 14733 | stx %l2, [%l6 + 0x0] |
| 14734 | membar #Sync |
| 14735 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14736 | sub %l2, 0x40, %l2 |
| 14737 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14738 | wr %r12, %g0, %asi |
| 14739 | st %g0, [%r23] |
| 14740 | cwq_10_277: |
| 14741 | ta T_CHANGE_NONHPRIV |
| 14742 | .word 0xa1414000 ! 366: RDPC rd %pc, %r16 |
| 14743 | brcommon3_10_278: |
| 14744 | nop |
| 14745 | setx common_target, %r12, %r27 |
| 14746 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 14747 | ba,a .+12 |
| 14748 | .word 0xd937c00c ! 1: STQF_R - %f12, [%r12, %r31] |
| 14749 | ba,a .+8 |
| 14750 | jmpl %r27+0, %r27 |
| 14751 | .word 0xd89fe060 ! 367: LDDA_I ldda [%r31, + 0x0060] %asi, %r12 |
| 14752 | .word 0xd827e1fe ! 368: STW_I stw %r12, [%r31 + 0x01fe] |
| 14753 | .word 0xd8c7e1d8 ! 369: LDSWA_I ldswa [%r31, + 0x01d8] %asi, %r12 |
| 14754 | #if (defined SPC || defined CMP) |
| 14755 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_279)+16, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14756 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_279)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 14757 | #else |
| 14758 | !! TODO:Generate XIR via RESET_GEN register |
| 14759 | ! setx 0x8900000808, %r16, %r17 |
| 14760 | ! mov 0x2, %r16 |
| 14761 | ! stw %r16, [%r17] |
| 14762 | #endif |
| 14763 | xir_10_279: |
| 14764 | .word 0xa9826f1c ! 370: WR_SET_SOFTINT_I wr %r9, 0x0f1c, %set_softint |
| 14765 | nop |
| 14766 | ta T_CHANGE_HPRIV |
| 14767 | mov 0x10+1, %r10 |
| 14768 | set sync_thr_counter5, %r23 |
| 14769 | #ifndef SPC |
| 14770 | ldxa [%g0]0x63, %o1 |
| 14771 | and %o1, 0x38, %o1 |
| 14772 | add %o1, %r23, %r23 |
| 14773 | sllx %o1, 5, %o3 !(CID*256) |
| 14774 | #endif |
| 14775 | cas [%r23],%g0,%r10 !lock |
| 14776 | brnz %r10, cwq_10_280 |
| 14777 | rd %asi, %r12 |
| 14778 | wr %g0, 0x40, %asi |
| 14779 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14780 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14781 | cmp %l1, 1 |
| 14782 | bne cwq_10_280 |
| 14783 | set CWQ_BASE, %l6 |
| 14784 | #ifndef SPC |
| 14785 | add %l6, %o3, %l6 |
| 14786 | #endif |
| 14787 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14788 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 14789 | sllx %l2, 32, %l2 |
| 14790 | stx %l2, [%l6 + 0x0] |
| 14791 | membar #Sync |
| 14792 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14793 | sub %l2, 0x40, %l2 |
| 14794 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14795 | wr %r12, %g0, %asi |
| 14796 | st %g0, [%r23] |
| 14797 | cwq_10_280: |
| 14798 | ta T_CHANGE_NONHPRIV |
| 14799 | .word 0xa1414000 ! 371: RDPC rd %pc, %r16 |
| 14800 | .word 0xd4cfe050 ! 372: LDSBA_I ldsba [%r31, + 0x0050] %asi, %r10 |
| 14801 | splash_cmpr_10_281: |
| 14802 | mov 0, %r18 |
| 14803 | sllx %r18, 63, %r18 |
| 14804 | rd %tick, %r17 |
| 14805 | add %r17, 0x60, %r17 |
| 14806 | or %r17, %r18, %r17 |
| 14807 | ta T_CHANGE_HPRIV |
| 14808 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 14809 | .word 0xaf800011 ! 373: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 14810 | nop |
| 14811 | ta T_CHANGE_HPRIV |
| 14812 | mov 0x10, %r10 |
| 14813 | set sync_thr_counter6, %r23 |
| 14814 | #ifndef SPC |
| 14815 | ldxa [%g0]0x63, %o1 |
| 14816 | and %o1, 0x38, %o1 |
| 14817 | add %o1, %r23, %r23 |
| 14818 | #endif |
| 14819 | cas [%r23],%g0,%r10 !lock |
| 14820 | brnz %r10, sma_10_282 |
| 14821 | rd %asi, %r12 |
| 14822 | wr %g0, 0x40, %asi |
| 14823 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14824 | set 0x00021fff, %g1 |
| 14825 | stxa %g1, [%g0 + 0x80] %asi |
| 14826 | wr %r12, %g0, %asi |
| 14827 | st %g0, [%r23] |
| 14828 | sma_10_282: |
| 14829 | ta T_CHANGE_NONHPRIV |
| 14830 | .word 0xd5e7e00c ! 374: CASA_R casa [%r31] %asi, %r12, %r10 |
| 14831 | br_badelay2_10_283: |
| 14832 | .word 0xa1a409d2 ! 1: FDIVd fdivd %f16, %f18, %f16 |
| 14833 | pdist %f8, %f8, %f26 |
| 14834 | .word 0x91b14314 ! 375: ALIGNADDRESS alignaddr %r5, %r20, %r8 |
| 14835 | .word 0xe19fe1e0 ! 376: LDDFA_I ldda [%r31, 0x01e0], %f16 |
| 14836 | .word 0x9f802663 ! 377: SIR sir 0x0663 |
| 14837 | .word 0xe1bfdb60 ! 378: STDFA_R stda %f16, [%r0, %r31] |
| 14838 | .word 0x92d98013 ! 379: SMULcc_R smulcc %r6, %r19, %r9 |
| 14839 | .word 0xc32fc000 ! 380: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 14840 | nop |
| 14841 | ta T_CHANGE_HPRIV |
| 14842 | mov 0x10+1, %r10 |
| 14843 | set sync_thr_counter5, %r23 |
| 14844 | #ifndef SPC |
| 14845 | ldxa [%g0]0x63, %o1 |
| 14846 | and %o1, 0x38, %o1 |
| 14847 | add %o1, %r23, %r23 |
| 14848 | sllx %o1, 5, %o3 !(CID*256) |
| 14849 | #endif |
| 14850 | cas [%r23],%g0,%r10 !lock |
| 14851 | brnz %r10, cwq_10_285 |
| 14852 | rd %asi, %r12 |
| 14853 | wr %g0, 0x40, %asi |
| 14854 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 14855 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 14856 | cmp %l1, 1 |
| 14857 | bne cwq_10_285 |
| 14858 | set CWQ_BASE, %l6 |
| 14859 | #ifndef SPC |
| 14860 | add %l6, %o3, %l6 |
| 14861 | #endif |
| 14862 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 14863 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 14864 | sllx %l2, 32, %l2 |
| 14865 | stx %l2, [%l6 + 0x0] |
| 14866 | membar #Sync |
| 14867 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 14868 | sub %l2, 0x40, %l2 |
| 14869 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 14870 | wr %r12, %g0, %asi |
| 14871 | st %g0, [%r23] |
| 14872 | cwq_10_285: |
| 14873 | ta T_CHANGE_NONHPRIV |
| 14874 | .word 0xa7414000 ! 381: RDPC rd %pc, %r19 |
| 14875 | brcommon3_10_286: |
| 14876 | nop |
| 14877 | setx common_target, %r12, %r27 |
| 14878 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 14879 | ba,a .+12 |
| 14880 | .word 0xdb37c00d ! 1: STQF_R - %f13, [%r13, %r31] |
| 14881 | ba,a .+8 |
| 14882 | jmpl %r27+0, %r27 |
| 14883 | .word 0xdadfc02b ! 382: LDXA_R ldxa [%r31, %r11] 0x01, %r13 |
| 14884 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 14885 | .word 0xda9fc028 ! 384: LDDA_R ldda [%r31, %r8] 0x01, %r13 |
| 14886 | #if (defined SPC || defined CMP) |
| 14887 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_288) + 8, 16, 16)) -> intp(3,0,29) |
| 14888 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_288)&0xffffffff) + 8, 16, 16)) -> intp(3,0,29) |
| 14889 | #else |
| 14890 | setx 0x998e5d24d51a20b0, %r1, %r28 |
| 14891 | stxa %r28, [%g0] 0x73 |
| 14892 | #endif |
| 14893 | intvec_10_288: |
| 14894 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14895 | tagged_10_289: |
| 14896 | taddcctv %r12, 0x120d, %r3 |
| 14897 | .word 0xda07e077 ! 386: LDUW_I lduw [%r31 + 0x0077], %r13 |
| 14898 | ibp_10_290: |
| 14899 | nop |
| 14900 | .word 0xe1bfe060 ! 387: STDFA_I stda %f16, [0x0060, %r31] |
| 14901 | cwp_10_291: |
| 14902 | set user_data_start, %o7 |
| 14903 | .word 0x93902000 ! 388: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 14904 | pmu_10_292: |
| 14905 | nop |
| 14906 | ta T_CHANGE_PRIV |
| 14907 | setx 0xfffffa40fffff169, %g1, %g7 |
| 14908 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 14909 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 14910 | reduce_priv_lvl_10_293: |
| 14911 | ta T_CHANGE_NONPRIV ! macro |
| 14912 | ceter_10_294: |
| 14913 | nop |
| 14914 | ta T_CHANGE_HPRIV |
| 14915 | mov 1, %r17 |
| 14916 | sllx %r17, 60, %r17 |
| 14917 | mov 0x18, %r16 |
| 14918 | stxa %r17, [%r16]0x4c |
| 14919 | .word 0x99410000 ! 391: RDTICK rd %tick, %r12 |
| 14920 | cwp_10_295: |
| 14921 | set user_data_start, %o7 |
| 14922 | .word 0x93902003 ! 392: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 14923 | splash_lsu_10_296: |
| 14924 | nop |
| 14925 | ta T_CHANGE_HPRIV |
| 14926 | set 0xafa600e7, %r2 |
| 14927 | mov 0x1, %r1 |
| 14928 | sllx %r1, 32, %r1 |
| 14929 | or %r1, %r2, %r2 |
| 14930 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 14931 | ta T_CHANGE_NONHPRIV |
| 14932 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 14933 | intveclr_10_297: |
| 14934 | nop |
| 14935 | ta T_CHANGE_HPRIV |
| 14936 | setx 0xd9d83f052326f7e9, %r1, %r28 |
| 14937 | stxa %r28, [%g0] 0x72 |
| 14938 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 14939 | nop |
| 14940 | mov 0x80, %g3 |
| 14941 | stxa %g3, [%g3] 0x57 |
| 14942 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 14943 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 14944 | reduce_priv_lvl_10_298: |
| 14945 | ta T_CHANGE_NONPRIV ! macro |
| 14946 | dvapa_10_299: |
| 14947 | nop |
| 14948 | ta T_CHANGE_HPRIV |
| 14949 | mov 0xde9, %r20 |
| 14950 | mov 0xc, %r19 |
| 14951 | sllx %r20, 23, %r20 |
| 14952 | or %r19, %r20, %r19 |
| 14953 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 14954 | mov 0x38, %r18 |
| 14955 | stxa %r31, [%r18]0x58 |
| 14956 | ta T_CHANGE_NONHPRIV |
| 14957 | .word 0xe3e7e011 ! 397: CASA_R casa [%r31] %asi, %r17, %r17 |
| 14958 | mondo_10_300: |
| 14959 | nop |
| 14960 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 14961 | stxa %r1, [%r0+0x3e0] %asi |
| 14962 | .word 0x9d904008 ! 398: WRPR_WSTATE_R wrpr %r1, %r8, %wstate |
| 14963 | .word 0xc19fdc00 ! 399: LDDFA_R ldda [%r31, %r0], %f0 |
| 14964 | .word 0xa7834001 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r13, %r1, %- |
| 14965 | #if (defined SPC || defined CMP) |
| 14966 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_302) + 48, 16, 16)) -> intp(7,0,13) |
| 14967 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_302)&0xffffffff) + 48, 16, 16)) -> intp(7,0,13) |
| 14968 | #else |
| 14969 | setx 0x9d10fbf2d4f832d9, %r1, %r28 |
| 14970 | stxa %r28, [%g0] 0x73 |
| 14971 | #endif |
| 14972 | intvec_10_302: |
| 14973 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 14974 | brcommon2_10_303: |
| 14975 | nop |
| 14976 | setx common_target, %r12, %r27 |
| 14977 | ba,a .+12 |
| 14978 | .word 0x9f802040 ! 1: SIR sir 0x0040 |
| 14979 | ba,a .+8 |
| 14980 | jmpl %r27+0, %r27 |
| 14981 | .word 0xe1bfe1e0 ! 402: STDFA_I stda %f16, [0x01e0, %r31] |
| 14982 | nop |
| 14983 | ta T_CHANGE_HPRIV |
| 14984 | mov 0x10, %r10 |
| 14985 | set sync_thr_counter6, %r23 |
| 14986 | #ifndef SPC |
| 14987 | ldxa [%g0]0x63, %o1 |
| 14988 | and %o1, 0x38, %o1 |
| 14989 | add %o1, %r23, %r23 |
| 14990 | #endif |
| 14991 | cas [%r23],%g0,%r10 !lock |
| 14992 | brnz %r10, sma_10_304 |
| 14993 | rd %asi, %r12 |
| 14994 | wr %g0, 0x40, %asi |
| 14995 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 14996 | set 0x000e1fff, %g1 |
| 14997 | stxa %g1, [%g0 + 0x80] %asi |
| 14998 | wr %r12, %g0, %asi |
| 14999 | st %g0, [%r23] |
| 15000 | sma_10_304: |
| 15001 | ta T_CHANGE_NONHPRIV |
| 15002 | .word 0xd3e7e012 ! 403: CASA_R casa [%r31] %asi, %r18, %r9 |
| 15003 | pmu_10_305: |
| 15004 | nop |
| 15005 | setx 0xfffffb1afffff5da, %g1, %g7 |
| 15006 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15007 | jmptr_10_306: |
| 15008 | nop |
| 15009 | best_set_reg(0xe0200000, %r20, %r27) |
| 15010 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 15011 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 15012 | #if (defined SPC || defined CMP) |
| 15013 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_308) + 16, 16, 16)) -> intp(4,0,31) |
| 15014 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_308)&0xffffffff) + 16, 16, 16)) -> intp(4,0,31) |
| 15015 | #else |
| 15016 | setx 0xa0a8271189614a58, %r1, %r28 |
| 15017 | stxa %r28, [%g0] 0x73 |
| 15018 | #endif |
| 15019 | intvec_10_308: |
| 15020 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15021 | splash_hpstate_10_309: |
| 15022 | .word 0x81983d5e ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x1d5e, %hpstate |
| 15023 | br_badelay2_10_310: |
| 15024 | .word 0x91a1c9c9 ! 1: FDIVd fdivd %f38, %f40, %f8 |
| 15025 | pdist %f22, %f22, %f18 |
| 15026 | .word 0x99b20312 ! 409: ALIGNADDRESS alignaddr %r8, %r18, %r12 |
| 15027 | splash_cmpr_10_311: |
| 15028 | mov 0, %r18 |
| 15029 | sllx %r18, 63, %r18 |
| 15030 | rd %tick, %r17 |
| 15031 | add %r17, 0x60, %r17 |
| 15032 | or %r17, %r18, %r17 |
| 15033 | ta T_CHANGE_HPRIV |
| 15034 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 15035 | ta T_CHANGE_PRIV |
| 15036 | .word 0xb3800011 ! 410: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 15037 | nop |
| 15038 | ta T_CHANGE_HPRIV |
| 15039 | mov 0x10, %r10 |
| 15040 | set sync_thr_counter6, %r23 |
| 15041 | #ifndef SPC |
| 15042 | ldxa [%g0]0x63, %o1 |
| 15043 | and %o1, 0x38, %o1 |
| 15044 | add %o1, %r23, %r23 |
| 15045 | #endif |
| 15046 | cas [%r23],%g0,%r10 !lock |
| 15047 | brnz %r10, sma_10_312 |
| 15048 | rd %asi, %r12 |
| 15049 | wr %g0, 0x40, %asi |
| 15050 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 15051 | set 0x000a1fff, %g1 |
| 15052 | stxa %g1, [%g0 + 0x80] %asi |
| 15053 | wr %r12, %g0, %asi |
| 15054 | st %g0, [%r23] |
| 15055 | sma_10_312: |
| 15056 | ta T_CHANGE_NONHPRIV |
| 15057 | .word 0xe5e7e00d ! 411: CASA_R casa [%r31] %asi, %r13, %r18 |
| 15058 | #if (defined SPC || defined CMP) |
| 15059 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_313)+40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 15060 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_313)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 15061 | #else |
| 15062 | !! TODO:Generate XIR via RESET_GEN register |
| 15063 | ! setx 0x8900000808, %r16, %r17 |
| 15064 | ! mov 0x2, %r16 |
| 15065 | ! stw %r16, [%r17] |
| 15066 | #endif |
| 15067 | xir_10_313: |
| 15068 | .word 0xa98469f5 ! 412: WR_SET_SOFTINT_I wr %r17, 0x09f5, %set_softint |
| 15069 | memptr_10_314: |
| 15070 | set 0x60140000, %r31 |
| 15071 | .word 0x85846e7b ! 413: WRCCR_I wr %r17, 0x0e7b, %ccr |
| 15072 | .word 0x91948011 ! 414: WRPR_PIL_R wrpr %r18, %r17, %pil |
| 15073 | .word 0x9f803728 ! 415: SIR sir 0x1728 |
| 15074 | nop |
| 15075 | ta T_CHANGE_HPRIV |
| 15076 | mov 0x10+1, %r10 |
| 15077 | set sync_thr_counter5, %r23 |
| 15078 | #ifndef SPC |
| 15079 | ldxa [%g0]0x63, %o1 |
| 15080 | and %o1, 0x38, %o1 |
| 15081 | add %o1, %r23, %r23 |
| 15082 | sllx %o1, 5, %o3 !(CID*256) |
| 15083 | #endif |
| 15084 | cas [%r23],%g0,%r10 !lock |
| 15085 | brnz %r10, cwq_10_316 |
| 15086 | rd %asi, %r12 |
| 15087 | wr %g0, 0x40, %asi |
| 15088 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 15089 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 15090 | cmp %l1, 1 |
| 15091 | bne cwq_10_316 |
| 15092 | set CWQ_BASE, %l6 |
| 15093 | #ifndef SPC |
| 15094 | add %l6, %o3, %l6 |
| 15095 | #endif |
| 15096 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 15097 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 15098 | sllx %l2, 32, %l2 |
| 15099 | stx %l2, [%l6 + 0x0] |
| 15100 | membar #Sync |
| 15101 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 15102 | sub %l2, 0x40, %l2 |
| 15103 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 15104 | wr %r12, %g0, %asi |
| 15105 | st %g0, [%r23] |
| 15106 | cwq_10_316: |
| 15107 | ta T_CHANGE_NONHPRIV |
| 15108 | .word 0x97414000 ! 416: RDPC rd %pc, %r11 |
| 15109 | intveclr_10_317: |
| 15110 | nop |
| 15111 | ta T_CHANGE_HPRIV |
| 15112 | setx 0xda0f04fada17cce2, %r1, %r28 |
| 15113 | stxa %r28, [%g0] 0x72 |
| 15114 | ta T_CHANGE_NONHPRIV |
| 15115 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 15116 | splash_cmpr_10_318: |
| 15117 | mov 0, %r18 |
| 15118 | sllx %r18, 63, %r18 |
| 15119 | rd %tick, %r17 |
| 15120 | add %r17, 0x50, %r17 |
| 15121 | or %r17, %r18, %r17 |
| 15122 | ta T_CHANGE_HPRIV |
| 15123 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 15124 | ta T_CHANGE_PRIV |
| 15125 | .word 0xaf800011 ! 418: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 15126 | setx 0xc751b1d6d49f5582, %r1, %r28 |
| 15127 | stxa %r28, [%g0] 0x73 |
| 15128 | intvec_10_319: |
| 15129 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15130 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 15131 | reduce_priv_lvl_10_320: |
| 15132 | ta T_CHANGE_NONHPRIV ! macro |
| 15133 | mondo_10_321: |
| 15134 | nop |
| 15135 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15136 | stxa %r11, [%r0+0x3c0] %asi |
| 15137 | .word 0x9d940005 ! 421: WRPR_WSTATE_R wrpr %r16, %r5, %wstate |
| 15138 | splash_lsu_10_322: |
| 15139 | nop |
| 15140 | ta T_CHANGE_HPRIV |
| 15141 | set 0xb6820d7a, %r2 |
| 15142 | mov 0x3, %r1 |
| 15143 | sllx %r1, 32, %r1 |
| 15144 | or %r1, %r2, %r2 |
| 15145 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 15146 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 15147 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 15148 | .word 0xda3fe0c2 ! 424: STD_I std %r13, [%r31 + 0x00c2] |
| 15149 | .word 0x91d02032 ! 425: Tcc_I ta icc_or_xcc, %r0 + 50 |
| 15150 | otherw |
| 15151 | mov 0x32, %r30 |
| 15152 | .word 0x83d0001e ! 426: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 15153 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 15154 | .word 0x8d903f51 ! 427: WRPR_PSTATE_I wrpr %r0, 0x1f51, %pstate |
| 15155 | br_badelay2_10_324: |
| 15156 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 15157 | allclean |
| 15158 | .word 0x9bb50310 ! 428: ALIGNADDRESS alignaddr %r20, %r16, %r13 |
| 15159 | setx vahole_target0, %r18, %r27 |
| 15160 | .word 0xd6bfc02c ! 429: STDA_R stda %r11, [%r31 + %r12] 0x01 |
| 15161 | #if (defined SPC || defined CMP) |
| 15162 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_326) + 40, 16, 16)) -> intp(5,0,18) |
| 15163 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_326)&0xffffffff) + 40, 16, 16)) -> intp(5,0,18) |
| 15164 | #else |
| 15165 | setx 0x737e0ec8dba8c6b6, %r1, %r28 |
| 15166 | stxa %r28, [%g0] 0x73 |
| 15167 | #endif |
| 15168 | intvec_10_326: |
| 15169 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15170 | splash_hpstate_10_327: |
| 15171 | ta T_CHANGE_NONHPRIV |
| 15172 | .word 0x81983d8f ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x1d8f, %hpstate |
| 15173 | splash_htba_10_328: |
| 15174 | nop |
| 15175 | ta T_CHANGE_HPRIV |
| 15176 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 15177 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 15178 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 15179 | .word 0x99b4054b ! 434: FCMPEQ16 fcmpeq16 %d16, %d42, %r12 |
| 15180 | donret_10_329: |
| 15181 | nop |
| 15182 | ta T_CHANGE_HPRIV ! macro |
| 15183 | rd %pc, %r12 |
| 15184 | add %r12, (donretarg_10_329-donret_10_329-4), %r12 |
| 15185 | mov 0x38, %r18 |
| 15186 | stxa %r12, [%r18]0x58 |
| 15187 | add %r12, 0x4, %r11 |
| 15188 | wrpr %g0, 0x1, %tl |
| 15189 | wrpr %g0, %r12, %tpc |
| 15190 | wrpr %g0, %r11, %tnpc |
| 15191 | set (0x00c0c028 | (0x88 << 24)), %r13 |
| 15192 | rdpr %tstate, %r16 |
| 15193 | mov 0x1f, %r19 |
| 15194 | and %r19, %r16, %r17 |
| 15195 | andn %r16, %r19, %r16 |
| 15196 | or %r16, %r17, %r20 |
| 15197 | wrpr %r20, %g0, %tstate |
| 15198 | wrhpr %g0, 0x17dd, %htstate |
| 15199 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 15200 | done |
| 15201 | donretarg_10_329: |
| 15202 | .word 0xd8ffe1a9 ! 435: SWAPA_I swapa %r12, [%r31 + 0x01a9] %asi |
| 15203 | .word 0xa7a04d28 ! 436: FsMULd fsmuld %f1, %f8, %f50 |
| 15204 | splash_tba_10_330: |
| 15205 | ta T_CHANGE_PRIV |
| 15206 | setx 0x0000000000380000, %r11, %r12 |
| 15207 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 15208 | nop |
| 15209 | mov 0x80, %g3 |
| 15210 | stxa %g3, [%g3] 0x5f |
| 15211 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 15212 | nop |
| 15213 | mov 0x80, %g3 |
| 15214 | stxa %g3, [%g3] 0x5f |
| 15215 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 15216 | donret_10_331: |
| 15217 | nop |
| 15218 | ta T_CHANGE_HPRIV ! macro |
| 15219 | rd %pc, %r12 |
| 15220 | add %r12, (donretarg_10_331-donret_10_331-4), %r12 |
| 15221 | mov 0x38, %r18 |
| 15222 | stxa %r12, [%r18]0x58 |
| 15223 | add %r12, 0x4, %r11 |
| 15224 | wrpr %g0, 0x1, %tl |
| 15225 | wrpr %g0, %r12, %tpc |
| 15226 | wrpr %g0, %r11, %tnpc |
| 15227 | set (0x00f4932c | (0x89 << 24)), %r13 |
| 15228 | rdpr %tstate, %r16 |
| 15229 | mov 0x1f, %r19 |
| 15230 | and %r19, %r16, %r17 |
| 15231 | andn %r16, %r19, %r16 |
| 15232 | or %r16, %r17, %r20 |
| 15233 | wrpr %r20, %g0, %tstate |
| 15234 | wrhpr %g0, 0x1427, %htstate |
| 15235 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 15236 | .word 0x22cc0001 ! 1: BRZ brz,a,pt %r16,<label_0xc0001> |
| 15237 | done |
| 15238 | donretarg_10_331: |
| 15239 | .word 0xe26fe007 ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x0007] |
| 15240 | donret_10_332: |
| 15241 | nop |
| 15242 | ta T_CHANGE_HPRIV ! macro |
| 15243 | rd %pc, %r12 |
| 15244 | add %r12, (donretarg_10_332-donret_10_332-8), %r12 |
| 15245 | mov 0x38, %r18 |
| 15246 | stxa %r12, [%r18]0x58 |
| 15247 | add %r12, 0x4, %r11 |
| 15248 | wrpr %g0, 0x1, %tl |
| 15249 | wrpr %g0, %r12, %tpc |
| 15250 | wrpr %g0, %r11, %tnpc |
| 15251 | set (0x00650ca3 | (4 << 24)), %r13 |
| 15252 | rdpr %tstate, %r16 |
| 15253 | mov 0x1f, %r19 |
| 15254 | and %r19, %r16, %r17 |
| 15255 | andn %r16, %r19, %r16 |
| 15256 | or %r16, %r17, %r20 |
| 15257 | wrpr %r20, %g0, %tstate |
| 15258 | wrhpr %g0, 0x715, %htstate |
| 15259 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 15260 | retry |
| 15261 | donretarg_10_332: |
| 15262 | .word 0x91a489c8 ! 441: FDIVd fdivd %f18, %f8, %f8 |
| 15263 | setx 0x9722ce3b6d53ea6d, %r1, %r28 |
| 15264 | stxa %r28, [%g0] 0x73 |
| 15265 | intvec_10_333: |
| 15266 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15267 | .word 0xe88fe0a8 ! 443: LDUBA_I lduba [%r31, + 0x00a8] %asi, %r20 |
| 15268 | .word 0xe937e014 ! 444: STQF_I - %f20, [0x0014, %r31] |
| 15269 | ta T_CHANGE_NONHPRIV |
| 15270 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 15271 | .word 0x97b1c7d0 ! 446: PDIST pdistn %d38, %d16, %d42 |
| 15272 | brcommon2_10_336: |
| 15273 | nop |
| 15274 | setx common_target, %r12, %r27 |
| 15275 | ba,a .+12 |
| 15276 | .word 0xa9b7c712 ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f18, %d20 |
| 15277 | ba,a .+8 |
| 15278 | jmpl %r27+0, %r27 |
| 15279 | .word 0xc19fd960 ! 447: LDDFA_R ldda [%r31, %r0], %f0 |
| 15280 | .word 0xa048c013 ! 448: MULX_R mulx %r3, %r19, %r16 |
| 15281 | splash_lsu_10_337: |
| 15282 | nop |
| 15283 | ta T_CHANGE_HPRIV |
| 15284 | set 0x0c784343, %r2 |
| 15285 | mov 0x3, %r1 |
| 15286 | sllx %r1, 32, %r1 |
| 15287 | or %r1, %r2, %r2 |
| 15288 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 15289 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 15290 | mondo_10_338: |
| 15291 | nop |
| 15292 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15293 | ta T_CHANGE_PRIV |
| 15294 | stxa %r18, [%r0+0x3d8] %asi |
| 15295 | .word 0x9d92c009 ! 450: WRPR_WSTATE_R wrpr %r11, %r9, %wstate |
| 15296 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 15297 | splash_hpstate_10_340: |
| 15298 | ta T_CHANGE_NONHPRIV |
| 15299 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> |
| 15300 | .word 0x81982652 ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x0652, %hpstate |
| 15301 | pmu_10_341: |
| 15302 | nop |
| 15303 | ta T_CHANGE_PRIV |
| 15304 | setx 0xffffff68fffff48c, %g1, %g7 |
| 15305 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15306 | .word 0x91d02032 ! 454: Tcc_I ta icc_or_xcc, %r0 + 50 |
| 15307 | .word 0x95a409b2 ! 455: FDIVs fdivs %f16, %f18, %f10 |
| 15308 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 15309 | cwp_10_342: |
| 15310 | set user_data_start, %o7 |
| 15311 | .word 0x93902001 ! 457: WRPR_CWP_I wrpr %r0, 0x0001, %cwp |
| 15312 | jmptr_10_343: |
| 15313 | nop |
| 15314 | best_set_reg(0xe0200000, %r20, %r27) |
| 15315 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 15316 | jmptr_10_344: |
| 15317 | nop |
| 15318 | best_set_reg(0xe0200000, %r20, %r27) |
| 15319 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 15320 | jmptr_10_345: |
| 15321 | nop |
| 15322 | best_set_reg(0xe0200000, %r20, %r27) |
| 15323 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 15324 | .word 0xe71fe020 ! 461: LDDF_I ldd [%r31, 0x0020], %f19 |
| 15325 | brcommon1_10_347: |
| 15326 | nop |
| 15327 | setx common_target, %r12, %r27 |
| 15328 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 15329 | ba,a .+12 |
| 15330 | .word 0xa77021c0 ! 1: POPC_I popc 0x01c0, %r19 |
| 15331 | ba,a .+8 |
| 15332 | jmpl %r27+0, %r27 |
| 15333 | .word 0x9f803f59 ! 462: SIR sir 0x1f59 |
| 15334 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 15335 | ceter_10_349: |
| 15336 | nop |
| 15337 | ta T_CHANGE_HPRIV |
| 15338 | mov 7, %r17 |
| 15339 | sllx %r17, 60, %r17 |
| 15340 | mov 0x18, %r16 |
| 15341 | stxa %r17, [%r16]0x4c |
| 15342 | ta T_CHANGE_NONHPRIV |
| 15343 | .word 0x95410000 ! 464: RDTICK rd %tick, %r10 |
| 15344 | splash_cmpr_10_350: |
| 15345 | mov 0, %r18 |
| 15346 | sllx %r18, 63, %r18 |
| 15347 | rd %tick, %r17 |
| 15348 | add %r17, 0x70, %r17 |
| 15349 | or %r17, %r18, %r17 |
| 15350 | ta T_CHANGE_HPRIV |
| 15351 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 15352 | .word 0xb3800011 ! 465: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 15353 | .word 0xa0818012 ! 466: ADDcc_R addcc %r6, %r18, %r16 |
| 15354 | .word 0xd2800a80 ! 467: LDUWA_R lduwa [%r0, %r0] 0x54, %r9 |
| 15355 | memptr_10_351: |
| 15356 | set user_data_start, %r31 |
| 15357 | .word 0x858470a6 ! 468: WRCCR_I wr %r17, 0x10a6, %ccr |
| 15358 | .word 0xd27fe040 ! 469: SWAP_I swap %r9, [%r31 + 0x0040] |
| 15359 | .word 0x9f803f9d ! 470: SIR sir 0x1f9d |
| 15360 | .word 0x91914012 ! 471: WRPR_PIL_R wrpr %r5, %r18, %pil |
| 15361 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 15362 | jmptr_10_353: |
| 15363 | nop |
| 15364 | best_set_reg(0xe1200000, %r20, %r27) |
| 15365 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 15366 | .word 0x87aa8a50 ! 474: FCMPd fcmpd %fcc<n>, %f10, %f16 |
| 15367 | .word 0xa5a449a1 ! 475: FDIVs fdivs %f17, %f1, %f18 |
| 15368 | #if (defined SPC || defined CMP) |
| 15369 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_356)+16, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 15370 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_356)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x10),1,3) |
| 15371 | #else |
| 15372 | !! TODO:Generate XIR via RESET_GEN register |
| 15373 | ! setx 0x8900000808, %r16, %r17 |
| 15374 | ! mov 0x2, %r16 |
| 15375 | ! stw %r16, [%r17] |
| 15376 | #endif |
| 15377 | xir_10_356: |
| 15378 | .word 0xa9813407 ! 476: WR_SET_SOFTINT_I wr %r4, 0x1407, %set_softint |
| 15379 | trapasi_10_357: |
| 15380 | nop |
| 15381 | mov 0x20, %r1 ! (VA for ASI 0x4c) |
| 15382 | .word 0xd8884980 ! 477: LDUBA_R lduba [%r1, %r0] 0x4c, %r12 |
| 15383 | .word 0xe19fe160 ! 478: LDDFA_I ldda [%r31, 0x0160], %f16 |
| 15384 | donret_10_358: |
| 15385 | nop |
| 15386 | ta T_CHANGE_HPRIV ! macro |
| 15387 | rd %pc, %r12 |
| 15388 | add %r12, (donretarg_10_358-donret_10_358-8), %r12 |
| 15389 | mov 0x38, %r18 |
| 15390 | stxa %r12, [%r18]0x58 |
| 15391 | add %r12, 0x4, %r11 |
| 15392 | wrpr %g0, 0x1, %tl |
| 15393 | wrpr %g0, %r12, %tpc |
| 15394 | wrpr %g0, %r11, %tnpc |
| 15395 | set (0x00e852b0 | (32 << 24)), %r13 |
| 15396 | rdpr %tstate, %r16 |
| 15397 | mov 0x1f, %r19 |
| 15398 | and %r19, %r16, %r17 |
| 15399 | andn %r16, %r19, %r16 |
| 15400 | or %r16, %r17, %r20 |
| 15401 | wrpr %r20, %g0, %tstate |
| 15402 | wrhpr %g0, 0xe88, %htstate |
| 15403 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 15404 | retry |
| 15405 | donretarg_10_358: |
| 15406 | .word 0xd8ffe146 ! 479: SWAPA_I swapa %r12, [%r31 + 0x0146] %asi |
| 15407 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 15408 | mondo_10_360: |
| 15409 | nop |
| 15410 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15411 | stxa %r6, [%r0+0x3c8] %asi |
| 15412 | .word 0x9d90c012 ! 481: WRPR_WSTATE_R wrpr %r3, %r18, %wstate |
| 15413 | .word 0xc19fdc00 ! 482: LDDFA_R ldda [%r31, %r0], %f0 |
| 15414 | br_badelay1_10_361: |
| 15415 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 15416 | .word 0xd937c013 ! 1: STQF_R - %f12, [%r19, %r31] |
| 15417 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15418 | normalw |
| 15419 | .word 0xa7458000 ! 483: RD_SOFTINT_REG rd %softint, %r19 |
| 15420 | .word 0x9f80254e ! 484: SIR sir 0x054e |
| 15421 | .word 0xdb27e051 ! 485: STF_I st %f13, [0x0051, %r31] |
| 15422 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 15423 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 15424 | pmu_10_362: |
| 15425 | nop |
| 15426 | setx 0xfffff99afffff679, %g1, %g7 |
| 15427 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15428 | .word 0x8d902789 ! 489: WRPR_PSTATE_I wrpr %r0, 0x0789, %pstate |
| 15429 | .word 0xda3fc000 ! 490: STD_R std %r13, [%r31 + %r0] |
| 15430 | donret_10_365: |
| 15431 | nop |
| 15432 | ta T_CHANGE_HPRIV ! macro |
| 15433 | rd %pc, %r12 |
| 15434 | add %r12, (donretarg_10_365-donret_10_365-4), %r12 |
| 15435 | mov 0x38, %r18 |
| 15436 | stxa %r12, [%r18]0x58 |
| 15437 | add %r12, 0x4, %r11 |
| 15438 | wrpr %g0, 0x1, %tl |
| 15439 | wrpr %g0, %r12, %tpc |
| 15440 | wrpr %g0, %r11, %tnpc |
| 15441 | set (0x007e9ba1 | (22 << 24)), %r13 |
| 15442 | rdpr %tstate, %r16 |
| 15443 | mov 0x1f, %r19 |
| 15444 | and %r19, %r16, %r17 |
| 15445 | andn %r16, %r19, %r16 |
| 15446 | or %r16, %r17, %r20 |
| 15447 | wrpr %r20, %g0, %tstate |
| 15448 | wrhpr %g0, 0x1d1f, %htstate |
| 15449 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 15450 | done |
| 15451 | donretarg_10_365: |
| 15452 | .word 0xdaffe170 ! 491: SWAPA_I swapa %r13, [%r31 + 0x0170] %asi |
| 15453 | .word 0xdb27e113 ! 492: STF_I st %f13, [0x0113, %r31] |
| 15454 | .word 0xdaffc02b ! 493: SWAPA_R swapa %r13, [%r31 + %r11] 0x01 |
| 15455 | splash_cmpr_10_366: |
| 15456 | mov 0, %r18 |
| 15457 | sllx %r18, 63, %r18 |
| 15458 | rd %tick, %r17 |
| 15459 | add %r17, 0x80, %r17 |
| 15460 | or %r17, %r18, %r17 |
| 15461 | ta T_CHANGE_PRIV |
| 15462 | .word 0xb3800011 ! 494: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 15463 | nop |
| 15464 | mov 0x80, %g3 |
| 15465 | stxa %g3, [%g3] 0x5f |
| 15466 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 15467 | .word 0x9f802ba5 ! 496: SIR sir 0x0ba5 |
| 15468 | pmu_10_367: |
| 15469 | nop |
| 15470 | ta T_CHANGE_PRIV |
| 15471 | setx 0xfffff2fafffff2c7, %g1, %g7 |
| 15472 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15473 | nop |
| 15474 | ta T_CHANGE_HPRIV |
| 15475 | mov 0x10+1, %r10 |
| 15476 | set sync_thr_counter5, %r23 |
| 15477 | #ifndef SPC |
| 15478 | ldxa [%g0]0x63, %o1 |
| 15479 | and %o1, 0x38, %o1 |
| 15480 | add %o1, %r23, %r23 |
| 15481 | sllx %o1, 5, %o3 !(CID*256) |
| 15482 | #endif |
| 15483 | cas [%r23],%g0,%r10 !lock |
| 15484 | brnz %r10, cwq_10_368 |
| 15485 | rd %asi, %r12 |
| 15486 | wr %g0, 0x40, %asi |
| 15487 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 15488 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 15489 | cmp %l1, 1 |
| 15490 | bne cwq_10_368 |
| 15491 | set CWQ_BASE, %l6 |
| 15492 | #ifndef SPC |
| 15493 | add %l6, %o3, %l6 |
| 15494 | #endif |
| 15495 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 15496 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 15497 | sllx %l2, 32, %l2 |
| 15498 | stx %l2, [%l6 + 0x0] |
| 15499 | membar #Sync |
| 15500 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 15501 | sub %l2, 0x40, %l2 |
| 15502 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 15503 | wr %r12, %g0, %asi |
| 15504 | st %g0, [%r23] |
| 15505 | cwq_10_368: |
| 15506 | ta T_CHANGE_NONHPRIV |
| 15507 | .word 0x91414000 ! 498: RDPC rd %pc, %r8 |
| 15508 | change_to_randtl_10_369: |
| 15509 | ta T_CHANGE_HPRIV ! macro |
| 15510 | done_change_to_randtl_10_369: |
| 15511 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 15512 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 15513 | mondo_10_370: |
| 15514 | nop |
| 15515 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15516 | stxa %r5, [%r0+0x3d8] %asi |
| 15517 | .word 0x9d914013 ! 501: WRPR_WSTATE_R wrpr %r5, %r19, %wstate |
| 15518 | nop |
| 15519 | nop |
| 15520 | ta T_CHANGE_PRIV |
| 15521 | wrpr %g0, %g0, %gl |
| 15522 | nop |
| 15523 | nop |
| 15524 | setx join_lbl_0_0, %g1, %g2 |
| 15525 | jmp %g2 |
| 15526 | nop |
| 15527 | fork_lbl_0_4: |
| 15528 | ta T_CHANGE_NONHPRIV |
| 15529 | br_longdelay1_8_0: |
| 15530 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15531 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 15532 | fbge,a,pn %fcc0, skip_8_1 |
| 15533 | fbo skip_8_1 |
| 15534 | .align 1024 |
| 15535 | skip_8_1: |
| 15536 | .word 0xe63fc000 ! 2: STD_R std %r19, [%r31 + %r0] |
| 15537 | nop |
| 15538 | ta T_CHANGE_HPRIV |
| 15539 | mov 0x8, %r10 |
| 15540 | set sync_thr_counter6, %r23 |
| 15541 | #ifndef SPC |
| 15542 | ldxa [%g0]0x63, %o1 |
| 15543 | and %o1, 0x38, %o1 |
| 15544 | add %o1, %r23, %r23 |
| 15545 | #endif |
| 15546 | cas [%r23],%g0,%r10 !lock |
| 15547 | brnz %r10, sma_8_2 |
| 15548 | rd %asi, %r12 |
| 15549 | wr %g0, 0x40, %asi |
| 15550 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 15551 | set 0x001e1fff, %g1 |
| 15552 | stxa %g1, [%g0 + 0x80] %asi |
| 15553 | wr %r12, %g0, %asi |
| 15554 | st %g0, [%r23] |
| 15555 | sma_8_2: |
| 15556 | ta T_CHANGE_NONHPRIV |
| 15557 | .word 0xe7e7e013 ! 3: CASA_R casa [%r31] %asi, %r19, %r19 |
| 15558 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 15559 | reduce_priv_lvl_8_3: |
| 15560 | ta T_CHANGE_NONHPRIV ! macro |
| 15561 | .word 0xa7814014 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r5, %r20, %- |
| 15562 | .word 0x87ac0ac8 ! 6: FCMPEd fcmped %fcc<n>, %f16, %f8 |
| 15563 | vahole_8_5: |
| 15564 | nop |
| 15565 | ta T_CHANGE_NONHPRIV |
| 15566 | setx vahole_target1, %r18, %r27 |
| 15567 | jmpl %r27+0, %r27 |
| 15568 | .word 0xe71fc011 ! 7: LDDF_R ldd [%r31, %r17], %f19 |
| 15569 | memptr_8_6: |
| 15570 | set user_data_start, %r31 |
| 15571 | .word 0x8584681e ! 8: WRCCR_I wr %r17, 0x081e, %ccr |
| 15572 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 15573 | ceter_8_7: |
| 15574 | nop |
| 15575 | ta T_CHANGE_HPRIV |
| 15576 | mov 7, %r17 |
| 15577 | sllx %r17, 60, %r17 |
| 15578 | mov 0x18, %r16 |
| 15579 | stxa %r17, [%r16]0x4c |
| 15580 | .word 0x99410000 ! 10: RDTICK rd %tick, %r12 |
| 15581 | splash_lsu_8_8: |
| 15582 | nop |
| 15583 | ta T_CHANGE_HPRIV |
| 15584 | set 0x61eeb1cc, %r2 |
| 15585 | mov 0x4, %r1 |
| 15586 | sllx %r1, 32, %r1 |
| 15587 | or %r1, %r2, %r2 |
| 15588 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 15589 | ta T_CHANGE_NONHPRIV |
| 15590 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 15591 | brcommon1_8_9: |
| 15592 | nop |
| 15593 | setx common_target, %r12, %r27 |
| 15594 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 15595 | ba,a .+12 |
| 15596 | .word 0xd06fe0c0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x00c0] |
| 15597 | ba,a .+8 |
| 15598 | jmpl %r27+0, %r27 |
| 15599 | .word 0x99a449cb ! 12: FDIVd fdivd %f48, %f42, %f12 |
| 15600 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 15601 | pmu_8_10: |
| 15602 | nop |
| 15603 | setx 0xfffff9aafffff720, %g1, %g7 |
| 15604 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15605 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 15606 | pmu_8_11: |
| 15607 | nop |
| 15608 | ta T_CHANGE_PRIV |
| 15609 | setx 0xfffff39bfffffda3, %g1, %g7 |
| 15610 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15611 | ibp_8_12: |
| 15612 | nop |
| 15613 | .word 0xc19fdf20 ! 17: LDDFA_R ldda [%r31, %r0], %f0 |
| 15614 | ibp_8_13: |
| 15615 | nop |
| 15616 | .word 0xe19fdc00 ! 18: LDDFA_R ldda [%r31, %r0], %f16 |
| 15617 | .word 0xd65fe158 ! 19: LDX_I ldx [%r31 + 0x0158], %r11 |
| 15618 | .word 0xd727e190 ! 20: STF_I st %f11, [0x0190, %r31] |
| 15619 | .word 0x81580000 ! 21: FLUSHW flushw |
| 15620 | #if (defined SPC || defined CMP) |
| 15621 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_14) + 56, 16, 16)) -> intp(0,0,6) |
| 15622 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_14)&0xffffffff) + 56, 16, 16)) -> intp(0,0,6) |
| 15623 | #else |
| 15624 | setx 0x69dd84cdcada6b75, %r1, %r28 |
| 15625 | stxa %r28, [%g0] 0x73 |
| 15626 | #endif |
| 15627 | intvec_8_14: |
| 15628 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15629 | donret_8_15: |
| 15630 | nop |
| 15631 | ta T_CHANGE_HPRIV ! macro |
| 15632 | rd %pc, %r12 |
| 15633 | add %r12, (donretarg_8_15-donret_8_15-4), %r12 |
| 15634 | mov 0x38, %r18 |
| 15635 | stxa %r12, [%r18]0x58 |
| 15636 | add %r12, 0x4, %r11 |
| 15637 | wrpr %g0, 0x1, %tl |
| 15638 | wrpr %g0, %r12, %tpc |
| 15639 | wrpr %g0, %r11, %tnpc |
| 15640 | set (0x003f3122 | (32 << 24)), %r13 |
| 15641 | rdpr %tstate, %r16 |
| 15642 | mov 0x1f, %r19 |
| 15643 | and %r19, %r16, %r17 |
| 15644 | andn %r16, %r19, %r16 |
| 15645 | or %r16, %r17, %r20 |
| 15646 | wrpr %r20, %g0, %tstate |
| 15647 | wrhpr %g0, 0x16d6, %htstate |
| 15648 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 15649 | done |
| 15650 | donretarg_8_15: |
| 15651 | .word 0xd6ffe1c0 ! 23: SWAPA_I swapa %r11, [%r31 + 0x01c0] %asi |
| 15652 | set 0x1b37, %l3 |
| 15653 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 15654 | .word 0x9bb087d3 ! 24: PDIST pdistn %d2, %d50, %d44 |
| 15655 | .word 0xc1bfdf20 ! 25: STDFA_R stda %f0, [%r0, %r31] |
| 15656 | pmu_8_16: |
| 15657 | nop |
| 15658 | ta T_CHANGE_PRIV |
| 15659 | setx 0xfffff9a9fffffaec, %g1, %g7 |
| 15660 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 15661 | vahole_8_17: |
| 15662 | nop |
| 15663 | ta T_CHANGE_NONHPRIV |
| 15664 | setx vahole_target1, %r18, %r27 |
| 15665 | jmpl %r27+0, %r27 |
| 15666 | .word 0xd11fe040 ! 27: LDDF_I ldd [%r31, 0x0040], %f8 |
| 15667 | #if (defined SPC || defined CMP) |
| 15668 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_18)+16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 15669 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_18)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 15670 | #else |
| 15671 | !! TODO:Generate XIR via RESET_GEN register |
| 15672 | ! setx 0x8900000808, %r16, %r17 |
| 15673 | ! mov 0x2, %r16 |
| 15674 | ! stw %r16, [%r17] |
| 15675 | #endif |
| 15676 | xir_8_18: |
| 15677 | .word 0xa9853b30 ! 28: WR_SET_SOFTINT_I wr %r20, 0x1b30, %set_softint |
| 15678 | .word 0xa5a00170 ! 29: FABSq dis not found |
| 15679 | |
| 15680 | donret_8_20: |
| 15681 | nop |
| 15682 | ta T_CHANGE_HPRIV ! macro |
| 15683 | rd %pc, %r12 |
| 15684 | add %r12, (donretarg_8_20-donret_8_20-8), %r12 |
| 15685 | mov 0x38, %r18 |
| 15686 | stxa %r12, [%r18]0x58 |
| 15687 | add %r12, 0x4, %r11 |
| 15688 | wrpr %g0, 0x1, %tl |
| 15689 | wrpr %g0, %r12, %tpc |
| 15690 | wrpr %g0, %r11, %tnpc |
| 15691 | set (0x0088279f | (0x80 << 24)), %r13 |
| 15692 | rdpr %tstate, %r16 |
| 15693 | mov 0x1f, %r19 |
| 15694 | and %r19, %r16, %r17 |
| 15695 | andn %r16, %r19, %r16 |
| 15696 | or %r16, %r17, %r20 |
| 15697 | wrpr %r20, %g0, %tstate |
| 15698 | wrhpr %g0, 0x218, %htstate |
| 15699 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 15700 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 15701 | retry |
| 15702 | donretarg_8_20: |
| 15703 | .word 0xe2ffe058 ! 30: SWAPA_I swapa %r17, [%r31 + 0x0058] %asi |
| 15704 | .word 0xa7808011 ! 31: WR_GRAPHICS_STATUS_REG_R wr %r2, %r17, %- |
| 15705 | #if (defined SPC || defined CMP) |
| 15706 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_22) + 48, 16, 16)) -> intp(3,0,27) |
| 15707 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_22)&0xffffffff) + 48, 16, 16)) -> intp(3,0,27) |
| 15708 | #else |
| 15709 | setx 0x4af81cf6b7f81e8f, %r1, %r28 |
| 15710 | stxa %r28, [%g0] 0x73 |
| 15711 | #endif |
| 15712 | intvec_8_22: |
| 15713 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15714 | memptr_8_23: |
| 15715 | set 0x60740000, %r31 |
| 15716 | .word 0x8581745f ! 33: WRCCR_I wr %r5, 0x145f, %ccr |
| 15717 | unsupttte_8_24: |
| 15718 | nop |
| 15719 | ta T_CHANGE_HPRIV |
| 15720 | mov 1, %r20 |
| 15721 | sllx %r20, 63, %r20 |
| 15722 | or %r20, 2,%r20 |
| 15723 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 15724 | ta T_CHANGE_NONHPRIV |
| 15725 | .word 0xc3ec4026 ! 34: PREFETCHA_R prefetcha [%r17, %r6] 0x01, #one_read |
| 15726 | brcommon3_8_25: |
| 15727 | nop |
| 15728 | setx common_target, %r12, %r27 |
| 15729 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 15730 | ba,a .+12 |
| 15731 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 15732 | ba,a .+8 |
| 15733 | jmpl %r27+0, %r27 |
| 15734 | .word 0xd3e7e011 ! 35: CASA_R casa [%r31] %asi, %r17, %r9 |
| 15735 | jmptr_8_26: |
| 15736 | nop |
| 15737 | best_set_reg(0xe0a00000, %r20, %r27) |
| 15738 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 15739 | splash_cmpr_8_27: |
| 15740 | mov 0, %r18 |
| 15741 | sllx %r18, 63, %r18 |
| 15742 | rd %tick, %r17 |
| 15743 | add %r17, 0x80, %r17 |
| 15744 | or %r17, %r18, %r17 |
| 15745 | ta T_CHANGE_PRIV |
| 15746 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 15747 | splash_cmpr_8_28: |
| 15748 | mov 0, %r18 |
| 15749 | sllx %r18, 63, %r18 |
| 15750 | rd %tick, %r17 |
| 15751 | add %r17, 0x60, %r17 |
| 15752 | or %r17, %r18, %r17 |
| 15753 | ta T_CHANGE_PRIV |
| 15754 | .word 0xb3800011 ! 38: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 15755 | mondo_8_29: |
| 15756 | nop |
| 15757 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15758 | ta T_CHANGE_PRIV |
| 15759 | stxa %r18, [%r0+0x3d0] %asi |
| 15760 | .word 0x9d930011 ! 39: WRPR_WSTATE_R wrpr %r12, %r17, %wstate |
| 15761 | brcommon3_8_30: |
| 15762 | nop |
| 15763 | setx common_target, %r12, %r27 |
| 15764 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 15765 | ba,a .+12 |
| 15766 | .word 0xd26fe160 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0160] |
| 15767 | ba,a .+8 |
| 15768 | jmpl %r27+0, %r27 |
| 15769 | .word 0xd2bfc029 ! 40: STDA_R stda %r9, [%r31 + %r9] 0x01 |
| 15770 | .word 0xd2dfe050 ! 41: LDXA_I ldxa [%r31, + 0x0050] %asi, %r9 |
| 15771 | .word 0xd327e03c ! 42: STF_I st %f9, [0x003c, %r31] |
| 15772 | setx 0x1d8994de613145d8, %r1, %r28 |
| 15773 | stxa %r28, [%g0] 0x73 |
| 15774 | intvec_8_31: |
| 15775 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 15776 | mondo_8_32: |
| 15777 | nop |
| 15778 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15779 | stxa %r20, [%r0+0x3c0] %asi |
| 15780 | .word 0x9d944005 ! 44: WRPR_WSTATE_R wrpr %r17, %r5, %wstate |
| 15781 | ceter_8_33: |
| 15782 | nop |
| 15783 | ta T_CHANGE_HPRIV |
| 15784 | mov 7, %r17 |
| 15785 | sllx %r17, 60, %r17 |
| 15786 | mov 0x18, %r16 |
| 15787 | stxa %r17, [%r16]0x4c |
| 15788 | ta T_CHANGE_NONHPRIV |
| 15789 | .word 0xa1410000 ! 45: RDTICK rd %tick, %r16 |
| 15790 | .word 0x91944004 ! 46: WRPR_PIL_R wrpr %r17, %r4, %pil |
| 15791 | splash_tba_8_35: |
| 15792 | ta T_CHANGE_PRIV |
| 15793 | setx 0x00000000003a0000, %r11, %r12 |
| 15794 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 15795 | mondo_8_36: |
| 15796 | nop |
| 15797 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15798 | ta T_CHANGE_PRIV |
| 15799 | stxa %r12, [%r0+0x3c0] %asi |
| 15800 | .word 0x9d940014 ! 48: WRPR_WSTATE_R wrpr %r16, %r20, %wstate |
| 15801 | .word 0x9f803478 ! 49: SIR sir 0x1478 |
| 15802 | br_longdelay2_8_37: |
| 15803 | .word 0x22c84001 ! 1: BRZ brz,a,pt %r1,<label_0x84001> |
| 15804 | .word 0xa3a7c9ca ! 50: FDIVd fdivd %f62, %f10, %f48 |
| 15805 | splash_cmpr_8_38: |
| 15806 | mov 1, %r18 |
| 15807 | sllx %r18, 63, %r18 |
| 15808 | rd %tick, %r17 |
| 15809 | add %r17, 0x50, %r17 |
| 15810 | or %r17, %r18, %r17 |
| 15811 | ta T_CHANGE_PRIV |
| 15812 | .word 0xaf800011 ! 51: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 15813 | nop |
| 15814 | ta T_CHANGE_HPRIV |
| 15815 | mov 0x8, %r10 |
| 15816 | set sync_thr_counter6, %r23 |
| 15817 | #ifndef SPC |
| 15818 | ldxa [%g0]0x63, %o1 |
| 15819 | and %o1, 0x38, %o1 |
| 15820 | add %o1, %r23, %r23 |
| 15821 | #endif |
| 15822 | cas [%r23],%g0,%r10 !lock |
| 15823 | brnz %r10, sma_8_39 |
| 15824 | rd %asi, %r12 |
| 15825 | wr %g0, 0x40, %asi |
| 15826 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 15827 | set 0x00161fff, %g1 |
| 15828 | stxa %g1, [%g0 + 0x80] %asi |
| 15829 | wr %r12, %g0, %asi |
| 15830 | st %g0, [%r23] |
| 15831 | sma_8_39: |
| 15832 | ta T_CHANGE_NONHPRIV |
| 15833 | .word 0xe3e7e00b ! 52: CASA_R casa [%r31] %asi, %r11, %r17 |
| 15834 | #if (defined SPC || defined CMP) |
| 15835 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_40)+48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 15836 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_40)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 15837 | #else |
| 15838 | !! TODO:Generate XIR via RESET_GEN register |
| 15839 | ! setx 0x8900000808, %r16, %r17 |
| 15840 | ! mov 0x2, %r16 |
| 15841 | ! stw %r16, [%r17] |
| 15842 | #endif |
| 15843 | xir_8_40: |
| 15844 | .word 0xa9853198 ! 53: WR_SET_SOFTINT_I wr %r20, 0x1198, %set_softint |
| 15845 | jmptr_8_41: |
| 15846 | nop |
| 15847 | best_set_reg(0xe0a00000, %r20, %r27) |
| 15848 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 15849 | donret_8_42: |
| 15850 | nop |
| 15851 | ta T_CHANGE_HPRIV ! macro |
| 15852 | rd %pc, %r12 |
| 15853 | add %r12, (donretarg_8_42-donret_8_42-8), %r12 |
| 15854 | mov 0x38, %r18 |
| 15855 | stxa %r12, [%r18]0x58 |
| 15856 | add %r12, 0x4, %r11 |
| 15857 | wrpr %g0, 0x1, %tl |
| 15858 | wrpr %g0, %r12, %tpc |
| 15859 | wrpr %g0, %r11, %tnpc |
| 15860 | set (0x00f58c84 | (22 << 24)), %r13 |
| 15861 | rdpr %tstate, %r16 |
| 15862 | mov 0x1f, %r19 |
| 15863 | and %r19, %r16, %r17 |
| 15864 | andn %r16, %r19, %r16 |
| 15865 | or %r16, %r17, %r20 |
| 15866 | wrpr %r20, %g0, %tstate |
| 15867 | wrhpr %g0, 0x134d, %htstate |
| 15868 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 15869 | retry |
| 15870 | donretarg_8_42: |
| 15871 | .word 0xe26fe126 ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x0126] |
| 15872 | nop |
| 15873 | ta T_CHANGE_HPRIV |
| 15874 | mov 0x8+1, %r10 |
| 15875 | set sync_thr_counter5, %r23 |
| 15876 | #ifndef SPC |
| 15877 | ldxa [%g0]0x63, %o1 |
| 15878 | and %o1, 0x38, %o1 |
| 15879 | add %o1, %r23, %r23 |
| 15880 | sllx %o1, 5, %o3 !(CID*256) |
| 15881 | #endif |
| 15882 | cas [%r23],%g0,%r10 !lock |
| 15883 | brnz %r10, cwq_8_43 |
| 15884 | rd %asi, %r12 |
| 15885 | wr %g0, 0x40, %asi |
| 15886 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 15887 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 15888 | cmp %l1, 1 |
| 15889 | bne cwq_8_43 |
| 15890 | set CWQ_BASE, %l6 |
| 15891 | #ifndef SPC |
| 15892 | add %l6, %o3, %l6 |
| 15893 | #endif |
| 15894 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 15895 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 15896 | sllx %l2, 32, %l2 |
| 15897 | stx %l2, [%l6 + 0x0] |
| 15898 | membar #Sync |
| 15899 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 15900 | sub %l2, 0x40, %l2 |
| 15901 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 15902 | wr %r12, %g0, %asi |
| 15903 | st %g0, [%r23] |
| 15904 | cwq_8_43: |
| 15905 | ta T_CHANGE_NONHPRIV |
| 15906 | .word 0xa9414000 ! 56: RDPC rd %pc, %r20 |
| 15907 | splash_hpstate_8_44: |
| 15908 | .word 0x81983495 ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x1495, %hpstate |
| 15909 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 15910 | .word 0x8d902061 ! 58: WRPR_PSTATE_I wrpr %r0, 0x0061, %pstate |
| 15911 | mondo_8_46: |
| 15912 | nop |
| 15913 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15914 | ta T_CHANGE_PRIV |
| 15915 | stxa %r3, [%r0+0x3e8] %asi |
| 15916 | .word 0x9d92000b ! 59: WRPR_WSTATE_R wrpr %r8, %r11, %wstate |
| 15917 | mondo_8_47: |
| 15918 | nop |
| 15919 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 15920 | ta T_CHANGE_PRIV |
| 15921 | stxa %r17, [%r0+0x3c8] %asi |
| 15922 | .word 0x9d904006 ! 60: WRPR_WSTATE_R wrpr %r1, %r6, %wstate |
| 15923 | splash_hpstate_8_48: |
| 15924 | ta T_CHANGE_NONHPRIV |
| 15925 | .word 0x8198280f ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x080f, %hpstate |
| 15926 | .word 0xd31fe178 ! 62: LDDF_I ldd [%r31, 0x0178], %f9 |
| 15927 | vahole_8_49: |
| 15928 | nop |
| 15929 | ta T_CHANGE_NONHPRIV |
| 15930 | setx vahole_target2, %r18, %r27 |
| 15931 | jmpl %r27+0, %r27 |
| 15932 | .word 0xc1bfe1a0 ! 63: STDFA_I stda %f0, [0x01a0, %r31] |
| 15933 | brcommon1_8_50: |
| 15934 | nop |
| 15935 | setx common_target, %r12, %r27 |
| 15936 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 15937 | ba,a .+12 |
| 15938 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 15939 | ba,a .+8 |
| 15940 | jmpl %r27+0, %r27 |
| 15941 | .word 0xa7b0c7c8 ! 64: PDIST pdistn %d34, %d8, %d50 |
| 15942 | splash_hpstate_8_51: |
| 15943 | ta T_CHANGE_NONHPRIV |
| 15944 | .word 0x81982747 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0747, %hpstate |
| 15945 | .word 0x8d903440 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1440, %pstate |
| 15946 | .word 0xc19fe100 ! 67: LDDFA_I ldda [%r31, 0x0100], %f0 |
| 15947 | br_badelay1_8_54: |
| 15948 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 15949 | .word 0xd337e0b0 ! 1: STQF_I - %f9, [0x00b0, %r31] |
| 15950 | .word 0x93b7c4cc ! 1: FCMPNE32 fcmpne32 %d62, %d12, %r9 |
| 15951 | normalw |
| 15952 | .word 0x95458000 ! 68: RD_SOFTINT_REG rd %softint, %r10 |
| 15953 | .word 0xd82fe006 ! 69: STB_I stb %r12, [%r31 + 0x0006] |
| 15954 | donret_8_55: |
| 15955 | nop |
| 15956 | ta T_CHANGE_HPRIV ! macro |
| 15957 | rd %pc, %r12 |
| 15958 | add %r12, (donretarg_8_55-donret_8_55-4), %r12 |
| 15959 | mov 0x38, %r18 |
| 15960 | stxa %r12, [%r18]0x58 |
| 15961 | add %r12, 0x4, %r11 |
| 15962 | wrpr %g0, 0x1, %tl |
| 15963 | wrpr %g0, %r12, %tpc |
| 15964 | wrpr %g0, %r11, %tnpc |
| 15965 | set (0x0020667a | (0x4f << 24)), %r13 |
| 15966 | rdpr %tstate, %r16 |
| 15967 | mov 0x1f, %r19 |
| 15968 | and %r19, %r16, %r17 |
| 15969 | andn %r16, %r19, %r16 |
| 15970 | or %r16, %r17, %r20 |
| 15971 | wrpr %r20, %g0, %tstate |
| 15972 | wrhpr %g0, 0x18df, %htstate |
| 15973 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 15974 | .word 0x2cccc001 ! 1: BRGZ brgz,a,pt %r19,<label_0xcc001> |
| 15975 | done |
| 15976 | donretarg_8_55: |
| 15977 | .word 0x97a489d2 ! 70: FDIVd fdivd %f18, %f18, %f42 |
| 15978 | nop |
| 15979 | ta T_CHANGE_HPRIV |
| 15980 | mov 0x8, %r10 |
| 15981 | set sync_thr_counter6, %r23 |
| 15982 | #ifndef SPC |
| 15983 | ldxa [%g0]0x63, %o1 |
| 15984 | and %o1, 0x38, %o1 |
| 15985 | add %o1, %r23, %r23 |
| 15986 | #endif |
| 15987 | cas [%r23],%g0,%r10 !lock |
| 15988 | brnz %r10, sma_8_56 |
| 15989 | rd %asi, %r12 |
| 15990 | wr %g0, 0x40, %asi |
| 15991 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 15992 | set 0x00021fff, %g1 |
| 15993 | stxa %g1, [%g0 + 0x80] %asi |
| 15994 | wr %r12, %g0, %asi |
| 15995 | st %g0, [%r23] |
| 15996 | sma_8_56: |
| 15997 | ta T_CHANGE_NONHPRIV |
| 15998 | .word 0xe7e7e012 ! 71: CASA_R casa [%r31] %asi, %r18, %r19 |
| 15999 | .word 0xc19fe1a0 ! 72: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 16000 | mondo_8_57: |
| 16001 | nop |
| 16002 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16003 | stxa %r6, [%r0+0x3d8] %asi |
| 16004 | .word 0x9d91c011 ! 73: WRPR_WSTATE_R wrpr %r7, %r17, %wstate |
| 16005 | nop |
| 16006 | mov 0x80, %g3 |
| 16007 | stxa %g3, [%g3] 0x5f |
| 16008 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 16009 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 16010 | nop |
| 16011 | ta T_CHANGE_HPRIV |
| 16012 | mov 0x8, %r10 |
| 16013 | set sync_thr_counter6, %r23 |
| 16014 | #ifndef SPC |
| 16015 | ldxa [%g0]0x63, %o1 |
| 16016 | and %o1, 0x38, %o1 |
| 16017 | add %o1, %r23, %r23 |
| 16018 | #endif |
| 16019 | cas [%r23],%g0,%r10 !lock |
| 16020 | brnz %r10, sma_8_58 |
| 16021 | rd %asi, %r12 |
| 16022 | wr %g0, 0x40, %asi |
| 16023 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 16024 | set 0x000a1fff, %g1 |
| 16025 | stxa %g1, [%g0 + 0x80] %asi |
| 16026 | wr %r12, %g0, %asi |
| 16027 | st %g0, [%r23] |
| 16028 | sma_8_58: |
| 16029 | ta T_CHANGE_NONHPRIV |
| 16030 | .word 0xe7e7e012 ! 76: CASA_R casa [%r31] %asi, %r18, %r19 |
| 16031 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 16032 | nop |
| 16033 | mov 0x80, %g3 |
| 16034 | stxa %g3, [%g3] 0x5f |
| 16035 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 16036 | .word 0xa953c000 ! 79: RDPR_FQ <illegal instruction> |
| 16037 | donret_8_59: |
| 16038 | nop |
| 16039 | ta T_CHANGE_HPRIV ! macro |
| 16040 | rd %pc, %r12 |
| 16041 | add %r12, (donretarg_8_59-donret_8_59-4), %r12 |
| 16042 | mov 0x38, %r18 |
| 16043 | stxa %r12, [%r18]0x58 |
| 16044 | add %r12, 0x4, %r11 |
| 16045 | wrpr %g0, 0x2, %tl |
| 16046 | wrpr %g0, %r12, %tpc |
| 16047 | wrpr %g0, %r11, %tnpc |
| 16048 | set (0x000a0b44 | (0x89 << 24)), %r13 |
| 16049 | rdpr %tstate, %r16 |
| 16050 | mov 0x1f, %r19 |
| 16051 | and %r19, %r16, %r17 |
| 16052 | andn %r16, %r19, %r16 |
| 16053 | or %r16, %r17, %r20 |
| 16054 | wrpr %r20, %g0, %tstate |
| 16055 | wrhpr %g0, 0x1793, %htstate |
| 16056 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 16057 | done |
| 16058 | donretarg_8_59: |
| 16059 | .word 0xa9a049cd ! 80: FDIVd fdivd %f32, %f44, %f20 |
| 16060 | .word 0xda8fe0e0 ! 81: LDUBA_I lduba [%r31, + 0x00e0] %asi, %r13 |
| 16061 | .word 0xe19fda00 ! 82: LDDFA_R ldda [%r31, %r0], %f16 |
| 16062 | change_to_randtl_8_60: |
| 16063 | ta T_CHANGE_PRIV ! macro |
| 16064 | done_change_to_randtl_8_60: |
| 16065 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16066 | splash_cmpr_8_61: |
| 16067 | mov 0, %r18 |
| 16068 | sllx %r18, 63, %r18 |
| 16069 | rd %tick, %r17 |
| 16070 | add %r17, 0x70, %r17 |
| 16071 | or %r17, %r18, %r17 |
| 16072 | ta T_CHANGE_PRIV |
| 16073 | .word 0xaf800011 ! 84: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 16074 | jmptr_8_62: |
| 16075 | nop |
| 16076 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16077 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 16078 | mondo_8_63: |
| 16079 | nop |
| 16080 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16081 | ta T_CHANGE_PRIV |
| 16082 | stxa %r11, [%r0+0x3d8] %asi |
| 16083 | .word 0x9d918012 ! 86: WRPR_WSTATE_R wrpr %r6, %r18, %wstate |
| 16084 | #if (defined SPC || defined CMP) |
| 16085 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_64)+40, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16086 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_64)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16087 | #else |
| 16088 | !! TODO:Generate XIR via RESET_GEN register |
| 16089 | ! setx 0x8900000808, %r16, %r17 |
| 16090 | ! mov 0x2, %r16 |
| 16091 | ! stw %r16, [%r17] |
| 16092 | #endif |
| 16093 | xir_8_64: |
| 16094 | .word 0xa98461f9 ! 87: WR_SET_SOFTINT_I wr %r17, 0x01f9, %set_softint |
| 16095 | .word 0xdb37e078 ! 88: STQF_I - %f13, [0x0078, %r31] |
| 16096 | mondo_8_65: |
| 16097 | nop |
| 16098 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16099 | ta T_CHANGE_PRIV |
| 16100 | stxa %r8, [%r0+0x3d8] %asi |
| 16101 | .word 0x9d94400a ! 89: WRPR_WSTATE_R wrpr %r17, %r10, %wstate |
| 16102 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 16103 | memptr_8_66: |
| 16104 | set user_data_start, %r31 |
| 16105 | .word 0x8582f032 ! 91: WRCCR_I wr %r11, 0x1032, %ccr |
| 16106 | jmptr_8_67: |
| 16107 | nop |
| 16108 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16109 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 16110 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16111 | reduce_priv_lvl_8_68: |
| 16112 | ta T_CHANGE_NONPRIV ! macro |
| 16113 | otherw |
| 16114 | mov 0xb0, %r30 |
| 16115 | .word 0x91d0001e ! 94: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 16116 | vahole_8_69: |
| 16117 | nop |
| 16118 | ta T_CHANGE_NONHPRIV |
| 16119 | setx vahole_target0, %r18, %r27 |
| 16120 | jmpl %r27+0, %r27 |
| 16121 | .word 0xda9fc033 ! 95: LDDA_R ldda [%r31, %r19] 0x01, %r13 |
| 16122 | pmu_8_70: |
| 16123 | nop |
| 16124 | setx 0xfffff26afffffb7e, %g1, %g7 |
| 16125 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16126 | jmptr_8_71: |
| 16127 | nop |
| 16128 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16129 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 16130 | splash_cmpr_8_72: |
| 16131 | mov 0, %r18 |
| 16132 | sllx %r18, 63, %r18 |
| 16133 | rd %tick, %r17 |
| 16134 | add %r17, 0x50, %r17 |
| 16135 | or %r17, %r18, %r17 |
| 16136 | ta T_CHANGE_HPRIV |
| 16137 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16138 | ta T_CHANGE_PRIV |
| 16139 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16140 | splash_hpstate_8_73: |
| 16141 | .word 0x81983cd7 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x1cd7, %hpstate |
| 16142 | donret_8_74: |
| 16143 | nop |
| 16144 | ta T_CHANGE_HPRIV ! macro |
| 16145 | rd %pc, %r12 |
| 16146 | add %r12, (donretarg_8_74-donret_8_74-8), %r12 |
| 16147 | mov 0x38, %r18 |
| 16148 | stxa %r12, [%r18]0x58 |
| 16149 | add %r12, 0x4, %r11 |
| 16150 | wrpr %g0, 0x1, %tl |
| 16151 | wrpr %g0, %r12, %tpc |
| 16152 | wrpr %g0, %r11, %tnpc |
| 16153 | set (0x00398578 | (4 << 24)), %r13 |
| 16154 | rdpr %tstate, %r16 |
| 16155 | mov 0x1f, %r19 |
| 16156 | and %r19, %r16, %r17 |
| 16157 | andn %r16, %r19, %r16 |
| 16158 | or %r16, %r17, %r20 |
| 16159 | wrpr %r20, %g0, %tstate |
| 16160 | wrhpr %g0, 0x9ce, %htstate |
| 16161 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 16162 | .word 0x2ecd0001 ! 1: BRGEZ brgez,a,pt %r20,<label_0xd0001> |
| 16163 | retry |
| 16164 | donretarg_8_74: |
| 16165 | .word 0xda6fe09f ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x009f] |
| 16166 | change_to_randtl_8_75: |
| 16167 | ta T_CHANGE_HPRIV ! macro |
| 16168 | done_change_to_randtl_8_75: |
| 16169 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16170 | unsupttte_8_76: |
| 16171 | nop |
| 16172 | ta T_CHANGE_HPRIV |
| 16173 | mov 1, %r20 |
| 16174 | sllx %r20, 63, %r20 |
| 16175 | or %r20, 2,%r20 |
| 16176 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 16177 | ta T_CHANGE_NONHPRIV |
| 16178 | .word 0xa1a049c7 ! 102: FDIVd fdivd %f32, %f38, %f16 |
| 16179 | .word 0x8d9028ab ! 103: WRPR_PSTATE_I wrpr %r0, 0x08ab, %pstate |
| 16180 | intveclr_8_78: |
| 16181 | nop |
| 16182 | ta T_CHANGE_HPRIV |
| 16183 | setx 0xfc19fa23b4abf672, %r1, %r28 |
| 16184 | stxa %r28, [%g0] 0x72 |
| 16185 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 16186 | donret_8_79: |
| 16187 | nop |
| 16188 | ta T_CHANGE_HPRIV ! macro |
| 16189 | rd %pc, %r12 |
| 16190 | add %r12, (donretarg_8_79-donret_8_79-4), %r12 |
| 16191 | mov 0x38, %r18 |
| 16192 | stxa %r12, [%r18]0x58 |
| 16193 | add %r12, 0x4, %r11 |
| 16194 | wrpr %g0, 0x2, %tl |
| 16195 | wrpr %g0, %r12, %tpc |
| 16196 | wrpr %g0, %r11, %tnpc |
| 16197 | set (0x0082de9a | (32 << 24)), %r13 |
| 16198 | rdpr %tstate, %r16 |
| 16199 | mov 0x1f, %r19 |
| 16200 | and %r19, %r16, %r17 |
| 16201 | andn %r16, %r19, %r16 |
| 16202 | or %r16, %r17, %r20 |
| 16203 | wrpr %r20, %g0, %tstate |
| 16204 | wrhpr %g0, 0xf6d, %htstate |
| 16205 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 16206 | done |
| 16207 | donretarg_8_79: |
| 16208 | .word 0xa3a489d3 ! 105: FDIVd fdivd %f18, %f50, %f48 |
| 16209 | .word 0xe4d7e1d8 ! 106: LDSHA_I ldsha [%r31, + 0x01d8] %asi, %r18 |
| 16210 | tagged_8_80: |
| 16211 | tsubcctv %r7, 0x1868, %r16 |
| 16212 | .word 0xe407e135 ! 107: LDUW_I lduw [%r31 + 0x0135], %r18 |
| 16213 | nop |
| 16214 | ta T_CHANGE_HPRIV |
| 16215 | mov 0x8+1, %r10 |
| 16216 | set sync_thr_counter5, %r23 |
| 16217 | #ifndef SPC |
| 16218 | ldxa [%g0]0x63, %o1 |
| 16219 | and %o1, 0x38, %o1 |
| 16220 | add %o1, %r23, %r23 |
| 16221 | sllx %o1, 5, %o3 !(CID*256) |
| 16222 | #endif |
| 16223 | cas [%r23],%g0,%r10 !lock |
| 16224 | brnz %r10, cwq_8_81 |
| 16225 | rd %asi, %r12 |
| 16226 | wr %g0, 0x40, %asi |
| 16227 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 16228 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 16229 | cmp %l1, 1 |
| 16230 | bne cwq_8_81 |
| 16231 | set CWQ_BASE, %l6 |
| 16232 | #ifndef SPC |
| 16233 | add %l6, %o3, %l6 |
| 16234 | #endif |
| 16235 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 16236 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 16237 | sllx %l2, 32, %l2 |
| 16238 | stx %l2, [%l6 + 0x0] |
| 16239 | membar #Sync |
| 16240 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 16241 | sub %l2, 0x40, %l2 |
| 16242 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 16243 | wr %r12, %g0, %asi |
| 16244 | st %g0, [%r23] |
| 16245 | cwq_8_81: |
| 16246 | ta T_CHANGE_NONHPRIV |
| 16247 | .word 0x95414000 ! 108: RDPC rd %pc, %r10 |
| 16248 | splash_lsu_8_82: |
| 16249 | nop |
| 16250 | ta T_CHANGE_HPRIV |
| 16251 | set 0xc0641729, %r2 |
| 16252 | mov 0x2, %r1 |
| 16253 | sllx %r1, 32, %r1 |
| 16254 | or %r1, %r2, %r2 |
| 16255 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 16256 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 16257 | splash_cmpr_8_83: |
| 16258 | mov 1, %r18 |
| 16259 | sllx %r18, 63, %r18 |
| 16260 | rd %tick, %r17 |
| 16261 | add %r17, 0x70, %r17 |
| 16262 | or %r17, %r18, %r17 |
| 16263 | ta T_CHANGE_PRIV |
| 16264 | .word 0xaf800011 ! 110: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 16265 | splash_htba_8_84: |
| 16266 | nop |
| 16267 | ta T_CHANGE_HPRIV |
| 16268 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 16269 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 16270 | mondo_8_85: |
| 16271 | nop |
| 16272 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16273 | stxa %r20, [%r0+0x3d0] %asi |
| 16274 | .word 0x9d910012 ! 112: WRPR_WSTATE_R wrpr %r4, %r18, %wstate |
| 16275 | .word 0xc1bfdf20 ! 113: STDFA_R stda %f0, [%r0, %r31] |
| 16276 | .word 0xe19fc2c0 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 16277 | splash_cmpr_8_86: |
| 16278 | mov 0, %r18 |
| 16279 | sllx %r18, 63, %r18 |
| 16280 | rd %tick, %r17 |
| 16281 | add %r17, 0x50, %r17 |
| 16282 | or %r17, %r18, %r17 |
| 16283 | ta T_CHANGE_PRIV |
| 16284 | .word 0xb3800011 ! 115: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16285 | #if (defined SPC || defined CMP) |
| 16286 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_87)+0, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16287 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_87)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16288 | #else |
| 16289 | !! TODO:Generate XIR via RESET_GEN register |
| 16290 | ! setx 0x8900000808, %r16, %r17 |
| 16291 | ! mov 0x2, %r16 |
| 16292 | ! stw %r16, [%r17] |
| 16293 | #endif |
| 16294 | xir_8_87: |
| 16295 | .word 0xa9832005 ! 116: WR_SET_SOFTINT_I wr %r12, 0x0005, %set_softint |
| 16296 | brcommon3_8_88: |
| 16297 | nop |
| 16298 | setx common_target, %r12, %r27 |
| 16299 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 16300 | ba,a .+12 |
| 16301 | .word 0xd137c013 ! 1: STQF_R - %f8, [%r19, %r31] |
| 16302 | ba,a .+8 |
| 16303 | jmpl %r27+0, %r27 |
| 16304 | .word 0xd09fc034 ! 117: LDDA_R ldda [%r31, %r20] 0x01, %r8 |
| 16305 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 16306 | .word 0x8d903359 ! 118: WRPR_PSTATE_I wrpr %r0, 0x1359, %pstate |
| 16307 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16308 | reduce_priv_lvl_8_90: |
| 16309 | ta T_CHANGE_NONPRIV ! macro |
| 16310 | #if (defined SPC || defined CMP) |
| 16311 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_91)+16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16312 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_91)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16313 | #else |
| 16314 | !! TODO:Generate XIR via RESET_GEN register |
| 16315 | ! setx 0x8900000808, %r16, %r17 |
| 16316 | ! mov 0x2, %r16 |
| 16317 | ! stw %r16, [%r17] |
| 16318 | #endif |
| 16319 | xir_8_91: |
| 16320 | .word 0xa984fae3 ! 120: WR_SET_SOFTINT_I wr %r19, 0x1ae3, %set_softint |
| 16321 | splash_cmpr_8_92: |
| 16322 | mov 0, %r18 |
| 16323 | sllx %r18, 63, %r18 |
| 16324 | rd %tick, %r17 |
| 16325 | add %r17, 0x70, %r17 |
| 16326 | or %r17, %r18, %r17 |
| 16327 | .word 0xaf800011 ! 121: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 16328 | .word 0xa7a00162 ! 122: FABSq dis not found |
| 16329 | |
| 16330 | ta T_CHANGE_NONHPRIV |
| 16331 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 16332 | splash_cmpr_8_95: |
| 16333 | mov 1, %r18 |
| 16334 | sllx %r18, 63, %r18 |
| 16335 | rd %tick, %r17 |
| 16336 | add %r17, 0x70, %r17 |
| 16337 | or %r17, %r18, %r17 |
| 16338 | ta T_CHANGE_HPRIV |
| 16339 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16340 | ta T_CHANGE_PRIV |
| 16341 | .word 0xaf800011 ! 124: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 16342 | .word 0xc1bfdb60 ! 125: STDFA_R stda %f0, [%r0, %r31] |
| 16343 | jmptr_8_96: |
| 16344 | nop |
| 16345 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16346 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 16347 | setx 0x5c5019c401e35f25, %r1, %r28 |
| 16348 | stxa %r28, [%g0] 0x73 |
| 16349 | intvec_8_97: |
| 16350 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16351 | pmu_8_98: |
| 16352 | nop |
| 16353 | ta T_CHANGE_PRIV |
| 16354 | setx 0xfffffb1afffff9f8, %g1, %g7 |
| 16355 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16356 | donret_8_99: |
| 16357 | nop |
| 16358 | ta T_CHANGE_HPRIV ! macro |
| 16359 | rd %pc, %r12 |
| 16360 | add %r12, (donretarg_8_99-donret_8_99-4), %r12 |
| 16361 | mov 0x38, %r18 |
| 16362 | stxa %r12, [%r18]0x58 |
| 16363 | add %r12, 0x4, %r11 |
| 16364 | wrpr %g0, 0x2, %tl |
| 16365 | wrpr %g0, %r12, %tpc |
| 16366 | wrpr %g0, %r11, %tnpc |
| 16367 | set (0x003c52dd | (22 << 24)), %r13 |
| 16368 | rdpr %tstate, %r16 |
| 16369 | mov 0x1f, %r19 |
| 16370 | and %r19, %r16, %r17 |
| 16371 | andn %r16, %r19, %r16 |
| 16372 | or %r16, %r17, %r20 |
| 16373 | wrpr %r20, %g0, %tstate |
| 16374 | wrhpr %g0, 0x316, %htstate |
| 16375 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 16376 | done |
| 16377 | donretarg_8_99: |
| 16378 | .word 0x99a449c4 ! 129: FDIVd fdivd %f48, %f4, %f12 |
| 16379 | pmu_8_100: |
| 16380 | nop |
| 16381 | setx 0xfffff7b9ffffff09, %g1, %g7 |
| 16382 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16383 | mondo_8_101: |
| 16384 | nop |
| 16385 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16386 | ta T_CHANGE_PRIV |
| 16387 | stxa %r5, [%r0+0x3d0] %asi |
| 16388 | .word 0x9d92000d ! 131: WRPR_WSTATE_R wrpr %r8, %r13, %wstate |
| 16389 | nop |
| 16390 | ta T_CHANGE_HPRIV |
| 16391 | mov 0x8, %r10 |
| 16392 | set sync_thr_counter6, %r23 |
| 16393 | #ifndef SPC |
| 16394 | ldxa [%g0]0x63, %o1 |
| 16395 | and %o1, 0x38, %o1 |
| 16396 | add %o1, %r23, %r23 |
| 16397 | #endif |
| 16398 | cas [%r23],%g0,%r10 !lock |
| 16399 | brnz %r10, sma_8_102 |
| 16400 | rd %asi, %r12 |
| 16401 | wr %g0, 0x40, %asi |
| 16402 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 16403 | set 0x001a1fff, %g1 |
| 16404 | stxa %g1, [%g0 + 0x80] %asi |
| 16405 | wr %r12, %g0, %asi |
| 16406 | st %g0, [%r23] |
| 16407 | sma_8_102: |
| 16408 | ta T_CHANGE_NONHPRIV |
| 16409 | .word 0xd9e7e008 ! 132: CASA_R casa [%r31] %asi, %r8, %r12 |
| 16410 | .word 0xc1bfc3e0 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 16411 | splash_tba_8_103: |
| 16412 | ta T_CHANGE_PRIV |
| 16413 | setx 0x00000000003a0000, %r11, %r12 |
| 16414 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 16415 | splash_lsu_8_104: |
| 16416 | nop |
| 16417 | ta T_CHANGE_HPRIV |
| 16418 | set 0xaa20c85c, %r2 |
| 16419 | mov 0x2, %r1 |
| 16420 | sllx %r1, 32, %r1 |
| 16421 | or %r1, %r2, %r2 |
| 16422 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 16423 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 16424 | setx 0x6a2079cf9c40dbaf, %r1, %r28 |
| 16425 | stxa %r28, [%g0] 0x73 |
| 16426 | intvec_8_105: |
| 16427 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16428 | change_to_randtl_8_106: |
| 16429 | ta T_CHANGE_PRIV ! macro |
| 16430 | done_change_to_randtl_8_106: |
| 16431 | .word 0x8f902001 ! 137: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 16432 | nop |
| 16433 | ta T_CHANGE_HPRIV |
| 16434 | mov 0x8+1, %r10 |
| 16435 | set sync_thr_counter5, %r23 |
| 16436 | #ifndef SPC |
| 16437 | ldxa [%g0]0x63, %o1 |
| 16438 | and %o1, 0x38, %o1 |
| 16439 | add %o1, %r23, %r23 |
| 16440 | sllx %o1, 5, %o3 !(CID*256) |
| 16441 | #endif |
| 16442 | cas [%r23],%g0,%r10 !lock |
| 16443 | brnz %r10, cwq_8_107 |
| 16444 | rd %asi, %r12 |
| 16445 | wr %g0, 0x40, %asi |
| 16446 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 16447 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 16448 | cmp %l1, 1 |
| 16449 | bne cwq_8_107 |
| 16450 | set CWQ_BASE, %l6 |
| 16451 | #ifndef SPC |
| 16452 | add %l6, %o3, %l6 |
| 16453 | #endif |
| 16454 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 16455 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 16456 | sllx %l2, 32, %l2 |
| 16457 | stx %l2, [%l6 + 0x0] |
| 16458 | membar #Sync |
| 16459 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 16460 | sub %l2, 0x40, %l2 |
| 16461 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 16462 | wr %r12, %g0, %asi |
| 16463 | st %g0, [%r23] |
| 16464 | cwq_8_107: |
| 16465 | ta T_CHANGE_NONHPRIV |
| 16466 | .word 0xa3414000 ! 138: RDPC rd %pc, %r17 |
| 16467 | #if (defined SPC || defined CMP) |
| 16468 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_108)+48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16469 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_108)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16470 | #else |
| 16471 | !! TODO:Generate XIR via RESET_GEN register |
| 16472 | ! setx 0x8900000808, %r16, %r17 |
| 16473 | ! mov 0x2, %r16 |
| 16474 | ! stw %r16, [%r17] |
| 16475 | #endif |
| 16476 | xir_8_108: |
| 16477 | .word 0xa9846ea7 ! 139: WR_SET_SOFTINT_I wr %r17, 0x0ea7, %set_softint |
| 16478 | br_badelay1_8_109: |
| 16479 | .word 0xc36fe040 ! 1: PREFETCH_I prefetch [%r31 + 0x0040], #one_read |
| 16480 | .word 0xd5352d5b ! 1: STQF_I - %f10, [0x0d5b, %r20] |
| 16481 | .word 0x87afca48 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f8 |
| 16482 | normalw |
| 16483 | .word 0x99458000 ! 140: RD_SOFTINT_REG rd %softint, %r12 |
| 16484 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16485 | reduce_priv_lvl_8_110: |
| 16486 | ta T_CHANGE_NONHPRIV ! macro |
| 16487 | vahole_8_111: |
| 16488 | nop |
| 16489 | ta T_CHANGE_NONHPRIV |
| 16490 | setx vahole_target1, %r18, %r27 |
| 16491 | jmpl %r27+0, %r27 |
| 16492 | .word 0x937039f9 ! 142: POPC_I popc 0x19f9, %r9 |
| 16493 | nop |
| 16494 | ta T_CHANGE_HPRIV |
| 16495 | mov 0x8+1, %r10 |
| 16496 | set sync_thr_counter5, %r23 |
| 16497 | #ifndef SPC |
| 16498 | ldxa [%g0]0x63, %o1 |
| 16499 | and %o1, 0x38, %o1 |
| 16500 | add %o1, %r23, %r23 |
| 16501 | sllx %o1, 5, %o3 !(CID*256) |
| 16502 | #endif |
| 16503 | cas [%r23],%g0,%r10 !lock |
| 16504 | brnz %r10, cwq_8_112 |
| 16505 | rd %asi, %r12 |
| 16506 | wr %g0, 0x40, %asi |
| 16507 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 16508 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 16509 | cmp %l1, 1 |
| 16510 | bne cwq_8_112 |
| 16511 | set CWQ_BASE, %l6 |
| 16512 | #ifndef SPC |
| 16513 | add %l6, %o3, %l6 |
| 16514 | #endif |
| 16515 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 16516 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 16517 | sllx %l2, 32, %l2 |
| 16518 | stx %l2, [%l6 + 0x0] |
| 16519 | membar #Sync |
| 16520 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 16521 | sub %l2, 0x40, %l2 |
| 16522 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 16523 | wr %r12, %g0, %asi |
| 16524 | st %g0, [%r23] |
| 16525 | cwq_8_112: |
| 16526 | ta T_CHANGE_NONHPRIV |
| 16527 | .word 0x97414000 ! 143: RDPC rd %pc, %r11 |
| 16528 | .word 0xd91fe1f0 ! 144: LDDF_I ldd [%r31, 0x01f0], %f12 |
| 16529 | setx 0xf9242e0fa3a6ef82, %r1, %r28 |
| 16530 | stxa %r28, [%g0] 0x73 |
| 16531 | intvec_8_113: |
| 16532 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16533 | .word 0xa2d1800b ! 146: UMULcc_R umulcc %r6, %r11, %r17 |
| 16534 | splash_cmpr_8_114: |
| 16535 | mov 0, %r18 |
| 16536 | sllx %r18, 63, %r18 |
| 16537 | rd %tick, %r17 |
| 16538 | add %r17, 0x100, %r17 |
| 16539 | or %r17, %r18, %r17 |
| 16540 | ta T_CHANGE_HPRIV |
| 16541 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16542 | .word 0xb3800011 ! 147: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16543 | mondo_8_115: |
| 16544 | nop |
| 16545 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16546 | ta T_CHANGE_PRIV |
| 16547 | stxa %r6, [%r0+0x3c8] %asi |
| 16548 | .word 0x9d94c00b ! 148: WRPR_WSTATE_R wrpr %r19, %r11, %wstate |
| 16549 | change_to_randtl_8_116: |
| 16550 | ta T_CHANGE_PRIV ! macro |
| 16551 | done_change_to_randtl_8_116: |
| 16552 | .word 0x8f902001 ! 149: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 16553 | change_to_randtl_8_117: |
| 16554 | ta T_CHANGE_HPRIV ! macro |
| 16555 | done_change_to_randtl_8_117: |
| 16556 | .word 0x8f902001 ! 150: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 16557 | #if (defined SPC || defined CMP) |
| 16558 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_118) + 32, 16, 16)) -> intp(0,0,6) |
| 16559 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_118)&0xffffffff) + 32, 16, 16)) -> intp(0,0,6) |
| 16560 | #else |
| 16561 | setx 0xc17b9475912f5465, %r1, %r28 |
| 16562 | stxa %r28, [%g0] 0x73 |
| 16563 | #endif |
| 16564 | intvec_8_118: |
| 16565 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16566 | memptr_8_119: |
| 16567 | set 0x60740000, %r31 |
| 16568 | .word 0x858421bd ! 152: WRCCR_I wr %r16, 0x01bd, %ccr |
| 16569 | nop |
| 16570 | mov 0x80, %g3 |
| 16571 | stxa %g3, [%g3] 0x57 |
| 16572 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 16573 | .word 0x8d902cfa ! 154: WRPR_PSTATE_I wrpr %r0, 0x0cfa, %pstate |
| 16574 | mondo_8_121: |
| 16575 | nop |
| 16576 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16577 | ta T_CHANGE_PRIV |
| 16578 | stxa %r5, [%r0+0x3e0] %asi |
| 16579 | .word 0x9d90c012 ! 155: WRPR_WSTATE_R wrpr %r3, %r18, %wstate |
| 16580 | .word 0x8d903147 ! 156: WRPR_PSTATE_I wrpr %r0, 0x1147, %pstate |
| 16581 | .word 0x91d02033 ! 157: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 16582 | setx 0x2b29454f1a01ccfc, %r1, %r28 |
| 16583 | stxa %r28, [%g0] 0x73 |
| 16584 | intvec_8_123: |
| 16585 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16586 | .word 0xc36b4008 ! 159: PREFETCH_R prefetch [%r13 + %r8], #one_read |
| 16587 | fpinit_8_124: |
| 16588 | nop |
| 16589 | setx fp_data_quads, %r19, %r20 |
| 16590 | ldd [%r20], %f0 |
| 16591 | ldd [%r20+8], %f4 |
| 16592 | ld [%r20+16], %fsr |
| 16593 | ld [%r20+24], %r19 |
| 16594 | wr %r19, %g0, %gsr |
| 16595 | .word 0x87a80a44 ! 160: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 16596 | splash_hpstate_8_125: |
| 16597 | ta T_CHANGE_NONHPRIV |
| 16598 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 16599 | .word 0x819837df ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x17df, %hpstate |
| 16600 | nop |
| 16601 | mov 0x80, %g3 |
| 16602 | stxa %g3, [%g3] 0x5f |
| 16603 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 16604 | nop |
| 16605 | ta T_CHANGE_HPRIV |
| 16606 | mov 0x8, %r10 |
| 16607 | set sync_thr_counter6, %r23 |
| 16608 | #ifndef SPC |
| 16609 | ldxa [%g0]0x63, %o1 |
| 16610 | and %o1, 0x38, %o1 |
| 16611 | add %o1, %r23, %r23 |
| 16612 | #endif |
| 16613 | cas [%r23],%g0,%r10 !lock |
| 16614 | brnz %r10, sma_8_126 |
| 16615 | rd %asi, %r12 |
| 16616 | wr %g0, 0x40, %asi |
| 16617 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 16618 | set 0x001e1fff, %g1 |
| 16619 | stxa %g1, [%g0 + 0x80] %asi |
| 16620 | wr %r12, %g0, %asi |
| 16621 | st %g0, [%r23] |
| 16622 | sma_8_126: |
| 16623 | ta T_CHANGE_NONHPRIV |
| 16624 | .word 0xe1e7e012 ! 163: CASA_R casa [%r31] %asi, %r18, %r16 |
| 16625 | nop |
| 16626 | ta T_CHANGE_HPRIV |
| 16627 | mov 0x8, %r10 |
| 16628 | set sync_thr_counter6, %r23 |
| 16629 | #ifndef SPC |
| 16630 | ldxa [%g0]0x63, %o1 |
| 16631 | and %o1, 0x38, %o1 |
| 16632 | add %o1, %r23, %r23 |
| 16633 | #endif |
| 16634 | cas [%r23],%g0,%r10 !lock |
| 16635 | brnz %r10, sma_8_127 |
| 16636 | rd %asi, %r12 |
| 16637 | wr %g0, 0x40, %asi |
| 16638 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 16639 | set 0x001e1fff, %g1 |
| 16640 | stxa %g1, [%g0 + 0x80] %asi |
| 16641 | wr %r12, %g0, %asi |
| 16642 | st %g0, [%r23] |
| 16643 | sma_8_127: |
| 16644 | ta T_CHANGE_NONHPRIV |
| 16645 | .word 0xe1e7e014 ! 164: CASA_R casa [%r31] %asi, %r20, %r16 |
| 16646 | pmu_8_128: |
| 16647 | nop |
| 16648 | ta T_CHANGE_PRIV |
| 16649 | setx 0xfffffbcffffffaa9, %g1, %g7 |
| 16650 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16651 | splash_cmpr_8_129: |
| 16652 | mov 0, %r18 |
| 16653 | sllx %r18, 63, %r18 |
| 16654 | rd %tick, %r17 |
| 16655 | add %r17, 0x60, %r17 |
| 16656 | or %r17, %r18, %r17 |
| 16657 | ta T_CHANGE_PRIV |
| 16658 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16659 | ceter_8_130: |
| 16660 | nop |
| 16661 | ta T_CHANGE_HPRIV |
| 16662 | mov 6, %r17 |
| 16663 | sllx %r17, 60, %r17 |
| 16664 | mov 0x18, %r16 |
| 16665 | stxa %r17, [%r16]0x4c |
| 16666 | ta T_CHANGE_NONHPRIV |
| 16667 | .word 0x93410000 ! 167: RDTICK rd %tick, %r9 |
| 16668 | jmptr_8_131: |
| 16669 | nop |
| 16670 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16671 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 16672 | .word 0xa768c014 ! 169: SDIVX_R sdivx %r3, %r20, %r19 |
| 16673 | splash_cmpr_8_132: |
| 16674 | mov 1, %r18 |
| 16675 | sllx %r18, 63, %r18 |
| 16676 | rd %tick, %r17 |
| 16677 | add %r17, 0x60, %r17 |
| 16678 | or %r17, %r18, %r17 |
| 16679 | .word 0xb3800011 ! 170: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16680 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 16681 | nop |
| 16682 | ta T_CHANGE_HPRIV |
| 16683 | mov 0x8+1, %r10 |
| 16684 | set sync_thr_counter5, %r23 |
| 16685 | #ifndef SPC |
| 16686 | ldxa [%g0]0x63, %o1 |
| 16687 | and %o1, 0x38, %o1 |
| 16688 | add %o1, %r23, %r23 |
| 16689 | sllx %o1, 5, %o3 !(CID*256) |
| 16690 | #endif |
| 16691 | cas [%r23],%g0,%r10 !lock |
| 16692 | brnz %r10, cwq_8_133 |
| 16693 | rd %asi, %r12 |
| 16694 | wr %g0, 0x40, %asi |
| 16695 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 16696 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 16697 | cmp %l1, 1 |
| 16698 | bne cwq_8_133 |
| 16699 | set CWQ_BASE, %l6 |
| 16700 | #ifndef SPC |
| 16701 | add %l6, %o3, %l6 |
| 16702 | #endif |
| 16703 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 16704 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 16705 | sllx %l2, 32, %l2 |
| 16706 | stx %l2, [%l6 + 0x0] |
| 16707 | membar #Sync |
| 16708 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 16709 | sub %l2, 0x40, %l2 |
| 16710 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 16711 | wr %r12, %g0, %asi |
| 16712 | st %g0, [%r23] |
| 16713 | cwq_8_133: |
| 16714 | ta T_CHANGE_NONHPRIV |
| 16715 | .word 0xa1414000 ! 172: RDPC rd %pc, %r16 |
| 16716 | jmptr_8_134: |
| 16717 | nop |
| 16718 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16719 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 16720 | .word 0xe09fd040 ! 174: LDDA_R ldda [%r31, %r0] 0x82, %r16 |
| 16721 | setx 0x1fc81410f930ee25, %r1, %r28 |
| 16722 | stxa %r28, [%g0] 0x73 |
| 16723 | intvec_8_135: |
| 16724 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16725 | splash_cmpr_8_136: |
| 16726 | mov 0, %r18 |
| 16727 | sllx %r18, 63, %r18 |
| 16728 | rd %tick, %r17 |
| 16729 | add %r17, 0x100, %r17 |
| 16730 | or %r17, %r18, %r17 |
| 16731 | ta T_CHANGE_HPRIV |
| 16732 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16733 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16734 | .word 0xe0d7e1c0 ! 177: LDSHA_I ldsha [%r31, + 0x01c0] %asi, %r16 |
| 16735 | splash_cmpr_8_137: |
| 16736 | mov 1, %r18 |
| 16737 | sllx %r18, 63, %r18 |
| 16738 | rd %tick, %r17 |
| 16739 | add %r17, 0x50, %r17 |
| 16740 | or %r17, %r18, %r17 |
| 16741 | ta T_CHANGE_HPRIV |
| 16742 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16743 | ta T_CHANGE_PRIV |
| 16744 | .word 0xb3800011 ! 178: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16745 | mondo_8_138: |
| 16746 | nop |
| 16747 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16748 | stxa %r19, [%r0+0x3c8] %asi |
| 16749 | .word 0x9d94000d ! 179: WRPR_WSTATE_R wrpr %r16, %r13, %wstate |
| 16750 | change_to_randtl_8_139: |
| 16751 | ta T_CHANGE_HPRIV ! macro |
| 16752 | done_change_to_randtl_8_139: |
| 16753 | .word 0x8f902000 ! 180: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16754 | jmptr_8_140: |
| 16755 | nop |
| 16756 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16757 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 16758 | .word 0x9194c002 ! 182: WRPR_PIL_R wrpr %r19, %r2, %pil |
| 16759 | donret_8_142: |
| 16760 | nop |
| 16761 | ta T_CHANGE_HPRIV ! macro |
| 16762 | rd %pc, %r12 |
| 16763 | add %r12, (donretarg_8_142-donret_8_142-8), %r12 |
| 16764 | mov 0x38, %r18 |
| 16765 | stxa %r12, [%r18]0x58 |
| 16766 | add %r12, 0x4, %r11 |
| 16767 | wrpr %g0, 0x1, %tl |
| 16768 | wrpr %g0, %r12, %tpc |
| 16769 | wrpr %g0, %r11, %tnpc |
| 16770 | set (0x00b2d670 | (16 << 24)), %r13 |
| 16771 | rdpr %tstate, %r16 |
| 16772 | mov 0x1f, %r19 |
| 16773 | and %r19, %r16, %r17 |
| 16774 | andn %r16, %r19, %r16 |
| 16775 | or %r16, %r17, %r20 |
| 16776 | wrpr %r20, %g0, %tstate |
| 16777 | wrhpr %g0, 0x1648, %htstate |
| 16778 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 16779 | retry |
| 16780 | donretarg_8_142: |
| 16781 | .word 0x97a309d2 ! 183: FDIVd fdivd %f12, %f18, %f42 |
| 16782 | .word 0xe6c7e130 ! 184: LDSWA_I ldswa [%r31, + 0x0130] %asi, %r19 |
| 16783 | .word 0xe1bfda00 ! 185: STDFA_R stda %f16, [%r0, %r31] |
| 16784 | .word 0xe6cfe0a8 ! 186: LDSBA_I ldsba [%r31, + 0x00a8] %asi, %r19 |
| 16785 | splash_cmpr_8_143: |
| 16786 | mov 0, %r18 |
| 16787 | sllx %r18, 63, %r18 |
| 16788 | rd %tick, %r17 |
| 16789 | add %r17, 0x60, %r17 |
| 16790 | or %r17, %r18, %r17 |
| 16791 | ta T_CHANGE_HPRIV |
| 16792 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 16793 | .word 0xb3800011 ! 187: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16794 | .word 0xa6814012 ! 188: ADDcc_R addcc %r5, %r18, %r19 |
| 16795 | ibp_8_144: |
| 16796 | nop |
| 16797 | ta T_CHANGE_NONHPRIV |
| 16798 | .word 0xc19fe0c0 ! 189: LDDFA_I ldda [%r31, 0x00c0], %f0 |
| 16799 | ceter_8_145: |
| 16800 | nop |
| 16801 | ta T_CHANGE_HPRIV |
| 16802 | mov 7, %r17 |
| 16803 | sllx %r17, 60, %r17 |
| 16804 | mov 0x18, %r16 |
| 16805 | stxa %r17, [%r16]0x4c |
| 16806 | ta T_CHANGE_NONHPRIV |
| 16807 | .word 0xa5410000 ! 190: RDTICK rd %tick, %r18 |
| 16808 | ceter_8_146: |
| 16809 | nop |
| 16810 | ta T_CHANGE_HPRIV |
| 16811 | mov 7, %r17 |
| 16812 | sllx %r17, 60, %r17 |
| 16813 | mov 0x18, %r16 |
| 16814 | stxa %r17, [%r16]0x4c |
| 16815 | ta T_CHANGE_NONHPRIV |
| 16816 | .word 0x91410000 ! 191: RDTICK rd %tick, %r8 |
| 16817 | setx 0x28534d2129d754eb, %r1, %r28 |
| 16818 | stxa %r28, [%g0] 0x73 |
| 16819 | intvec_8_147: |
| 16820 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16821 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 16822 | .word 0xa3a0016b ! 194: FABSq dis not found |
| 16823 | |
| 16824 | .word 0xe6c7e1a0 ! 195: LDSWA_I ldswa [%r31, + 0x01a0] %asi, %r19 |
| 16825 | splash_lsu_8_150: |
| 16826 | nop |
| 16827 | ta T_CHANGE_HPRIV |
| 16828 | set 0x4335c248, %r2 |
| 16829 | mov 0x5, %r1 |
| 16830 | sllx %r1, 32, %r1 |
| 16831 | or %r1, %r2, %r2 |
| 16832 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 16833 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 16834 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 16835 | reduce_priv_lvl_8_151: |
| 16836 | ta T_CHANGE_NONPRIV ! macro |
| 16837 | .word 0xe65fe1f0 ! 198: LDX_I ldx [%r31 + 0x01f0], %r19 |
| 16838 | splash_hpstate_8_152: |
| 16839 | ta T_CHANGE_NONHPRIV |
| 16840 | .word 0x2aca4001 ! 1: BRNZ brnz,a,pt %r9,<label_0xa4001> |
| 16841 | .word 0x819834c5 ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x14c5, %hpstate |
| 16842 | .word 0xa353c000 ! 200: RDPR_FQ <illegal instruction> |
| 16843 | .word 0x9f803f48 ! 201: SIR sir 0x1f48 |
| 16844 | mondo_8_153: |
| 16845 | nop |
| 16846 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16847 | stxa %r16, [%r0+0x3c0] %asi |
| 16848 | .word 0x9d90c006 ! 202: WRPR_WSTATE_R wrpr %r3, %r6, %wstate |
| 16849 | jmptr_8_154: |
| 16850 | nop |
| 16851 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16852 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 16853 | brgz,pn %r5, skip_8_155 |
| 16854 | .word 0x87acca53 ! 1: FCMPd fcmpd %fcc<n>, %f50, %f50 |
| 16855 | .align 2048 |
| 16856 | skip_8_155: |
| 16857 | .word 0x9ba4c9d3 ! 204: FDIVd fdivd %f50, %f50, %f44 |
| 16858 | pmu_8_156: |
| 16859 | nop |
| 16860 | ta T_CHANGE_PRIV |
| 16861 | setx 0xfffff9b7fffffe79, %g1, %g7 |
| 16862 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16863 | setx 0xeb2364d95f00e926, %r1, %r28 |
| 16864 | stxa %r28, [%g0] 0x73 |
| 16865 | intvec_8_157: |
| 16866 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16867 | .word 0xe677e0da ! 207: STX_I stx %r19, [%r31 + 0x00da] |
| 16868 | brcommon2_8_158: |
| 16869 | nop |
| 16870 | setx common_target, %r12, %r27 |
| 16871 | ba,a .+12 |
| 16872 | .word 0xd110c014 ! 1: LDQF_R - [%r3, %r20], %f8 |
| 16873 | ba,a .+8 |
| 16874 | jmpl %r27+0, %r27 |
| 16875 | .word 0xe1bfe080 ! 208: STDFA_I stda %f16, [0x0080, %r31] |
| 16876 | .word 0xa6fcc00c ! 209: SDIVcc_R sdivcc %r19, %r12, %r19 |
| 16877 | .word 0xd897e160 ! 210: LDUHA_I lduha [%r31, + 0x0160] %asi, %r12 |
| 16878 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 16879 | change_to_randtl_8_159: |
| 16880 | ta T_CHANGE_HPRIV ! macro |
| 16881 | done_change_to_randtl_8_159: |
| 16882 | .word 0x8f902001 ! 212: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 16883 | tagged_8_160: |
| 16884 | tsubcctv %r19, 0x14cf, %r17 |
| 16885 | .word 0xd807e1f2 ! 213: LDUW_I lduw [%r31 + 0x01f2], %r12 |
| 16886 | br_badelay1_8_161: |
| 16887 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 16888 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 16889 | .word 0x87afca52 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f18 |
| 16890 | normalw |
| 16891 | .word 0x95458000 ! 214: RD_SOFTINT_REG rd %softint, %r10 |
| 16892 | pmu_8_162: |
| 16893 | nop |
| 16894 | setx 0xfffff284fffff7ed, %g1, %g7 |
| 16895 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16896 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 16897 | pmu_8_164: |
| 16898 | nop |
| 16899 | ta T_CHANGE_PRIV |
| 16900 | setx 0xfffffcbefffff3c9, %g1, %g7 |
| 16901 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16902 | otherw |
| 16903 | mov 0xb1, %r30 |
| 16904 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 16905 | .word 0xe1bfd960 ! 219: STDFA_R stda %f16, [%r0, %r31] |
| 16906 | .word 0xe1bfdc00 ! 220: STDFA_R stda %f16, [%r0, %r31] |
| 16907 | .word 0xc1bfe1a0 ! 221: STDFA_I stda %f0, [0x01a0, %r31] |
| 16908 | setx 0xad2763f52d762e5d, %r1, %r28 |
| 16909 | stxa %r28, [%g0] 0x73 |
| 16910 | intvec_8_165: |
| 16911 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16912 | br_longdelay1_8_166: |
| 16913 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 16914 | .word 0xbfe7c000 ! 223: SAVE_R save %r31, %r0, %r31 |
| 16915 | nop |
| 16916 | ta T_CHANGE_HPRIV |
| 16917 | mov 0x8, %r10 |
| 16918 | set sync_thr_counter6, %r23 |
| 16919 | #ifndef SPC |
| 16920 | ldxa [%g0]0x63, %o1 |
| 16921 | and %o1, 0x38, %o1 |
| 16922 | add %o1, %r23, %r23 |
| 16923 | #endif |
| 16924 | cas [%r23],%g0,%r10 !lock |
| 16925 | brnz %r10, sma_8_167 |
| 16926 | rd %asi, %r12 |
| 16927 | wr %g0, 0x40, %asi |
| 16928 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 16929 | set 0x00161fff, %g1 |
| 16930 | stxa %g1, [%g0 + 0x80] %asi |
| 16931 | wr %r12, %g0, %asi |
| 16932 | st %g0, [%r23] |
| 16933 | sma_8_167: |
| 16934 | ta T_CHANGE_NONHPRIV |
| 16935 | .word 0xe1e7e013 ! 224: CASA_R casa [%r31] %asi, %r19, %r16 |
| 16936 | jmptr_8_168: |
| 16937 | nop |
| 16938 | best_set_reg(0xe0a00000, %r20, %r27) |
| 16939 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 16940 | setx 0x5d7682297f0d44f9, %r1, %r28 |
| 16941 | stxa %r28, [%g0] 0x73 |
| 16942 | intvec_8_169: |
| 16943 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 16944 | mondo_8_170: |
| 16945 | nop |
| 16946 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16947 | ta T_CHANGE_PRIV |
| 16948 | stxa %r1, [%r0+0x3c0] %asi |
| 16949 | .word 0x9d94c012 ! 227: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 16950 | splash_cmpr_8_171: |
| 16951 | mov 0, %r18 |
| 16952 | sllx %r18, 63, %r18 |
| 16953 | rd %tick, %r17 |
| 16954 | add %r17, 0x50, %r17 |
| 16955 | or %r17, %r18, %r17 |
| 16956 | ta T_CHANGE_PRIV |
| 16957 | .word 0xb3800011 ! 228: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 16958 | pmu_8_172: |
| 16959 | nop |
| 16960 | ta T_CHANGE_PRIV |
| 16961 | setx 0xfffff97bfffff138, %g1, %g7 |
| 16962 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 16963 | splash_lsu_8_173: |
| 16964 | nop |
| 16965 | ta T_CHANGE_HPRIV |
| 16966 | set 0xab7c0853, %r2 |
| 16967 | mov 0x1, %r1 |
| 16968 | sllx %r1, 32, %r1 |
| 16969 | or %r1, %r2, %r2 |
| 16970 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 16971 | ta T_CHANGE_NONHPRIV |
| 16972 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 16973 | mondo_8_174: |
| 16974 | nop |
| 16975 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16976 | ta T_CHANGE_PRIV |
| 16977 | stxa %r20, [%r0+0x3c8] %asi |
| 16978 | .word 0x9d930006 ! 231: WRPR_WSTATE_R wrpr %r12, %r6, %wstate |
| 16979 | memptr_8_175: |
| 16980 | set 0x60740000, %r31 |
| 16981 | .word 0x8584e3ab ! 232: WRCCR_I wr %r19, 0x03ab, %ccr |
| 16982 | mondo_8_176: |
| 16983 | nop |
| 16984 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 16985 | ta T_CHANGE_PRIV |
| 16986 | stxa %r19, [%r0+0x3c8] %asi |
| 16987 | .word 0x9d944012 ! 233: WRPR_WSTATE_R wrpr %r17, %r18, %wstate |
| 16988 | #if (defined SPC || defined CMP) |
| 16989 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_177)+48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16990 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_177)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 16991 | #else |
| 16992 | !! TODO:Generate XIR via RESET_GEN register |
| 16993 | ! setx 0x8900000808, %r16, %r17 |
| 16994 | ! mov 0x2, %r16 |
| 16995 | ! stw %r16, [%r17] |
| 16996 | #endif |
| 16997 | xir_8_177: |
| 16998 | .word 0xa98327c9 ! 234: WR_SET_SOFTINT_I wr %r12, 0x07c9, %set_softint |
| 16999 | splash_lsu_8_178: |
| 17000 | nop |
| 17001 | ta T_CHANGE_HPRIV |
| 17002 | set 0x3417233e, %r2 |
| 17003 | mov 0x5, %r1 |
| 17004 | sllx %r1, 32, %r1 |
| 17005 | or %r1, %r2, %r2 |
| 17006 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 17007 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17008 | pmu_8_179: |
| 17009 | nop |
| 17010 | setx 0xfffff3d9fffffdfd, %g1, %g7 |
| 17011 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17012 | splash_lsu_8_180: |
| 17013 | nop |
| 17014 | ta T_CHANGE_HPRIV |
| 17015 | set 0x87d05510, %r2 |
| 17016 | mov 0x5, %r1 |
| 17017 | sllx %r1, 32, %r1 |
| 17018 | or %r1, %r2, %r2 |
| 17019 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 17020 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17021 | splash_cmpr_8_181: |
| 17022 | mov 0, %r18 |
| 17023 | sllx %r18, 63, %r18 |
| 17024 | rd %tick, %r17 |
| 17025 | add %r17, 0x80, %r17 |
| 17026 | or %r17, %r18, %r17 |
| 17027 | ta T_CHANGE_HPRIV |
| 17028 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17029 | .word 0xb3800011 ! 238: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 17030 | .word 0xe057e178 ! 239: LDSH_I ldsh [%r31 + 0x0178], %r16 |
| 17031 | donret_8_182: |
| 17032 | nop |
| 17033 | ta T_CHANGE_HPRIV ! macro |
| 17034 | rd %pc, %r12 |
| 17035 | add %r12, (donretarg_8_182-donret_8_182-8), %r12 |
| 17036 | mov 0x38, %r18 |
| 17037 | stxa %r12, [%r18]0x58 |
| 17038 | add %r12, 0x4, %r11 |
| 17039 | wrpr %g0, 0x1, %tl |
| 17040 | wrpr %g0, %r12, %tpc |
| 17041 | wrpr %g0, %r11, %tnpc |
| 17042 | set (0x00b8f643 | (22 << 24)), %r13 |
| 17043 | rdpr %tstate, %r16 |
| 17044 | mov 0x1f, %r19 |
| 17045 | and %r19, %r16, %r17 |
| 17046 | andn %r16, %r19, %r16 |
| 17047 | or %r16, %r17, %r20 |
| 17048 | wrpr %r20, %g0, %tstate |
| 17049 | wrhpr %g0, 0x121e, %htstate |
| 17050 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 17051 | retry |
| 17052 | donretarg_8_182: |
| 17053 | .word 0xe0ffe154 ! 240: SWAPA_I swapa %r16, [%r31 + 0x0154] %asi |
| 17054 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 17055 | reduce_priv_lvl_8_183: |
| 17056 | ta T_CHANGE_NONPRIV ! macro |
| 17057 | .word 0xc1bfe1e0 ! 242: STDFA_I stda %f0, [0x01e0, %r31] |
| 17058 | #if (defined SPC || defined CMP) |
| 17059 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_184)+40, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17060 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_184)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17061 | #else |
| 17062 | !! TODO:Generate XIR via RESET_GEN register |
| 17063 | ! setx 0x8900000808, %r16, %r17 |
| 17064 | ! mov 0x2, %r16 |
| 17065 | ! stw %r16, [%r17] |
| 17066 | #endif |
| 17067 | xir_8_184: |
| 17068 | .word 0xa983221f ! 243: WR_SET_SOFTINT_I wr %r12, 0x021f, %set_softint |
| 17069 | unsupttte_8_185: |
| 17070 | nop |
| 17071 | ta T_CHANGE_HPRIV |
| 17072 | mov 1, %r20 |
| 17073 | sllx %r20, 63, %r20 |
| 17074 | or %r20, 2,%r20 |
| 17075 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 17076 | ta T_CHANGE_NONHPRIV |
| 17077 | .word 0x97a509c9 ! 244: FDIVd fdivd %f20, %f40, %f42 |
| 17078 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 17079 | nop |
| 17080 | ta T_CHANGE_HPRIV |
| 17081 | mov 0x8+1, %r10 |
| 17082 | set sync_thr_counter5, %r23 |
| 17083 | #ifndef SPC |
| 17084 | ldxa [%g0]0x63, %o1 |
| 17085 | and %o1, 0x38, %o1 |
| 17086 | add %o1, %r23, %r23 |
| 17087 | sllx %o1, 5, %o3 !(CID*256) |
| 17088 | #endif |
| 17089 | cas [%r23],%g0,%r10 !lock |
| 17090 | brnz %r10, cwq_8_186 |
| 17091 | rd %asi, %r12 |
| 17092 | wr %g0, 0x40, %asi |
| 17093 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17094 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17095 | cmp %l1, 1 |
| 17096 | bne cwq_8_186 |
| 17097 | set CWQ_BASE, %l6 |
| 17098 | #ifndef SPC |
| 17099 | add %l6, %o3, %l6 |
| 17100 | #endif |
| 17101 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17102 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 17103 | sllx %l2, 32, %l2 |
| 17104 | stx %l2, [%l6 + 0x0] |
| 17105 | membar #Sync |
| 17106 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17107 | sub %l2, 0x40, %l2 |
| 17108 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17109 | wr %r12, %g0, %asi |
| 17110 | st %g0, [%r23] |
| 17111 | cwq_8_186: |
| 17112 | ta T_CHANGE_NONHPRIV |
| 17113 | .word 0xa9414000 ! 246: RDPC rd %pc, %r20 |
| 17114 | setx 0x88646b9a2bd631f0, %r1, %r28 |
| 17115 | stxa %r28, [%g0] 0x73 |
| 17116 | intvec_8_187: |
| 17117 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17118 | pmu_8_188: |
| 17119 | nop |
| 17120 | setx 0xfffffc07fffff475, %g1, %g7 |
| 17121 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17122 | splash_cmpr_8_189: |
| 17123 | mov 0, %r18 |
| 17124 | sllx %r18, 63, %r18 |
| 17125 | rd %tick, %r17 |
| 17126 | add %r17, 0x70, %r17 |
| 17127 | or %r17, %r18, %r17 |
| 17128 | ta T_CHANGE_HPRIV |
| 17129 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17130 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 17131 | donret_8_190: |
| 17132 | nop |
| 17133 | ta T_CHANGE_HPRIV ! macro |
| 17134 | rd %pc, %r12 |
| 17135 | add %r12, (donretarg_8_190-donret_8_190-8), %r12 |
| 17136 | mov 0x38, %r18 |
| 17137 | stxa %r12, [%r18]0x58 |
| 17138 | add %r12, 0x4, %r11 |
| 17139 | wrpr %g0, 0x2, %tl |
| 17140 | wrpr %g0, %r12, %tpc |
| 17141 | wrpr %g0, %r11, %tnpc |
| 17142 | set (0x00914cba | (28 << 24)), %r13 |
| 17143 | rdpr %tstate, %r16 |
| 17144 | mov 0x1f, %r19 |
| 17145 | and %r19, %r16, %r17 |
| 17146 | andn %r16, %r19, %r16 |
| 17147 | or %r16, %r17, %r20 |
| 17148 | wrpr %r20, %g0, %tstate |
| 17149 | wrhpr %g0, 0x4d, %htstate |
| 17150 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 17151 | retry |
| 17152 | donretarg_8_190: |
| 17153 | .word 0x93a089cd ! 250: FDIVd fdivd %f2, %f44, %f40 |
| 17154 | memptr_8_191: |
| 17155 | set 0x60140000, %r31 |
| 17156 | .word 0x85806e15 ! 251: WRCCR_I wr %r1, 0x0e15, %ccr |
| 17157 | .word 0xe49fc3c0 ! 252: LDDA_R ldda [%r31, %r0] 0x1e, %r18 |
| 17158 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 17159 | nop |
| 17160 | ta T_CHANGE_HPRIV |
| 17161 | mov 0x8+1, %r10 |
| 17162 | set sync_thr_counter5, %r23 |
| 17163 | #ifndef SPC |
| 17164 | ldxa [%g0]0x63, %o1 |
| 17165 | and %o1, 0x38, %o1 |
| 17166 | add %o1, %r23, %r23 |
| 17167 | sllx %o1, 5, %o3 !(CID*256) |
| 17168 | #endif |
| 17169 | cas [%r23],%g0,%r10 !lock |
| 17170 | brnz %r10, cwq_8_193 |
| 17171 | rd %asi, %r12 |
| 17172 | wr %g0, 0x40, %asi |
| 17173 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17174 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17175 | cmp %l1, 1 |
| 17176 | bne cwq_8_193 |
| 17177 | set CWQ_BASE, %l6 |
| 17178 | #ifndef SPC |
| 17179 | add %l6, %o3, %l6 |
| 17180 | #endif |
| 17181 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17182 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 17183 | sllx %l2, 32, %l2 |
| 17184 | stx %l2, [%l6 + 0x0] |
| 17185 | membar #Sync |
| 17186 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17187 | sub %l2, 0x40, %l2 |
| 17188 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17189 | wr %r12, %g0, %asi |
| 17190 | st %g0, [%r23] |
| 17191 | cwq_8_193: |
| 17192 | ta T_CHANGE_NONHPRIV |
| 17193 | .word 0x93414000 ! 254: RDPC rd %pc, %r9 |
| 17194 | splash_lsu_8_194: |
| 17195 | nop |
| 17196 | ta T_CHANGE_HPRIV |
| 17197 | set 0xae413231, %r2 |
| 17198 | mov 0x3, %r1 |
| 17199 | sllx %r1, 32, %r1 |
| 17200 | or %r1, %r2, %r2 |
| 17201 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 17202 | ta T_CHANGE_NONHPRIV |
| 17203 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17204 | .word 0xa153c000 ! 256: RDPR_FQ <illegal instruction> |
| 17205 | vahole_8_195: |
| 17206 | nop |
| 17207 | ta T_CHANGE_NONHPRIV |
| 17208 | setx vahole_target2, %r18, %r27 |
| 17209 | jmpl %r27+0, %r27 |
| 17210 | .word 0xe91fc012 ! 257: LDDF_R ldd [%r31, %r18], %f20 |
| 17211 | #if (defined SPC || defined CMP) |
| 17212 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_196) + 48, 16, 16)) -> intp(3,0,4) |
| 17213 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_196)&0xffffffff) + 48, 16, 16)) -> intp(3,0,4) |
| 17214 | #else |
| 17215 | setx 0x04e7abdfe7c61367, %r1, %r28 |
| 17216 | stxa %r28, [%g0] 0x73 |
| 17217 | #endif |
| 17218 | intvec_8_196: |
| 17219 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17220 | nop |
| 17221 | ta T_CHANGE_HPRIV |
| 17222 | mov 0x8, %r10 |
| 17223 | set sync_thr_counter6, %r23 |
| 17224 | #ifndef SPC |
| 17225 | ldxa [%g0]0x63, %o1 |
| 17226 | and %o1, 0x38, %o1 |
| 17227 | add %o1, %r23, %r23 |
| 17228 | #endif |
| 17229 | cas [%r23],%g0,%r10 !lock |
| 17230 | brnz %r10, sma_8_197 |
| 17231 | rd %asi, %r12 |
| 17232 | wr %g0, 0x40, %asi |
| 17233 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 17234 | set 0x00061fff, %g1 |
| 17235 | stxa %g1, [%g0 + 0x80] %asi |
| 17236 | wr %r12, %g0, %asi |
| 17237 | st %g0, [%r23] |
| 17238 | sma_8_197: |
| 17239 | ta T_CHANGE_NONHPRIV |
| 17240 | .word 0xe9e7e014 ! 259: CASA_R casa [%r31] %asi, %r20, %r20 |
| 17241 | .word 0xe8c7e0e8 ! 260: LDSWA_I ldswa [%r31, + 0x00e8] %asi, %r20 |
| 17242 | vahole_8_198: |
| 17243 | nop |
| 17244 | ta T_CHANGE_NONHPRIV |
| 17245 | setx vahole_target3, %r18, %r27 |
| 17246 | jmpl %r27+0, %r27 |
| 17247 | .word 0x9bb50487 ! 261: FCMPLE32 fcmple32 %d20, %d38, %r13 |
| 17248 | .word 0xd697e1c0 ! 262: LDUHA_I lduha [%r31, + 0x01c0] %asi, %r11 |
| 17249 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 17250 | .word 0xd68fe1c8 ! 264: LDUBA_I lduba [%r31, + 0x01c8] %asi, %r11 |
| 17251 | pmu_8_199: |
| 17252 | nop |
| 17253 | setx 0xfffff197fffff974, %g1, %g7 |
| 17254 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17255 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 17256 | vahole_8_201: |
| 17257 | nop |
| 17258 | ta T_CHANGE_NONHPRIV |
| 17259 | setx vahole_target1, %r18, %r27 |
| 17260 | jmpl %r27+0, %r27 |
| 17261 | .word 0x9ba089d2 ! 267: FDIVd fdivd %f2, %f18, %f44 |
| 17262 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> |
| 17263 | .word 0x8d903fe6 ! 268: WRPR_PSTATE_I wrpr %r0, 0x1fe6, %pstate |
| 17264 | .word 0xe097e168 ! 269: LDUHA_I lduha [%r31, + 0x0168] %asi, %r16 |
| 17265 | nop |
| 17266 | ta T_CHANGE_HPRIV |
| 17267 | mov 0x8, %r10 |
| 17268 | set sync_thr_counter6, %r23 |
| 17269 | #ifndef SPC |
| 17270 | ldxa [%g0]0x63, %o1 |
| 17271 | and %o1, 0x38, %o1 |
| 17272 | add %o1, %r23, %r23 |
| 17273 | #endif |
| 17274 | cas [%r23],%g0,%r10 !lock |
| 17275 | brnz %r10, sma_8_203 |
| 17276 | rd %asi, %r12 |
| 17277 | wr %g0, 0x40, %asi |
| 17278 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 17279 | set 0x000a1fff, %g1 |
| 17280 | stxa %g1, [%g0 + 0x80] %asi |
| 17281 | wr %r12, %g0, %asi |
| 17282 | st %g0, [%r23] |
| 17283 | sma_8_203: |
| 17284 | ta T_CHANGE_NONHPRIV |
| 17285 | .word 0xe1e7e012 ! 270: CASA_R casa [%r31] %asi, %r18, %r16 |
| 17286 | .word 0xe07fe060 ! 271: SWAP_I swap %r16, [%r31 + 0x0060] |
| 17287 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 17288 | cwp_8_204: |
| 17289 | set user_data_start, %o7 |
| 17290 | .word 0x93902005 ! 273: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 17291 | pmu_8_205: |
| 17292 | nop |
| 17293 | ta T_CHANGE_PRIV |
| 17294 | setx 0xfffff138fffffdf2, %g1, %g7 |
| 17295 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17296 | mondo_8_206: |
| 17297 | nop |
| 17298 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17299 | ta T_CHANGE_PRIV |
| 17300 | stxa %r19, [%r0+0x3c0] %asi |
| 17301 | .word 0x9d904011 ! 275: WRPR_WSTATE_R wrpr %r1, %r17, %wstate |
| 17302 | br_badelay3_8_207: |
| 17303 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 17304 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 17305 | .word 0x99a00546 ! 1: FSQRTd fsqrt |
| 17306 | .word 0xa7a48828 ! 276: FADDs fadds %f18, %f8, %f19 |
| 17307 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 17308 | reduce_priv_lvl_8_208: |
| 17309 | ta T_CHANGE_NONPRIV ! macro |
| 17310 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 17311 | mondo_8_210: |
| 17312 | nop |
| 17313 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17314 | stxa %r17, [%r0+0x3e0] %asi |
| 17315 | .word 0x9d940009 ! 279: WRPR_WSTATE_R wrpr %r16, %r9, %wstate |
| 17316 | donret_8_211: |
| 17317 | nop |
| 17318 | ta T_CHANGE_HPRIV ! macro |
| 17319 | rd %pc, %r12 |
| 17320 | add %r12, (donretarg_8_211-donret_8_211-4), %r12 |
| 17321 | mov 0x38, %r18 |
| 17322 | stxa %r12, [%r18]0x58 |
| 17323 | add %r12, 0x4, %r11 |
| 17324 | wrpr %g0, 0x1, %tl |
| 17325 | wrpr %g0, %r12, %tpc |
| 17326 | wrpr %g0, %r11, %tnpc |
| 17327 | set (0x00d3bb6f | (0x8a << 24)), %r13 |
| 17328 | rdpr %tstate, %r16 |
| 17329 | mov 0x1f, %r19 |
| 17330 | and %r19, %r16, %r17 |
| 17331 | andn %r16, %r19, %r16 |
| 17332 | or %r16, %r17, %r20 |
| 17333 | wrpr %r20, %g0, %tstate |
| 17334 | wrhpr %g0, 0x145d, %htstate |
| 17335 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 17336 | done |
| 17337 | donretarg_8_211: |
| 17338 | .word 0xd86fe1a8 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x01a8] |
| 17339 | donret_8_212: |
| 17340 | nop |
| 17341 | ta T_CHANGE_HPRIV ! macro |
| 17342 | rd %pc, %r12 |
| 17343 | add %r12, (donretarg_8_212-donret_8_212-8), %r12 |
| 17344 | mov 0x38, %r18 |
| 17345 | stxa %r12, [%r18]0x58 |
| 17346 | add %r12, 0x4, %r11 |
| 17347 | wrpr %g0, 0x2, %tl |
| 17348 | wrpr %g0, %r12, %tpc |
| 17349 | wrpr %g0, %r11, %tnpc |
| 17350 | set (0x0057a756 | (22 << 24)), %r13 |
| 17351 | rdpr %tstate, %r16 |
| 17352 | mov 0x1f, %r19 |
| 17353 | and %r19, %r16, %r17 |
| 17354 | andn %r16, %r19, %r16 |
| 17355 | or %r16, %r17, %r20 |
| 17356 | wrpr %r20, %g0, %tstate |
| 17357 | wrhpr %g0, 0x4de, %htstate |
| 17358 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 17359 | retry |
| 17360 | donretarg_8_212: |
| 17361 | .word 0x9ba4c9c9 ! 281: FDIVd fdivd %f50, %f40, %f44 |
| 17362 | brcommon1_8_213: |
| 17363 | nop |
| 17364 | setx common_target, %r12, %r27 |
| 17365 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 17366 | ba,a .+12 |
| 17367 | .word 0xe9e7c028 ! 1: CASA_I casa [%r31] 0x 1, %r8, %r20 |
| 17368 | ba,a .+8 |
| 17369 | jmpl %r27+0, %r27 |
| 17370 | .word 0xa1a249b0 ! 282: FDIVs fdivs %f9, %f16, %f16 |
| 17371 | .word 0xc19fe120 ! 283: LDDFA_I ldda [%r31, 0x0120], %f0 |
| 17372 | .word 0x8d902cc9 ! 284: WRPR_PSTATE_I wrpr %r0, 0x0cc9, %pstate |
| 17373 | splash_cmpr_8_215: |
| 17374 | mov 0, %r18 |
| 17375 | sllx %r18, 63, %r18 |
| 17376 | rd %tick, %r17 |
| 17377 | add %r17, 0x60, %r17 |
| 17378 | or %r17, %r18, %r17 |
| 17379 | ta T_CHANGE_PRIV |
| 17380 | .word 0xaf800011 ! 285: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 17381 | splash_cmpr_8_216: |
| 17382 | mov 0, %r18 |
| 17383 | sllx %r18, 63, %r18 |
| 17384 | rd %tick, %r17 |
| 17385 | add %r17, 0x100, %r17 |
| 17386 | or %r17, %r18, %r17 |
| 17387 | ta T_CHANGE_HPRIV |
| 17388 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17389 | .word 0xaf800011 ! 286: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 17390 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 17391 | reduce_priv_lvl_8_217: |
| 17392 | ta T_CHANGE_NONPRIV ! macro |
| 17393 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17394 | .word 0x8d9038ef ! 288: WRPR_PSTATE_I wrpr %r0, 0x18ef, %pstate |
| 17395 | splash_lsu_8_219: |
| 17396 | nop |
| 17397 | ta T_CHANGE_HPRIV |
| 17398 | set 0xc00e5788, %r2 |
| 17399 | mov 0x5, %r1 |
| 17400 | sllx %r1, 32, %r1 |
| 17401 | or %r1, %r2, %r2 |
| 17402 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 17403 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17404 | donret_8_220: |
| 17405 | nop |
| 17406 | ta T_CHANGE_HPRIV ! macro |
| 17407 | rd %pc, %r12 |
| 17408 | add %r12, (donretarg_8_220-donret_8_220-8), %r12 |
| 17409 | mov 0x38, %r18 |
| 17410 | stxa %r12, [%r18]0x58 |
| 17411 | add %r12, 0x4, %r11 |
| 17412 | wrpr %g0, 0x2, %tl |
| 17413 | wrpr %g0, %r12, %tpc |
| 17414 | wrpr %g0, %r11, %tnpc |
| 17415 | set (0x00638b57 | (0x88 << 24)), %r13 |
| 17416 | rdpr %tstate, %r16 |
| 17417 | mov 0x1f, %r19 |
| 17418 | and %r19, %r16, %r17 |
| 17419 | andn %r16, %r19, %r16 |
| 17420 | or %r16, %r17, %r20 |
| 17421 | wrpr %r20, %g0, %tstate |
| 17422 | wrhpr %g0, 0x48d, %htstate |
| 17423 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 17424 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 17425 | retry |
| 17426 | donretarg_8_220: |
| 17427 | .word 0xd66fe09f ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x009f] |
| 17428 | .word 0x91d02035 ! 291: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 17429 | setx 0xafe6690405eff399, %r1, %r28 |
| 17430 | stxa %r28, [%g0] 0x73 |
| 17431 | intvec_8_221: |
| 17432 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17433 | brcommon3_8_222: |
| 17434 | nop |
| 17435 | setx common_target, %r12, %r27 |
| 17436 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 17437 | ba,a .+12 |
| 17438 | .word 0xd737e090 ! 1: STQF_I - %f11, [0x0090, %r31] |
| 17439 | ba,a .+8 |
| 17440 | jmpl %r27+0, %r27 |
| 17441 | .word 0xd7e7e009 ! 293: CASA_R casa [%r31] %asi, %r9, %r11 |
| 17442 | .word 0xd6d7e1d8 ! 294: LDSHA_I ldsha [%r31, + 0x01d8] %asi, %r11 |
| 17443 | pmu_8_223: |
| 17444 | nop |
| 17445 | ta T_CHANGE_PRIV |
| 17446 | setx 0xffffff48fffff476, %g1, %g7 |
| 17447 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17448 | .word 0xa9a00163 ! 296: FABSq dis not found |
| 17449 | |
| 17450 | #if (defined SPC || defined CMP) |
| 17451 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_225)+48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17452 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_225)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17453 | #else |
| 17454 | !! TODO:Generate XIR via RESET_GEN register |
| 17455 | ! setx 0x8900000808, %r16, %r17 |
| 17456 | ! mov 0x2, %r16 |
| 17457 | ! stw %r16, [%r17] |
| 17458 | #endif |
| 17459 | xir_8_225: |
| 17460 | .word 0xa984f0c2 ! 297: WR_SET_SOFTINT_I wr %r19, 0x10c2, %set_softint |
| 17461 | memptr_8_226: |
| 17462 | set 0x60740000, %r31 |
| 17463 | .word 0x8584ea14 ! 298: WRCCR_I wr %r19, 0x0a14, %ccr |
| 17464 | mondo_8_227: |
| 17465 | nop |
| 17466 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17467 | ta T_CHANGE_PRIV |
| 17468 | stxa %r6, [%r0+0x3d8] %asi |
| 17469 | .word 0x9d920007 ! 299: WRPR_WSTATE_R wrpr %r8, %r7, %wstate |
| 17470 | .word 0xd297e100 ! 300: LDUHA_I lduha [%r31, + 0x0100] %asi, %r9 |
| 17471 | vahole_8_228: |
| 17472 | nop |
| 17473 | ta T_CHANGE_NONHPRIV |
| 17474 | setx vahole_target2, %r18, %r27 |
| 17475 | jmpl %r27+0, %r27 |
| 17476 | .word 0x99a289ad ! 301: FDIVs fdivs %f10, %f13, %f12 |
| 17477 | #if (defined SPC || defined CMP) |
| 17478 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_229)+8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17479 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_229)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17480 | #else |
| 17481 | !! TODO:Generate XIR via RESET_GEN register |
| 17482 | ! setx 0x8900000808, %r16, %r17 |
| 17483 | ! mov 0x2, %r16 |
| 17484 | ! stw %r16, [%r17] |
| 17485 | #endif |
| 17486 | xir_8_229: |
| 17487 | .word 0xa981747f ! 302: WR_SET_SOFTINT_I wr %r5, 0x147f, %set_softint |
| 17488 | .word 0x8d903a4c ! 303: WRPR_PSTATE_I wrpr %r0, 0x1a4c, %pstate |
| 17489 | vahole_8_231: |
| 17490 | nop |
| 17491 | ta T_CHANGE_NONHPRIV |
| 17492 | setx vahole_target0, %r18, %r27 |
| 17493 | jmpl %r27+0, %r27 |
| 17494 | .word 0xe897c02b ! 304: LDUHA_R lduha [%r31, %r11] 0x01, %r20 |
| 17495 | trapasi_8_232: |
| 17496 | nop |
| 17497 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 17498 | .word 0xe8904980 ! 305: LDUHA_R lduha [%r1, %r0] 0x4c, %r20 |
| 17499 | #if (defined SPC || defined CMP) |
| 17500 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_233)+8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17501 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_233)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17502 | #else |
| 17503 | !! TODO:Generate XIR via RESET_GEN register |
| 17504 | ! setx 0x8900000808, %r16, %r17 |
| 17505 | ! mov 0x2, %r16 |
| 17506 | ! stw %r16, [%r17] |
| 17507 | #endif |
| 17508 | xir_8_233: |
| 17509 | .word 0xa9806d41 ! 306: WR_SET_SOFTINT_I wr %r1, 0x0d41, %set_softint |
| 17510 | #if (defined SPC || defined CMP) |
| 17511 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_234) + 0, 16, 16)) -> intp(0,0,8) |
| 17512 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_234)&0xffffffff) + 0, 16, 16)) -> intp(0,0,8) |
| 17513 | #else |
| 17514 | setx 0x21df603e2866927a, %r1, %r28 |
| 17515 | stxa %r28, [%g0] 0x73 |
| 17516 | #endif |
| 17517 | intvec_8_234: |
| 17518 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17519 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 17520 | pmu_8_235: |
| 17521 | nop |
| 17522 | ta T_CHANGE_PRIV |
| 17523 | setx 0xfffffcdafffff264, %g1, %g7 |
| 17524 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17525 | nop |
| 17526 | ta T_CHANGE_HPRIV |
| 17527 | mov 0x8+1, %r10 |
| 17528 | set sync_thr_counter5, %r23 |
| 17529 | #ifndef SPC |
| 17530 | ldxa [%g0]0x63, %o1 |
| 17531 | and %o1, 0x38, %o1 |
| 17532 | add %o1, %r23, %r23 |
| 17533 | sllx %o1, 5, %o3 !(CID*256) |
| 17534 | #endif |
| 17535 | cas [%r23],%g0,%r10 !lock |
| 17536 | brnz %r10, cwq_8_236 |
| 17537 | rd %asi, %r12 |
| 17538 | wr %g0, 0x40, %asi |
| 17539 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17540 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17541 | cmp %l1, 1 |
| 17542 | bne cwq_8_236 |
| 17543 | set CWQ_BASE, %l6 |
| 17544 | #ifndef SPC |
| 17545 | add %l6, %o3, %l6 |
| 17546 | #endif |
| 17547 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17548 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 17549 | sllx %l2, 32, %l2 |
| 17550 | stx %l2, [%l6 + 0x0] |
| 17551 | membar #Sync |
| 17552 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17553 | sub %l2, 0x40, %l2 |
| 17554 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17555 | wr %r12, %g0, %asi |
| 17556 | st %g0, [%r23] |
| 17557 | cwq_8_236: |
| 17558 | ta T_CHANGE_NONHPRIV |
| 17559 | .word 0x97414000 ! 310: RDPC rd %pc, %r11 |
| 17560 | nop |
| 17561 | ta T_CHANGE_HPRIV |
| 17562 | mov 0x8, %r10 |
| 17563 | set sync_thr_counter6, %r23 |
| 17564 | #ifndef SPC |
| 17565 | ldxa [%g0]0x63, %o1 |
| 17566 | and %o1, 0x38, %o1 |
| 17567 | add %o1, %r23, %r23 |
| 17568 | #endif |
| 17569 | cas [%r23],%g0,%r10 !lock |
| 17570 | brnz %r10, sma_8_237 |
| 17571 | rd %asi, %r12 |
| 17572 | wr %g0, 0x40, %asi |
| 17573 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 17574 | set 0x00121fff, %g1 |
| 17575 | stxa %g1, [%g0 + 0x80] %asi |
| 17576 | wr %r12, %g0, %asi |
| 17577 | st %g0, [%r23] |
| 17578 | sma_8_237: |
| 17579 | ta T_CHANGE_NONHPRIV |
| 17580 | .word 0xd1e7e008 ! 311: CASA_R casa [%r31] %asi, %r8, %r8 |
| 17581 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 17582 | reduce_priv_lvl_8_238: |
| 17583 | ta T_CHANGE_NONPRIV ! macro |
| 17584 | nop |
| 17585 | ta T_CHANGE_HPRIV |
| 17586 | mov 0x8, %r10 |
| 17587 | set sync_thr_counter6, %r23 |
| 17588 | #ifndef SPC |
| 17589 | ldxa [%g0]0x63, %o1 |
| 17590 | and %o1, 0x38, %o1 |
| 17591 | add %o1, %r23, %r23 |
| 17592 | #endif |
| 17593 | cas [%r23],%g0,%r10 !lock |
| 17594 | brnz %r10, sma_8_239 |
| 17595 | rd %asi, %r12 |
| 17596 | wr %g0, 0x40, %asi |
| 17597 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 17598 | set 0x00061fff, %g1 |
| 17599 | stxa %g1, [%g0 + 0x80] %asi |
| 17600 | wr %r12, %g0, %asi |
| 17601 | st %g0, [%r23] |
| 17602 | sma_8_239: |
| 17603 | ta T_CHANGE_NONHPRIV |
| 17604 | .word 0xd1e7e013 ! 313: CASA_R casa [%r31] %asi, %r19, %r8 |
| 17605 | .word 0x9f8032e9 ! 314: SIR sir 0x12e9 |
| 17606 | .word 0x91d02033 ! 315: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 17607 | splash_cmpr_8_240: |
| 17608 | mov 0, %r18 |
| 17609 | sllx %r18, 63, %r18 |
| 17610 | rd %tick, %r17 |
| 17611 | add %r17, 0x60, %r17 |
| 17612 | or %r17, %r18, %r17 |
| 17613 | ta T_CHANGE_HPRIV |
| 17614 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17615 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 17616 | mondo_8_241: |
| 17617 | nop |
| 17618 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17619 | stxa %r11, [%r0+0x3c0] %asi |
| 17620 | .word 0x9d948010 ! 317: WRPR_WSTATE_R wrpr %r18, %r16, %wstate |
| 17621 | nop |
| 17622 | mov 0x80, %g3 |
| 17623 | stxa %g3, [%g3] 0x57 |
| 17624 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 17625 | nop |
| 17626 | ta T_CHANGE_HPRIV |
| 17627 | mov 0x8, %r10 |
| 17628 | set sync_thr_counter6, %r23 |
| 17629 | #ifndef SPC |
| 17630 | ldxa [%g0]0x63, %o1 |
| 17631 | and %o1, 0x38, %o1 |
| 17632 | add %o1, %r23, %r23 |
| 17633 | #endif |
| 17634 | cas [%r23],%g0,%r10 !lock |
| 17635 | brnz %r10, sma_8_242 |
| 17636 | rd %asi, %r12 |
| 17637 | wr %g0, 0x40, %asi |
| 17638 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 17639 | set 0x001e1fff, %g1 |
| 17640 | stxa %g1, [%g0 + 0x80] %asi |
| 17641 | wr %r12, %g0, %asi |
| 17642 | st %g0, [%r23] |
| 17643 | sma_8_242: |
| 17644 | ta T_CHANGE_NONHPRIV |
| 17645 | .word 0xd1e7e014 ! 319: CASA_R casa [%r31] %asi, %r20, %r8 |
| 17646 | br_longdelay1_8_243: |
| 17647 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 17648 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 17649 | splash_cmpr_8_244: |
| 17650 | mov 0, %r18 |
| 17651 | sllx %r18, 63, %r18 |
| 17652 | rd %tick, %r17 |
| 17653 | add %r17, 0x70, %r17 |
| 17654 | or %r17, %r18, %r17 |
| 17655 | ta T_CHANGE_HPRIV |
| 17656 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17657 | .word 0xb3800011 ! 321: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 17658 | pmu_8_245: |
| 17659 | nop |
| 17660 | ta T_CHANGE_PRIV |
| 17661 | setx 0xfffff955fffffeb2, %g1, %g7 |
| 17662 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17663 | pmu_8_246: |
| 17664 | nop |
| 17665 | setx 0xfffffa0cfffff281, %g1, %g7 |
| 17666 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17667 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 17668 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 17669 | .word 0xa5a00170 ! 326: FABSq dis not found |
| 17670 | |
| 17671 | mondo_8_249: |
| 17672 | nop |
| 17673 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17674 | stxa %r1, [%r0+0x3c0] %asi |
| 17675 | .word 0x9d944004 ! 327: WRPR_WSTATE_R wrpr %r17, %r4, %wstate |
| 17676 | #if (defined SPC || defined CMP) |
| 17677 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_250) + 24, 16, 16)) -> intp(7,0,8) |
| 17678 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_250)&0xffffffff) + 24, 16, 16)) -> intp(7,0,8) |
| 17679 | #else |
| 17680 | setx 0x831e48f336c95eea, %r1, %r28 |
| 17681 | stxa %r28, [%g0] 0x73 |
| 17682 | #endif |
| 17683 | intvec_8_250: |
| 17684 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17685 | donret_8_251: |
| 17686 | nop |
| 17687 | ta T_CHANGE_HPRIV ! macro |
| 17688 | rd %pc, %r12 |
| 17689 | add %r12, (donretarg_8_251-donret_8_251-4), %r12 |
| 17690 | mov 0x38, %r18 |
| 17691 | stxa %r12, [%r18]0x58 |
| 17692 | add %r12, 0x4, %r11 |
| 17693 | wrpr %g0, 0x1, %tl |
| 17694 | wrpr %g0, %r12, %tpc |
| 17695 | wrpr %g0, %r11, %tnpc |
| 17696 | set (0x00b0340d | (32 << 24)), %r13 |
| 17697 | rdpr %tstate, %r16 |
| 17698 | mov 0x1f, %r19 |
| 17699 | and %r19, %r16, %r17 |
| 17700 | andn %r16, %r19, %r16 |
| 17701 | or %r16, %r17, %r20 |
| 17702 | wrpr %r20, %g0, %tstate |
| 17703 | wrhpr %g0, 0x667, %htstate |
| 17704 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 17705 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 17706 | done |
| 17707 | donretarg_8_251: |
| 17708 | .word 0x95a0c9c7 ! 329: FDIVd fdivd %f34, %f38, %f10 |
| 17709 | .word 0xd4c7e018 ! 330: LDSWA_I ldswa [%r31, + 0x0018] %asi, %r10 |
| 17710 | .word 0xe1bfe120 ! 331: STDFA_I stda %f16, [0x0120, %r31] |
| 17711 | nop |
| 17712 | mov 0x80, %g3 |
| 17713 | stxa %g3, [%g3] 0x57 |
| 17714 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 17715 | br_badelay3_8_252: |
| 17716 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 17717 | .word 0x997c3548 ! Random illegal ? |
| 17718 | .word 0x9ba00551 ! 1: FSQRTd fsqrt |
| 17719 | .word 0x99a40834 ! 333: FADDs fadds %f16, %f20, %f12 |
| 17720 | splash_hpstate_8_253: |
| 17721 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17722 | .word 0x81982c4d ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x0c4d, %hpstate |
| 17723 | mondo_8_254: |
| 17724 | nop |
| 17725 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17726 | ta T_CHANGE_PRIV |
| 17727 | stxa %r17, [%r0+0x3e8] %asi |
| 17728 | .word 0x9d918013 ! 335: WRPR_WSTATE_R wrpr %r6, %r19, %wstate |
| 17729 | .word 0x9f803e3d ! 336: SIR sir 0x1e3d |
| 17730 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 17731 | reduce_priv_lvl_8_255: |
| 17732 | ta T_CHANGE_NONHPRIV ! macro |
| 17733 | .word 0xe277e06a ! 338: STX_I stx %r17, [%r31 + 0x006a] |
| 17734 | pmu_8_256: |
| 17735 | nop |
| 17736 | ta T_CHANGE_PRIV |
| 17737 | setx 0xfffff314fffffddc, %g1, %g7 |
| 17738 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 17739 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 17740 | otherw |
| 17741 | mov 0xb1, %r30 |
| 17742 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 17743 | .word 0xe227e1c6 ! 342: STW_I stw %r17, [%r31 + 0x01c6] |
| 17744 | setx 0x0f5db33647c6787d, %r1, %r28 |
| 17745 | stxa %r28, [%g0] 0x73 |
| 17746 | intvec_8_257: |
| 17747 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17748 | jmptr_8_258: |
| 17749 | nop |
| 17750 | best_set_reg(0xe0a00000, %r20, %r27) |
| 17751 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 17752 | donret_8_259: |
| 17753 | nop |
| 17754 | ta T_CHANGE_HPRIV ! macro |
| 17755 | rd %pc, %r12 |
| 17756 | add %r12, (donretarg_8_259-donret_8_259-4), %r12 |
| 17757 | mov 0x38, %r18 |
| 17758 | stxa %r12, [%r18]0x58 |
| 17759 | add %r12, 0x4, %r11 |
| 17760 | wrpr %g0, 0x2, %tl |
| 17761 | wrpr %g0, %r12, %tpc |
| 17762 | wrpr %g0, %r11, %tnpc |
| 17763 | set (0x005b14a2 | (0x4f << 24)), %r13 |
| 17764 | rdpr %tstate, %r16 |
| 17765 | mov 0x1f, %r19 |
| 17766 | and %r19, %r16, %r17 |
| 17767 | andn %r16, %r19, %r16 |
| 17768 | or %r16, %r17, %r20 |
| 17769 | wrpr %r20, %g0, %tstate |
| 17770 | wrhpr %g0, 0xd13, %htstate |
| 17771 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 17772 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 17773 | done |
| 17774 | donretarg_8_259: |
| 17775 | .word 0x9ba309c7 ! 345: FDIVd fdivd %f12, %f38, %f44 |
| 17776 | jmptr_8_260: |
| 17777 | nop |
| 17778 | best_set_reg(0xe0a00000, %r20, %r27) |
| 17779 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 17780 | .word 0xa1a0016a ! 347: FABSq dis not found |
| 17781 | |
| 17782 | .word 0xa4c36c60 ! 348: ADDCcc_I addccc %r13, 0x0c60, %r18 |
| 17783 | mondo_8_262: |
| 17784 | nop |
| 17785 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 17786 | stxa %r16, [%r0+0x3e8] %asi |
| 17787 | .word 0x9d94c010 ! 349: WRPR_WSTATE_R wrpr %r19, %r16, %wstate |
| 17788 | .word 0x2ecac001 ! 1: BRGEZ brgez,a,pt %r11,<label_0xac001> |
| 17789 | .word 0x8d902c03 ! 350: WRPR_PSTATE_I wrpr %r0, 0x0c03, %pstate |
| 17790 | .word 0xe19fe1a0 ! 351: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 17791 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 17792 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 17793 | reduce_priv_lvl_8_265: |
| 17794 | ta T_CHANGE_NONHPRIV ! macro |
| 17795 | #if (defined SPC || defined CMP) |
| 17796 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_266) + 48, 16, 16)) -> intp(0,0,24) |
| 17797 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_266)&0xffffffff) + 48, 16, 16)) -> intp(0,0,24) |
| 17798 | #else |
| 17799 | setx 0xd67d09c1588f23ae, %r1, %r28 |
| 17800 | stxa %r28, [%g0] 0x73 |
| 17801 | #endif |
| 17802 | intvec_8_266: |
| 17803 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17804 | vahole_8_267: |
| 17805 | nop |
| 17806 | ta T_CHANGE_NONHPRIV |
| 17807 | setx vahole_target1, %r18, %r27 |
| 17808 | jmpl %r27+0, %r27 |
| 17809 | .word 0xe71fe1a0 ! 355: LDDF_I ldd [%r31, 0x01a0], %f19 |
| 17810 | .word 0xc19fe180 ! 356: LDDFA_I ldda [%r31, 0x0180], %f0 |
| 17811 | #if (defined SPC || defined CMP) |
| 17812 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_268)+32, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17813 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_268)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17814 | #else |
| 17815 | !! TODO:Generate XIR via RESET_GEN register |
| 17816 | ! setx 0x8900000808, %r16, %r17 |
| 17817 | ! mov 0x2, %r16 |
| 17818 | ! stw %r16, [%r17] |
| 17819 | #endif |
| 17820 | xir_8_268: |
| 17821 | .word 0xa9812b84 ! 357: WR_SET_SOFTINT_I wr %r4, 0x0b84, %set_softint |
| 17822 | setx 0x25fdec745e9889fb, %r1, %r28 |
| 17823 | stxa %r28, [%g0] 0x73 |
| 17824 | intvec_8_269: |
| 17825 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 17826 | nop |
| 17827 | ta T_CHANGE_HPRIV |
| 17828 | mov 0x8+1, %r10 |
| 17829 | set sync_thr_counter5, %r23 |
| 17830 | #ifndef SPC |
| 17831 | ldxa [%g0]0x63, %o1 |
| 17832 | and %o1, 0x38, %o1 |
| 17833 | add %o1, %r23, %r23 |
| 17834 | sllx %o1, 5, %o3 !(CID*256) |
| 17835 | #endif |
| 17836 | cas [%r23],%g0,%r10 !lock |
| 17837 | brnz %r10, cwq_8_270 |
| 17838 | rd %asi, %r12 |
| 17839 | wr %g0, 0x40, %asi |
| 17840 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17841 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17842 | cmp %l1, 1 |
| 17843 | bne cwq_8_270 |
| 17844 | set CWQ_BASE, %l6 |
| 17845 | #ifndef SPC |
| 17846 | add %l6, %o3, %l6 |
| 17847 | #endif |
| 17848 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17849 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 17850 | sllx %l2, 32, %l2 |
| 17851 | stx %l2, [%l6 + 0x0] |
| 17852 | membar #Sync |
| 17853 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17854 | sub %l2, 0x40, %l2 |
| 17855 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17856 | wr %r12, %g0, %asi |
| 17857 | st %g0, [%r23] |
| 17858 | cwq_8_270: |
| 17859 | ta T_CHANGE_NONHPRIV |
| 17860 | .word 0xa5414000 ! 359: RDPC rd %pc, %r18 |
| 17861 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 17862 | br_longdelay1_8_272: |
| 17863 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 17864 | .word 0x9d97c000 ! 361: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 17865 | fpinit_8_273: |
| 17866 | nop |
| 17867 | setx fp_data_quads, %r19, %r20 |
| 17868 | ldd [%r20], %f0 |
| 17869 | ldd [%r20+8], %f4 |
| 17870 | ld [%r20+16], %fsr |
| 17871 | ld [%r20+24], %r19 |
| 17872 | wr %r19, %g0, %gsr |
| 17873 | .word 0x89a009a4 ! 362: FDIVs fdivs %f0, %f4, %f4 |
| 17874 | jmptr_8_274: |
| 17875 | nop |
| 17876 | best_set_reg(0xe0a00000, %r20, %r27) |
| 17877 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 17878 | ta T_CHANGE_NONHPRIV |
| 17879 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 17880 | intveclr_8_276: |
| 17881 | nop |
| 17882 | ta T_CHANGE_HPRIV |
| 17883 | setx 0xb2b2550ef81af434, %r1, %r28 |
| 17884 | stxa %r28, [%g0] 0x72 |
| 17885 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 17886 | nop |
| 17887 | ta T_CHANGE_HPRIV |
| 17888 | mov 0x8+1, %r10 |
| 17889 | set sync_thr_counter5, %r23 |
| 17890 | #ifndef SPC |
| 17891 | ldxa [%g0]0x63, %o1 |
| 17892 | and %o1, 0x38, %o1 |
| 17893 | add %o1, %r23, %r23 |
| 17894 | sllx %o1, 5, %o3 !(CID*256) |
| 17895 | #endif |
| 17896 | cas [%r23],%g0,%r10 !lock |
| 17897 | brnz %r10, cwq_8_277 |
| 17898 | rd %asi, %r12 |
| 17899 | wr %g0, 0x40, %asi |
| 17900 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17901 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17902 | cmp %l1, 1 |
| 17903 | bne cwq_8_277 |
| 17904 | set CWQ_BASE, %l6 |
| 17905 | #ifndef SPC |
| 17906 | add %l6, %o3, %l6 |
| 17907 | #endif |
| 17908 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17909 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 17910 | sllx %l2, 32, %l2 |
| 17911 | stx %l2, [%l6 + 0x0] |
| 17912 | membar #Sync |
| 17913 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17914 | sub %l2, 0x40, %l2 |
| 17915 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17916 | wr %r12, %g0, %asi |
| 17917 | st %g0, [%r23] |
| 17918 | cwq_8_277: |
| 17919 | ta T_CHANGE_NONHPRIV |
| 17920 | .word 0x91414000 ! 366: RDPC rd %pc, %r8 |
| 17921 | brcommon3_8_278: |
| 17922 | nop |
| 17923 | setx common_target, %r12, %r27 |
| 17924 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 17925 | ba,a .+12 |
| 17926 | .word 0xd937c014 ! 1: STQF_R - %f12, [%r20, %r31] |
| 17927 | ba,a .+8 |
| 17928 | jmpl %r27+0, %r27 |
| 17929 | .word 0xd91fe040 ! 367: LDDF_I ldd [%r31, 0x0040], %f12 |
| 17930 | .word 0xd827e060 ! 368: STW_I stw %r12, [%r31 + 0x0060] |
| 17931 | .word 0xd8c7e1d8 ! 369: LDSWA_I ldswa [%r31, + 0x01d8] %asi, %r12 |
| 17932 | #if (defined SPC || defined CMP) |
| 17933 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_279)+48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17934 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_279)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 17935 | #else |
| 17936 | !! TODO:Generate XIR via RESET_GEN register |
| 17937 | ! setx 0x8900000808, %r16, %r17 |
| 17938 | ! mov 0x2, %r16 |
| 17939 | ! stw %r16, [%r17] |
| 17940 | #endif |
| 17941 | xir_8_279: |
| 17942 | .word 0xa9852c4f ! 370: WR_SET_SOFTINT_I wr %r20, 0x0c4f, %set_softint |
| 17943 | nop |
| 17944 | ta T_CHANGE_HPRIV |
| 17945 | mov 0x8+1, %r10 |
| 17946 | set sync_thr_counter5, %r23 |
| 17947 | #ifndef SPC |
| 17948 | ldxa [%g0]0x63, %o1 |
| 17949 | and %o1, 0x38, %o1 |
| 17950 | add %o1, %r23, %r23 |
| 17951 | sllx %o1, 5, %o3 !(CID*256) |
| 17952 | #endif |
| 17953 | cas [%r23],%g0,%r10 !lock |
| 17954 | brnz %r10, cwq_8_280 |
| 17955 | rd %asi, %r12 |
| 17956 | wr %g0, 0x40, %asi |
| 17957 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 17958 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 17959 | cmp %l1, 1 |
| 17960 | bne cwq_8_280 |
| 17961 | set CWQ_BASE, %l6 |
| 17962 | #ifndef SPC |
| 17963 | add %l6, %o3, %l6 |
| 17964 | #endif |
| 17965 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 17966 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 17967 | sllx %l2, 32, %l2 |
| 17968 | stx %l2, [%l6 + 0x0] |
| 17969 | membar #Sync |
| 17970 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 17971 | sub %l2, 0x40, %l2 |
| 17972 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 17973 | wr %r12, %g0, %asi |
| 17974 | st %g0, [%r23] |
| 17975 | cwq_8_280: |
| 17976 | ta T_CHANGE_NONHPRIV |
| 17977 | .word 0x91414000 ! 371: RDPC rd %pc, %r8 |
| 17978 | .word 0xd4cfe108 ! 372: LDSBA_I ldsba [%r31, + 0x0108] %asi, %r10 |
| 17979 | splash_cmpr_8_281: |
| 17980 | mov 0, %r18 |
| 17981 | sllx %r18, 63, %r18 |
| 17982 | rd %tick, %r17 |
| 17983 | add %r17, 0x80, %r17 |
| 17984 | or %r17, %r18, %r17 |
| 17985 | ta T_CHANGE_HPRIV |
| 17986 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 17987 | .word 0xb3800011 ! 373: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 17988 | nop |
| 17989 | ta T_CHANGE_HPRIV |
| 17990 | mov 0x8, %r10 |
| 17991 | set sync_thr_counter6, %r23 |
| 17992 | #ifndef SPC |
| 17993 | ldxa [%g0]0x63, %o1 |
| 17994 | and %o1, 0x38, %o1 |
| 17995 | add %o1, %r23, %r23 |
| 17996 | #endif |
| 17997 | cas [%r23],%g0,%r10 !lock |
| 17998 | brnz %r10, sma_8_282 |
| 17999 | rd %asi, %r12 |
| 18000 | wr %g0, 0x40, %asi |
| 18001 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 18002 | set 0x00061fff, %g1 |
| 18003 | stxa %g1, [%g0 + 0x80] %asi |
| 18004 | wr %r12, %g0, %asi |
| 18005 | st %g0, [%r23] |
| 18006 | sma_8_282: |
| 18007 | ta T_CHANGE_NONHPRIV |
| 18008 | .word 0xd5e7e00c ! 374: CASA_R casa [%r31] %asi, %r12, %r10 |
| 18009 | br_badelay2_8_283: |
| 18010 | .word 0x9ba509c8 ! 1: FDIVd fdivd %f20, %f8, %f44 |
| 18011 | pdist %f28, %f16, %f30 |
| 18012 | .word 0x99b34314 ! 375: ALIGNADDRESS alignaddr %r13, %r20, %r12 |
| 18013 | .word 0xc19fe020 ! 376: LDDFA_I ldda [%r31, 0x0020], %f0 |
| 18014 | .word 0x9f803766 ! 377: SIR sir 0x1766 |
| 18015 | .word 0xe1bfde00 ! 378: STDFA_R stda %f16, [%r0, %r31] |
| 18016 | .word 0x9ad98004 ! 379: SMULcc_R smulcc %r6, %r4, %r13 |
| 18017 | brgez,pn %r17, skip_8_284 |
| 18018 | fbuge skip_8_284 |
| 18019 | .align 2048 |
| 18020 | skip_8_284: |
| 18021 | .word 0xc30fc000 ! 380: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 18022 | nop |
| 18023 | ta T_CHANGE_HPRIV |
| 18024 | mov 0x8+1, %r10 |
| 18025 | set sync_thr_counter5, %r23 |
| 18026 | #ifndef SPC |
| 18027 | ldxa [%g0]0x63, %o1 |
| 18028 | and %o1, 0x38, %o1 |
| 18029 | add %o1, %r23, %r23 |
| 18030 | sllx %o1, 5, %o3 !(CID*256) |
| 18031 | #endif |
| 18032 | cas [%r23],%g0,%r10 !lock |
| 18033 | brnz %r10, cwq_8_285 |
| 18034 | rd %asi, %r12 |
| 18035 | wr %g0, 0x40, %asi |
| 18036 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 18037 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 18038 | cmp %l1, 1 |
| 18039 | bne cwq_8_285 |
| 18040 | set CWQ_BASE, %l6 |
| 18041 | #ifndef SPC |
| 18042 | add %l6, %o3, %l6 |
| 18043 | #endif |
| 18044 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 18045 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 18046 | sllx %l2, 32, %l2 |
| 18047 | stx %l2, [%l6 + 0x0] |
| 18048 | membar #Sync |
| 18049 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 18050 | sub %l2, 0x40, %l2 |
| 18051 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 18052 | wr %r12, %g0, %asi |
| 18053 | st %g0, [%r23] |
| 18054 | cwq_8_285: |
| 18055 | ta T_CHANGE_NONHPRIV |
| 18056 | .word 0xa5414000 ! 381: RDPC rd %pc, %r18 |
| 18057 | brcommon3_8_286: |
| 18058 | nop |
| 18059 | setx common_target, %r12, %r27 |
| 18060 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 18061 | ba,a .+12 |
| 18062 | .word 0xdb37c013 ! 1: STQF_R - %f13, [%r19, %r31] |
| 18063 | ba,a .+8 |
| 18064 | jmpl %r27+0, %r27 |
| 18065 | .word 0xda9fe1d0 ! 382: LDDA_I ldda [%r31, + 0x01d0] %asi, %r13 |
| 18066 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 18067 | .word 0xdbe7e009 ! 384: CASA_R casa [%r31] %asi, %r9, %r13 |
| 18068 | #if (defined SPC || defined CMP) |
| 18069 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_288) + 0, 16, 16)) -> intp(5,0,13) |
| 18070 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_288)&0xffffffff) + 0, 16, 16)) -> intp(5,0,13) |
| 18071 | #else |
| 18072 | setx 0x0aacfa858dd4e3df, %r1, %r28 |
| 18073 | stxa %r28, [%g0] 0x73 |
| 18074 | #endif |
| 18075 | intvec_8_288: |
| 18076 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18077 | tagged_8_289: |
| 18078 | taddcctv %r0, 0x13a8, %r3 |
| 18079 | .word 0xda07e0ec ! 386: LDUW_I lduw [%r31 + 0x00ec], %r13 |
| 18080 | ibp_8_290: |
| 18081 | nop |
| 18082 | .word 0xe1bfdb60 ! 387: STDFA_R stda %f16, [%r0, %r31] |
| 18083 | cwp_8_291: |
| 18084 | set user_data_start, %o7 |
| 18085 | .word 0x93902003 ! 388: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 18086 | pmu_8_292: |
| 18087 | nop |
| 18088 | ta T_CHANGE_PRIV |
| 18089 | setx 0xfffffc84fffff34b, %g1, %g7 |
| 18090 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18091 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 18092 | reduce_priv_lvl_8_293: |
| 18093 | ta T_CHANGE_NONPRIV ! macro |
| 18094 | ceter_8_294: |
| 18095 | nop |
| 18096 | ta T_CHANGE_HPRIV |
| 18097 | mov 6, %r17 |
| 18098 | sllx %r17, 60, %r17 |
| 18099 | mov 0x18, %r16 |
| 18100 | stxa %r17, [%r16]0x4c |
| 18101 | .word 0x9b410000 ! 391: RDTICK rd %tick, %r13 |
| 18102 | cwp_8_295: |
| 18103 | set user_data_start, %o7 |
| 18104 | .word 0x93902006 ! 392: WRPR_CWP_I wrpr %r0, 0x0006, %cwp |
| 18105 | splash_lsu_8_296: |
| 18106 | nop |
| 18107 | ta T_CHANGE_HPRIV |
| 18108 | set 0x28a7fea5, %r2 |
| 18109 | mov 0x4, %r1 |
| 18110 | sllx %r1, 32, %r1 |
| 18111 | or %r1, %r2, %r2 |
| 18112 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 18113 | ta T_CHANGE_NONHPRIV |
| 18114 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 18115 | intveclr_8_297: |
| 18116 | nop |
| 18117 | ta T_CHANGE_HPRIV |
| 18118 | setx 0xe13df8717834e60e, %r1, %r28 |
| 18119 | stxa %r28, [%g0] 0x72 |
| 18120 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 18121 | nop |
| 18122 | mov 0x80, %g3 |
| 18123 | stxa %g3, [%g3] 0x57 |
| 18124 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 18125 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 18126 | reduce_priv_lvl_8_298: |
| 18127 | ta T_CHANGE_NONPRIV ! macro |
| 18128 | dvapa_8_299: |
| 18129 | nop |
| 18130 | ta T_CHANGE_HPRIV |
| 18131 | mov 0xff1, %r20 |
| 18132 | mov 0xc, %r19 |
| 18133 | sllx %r20, 23, %r20 |
| 18134 | or %r19, %r20, %r19 |
| 18135 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 18136 | mov 0x38, %r18 |
| 18137 | stxa %r31, [%r18]0x58 |
| 18138 | ta T_CHANGE_NONHPRIV |
| 18139 | .word 0xe29fc034 ! 397: LDDA_R ldda [%r31, %r20] 0x01, %r17 |
| 18140 | mondo_8_300: |
| 18141 | nop |
| 18142 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 18143 | stxa %r19, [%r0+0x3e8] %asi |
| 18144 | .word 0x9d950012 ! 398: WRPR_WSTATE_R wrpr %r20, %r18, %wstate |
| 18145 | .word 0xe19fc2c0 ! 399: LDDFA_R ldda [%r31, %r0], %f16 |
| 18146 | .word 0xa7850012 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r20, %r18, %- |
| 18147 | #if (defined SPC || defined CMP) |
| 18148 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_302) + 16, 16, 16)) -> intp(1,0,16) |
| 18149 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_302)&0xffffffff) + 16, 16, 16)) -> intp(1,0,16) |
| 18150 | #else |
| 18151 | setx 0x21c9d5e08aaacde6, %r1, %r28 |
| 18152 | stxa %r28, [%g0] 0x73 |
| 18153 | #endif |
| 18154 | intvec_8_302: |
| 18155 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18156 | brcommon2_8_303: |
| 18157 | nop |
| 18158 | setx common_target, %r12, %r27 |
| 18159 | ba,a .+12 |
| 18160 | .word 0xa9a0054a ! 1: FSQRTd fsqrt |
| 18161 | ba,a .+8 |
| 18162 | jmpl %r27+0, %r27 |
| 18163 | .word 0xe1bfe0c0 ! 402: STDFA_I stda %f16, [0x00c0, %r31] |
| 18164 | nop |
| 18165 | ta T_CHANGE_HPRIV |
| 18166 | mov 0x8, %r10 |
| 18167 | set sync_thr_counter6, %r23 |
| 18168 | #ifndef SPC |
| 18169 | ldxa [%g0]0x63, %o1 |
| 18170 | and %o1, 0x38, %o1 |
| 18171 | add %o1, %r23, %r23 |
| 18172 | #endif |
| 18173 | cas [%r23],%g0,%r10 !lock |
| 18174 | brnz %r10, sma_8_304 |
| 18175 | rd %asi, %r12 |
| 18176 | wr %g0, 0x40, %asi |
| 18177 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 18178 | set 0x00021fff, %g1 |
| 18179 | stxa %g1, [%g0 + 0x80] %asi |
| 18180 | wr %r12, %g0, %asi |
| 18181 | st %g0, [%r23] |
| 18182 | sma_8_304: |
| 18183 | ta T_CHANGE_NONHPRIV |
| 18184 | .word 0xd3e7e00d ! 403: CASA_R casa [%r31] %asi, %r13, %r9 |
| 18185 | pmu_8_305: |
| 18186 | nop |
| 18187 | setx 0xfffff994fffff16a, %g1, %g7 |
| 18188 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18189 | jmptr_8_306: |
| 18190 | nop |
| 18191 | best_set_reg(0xe0a00000, %r20, %r27) |
| 18192 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 18193 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 18194 | #if (defined SPC || defined CMP) |
| 18195 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_308) + 0, 16, 16)) -> intp(2,0,6) |
| 18196 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_308)&0xffffffff) + 0, 16, 16)) -> intp(2,0,6) |
| 18197 | #else |
| 18198 | setx 0xfbb0a2438af442ae, %r1, %r28 |
| 18199 | stxa %r28, [%g0] 0x73 |
| 18200 | #endif |
| 18201 | intvec_8_308: |
| 18202 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18203 | splash_hpstate_8_309: |
| 18204 | .word 0x81982f1e ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x0f1e, %hpstate |
| 18205 | br_badelay2_8_310: |
| 18206 | .word 0xa1a209c4 ! 1: FDIVd fdivd %f8, %f4, %f16 |
| 18207 | pdist %f0, %f0, %f20 |
| 18208 | .word 0xa9b44314 ! 409: ALIGNADDRESS alignaddr %r17, %r20, %r20 |
| 18209 | splash_cmpr_8_311: |
| 18210 | mov 0, %r18 |
| 18211 | sllx %r18, 63, %r18 |
| 18212 | rd %tick, %r17 |
| 18213 | add %r17, 0x80, %r17 |
| 18214 | or %r17, %r18, %r17 |
| 18215 | ta T_CHANGE_HPRIV |
| 18216 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 18217 | ta T_CHANGE_PRIV |
| 18218 | .word 0xaf800011 ! 410: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 18219 | nop |
| 18220 | ta T_CHANGE_HPRIV |
| 18221 | mov 0x8, %r10 |
| 18222 | set sync_thr_counter6, %r23 |
| 18223 | #ifndef SPC |
| 18224 | ldxa [%g0]0x63, %o1 |
| 18225 | and %o1, 0x38, %o1 |
| 18226 | add %o1, %r23, %r23 |
| 18227 | #endif |
| 18228 | cas [%r23],%g0,%r10 !lock |
| 18229 | brnz %r10, sma_8_312 |
| 18230 | rd %asi, %r12 |
| 18231 | wr %g0, 0x40, %asi |
| 18232 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 18233 | set 0x000e1fff, %g1 |
| 18234 | stxa %g1, [%g0 + 0x80] %asi |
| 18235 | wr %r12, %g0, %asi |
| 18236 | st %g0, [%r23] |
| 18237 | sma_8_312: |
| 18238 | ta T_CHANGE_NONHPRIV |
| 18239 | .word 0xe5e7e012 ! 411: CASA_R casa [%r31] %asi, %r18, %r18 |
| 18240 | #if (defined SPC || defined CMP) |
| 18241 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_313)+16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 18242 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_313)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 18243 | #else |
| 18244 | !! TODO:Generate XIR via RESET_GEN register |
| 18245 | ! setx 0x8900000808, %r16, %r17 |
| 18246 | ! mov 0x2, %r16 |
| 18247 | ! stw %r16, [%r17] |
| 18248 | #endif |
| 18249 | xir_8_313: |
| 18250 | .word 0xa982a7a6 ! 412: WR_SET_SOFTINT_I wr %r10, 0x07a6, %set_softint |
| 18251 | memptr_8_314: |
| 18252 | set 0x60540000, %r31 |
| 18253 | .word 0x85847e34 ! 413: WRCCR_I wr %r17, 0x1e34, %ccr |
| 18254 | .word 0x91948002 ! 414: WRPR_PIL_R wrpr %r18, %r2, %pil |
| 18255 | .word 0x9f802092 ! 415: SIR sir 0x0092 |
| 18256 | nop |
| 18257 | ta T_CHANGE_HPRIV |
| 18258 | mov 0x8+1, %r10 |
| 18259 | set sync_thr_counter5, %r23 |
| 18260 | #ifndef SPC |
| 18261 | ldxa [%g0]0x63, %o1 |
| 18262 | and %o1, 0x38, %o1 |
| 18263 | add %o1, %r23, %r23 |
| 18264 | sllx %o1, 5, %o3 !(CID*256) |
| 18265 | #endif |
| 18266 | cas [%r23],%g0,%r10 !lock |
| 18267 | brnz %r10, cwq_8_316 |
| 18268 | rd %asi, %r12 |
| 18269 | wr %g0, 0x40, %asi |
| 18270 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 18271 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 18272 | cmp %l1, 1 |
| 18273 | bne cwq_8_316 |
| 18274 | set CWQ_BASE, %l6 |
| 18275 | #ifndef SPC |
| 18276 | add %l6, %o3, %l6 |
| 18277 | #endif |
| 18278 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 18279 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 18280 | sllx %l2, 32, %l2 |
| 18281 | stx %l2, [%l6 + 0x0] |
| 18282 | membar #Sync |
| 18283 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 18284 | sub %l2, 0x40, %l2 |
| 18285 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 18286 | wr %r12, %g0, %asi |
| 18287 | st %g0, [%r23] |
| 18288 | cwq_8_316: |
| 18289 | ta T_CHANGE_NONHPRIV |
| 18290 | .word 0x91414000 ! 416: RDPC rd %pc, %r8 |
| 18291 | intveclr_8_317: |
| 18292 | nop |
| 18293 | ta T_CHANGE_HPRIV |
| 18294 | setx 0x9c1dc798c4c47fab, %r1, %r28 |
| 18295 | stxa %r28, [%g0] 0x72 |
| 18296 | ta T_CHANGE_NONHPRIV |
| 18297 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 18298 | splash_cmpr_8_318: |
| 18299 | mov 0, %r18 |
| 18300 | sllx %r18, 63, %r18 |
| 18301 | rd %tick, %r17 |
| 18302 | add %r17, 0x80, %r17 |
| 18303 | or %r17, %r18, %r17 |
| 18304 | ta T_CHANGE_HPRIV |
| 18305 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 18306 | ta T_CHANGE_PRIV |
| 18307 | .word 0xb3800011 ! 418: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 18308 | setx 0x281c45eb0ace5309, %r1, %r28 |
| 18309 | stxa %r28, [%g0] 0x73 |
| 18310 | intvec_8_319: |
| 18311 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18312 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 18313 | reduce_priv_lvl_8_320: |
| 18314 | ta T_CHANGE_NONHPRIV ! macro |
| 18315 | mondo_8_321: |
| 18316 | nop |
| 18317 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 18318 | stxa %r19, [%r0+0x3d0] %asi |
| 18319 | .word 0x9d948003 ! 421: WRPR_WSTATE_R wrpr %r18, %r3, %wstate |
| 18320 | splash_lsu_8_322: |
| 18321 | nop |
| 18322 | ta T_CHANGE_HPRIV |
| 18323 | set 0xfc014757, %r2 |
| 18324 | mov 0x2, %r1 |
| 18325 | sllx %r1, 32, %r1 |
| 18326 | or %r1, %r2, %r2 |
| 18327 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 18328 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 18329 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 18330 | .word 0xda3fe0c3 ! 424: STD_I std %r13, [%r31 + 0x00c3] |
| 18331 | .word 0x93d02033 ! 425: Tcc_I tne icc_or_xcc, %r0 + 51 |
| 18332 | otherw |
| 18333 | mov 0x32, %r30 |
| 18334 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 18335 | .word 0x22cc4001 ! 1: BRZ brz,a,pt %r17,<label_0xc4001> |
| 18336 | .word 0x8d903c6c ! 427: WRPR_PSTATE_I wrpr %r0, 0x1c6c, %pstate |
| 18337 | br_badelay2_8_324: |
| 18338 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 18339 | allclean |
| 18340 | .word 0x99b4830a ! 428: ALIGNADDRESS alignaddr %r18, %r10, %r12 |
| 18341 | vahole_8_325: |
| 18342 | nop |
| 18343 | ta T_CHANGE_NONHPRIV |
| 18344 | setx vahole_target0, %r18, %r27 |
| 18345 | jmpl %r27+0, %r27 |
| 18346 | .word 0xd69fc02d ! 429: LDDA_R ldda [%r31, %r13] 0x01, %r11 |
| 18347 | #if (defined SPC || defined CMP) |
| 18348 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_326) + 0, 16, 16)) -> intp(2,0,23) |
| 18349 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_326)&0xffffffff) + 0, 16, 16)) -> intp(2,0,23) |
| 18350 | #else |
| 18351 | setx 0x0984d326b0150087, %r1, %r28 |
| 18352 | stxa %r28, [%g0] 0x73 |
| 18353 | #endif |
| 18354 | intvec_8_326: |
| 18355 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18356 | splash_hpstate_8_327: |
| 18357 | ta T_CHANGE_NONHPRIV |
| 18358 | .word 0x81983753 ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x1753, %hpstate |
| 18359 | splash_htba_8_328: |
| 18360 | nop |
| 18361 | ta T_CHANGE_HPRIV |
| 18362 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 18363 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 18364 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 18365 | .word 0xa9b40551 ! 434: FCMPEQ16 fcmpeq16 %d16, %d48, %r20 |
| 18366 | donret_8_329: |
| 18367 | nop |
| 18368 | ta T_CHANGE_HPRIV ! macro |
| 18369 | rd %pc, %r12 |
| 18370 | add %r12, (donretarg_8_329-donret_8_329-4), %r12 |
| 18371 | mov 0x38, %r18 |
| 18372 | stxa %r12, [%r18]0x58 |
| 18373 | add %r12, 0x4, %r11 |
| 18374 | wrpr %g0, 0x2, %tl |
| 18375 | wrpr %g0, %r12, %tpc |
| 18376 | wrpr %g0, %r11, %tnpc |
| 18377 | set (0x00edd50e | (0x80 << 24)), %r13 |
| 18378 | rdpr %tstate, %r16 |
| 18379 | mov 0x1f, %r19 |
| 18380 | and %r19, %r16, %r17 |
| 18381 | andn %r16, %r19, %r16 |
| 18382 | or %r16, %r17, %r20 |
| 18383 | wrpr %r20, %g0, %tstate |
| 18384 | wrhpr %g0, 0x1f43, %htstate |
| 18385 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 18386 | done |
| 18387 | donretarg_8_329: |
| 18388 | .word 0xd8ffe180 ! 435: SWAPA_I swapa %r12, [%r31 + 0x0180] %asi |
| 18389 | .word 0x93a4cd30 ! 436: FsMULd fsmuld %f19, %f16, %f40 |
| 18390 | splash_tba_8_330: |
| 18391 | ta T_CHANGE_PRIV |
| 18392 | setx 0x00000000003a0000, %r11, %r12 |
| 18393 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 18394 | nop |
| 18395 | mov 0x80, %g3 |
| 18396 | stxa %g3, [%g3] 0x5f |
| 18397 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 18398 | nop |
| 18399 | mov 0x80, %g3 |
| 18400 | stxa %g3, [%g3] 0x5f |
| 18401 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 18402 | donret_8_331: |
| 18403 | nop |
| 18404 | ta T_CHANGE_HPRIV ! macro |
| 18405 | rd %pc, %r12 |
| 18406 | add %r12, (donretarg_8_331-donret_8_331-4), %r12 |
| 18407 | mov 0x38, %r18 |
| 18408 | stxa %r12, [%r18]0x58 |
| 18409 | add %r12, 0x4, %r11 |
| 18410 | wrpr %g0, 0x2, %tl |
| 18411 | wrpr %g0, %r12, %tpc |
| 18412 | wrpr %g0, %r11, %tnpc |
| 18413 | set (0x0087767d | (0x88 << 24)), %r13 |
| 18414 | rdpr %tstate, %r16 |
| 18415 | mov 0x1f, %r19 |
| 18416 | and %r19, %r16, %r17 |
| 18417 | andn %r16, %r19, %r16 |
| 18418 | or %r16, %r17, %r20 |
| 18419 | wrpr %r20, %g0, %tstate |
| 18420 | wrhpr %g0, 0x1d07, %htstate |
| 18421 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 18422 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 18423 | done |
| 18424 | donretarg_8_331: |
| 18425 | .word 0xe26fe1ba ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x01ba] |
| 18426 | donret_8_332: |
| 18427 | nop |
| 18428 | ta T_CHANGE_HPRIV ! macro |
| 18429 | rd %pc, %r12 |
| 18430 | add %r12, (donretarg_8_332-donret_8_332-8), %r12 |
| 18431 | mov 0x38, %r18 |
| 18432 | stxa %r12, [%r18]0x58 |
| 18433 | add %r12, 0x4, %r11 |
| 18434 | wrpr %g0, 0x1, %tl |
| 18435 | wrpr %g0, %r12, %tpc |
| 18436 | wrpr %g0, %r11, %tnpc |
| 18437 | set (0x00868444 | (20 << 24)), %r13 |
| 18438 | rdpr %tstate, %r16 |
| 18439 | mov 0x1f, %r19 |
| 18440 | and %r19, %r16, %r17 |
| 18441 | andn %r16, %r19, %r16 |
| 18442 | or %r16, %r17, %r20 |
| 18443 | wrpr %r20, %g0, %tstate |
| 18444 | wrhpr %g0, 0x16dc, %htstate |
| 18445 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 18446 | retry |
| 18447 | donretarg_8_332: |
| 18448 | .word 0x9ba409d2 ! 441: FDIVd fdivd %f16, %f18, %f44 |
| 18449 | setx 0x530dedc5bf4e5a33, %r1, %r28 |
| 18450 | stxa %r28, [%g0] 0x73 |
| 18451 | intvec_8_333: |
| 18452 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18453 | .word 0xe88fe018 ! 443: LDUBA_I lduba [%r31, + 0x0018] %asi, %r20 |
| 18454 | .word 0xe937e178 ! 444: STQF_I - %f20, [0x0178, %r31] |
| 18455 | ta T_CHANGE_NONHPRIV |
| 18456 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 18457 | .word 0x99a489c1 ! 446: FDIVd fdivd %f18, %f32, %f12 |
| 18458 | brcommon2_8_336: |
| 18459 | nop |
| 18460 | setx common_target, %r12, %r27 |
| 18461 | ba,a .+12 |
| 18462 | .word 0xe1118013 ! 1: LDQF_R - [%r6, %r19], %f16 |
| 18463 | ba,a .+8 |
| 18464 | jmpl %r27+0, %r27 |
| 18465 | .word 0xe1bfe020 ! 447: STDFA_I stda %f16, [0x0020, %r31] |
| 18466 | .word 0x98494006 ! 448: MULX_R mulx %r5, %r6, %r12 |
| 18467 | splash_lsu_8_337: |
| 18468 | nop |
| 18469 | ta T_CHANGE_HPRIV |
| 18470 | set 0xac30cc53, %r2 |
| 18471 | mov 0x7, %r1 |
| 18472 | sllx %r1, 32, %r1 |
| 18473 | or %r1, %r2, %r2 |
| 18474 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 18475 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 18476 | mondo_8_338: |
| 18477 | nop |
| 18478 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 18479 | ta T_CHANGE_PRIV |
| 18480 | stxa %r10, [%r0+0x3d8] %asi |
| 18481 | .word 0x9d948003 ! 450: WRPR_WSTATE_R wrpr %r18, %r3, %wstate |
| 18482 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 18483 | splash_hpstate_8_340: |
| 18484 | ta T_CHANGE_NONHPRIV |
| 18485 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 18486 | .word 0x819837c7 ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x17c7, %hpstate |
| 18487 | pmu_8_341: |
| 18488 | nop |
| 18489 | ta T_CHANGE_PRIV |
| 18490 | setx 0xfffff22dffffff9d, %g1, %g7 |
| 18491 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18492 | .word 0x93d020b2 ! 454: Tcc_I tne icc_or_xcc, %r0 + 178 |
| 18493 | .word 0x95a189b4 ! 455: FDIVs fdivs %f6, %f20, %f10 |
| 18494 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 18495 | cwp_8_342: |
| 18496 | set user_data_start, %o7 |
| 18497 | .word 0x93902003 ! 457: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 18498 | jmptr_8_343: |
| 18499 | nop |
| 18500 | best_set_reg(0xe0a00000, %r20, %r27) |
| 18501 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 18502 | jmptr_8_344: |
| 18503 | nop |
| 18504 | best_set_reg(0xe0a00000, %r20, %r27) |
| 18505 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 18506 | jmptr_8_345: |
| 18507 | nop |
| 18508 | best_set_reg(0xe0a00000, %r20, %r27) |
| 18509 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 18510 | .word 0xe69fc028 ! 461: LDDA_R ldda [%r31, %r8] 0x01, %r19 |
| 18511 | brcommon1_8_347: |
| 18512 | nop |
| 18513 | setx common_target, %r12, %r27 |
| 18514 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 18515 | ba,a .+12 |
| 18516 | .word 0xa7702020 ! 1: POPC_I popc 0x0020, %r19 |
| 18517 | ba,a .+8 |
| 18518 | jmpl %r27+0, %r27 |
| 18519 | .word 0xa7a489a2 ! 462: FDIVs fdivs %f18, %f2, %f19 |
| 18520 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 18521 | ceter_8_349: |
| 18522 | nop |
| 18523 | ta T_CHANGE_HPRIV |
| 18524 | mov 7, %r17 |
| 18525 | sllx %r17, 60, %r17 |
| 18526 | mov 0x18, %r16 |
| 18527 | stxa %r17, [%r16]0x4c |
| 18528 | ta T_CHANGE_NONHPRIV |
| 18529 | .word 0x99410000 ! 464: RDTICK rd %tick, %r12 |
| 18530 | splash_cmpr_8_350: |
| 18531 | mov 0, %r18 |
| 18532 | sllx %r18, 63, %r18 |
| 18533 | rd %tick, %r17 |
| 18534 | add %r17, 0x60, %r17 |
| 18535 | or %r17, %r18, %r17 |
| 18536 | ta T_CHANGE_HPRIV |
| 18537 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 18538 | .word 0xb3800011 ! 465: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 18539 | .word 0x94848014 ! 466: ADDcc_R addcc %r18, %r20, %r10 |
| 18540 | .word 0xd28008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 |
| 18541 | memptr_8_351: |
| 18542 | set user_data_start, %r31 |
| 18543 | .word 0x8580f24f ! 468: WRCCR_I wr %r3, 0x124f, %ccr |
| 18544 | .word 0xd27fe1d0 ! 469: SWAP_I swap %r9, [%r31 + 0x01d0] |
| 18545 | .word 0x9f802ea1 ! 470: SIR sir 0x0ea1 |
| 18546 | .word 0x91940014 ! 471: WRPR_PIL_R wrpr %r16, %r20, %pil |
| 18547 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 18548 | jmptr_8_353: |
| 18549 | nop |
| 18550 | best_set_reg(0xe1a00000, %r20, %r27) |
| 18551 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 18552 | .word 0xa9b487d4 ! 474: PDIST pdistn %d18, %d20, %d20 |
| 18553 | unsupttte_8_355: |
| 18554 | nop |
| 18555 | ta T_CHANGE_HPRIV |
| 18556 | mov 1, %r20 |
| 18557 | sllx %r20, 63, %r20 |
| 18558 | or %r20, 2,%r20 |
| 18559 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 18560 | ta T_CHANGE_NONHPRIV |
| 18561 | .word 0x99a449ca ! 475: FDIVd fdivd %f48, %f10, %f12 |
| 18562 | #if (defined SPC || defined CMP) |
| 18563 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_356)+8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 18564 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_356)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x8),1,3) |
| 18565 | #else |
| 18566 | !! TODO:Generate XIR via RESET_GEN register |
| 18567 | ! setx 0x8900000808, %r16, %r17 |
| 18568 | ! mov 0x2, %r16 |
| 18569 | ! stw %r16, [%r17] |
| 18570 | #endif |
| 18571 | xir_8_356: |
| 18572 | .word 0xa9852db4 ! 476: WR_SET_SOFTINT_I wr %r20, 0x0db4, %set_softint |
| 18573 | trapasi_8_357: |
| 18574 | nop |
| 18575 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 18576 | .word 0xd8c04980 ! 477: LDSWA_R ldswa [%r1, %r0] 0x4c, %r12 |
| 18577 | .word 0xc19fe100 ! 478: LDDFA_I ldda [%r31, 0x0100], %f0 |
| 18578 | donret_8_358: |
| 18579 | nop |
| 18580 | ta T_CHANGE_HPRIV ! macro |
| 18581 | rd %pc, %r12 |
| 18582 | add %r12, (donretarg_8_358-donret_8_358-8), %r12 |
| 18583 | mov 0x38, %r18 |
| 18584 | stxa %r12, [%r18]0x58 |
| 18585 | add %r12, 0x4, %r11 |
| 18586 | wrpr %g0, 0x1, %tl |
| 18587 | wrpr %g0, %r12, %tpc |
| 18588 | wrpr %g0, %r11, %tnpc |
| 18589 | set (0x006271e2 | (0x4f << 24)), %r13 |
| 18590 | rdpr %tstate, %r16 |
| 18591 | mov 0x1f, %r19 |
| 18592 | and %r19, %r16, %r17 |
| 18593 | andn %r16, %r19, %r16 |
| 18594 | or %r16, %r17, %r20 |
| 18595 | wrpr %r20, %g0, %tstate |
| 18596 | wrhpr %g0, 0x1ecf, %htstate |
| 18597 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 18598 | retry |
| 18599 | donretarg_8_358: |
| 18600 | .word 0xd8ffe0c9 ! 479: SWAPA_I swapa %r12, [%r31 + 0x00c9] %asi |
| 18601 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 18602 | mondo_8_360: |
| 18603 | nop |
| 18604 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 18605 | stxa %r12, [%r0+0x3d8] %asi |
| 18606 | .word 0x9d92c011 ! 481: WRPR_WSTATE_R wrpr %r11, %r17, %wstate |
| 18607 | .word 0xc19fc2c0 ! 482: LDDFA_R ldda [%r31, %r0], %f0 |
| 18608 | br_badelay1_8_361: |
| 18609 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 18610 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 18611 | .word 0xc36fe180 ! 1: PREFETCH_I prefetch [%r31 + 0x0180], #one_read |
| 18612 | normalw |
| 18613 | .word 0xa9458000 ! 483: RD_SOFTINT_REG rd %softint, %r20 |
| 18614 | .word 0x9f803b37 ! 484: SIR sir 0x1b37 |
| 18615 | .word 0xdb27e061 ! 485: STF_I st %f13, [0x0061, %r31] |
| 18616 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 18617 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 18618 | pmu_8_362: |
| 18619 | nop |
| 18620 | setx 0xfffff52ffffff21b, %g1, %g7 |
| 18621 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18622 | .word 0x8d903915 ! 489: WRPR_PSTATE_I wrpr %r0, 0x1915, %pstate |
| 18623 | brlez,a,pn %r20, skip_8_364 |
| 18624 | .word 0x95b1c4cb ! 1: FCMPNE32 fcmpne32 %d38, %d42, %r10 |
| 18625 | .align 32 |
| 18626 | skip_8_364: |
| 18627 | .word 0xc32fc000 ! 490: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 18628 | donret_8_365: |
| 18629 | nop |
| 18630 | ta T_CHANGE_HPRIV ! macro |
| 18631 | rd %pc, %r12 |
| 18632 | add %r12, (donretarg_8_365-donret_8_365-4), %r12 |
| 18633 | mov 0x38, %r18 |
| 18634 | stxa %r12, [%r18]0x58 |
| 18635 | add %r12, 0x4, %r11 |
| 18636 | wrpr %g0, 0x1, %tl |
| 18637 | wrpr %g0, %r12, %tpc |
| 18638 | wrpr %g0, %r11, %tnpc |
| 18639 | set (0x0072cbf6 | (22 << 24)), %r13 |
| 18640 | rdpr %tstate, %r16 |
| 18641 | mov 0x1f, %r19 |
| 18642 | and %r19, %r16, %r17 |
| 18643 | andn %r16, %r19, %r16 |
| 18644 | or %r16, %r17, %r20 |
| 18645 | wrpr %r20, %g0, %tstate |
| 18646 | wrhpr %g0, 0x505, %htstate |
| 18647 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 18648 | done |
| 18649 | donretarg_8_365: |
| 18650 | .word 0xdaffe140 ! 491: SWAPA_I swapa %r13, [%r31 + 0x0140] %asi |
| 18651 | .word 0xdb27e050 ! 492: STF_I st %f13, [0x0050, %r31] |
| 18652 | .word 0xdaffc028 ! 493: SWAPA_R swapa %r13, [%r31 + %r8] 0x01 |
| 18653 | splash_cmpr_8_366: |
| 18654 | mov 0, %r18 |
| 18655 | sllx %r18, 63, %r18 |
| 18656 | rd %tick, %r17 |
| 18657 | add %r17, 0x80, %r17 |
| 18658 | or %r17, %r18, %r17 |
| 18659 | ta T_CHANGE_PRIV |
| 18660 | .word 0xb3800011 ! 494: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 18661 | nop |
| 18662 | mov 0x80, %g3 |
| 18663 | stxa %g3, [%g3] 0x57 |
| 18664 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 18665 | .word 0x9f80370d ! 496: SIR sir 0x170d |
| 18666 | pmu_8_367: |
| 18667 | nop |
| 18668 | ta T_CHANGE_PRIV |
| 18669 | setx 0xfffff4ebfffff1a7, %g1, %g7 |
| 18670 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18671 | nop |
| 18672 | ta T_CHANGE_HPRIV |
| 18673 | mov 0x8+1, %r10 |
| 18674 | set sync_thr_counter5, %r23 |
| 18675 | #ifndef SPC |
| 18676 | ldxa [%g0]0x63, %o1 |
| 18677 | and %o1, 0x38, %o1 |
| 18678 | add %o1, %r23, %r23 |
| 18679 | sllx %o1, 5, %o3 !(CID*256) |
| 18680 | #endif |
| 18681 | cas [%r23],%g0,%r10 !lock |
| 18682 | brnz %r10, cwq_8_368 |
| 18683 | rd %asi, %r12 |
| 18684 | wr %g0, 0x40, %asi |
| 18685 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 18686 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 18687 | cmp %l1, 1 |
| 18688 | bne cwq_8_368 |
| 18689 | set CWQ_BASE, %l6 |
| 18690 | #ifndef SPC |
| 18691 | add %l6, %o3, %l6 |
| 18692 | #endif |
| 18693 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 18694 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 18695 | sllx %l2, 32, %l2 |
| 18696 | stx %l2, [%l6 + 0x0] |
| 18697 | membar #Sync |
| 18698 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 18699 | sub %l2, 0x40, %l2 |
| 18700 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 18701 | wr %r12, %g0, %asi |
| 18702 | st %g0, [%r23] |
| 18703 | cwq_8_368: |
| 18704 | ta T_CHANGE_NONHPRIV |
| 18705 | .word 0xa1414000 ! 498: RDPC rd %pc, %r16 |
| 18706 | change_to_randtl_8_369: |
| 18707 | ta T_CHANGE_HPRIV ! macro |
| 18708 | done_change_to_randtl_8_369: |
| 18709 | .word 0x8f902001 ! 499: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 18710 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 18711 | mondo_8_370: |
| 18712 | nop |
| 18713 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 18714 | stxa %r1, [%r0+0x3c8] %asi |
| 18715 | .word 0x9d91c009 ! 501: WRPR_WSTATE_R wrpr %r7, %r9, %wstate |
| 18716 | nop |
| 18717 | nop |
| 18718 | ta T_CHANGE_PRIV |
| 18719 | wrpr %g0, %g0, %gl |
| 18720 | nop |
| 18721 | nop |
| 18722 | setx join_lbl_0_0, %g1, %g2 |
| 18723 | jmp %g2 |
| 18724 | nop |
| 18725 | fork_lbl_0_3: |
| 18726 | rd %asi, %r12 |
| 18727 | #ifdef XIR_RND_CORES |
| 18728 | setup_xir_4: |
| 18729 | setx 0xec431b359b86abe7, %r1, %r28 |
| 18730 | mov 0x30, %r17 |
| 18731 | stxa %r28, [%r17] 0x41 |
| 18732 | #endif |
| 18733 | setup_spu_4: |
| 18734 | wr %g0, 0x40, %asi |
| 18735 | !# allocate control word queue (e.g., setup head/tail/first/last registers) |
| 18736 | set CWQ_BASE, %l6 |
| 18737 | |
| 18738 | #ifndef SPC |
| 18739 | ldxa [%g0]0x63, %o2 |
| 18740 | and %o2, 0x38, %o2 |
| 18741 | sllx %o2, 5, %o2 !(CID*256) |
| 18742 | add %l6, %o3, %l6 |
| 18743 | #endif |
| 18744 | # 771 "diag.j" |
| 18745 | !# write base addr to first, head, and tail ptr |
| 18746 | !# first store to first |
| 18747 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first |
| 18748 | |
| 18749 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head |
| 18750 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail |
| 18751 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST |
| 18752 | #ifndef SPC |
| 18753 | add %l5, %o2, %l5 |
| 18754 | #endif |
| 18755 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi |
| 18756 | |
| 18757 | !# set CWQ control word ([38:36] is strand ID ..) |
| 18758 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 18759 | sllx %l2, 32, %l2 |
| 18760 | |
| 18761 | !# write CWQ entry (%l6 points to CWQ) |
| 18762 | stx %l2, [%l6 + 0x0] |
| 18763 | |
| 18764 | setx msg, %g1, %l2 |
| 18765 | stx %l2, [%l6 + 0x8] !# source address |
| 18766 | |
| 18767 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) |
| 18768 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) |
| 18769 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) |
| 18770 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) |
| 18771 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) |
| 18772 | |
| 18773 | setx results, %g1, %o3 |
| 18774 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) |
| 18775 | |
| 18776 | membar #Sync |
| 18777 | |
| 18778 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 |
| 18779 | add %l2, 0x40, %l2 |
| 18780 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi |
| 18781 | |
| 18782 | !# Kick off the CWQ operation by writing to the CWQ_CSR |
| 18783 | !# Set the enabled bit and reset the other bits |
| 18784 | or %g0, 0x1, %g1 |
| 18785 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 18786 | |
| 18787 | unlock_sync_thds_4: |
| 18788 | set sync_thr_counter6, %r23 |
| 18789 | #ifndef SPC |
| 18790 | ldxa [%g0]0x63, %o2 |
| 18791 | and %o2, 0x38, %o2 |
| 18792 | add %o2, %r23, %r23 |
| 18793 | #endif |
| 18794 | st %r0, [%r23] !unlock sync_thr_counter6 |
| 18795 | sub %r23, 64, %r23 |
| 18796 | st %r0, [%r23] !unlock sync_thr_counter5 |
| 18797 | sub %r23, 64, %r23 |
| 18798 | st %r0, [%r23] !unlock sync_thr_counter4 |
| 18799 | |
| 18800 | wr %r0, %r12, %asi |
| 18801 | ta T_CHANGE_NONHPRIV |
| 18802 | br_longdelay1_4_0: |
| 18803 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 18804 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 18805 | .word 0xc32fc000 ! 2: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 18806 | nop |
| 18807 | ta T_CHANGE_HPRIV |
| 18808 | mov 0x4, %r10 |
| 18809 | set sync_thr_counter6, %r23 |
| 18810 | #ifndef SPC |
| 18811 | ldxa [%g0]0x63, %o1 |
| 18812 | and %o1, 0x38, %o1 |
| 18813 | add %o1, %r23, %r23 |
| 18814 | #endif |
| 18815 | cas [%r23],%g0,%r10 !lock |
| 18816 | brnz %r10, sma_4_2 |
| 18817 | rd %asi, %r12 |
| 18818 | wr %g0, 0x40, %asi |
| 18819 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 18820 | set 0x00061fff, %g1 |
| 18821 | stxa %g1, [%g0 + 0x80] %asi |
| 18822 | wr %r12, %g0, %asi |
| 18823 | st %g0, [%r23] |
| 18824 | sma_4_2: |
| 18825 | ta T_CHANGE_NONHPRIV |
| 18826 | .word 0xe7e7e010 ! 3: CASA_R casa [%r31] %asi, %r16, %r19 |
| 18827 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 18828 | reduce_priv_lvl_4_3: |
| 18829 | ta T_CHANGE_NONHPRIV ! macro |
| 18830 | splash_decr_4_4: |
| 18831 | nop |
| 18832 | ta T_CHANGE_HPRIV |
| 18833 | mov 8, %r1 |
| 18834 | stxa %r16, [%r1] 0x45 |
| 18835 | .word 0xa7848011 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r18, %r17, %- |
| 18836 | .word 0x87aacac6 ! 6: FCMPEd fcmped %fcc<n>, %f42, %f6 |
| 18837 | setx vahole_target1, %r18, %r27 |
| 18838 | .word 0xe69fc029 ! 7: LDDA_R ldda [%r31, %r9] 0x01, %r19 |
| 18839 | memptr_4_6: |
| 18840 | set user_data_start, %r31 |
| 18841 | .word 0x8582376c ! 8: WRCCR_I wr %r8, 0x176c, %ccr |
| 18842 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 18843 | ceter_4_7: |
| 18844 | nop |
| 18845 | ta T_CHANGE_HPRIV |
| 18846 | mov 3, %r17 |
| 18847 | sllx %r17, 60, %r17 |
| 18848 | mov 0x18, %r16 |
| 18849 | stxa %r17, [%r16]0x4c |
| 18850 | .word 0x95410000 ! 10: RDTICK rd %tick, %r10 |
| 18851 | splash_lsu_4_8: |
| 18852 | nop |
| 18853 | ta T_CHANGE_HPRIV |
| 18854 | set 0x8e0c90b1, %r2 |
| 18855 | mov 0x5, %r1 |
| 18856 | sllx %r1, 32, %r1 |
| 18857 | or %r1, %r2, %r2 |
| 18858 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 18859 | ta T_CHANGE_NONHPRIV |
| 18860 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 18861 | brcommon1_4_9: |
| 18862 | nop |
| 18863 | setx common_target, %r12, %r27 |
| 18864 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 18865 | ba,a .+12 |
| 18866 | .word 0xd06fe1e0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01e0] |
| 18867 | ba,a .+8 |
| 18868 | jmpl %r27+0, %r27 |
| 18869 | .word 0x97b147cd ! 12: PDIST pdistn %d36, %d44, %d42 |
| 18870 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 18871 | pmu_4_10: |
| 18872 | nop |
| 18873 | setx 0xffffff66ffffff7a, %g1, %g7 |
| 18874 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18875 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 18876 | pmu_4_11: |
| 18877 | nop |
| 18878 | ta T_CHANGE_PRIV |
| 18879 | setx 0xfffff1a3fffff917, %g1, %g7 |
| 18880 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18881 | ibp_4_12: |
| 18882 | nop |
| 18883 | .word 0xe19fda00 ! 17: LDDFA_R ldda [%r31, %r0], %f16 |
| 18884 | ibp_4_13: |
| 18885 | nop |
| 18886 | .word 0xe19fd960 ! 18: LDDFA_R ldda [%r31, %r0], %f16 |
| 18887 | .word 0xd65fe028 ! 19: LDX_I ldx [%r31 + 0x0028], %r11 |
| 18888 | .word 0xd727e170 ! 20: STF_I st %f11, [0x0170, %r31] |
| 18889 | .word 0x81580000 ! 21: FLUSHW flushw |
| 18890 | #if (defined SPC || defined CMP) |
| 18891 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_14) + 56, 16, 16)) -> intp(2,0,16) |
| 18892 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_14)&0xffffffff) + 56, 16, 16)) -> intp(2,0,16) |
| 18893 | #else |
| 18894 | setx 0x42f81e6bef10510c, %r1, %r28 |
| 18895 | stxa %r28, [%g0] 0x73 |
| 18896 | #endif |
| 18897 | intvec_4_14: |
| 18898 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 18899 | donret_4_15: |
| 18900 | nop |
| 18901 | ta T_CHANGE_HPRIV ! macro |
| 18902 | rd %pc, %r12 |
| 18903 | add %r12, (donretarg_4_15-donret_4_15-4), %r12 |
| 18904 | mov 0x38, %r18 |
| 18905 | stxa %r12, [%r18]0x58 |
| 18906 | add %r12, 0x4, %r11 |
| 18907 | wrpr %g0, 0x2, %tl |
| 18908 | wrpr %g0, %r12, %tpc |
| 18909 | wrpr %g0, %r11, %tnpc |
| 18910 | set (0x005570dd | (0x80 << 24)), %r13 |
| 18911 | rdpr %tstate, %r16 |
| 18912 | mov 0x1f, %r19 |
| 18913 | and %r19, %r16, %r17 |
| 18914 | andn %r16, %r19, %r16 |
| 18915 | or %r16, %r17, %r20 |
| 18916 | wrpr %r20, %g0, %tstate |
| 18917 | wrhpr %g0, 0xd47, %htstate |
| 18918 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 18919 | done |
| 18920 | donretarg_4_15: |
| 18921 | .word 0xd6ffe028 ! 23: SWAPA_I swapa %r11, [%r31 + 0x0028] %asi |
| 18922 | set 0x388c, %l3 |
| 18923 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 18924 | .word 0x9bb507cd ! 24: PDIST pdistn %d20, %d44, %d44 |
| 18925 | .word 0xe1bfdb60 ! 25: STDFA_R stda %f16, [%r0, %r31] |
| 18926 | pmu_4_16: |
| 18927 | nop |
| 18928 | ta T_CHANGE_PRIV |
| 18929 | setx 0xfffff35dfffff249, %g1, %g7 |
| 18930 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 18931 | setx vahole_target1, %r18, %r27 |
| 18932 | .word 0xd11fe0f0 ! 27: LDDF_I ldd [%r31, 0x00f0], %f8 |
| 18933 | #if (defined SPC || defined CMP) |
| 18934 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_18)+40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 18935 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_18)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 18936 | #else |
| 18937 | !! TODO:Generate XIR via RESET_GEN register |
| 18938 | ! setx 0x8900000808, %r16, %r17 |
| 18939 | ! mov 0x2, %r16 |
| 18940 | ! stw %r16, [%r17] |
| 18941 | #endif |
| 18942 | xir_4_18: |
| 18943 | .word 0xa9852cdc ! 28: WR_SET_SOFTINT_I wr %r20, 0x0cdc, %set_softint |
| 18944 | cmp_4_19: |
| 18945 | nop |
| 18946 | ta T_CHANGE_HPRIV |
| 18947 | rd %asi, %r12 |
| 18948 | wr %r0, 0x41, %asi |
| 18949 | set sync_thr_counter4, %r23 |
| 18950 | #ifndef SPC |
| 18951 | ldxa [%g0]0x63, %r8 |
| 18952 | and %r8, 0x38, %r8 ! Core ID |
| 18953 | add %r8, %r23, %r23 |
| 18954 | mov 0xff, %r9 |
| 18955 | xor %r9, 0x4, %r9 |
| 18956 | sllx %r9, %r8, %r9 ! My core mask |
| 18957 | #else |
| 18958 | mov 0, %r8 |
| 18959 | mov 0xff, %r9 |
| 18960 | xor %r9, 0x4, %r9 ! My core mask |
| 18961 | #endif |
| 18962 | mov 0x4, %r10 |
| 18963 | cmp_startwait4_19: |
| 18964 | cas [%r23],%g0,%r10 !lock |
| 18965 | brz,a %r10, continue_cmp_4_19 |
| 18966 | ldxa [0x50]%asi, %r13 !Running_rw |
| 18967 | ld [%r23], %r10 |
| 18968 | cmp_wait4_19: |
| 18969 | brnz,a %r10, cmp_wait4_19 |
| 18970 | ld [%r23], %r10 |
| 18971 | ba cmp_startwait4_19 |
| 18972 | mov 0x4, %r10 |
| 18973 | continue_cmp_4_19: |
| 18974 | ldxa [0x58]%asi, %r14 !Running_status |
| 18975 | xnor %r14, %r13, %r14 !Bits equal |
| 18976 | brz,a %r8, cmp_multi_core_4_19 |
| 18977 | mov 0x8d, %r17 |
| 18978 | best_set_reg(0x7e89818693100317, %r16, %r17) |
| 18979 | cmp_multi_core_4_19: |
| 18980 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 18981 | and %r14, %r9, %r14 !Apply core-mask |
| 18982 | stxa %r14, [0x68]%asi |
| 18983 | st %g0, [%r23] !clear lock |
| 18984 | wr %g0, %r12, %asi |
| 18985 | .word 0xa9a0016c ! 29: FABSq dis not found |
| 18986 | |
| 18987 | donret_4_20: |
| 18988 | nop |
| 18989 | ta T_CHANGE_HPRIV ! macro |
| 18990 | rd %pc, %r12 |
| 18991 | add %r12, (donretarg_4_20-donret_4_20-8), %r12 |
| 18992 | mov 0x38, %r18 |
| 18993 | stxa %r12, [%r18]0x58 |
| 18994 | add %r12, 0x4, %r11 |
| 18995 | wrpr %g0, 0x1, %tl |
| 18996 | wrpr %g0, %r12, %tpc |
| 18997 | wrpr %g0, %r11, %tnpc |
| 18998 | set (0x00504f8e | (32 << 24)), %r13 |
| 18999 | rdpr %tstate, %r16 |
| 19000 | mov 0x1f, %r19 |
| 19001 | and %r19, %r16, %r17 |
| 19002 | andn %r16, %r19, %r16 |
| 19003 | or %r16, %r17, %r20 |
| 19004 | wrpr %r20, %g0, %tstate |
| 19005 | wrhpr %g0, 0x59d, %htstate |
| 19006 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 19007 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 19008 | retry |
| 19009 | donretarg_4_20: |
| 19010 | .word 0xe2ffe1a1 ! 30: SWAPA_I swapa %r17, [%r31 + 0x01a1] %asi |
| 19011 | splash_decr_4_21: |
| 19012 | nop |
| 19013 | ta T_CHANGE_HPRIV |
| 19014 | mov 8, %r1 |
| 19015 | stxa %r19, [%r1] 0x45 |
| 19016 | .word 0xa784000d ! 31: WR_GRAPHICS_STATUS_REG_R wr %r16, %r13, %- |
| 19017 | #if (defined SPC || defined CMP) |
| 19018 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_22) + 56, 16, 16)) -> intp(0,0,3) |
| 19019 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_22)&0xffffffff) + 56, 16, 16)) -> intp(0,0,3) |
| 19020 | #else |
| 19021 | setx 0x28f10d8c9476acb0, %r1, %r28 |
| 19022 | stxa %r28, [%g0] 0x73 |
| 19023 | #endif |
| 19024 | intvec_4_22: |
| 19025 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19026 | memptr_4_23: |
| 19027 | set 0x60740000, %r31 |
| 19028 | .word 0x85842ad3 ! 33: WRCCR_I wr %r16, 0x0ad3, %ccr |
| 19029 | .word 0x99a489d3 ! 34: FDIVd fdivd %f18, %f50, %f12 |
| 19030 | brcommon3_4_25: |
| 19031 | nop |
| 19032 | setx common_target, %r12, %r27 |
| 19033 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 19034 | ba,a .+12 |
| 19035 | .word 0xd3e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r9 |
| 19036 | ba,a .+8 |
| 19037 | jmpl %r27+0, %r27 |
| 19038 | .word 0xd23fe0b0 ! 35: STD_I std %r9, [%r31 + 0x00b0] |
| 19039 | jmptr_4_26: |
| 19040 | nop |
| 19041 | best_set_reg(0xe1200000, %r20, %r27) |
| 19042 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 19043 | splash_cmpr_4_27: |
| 19044 | mov 1, %r18 |
| 19045 | sllx %r18, 63, %r18 |
| 19046 | rd %tick, %r17 |
| 19047 | add %r17, 0x100, %r17 |
| 19048 | or %r17, %r18, %r17 |
| 19049 | ta T_CHANGE_PRIV |
| 19050 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 19051 | splash_cmpr_4_28: |
| 19052 | mov 0, %r18 |
| 19053 | sllx %r18, 63, %r18 |
| 19054 | rd %tick, %r17 |
| 19055 | add %r17, 0x60, %r17 |
| 19056 | or %r17, %r18, %r17 |
| 19057 | ta T_CHANGE_PRIV |
| 19058 | .word 0xaf800011 ! 38: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19059 | mondo_4_29: |
| 19060 | nop |
| 19061 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19062 | ta T_CHANGE_PRIV |
| 19063 | stxa %r12, [%r0+0x3c0] %asi |
| 19064 | .word 0x9d940014 ! 39: WRPR_WSTATE_R wrpr %r16, %r20, %wstate |
| 19065 | brcommon3_4_30: |
| 19066 | nop |
| 19067 | setx common_target, %r12, %r27 |
| 19068 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 19069 | ba,a .+12 |
| 19070 | .word 0xd26fe150 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0150] |
| 19071 | ba,a .+8 |
| 19072 | jmpl %r27+0, %r27 |
| 19073 | .word 0xc32fc014 ! 40: STXFSR_R st-sfr %f1, [%r20, %r31] |
| 19074 | .word 0xd2dfe0d8 ! 41: LDXA_I ldxa [%r31, + 0x00d8] %asi, %r9 |
| 19075 | .word 0xd327e120 ! 42: STF_I st %f9, [0x0120, %r31] |
| 19076 | setx 0x3fbdd84c23140e49, %r1, %r28 |
| 19077 | stxa %r28, [%g0] 0x73 |
| 19078 | intvec_4_31: |
| 19079 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19080 | mondo_4_32: |
| 19081 | nop |
| 19082 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19083 | stxa %r10, [%r0+0x3e0] %asi |
| 19084 | .word 0x9d940010 ! 44: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 19085 | ceter_4_33: |
| 19086 | nop |
| 19087 | ta T_CHANGE_HPRIV |
| 19088 | mov 7, %r17 |
| 19089 | sllx %r17, 60, %r17 |
| 19090 | mov 0x18, %r16 |
| 19091 | stxa %r17, [%r16]0x4c |
| 19092 | ta T_CHANGE_NONHPRIV |
| 19093 | .word 0x9b410000 ! 45: RDTICK rd %tick, %r13 |
| 19094 | cmp_4_34: |
| 19095 | nop |
| 19096 | ta T_CHANGE_HPRIV |
| 19097 | rd %asi, %r12 |
| 19098 | wr %r0, 0x41, %asi |
| 19099 | set sync_thr_counter4, %r23 |
| 19100 | #ifndef SPC |
| 19101 | ldxa [%g0]0x63, %r8 |
| 19102 | and %r8, 0x38, %r8 ! Core ID |
| 19103 | add %r8, %r23, %r23 |
| 19104 | mov 0xff, %r9 |
| 19105 | xor %r9, 0x4, %r9 |
| 19106 | sllx %r9, %r8, %r9 ! My core mask |
| 19107 | #else |
| 19108 | mov 0, %r8 |
| 19109 | mov 0xff, %r9 |
| 19110 | xor %r9, 0x4, %r9 ! My core mask |
| 19111 | #endif |
| 19112 | mov 0x4, %r10 |
| 19113 | cmp_startwait4_34: |
| 19114 | cas [%r23],%g0,%r10 !lock |
| 19115 | brz,a %r10, continue_cmp_4_34 |
| 19116 | ldxa [0x50]%asi, %r13 !Running_rw |
| 19117 | ld [%r23], %r10 |
| 19118 | cmp_wait4_34: |
| 19119 | brnz,a %r10, cmp_wait4_34 |
| 19120 | ld [%r23], %r10 |
| 19121 | ba cmp_startwait4_34 |
| 19122 | mov 0x4, %r10 |
| 19123 | continue_cmp_4_34: |
| 19124 | ldxa [0x58]%asi, %r14 !Running_status |
| 19125 | xnor %r14, %r13, %r14 !Bits equal |
| 19126 | brz,a %r8, cmp_multi_core_4_34 |
| 19127 | mov 61, %r17 |
| 19128 | best_set_reg(0x0f17ca83ba3287d7, %r16, %r17) |
| 19129 | cmp_multi_core_4_34: |
| 19130 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 19131 | and %r14, %r9, %r14 !Apply core-mask |
| 19132 | stxa %r14, [0x60]%asi |
| 19133 | st %g0, [%r23] !clear lock |
| 19134 | wr %g0, %r12, %asi |
| 19135 | ta T_CHANGE_NONHPRIV |
| 19136 | .word 0x91950005 ! 46: WRPR_PIL_R wrpr %r20, %r5, %pil |
| 19137 | splash_tba_4_35: |
| 19138 | ta T_CHANGE_PRIV |
| 19139 | setx 0x0000000400380000, %r11, %r12 |
| 19140 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 19141 | mondo_4_36: |
| 19142 | nop |
| 19143 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19144 | ta T_CHANGE_PRIV |
| 19145 | stxa %r4, [%r0+0x3e0] %asi |
| 19146 | .word 0x9d92400a ! 48: WRPR_WSTATE_R wrpr %r9, %r10, %wstate |
| 19147 | .word 0xe33fc012 ! 1: STDF_R std %f17, [%r18, %r31] |
| 19148 | .word 0x9f803d20 ! 49: SIR sir 0x1d20 |
| 19149 | br_longdelay2_4_37: |
| 19150 | .word 0x22ccc001 ! 1: BRZ brz,a,pt %r19,<label_0xcc001> |
| 19151 | .word 0xe23fc00b ! 50: STD_R std %r17, [%r31 + %r11] |
| 19152 | splash_cmpr_4_38: |
| 19153 | mov 0, %r18 |
| 19154 | sllx %r18, 63, %r18 |
| 19155 | rd %tick, %r17 |
| 19156 | add %r17, 0x80, %r17 |
| 19157 | or %r17, %r18, %r17 |
| 19158 | ta T_CHANGE_PRIV |
| 19159 | .word 0xaf800011 ! 51: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19160 | nop |
| 19161 | ta T_CHANGE_HPRIV |
| 19162 | mov 0x4, %r10 |
| 19163 | set sync_thr_counter6, %r23 |
| 19164 | #ifndef SPC |
| 19165 | ldxa [%g0]0x63, %o1 |
| 19166 | and %o1, 0x38, %o1 |
| 19167 | add %o1, %r23, %r23 |
| 19168 | #endif |
| 19169 | cas [%r23],%g0,%r10 !lock |
| 19170 | brnz %r10, sma_4_39 |
| 19171 | rd %asi, %r12 |
| 19172 | wr %g0, 0x40, %asi |
| 19173 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 19174 | set 0x00021fff, %g1 |
| 19175 | stxa %g1, [%g0 + 0x80] %asi |
| 19176 | wr %r12, %g0, %asi |
| 19177 | st %g0, [%r23] |
| 19178 | sma_4_39: |
| 19179 | ta T_CHANGE_NONHPRIV |
| 19180 | .word 0xe3e7e011 ! 52: CASA_R casa [%r31] %asi, %r17, %r17 |
| 19181 | #if (defined SPC || defined CMP) |
| 19182 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_40)+24, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19183 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_40)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19184 | #else |
| 19185 | !! TODO:Generate XIR via RESET_GEN register |
| 19186 | ! setx 0x8900000808, %r16, %r17 |
| 19187 | ! mov 0x2, %r16 |
| 19188 | ! stw %r16, [%r17] |
| 19189 | #endif |
| 19190 | xir_4_40: |
| 19191 | .word 0xa982b25f ! 53: WR_SET_SOFTINT_I wr %r10, 0x125f, %set_softint |
| 19192 | jmptr_4_41: |
| 19193 | nop |
| 19194 | best_set_reg(0xe1200000, %r20, %r27) |
| 19195 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 19196 | donret_4_42: |
| 19197 | nop |
| 19198 | ta T_CHANGE_HPRIV ! macro |
| 19199 | rd %pc, %r12 |
| 19200 | add %r12, (donretarg_4_42-donret_4_42-8), %r12 |
| 19201 | mov 0x38, %r18 |
| 19202 | stxa %r12, [%r18]0x58 |
| 19203 | add %r12, 0x4, %r11 |
| 19204 | wrpr %g0, 0x1, %tl |
| 19205 | wrpr %g0, %r12, %tpc |
| 19206 | wrpr %g0, %r11, %tnpc |
| 19207 | set (0x00dd9925 | (0x89 << 24)), %r13 |
| 19208 | rdpr %tstate, %r16 |
| 19209 | mov 0x1f, %r19 |
| 19210 | and %r19, %r16, %r17 |
| 19211 | andn %r16, %r19, %r16 |
| 19212 | or %r16, %r17, %r20 |
| 19213 | wrpr %r20, %g0, %tstate |
| 19214 | wrhpr %g0, 0x1dcb, %htstate |
| 19215 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19216 | retry |
| 19217 | donretarg_4_42: |
| 19218 | .word 0xe26fe064 ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x0064] |
| 19219 | nop |
| 19220 | ta T_CHANGE_HPRIV |
| 19221 | mov 0x4+1, %r10 |
| 19222 | set sync_thr_counter5, %r23 |
| 19223 | #ifndef SPC |
| 19224 | ldxa [%g0]0x63, %o1 |
| 19225 | and %o1, 0x38, %o1 |
| 19226 | add %o1, %r23, %r23 |
| 19227 | sllx %o1, 5, %o3 !(CID*256) |
| 19228 | #endif |
| 19229 | cas [%r23],%g0,%r10 !lock |
| 19230 | brnz %r10, cwq_4_43 |
| 19231 | rd %asi, %r12 |
| 19232 | wr %g0, 0x40, %asi |
| 19233 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 19234 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 19235 | cmp %l1, 1 |
| 19236 | bne cwq_4_43 |
| 19237 | set CWQ_BASE, %l6 |
| 19238 | #ifndef SPC |
| 19239 | add %l6, %o3, %l6 |
| 19240 | #endif |
| 19241 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 19242 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 19243 | sllx %l2, 32, %l2 |
| 19244 | stx %l2, [%l6 + 0x0] |
| 19245 | membar #Sync |
| 19246 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 19247 | sub %l2, 0x40, %l2 |
| 19248 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 19249 | wr %r12, %g0, %asi |
| 19250 | st %g0, [%r23] |
| 19251 | cwq_4_43: |
| 19252 | ta T_CHANGE_NONHPRIV |
| 19253 | .word 0x93414000 ! 56: RDPC rd %pc, %r9 |
| 19254 | splash_hpstate_4_44: |
| 19255 | .word 0x81982ecd ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x0ecd, %hpstate |
| 19256 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 19257 | .word 0x8d903af9 ! 58: WRPR_PSTATE_I wrpr %r0, 0x1af9, %pstate |
| 19258 | mondo_4_46: |
| 19259 | nop |
| 19260 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19261 | ta T_CHANGE_PRIV |
| 19262 | stxa %r18, [%r0+0x3d0] %asi |
| 19263 | .word 0x9d94c008 ! 59: WRPR_WSTATE_R wrpr %r19, %r8, %wstate |
| 19264 | mondo_4_47: |
| 19265 | nop |
| 19266 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19267 | ta T_CHANGE_PRIV |
| 19268 | stxa %r19, [%r0+0x3d0] %asi |
| 19269 | .word 0x9d94c012 ! 60: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 19270 | splash_hpstate_4_48: |
| 19271 | ta T_CHANGE_NONHPRIV |
| 19272 | .word 0x81983a5d ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x1a5d, %hpstate |
| 19273 | .word 0xd31fe190 ! 62: LDDF_I ldd [%r31, 0x0190], %f9 |
| 19274 | setx vahole_target2, %r18, %r27 |
| 19275 | .word 0xe19fd960 ! 63: LDDFA_R ldda [%r31, %r0], %f16 |
| 19276 | brcommon1_4_50: |
| 19277 | nop |
| 19278 | setx common_target, %r12, %r27 |
| 19279 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 19280 | ba,a .+12 |
| 19281 | .word 0xd3e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r9 |
| 19282 | ba,a .+8 |
| 19283 | jmpl %r27+0, %r27 |
| 19284 | .word 0xa3a0c9b2 ! 64: FDIVs fdivs %f3, %f18, %f17 |
| 19285 | splash_hpstate_4_51: |
| 19286 | ta T_CHANGE_NONHPRIV |
| 19287 | .word 0x819836d7 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x16d7, %hpstate |
| 19288 | .word 0x8d903a45 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1a45, %pstate |
| 19289 | iaw_4_53: |
| 19290 | nop |
| 19291 | ta T_CHANGE_HPRIV |
| 19292 | mov 8, %r18 |
| 19293 | rd %asi, %r12 |
| 19294 | wr %r0, 0x41, %asi |
| 19295 | set sync_thr_counter4, %r23 |
| 19296 | #ifndef SPC |
| 19297 | ldxa [%g0]0x63, %r8 |
| 19298 | and %r8, 0x38, %r8 ! Core ID |
| 19299 | add %r8, %r23, %r23 |
| 19300 | #else |
| 19301 | mov 0, %r8 |
| 19302 | #endif |
| 19303 | mov 0x4, %r16 |
| 19304 | iaw_startwait4_53: |
| 19305 | cas [%r23],%g0,%r16 !lock |
| 19306 | brz,a %r16, continue_iaw_4_53 |
| 19307 | mov (~0x4&0xf), %r16 |
| 19308 | ld [%r23], %r16 |
| 19309 | iaw_wait4_53: |
| 19310 | brnz %r16, iaw_wait4_53 |
| 19311 | ld [%r23], %r16 |
| 19312 | ba iaw_startwait4_53 |
| 19313 | mov 0x4, %r16 |
| 19314 | continue_iaw_4_53: |
| 19315 | sllx %r16, %r8, %r16 !Mask for my core only |
| 19316 | ldxa [0x58]%asi, %r17 !Running_status |
| 19317 | wait_for_stat_4_53: |
| 19318 | ldxa [0x50]%asi, %r13 !Running_rw |
| 19319 | cmp %r13, %r17 |
| 19320 | bne,a wait_for_stat_4_53 |
| 19321 | ldxa [0x58]%asi, %r17 !Running_status |
| 19322 | stxa %r16, [0x68]%asi !Park (W1C) |
| 19323 | ldxa [0x50]%asi, %r14 !Running_rw |
| 19324 | wait_for_iaw_4_53: |
| 19325 | ldxa [0x58]%asi, %r17 !Running_status |
| 19326 | cmp %r14, %r17 |
| 19327 | bne,a wait_for_iaw_4_53 |
| 19328 | ldxa [0x50]%asi, %r14 !Running_rw |
| 19329 | iaw_doit4_53: |
| 19330 | mov 0x38, %r18 |
| 19331 | iaw3_4_53: |
| 19332 | setx vahole_target0, %r20, %r19 |
| 19333 | or %r19, 0x1, %r19 |
| 19334 | stxa %r19, [%r18]0x50 |
| 19335 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 19336 | st %g0, [%r23] !clear lock |
| 19337 | wr %r0, %r12, %asi ! restore %asi |
| 19338 | ta T_CHANGE_NONHPRIV |
| 19339 | .word 0xc1bfe140 ! 67: STDFA_I stda %f0, [0x0140, %r31] |
| 19340 | br_badelay1_4_54: |
| 19341 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> |
| 19342 | .word 0xd337e0a0 ! 1: STQF_I - %f9, [0x00a0, %r31] |
| 19343 | .word 0xc36fe010 ! 1: PREFETCH_I prefetch [%r31 + 0x0010], #one_read |
| 19344 | normalw |
| 19345 | .word 0xa3458000 ! 68: RD_SOFTINT_REG rd %softint, %r17 |
| 19346 | .word 0xd82fe104 ! 69: STB_I stb %r12, [%r31 + 0x0104] |
| 19347 | donret_4_55: |
| 19348 | nop |
| 19349 | ta T_CHANGE_HPRIV ! macro |
| 19350 | rd %pc, %r12 |
| 19351 | add %r12, (donretarg_4_55-donret_4_55-4), %r12 |
| 19352 | mov 0x38, %r18 |
| 19353 | stxa %r12, [%r18]0x58 |
| 19354 | add %r12, 0x4, %r11 |
| 19355 | wrpr %g0, 0x2, %tl |
| 19356 | wrpr %g0, %r12, %tpc |
| 19357 | wrpr %g0, %r11, %tnpc |
| 19358 | set (0x0061e919 | (0x55 << 24)), %r13 |
| 19359 | rdpr %tstate, %r16 |
| 19360 | mov 0x1f, %r19 |
| 19361 | and %r19, %r16, %r17 |
| 19362 | andn %r16, %r19, %r16 |
| 19363 | or %r16, %r17, %r20 |
| 19364 | wrpr %r20, %g0, %tstate |
| 19365 | wrhpr %g0, 0x7c6, %htstate |
| 19366 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19367 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 19368 | done |
| 19369 | donretarg_4_55: |
| 19370 | .word 0x9ba149d2 ! 70: FDIVd fdivd %f36, %f18, %f44 |
| 19371 | nop |
| 19372 | ta T_CHANGE_HPRIV |
| 19373 | mov 0x4, %r10 |
| 19374 | set sync_thr_counter6, %r23 |
| 19375 | #ifndef SPC |
| 19376 | ldxa [%g0]0x63, %o1 |
| 19377 | and %o1, 0x38, %o1 |
| 19378 | add %o1, %r23, %r23 |
| 19379 | #endif |
| 19380 | cas [%r23],%g0,%r10 !lock |
| 19381 | brnz %r10, sma_4_56 |
| 19382 | rd %asi, %r12 |
| 19383 | wr %g0, 0x40, %asi |
| 19384 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 19385 | set 0x00021fff, %g1 |
| 19386 | stxa %g1, [%g0 + 0x80] %asi |
| 19387 | wr %r12, %g0, %asi |
| 19388 | st %g0, [%r23] |
| 19389 | sma_4_56: |
| 19390 | ta T_CHANGE_NONHPRIV |
| 19391 | .word 0xe7e7e00d ! 71: CASA_R casa [%r31] %asi, %r13, %r19 |
| 19392 | .word 0xe19fe080 ! 72: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 19393 | mondo_4_57: |
| 19394 | nop |
| 19395 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19396 | stxa %r19, [%r0+0x3d0] %asi |
| 19397 | .word 0x9d94800c ! 73: WRPR_WSTATE_R wrpr %r18, %r12, %wstate |
| 19398 | nop |
| 19399 | mov 0x80, %g3 |
| 19400 | stxa %g3, [%g3] 0x5f |
| 19401 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 19402 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 19403 | nop |
| 19404 | ta T_CHANGE_HPRIV |
| 19405 | mov 0x4, %r10 |
| 19406 | set sync_thr_counter6, %r23 |
| 19407 | #ifndef SPC |
| 19408 | ldxa [%g0]0x63, %o1 |
| 19409 | and %o1, 0x38, %o1 |
| 19410 | add %o1, %r23, %r23 |
| 19411 | #endif |
| 19412 | cas [%r23],%g0,%r10 !lock |
| 19413 | brnz %r10, sma_4_58 |
| 19414 | rd %asi, %r12 |
| 19415 | wr %g0, 0x40, %asi |
| 19416 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 19417 | set 0x00121fff, %g1 |
| 19418 | stxa %g1, [%g0 + 0x80] %asi |
| 19419 | wr %r12, %g0, %asi |
| 19420 | st %g0, [%r23] |
| 19421 | sma_4_58: |
| 19422 | ta T_CHANGE_NONHPRIV |
| 19423 | .word 0xe7e7e00d ! 76: CASA_R casa [%r31] %asi, %r13, %r19 |
| 19424 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 19425 | nop |
| 19426 | mov 0x80, %g3 |
| 19427 | stxa %g3, [%g3] 0x5f |
| 19428 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 19429 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 19430 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 19431 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 19432 | .word 0xa153c000 ! 79: RDPR_FQ <illegal instruction> |
| 19433 | donret_4_59: |
| 19434 | nop |
| 19435 | ta T_CHANGE_HPRIV ! macro |
| 19436 | rd %pc, %r12 |
| 19437 | add %r12, (donretarg_4_59-donret_4_59-4), %r12 |
| 19438 | mov 0x38, %r18 |
| 19439 | stxa %r12, [%r18]0x58 |
| 19440 | add %r12, 0x4, %r11 |
| 19441 | wrpr %g0, 0x1, %tl |
| 19442 | wrpr %g0, %r12, %tpc |
| 19443 | wrpr %g0, %r11, %tnpc |
| 19444 | set (0x00a3d5be | (4 << 24)), %r13 |
| 19445 | rdpr %tstate, %r16 |
| 19446 | mov 0x1f, %r19 |
| 19447 | and %r19, %r16, %r17 |
| 19448 | andn %r16, %r19, %r16 |
| 19449 | or %r16, %r17, %r20 |
| 19450 | wrpr %r20, %g0, %tstate |
| 19451 | wrhpr %g0, 0x1dcd, %htstate |
| 19452 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19453 | done |
| 19454 | donretarg_4_59: |
| 19455 | .word 0x91a509c3 ! 80: FDIVd fdivd %f20, %f34, %f8 |
| 19456 | .word 0xda8fe138 ! 81: LDUBA_I lduba [%r31, + 0x0138] %asi, %r13 |
| 19457 | .word 0xc19fda00 ! 82: LDDFA_R ldda [%r31, %r0], %f0 |
| 19458 | change_to_randtl_4_60: |
| 19459 | ta T_CHANGE_PRIV ! macro |
| 19460 | done_change_to_randtl_4_60: |
| 19461 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 19462 | splash_cmpr_4_61: |
| 19463 | mov 1, %r18 |
| 19464 | sllx %r18, 63, %r18 |
| 19465 | rd %tick, %r17 |
| 19466 | add %r17, 0x100, %r17 |
| 19467 | or %r17, %r18, %r17 |
| 19468 | ta T_CHANGE_PRIV |
| 19469 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 19470 | jmptr_4_62: |
| 19471 | nop |
| 19472 | best_set_reg(0xe1200000, %r20, %r27) |
| 19473 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 19474 | mondo_4_63: |
| 19475 | nop |
| 19476 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19477 | ta T_CHANGE_PRIV |
| 19478 | stxa %r7, [%r0+0x3c8] %asi |
| 19479 | .word 0x9d90c00b ! 86: WRPR_WSTATE_R wrpr %r3, %r11, %wstate |
| 19480 | #if (defined SPC || defined CMP) |
| 19481 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_64)+40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19482 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_64)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19483 | #else |
| 19484 | !! TODO:Generate XIR via RESET_GEN register |
| 19485 | ! setx 0x8900000808, %r16, %r17 |
| 19486 | ! mov 0x2, %r16 |
| 19487 | ! stw %r16, [%r17] |
| 19488 | #endif |
| 19489 | xir_4_64: |
| 19490 | .word 0xa985335f ! 87: WR_SET_SOFTINT_I wr %r20, 0x135f, %set_softint |
| 19491 | .word 0xdb37e0a0 ! 88: STQF_I - %f13, [0x00a0, %r31] |
| 19492 | mondo_4_65: |
| 19493 | nop |
| 19494 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19495 | ta T_CHANGE_PRIV |
| 19496 | stxa %r18, [%r0+0x3e8] %asi |
| 19497 | .word 0x9d944011 ! 89: WRPR_WSTATE_R wrpr %r17, %r17, %wstate |
| 19498 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 19499 | memptr_4_66: |
| 19500 | set user_data_start, %r31 |
| 19501 | .word 0x85846a58 ! 91: WRCCR_I wr %r17, 0x0a58, %ccr |
| 19502 | jmptr_4_67: |
| 19503 | nop |
| 19504 | best_set_reg(0xe1200000, %r20, %r27) |
| 19505 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 19506 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 19507 | reduce_priv_lvl_4_68: |
| 19508 | ta T_CHANGE_NONPRIV ! macro |
| 19509 | otherw |
| 19510 | mov 0x32, %r30 |
| 19511 | .word 0x91d0001e ! 94: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 19512 | setx vahole_target0, %r18, %r27 |
| 19513 | .word 0xda9fc02d ! 95: LDDA_R ldda [%r31, %r13] 0x01, %r13 |
| 19514 | pmu_4_70: |
| 19515 | nop |
| 19516 | setx 0xfffffb0dffffff94, %g1, %g7 |
| 19517 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 19518 | jmptr_4_71: |
| 19519 | nop |
| 19520 | best_set_reg(0xe1200000, %r20, %r27) |
| 19521 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 19522 | splash_cmpr_4_72: |
| 19523 | mov 0, %r18 |
| 19524 | sllx %r18, 63, %r18 |
| 19525 | rd %tick, %r17 |
| 19526 | add %r17, 0x50, %r17 |
| 19527 | or %r17, %r18, %r17 |
| 19528 | ta T_CHANGE_HPRIV |
| 19529 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 19530 | ta T_CHANGE_PRIV |
| 19531 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19532 | splash_hpstate_4_73: |
| 19533 | .word 0x81982817 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x0817, %hpstate |
| 19534 | donret_4_74: |
| 19535 | nop |
| 19536 | ta T_CHANGE_HPRIV ! macro |
| 19537 | rd %pc, %r12 |
| 19538 | add %r12, (donretarg_4_74-donret_4_74-8), %r12 |
| 19539 | mov 0x38, %r18 |
| 19540 | stxa %r12, [%r18]0x58 |
| 19541 | add %r12, 0x4, %r11 |
| 19542 | wrpr %g0, 0x1, %tl |
| 19543 | wrpr %g0, %r12, %tpc |
| 19544 | wrpr %g0, %r11, %tnpc |
| 19545 | set (0x00bafd57 | (4 << 24)), %r13 |
| 19546 | rdpr %tstate, %r16 |
| 19547 | mov 0x1f, %r19 |
| 19548 | and %r19, %r16, %r17 |
| 19549 | andn %r16, %r19, %r16 |
| 19550 | or %r16, %r17, %r20 |
| 19551 | wrpr %r20, %g0, %tstate |
| 19552 | wrhpr %g0, 0x1657, %htstate |
| 19553 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19554 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 19555 | retry |
| 19556 | donretarg_4_74: |
| 19557 | .word 0xda6fe076 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x0076] |
| 19558 | change_to_randtl_4_75: |
| 19559 | ta T_CHANGE_HPRIV ! macro |
| 19560 | done_change_to_randtl_4_75: |
| 19561 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 19562 | .word 0xa5a1c9cb ! 102: FDIVd fdivd %f38, %f42, %f18 |
| 19563 | .word 0x8d90399f ! 103: WRPR_PSTATE_I wrpr %r0, 0x199f, %pstate |
| 19564 | intveclr_4_78: |
| 19565 | nop |
| 19566 | ta T_CHANGE_HPRIV |
| 19567 | setx 0xfb6c1855dfdab0a0, %r1, %r28 |
| 19568 | stxa %r28, [%g0] 0x72 |
| 19569 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 19570 | donret_4_79: |
| 19571 | nop |
| 19572 | ta T_CHANGE_HPRIV ! macro |
| 19573 | rd %pc, %r12 |
| 19574 | add %r12, (donretarg_4_79-donret_4_79-4), %r12 |
| 19575 | mov 0x38, %r18 |
| 19576 | stxa %r12, [%r18]0x58 |
| 19577 | add %r12, 0x4, %r11 |
| 19578 | wrpr %g0, 0x2, %tl |
| 19579 | wrpr %g0, %r12, %tpc |
| 19580 | wrpr %g0, %r11, %tnpc |
| 19581 | set (0x00d044f6 | (0x88 << 24)), %r13 |
| 19582 | rdpr %tstate, %r16 |
| 19583 | mov 0x1f, %r19 |
| 19584 | and %r19, %r16, %r17 |
| 19585 | andn %r16, %r19, %r16 |
| 19586 | or %r16, %r17, %r20 |
| 19587 | wrpr %r20, %g0, %tstate |
| 19588 | wrhpr %g0, 0x5de, %htstate |
| 19589 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19590 | done |
| 19591 | donretarg_4_79: |
| 19592 | .word 0xa3a449cd ! 105: FDIVd fdivd %f48, %f44, %f48 |
| 19593 | .word 0xe4d7e068 ! 106: LDSHA_I ldsha [%r31, + 0x0068] %asi, %r18 |
| 19594 | tagged_4_80: |
| 19595 | tsubcctv %r17, 0x1b8f, %r16 |
| 19596 | .word 0xe407e08c ! 107: LDUW_I lduw [%r31 + 0x008c], %r18 |
| 19597 | nop |
| 19598 | ta T_CHANGE_HPRIV |
| 19599 | mov 0x4+1, %r10 |
| 19600 | set sync_thr_counter5, %r23 |
| 19601 | #ifndef SPC |
| 19602 | ldxa [%g0]0x63, %o1 |
| 19603 | and %o1, 0x38, %o1 |
| 19604 | add %o1, %r23, %r23 |
| 19605 | sllx %o1, 5, %o3 !(CID*256) |
| 19606 | #endif |
| 19607 | cas [%r23],%g0,%r10 !lock |
| 19608 | brnz %r10, cwq_4_81 |
| 19609 | rd %asi, %r12 |
| 19610 | wr %g0, 0x40, %asi |
| 19611 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 19612 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 19613 | cmp %l1, 1 |
| 19614 | bne cwq_4_81 |
| 19615 | set CWQ_BASE, %l6 |
| 19616 | #ifndef SPC |
| 19617 | add %l6, %o3, %l6 |
| 19618 | #endif |
| 19619 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 19620 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 19621 | sllx %l2, 32, %l2 |
| 19622 | stx %l2, [%l6 + 0x0] |
| 19623 | membar #Sync |
| 19624 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 19625 | sub %l2, 0x40, %l2 |
| 19626 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 19627 | wr %r12, %g0, %asi |
| 19628 | st %g0, [%r23] |
| 19629 | cwq_4_81: |
| 19630 | ta T_CHANGE_NONHPRIV |
| 19631 | .word 0x97414000 ! 108: RDPC rd %pc, %r11 |
| 19632 | splash_lsu_4_82: |
| 19633 | nop |
| 19634 | ta T_CHANGE_HPRIV |
| 19635 | set 0x7ef527c3, %r2 |
| 19636 | mov 0x1, %r1 |
| 19637 | sllx %r1, 32, %r1 |
| 19638 | or %r1, %r2, %r2 |
| 19639 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 19640 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 19641 | splash_cmpr_4_83: |
| 19642 | mov 0, %r18 |
| 19643 | sllx %r18, 63, %r18 |
| 19644 | rd %tick, %r17 |
| 19645 | add %r17, 0x80, %r17 |
| 19646 | or %r17, %r18, %r17 |
| 19647 | ta T_CHANGE_PRIV |
| 19648 | .word 0xaf800011 ! 110: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19649 | splash_htba_4_84: |
| 19650 | nop |
| 19651 | ta T_CHANGE_HPRIV |
| 19652 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 19653 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 19654 | mondo_4_85: |
| 19655 | nop |
| 19656 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19657 | stxa %r17, [%r0+0x3d8] %asi |
| 19658 | .word 0x9d950007 ! 112: WRPR_WSTATE_R wrpr %r20, %r7, %wstate |
| 19659 | .word 0xe1bfdc00 ! 113: STDFA_R stda %f16, [%r0, %r31] |
| 19660 | .word 0xe19fc2c0 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 19661 | splash_cmpr_4_86: |
| 19662 | mov 1, %r18 |
| 19663 | sllx %r18, 63, %r18 |
| 19664 | rd %tick, %r17 |
| 19665 | add %r17, 0x70, %r17 |
| 19666 | or %r17, %r18, %r17 |
| 19667 | ta T_CHANGE_PRIV |
| 19668 | .word 0xaf800011 ! 115: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19669 | #if (defined SPC || defined CMP) |
| 19670 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_87)+48, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19671 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_87)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19672 | #else |
| 19673 | !! TODO:Generate XIR via RESET_GEN register |
| 19674 | ! setx 0x8900000808, %r16, %r17 |
| 19675 | ! mov 0x2, %r16 |
| 19676 | ! stw %r16, [%r17] |
| 19677 | #endif |
| 19678 | xir_4_87: |
| 19679 | .word 0xa981eb68 ! 116: WR_SET_SOFTINT_I wr %r7, 0x0b68, %set_softint |
| 19680 | brcommon3_4_88: |
| 19681 | nop |
| 19682 | setx common_target, %r12, %r27 |
| 19683 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 19684 | ba,a .+12 |
| 19685 | .word 0xd137c014 ! 1: STQF_R - %f8, [%r20, %r31] |
| 19686 | ba,a .+8 |
| 19687 | jmpl %r27+0, %r27 |
| 19688 | .word 0xd11fe130 ! 117: LDDF_I ldd [%r31, 0x0130], %f8 |
| 19689 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 19690 | .word 0x8d902cfb ! 118: WRPR_PSTATE_I wrpr %r0, 0x0cfb, %pstate |
| 19691 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 19692 | reduce_priv_lvl_4_90: |
| 19693 | ta T_CHANGE_NONPRIV ! macro |
| 19694 | #if (defined SPC || defined CMP) |
| 19695 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_91)+32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19696 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_91)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19697 | #else |
| 19698 | !! TODO:Generate XIR via RESET_GEN register |
| 19699 | ! setx 0x8900000808, %r16, %r17 |
| 19700 | ! mov 0x2, %r16 |
| 19701 | ! stw %r16, [%r17] |
| 19702 | #endif |
| 19703 | xir_4_91: |
| 19704 | .word 0xa9823900 ! 120: WR_SET_SOFTINT_I wr %r8, 0x1900, %set_softint |
| 19705 | splash_cmpr_4_92: |
| 19706 | mov 0, %r18 |
| 19707 | sllx %r18, 63, %r18 |
| 19708 | rd %tick, %r17 |
| 19709 | add %r17, 0x70, %r17 |
| 19710 | or %r17, %r18, %r17 |
| 19711 | .word 0xaf800011 ! 121: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19712 | cmp_4_93: |
| 19713 | nop |
| 19714 | ta T_CHANGE_HPRIV |
| 19715 | rd %asi, %r12 |
| 19716 | wr %r0, 0x41, %asi |
| 19717 | set sync_thr_counter4, %r23 |
| 19718 | #ifndef SPC |
| 19719 | ldxa [%g0]0x63, %r8 |
| 19720 | and %r8, 0x38, %r8 ! Core ID |
| 19721 | add %r8, %r23, %r23 |
| 19722 | mov 0xff, %r9 |
| 19723 | xor %r9, 0x4, %r9 |
| 19724 | sllx %r9, %r8, %r9 ! My core mask |
| 19725 | #else |
| 19726 | mov 0, %r8 |
| 19727 | mov 0xff, %r9 |
| 19728 | xor %r9, 0x4, %r9 ! My core mask |
| 19729 | #endif |
| 19730 | mov 0x4, %r10 |
| 19731 | cmp_startwait4_93: |
| 19732 | cas [%r23],%g0,%r10 !lock |
| 19733 | brz,a %r10, continue_cmp_4_93 |
| 19734 | ldxa [0x50]%asi, %r13 !Running_rw |
| 19735 | ld [%r23], %r10 |
| 19736 | cmp_wait4_93: |
| 19737 | brnz,a %r10, cmp_wait4_93 |
| 19738 | ld [%r23], %r10 |
| 19739 | ba cmp_startwait4_93 |
| 19740 | mov 0x4, %r10 |
| 19741 | continue_cmp_4_93: |
| 19742 | ldxa [0x58]%asi, %r14 !Running_status |
| 19743 | xnor %r14, %r13, %r14 !Bits equal |
| 19744 | brz,a %r8, cmp_multi_core_4_93 |
| 19745 | mov 0xb5, %r17 |
| 19746 | best_set_reg(0x6b8d251d390c771d, %r16, %r17) |
| 19747 | cmp_multi_core_4_93: |
| 19748 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 19749 | and %r14, %r9, %r14 !Apply core-mask |
| 19750 | stxa %r14, [0x68]%asi |
| 19751 | st %g0, [%r23] !clear lock |
| 19752 | wr %g0, %r12, %asi |
| 19753 | ta T_CHANGE_NONHPRIV |
| 19754 | .word 0xa5a00161 ! 122: FABSq dis not found |
| 19755 | |
| 19756 | cerer_4_94: |
| 19757 | nop |
| 19758 | ta T_CHANGE_HPRIV |
| 19759 | best_set_reg(0xa781dd9b4d946adb, %r26, %r27) |
| 19760 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 19761 | sllx %r26, 32, %r26 |
| 19762 | or %r26, %r27, %r27 |
| 19763 | mov 0x10, %r26 |
| 19764 | stxa %r27, [%r26]0x4c |
| 19765 | ta T_CHANGE_NONHPRIV |
| 19766 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 19767 | splash_cmpr_4_95: |
| 19768 | mov 0, %r18 |
| 19769 | sllx %r18, 63, %r18 |
| 19770 | rd %tick, %r17 |
| 19771 | add %r17, 0x100, %r17 |
| 19772 | or %r17, %r18, %r17 |
| 19773 | ta T_CHANGE_HPRIV |
| 19774 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 19775 | ta T_CHANGE_PRIV |
| 19776 | .word 0xb3800011 ! 124: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 19777 | .word 0xe1bfda00 ! 125: STDFA_R stda %f16, [%r0, %r31] |
| 19778 | jmptr_4_96: |
| 19779 | nop |
| 19780 | best_set_reg(0xe1200000, %r20, %r27) |
| 19781 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 19782 | setx 0x227f01abad529476, %r1, %r28 |
| 19783 | stxa %r28, [%g0] 0x73 |
| 19784 | intvec_4_97: |
| 19785 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19786 | pmu_4_98: |
| 19787 | nop |
| 19788 | ta T_CHANGE_PRIV |
| 19789 | setx 0xfffff18dfffff303, %g1, %g7 |
| 19790 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 19791 | donret_4_99: |
| 19792 | nop |
| 19793 | ta T_CHANGE_HPRIV ! macro |
| 19794 | rd %pc, %r12 |
| 19795 | add %r12, (donretarg_4_99-donret_4_99-4), %r12 |
| 19796 | mov 0x38, %r18 |
| 19797 | stxa %r12, [%r18]0x58 |
| 19798 | add %r12, 0x4, %r11 |
| 19799 | wrpr %g0, 0x1, %tl |
| 19800 | wrpr %g0, %r12, %tpc |
| 19801 | wrpr %g0, %r11, %tnpc |
| 19802 | set (0x00674c70 | (32 << 24)), %r13 |
| 19803 | rdpr %tstate, %r16 |
| 19804 | mov 0x1f, %r19 |
| 19805 | and %r19, %r16, %r17 |
| 19806 | andn %r16, %r19, %r16 |
| 19807 | or %r16, %r17, %r20 |
| 19808 | wrpr %r20, %g0, %tstate |
| 19809 | wrhpr %g0, 0xc4d, %htstate |
| 19810 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 19811 | done |
| 19812 | donretarg_4_99: |
| 19813 | .word 0x97a449c4 ! 129: FDIVd fdivd %f48, %f4, %f42 |
| 19814 | pmu_4_100: |
| 19815 | nop |
| 19816 | setx 0xfffffe75fffff3b6, %g1, %g7 |
| 19817 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 19818 | mondo_4_101: |
| 19819 | nop |
| 19820 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19821 | ta T_CHANGE_PRIV |
| 19822 | stxa %r5, [%r0+0x3d0] %asi |
| 19823 | .word 0x9d914012 ! 131: WRPR_WSTATE_R wrpr %r5, %r18, %wstate |
| 19824 | nop |
| 19825 | ta T_CHANGE_HPRIV |
| 19826 | mov 0x4, %r10 |
| 19827 | set sync_thr_counter6, %r23 |
| 19828 | #ifndef SPC |
| 19829 | ldxa [%g0]0x63, %o1 |
| 19830 | and %o1, 0x38, %o1 |
| 19831 | add %o1, %r23, %r23 |
| 19832 | #endif |
| 19833 | cas [%r23],%g0,%r10 !lock |
| 19834 | brnz %r10, sma_4_102 |
| 19835 | rd %asi, %r12 |
| 19836 | wr %g0, 0x40, %asi |
| 19837 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 19838 | set 0x000e1fff, %g1 |
| 19839 | stxa %g1, [%g0 + 0x80] %asi |
| 19840 | wr %r12, %g0, %asi |
| 19841 | st %g0, [%r23] |
| 19842 | sma_4_102: |
| 19843 | ta T_CHANGE_NONHPRIV |
| 19844 | .word 0xd9e7e00b ! 132: CASA_R casa [%r31] %asi, %r11, %r12 |
| 19845 | .word 0xc1bfdb60 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 19846 | splash_tba_4_103: |
| 19847 | ta T_CHANGE_PRIV |
| 19848 | setx 0x0000000400380000, %r11, %r12 |
| 19849 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 19850 | splash_lsu_4_104: |
| 19851 | nop |
| 19852 | ta T_CHANGE_HPRIV |
| 19853 | set 0xfdd0410f, %r2 |
| 19854 | mov 0x1, %r1 |
| 19855 | sllx %r1, 32, %r1 |
| 19856 | or %r1, %r2, %r2 |
| 19857 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 19858 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 19859 | setx 0x3eacce82e2f328b5, %r1, %r28 |
| 19860 | stxa %r28, [%g0] 0x73 |
| 19861 | intvec_4_105: |
| 19862 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19863 | change_to_randtl_4_106: |
| 19864 | ta T_CHANGE_PRIV ! macro |
| 19865 | done_change_to_randtl_4_106: |
| 19866 | .word 0x8f902000 ! 137: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 19867 | nop |
| 19868 | ta T_CHANGE_HPRIV |
| 19869 | mov 0x4+1, %r10 |
| 19870 | set sync_thr_counter5, %r23 |
| 19871 | #ifndef SPC |
| 19872 | ldxa [%g0]0x63, %o1 |
| 19873 | and %o1, 0x38, %o1 |
| 19874 | add %o1, %r23, %r23 |
| 19875 | sllx %o1, 5, %o3 !(CID*256) |
| 19876 | #endif |
| 19877 | cas [%r23],%g0,%r10 !lock |
| 19878 | brnz %r10, cwq_4_107 |
| 19879 | rd %asi, %r12 |
| 19880 | wr %g0, 0x40, %asi |
| 19881 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 19882 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 19883 | cmp %l1, 1 |
| 19884 | bne cwq_4_107 |
| 19885 | set CWQ_BASE, %l6 |
| 19886 | #ifndef SPC |
| 19887 | add %l6, %o3, %l6 |
| 19888 | #endif |
| 19889 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 19890 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 19891 | sllx %l2, 32, %l2 |
| 19892 | stx %l2, [%l6 + 0x0] |
| 19893 | membar #Sync |
| 19894 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 19895 | sub %l2, 0x40, %l2 |
| 19896 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 19897 | wr %r12, %g0, %asi |
| 19898 | st %g0, [%r23] |
| 19899 | cwq_4_107: |
| 19900 | ta T_CHANGE_NONHPRIV |
| 19901 | .word 0xa7414000 ! 138: RDPC rd %pc, %r19 |
| 19902 | #if (defined SPC || defined CMP) |
| 19903 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_108)+48, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19904 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_108)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 19905 | #else |
| 19906 | !! TODO:Generate XIR via RESET_GEN register |
| 19907 | ! setx 0x8900000808, %r16, %r17 |
| 19908 | ! mov 0x2, %r16 |
| 19909 | ! stw %r16, [%r17] |
| 19910 | #endif |
| 19911 | xir_4_108: |
| 19912 | .word 0xa98125d1 ! 139: WR_SET_SOFTINT_I wr %r4, 0x05d1, %set_softint |
| 19913 | br_badelay1_4_109: |
| 19914 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19915 | .word 0xdb343f67 ! 1: STQF_I - %f13, [0x1f67, %r16] |
| 19916 | .word 0x9bb7c4d0 ! 1: FCMPNE32 fcmpne32 %d62, %d16, %r13 |
| 19917 | normalw |
| 19918 | .word 0x93458000 ! 140: RD_SOFTINT_REG rd %softint, %r9 |
| 19919 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 19920 | reduce_priv_lvl_4_110: |
| 19921 | ta T_CHANGE_NONHPRIV ! macro |
| 19922 | setx vahole_target1, %r18, %r27 |
| 19923 | .word 0xc3eac023 ! 142: PREFETCHA_R prefetcha [%r11, %r3] 0x01, #one_read |
| 19924 | nop |
| 19925 | ta T_CHANGE_HPRIV |
| 19926 | mov 0x4+1, %r10 |
| 19927 | set sync_thr_counter5, %r23 |
| 19928 | #ifndef SPC |
| 19929 | ldxa [%g0]0x63, %o1 |
| 19930 | and %o1, 0x38, %o1 |
| 19931 | add %o1, %r23, %r23 |
| 19932 | sllx %o1, 5, %o3 !(CID*256) |
| 19933 | #endif |
| 19934 | cas [%r23],%g0,%r10 !lock |
| 19935 | brnz %r10, cwq_4_112 |
| 19936 | rd %asi, %r12 |
| 19937 | wr %g0, 0x40, %asi |
| 19938 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 19939 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 19940 | cmp %l1, 1 |
| 19941 | bne cwq_4_112 |
| 19942 | set CWQ_BASE, %l6 |
| 19943 | #ifndef SPC |
| 19944 | add %l6, %o3, %l6 |
| 19945 | #endif |
| 19946 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 19947 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 19948 | sllx %l2, 32, %l2 |
| 19949 | stx %l2, [%l6 + 0x0] |
| 19950 | membar #Sync |
| 19951 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 19952 | sub %l2, 0x40, %l2 |
| 19953 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 19954 | wr %r12, %g0, %asi |
| 19955 | st %g0, [%r23] |
| 19956 | cwq_4_112: |
| 19957 | ta T_CHANGE_NONHPRIV |
| 19958 | .word 0x97414000 ! 143: RDPC rd %pc, %r11 |
| 19959 | .word 0xd91fe0b8 ! 144: LDDF_I ldd [%r31, 0x00b8], %f12 |
| 19960 | setx 0xffbf806bcc23d3e8, %r1, %r28 |
| 19961 | stxa %r28, [%g0] 0x73 |
| 19962 | intvec_4_113: |
| 19963 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19964 | .word 0x96d40007 ! 146: UMULcc_R umulcc %r16, %r7, %r11 |
| 19965 | splash_cmpr_4_114: |
| 19966 | mov 0, %r18 |
| 19967 | sllx %r18, 63, %r18 |
| 19968 | rd %tick, %r17 |
| 19969 | add %r17, 0x70, %r17 |
| 19970 | or %r17, %r18, %r17 |
| 19971 | ta T_CHANGE_HPRIV |
| 19972 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 19973 | .word 0xaf800011 ! 147: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 19974 | mondo_4_115: |
| 19975 | nop |
| 19976 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 19977 | ta T_CHANGE_PRIV |
| 19978 | stxa %r11, [%r0+0x3c8] %asi |
| 19979 | .word 0x9d94c006 ! 148: WRPR_WSTATE_R wrpr %r19, %r6, %wstate |
| 19980 | change_to_randtl_4_116: |
| 19981 | ta T_CHANGE_PRIV ! macro |
| 19982 | done_change_to_randtl_4_116: |
| 19983 | .word 0x8f902000 ! 149: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 19984 | change_to_randtl_4_117: |
| 19985 | ta T_CHANGE_HPRIV ! macro |
| 19986 | done_change_to_randtl_4_117: |
| 19987 | .word 0x8f902001 ! 150: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 19988 | #if (defined SPC || defined CMP) |
| 19989 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_118) + 32, 16, 16)) -> intp(5,0,18) |
| 19990 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_118)&0xffffffff) + 32, 16, 16)) -> intp(5,0,18) |
| 19991 | #else |
| 19992 | setx 0xc957b1e784ad2382, %r1, %r28 |
| 19993 | stxa %r28, [%g0] 0x73 |
| 19994 | #endif |
| 19995 | intvec_4_118: |
| 19996 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 19997 | memptr_4_119: |
| 19998 | set 0x60540000, %r31 |
| 19999 | .word 0x8582250e ! 152: WRCCR_I wr %r8, 0x050e, %ccr |
| 20000 | nop |
| 20001 | mov 0x80, %g3 |
| 20002 | stxa %g3, [%g3] 0x57 |
| 20003 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 20004 | .word 0x8d902d6e ! 154: WRPR_PSTATE_I wrpr %r0, 0x0d6e, %pstate |
| 20005 | mondo_4_121: |
| 20006 | nop |
| 20007 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20008 | ta T_CHANGE_PRIV |
| 20009 | stxa %r18, [%r0+0x3c8] %asi |
| 20010 | .word 0x9d948013 ! 155: WRPR_WSTATE_R wrpr %r18, %r19, %wstate |
| 20011 | .word 0x8d902f39 ! 156: WRPR_PSTATE_I wrpr %r0, 0x0f39, %pstate |
| 20012 | .word 0x83d020b2 ! 157: Tcc_I te icc_or_xcc, %r0 + 178 |
| 20013 | setx 0x2e31548f2d5e7325, %r1, %r28 |
| 20014 | stxa %r28, [%g0] 0x73 |
| 20015 | intvec_4_123: |
| 20016 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20017 | .word 0xc36cc012 ! 159: PREFETCH_R prefetch [%r19 + %r18], #one_read |
| 20018 | fpinit_4_124: |
| 20019 | nop |
| 20020 | setx fp_data_quads, %r19, %r20 |
| 20021 | ldd [%r20], %f0 |
| 20022 | ldd [%r20+8], %f4 |
| 20023 | ld [%r20+16], %fsr |
| 20024 | ld [%r20+24], %r19 |
| 20025 | wr %r19, %g0, %gsr |
| 20026 | .word 0x87a80a44 ! 160: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 20027 | splash_hpstate_4_125: |
| 20028 | ta T_CHANGE_NONHPRIV |
| 20029 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 20030 | .word 0x81983c3e ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1c3e, %hpstate |
| 20031 | nop |
| 20032 | mov 0x80, %g3 |
| 20033 | stxa %g3, [%g3] 0x57 |
| 20034 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 20035 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 20036 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 20037 | nop |
| 20038 | ta T_CHANGE_HPRIV |
| 20039 | mov 0x4, %r10 |
| 20040 | set sync_thr_counter6, %r23 |
| 20041 | #ifndef SPC |
| 20042 | ldxa [%g0]0x63, %o1 |
| 20043 | and %o1, 0x38, %o1 |
| 20044 | add %o1, %r23, %r23 |
| 20045 | #endif |
| 20046 | cas [%r23],%g0,%r10 !lock |
| 20047 | brnz %r10, sma_4_126 |
| 20048 | rd %asi, %r12 |
| 20049 | wr %g0, 0x40, %asi |
| 20050 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 20051 | set 0x001e1fff, %g1 |
| 20052 | stxa %g1, [%g0 + 0x80] %asi |
| 20053 | wr %r12, %g0, %asi |
| 20054 | st %g0, [%r23] |
| 20055 | sma_4_126: |
| 20056 | ta T_CHANGE_NONHPRIV |
| 20057 | .word 0xe1e7e013 ! 163: CASA_R casa [%r31] %asi, %r19, %r16 |
| 20058 | nop |
| 20059 | ta T_CHANGE_HPRIV |
| 20060 | mov 0x4, %r10 |
| 20061 | set sync_thr_counter6, %r23 |
| 20062 | #ifndef SPC |
| 20063 | ldxa [%g0]0x63, %o1 |
| 20064 | and %o1, 0x38, %o1 |
| 20065 | add %o1, %r23, %r23 |
| 20066 | #endif |
| 20067 | cas [%r23],%g0,%r10 !lock |
| 20068 | brnz %r10, sma_4_127 |
| 20069 | rd %asi, %r12 |
| 20070 | wr %g0, 0x40, %asi |
| 20071 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 20072 | set 0x000a1fff, %g1 |
| 20073 | stxa %g1, [%g0 + 0x80] %asi |
| 20074 | wr %r12, %g0, %asi |
| 20075 | st %g0, [%r23] |
| 20076 | sma_4_127: |
| 20077 | ta T_CHANGE_NONHPRIV |
| 20078 | .word 0xe1e7e010 ! 164: CASA_R casa [%r31] %asi, %r16, %r16 |
| 20079 | pmu_4_128: |
| 20080 | nop |
| 20081 | ta T_CHANGE_PRIV |
| 20082 | setx 0xfffff81bfffffc72, %g1, %g7 |
| 20083 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20084 | splash_cmpr_4_129: |
| 20085 | mov 1, %r18 |
| 20086 | sllx %r18, 63, %r18 |
| 20087 | rd %tick, %r17 |
| 20088 | add %r17, 0x70, %r17 |
| 20089 | or %r17, %r18, %r17 |
| 20090 | ta T_CHANGE_PRIV |
| 20091 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20092 | ceter_4_130: |
| 20093 | nop |
| 20094 | ta T_CHANGE_HPRIV |
| 20095 | mov 1, %r17 |
| 20096 | sllx %r17, 60, %r17 |
| 20097 | mov 0x18, %r16 |
| 20098 | stxa %r17, [%r16]0x4c |
| 20099 | ta T_CHANGE_NONHPRIV |
| 20100 | .word 0x95410000 ! 167: RDTICK rd %tick, %r10 |
| 20101 | jmptr_4_131: |
| 20102 | nop |
| 20103 | best_set_reg(0xe1200000, %r20, %r27) |
| 20104 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 20105 | .word 0x9b688004 ! 169: SDIVX_R sdivx %r2, %r4, %r13 |
| 20106 | splash_cmpr_4_132: |
| 20107 | mov 0, %r18 |
| 20108 | sllx %r18, 63, %r18 |
| 20109 | rd %tick, %r17 |
| 20110 | add %r17, 0x100, %r17 |
| 20111 | or %r17, %r18, %r17 |
| 20112 | .word 0xb3800011 ! 170: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20113 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 20114 | nop |
| 20115 | ta T_CHANGE_HPRIV |
| 20116 | mov 0x4+1, %r10 |
| 20117 | set sync_thr_counter5, %r23 |
| 20118 | #ifndef SPC |
| 20119 | ldxa [%g0]0x63, %o1 |
| 20120 | and %o1, 0x38, %o1 |
| 20121 | add %o1, %r23, %r23 |
| 20122 | sllx %o1, 5, %o3 !(CID*256) |
| 20123 | #endif |
| 20124 | cas [%r23],%g0,%r10 !lock |
| 20125 | brnz %r10, cwq_4_133 |
| 20126 | rd %asi, %r12 |
| 20127 | wr %g0, 0x40, %asi |
| 20128 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 20129 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 20130 | cmp %l1, 1 |
| 20131 | bne cwq_4_133 |
| 20132 | set CWQ_BASE, %l6 |
| 20133 | #ifndef SPC |
| 20134 | add %l6, %o3, %l6 |
| 20135 | #endif |
| 20136 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 20137 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 20138 | sllx %l2, 32, %l2 |
| 20139 | stx %l2, [%l6 + 0x0] |
| 20140 | membar #Sync |
| 20141 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 20142 | sub %l2, 0x40, %l2 |
| 20143 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 20144 | wr %r12, %g0, %asi |
| 20145 | st %g0, [%r23] |
| 20146 | cwq_4_133: |
| 20147 | ta T_CHANGE_NONHPRIV |
| 20148 | .word 0xa5414000 ! 172: RDPC rd %pc, %r18 |
| 20149 | jmptr_4_134: |
| 20150 | nop |
| 20151 | best_set_reg(0xe1200000, %r20, %r27) |
| 20152 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 20153 | .word 0xe09fc2e0 ! 174: LDDA_R ldda [%r31, %r0] 0x17, %r16 |
| 20154 | setx 0xf177ca81c0e642c6, %r1, %r28 |
| 20155 | stxa %r28, [%g0] 0x73 |
| 20156 | intvec_4_135: |
| 20157 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20158 | splash_cmpr_4_136: |
| 20159 | mov 0, %r18 |
| 20160 | sllx %r18, 63, %r18 |
| 20161 | rd %tick, %r17 |
| 20162 | add %r17, 0x50, %r17 |
| 20163 | or %r17, %r18, %r17 |
| 20164 | ta T_CHANGE_HPRIV |
| 20165 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20166 | .word 0xaf800011 ! 176: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 20167 | .word 0xe0d7e018 ! 177: LDSHA_I ldsha [%r31, + 0x0018] %asi, %r16 |
| 20168 | splash_cmpr_4_137: |
| 20169 | mov 0, %r18 |
| 20170 | sllx %r18, 63, %r18 |
| 20171 | rd %tick, %r17 |
| 20172 | add %r17, 0x80, %r17 |
| 20173 | or %r17, %r18, %r17 |
| 20174 | ta T_CHANGE_HPRIV |
| 20175 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20176 | ta T_CHANGE_PRIV |
| 20177 | .word 0xaf800011 ! 178: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 20178 | mondo_4_138: |
| 20179 | nop |
| 20180 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20181 | stxa %r12, [%r0+0x3d0] %asi |
| 20182 | .word 0x9d944012 ! 179: WRPR_WSTATE_R wrpr %r17, %r18, %wstate |
| 20183 | change_to_randtl_4_139: |
| 20184 | ta T_CHANGE_HPRIV ! macro |
| 20185 | done_change_to_randtl_4_139: |
| 20186 | .word 0x8f902001 ! 180: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 20187 | jmptr_4_140: |
| 20188 | nop |
| 20189 | best_set_reg(0xe1200000, %r20, %r27) |
| 20190 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 20191 | cmp_4_141: |
| 20192 | nop |
| 20193 | ta T_CHANGE_HPRIV |
| 20194 | rd %asi, %r12 |
| 20195 | wr %r0, 0x41, %asi |
| 20196 | set sync_thr_counter4, %r23 |
| 20197 | #ifndef SPC |
| 20198 | ldxa [%g0]0x63, %r8 |
| 20199 | and %r8, 0x38, %r8 ! Core ID |
| 20200 | add %r8, %r23, %r23 |
| 20201 | mov 0xff, %r9 |
| 20202 | xor %r9, 0x4, %r9 |
| 20203 | sllx %r9, %r8, %r9 ! My core mask |
| 20204 | #else |
| 20205 | mov 0, %r8 |
| 20206 | mov 0xff, %r9 |
| 20207 | xor %r9, 0x4, %r9 ! My core mask |
| 20208 | #endif |
| 20209 | mov 0x4, %r10 |
| 20210 | cmp_startwait4_141: |
| 20211 | cas [%r23],%g0,%r10 !lock |
| 20212 | brz,a %r10, continue_cmp_4_141 |
| 20213 | ldxa [0x50]%asi, %r13 !Running_rw |
| 20214 | ld [%r23], %r10 |
| 20215 | cmp_wait4_141: |
| 20216 | brnz,a %r10, cmp_wait4_141 |
| 20217 | ld [%r23], %r10 |
| 20218 | ba cmp_startwait4_141 |
| 20219 | mov 0x4, %r10 |
| 20220 | continue_cmp_4_141: |
| 20221 | ldxa [0x58]%asi, %r14 !Running_status |
| 20222 | xnor %r14, %r13, %r14 !Bits equal |
| 20223 | brz,a %r8, cmp_multi_core_4_141 |
| 20224 | mov 0x48, %r17 |
| 20225 | best_set_reg(0x1a03e7318dfed4ee, %r16, %r17) |
| 20226 | cmp_multi_core_4_141: |
| 20227 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 20228 | and %r14, %r9, %r14 !Apply core-mask |
| 20229 | stxa %r14, [0x68]%asi |
| 20230 | st %g0, [%r23] !clear lock |
| 20231 | wr %g0, %r12, %asi |
| 20232 | .word 0x91940011 ! 182: WRPR_PIL_R wrpr %r16, %r17, %pil |
| 20233 | donret_4_142: |
| 20234 | nop |
| 20235 | ta T_CHANGE_HPRIV ! macro |
| 20236 | rd %pc, %r12 |
| 20237 | add %r12, (donretarg_4_142-donret_4_142-8), %r12 |
| 20238 | mov 0x38, %r18 |
| 20239 | stxa %r12, [%r18]0x58 |
| 20240 | add %r12, 0x4, %r11 |
| 20241 | wrpr %g0, 0x2, %tl |
| 20242 | wrpr %g0, %r12, %tpc |
| 20243 | wrpr %g0, %r11, %tnpc |
| 20244 | set (0x00f1f746 | (0x83 << 24)), %r13 |
| 20245 | rdpr %tstate, %r16 |
| 20246 | mov 0x1f, %r19 |
| 20247 | and %r19, %r16, %r17 |
| 20248 | andn %r16, %r19, %r16 |
| 20249 | or %r16, %r17, %r20 |
| 20250 | wrpr %r20, %g0, %tstate |
| 20251 | wrhpr %g0, 0x44, %htstate |
| 20252 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 20253 | retry |
| 20254 | donretarg_4_142: |
| 20255 | .word 0x95a1c9d2 ! 183: FDIVd fdivd %f38, %f18, %f10 |
| 20256 | .word 0xe6c7e1b8 ! 184: LDSWA_I ldswa [%r31, + 0x01b8] %asi, %r19 |
| 20257 | .word 0xc1bfdf20 ! 185: STDFA_R stda %f0, [%r0, %r31] |
| 20258 | .word 0xe6cfe150 ! 186: LDSBA_I ldsba [%r31, + 0x0150] %asi, %r19 |
| 20259 | splash_cmpr_4_143: |
| 20260 | mov 0, %r18 |
| 20261 | sllx %r18, 63, %r18 |
| 20262 | rd %tick, %r17 |
| 20263 | add %r17, 0x50, %r17 |
| 20264 | or %r17, %r18, %r17 |
| 20265 | ta T_CHANGE_HPRIV |
| 20266 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20267 | .word 0xb3800011 ! 187: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20268 | .word 0xa8818003 ! 188: ADDcc_R addcc %r6, %r3, %r20 |
| 20269 | ibp_4_144: |
| 20270 | nop |
| 20271 | ta T_CHANGE_NONHPRIV |
| 20272 | .word 0xc19fe0a0 ! 189: LDDFA_I ldda [%r31, 0x00a0], %f0 |
| 20273 | ceter_4_145: |
| 20274 | nop |
| 20275 | ta T_CHANGE_HPRIV |
| 20276 | mov 7, %r17 |
| 20277 | sllx %r17, 60, %r17 |
| 20278 | mov 0x18, %r16 |
| 20279 | stxa %r17, [%r16]0x4c |
| 20280 | ta T_CHANGE_NONHPRIV |
| 20281 | .word 0xa9410000 ! 190: RDTICK rd %tick, %r20 |
| 20282 | ceter_4_146: |
| 20283 | nop |
| 20284 | ta T_CHANGE_HPRIV |
| 20285 | mov 7, %r17 |
| 20286 | sllx %r17, 60, %r17 |
| 20287 | mov 0x18, %r16 |
| 20288 | stxa %r17, [%r16]0x4c |
| 20289 | ta T_CHANGE_NONHPRIV |
| 20290 | .word 0x9b410000 ! 191: RDTICK rd %tick, %r13 |
| 20291 | setx 0x608cbada9113cb41, %r1, %r28 |
| 20292 | stxa %r28, [%g0] 0x73 |
| 20293 | intvec_4_147: |
| 20294 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20295 | invtsb_4_148: |
| 20296 | nop |
| 20297 | ta T_CHANGE_HPRIV |
| 20298 | rd %asi, %r21 |
| 20299 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 20300 | mov 1, %r20 |
| 20301 | sllx %r20, 63, %r20 |
| 20302 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 20303 | xor %r22 ,%r20, %r22 |
| 20304 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 20305 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 20306 | xor %r22 ,%r20, %r22 |
| 20307 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 20308 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 20309 | xor %r22 ,%r20, %r22 |
| 20310 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 20311 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 20312 | xor %r22 ,%r20, %r22 |
| 20313 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 20314 | wr %r21, %r0, %asi |
| 20315 | ta T_CHANGE_NONHPRIV |
| 20316 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 20317 | cmp_4_149: |
| 20318 | nop |
| 20319 | ta T_CHANGE_HPRIV |
| 20320 | rd %asi, %r12 |
| 20321 | wr %r0, 0x41, %asi |
| 20322 | set sync_thr_counter4, %r23 |
| 20323 | #ifndef SPC |
| 20324 | ldxa [%g0]0x63, %r8 |
| 20325 | and %r8, 0x38, %r8 ! Core ID |
| 20326 | add %r8, %r23, %r23 |
| 20327 | mov 0xff, %r9 |
| 20328 | xor %r9, 0x4, %r9 |
| 20329 | sllx %r9, %r8, %r9 ! My core mask |
| 20330 | #else |
| 20331 | mov 0, %r8 |
| 20332 | mov 0xff, %r9 |
| 20333 | xor %r9, 0x4, %r9 ! My core mask |
| 20334 | #endif |
| 20335 | mov 0x4, %r10 |
| 20336 | cmp_startwait4_149: |
| 20337 | cas [%r23],%g0,%r10 !lock |
| 20338 | brz,a %r10, continue_cmp_4_149 |
| 20339 | ldxa [0x50]%asi, %r13 !Running_rw |
| 20340 | ld [%r23], %r10 |
| 20341 | cmp_wait4_149: |
| 20342 | brnz,a %r10, cmp_wait4_149 |
| 20343 | ld [%r23], %r10 |
| 20344 | ba cmp_startwait4_149 |
| 20345 | mov 0x4, %r10 |
| 20346 | continue_cmp_4_149: |
| 20347 | ldxa [0x58]%asi, %r14 !Running_status |
| 20348 | xnor %r14, %r13, %r14 !Bits equal |
| 20349 | brz,a %r8, cmp_multi_core_4_149 |
| 20350 | mov 0x9f, %r17 |
| 20351 | best_set_reg(0x02bdd6dea7c5800b, %r16, %r17) |
| 20352 | cmp_multi_core_4_149: |
| 20353 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 20354 | and %r14, %r9, %r14 !Apply core-mask |
| 20355 | stxa %r14, [0x68]%asi |
| 20356 | st %g0, [%r23] !clear lock |
| 20357 | wr %g0, %r12, %asi |
| 20358 | .word 0x99a00166 ! 194: FABSq dis not found |
| 20359 | |
| 20360 | .word 0xe6c7e118 ! 195: LDSWA_I ldswa [%r31, + 0x0118] %asi, %r19 |
| 20361 | splash_lsu_4_150: |
| 20362 | nop |
| 20363 | ta T_CHANGE_HPRIV |
| 20364 | set 0x070d1fcc, %r2 |
| 20365 | mov 0x4, %r1 |
| 20366 | sllx %r1, 32, %r1 |
| 20367 | or %r1, %r2, %r2 |
| 20368 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20369 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20370 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 20371 | reduce_priv_lvl_4_151: |
| 20372 | ta T_CHANGE_NONPRIV ! macro |
| 20373 | .word 0xe65fe020 ! 198: LDX_I ldx [%r31 + 0x0020], %r19 |
| 20374 | splash_hpstate_4_152: |
| 20375 | ta T_CHANGE_NONHPRIV |
| 20376 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 20377 | .word 0x8198295d ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x095d, %hpstate |
| 20378 | .word 0x9753c000 ! 200: RDPR_FQ <illegal instruction> |
| 20379 | .word 0xd33fc011 ! 1: STDF_R std %f9, [%r17, %r31] |
| 20380 | .word 0x9f803490 ! 201: SIR sir 0x1490 |
| 20381 | mondo_4_153: |
| 20382 | nop |
| 20383 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20384 | stxa %r17, [%r0+0x3e8] %asi |
| 20385 | .word 0x9d950007 ! 202: WRPR_WSTATE_R wrpr %r20, %r7, %wstate |
| 20386 | jmptr_4_154: |
| 20387 | nop |
| 20388 | best_set_reg(0xe1200000, %r20, %r27) |
| 20389 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 20390 | .word 0x91a509d4 ! 204: FDIVd fdivd %f20, %f20, %f8 |
| 20391 | pmu_4_156: |
| 20392 | nop |
| 20393 | ta T_CHANGE_PRIV |
| 20394 | setx 0xfffff56ffffff036, %g1, %g7 |
| 20395 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20396 | setx 0x0dd023b6f30530f0, %r1, %r28 |
| 20397 | stxa %r28, [%g0] 0x73 |
| 20398 | intvec_4_157: |
| 20399 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20400 | .word 0xe677e1b8 ! 207: STX_I stx %r19, [%r31 + 0x01b8] |
| 20401 | brcommon2_4_158: |
| 20402 | nop |
| 20403 | setx common_target, %r12, %r27 |
| 20404 | ba,a .+12 |
| 20405 | .word 0xa7a7c96b ! 1: FMULq dis not found |
| 20406 | |
| 20407 | ba,a .+8 |
| 20408 | jmpl %r27+0, %r27 |
| 20409 | .word 0xc19fde00 ! 208: LDDFA_R ldda [%r31, %r0], %f0 |
| 20410 | .word 0x92fc4014 ! 209: SDIVcc_R sdivcc %r17, %r20, %r9 |
| 20411 | .word 0xd897e128 ! 210: LDUHA_I lduha [%r31, + 0x0128] %asi, %r12 |
| 20412 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 20413 | change_to_randtl_4_159: |
| 20414 | ta T_CHANGE_HPRIV ! macro |
| 20415 | done_change_to_randtl_4_159: |
| 20416 | .word 0x8f902000 ! 212: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 20417 | tagged_4_160: |
| 20418 | tsubcctv %r11, 0x1811, %r19 |
| 20419 | .word 0xd807e110 ! 213: LDUW_I lduw [%r31 + 0x0110], %r12 |
| 20420 | br_badelay1_4_161: |
| 20421 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 20422 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 20423 | .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 20424 | normalw |
| 20425 | .word 0x99458000 ! 214: RD_SOFTINT_REG rd %softint, %r12 |
| 20426 | pmu_4_162: |
| 20427 | nop |
| 20428 | setx 0xfffff712fffff57c, %g1, %g7 |
| 20429 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20430 | splash_tick_4_163: |
| 20431 | nop |
| 20432 | ta T_CHANGE_HPRIV |
| 20433 | best_set_reg(0x9b7fa5643448045f, %r16, %r17) |
| 20434 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 20435 | pmu_4_164: |
| 20436 | nop |
| 20437 | ta T_CHANGE_PRIV |
| 20438 | setx 0xfffff0d9fffff441, %g1, %g7 |
| 20439 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20440 | otherw |
| 20441 | mov 0x35, %r30 |
| 20442 | .word 0x83d0001e ! 218: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 20443 | .word 0xc1bfd960 ! 219: STDFA_R stda %f0, [%r0, %r31] |
| 20444 | .word 0xe1bfdc00 ! 220: STDFA_R stda %f16, [%r0, %r31] |
| 20445 | .word 0xc1bfe160 ! 221: STDFA_I stda %f0, [0x0160, %r31] |
| 20446 | setx 0xd053f8e64ef47501, %r1, %r28 |
| 20447 | stxa %r28, [%g0] 0x73 |
| 20448 | intvec_4_165: |
| 20449 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20450 | br_longdelay1_4_166: |
| 20451 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 20452 | .word 0xbfe7c000 ! 223: SAVE_R save %r31, %r0, %r31 |
| 20453 | nop |
| 20454 | ta T_CHANGE_HPRIV |
| 20455 | mov 0x4, %r10 |
| 20456 | set sync_thr_counter6, %r23 |
| 20457 | #ifndef SPC |
| 20458 | ldxa [%g0]0x63, %o1 |
| 20459 | and %o1, 0x38, %o1 |
| 20460 | add %o1, %r23, %r23 |
| 20461 | #endif |
| 20462 | cas [%r23],%g0,%r10 !lock |
| 20463 | brnz %r10, sma_4_167 |
| 20464 | rd %asi, %r12 |
| 20465 | wr %g0, 0x40, %asi |
| 20466 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 20467 | set 0x00061fff, %g1 |
| 20468 | stxa %g1, [%g0 + 0x80] %asi |
| 20469 | wr %r12, %g0, %asi |
| 20470 | st %g0, [%r23] |
| 20471 | sma_4_167: |
| 20472 | ta T_CHANGE_NONHPRIV |
| 20473 | .word 0xe1e7e010 ! 224: CASA_R casa [%r31] %asi, %r16, %r16 |
| 20474 | jmptr_4_168: |
| 20475 | nop |
| 20476 | best_set_reg(0xe1200000, %r20, %r27) |
| 20477 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 20478 | setx 0xaaf1cdad497ab66b, %r1, %r28 |
| 20479 | stxa %r28, [%g0] 0x73 |
| 20480 | intvec_4_169: |
| 20481 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20482 | mondo_4_170: |
| 20483 | nop |
| 20484 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20485 | ta T_CHANGE_PRIV |
| 20486 | stxa %r20, [%r0+0x3d8] %asi |
| 20487 | .word 0x9d94800d ! 227: WRPR_WSTATE_R wrpr %r18, %r13, %wstate |
| 20488 | splash_cmpr_4_171: |
| 20489 | mov 0, %r18 |
| 20490 | sllx %r18, 63, %r18 |
| 20491 | rd %tick, %r17 |
| 20492 | add %r17, 0x100, %r17 |
| 20493 | or %r17, %r18, %r17 |
| 20494 | ta T_CHANGE_PRIV |
| 20495 | .word 0xaf800011 ! 228: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 20496 | pmu_4_172: |
| 20497 | nop |
| 20498 | ta T_CHANGE_PRIV |
| 20499 | setx 0xfffffc8dfffff1d7, %g1, %g7 |
| 20500 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20501 | splash_lsu_4_173: |
| 20502 | nop |
| 20503 | ta T_CHANGE_HPRIV |
| 20504 | set 0xf2004389, %r2 |
| 20505 | mov 0x2, %r1 |
| 20506 | sllx %r1, 32, %r1 |
| 20507 | or %r1, %r2, %r2 |
| 20508 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20509 | ta T_CHANGE_NONHPRIV |
| 20510 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20511 | mondo_4_174: |
| 20512 | nop |
| 20513 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20514 | ta T_CHANGE_PRIV |
| 20515 | stxa %r18, [%r0+0x3c8] %asi |
| 20516 | .word 0x9d930012 ! 231: WRPR_WSTATE_R wrpr %r12, %r18, %wstate |
| 20517 | memptr_4_175: |
| 20518 | set 0x60140000, %r31 |
| 20519 | .word 0x85846aae ! 232: WRCCR_I wr %r17, 0x0aae, %ccr |
| 20520 | mondo_4_176: |
| 20521 | nop |
| 20522 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20523 | ta T_CHANGE_PRIV |
| 20524 | stxa %r16, [%r0+0x3d0] %asi |
| 20525 | .word 0x9d924012 ! 233: WRPR_WSTATE_R wrpr %r9, %r18, %wstate |
| 20526 | #if (defined SPC || defined CMP) |
| 20527 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_177)+40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 20528 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_177)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 20529 | #else |
| 20530 | !! TODO:Generate XIR via RESET_GEN register |
| 20531 | ! setx 0x8900000808, %r16, %r17 |
| 20532 | ! mov 0x2, %r16 |
| 20533 | ! stw %r16, [%r17] |
| 20534 | #endif |
| 20535 | xir_4_177: |
| 20536 | .word 0xa982b653 ! 234: WR_SET_SOFTINT_I wr %r10, 0x1653, %set_softint |
| 20537 | splash_lsu_4_178: |
| 20538 | nop |
| 20539 | ta T_CHANGE_HPRIV |
| 20540 | set 0xcc0f3c5b, %r2 |
| 20541 | mov 0x1, %r1 |
| 20542 | sllx %r1, 32, %r1 |
| 20543 | or %r1, %r2, %r2 |
| 20544 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20545 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20546 | pmu_4_179: |
| 20547 | nop |
| 20548 | setx 0xfffff467fffffd45, %g1, %g7 |
| 20549 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20550 | splash_lsu_4_180: |
| 20551 | nop |
| 20552 | ta T_CHANGE_HPRIV |
| 20553 | set 0xc91bfad9, %r2 |
| 20554 | mov 0x6, %r1 |
| 20555 | sllx %r1, 32, %r1 |
| 20556 | or %r1, %r2, %r2 |
| 20557 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20558 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20559 | splash_cmpr_4_181: |
| 20560 | mov 0, %r18 |
| 20561 | sllx %r18, 63, %r18 |
| 20562 | rd %tick, %r17 |
| 20563 | add %r17, 0x60, %r17 |
| 20564 | or %r17, %r18, %r17 |
| 20565 | ta T_CHANGE_HPRIV |
| 20566 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20567 | .word 0xaf800011 ! 238: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 20568 | .word 0xe057e070 ! 239: LDSH_I ldsh [%r31 + 0x0070], %r16 |
| 20569 | donret_4_182: |
| 20570 | nop |
| 20571 | ta T_CHANGE_HPRIV ! macro |
| 20572 | rd %pc, %r12 |
| 20573 | add %r12, (donretarg_4_182-donret_4_182-8), %r12 |
| 20574 | mov 0x38, %r18 |
| 20575 | stxa %r12, [%r18]0x58 |
| 20576 | add %r12, 0x4, %r11 |
| 20577 | wrpr %g0, 0x1, %tl |
| 20578 | wrpr %g0, %r12, %tpc |
| 20579 | wrpr %g0, %r11, %tnpc |
| 20580 | set (0x00ff4ae6 | (32 << 24)), %r13 |
| 20581 | rdpr %tstate, %r16 |
| 20582 | mov 0x1f, %r19 |
| 20583 | and %r19, %r16, %r17 |
| 20584 | andn %r16, %r19, %r16 |
| 20585 | or %r16, %r17, %r20 |
| 20586 | wrpr %r20, %g0, %tstate |
| 20587 | wrhpr %g0, 0xd45, %htstate |
| 20588 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 20589 | retry |
| 20590 | donretarg_4_182: |
| 20591 | .word 0xe0ffe131 ! 240: SWAPA_I swapa %r16, [%r31 + 0x0131] %asi |
| 20592 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 20593 | reduce_priv_lvl_4_183: |
| 20594 | ta T_CHANGE_NONPRIV ! macro |
| 20595 | .word 0xc1bfe160 ! 242: STDFA_I stda %f0, [0x0160, %r31] |
| 20596 | #if (defined SPC || defined CMP) |
| 20597 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_184)+32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 20598 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_184)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 20599 | #else |
| 20600 | !! TODO:Generate XIR via RESET_GEN register |
| 20601 | ! setx 0x8900000808, %r16, %r17 |
| 20602 | ! mov 0x2, %r16 |
| 20603 | ! stw %r16, [%r17] |
| 20604 | #endif |
| 20605 | xir_4_184: |
| 20606 | .word 0xa984bdc9 ! 243: WR_SET_SOFTINT_I wr %r18, 0x1dc9, %set_softint |
| 20607 | .word 0x9ba349b2 ! 244: FDIVs fdivs %f13, %f18, %f13 |
| 20608 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 20609 | nop |
| 20610 | ta T_CHANGE_HPRIV |
| 20611 | mov 0x4+1, %r10 |
| 20612 | set sync_thr_counter5, %r23 |
| 20613 | #ifndef SPC |
| 20614 | ldxa [%g0]0x63, %o1 |
| 20615 | and %o1, 0x38, %o1 |
| 20616 | add %o1, %r23, %r23 |
| 20617 | sllx %o1, 5, %o3 !(CID*256) |
| 20618 | #endif |
| 20619 | cas [%r23],%g0,%r10 !lock |
| 20620 | brnz %r10, cwq_4_186 |
| 20621 | rd %asi, %r12 |
| 20622 | wr %g0, 0x40, %asi |
| 20623 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 20624 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 20625 | cmp %l1, 1 |
| 20626 | bne cwq_4_186 |
| 20627 | set CWQ_BASE, %l6 |
| 20628 | #ifndef SPC |
| 20629 | add %l6, %o3, %l6 |
| 20630 | #endif |
| 20631 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 20632 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 20633 | sllx %l2, 32, %l2 |
| 20634 | stx %l2, [%l6 + 0x0] |
| 20635 | membar #Sync |
| 20636 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 20637 | sub %l2, 0x40, %l2 |
| 20638 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 20639 | wr %r12, %g0, %asi |
| 20640 | st %g0, [%r23] |
| 20641 | cwq_4_186: |
| 20642 | ta T_CHANGE_NONHPRIV |
| 20643 | .word 0x95414000 ! 246: RDPC rd %pc, %r10 |
| 20644 | setx 0x7a1b9c7669071990, %r1, %r28 |
| 20645 | stxa %r28, [%g0] 0x73 |
| 20646 | intvec_4_187: |
| 20647 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20648 | pmu_4_188: |
| 20649 | nop |
| 20650 | setx 0xfffff7f3fffff040, %g1, %g7 |
| 20651 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20652 | splash_cmpr_4_189: |
| 20653 | mov 0, %r18 |
| 20654 | sllx %r18, 63, %r18 |
| 20655 | rd %tick, %r17 |
| 20656 | add %r17, 0x70, %r17 |
| 20657 | or %r17, %r18, %r17 |
| 20658 | ta T_CHANGE_HPRIV |
| 20659 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20660 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20661 | donret_4_190: |
| 20662 | nop |
| 20663 | ta T_CHANGE_HPRIV ! macro |
| 20664 | rd %pc, %r12 |
| 20665 | add %r12, (donretarg_4_190-donret_4_190-8), %r12 |
| 20666 | mov 0x38, %r18 |
| 20667 | stxa %r12, [%r18]0x58 |
| 20668 | add %r12, 0x4, %r11 |
| 20669 | wrpr %g0, 0x1, %tl |
| 20670 | wrpr %g0, %r12, %tpc |
| 20671 | wrpr %g0, %r11, %tnpc |
| 20672 | set (0x00e07307 | (0x80 << 24)), %r13 |
| 20673 | rdpr %tstate, %r16 |
| 20674 | mov 0x1f, %r19 |
| 20675 | and %r19, %r16, %r17 |
| 20676 | andn %r16, %r19, %r16 |
| 20677 | or %r16, %r17, %r20 |
| 20678 | wrpr %r20, %g0, %tstate |
| 20679 | wrhpr %g0, 0x1dc7, %htstate |
| 20680 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 20681 | retry |
| 20682 | donretarg_4_190: |
| 20683 | .word 0xa1a509d4 ! 250: FDIVd fdivd %f20, %f20, %f16 |
| 20684 | memptr_4_191: |
| 20685 | set 0x60140000, %r31 |
| 20686 | .word 0x8582ed18 ! 251: WRCCR_I wr %r11, 0x0d18, %ccr |
| 20687 | .word 0xe49fc240 ! 252: LDDA_R ldda [%r31, %r0] 0x12, %r18 |
| 20688 | invtsb_4_192: |
| 20689 | nop |
| 20690 | ta T_CHANGE_HPRIV |
| 20691 | rd %asi, %r21 |
| 20692 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 20693 | mov 1, %r20 |
| 20694 | sllx %r20, 63, %r20 |
| 20695 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 20696 | xor %r22 ,%r20, %r22 |
| 20697 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 20698 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 20699 | xor %r22 ,%r20, %r22 |
| 20700 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 20701 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 20702 | xor %r22 ,%r20, %r22 |
| 20703 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 20704 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 20705 | xor %r22 ,%r20, %r22 |
| 20706 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 20707 | wr %r21, %r0, %asi |
| 20708 | ta T_CHANGE_NONHPRIV |
| 20709 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 20710 | nop |
| 20711 | ta T_CHANGE_HPRIV |
| 20712 | mov 0x4+1, %r10 |
| 20713 | set sync_thr_counter5, %r23 |
| 20714 | #ifndef SPC |
| 20715 | ldxa [%g0]0x63, %o1 |
| 20716 | and %o1, 0x38, %o1 |
| 20717 | add %o1, %r23, %r23 |
| 20718 | sllx %o1, 5, %o3 !(CID*256) |
| 20719 | #endif |
| 20720 | cas [%r23],%g0,%r10 !lock |
| 20721 | brnz %r10, cwq_4_193 |
| 20722 | rd %asi, %r12 |
| 20723 | wr %g0, 0x40, %asi |
| 20724 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 20725 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 20726 | cmp %l1, 1 |
| 20727 | bne cwq_4_193 |
| 20728 | set CWQ_BASE, %l6 |
| 20729 | #ifndef SPC |
| 20730 | add %l6, %o3, %l6 |
| 20731 | #endif |
| 20732 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 20733 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 20734 | sllx %l2, 32, %l2 |
| 20735 | stx %l2, [%l6 + 0x0] |
| 20736 | membar #Sync |
| 20737 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 20738 | sub %l2, 0x40, %l2 |
| 20739 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 20740 | wr %r12, %g0, %asi |
| 20741 | st %g0, [%r23] |
| 20742 | cwq_4_193: |
| 20743 | ta T_CHANGE_NONHPRIV |
| 20744 | .word 0xa7414000 ! 254: RDPC rd %pc, %r19 |
| 20745 | splash_lsu_4_194: |
| 20746 | nop |
| 20747 | ta T_CHANGE_HPRIV |
| 20748 | set 0xe9d6fde3, %r2 |
| 20749 | mov 0x5, %r1 |
| 20750 | sllx %r1, 32, %r1 |
| 20751 | or %r1, %r2, %r2 |
| 20752 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20753 | ta T_CHANGE_NONHPRIV |
| 20754 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20755 | .word 0xa553c000 ! 256: RDPR_FQ <illegal instruction> |
| 20756 | setx vahole_target2, %r18, %r27 |
| 20757 | .word 0xe91fe1e0 ! 257: LDDF_I ldd [%r31, 0x01e0], %f20 |
| 20758 | #if (defined SPC || defined CMP) |
| 20759 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_196) + 0, 16, 16)) -> intp(7,0,27) |
| 20760 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_196)&0xffffffff) + 0, 16, 16)) -> intp(7,0,27) |
| 20761 | #else |
| 20762 | setx 0xb1459a3e7e0aa203, %r1, %r28 |
| 20763 | stxa %r28, [%g0] 0x73 |
| 20764 | #endif |
| 20765 | intvec_4_196: |
| 20766 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20767 | nop |
| 20768 | ta T_CHANGE_HPRIV |
| 20769 | mov 0x4, %r10 |
| 20770 | set sync_thr_counter6, %r23 |
| 20771 | #ifndef SPC |
| 20772 | ldxa [%g0]0x63, %o1 |
| 20773 | and %o1, 0x38, %o1 |
| 20774 | add %o1, %r23, %r23 |
| 20775 | #endif |
| 20776 | cas [%r23],%g0,%r10 !lock |
| 20777 | brnz %r10, sma_4_197 |
| 20778 | rd %asi, %r12 |
| 20779 | wr %g0, 0x40, %asi |
| 20780 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 20781 | set 0x00061fff, %g1 |
| 20782 | stxa %g1, [%g0 + 0x80] %asi |
| 20783 | wr %r12, %g0, %asi |
| 20784 | st %g0, [%r23] |
| 20785 | sma_4_197: |
| 20786 | ta T_CHANGE_NONHPRIV |
| 20787 | .word 0xe9e7e010 ! 259: CASA_R casa [%r31] %asi, %r16, %r20 |
| 20788 | .word 0xe8c7e010 ! 260: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r20 |
| 20789 | setx vahole_target3, %r18, %r27 |
| 20790 | .word 0x9ba049b3 ! 261: FDIVs fdivs %f1, %f19, %f13 |
| 20791 | .word 0xd697e0d0 ! 262: LDUHA_I lduha [%r31, + 0x00d0] %asi, %r11 |
| 20792 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 20793 | .word 0xd68fe1d8 ! 264: LDUBA_I lduba [%r31, + 0x01d8] %asi, %r11 |
| 20794 | pmu_4_199: |
| 20795 | nop |
| 20796 | setx 0xfffff070fffff390, %g1, %g7 |
| 20797 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20798 | splash_tick_4_200: |
| 20799 | nop |
| 20800 | ta T_CHANGE_HPRIV |
| 20801 | best_set_reg(0xa94061feabe185c8, %r16, %r17) |
| 20802 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 20803 | setx vahole_target1, %r18, %r27 |
| 20804 | .word 0xa3a349c7 ! 267: FDIVd fdivd %f44, %f38, %f48 |
| 20805 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 20806 | .word 0x8d902183 ! 268: WRPR_PSTATE_I wrpr %r0, 0x0183, %pstate |
| 20807 | .word 0xe097e0a8 ! 269: LDUHA_I lduha [%r31, + 0x00a8] %asi, %r16 |
| 20808 | nop |
| 20809 | ta T_CHANGE_HPRIV |
| 20810 | mov 0x4, %r10 |
| 20811 | set sync_thr_counter6, %r23 |
| 20812 | #ifndef SPC |
| 20813 | ldxa [%g0]0x63, %o1 |
| 20814 | and %o1, 0x38, %o1 |
| 20815 | add %o1, %r23, %r23 |
| 20816 | #endif |
| 20817 | cas [%r23],%g0,%r10 !lock |
| 20818 | brnz %r10, sma_4_203 |
| 20819 | rd %asi, %r12 |
| 20820 | wr %g0, 0x40, %asi |
| 20821 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 20822 | set 0x00021fff, %g1 |
| 20823 | stxa %g1, [%g0 + 0x80] %asi |
| 20824 | wr %r12, %g0, %asi |
| 20825 | st %g0, [%r23] |
| 20826 | sma_4_203: |
| 20827 | ta T_CHANGE_NONHPRIV |
| 20828 | .word 0xe1e7e00c ! 270: CASA_R casa [%r31] %asi, %r12, %r16 |
| 20829 | .word 0xe07fe060 ! 271: SWAP_I swap %r16, [%r31 + 0x0060] |
| 20830 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 20831 | cwp_4_204: |
| 20832 | set user_data_start, %o7 |
| 20833 | .word 0x93902001 ! 273: WRPR_CWP_I wrpr %r0, 0x0001, %cwp |
| 20834 | pmu_4_205: |
| 20835 | nop |
| 20836 | ta T_CHANGE_PRIV |
| 20837 | setx 0xfffff8d2fffffce2, %g1, %g7 |
| 20838 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20839 | mondo_4_206: |
| 20840 | nop |
| 20841 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20842 | ta T_CHANGE_PRIV |
| 20843 | stxa %r19, [%r0+0x3c0] %asi |
| 20844 | .word 0x9d918006 ! 275: WRPR_WSTATE_R wrpr %r6, %r6, %wstate |
| 20845 | br_badelay3_4_207: |
| 20846 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 20847 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 20848 | .word 0x97a00544 ! 1: FSQRTd fsqrt |
| 20849 | .word 0xa3a10834 ! 276: FADDs fadds %f4, %f20, %f17 |
| 20850 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 20851 | reduce_priv_lvl_4_208: |
| 20852 | ta T_CHANGE_NONPRIV ! macro |
| 20853 | splash_tick_4_209: |
| 20854 | nop |
| 20855 | ta T_CHANGE_HPRIV |
| 20856 | best_set_reg(0x33dc5a2dcecec097, %r16, %r17) |
| 20857 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 20858 | mondo_4_210: |
| 20859 | nop |
| 20860 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 20861 | stxa %r10, [%r0+0x3e8] %asi |
| 20862 | .word 0x9d908005 ! 279: WRPR_WSTATE_R wrpr %r2, %r5, %wstate |
| 20863 | donret_4_211: |
| 20864 | nop |
| 20865 | ta T_CHANGE_HPRIV ! macro |
| 20866 | rd %pc, %r12 |
| 20867 | add %r12, (donretarg_4_211-donret_4_211-4), %r12 |
| 20868 | mov 0x38, %r18 |
| 20869 | stxa %r12, [%r18]0x58 |
| 20870 | add %r12, 0x4, %r11 |
| 20871 | wrpr %g0, 0x2, %tl |
| 20872 | wrpr %g0, %r12, %tpc |
| 20873 | wrpr %g0, %r11, %tnpc |
| 20874 | set (0x00ccc0f0 | (28 << 24)), %r13 |
| 20875 | rdpr %tstate, %r16 |
| 20876 | mov 0x1f, %r19 |
| 20877 | and %r19, %r16, %r17 |
| 20878 | andn %r16, %r19, %r16 |
| 20879 | or %r16, %r17, %r20 |
| 20880 | wrpr %r20, %g0, %tstate |
| 20881 | wrhpr %g0, 0x14d0, %htstate |
| 20882 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 20883 | done |
| 20884 | donretarg_4_211: |
| 20885 | .word 0xd86fe1e0 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x01e0] |
| 20886 | donret_4_212: |
| 20887 | nop |
| 20888 | ta T_CHANGE_HPRIV ! macro |
| 20889 | rd %pc, %r12 |
| 20890 | add %r12, (donretarg_4_212-donret_4_212-8), %r12 |
| 20891 | mov 0x38, %r18 |
| 20892 | stxa %r12, [%r18]0x58 |
| 20893 | add %r12, 0x4, %r11 |
| 20894 | wrpr %g0, 0x1, %tl |
| 20895 | wrpr %g0, %r12, %tpc |
| 20896 | wrpr %g0, %r11, %tnpc |
| 20897 | set (0x005df803 | (0x83 << 24)), %r13 |
| 20898 | rdpr %tstate, %r16 |
| 20899 | mov 0x1f, %r19 |
| 20900 | and %r19, %r16, %r17 |
| 20901 | andn %r16, %r19, %r16 |
| 20902 | or %r16, %r17, %r20 |
| 20903 | wrpr %r20, %g0, %tstate |
| 20904 | wrhpr %g0, 0xe09, %htstate |
| 20905 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 20906 | retry |
| 20907 | donretarg_4_212: |
| 20908 | .word 0xa3a089d4 ! 281: FDIVd fdivd %f2, %f20, %f48 |
| 20909 | brcommon1_4_213: |
| 20910 | nop |
| 20911 | setx common_target, %r12, %r27 |
| 20912 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 20913 | ba,a .+12 |
| 20914 | .word 0xe9e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r20 |
| 20915 | ba,a .+8 |
| 20916 | jmpl %r27+0, %r27 |
| 20917 | .word 0x87ac0a52 ! 282: FCMPd fcmpd %fcc<n>, %f16, %f18 |
| 20918 | .word 0xe19fe080 ! 283: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 20919 | .word 0x8d9032c7 ! 284: WRPR_PSTATE_I wrpr %r0, 0x12c7, %pstate |
| 20920 | splash_cmpr_4_215: |
| 20921 | mov 1, %r18 |
| 20922 | sllx %r18, 63, %r18 |
| 20923 | rd %tick, %r17 |
| 20924 | add %r17, 0x60, %r17 |
| 20925 | or %r17, %r18, %r17 |
| 20926 | ta T_CHANGE_PRIV |
| 20927 | .word 0xb3800011 ! 285: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20928 | splash_cmpr_4_216: |
| 20929 | mov 0, %r18 |
| 20930 | sllx %r18, 63, %r18 |
| 20931 | rd %tick, %r17 |
| 20932 | add %r17, 0x50, %r17 |
| 20933 | or %r17, %r18, %r17 |
| 20934 | ta T_CHANGE_HPRIV |
| 20935 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 20936 | .word 0xb3800011 ! 286: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 20937 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 20938 | reduce_priv_lvl_4_217: |
| 20939 | ta T_CHANGE_NONPRIV ! macro |
| 20940 | .word 0x24ccc001 ! 1: BRLEZ brlez,a,pt %r19,<label_0xcc001> |
| 20941 | .word 0x8d902d13 ! 288: WRPR_PSTATE_I wrpr %r0, 0x0d13, %pstate |
| 20942 | splash_lsu_4_219: |
| 20943 | nop |
| 20944 | ta T_CHANGE_HPRIV |
| 20945 | set 0x28c5275f, %r2 |
| 20946 | mov 0x6, %r1 |
| 20947 | sllx %r1, 32, %r1 |
| 20948 | or %r1, %r2, %r2 |
| 20949 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 20950 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 20951 | donret_4_220: |
| 20952 | nop |
| 20953 | ta T_CHANGE_HPRIV ! macro |
| 20954 | rd %pc, %r12 |
| 20955 | add %r12, (donretarg_4_220-donret_4_220-8), %r12 |
| 20956 | mov 0x38, %r18 |
| 20957 | stxa %r12, [%r18]0x58 |
| 20958 | add %r12, 0x4, %r11 |
| 20959 | wrpr %g0, 0x1, %tl |
| 20960 | wrpr %g0, %r12, %tpc |
| 20961 | wrpr %g0, %r11, %tnpc |
| 20962 | set (0x00aae90d | (0x82 << 24)), %r13 |
| 20963 | rdpr %tstate, %r16 |
| 20964 | mov 0x1f, %r19 |
| 20965 | and %r19, %r16, %r17 |
| 20966 | andn %r16, %r19, %r16 |
| 20967 | or %r16, %r17, %r20 |
| 20968 | wrpr %r20, %g0, %tstate |
| 20969 | wrhpr %g0, 0x597, %htstate |
| 20970 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 20971 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 20972 | retry |
| 20973 | donretarg_4_220: |
| 20974 | .word 0xd66fe12f ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x012f] |
| 20975 | .word 0x83d02032 ! 291: Tcc_I te icc_or_xcc, %r0 + 50 |
| 20976 | setx 0x02c691824ba04f84, %r1, %r28 |
| 20977 | stxa %r28, [%g0] 0x73 |
| 20978 | intvec_4_221: |
| 20979 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 20980 | brcommon3_4_222: |
| 20981 | nop |
| 20982 | setx common_target, %r12, %r27 |
| 20983 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 20984 | ba,a .+12 |
| 20985 | .word 0xd737e020 ! 1: STQF_I - %f11, [0x0020, %r31] |
| 20986 | ba,a .+8 |
| 20987 | jmpl %r27+0, %r27 |
| 20988 | .word 0xd6bfc02a ! 293: STDA_R stda %r11, [%r31 + %r10] 0x01 |
| 20989 | .word 0xd6d7e108 ! 294: LDSHA_I ldsha [%r31, + 0x0108] %asi, %r11 |
| 20990 | pmu_4_223: |
| 20991 | nop |
| 20992 | ta T_CHANGE_PRIV |
| 20993 | setx 0xfffff961fffff51f, %g1, %g7 |
| 20994 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 20995 | cmp_4_224: |
| 20996 | nop |
| 20997 | ta T_CHANGE_HPRIV |
| 20998 | rd %asi, %r12 |
| 20999 | wr %r0, 0x41, %asi |
| 21000 | set sync_thr_counter4, %r23 |
| 21001 | #ifndef SPC |
| 21002 | ldxa [%g0]0x63, %r8 |
| 21003 | and %r8, 0x38, %r8 ! Core ID |
| 21004 | add %r8, %r23, %r23 |
| 21005 | mov 0xff, %r9 |
| 21006 | xor %r9, 0x4, %r9 |
| 21007 | sllx %r9, %r8, %r9 ! My core mask |
| 21008 | #else |
| 21009 | mov 0, %r8 |
| 21010 | mov 0xff, %r9 |
| 21011 | xor %r9, 0x4, %r9 ! My core mask |
| 21012 | #endif |
| 21013 | mov 0x4, %r10 |
| 21014 | cmp_startwait4_224: |
| 21015 | cas [%r23],%g0,%r10 !lock |
| 21016 | brz,a %r10, continue_cmp_4_224 |
| 21017 | ldxa [0x50]%asi, %r13 !Running_rw |
| 21018 | ld [%r23], %r10 |
| 21019 | cmp_wait4_224: |
| 21020 | brnz,a %r10, cmp_wait4_224 |
| 21021 | ld [%r23], %r10 |
| 21022 | ba cmp_startwait4_224 |
| 21023 | mov 0x4, %r10 |
| 21024 | continue_cmp_4_224: |
| 21025 | ldxa [0x58]%asi, %r14 !Running_status |
| 21026 | xnor %r14, %r13, %r14 !Bits equal |
| 21027 | brz,a %r8, cmp_multi_core_4_224 |
| 21028 | mov 0x81, %r17 |
| 21029 | best_set_reg(0x3b107a2a9997499b, %r16, %r17) |
| 21030 | cmp_multi_core_4_224: |
| 21031 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 21032 | and %r14, %r9, %r14 !Apply core-mask |
| 21033 | stxa %r14, [0x60]%asi |
| 21034 | st %g0, [%r23] !clear lock |
| 21035 | wr %g0, %r12, %asi |
| 21036 | .word 0x91a0016a ! 296: FABSq dis not found |
| 21037 | |
| 21038 | #if (defined SPC || defined CMP) |
| 21039 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_225)+40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21040 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_225)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21041 | #else |
| 21042 | !! TODO:Generate XIR via RESET_GEN register |
| 21043 | ! setx 0x8900000808, %r16, %r17 |
| 21044 | ! mov 0x2, %r16 |
| 21045 | ! stw %r16, [%r17] |
| 21046 | #endif |
| 21047 | xir_4_225: |
| 21048 | .word 0xa984ed62 ! 297: WR_SET_SOFTINT_I wr %r19, 0x0d62, %set_softint |
| 21049 | memptr_4_226: |
| 21050 | set 0x60340000, %r31 |
| 21051 | .word 0x8585298c ! 298: WRCCR_I wr %r20, 0x098c, %ccr |
| 21052 | mondo_4_227: |
| 21053 | nop |
| 21054 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21055 | ta T_CHANGE_PRIV |
| 21056 | stxa %r3, [%r0+0x3e8] %asi |
| 21057 | .word 0x9d950010 ! 299: WRPR_WSTATE_R wrpr %r20, %r16, %wstate |
| 21058 | .word 0xd297e010 ! 300: LDUHA_I lduha [%r31, + 0x0010] %asi, %r9 |
| 21059 | setx vahole_target2, %r18, %r27 |
| 21060 | .word 0xa3a149c6 ! 301: FDIVd fdivd %f36, %f6, %f48 |
| 21061 | #if (defined SPC || defined CMP) |
| 21062 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_229)+16, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21063 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_229)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21064 | #else |
| 21065 | !! TODO:Generate XIR via RESET_GEN register |
| 21066 | ! setx 0x8900000808, %r16, %r17 |
| 21067 | ! mov 0x2, %r16 |
| 21068 | ! stw %r16, [%r17] |
| 21069 | #endif |
| 21070 | xir_4_229: |
| 21071 | .word 0xa9837fb8 ! 302: WR_SET_SOFTINT_I wr %r13, 0x1fb8, %set_softint |
| 21072 | .word 0x8d903a41 ! 303: WRPR_PSTATE_I wrpr %r0, 0x1a41, %pstate |
| 21073 | setx vahole_target0, %r18, %r27 |
| 21074 | .word 0xe897c030 ! 304: LDUHA_R lduha [%r31, %r16] 0x01, %r20 |
| 21075 | trapasi_4_232: |
| 21076 | nop |
| 21077 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 21078 | .word 0xe8d04980 ! 305: LDSHA_R ldsha [%r1, %r0] 0x4c, %r20 |
| 21079 | #if (defined SPC || defined CMP) |
| 21080 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_233)+8, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21081 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_233)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21082 | #else |
| 21083 | !! TODO:Generate XIR via RESET_GEN register |
| 21084 | ! setx 0x8900000808, %r16, %r17 |
| 21085 | ! mov 0x2, %r16 |
| 21086 | ! stw %r16, [%r17] |
| 21087 | #endif |
| 21088 | xir_4_233: |
| 21089 | .word 0xa9852ca5 ! 306: WR_SET_SOFTINT_I wr %r20, 0x0ca5, %set_softint |
| 21090 | #if (defined SPC || defined CMP) |
| 21091 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_234) + 0, 16, 16)) -> intp(0,0,17) |
| 21092 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_234)&0xffffffff) + 0, 16, 16)) -> intp(0,0,17) |
| 21093 | #else |
| 21094 | setx 0x1d8c6cbfdef59e32, %r1, %r28 |
| 21095 | stxa %r28, [%g0] 0x73 |
| 21096 | #endif |
| 21097 | intvec_4_234: |
| 21098 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21099 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 21100 | pmu_4_235: |
| 21101 | nop |
| 21102 | ta T_CHANGE_PRIV |
| 21103 | setx 0xfffff29efffff55d, %g1, %g7 |
| 21104 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21105 | nop |
| 21106 | ta T_CHANGE_HPRIV |
| 21107 | mov 0x4+1, %r10 |
| 21108 | set sync_thr_counter5, %r23 |
| 21109 | #ifndef SPC |
| 21110 | ldxa [%g0]0x63, %o1 |
| 21111 | and %o1, 0x38, %o1 |
| 21112 | add %o1, %r23, %r23 |
| 21113 | sllx %o1, 5, %o3 !(CID*256) |
| 21114 | #endif |
| 21115 | cas [%r23],%g0,%r10 !lock |
| 21116 | brnz %r10, cwq_4_236 |
| 21117 | rd %asi, %r12 |
| 21118 | wr %g0, 0x40, %asi |
| 21119 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 21120 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 21121 | cmp %l1, 1 |
| 21122 | bne cwq_4_236 |
| 21123 | set CWQ_BASE, %l6 |
| 21124 | #ifndef SPC |
| 21125 | add %l6, %o3, %l6 |
| 21126 | #endif |
| 21127 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 21128 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 21129 | sllx %l2, 32, %l2 |
| 21130 | stx %l2, [%l6 + 0x0] |
| 21131 | membar #Sync |
| 21132 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 21133 | sub %l2, 0x40, %l2 |
| 21134 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 21135 | wr %r12, %g0, %asi |
| 21136 | st %g0, [%r23] |
| 21137 | cwq_4_236: |
| 21138 | ta T_CHANGE_NONHPRIV |
| 21139 | .word 0xa1414000 ! 310: RDPC rd %pc, %r16 |
| 21140 | nop |
| 21141 | ta T_CHANGE_HPRIV |
| 21142 | mov 0x4, %r10 |
| 21143 | set sync_thr_counter6, %r23 |
| 21144 | #ifndef SPC |
| 21145 | ldxa [%g0]0x63, %o1 |
| 21146 | and %o1, 0x38, %o1 |
| 21147 | add %o1, %r23, %r23 |
| 21148 | #endif |
| 21149 | cas [%r23],%g0,%r10 !lock |
| 21150 | brnz %r10, sma_4_237 |
| 21151 | rd %asi, %r12 |
| 21152 | wr %g0, 0x40, %asi |
| 21153 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21154 | set 0x00021fff, %g1 |
| 21155 | stxa %g1, [%g0 + 0x80] %asi |
| 21156 | wr %r12, %g0, %asi |
| 21157 | st %g0, [%r23] |
| 21158 | sma_4_237: |
| 21159 | ta T_CHANGE_NONHPRIV |
| 21160 | .word 0xd1e7e010 ! 311: CASA_R casa [%r31] %asi, %r16, %r8 |
| 21161 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 21162 | reduce_priv_lvl_4_238: |
| 21163 | ta T_CHANGE_NONPRIV ! macro |
| 21164 | nop |
| 21165 | ta T_CHANGE_HPRIV |
| 21166 | mov 0x4, %r10 |
| 21167 | set sync_thr_counter6, %r23 |
| 21168 | #ifndef SPC |
| 21169 | ldxa [%g0]0x63, %o1 |
| 21170 | and %o1, 0x38, %o1 |
| 21171 | add %o1, %r23, %r23 |
| 21172 | #endif |
| 21173 | cas [%r23],%g0,%r10 !lock |
| 21174 | brnz %r10, sma_4_239 |
| 21175 | rd %asi, %r12 |
| 21176 | wr %g0, 0x40, %asi |
| 21177 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21178 | set 0x00021fff, %g1 |
| 21179 | stxa %g1, [%g0 + 0x80] %asi |
| 21180 | wr %r12, %g0, %asi |
| 21181 | st %g0, [%r23] |
| 21182 | sma_4_239: |
| 21183 | ta T_CHANGE_NONHPRIV |
| 21184 | .word 0xd1e7e012 ! 313: CASA_R casa [%r31] %asi, %r18, %r8 |
| 21185 | .word 0xc30fc014 ! 1: LDXFSR_R ld-fsr [%r31, %r20], %f1 |
| 21186 | .word 0x9f8031c1 ! 314: SIR sir 0x11c1 |
| 21187 | .word 0x93d02032 ! 315: Tcc_I tne icc_or_xcc, %r0 + 50 |
| 21188 | splash_cmpr_4_240: |
| 21189 | mov 1, %r18 |
| 21190 | sllx %r18, 63, %r18 |
| 21191 | rd %tick, %r17 |
| 21192 | add %r17, 0x70, %r17 |
| 21193 | or %r17, %r18, %r17 |
| 21194 | ta T_CHANGE_HPRIV |
| 21195 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 21196 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 21197 | mondo_4_241: |
| 21198 | nop |
| 21199 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21200 | stxa %r2, [%r0+0x3c0] %asi |
| 21201 | .word 0x9d914012 ! 317: WRPR_WSTATE_R wrpr %r5, %r18, %wstate |
| 21202 | nop |
| 21203 | mov 0x80, %g3 |
| 21204 | stxa %g3, [%g3] 0x57 |
| 21205 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 21206 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 21207 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 21208 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 21209 | nop |
| 21210 | ta T_CHANGE_HPRIV |
| 21211 | mov 0x4, %r10 |
| 21212 | set sync_thr_counter6, %r23 |
| 21213 | #ifndef SPC |
| 21214 | ldxa [%g0]0x63, %o1 |
| 21215 | and %o1, 0x38, %o1 |
| 21216 | add %o1, %r23, %r23 |
| 21217 | #endif |
| 21218 | cas [%r23],%g0,%r10 !lock |
| 21219 | brnz %r10, sma_4_242 |
| 21220 | rd %asi, %r12 |
| 21221 | wr %g0, 0x40, %asi |
| 21222 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21223 | set 0x000e1fff, %g1 |
| 21224 | stxa %g1, [%g0 + 0x80] %asi |
| 21225 | wr %r12, %g0, %asi |
| 21226 | st %g0, [%r23] |
| 21227 | sma_4_242: |
| 21228 | ta T_CHANGE_NONHPRIV |
| 21229 | .word 0xd1e7e012 ! 319: CASA_R casa [%r31] %asi, %r18, %r8 |
| 21230 | br_longdelay1_4_243: |
| 21231 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 21232 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 21233 | splash_cmpr_4_244: |
| 21234 | mov 0, %r18 |
| 21235 | sllx %r18, 63, %r18 |
| 21236 | rd %tick, %r17 |
| 21237 | add %r17, 0x60, %r17 |
| 21238 | or %r17, %r18, %r17 |
| 21239 | ta T_CHANGE_HPRIV |
| 21240 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 21241 | .word 0xb3800011 ! 321: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 21242 | pmu_4_245: |
| 21243 | nop |
| 21244 | ta T_CHANGE_PRIV |
| 21245 | setx 0xfffff568ffffff4f, %g1, %g7 |
| 21246 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21247 | pmu_4_246: |
| 21248 | nop |
| 21249 | setx 0xfffffb91fffff69d, %g1, %g7 |
| 21250 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21251 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 21252 | splash_tick_4_247: |
| 21253 | nop |
| 21254 | ta T_CHANGE_HPRIV |
| 21255 | best_set_reg(0x288f39c96d921895, %r16, %r17) |
| 21256 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 21257 | cmp_4_248: |
| 21258 | nop |
| 21259 | ta T_CHANGE_HPRIV |
| 21260 | rd %asi, %r12 |
| 21261 | wr %r0, 0x41, %asi |
| 21262 | set sync_thr_counter4, %r23 |
| 21263 | #ifndef SPC |
| 21264 | ldxa [%g0]0x63, %r8 |
| 21265 | and %r8, 0x38, %r8 ! Core ID |
| 21266 | add %r8, %r23, %r23 |
| 21267 | mov 0xff, %r9 |
| 21268 | xor %r9, 0x4, %r9 |
| 21269 | sllx %r9, %r8, %r9 ! My core mask |
| 21270 | #else |
| 21271 | mov 0, %r8 |
| 21272 | mov 0xff, %r9 |
| 21273 | xor %r9, 0x4, %r9 ! My core mask |
| 21274 | #endif |
| 21275 | mov 0x4, %r10 |
| 21276 | cmp_startwait4_248: |
| 21277 | cas [%r23],%g0,%r10 !lock |
| 21278 | brz,a %r10, continue_cmp_4_248 |
| 21279 | ldxa [0x50]%asi, %r13 !Running_rw |
| 21280 | ld [%r23], %r10 |
| 21281 | cmp_wait4_248: |
| 21282 | brnz,a %r10, cmp_wait4_248 |
| 21283 | ld [%r23], %r10 |
| 21284 | ba cmp_startwait4_248 |
| 21285 | mov 0x4, %r10 |
| 21286 | continue_cmp_4_248: |
| 21287 | ldxa [0x58]%asi, %r14 !Running_status |
| 21288 | xnor %r14, %r13, %r14 !Bits equal |
| 21289 | brz,a %r8, cmp_multi_core_4_248 |
| 21290 | mov 0x51, %r17 |
| 21291 | best_set_reg(0xda7f7bdcf4daba28, %r16, %r17) |
| 21292 | cmp_multi_core_4_248: |
| 21293 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 21294 | and %r14, %r9, %r14 !Apply core-mask |
| 21295 | stxa %r14, [0x60]%asi |
| 21296 | st %g0, [%r23] !clear lock |
| 21297 | wr %g0, %r12, %asi |
| 21298 | .word 0xa7a00168 ! 326: FABSq dis not found |
| 21299 | |
| 21300 | mondo_4_249: |
| 21301 | nop |
| 21302 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21303 | stxa %r17, [%r0+0x3e8] %asi |
| 21304 | .word 0x9d940011 ! 327: WRPR_WSTATE_R wrpr %r16, %r17, %wstate |
| 21305 | #if (defined SPC || defined CMP) |
| 21306 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_250) + 40, 16, 16)) -> intp(7,0,9) |
| 21307 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_250)&0xffffffff) + 40, 16, 16)) -> intp(7,0,9) |
| 21308 | #else |
| 21309 | setx 0x1deb8790fa0b2c73, %r1, %r28 |
| 21310 | stxa %r28, [%g0] 0x73 |
| 21311 | #endif |
| 21312 | intvec_4_250: |
| 21313 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21314 | donret_4_251: |
| 21315 | nop |
| 21316 | ta T_CHANGE_HPRIV ! macro |
| 21317 | rd %pc, %r12 |
| 21318 | add %r12, (donretarg_4_251-donret_4_251-4), %r12 |
| 21319 | mov 0x38, %r18 |
| 21320 | stxa %r12, [%r18]0x58 |
| 21321 | add %r12, 0x4, %r11 |
| 21322 | wrpr %g0, 0x2, %tl |
| 21323 | wrpr %g0, %r12, %tpc |
| 21324 | wrpr %g0, %r11, %tnpc |
| 21325 | set (0x000e0b23 | (20 << 24)), %r13 |
| 21326 | rdpr %tstate, %r16 |
| 21327 | mov 0x1f, %r19 |
| 21328 | and %r19, %r16, %r17 |
| 21329 | andn %r16, %r19, %r16 |
| 21330 | or %r16, %r17, %r20 |
| 21331 | wrpr %r20, %g0, %tstate |
| 21332 | wrhpr %g0, 0x607, %htstate |
| 21333 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 21334 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 21335 | done |
| 21336 | donretarg_4_251: |
| 21337 | .word 0xa5a349d2 ! 329: FDIVd fdivd %f44, %f18, %f18 |
| 21338 | .word 0xd4c7e068 ! 330: LDSWA_I ldswa [%r31, + 0x0068] %asi, %r10 |
| 21339 | .word 0xe1bfe020 ! 331: STDFA_I stda %f16, [0x0020, %r31] |
| 21340 | nop |
| 21341 | mov 0x80, %g3 |
| 21342 | stxa %g3, [%g3] 0x5f |
| 21343 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 21344 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 21345 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 21346 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 21347 | br_badelay3_4_252: |
| 21348 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 21349 | .word 0xc16e3672 ! Random illegal ? |
| 21350 | .word 0xa7a00554 ! 1: FSQRTd fsqrt |
| 21351 | .word 0xa7a4482a ! 333: FADDs fadds %f17, %f10, %f19 |
| 21352 | splash_hpstate_4_253: |
| 21353 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 21354 | .word 0x8198295f ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x095f, %hpstate |
| 21355 | mondo_4_254: |
| 21356 | nop |
| 21357 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21358 | ta T_CHANGE_PRIV |
| 21359 | stxa %r4, [%r0+0x3e0] %asi |
| 21360 | .word 0x9d94c003 ! 335: WRPR_WSTATE_R wrpr %r19, %r3, %wstate |
| 21361 | .word 0xe31fc013 ! 1: LDDF_R ldd [%r31, %r19], %f17 |
| 21362 | .word 0x9f80392a ! 336: SIR sir 0x192a |
| 21363 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 21364 | reduce_priv_lvl_4_255: |
| 21365 | ta T_CHANGE_NONHPRIV ! macro |
| 21366 | .word 0xe277e0e0 ! 338: STX_I stx %r17, [%r31 + 0x00e0] |
| 21367 | pmu_4_256: |
| 21368 | nop |
| 21369 | ta T_CHANGE_PRIV |
| 21370 | setx 0xfffff167fffff2ab, %g1, %g7 |
| 21371 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21372 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 21373 | otherw |
| 21374 | mov 0x30, %r30 |
| 21375 | .word 0x93d0001e ! 341: Tcc_R tne icc_or_xcc, %r0 + %r30 |
| 21376 | .word 0xe227e012 ! 342: STW_I stw %r17, [%r31 + 0x0012] |
| 21377 | setx 0xa3897ac93481ae68, %r1, %r28 |
| 21378 | stxa %r28, [%g0] 0x73 |
| 21379 | intvec_4_257: |
| 21380 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21381 | jmptr_4_258: |
| 21382 | nop |
| 21383 | best_set_reg(0xe1200000, %r20, %r27) |
| 21384 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 21385 | donret_4_259: |
| 21386 | nop |
| 21387 | ta T_CHANGE_HPRIV ! macro |
| 21388 | rd %pc, %r12 |
| 21389 | add %r12, (donretarg_4_259-donret_4_259-4), %r12 |
| 21390 | mov 0x38, %r18 |
| 21391 | stxa %r12, [%r18]0x58 |
| 21392 | add %r12, 0x4, %r11 |
| 21393 | wrpr %g0, 0x1, %tl |
| 21394 | wrpr %g0, %r12, %tpc |
| 21395 | wrpr %g0, %r11, %tnpc |
| 21396 | set (0x00f5701c | (0x89 << 24)), %r13 |
| 21397 | rdpr %tstate, %r16 |
| 21398 | mov 0x1f, %r19 |
| 21399 | and %r19, %r16, %r17 |
| 21400 | andn %r16, %r19, %r16 |
| 21401 | or %r16, %r17, %r20 |
| 21402 | wrpr %r20, %g0, %tstate |
| 21403 | wrhpr %g0, 0x505, %htstate |
| 21404 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 21405 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 21406 | done |
| 21407 | donretarg_4_259: |
| 21408 | .word 0xa5a449d4 ! 345: FDIVd fdivd %f48, %f20, %f18 |
| 21409 | jmptr_4_260: |
| 21410 | nop |
| 21411 | best_set_reg(0xe1200000, %r20, %r27) |
| 21412 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 21413 | cmp_4_261: |
| 21414 | nop |
| 21415 | ta T_CHANGE_HPRIV |
| 21416 | rd %asi, %r12 |
| 21417 | wr %r0, 0x41, %asi |
| 21418 | set sync_thr_counter4, %r23 |
| 21419 | #ifndef SPC |
| 21420 | ldxa [%g0]0x63, %r8 |
| 21421 | and %r8, 0x38, %r8 ! Core ID |
| 21422 | add %r8, %r23, %r23 |
| 21423 | mov 0xff, %r9 |
| 21424 | xor %r9, 0x4, %r9 |
| 21425 | sllx %r9, %r8, %r9 ! My core mask |
| 21426 | #else |
| 21427 | mov 0, %r8 |
| 21428 | mov 0xff, %r9 |
| 21429 | xor %r9, 0x4, %r9 ! My core mask |
| 21430 | #endif |
| 21431 | mov 0x4, %r10 |
| 21432 | cmp_startwait4_261: |
| 21433 | cas [%r23],%g0,%r10 !lock |
| 21434 | brz,a %r10, continue_cmp_4_261 |
| 21435 | ldxa [0x50]%asi, %r13 !Running_rw |
| 21436 | ld [%r23], %r10 |
| 21437 | cmp_wait4_261: |
| 21438 | brnz,a %r10, cmp_wait4_261 |
| 21439 | ld [%r23], %r10 |
| 21440 | ba cmp_startwait4_261 |
| 21441 | mov 0x4, %r10 |
| 21442 | continue_cmp_4_261: |
| 21443 | ldxa [0x58]%asi, %r14 !Running_status |
| 21444 | xnor %r14, %r13, %r14 !Bits equal |
| 21445 | brz,a %r8, cmp_multi_core_4_261 |
| 21446 | mov 0x5f, %r17 |
| 21447 | best_set_reg(0x6f75f38d9edc4820, %r16, %r17) |
| 21448 | cmp_multi_core_4_261: |
| 21449 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 21450 | and %r14, %r9, %r14 !Apply core-mask |
| 21451 | stxa %r14, [0x68]%asi |
| 21452 | st %g0, [%r23] !clear lock |
| 21453 | wr %g0, %r12, %asi |
| 21454 | ta T_CHANGE_NONHPRIV |
| 21455 | .word 0xa7a00165 ! 347: FABSq dis not found |
| 21456 | |
| 21457 | .word 0x96c436f4 ! 348: ADDCcc_I addccc %r16, 0xfffff6f4, %r11 |
| 21458 | mondo_4_262: |
| 21459 | nop |
| 21460 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21461 | stxa %r16, [%r0+0x3e0] %asi |
| 21462 | .word 0x9d94c005 ! 349: WRPR_WSTATE_R wrpr %r19, %r5, %wstate |
| 21463 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 21464 | .word 0x8d902d95 ! 350: WRPR_PSTATE_I wrpr %r0, 0x0d95, %pstate |
| 21465 | .word 0xe19fe080 ! 351: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 21466 | splash_tick_4_264: |
| 21467 | nop |
| 21468 | ta T_CHANGE_HPRIV |
| 21469 | best_set_reg(0x58d58790e2fd55e4, %r16, %r17) |
| 21470 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 21471 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 21472 | reduce_priv_lvl_4_265: |
| 21473 | ta T_CHANGE_NONHPRIV ! macro |
| 21474 | #if (defined SPC || defined CMP) |
| 21475 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_266) + 40, 16, 16)) -> intp(7,0,23) |
| 21476 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_266)&0xffffffff) + 40, 16, 16)) -> intp(7,0,23) |
| 21477 | #else |
| 21478 | setx 0xc8291d80ef1f0413, %r1, %r28 |
| 21479 | stxa %r28, [%g0] 0x73 |
| 21480 | #endif |
| 21481 | intvec_4_266: |
| 21482 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21483 | setx vahole_target1, %r18, %r27 |
| 21484 | .word 0xe63fe1e0 ! 355: STD_I std %r19, [%r31 + 0x01e0] |
| 21485 | .word 0xc19fe0c0 ! 356: LDDFA_I ldda [%r31, 0x00c0], %f0 |
| 21486 | #if (defined SPC || defined CMP) |
| 21487 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_268)+24, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21488 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_268)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21489 | #else |
| 21490 | !! TODO:Generate XIR via RESET_GEN register |
| 21491 | ! setx 0x8900000808, %r16, %r17 |
| 21492 | ! mov 0x2, %r16 |
| 21493 | ! stw %r16, [%r17] |
| 21494 | #endif |
| 21495 | xir_4_268: |
| 21496 | .word 0xa982bf3f ! 357: WR_SET_SOFTINT_I wr %r10, 0x1f3f, %set_softint |
| 21497 | setx 0x8ced63321d5443c7, %r1, %r28 |
| 21498 | stxa %r28, [%g0] 0x73 |
| 21499 | intvec_4_269: |
| 21500 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21501 | nop |
| 21502 | ta T_CHANGE_HPRIV |
| 21503 | mov 0x4+1, %r10 |
| 21504 | set sync_thr_counter5, %r23 |
| 21505 | #ifndef SPC |
| 21506 | ldxa [%g0]0x63, %o1 |
| 21507 | and %o1, 0x38, %o1 |
| 21508 | add %o1, %r23, %r23 |
| 21509 | sllx %o1, 5, %o3 !(CID*256) |
| 21510 | #endif |
| 21511 | cas [%r23],%g0,%r10 !lock |
| 21512 | brnz %r10, cwq_4_270 |
| 21513 | rd %asi, %r12 |
| 21514 | wr %g0, 0x40, %asi |
| 21515 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 21516 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 21517 | cmp %l1, 1 |
| 21518 | bne cwq_4_270 |
| 21519 | set CWQ_BASE, %l6 |
| 21520 | #ifndef SPC |
| 21521 | add %l6, %o3, %l6 |
| 21522 | #endif |
| 21523 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 21524 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 21525 | sllx %l2, 32, %l2 |
| 21526 | stx %l2, [%l6 + 0x0] |
| 21527 | membar #Sync |
| 21528 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 21529 | sub %l2, 0x40, %l2 |
| 21530 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 21531 | wr %r12, %g0, %asi |
| 21532 | st %g0, [%r23] |
| 21533 | cwq_4_270: |
| 21534 | ta T_CHANGE_NONHPRIV |
| 21535 | .word 0x97414000 ! 359: RDPC rd %pc, %r11 |
| 21536 | splash_tick_4_271: |
| 21537 | nop |
| 21538 | ta T_CHANGE_HPRIV |
| 21539 | best_set_reg(0x5d29c348834e9b01, %r16, %r17) |
| 21540 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 21541 | br_longdelay1_4_272: |
| 21542 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 21543 | .word 0xbfefc000 ! 361: RESTORE_R restore %r31, %r0, %r31 |
| 21544 | fpinit_4_273: |
| 21545 | nop |
| 21546 | setx fp_data_quads, %r19, %r20 |
| 21547 | ldd [%r20], %f0 |
| 21548 | ldd [%r20+8], %f4 |
| 21549 | ld [%r20+16], %fsr |
| 21550 | ld [%r20+24], %r19 |
| 21551 | wr %r19, %g0, %gsr |
| 21552 | .word 0x87a80a44 ! 362: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 21553 | jmptr_4_274: |
| 21554 | nop |
| 21555 | best_set_reg(0xe1200000, %r20, %r27) |
| 21556 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 21557 | cerer_4_275: |
| 21558 | nop |
| 21559 | ta T_CHANGE_HPRIV |
| 21560 | best_set_reg(0x94e03f0eb4b7c457, %r26, %r27) |
| 21561 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 21562 | sllx %r26, 32, %r26 |
| 21563 | or %r26, %r27, %r27 |
| 21564 | mov 0x10, %r26 |
| 21565 | stxa %r27, [%r26]0x4c |
| 21566 | ta T_CHANGE_NONHPRIV |
| 21567 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 21568 | intveclr_4_276: |
| 21569 | nop |
| 21570 | ta T_CHANGE_HPRIV |
| 21571 | setx 0x638c5a64a8af8f24, %r1, %r28 |
| 21572 | stxa %r28, [%g0] 0x72 |
| 21573 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 21574 | nop |
| 21575 | ta T_CHANGE_HPRIV |
| 21576 | mov 0x4+1, %r10 |
| 21577 | set sync_thr_counter5, %r23 |
| 21578 | #ifndef SPC |
| 21579 | ldxa [%g0]0x63, %o1 |
| 21580 | and %o1, 0x38, %o1 |
| 21581 | add %o1, %r23, %r23 |
| 21582 | sllx %o1, 5, %o3 !(CID*256) |
| 21583 | #endif |
| 21584 | cas [%r23],%g0,%r10 !lock |
| 21585 | brnz %r10, cwq_4_277 |
| 21586 | rd %asi, %r12 |
| 21587 | wr %g0, 0x40, %asi |
| 21588 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 21589 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 21590 | cmp %l1, 1 |
| 21591 | bne cwq_4_277 |
| 21592 | set CWQ_BASE, %l6 |
| 21593 | #ifndef SPC |
| 21594 | add %l6, %o3, %l6 |
| 21595 | #endif |
| 21596 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 21597 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 21598 | sllx %l2, 32, %l2 |
| 21599 | stx %l2, [%l6 + 0x0] |
| 21600 | membar #Sync |
| 21601 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 21602 | sub %l2, 0x40, %l2 |
| 21603 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 21604 | wr %r12, %g0, %asi |
| 21605 | st %g0, [%r23] |
| 21606 | cwq_4_277: |
| 21607 | ta T_CHANGE_NONHPRIV |
| 21608 | .word 0xa5414000 ! 366: RDPC rd %pc, %r18 |
| 21609 | brcommon3_4_278: |
| 21610 | nop |
| 21611 | setx common_target, %r12, %r27 |
| 21612 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 21613 | ba,a .+12 |
| 21614 | .word 0xd937c00a ! 1: STQF_R - %f12, [%r10, %r31] |
| 21615 | ba,a .+8 |
| 21616 | jmpl %r27+0, %r27 |
| 21617 | .word 0xc32fc011 ! 367: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 21618 | .word 0xd827e1be ! 368: STW_I stw %r12, [%r31 + 0x01be] |
| 21619 | .word 0xd8c7e0d8 ! 369: LDSWA_I ldswa [%r31, + 0x00d8] %asi, %r12 |
| 21620 | #if (defined SPC || defined CMP) |
| 21621 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_279)+32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21622 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_279)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21623 | #else |
| 21624 | !! TODO:Generate XIR via RESET_GEN register |
| 21625 | ! setx 0x8900000808, %r16, %r17 |
| 21626 | ! mov 0x2, %r16 |
| 21627 | ! stw %r16, [%r17] |
| 21628 | #endif |
| 21629 | xir_4_279: |
| 21630 | .word 0xa981a915 ! 370: WR_SET_SOFTINT_I wr %r6, 0x0915, %set_softint |
| 21631 | nop |
| 21632 | ta T_CHANGE_HPRIV |
| 21633 | mov 0x4+1, %r10 |
| 21634 | set sync_thr_counter5, %r23 |
| 21635 | #ifndef SPC |
| 21636 | ldxa [%g0]0x63, %o1 |
| 21637 | and %o1, 0x38, %o1 |
| 21638 | add %o1, %r23, %r23 |
| 21639 | sllx %o1, 5, %o3 !(CID*256) |
| 21640 | #endif |
| 21641 | cas [%r23],%g0,%r10 !lock |
| 21642 | brnz %r10, cwq_4_280 |
| 21643 | rd %asi, %r12 |
| 21644 | wr %g0, 0x40, %asi |
| 21645 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 21646 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 21647 | cmp %l1, 1 |
| 21648 | bne cwq_4_280 |
| 21649 | set CWQ_BASE, %l6 |
| 21650 | #ifndef SPC |
| 21651 | add %l6, %o3, %l6 |
| 21652 | #endif |
| 21653 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 21654 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 21655 | sllx %l2, 32, %l2 |
| 21656 | stx %l2, [%l6 + 0x0] |
| 21657 | membar #Sync |
| 21658 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 21659 | sub %l2, 0x40, %l2 |
| 21660 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 21661 | wr %r12, %g0, %asi |
| 21662 | st %g0, [%r23] |
| 21663 | cwq_4_280: |
| 21664 | ta T_CHANGE_NONHPRIV |
| 21665 | .word 0xa5414000 ! 371: RDPC rd %pc, %r18 |
| 21666 | .word 0xd4cfe038 ! 372: LDSBA_I ldsba [%r31, + 0x0038] %asi, %r10 |
| 21667 | splash_cmpr_4_281: |
| 21668 | mov 0, %r18 |
| 21669 | sllx %r18, 63, %r18 |
| 21670 | rd %tick, %r17 |
| 21671 | add %r17, 0x60, %r17 |
| 21672 | or %r17, %r18, %r17 |
| 21673 | ta T_CHANGE_HPRIV |
| 21674 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 21675 | .word 0xb3800011 ! 373: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 21676 | nop |
| 21677 | ta T_CHANGE_HPRIV |
| 21678 | mov 0x4, %r10 |
| 21679 | set sync_thr_counter6, %r23 |
| 21680 | #ifndef SPC |
| 21681 | ldxa [%g0]0x63, %o1 |
| 21682 | and %o1, 0x38, %o1 |
| 21683 | add %o1, %r23, %r23 |
| 21684 | #endif |
| 21685 | cas [%r23],%g0,%r10 !lock |
| 21686 | brnz %r10, sma_4_282 |
| 21687 | rd %asi, %r12 |
| 21688 | wr %g0, 0x40, %asi |
| 21689 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21690 | set 0x00061fff, %g1 |
| 21691 | stxa %g1, [%g0 + 0x80] %asi |
| 21692 | wr %r12, %g0, %asi |
| 21693 | st %g0, [%r23] |
| 21694 | sma_4_282: |
| 21695 | ta T_CHANGE_NONHPRIV |
| 21696 | .word 0xd5e7e008 ! 374: CASA_R casa [%r31] %asi, %r8, %r10 |
| 21697 | br_badelay2_4_283: |
| 21698 | .word 0x91a089d2 ! 1: FDIVd fdivd %f2, %f18, %f8 |
| 21699 | pdist %f30, %f22, %f14 |
| 21700 | .word 0x97b14306 ! 375: ALIGNADDRESS alignaddr %r5, %r6, %r11 |
| 21701 | .word 0xc19fe180 ! 376: LDDFA_I ldda [%r31, 0x0180], %f0 |
| 21702 | .word 0xd5e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r10 |
| 21703 | .word 0x9f8024a2 ! 377: SIR sir 0x04a2 |
| 21704 | .word 0xc1bfdb60 ! 378: STDFA_R stda %f0, [%r0, %r31] |
| 21705 | .word 0xa6dcc011 ! 379: SMULcc_R smulcc %r19, %r17, %r19 |
| 21706 | .word 0xc36fe17c ! 380: PREFETCH_I prefetch [%r31 + 0x017c], #one_read |
| 21707 | nop |
| 21708 | ta T_CHANGE_HPRIV |
| 21709 | mov 0x4+1, %r10 |
| 21710 | set sync_thr_counter5, %r23 |
| 21711 | #ifndef SPC |
| 21712 | ldxa [%g0]0x63, %o1 |
| 21713 | and %o1, 0x38, %o1 |
| 21714 | add %o1, %r23, %r23 |
| 21715 | sllx %o1, 5, %o3 !(CID*256) |
| 21716 | #endif |
| 21717 | cas [%r23],%g0,%r10 !lock |
| 21718 | brnz %r10, cwq_4_285 |
| 21719 | rd %asi, %r12 |
| 21720 | wr %g0, 0x40, %asi |
| 21721 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 21722 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 21723 | cmp %l1, 1 |
| 21724 | bne cwq_4_285 |
| 21725 | set CWQ_BASE, %l6 |
| 21726 | #ifndef SPC |
| 21727 | add %l6, %o3, %l6 |
| 21728 | #endif |
| 21729 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 21730 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 21731 | sllx %l2, 32, %l2 |
| 21732 | stx %l2, [%l6 + 0x0] |
| 21733 | membar #Sync |
| 21734 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 21735 | sub %l2, 0x40, %l2 |
| 21736 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 21737 | wr %r12, %g0, %asi |
| 21738 | st %g0, [%r23] |
| 21739 | cwq_4_285: |
| 21740 | ta T_CHANGE_NONHPRIV |
| 21741 | .word 0x91414000 ! 381: RDPC rd %pc, %r8 |
| 21742 | brcommon3_4_286: |
| 21743 | nop |
| 21744 | setx common_target, %r12, %r27 |
| 21745 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 21746 | ba,a .+12 |
| 21747 | .word 0xdb37c010 ! 1: STQF_R - %f13, [%r16, %r31] |
| 21748 | ba,a .+8 |
| 21749 | jmpl %r27+0, %r27 |
| 21750 | .word 0xdb1fe100 ! 382: LDDF_I ldd [%r31, 0x0100], %f13 |
| 21751 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 21752 | iaw_4_287: |
| 21753 | nop |
| 21754 | ta T_CHANGE_HPRIV |
| 21755 | mov 8, %r18 |
| 21756 | rd %asi, %r12 |
| 21757 | wr %r0, 0x41, %asi |
| 21758 | set sync_thr_counter4, %r23 |
| 21759 | #ifndef SPC |
| 21760 | ldxa [%g0]0x63, %r8 |
| 21761 | and %r8, 0x38, %r8 ! Core ID |
| 21762 | add %r8, %r23, %r23 |
| 21763 | #else |
| 21764 | mov 0, %r8 |
| 21765 | #endif |
| 21766 | mov 0x4, %r16 |
| 21767 | iaw_startwait4_287: |
| 21768 | cas [%r23],%g0,%r16 !lock |
| 21769 | brz,a %r16, continue_iaw_4_287 |
| 21770 | mov (~0x4&0xf), %r16 |
| 21771 | ld [%r23], %r16 |
| 21772 | iaw_wait4_287: |
| 21773 | brnz %r16, iaw_wait4_287 |
| 21774 | ld [%r23], %r16 |
| 21775 | ba iaw_startwait4_287 |
| 21776 | mov 0x4, %r16 |
| 21777 | continue_iaw_4_287: |
| 21778 | sllx %r16, %r8, %r16 !Mask for my core only |
| 21779 | ldxa [0x58]%asi, %r17 !Running_status |
| 21780 | wait_for_stat_4_287: |
| 21781 | ldxa [0x50]%asi, %r13 !Running_rw |
| 21782 | cmp %r13, %r17 |
| 21783 | bne,a wait_for_stat_4_287 |
| 21784 | ldxa [0x58]%asi, %r17 !Running_status |
| 21785 | stxa %r16, [0x68]%asi !Park (W1C) |
| 21786 | ldxa [0x50]%asi, %r14 !Running_rw |
| 21787 | wait_for_iaw_4_287: |
| 21788 | ldxa [0x58]%asi, %r17 !Running_status |
| 21789 | cmp %r14, %r17 |
| 21790 | bne,a wait_for_iaw_4_287 |
| 21791 | ldxa [0x50]%asi, %r14 !Running_rw |
| 21792 | iaw_doit4_287: |
| 21793 | mov 0x38, %r18 |
| 21794 | iaw4_4_287: |
| 21795 | setx common_target, %r20, %r19 |
| 21796 | or %r19, 0x1, %r19 |
| 21797 | stxa %r19, [%r18]0x50 |
| 21798 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 21799 | st %g0, [%r23] !clear lock |
| 21800 | wr %r0, %r12, %asi ! restore %asi |
| 21801 | ta T_CHANGE_NONHPRIV |
| 21802 | .word 0xdb1fe140 ! 384: LDDF_I ldd [%r31, 0x0140], %f13 |
| 21803 | #if (defined SPC || defined CMP) |
| 21804 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_288) + 24, 16, 16)) -> intp(3,0,20) |
| 21805 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_288)&0xffffffff) + 24, 16, 16)) -> intp(3,0,20) |
| 21806 | #else |
| 21807 | setx 0x0f115f969e0aea28, %r1, %r28 |
| 21808 | stxa %r28, [%g0] 0x73 |
| 21809 | #endif |
| 21810 | intvec_4_288: |
| 21811 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21812 | tagged_4_289: |
| 21813 | taddcctv %r18, 0x1806, %r9 |
| 21814 | .word 0xda07e1fd ! 386: LDUW_I lduw [%r31 + 0x01fd], %r13 |
| 21815 | ibp_4_290: |
| 21816 | nop |
| 21817 | .word 0xe1bfe0c0 ! 387: STDFA_I stda %f16, [0x00c0, %r31] |
| 21818 | cwp_4_291: |
| 21819 | set user_data_start, %o7 |
| 21820 | .word 0x93902004 ! 388: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 21821 | pmu_4_292: |
| 21822 | nop |
| 21823 | ta T_CHANGE_PRIV |
| 21824 | setx 0xfffffeabfffffbe2, %g1, %g7 |
| 21825 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21826 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 21827 | reduce_priv_lvl_4_293: |
| 21828 | ta T_CHANGE_NONPRIV ! macro |
| 21829 | ceter_4_294: |
| 21830 | nop |
| 21831 | ta T_CHANGE_HPRIV |
| 21832 | mov 7, %r17 |
| 21833 | sllx %r17, 60, %r17 |
| 21834 | mov 0x18, %r16 |
| 21835 | stxa %r17, [%r16]0x4c |
| 21836 | .word 0xa7410000 ! 391: RDTICK rd %tick, %r19 |
| 21837 | cwp_4_295: |
| 21838 | set user_data_start, %o7 |
| 21839 | .word 0x93902001 ! 392: WRPR_CWP_I wrpr %r0, 0x0001, %cwp |
| 21840 | splash_lsu_4_296: |
| 21841 | nop |
| 21842 | ta T_CHANGE_HPRIV |
| 21843 | set 0xa1a949ca, %r2 |
| 21844 | mov 0x6, %r1 |
| 21845 | sllx %r1, 32, %r1 |
| 21846 | or %r1, %r2, %r2 |
| 21847 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 21848 | ta T_CHANGE_NONHPRIV |
| 21849 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 21850 | intveclr_4_297: |
| 21851 | nop |
| 21852 | ta T_CHANGE_HPRIV |
| 21853 | setx 0x480a21547d680f14, %r1, %r28 |
| 21854 | stxa %r28, [%g0] 0x72 |
| 21855 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 21856 | nop |
| 21857 | mov 0x80, %g3 |
| 21858 | stxa %g3, [%g3] 0x5f |
| 21859 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 21860 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 21861 | reduce_priv_lvl_4_298: |
| 21862 | ta T_CHANGE_NONPRIV ! macro |
| 21863 | dvapa_4_299: |
| 21864 | nop |
| 21865 | ta T_CHANGE_HPRIV |
| 21866 | mov 0xb73, %r20 |
| 21867 | mov 0x1a, %r19 |
| 21868 | sllx %r20, 23, %r20 |
| 21869 | or %r19, %r20, %r19 |
| 21870 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 21871 | mov 0x38, %r18 |
| 21872 | stxa %r31, [%r18]0x58 |
| 21873 | ta T_CHANGE_NONHPRIV |
| 21874 | .word 0xe33fc012 ! 397: STDF_R std %f17, [%r18, %r31] |
| 21875 | mondo_4_300: |
| 21876 | nop |
| 21877 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 21878 | stxa %r17, [%r0+0x3d0] %asi |
| 21879 | .word 0x9d92400c ! 398: WRPR_WSTATE_R wrpr %r9, %r12, %wstate |
| 21880 | .word 0xe19fd960 ! 399: LDDFA_R ldda [%r31, %r0], %f16 |
| 21881 | splash_decr_4_301: |
| 21882 | nop |
| 21883 | ta T_CHANGE_HPRIV |
| 21884 | mov 8, %r1 |
| 21885 | stxa %r11, [%r1] 0x45 |
| 21886 | .word 0xa784c014 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r19, %r20, %- |
| 21887 | #if (defined SPC || defined CMP) |
| 21888 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_302) + 8, 16, 16)) -> intp(4,0,3) |
| 21889 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_302)&0xffffffff) + 8, 16, 16)) -> intp(4,0,3) |
| 21890 | #else |
| 21891 | setx 0x3079e22d1844ab6a, %r1, %r28 |
| 21892 | stxa %r28, [%g0] 0x73 |
| 21893 | #endif |
| 21894 | intvec_4_302: |
| 21895 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21896 | brcommon2_4_303: |
| 21897 | nop |
| 21898 | setx common_target, %r12, %r27 |
| 21899 | ba,a .+12 |
| 21900 | .word 0x9f8021b0 ! 1: SIR sir 0x01b0 |
| 21901 | ba,a .+8 |
| 21902 | jmpl %r27+0, %r27 |
| 21903 | .word 0xe19fc2c0 ! 402: LDDFA_R ldda [%r31, %r0], %f16 |
| 21904 | nop |
| 21905 | ta T_CHANGE_HPRIV |
| 21906 | mov 0x4, %r10 |
| 21907 | set sync_thr_counter6, %r23 |
| 21908 | #ifndef SPC |
| 21909 | ldxa [%g0]0x63, %o1 |
| 21910 | and %o1, 0x38, %o1 |
| 21911 | add %o1, %r23, %r23 |
| 21912 | #endif |
| 21913 | cas [%r23],%g0,%r10 !lock |
| 21914 | brnz %r10, sma_4_304 |
| 21915 | rd %asi, %r12 |
| 21916 | wr %g0, 0x40, %asi |
| 21917 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21918 | set 0x001e1fff, %g1 |
| 21919 | stxa %g1, [%g0 + 0x80] %asi |
| 21920 | wr %r12, %g0, %asi |
| 21921 | st %g0, [%r23] |
| 21922 | sma_4_304: |
| 21923 | ta T_CHANGE_NONHPRIV |
| 21924 | .word 0xd3e7e010 ! 403: CASA_R casa [%r31] %asi, %r16, %r9 |
| 21925 | pmu_4_305: |
| 21926 | nop |
| 21927 | setx 0xfffff140fffff53d, %g1, %g7 |
| 21928 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 21929 | jmptr_4_306: |
| 21930 | nop |
| 21931 | best_set_reg(0xe1200000, %r20, %r27) |
| 21932 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 21933 | splash_tick_4_307: |
| 21934 | nop |
| 21935 | ta T_CHANGE_HPRIV |
| 21936 | best_set_reg(0x475346ca0755eec0, %r16, %r17) |
| 21937 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 21938 | #if (defined SPC || defined CMP) |
| 21939 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_308) + 24, 16, 16)) -> intp(1,0,2) |
| 21940 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_308)&0xffffffff) + 24, 16, 16)) -> intp(1,0,2) |
| 21941 | #else |
| 21942 | setx 0x8d28c87a9b66599d, %r1, %r28 |
| 21943 | stxa %r28, [%g0] 0x73 |
| 21944 | #endif |
| 21945 | intvec_4_308: |
| 21946 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 21947 | splash_hpstate_4_309: |
| 21948 | .word 0x819820d4 ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x00d4, %hpstate |
| 21949 | br_badelay2_4_310: |
| 21950 | .word 0xa5a309d0 ! 1: FDIVd fdivd %f12, %f16, %f18 |
| 21951 | pdist %f12, %f0, %f6 |
| 21952 | .word 0x91b14311 ! 409: ALIGNADDRESS alignaddr %r5, %r17, %r8 |
| 21953 | splash_cmpr_4_311: |
| 21954 | mov 1, %r18 |
| 21955 | sllx %r18, 63, %r18 |
| 21956 | rd %tick, %r17 |
| 21957 | add %r17, 0x60, %r17 |
| 21958 | or %r17, %r18, %r17 |
| 21959 | ta T_CHANGE_HPRIV |
| 21960 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 21961 | ta T_CHANGE_PRIV |
| 21962 | .word 0xb3800011 ! 410: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 21963 | nop |
| 21964 | ta T_CHANGE_HPRIV |
| 21965 | mov 0x4, %r10 |
| 21966 | set sync_thr_counter6, %r23 |
| 21967 | #ifndef SPC |
| 21968 | ldxa [%g0]0x63, %o1 |
| 21969 | and %o1, 0x38, %o1 |
| 21970 | add %o1, %r23, %r23 |
| 21971 | #endif |
| 21972 | cas [%r23],%g0,%r10 !lock |
| 21973 | brnz %r10, sma_4_312 |
| 21974 | rd %asi, %r12 |
| 21975 | wr %g0, 0x40, %asi |
| 21976 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 21977 | set 0x001a1fff, %g1 |
| 21978 | stxa %g1, [%g0 + 0x80] %asi |
| 21979 | wr %r12, %g0, %asi |
| 21980 | st %g0, [%r23] |
| 21981 | sma_4_312: |
| 21982 | ta T_CHANGE_NONHPRIV |
| 21983 | .word 0xe5e7e014 ! 411: CASA_R casa [%r31] %asi, %r20, %r18 |
| 21984 | #if (defined SPC || defined CMP) |
| 21985 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_313)+32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21986 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_313)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 21987 | #else |
| 21988 | !! TODO:Generate XIR via RESET_GEN register |
| 21989 | ! setx 0x8900000808, %r16, %r17 |
| 21990 | ! mov 0x2, %r16 |
| 21991 | ! stw %r16, [%r17] |
| 21992 | #endif |
| 21993 | xir_4_313: |
| 21994 | .word 0xa9806f1a ! 412: WR_SET_SOFTINT_I wr %r1, 0x0f1a, %set_softint |
| 21995 | memptr_4_314: |
| 21996 | set 0x60740000, %r31 |
| 21997 | .word 0x8584be02 ! 413: WRCCR_I wr %r18, 0x1e02, %ccr |
| 21998 | cmp_4_315: |
| 21999 | nop |
| 22000 | ta T_CHANGE_HPRIV |
| 22001 | rd %asi, %r12 |
| 22002 | wr %r0, 0x41, %asi |
| 22003 | set sync_thr_counter4, %r23 |
| 22004 | #ifndef SPC |
| 22005 | ldxa [%g0]0x63, %r8 |
| 22006 | and %r8, 0x38, %r8 ! Core ID |
| 22007 | add %r8, %r23, %r23 |
| 22008 | mov 0xff, %r9 |
| 22009 | xor %r9, 0x4, %r9 |
| 22010 | sllx %r9, %r8, %r9 ! My core mask |
| 22011 | #else |
| 22012 | mov 0, %r8 |
| 22013 | mov 0xff, %r9 |
| 22014 | xor %r9, 0x4, %r9 ! My core mask |
| 22015 | #endif |
| 22016 | mov 0x4, %r10 |
| 22017 | cmp_startwait4_315: |
| 22018 | cas [%r23],%g0,%r10 !lock |
| 22019 | brz,a %r10, continue_cmp_4_315 |
| 22020 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22021 | ld [%r23], %r10 |
| 22022 | cmp_wait4_315: |
| 22023 | brnz,a %r10, cmp_wait4_315 |
| 22024 | ld [%r23], %r10 |
| 22025 | ba cmp_startwait4_315 |
| 22026 | mov 0x4, %r10 |
| 22027 | continue_cmp_4_315: |
| 22028 | ldxa [0x58]%asi, %r14 !Running_status |
| 22029 | xnor %r14, %r13, %r14 !Bits equal |
| 22030 | brz,a %r8, cmp_multi_core_4_315 |
| 22031 | mov 0xf1, %r17 |
| 22032 | best_set_reg(0xcd463527c96fb603, %r16, %r17) |
| 22033 | cmp_multi_core_4_315: |
| 22034 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 22035 | and %r14, %r9, %r14 !Apply core-mask |
| 22036 | stxa %r14, [0x68]%asi |
| 22037 | st %g0, [%r23] !clear lock |
| 22038 | wr %g0, %r12, %asi |
| 22039 | .word 0x9192c010 ! 414: WRPR_PIL_R wrpr %r11, %r16, %pil |
| 22040 | .word 0xe43fe110 ! 1: STD_I std %r18, [%r31 + 0x0110] |
| 22041 | .word 0x9f802213 ! 415: SIR sir 0x0213 |
| 22042 | nop |
| 22043 | ta T_CHANGE_HPRIV |
| 22044 | mov 0x4+1, %r10 |
| 22045 | set sync_thr_counter5, %r23 |
| 22046 | #ifndef SPC |
| 22047 | ldxa [%g0]0x63, %o1 |
| 22048 | and %o1, 0x38, %o1 |
| 22049 | add %o1, %r23, %r23 |
| 22050 | sllx %o1, 5, %o3 !(CID*256) |
| 22051 | #endif |
| 22052 | cas [%r23],%g0,%r10 !lock |
| 22053 | brnz %r10, cwq_4_316 |
| 22054 | rd %asi, %r12 |
| 22055 | wr %g0, 0x40, %asi |
| 22056 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 22057 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 22058 | cmp %l1, 1 |
| 22059 | bne cwq_4_316 |
| 22060 | set CWQ_BASE, %l6 |
| 22061 | #ifndef SPC |
| 22062 | add %l6, %o3, %l6 |
| 22063 | #endif |
| 22064 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 22065 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 22066 | sllx %l2, 32, %l2 |
| 22067 | stx %l2, [%l6 + 0x0] |
| 22068 | membar #Sync |
| 22069 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 22070 | sub %l2, 0x40, %l2 |
| 22071 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 22072 | wr %r12, %g0, %asi |
| 22073 | st %g0, [%r23] |
| 22074 | cwq_4_316: |
| 22075 | ta T_CHANGE_NONHPRIV |
| 22076 | .word 0x9b414000 ! 416: RDPC rd %pc, %r13 |
| 22077 | intveclr_4_317: |
| 22078 | nop |
| 22079 | ta T_CHANGE_HPRIV |
| 22080 | setx 0xdd1d8cc4a63a6edb, %r1, %r28 |
| 22081 | stxa %r28, [%g0] 0x72 |
| 22082 | ta T_CHANGE_NONHPRIV |
| 22083 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 22084 | splash_cmpr_4_318: |
| 22085 | mov 0, %r18 |
| 22086 | sllx %r18, 63, %r18 |
| 22087 | rd %tick, %r17 |
| 22088 | add %r17, 0x50, %r17 |
| 22089 | or %r17, %r18, %r17 |
| 22090 | ta T_CHANGE_HPRIV |
| 22091 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 22092 | ta T_CHANGE_PRIV |
| 22093 | .word 0xaf800011 ! 418: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 22094 | setx 0x4d747da76e6366e0, %r1, %r28 |
| 22095 | stxa %r28, [%g0] 0x73 |
| 22096 | intvec_4_319: |
| 22097 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 22098 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 22099 | reduce_priv_lvl_4_320: |
| 22100 | ta T_CHANGE_NONHPRIV ! macro |
| 22101 | mondo_4_321: |
| 22102 | nop |
| 22103 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 22104 | stxa %r18, [%r0+0x3d8] %asi |
| 22105 | .word 0x9d950001 ! 421: WRPR_WSTATE_R wrpr %r20, %r1, %wstate |
| 22106 | splash_lsu_4_322: |
| 22107 | nop |
| 22108 | ta T_CHANGE_HPRIV |
| 22109 | set 0x8e0a47ff, %r2 |
| 22110 | mov 0x1, %r1 |
| 22111 | sllx %r1, 32, %r1 |
| 22112 | or %r1, %r2, %r2 |
| 22113 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 22114 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 22115 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 22116 | .word 0xda3fe1b8 ! 424: STD_I std %r13, [%r31 + 0x01b8] |
| 22117 | .word 0x91d02033 ! 425: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 22118 | otherw |
| 22119 | mov 0xb0, %r30 |
| 22120 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 22121 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 22122 | .word 0x8d903ac0 ! 427: WRPR_PSTATE_I wrpr %r0, 0x1ac0, %pstate |
| 22123 | br_badelay2_4_324: |
| 22124 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 22125 | allclean |
| 22126 | .word 0x91b30312 ! 428: ALIGNADDRESS alignaddr %r12, %r18, %r8 |
| 22127 | setx vahole_target0, %r18, %r27 |
| 22128 | .word 0xd71fc013 ! 429: LDDF_R ldd [%r31, %r19], %f11 |
| 22129 | #if (defined SPC || defined CMP) |
| 22130 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_326) + 48, 16, 16)) -> intp(1,0,18) |
| 22131 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_326)&0xffffffff) + 48, 16, 16)) -> intp(1,0,18) |
| 22132 | #else |
| 22133 | setx 0x61b4fae9e081f5e1, %r1, %r28 |
| 22134 | stxa %r28, [%g0] 0x73 |
| 22135 | #endif |
| 22136 | intvec_4_326: |
| 22137 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 22138 | splash_hpstate_4_327: |
| 22139 | ta T_CHANGE_NONHPRIV |
| 22140 | .word 0x819835fe ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x15fe, %hpstate |
| 22141 | splash_htba_4_328: |
| 22142 | nop |
| 22143 | ta T_CHANGE_HPRIV |
| 22144 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 22145 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 22146 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 22147 | .word 0x93b48550 ! 434: FCMPEQ16 fcmpeq16 %d18, %d16, %r9 |
| 22148 | donret_4_329: |
| 22149 | nop |
| 22150 | ta T_CHANGE_HPRIV ! macro |
| 22151 | rd %pc, %r12 |
| 22152 | add %r12, (donretarg_4_329-donret_4_329-4), %r12 |
| 22153 | mov 0x38, %r18 |
| 22154 | stxa %r12, [%r18]0x58 |
| 22155 | add %r12, 0x4, %r11 |
| 22156 | wrpr %g0, 0x2, %tl |
| 22157 | wrpr %g0, %r12, %tpc |
| 22158 | wrpr %g0, %r11, %tnpc |
| 22159 | set (0x000ed250 | (32 << 24)), %r13 |
| 22160 | rdpr %tstate, %r16 |
| 22161 | mov 0x1f, %r19 |
| 22162 | and %r19, %r16, %r17 |
| 22163 | andn %r16, %r19, %r16 |
| 22164 | or %r16, %r17, %r20 |
| 22165 | wrpr %r20, %g0, %tstate |
| 22166 | wrhpr %g0, 0xb46, %htstate |
| 22167 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 22168 | done |
| 22169 | donretarg_4_329: |
| 22170 | .word 0xd8ffe16f ! 435: SWAPA_I swapa %r12, [%r31 + 0x016f] %asi |
| 22171 | .word 0x97a44d30 ! 436: FsMULd fsmuld %f17, %f16, %f42 |
| 22172 | splash_tba_4_330: |
| 22173 | ta T_CHANGE_PRIV |
| 22174 | setx 0x0000000400380000, %r11, %r12 |
| 22175 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 22176 | nop |
| 22177 | mov 0x80, %g3 |
| 22178 | stxa %g3, [%g3] 0x5f |
| 22179 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 22180 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 22181 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 22182 | nop |
| 22183 | mov 0x80, %g3 |
| 22184 | stxa %g3, [%g3] 0x5f |
| 22185 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 22186 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 22187 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 22188 | donret_4_331: |
| 22189 | nop |
| 22190 | ta T_CHANGE_HPRIV ! macro |
| 22191 | rd %pc, %r12 |
| 22192 | add %r12, (donretarg_4_331-donret_4_331-4), %r12 |
| 22193 | mov 0x38, %r18 |
| 22194 | stxa %r12, [%r18]0x58 |
| 22195 | add %r12, 0x4, %r11 |
| 22196 | wrpr %g0, 0x2, %tl |
| 22197 | wrpr %g0, %r12, %tpc |
| 22198 | wrpr %g0, %r11, %tnpc |
| 22199 | set (0x006a671c | (0x58 << 24)), %r13 |
| 22200 | rdpr %tstate, %r16 |
| 22201 | mov 0x1f, %r19 |
| 22202 | and %r19, %r16, %r17 |
| 22203 | andn %r16, %r19, %r16 |
| 22204 | or %r16, %r17, %r20 |
| 22205 | wrpr %r20, %g0, %tstate |
| 22206 | wrhpr %g0, 0x14cb, %htstate |
| 22207 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 22208 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 22209 | done |
| 22210 | donretarg_4_331: |
| 22211 | .word 0xe26fe1bd ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x01bd] |
| 22212 | donret_4_332: |
| 22213 | nop |
| 22214 | ta T_CHANGE_HPRIV ! macro |
| 22215 | rd %pc, %r12 |
| 22216 | add %r12, (donretarg_4_332-donret_4_332-8), %r12 |
| 22217 | mov 0x38, %r18 |
| 22218 | stxa %r12, [%r18]0x58 |
| 22219 | add %r12, 0x4, %r11 |
| 22220 | wrpr %g0, 0x2, %tl |
| 22221 | wrpr %g0, %r12, %tpc |
| 22222 | wrpr %g0, %r11, %tnpc |
| 22223 | set (0x005e6b38 | (0x55 << 24)), %r13 |
| 22224 | rdpr %tstate, %r16 |
| 22225 | mov 0x1f, %r19 |
| 22226 | and %r19, %r16, %r17 |
| 22227 | andn %r16, %r19, %r16 |
| 22228 | or %r16, %r17, %r20 |
| 22229 | wrpr %r20, %g0, %tstate |
| 22230 | wrhpr %g0, 0x4cd, %htstate |
| 22231 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 22232 | retry |
| 22233 | donretarg_4_332: |
| 22234 | .word 0x9ba489d2 ! 441: FDIVd fdivd %f18, %f18, %f44 |
| 22235 | setx 0x681e856389d70fab, %r1, %r28 |
| 22236 | stxa %r28, [%g0] 0x73 |
| 22237 | intvec_4_333: |
| 22238 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 22239 | .word 0xe88fe038 ! 443: LDUBA_I lduba [%r31, + 0x0038] %asi, %r20 |
| 22240 | .word 0xe937e18b ! 444: STQF_I - %f20, [0x018b, %r31] |
| 22241 | cerer_4_334: |
| 22242 | nop |
| 22243 | ta T_CHANGE_HPRIV |
| 22244 | best_set_reg(0x6baf52f60888a165, %r26, %r27) |
| 22245 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 22246 | sllx %r26, 32, %r26 |
| 22247 | or %r26, %r27, %r27 |
| 22248 | mov 0x10, %r26 |
| 22249 | stxa %r27, [%r26]0x4c |
| 22250 | ta T_CHANGE_NONHPRIV |
| 22251 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 22252 | iaw_4_335: |
| 22253 | nop |
| 22254 | ta T_CHANGE_HPRIV |
| 22255 | mov 8, %r18 |
| 22256 | rd %asi, %r12 |
| 22257 | wr %r0, 0x41, %asi |
| 22258 | set sync_thr_counter4, %r23 |
| 22259 | #ifndef SPC |
| 22260 | ldxa [%g0]0x63, %r8 |
| 22261 | and %r8, 0x38, %r8 ! Core ID |
| 22262 | add %r8, %r23, %r23 |
| 22263 | #else |
| 22264 | mov 0, %r8 |
| 22265 | #endif |
| 22266 | mov 0x4, %r16 |
| 22267 | iaw_startwait4_335: |
| 22268 | cas [%r23],%g0,%r16 !lock |
| 22269 | brz,a %r16, continue_iaw_4_335 |
| 22270 | mov (~0x4&0xf), %r16 |
| 22271 | ld [%r23], %r16 |
| 22272 | iaw_wait4_335: |
| 22273 | brnz %r16, iaw_wait4_335 |
| 22274 | ld [%r23], %r16 |
| 22275 | ba iaw_startwait4_335 |
| 22276 | mov 0x4, %r16 |
| 22277 | continue_iaw_4_335: |
| 22278 | sllx %r16, %r8, %r16 !Mask for my core only |
| 22279 | ldxa [0x58]%asi, %r17 !Running_status |
| 22280 | wait_for_stat_4_335: |
| 22281 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22282 | cmp %r13, %r17 |
| 22283 | bne,a wait_for_stat_4_335 |
| 22284 | ldxa [0x58]%asi, %r17 !Running_status |
| 22285 | stxa %r16, [0x68]%asi !Park (W1C) |
| 22286 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22287 | wait_for_iaw_4_335: |
| 22288 | ldxa [0x58]%asi, %r17 !Running_status |
| 22289 | cmp %r14, %r17 |
| 22290 | bne,a wait_for_iaw_4_335 |
| 22291 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22292 | iaw_doit4_335: |
| 22293 | mov 0x38, %r18 |
| 22294 | iaw4_4_335: |
| 22295 | setx common_target, %r20, %r19 |
| 22296 | or %r19, 0x1, %r19 |
| 22297 | stxa %r19, [%r18]0x50 |
| 22298 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 22299 | st %g0, [%r23] !clear lock |
| 22300 | wr %r0, %r12, %asi ! restore %asi |
| 22301 | ta T_CHANGE_NONHPRIV |
| 22302 | .word 0xc3eb4031 ! 446: PREFETCHA_R prefetcha [%r13, %r17] 0x01, #one_read |
| 22303 | brcommon2_4_336: |
| 22304 | nop |
| 22305 | setx common_target, %r12, %r27 |
| 22306 | ba,a .+12 |
| 22307 | .word 0xa9b7c70a ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f10, %d20 |
| 22308 | ba,a .+8 |
| 22309 | jmpl %r27+0, %r27 |
| 22310 | .word 0xc19fdb60 ! 447: LDDFA_R ldda [%r31, %r0], %f0 |
| 22311 | .word 0x984cc009 ! 448: MULX_R mulx %r19, %r9, %r12 |
| 22312 | splash_lsu_4_337: |
| 22313 | nop |
| 22314 | ta T_CHANGE_HPRIV |
| 22315 | set 0x4e4b46cb, %r2 |
| 22316 | mov 0x3, %r1 |
| 22317 | sllx %r1, 32, %r1 |
| 22318 | or %r1, %r2, %r2 |
| 22319 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 22320 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 22321 | mondo_4_338: |
| 22322 | nop |
| 22323 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 22324 | ta T_CHANGE_PRIV |
| 22325 | stxa %r6, [%r0+0x3e0] %asi |
| 22326 | .word 0x9d940010 ! 450: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 22327 | splash_tick_4_339: |
| 22328 | nop |
| 22329 | ta T_CHANGE_HPRIV |
| 22330 | best_set_reg(0xe8ed4ae3190d0f6b, %r16, %r17) |
| 22331 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 22332 | splash_hpstate_4_340: |
| 22333 | ta T_CHANGE_NONHPRIV |
| 22334 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 22335 | .word 0x8198281e ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x081e, %hpstate |
| 22336 | pmu_4_341: |
| 22337 | nop |
| 22338 | ta T_CHANGE_PRIV |
| 22339 | setx 0xffffffc2fffffa39, %g1, %g7 |
| 22340 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 22341 | .word 0x91d020b4 ! 454: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 22342 | .word 0x9ba1c9b4 ! 455: FDIVs fdivs %f7, %f20, %f13 |
| 22343 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 22344 | cwp_4_342: |
| 22345 | set user_data_start, %o7 |
| 22346 | .word 0x93902006 ! 457: WRPR_CWP_I wrpr %r0, 0x0006, %cwp |
| 22347 | jmptr_4_343: |
| 22348 | nop |
| 22349 | best_set_reg(0xe1200000, %r20, %r27) |
| 22350 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 22351 | jmptr_4_344: |
| 22352 | nop |
| 22353 | best_set_reg(0xe1200000, %r20, %r27) |
| 22354 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 22355 | jmptr_4_345: |
| 22356 | nop |
| 22357 | best_set_reg(0xe1200000, %r20, %r27) |
| 22358 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 22359 | iaw_4_346: |
| 22360 | nop |
| 22361 | ta T_CHANGE_HPRIV |
| 22362 | mov 8, %r18 |
| 22363 | rd %asi, %r12 |
| 22364 | wr %r0, 0x41, %asi |
| 22365 | set sync_thr_counter4, %r23 |
| 22366 | #ifndef SPC |
| 22367 | ldxa [%g0]0x63, %r8 |
| 22368 | and %r8, 0x38, %r8 ! Core ID |
| 22369 | add %r8, %r23, %r23 |
| 22370 | #else |
| 22371 | mov 0, %r8 |
| 22372 | #endif |
| 22373 | mov 0x4, %r16 |
| 22374 | iaw_startwait4_346: |
| 22375 | cas [%r23],%g0,%r16 !lock |
| 22376 | brz,a %r16, continue_iaw_4_346 |
| 22377 | mov (~0x4&0xf), %r16 |
| 22378 | ld [%r23], %r16 |
| 22379 | iaw_wait4_346: |
| 22380 | brnz %r16, iaw_wait4_346 |
| 22381 | ld [%r23], %r16 |
| 22382 | ba iaw_startwait4_346 |
| 22383 | mov 0x4, %r16 |
| 22384 | continue_iaw_4_346: |
| 22385 | sllx %r16, %r8, %r16 !Mask for my core only |
| 22386 | ldxa [0x58]%asi, %r17 !Running_status |
| 22387 | wait_for_stat_4_346: |
| 22388 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22389 | cmp %r13, %r17 |
| 22390 | bne,a wait_for_stat_4_346 |
| 22391 | ldxa [0x58]%asi, %r17 !Running_status |
| 22392 | stxa %r16, [0x68]%asi !Park (W1C) |
| 22393 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22394 | wait_for_iaw_4_346: |
| 22395 | ldxa [0x58]%asi, %r17 !Running_status |
| 22396 | cmp %r14, %r17 |
| 22397 | bne,a wait_for_iaw_4_346 |
| 22398 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22399 | iaw_doit4_346: |
| 22400 | mov 0x38, %r18 |
| 22401 | iaw1_4_346: |
| 22402 | best_set_reg(0x00000000e1200000, %r20, %r19) |
| 22403 | or %r19, 0x1, %r19 |
| 22404 | stxa %r19, [%r18]0x50 |
| 22405 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 22406 | st %g0, [%r23] !clear lock |
| 22407 | wr %r0, %r12, %asi ! restore %asi |
| 22408 | ta T_CHANGE_NONHPRIV |
| 22409 | .word 0xe6bfc031 ! 461: STDA_R stda %r19, [%r31 + %r17] 0x01 |
| 22410 | brcommon1_4_347: |
| 22411 | nop |
| 22412 | setx common_target, %r12, %r27 |
| 22413 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 22414 | ba,a .+12 |
| 22415 | .word 0xa77021a0 ! 1: POPC_I popc 0x01a0, %r19 |
| 22416 | ba,a .+8 |
| 22417 | jmpl %r27+0, %r27 |
| 22418 | .word 0x87ac4a54 ! 462: FCMPd fcmpd %fcc<n>, %f48, %f20 |
| 22419 | splash_tick_4_348: |
| 22420 | nop |
| 22421 | ta T_CHANGE_HPRIV |
| 22422 | best_set_reg(0xbe4f4e0149d3ee51, %r16, %r17) |
| 22423 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 22424 | ceter_4_349: |
| 22425 | nop |
| 22426 | ta T_CHANGE_HPRIV |
| 22427 | mov 7, %r17 |
| 22428 | sllx %r17, 60, %r17 |
| 22429 | mov 0x18, %r16 |
| 22430 | stxa %r17, [%r16]0x4c |
| 22431 | ta T_CHANGE_NONHPRIV |
| 22432 | .word 0x97410000 ! 464: RDTICK rd %tick, %r11 |
| 22433 | splash_cmpr_4_350: |
| 22434 | mov 0, %r18 |
| 22435 | sllx %r18, 63, %r18 |
| 22436 | rd %tick, %r17 |
| 22437 | add %r17, 0x70, %r17 |
| 22438 | or %r17, %r18, %r17 |
| 22439 | ta T_CHANGE_HPRIV |
| 22440 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 22441 | .word 0xb3800011 ! 465: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 22442 | .word 0x9680c013 ! 466: ADDcc_R addcc %r3, %r19, %r11 |
| 22443 | .word 0xd28008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 |
| 22444 | memptr_4_351: |
| 22445 | set user_data_start, %r31 |
| 22446 | .word 0x8581b03e ! 468: WRCCR_I wr %r6, 0x103e, %ccr |
| 22447 | .word 0xd27fe060 ! 469: SWAP_I swap %r9, [%r31 + 0x0060] |
| 22448 | .word 0x93a7c9d0 ! 1: FDIVd fdivd %f62, %f16, %f40 |
| 22449 | .word 0x9f802432 ! 470: SIR sir 0x0432 |
| 22450 | cmp_4_352: |
| 22451 | nop |
| 22452 | ta T_CHANGE_HPRIV |
| 22453 | rd %asi, %r12 |
| 22454 | wr %r0, 0x41, %asi |
| 22455 | set sync_thr_counter4, %r23 |
| 22456 | #ifndef SPC |
| 22457 | ldxa [%g0]0x63, %r8 |
| 22458 | and %r8, 0x38, %r8 ! Core ID |
| 22459 | add %r8, %r23, %r23 |
| 22460 | mov 0xff, %r9 |
| 22461 | xor %r9, 0x4, %r9 |
| 22462 | sllx %r9, %r8, %r9 ! My core mask |
| 22463 | #else |
| 22464 | mov 0, %r8 |
| 22465 | mov 0xff, %r9 |
| 22466 | xor %r9, 0x4, %r9 ! My core mask |
| 22467 | #endif |
| 22468 | mov 0x4, %r10 |
| 22469 | cmp_startwait4_352: |
| 22470 | cas [%r23],%g0,%r10 !lock |
| 22471 | brz,a %r10, continue_cmp_4_352 |
| 22472 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22473 | ld [%r23], %r10 |
| 22474 | cmp_wait4_352: |
| 22475 | brnz,a %r10, cmp_wait4_352 |
| 22476 | ld [%r23], %r10 |
| 22477 | ba cmp_startwait4_352 |
| 22478 | mov 0x4, %r10 |
| 22479 | continue_cmp_4_352: |
| 22480 | ldxa [0x58]%asi, %r14 !Running_status |
| 22481 | xnor %r14, %r13, %r14 !Bits equal |
| 22482 | brz,a %r8, cmp_multi_core_4_352 |
| 22483 | mov 55, %r17 |
| 22484 | best_set_reg(0xb3d7c85ddeadaec9, %r16, %r17) |
| 22485 | cmp_multi_core_4_352: |
| 22486 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 22487 | and %r14, %r9, %r14 !Apply core-mask |
| 22488 | stxa %r14, [0x60]%asi |
| 22489 | st %g0, [%r23] !clear lock |
| 22490 | wr %g0, %r12, %asi |
| 22491 | ta T_CHANGE_NONHPRIV |
| 22492 | .word 0x9192800c ! 471: WRPR_PIL_R wrpr %r10, %r12, %pil |
| 22493 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 22494 | jmptr_4_353: |
| 22495 | nop |
| 22496 | best_set_reg(0xe0200000, %r20, %r27) |
| 22497 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 22498 | iaw_4_354: |
| 22499 | nop |
| 22500 | ta T_CHANGE_HPRIV |
| 22501 | mov 8, %r18 |
| 22502 | rd %asi, %r12 |
| 22503 | wr %r0, 0x41, %asi |
| 22504 | set sync_thr_counter4, %r23 |
| 22505 | #ifndef SPC |
| 22506 | ldxa [%g0]0x63, %r8 |
| 22507 | and %r8, 0x38, %r8 ! Core ID |
| 22508 | add %r8, %r23, %r23 |
| 22509 | #else |
| 22510 | mov 0, %r8 |
| 22511 | #endif |
| 22512 | mov 0x4, %r16 |
| 22513 | iaw_startwait4_354: |
| 22514 | cas [%r23],%g0,%r16 !lock |
| 22515 | brz,a %r16, continue_iaw_4_354 |
| 22516 | mov (~0x4&0xf), %r16 |
| 22517 | ld [%r23], %r16 |
| 22518 | iaw_wait4_354: |
| 22519 | brnz %r16, iaw_wait4_354 |
| 22520 | ld [%r23], %r16 |
| 22521 | ba iaw_startwait4_354 |
| 22522 | mov 0x4, %r16 |
| 22523 | continue_iaw_4_354: |
| 22524 | sllx %r16, %r8, %r16 !Mask for my core only |
| 22525 | ldxa [0x58]%asi, %r17 !Running_status |
| 22526 | wait_for_stat_4_354: |
| 22527 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22528 | cmp %r13, %r17 |
| 22529 | bne,a wait_for_stat_4_354 |
| 22530 | ldxa [0x58]%asi, %r17 !Running_status |
| 22531 | stxa %r16, [0x68]%asi !Park (W1C) |
| 22532 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22533 | wait_for_iaw_4_354: |
| 22534 | ldxa [0x58]%asi, %r17 !Running_status |
| 22535 | cmp %r14, %r17 |
| 22536 | bne,a wait_for_iaw_4_354 |
| 22537 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22538 | iaw_doit4_354: |
| 22539 | mov 0x38, %r18 |
| 22540 | iaw1_4_354: |
| 22541 | best_set_reg(0x00000000e0200000, %r20, %r19) |
| 22542 | or %r19, 0x1, %r19 |
| 22543 | stxa %r19, [%r18]0x50 |
| 22544 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 22545 | st %g0, [%r23] !clear lock |
| 22546 | wr %r0, %r12, %asi ! restore %asi |
| 22547 | ta T_CHANGE_NONHPRIV |
| 22548 | .word 0xc3e90034 ! 474: PREFETCHA_R prefetcha [%r4, %r20] 0x01, #one_read |
| 22549 | .word 0x87a88a42 ! 475: FCMPd fcmpd %fcc<n>, %f2, %f2 |
| 22550 | #if (defined SPC || defined CMP) |
| 22551 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_356)+56, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 22552 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_356)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x4),1,3) |
| 22553 | #else |
| 22554 | !! TODO:Generate XIR via RESET_GEN register |
| 22555 | ! setx 0x8900000808, %r16, %r17 |
| 22556 | ! mov 0x2, %r16 |
| 22557 | ! stw %r16, [%r17] |
| 22558 | #endif |
| 22559 | xir_4_356: |
| 22560 | .word 0xa9817a0d ! 476: WR_SET_SOFTINT_I wr %r5, 0x1a0d, %set_softint |
| 22561 | trapasi_4_357: |
| 22562 | nop |
| 22563 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 22564 | .word 0xd8904980 ! 477: LDUHA_R lduha [%r1, %r0] 0x4c, %r12 |
| 22565 | .word 0xc19fe040 ! 478: LDDFA_I ldda [%r31, 0x0040], %f0 |
| 22566 | donret_4_358: |
| 22567 | nop |
| 22568 | ta T_CHANGE_HPRIV ! macro |
| 22569 | rd %pc, %r12 |
| 22570 | add %r12, (donretarg_4_358-donret_4_358-8), %r12 |
| 22571 | mov 0x38, %r18 |
| 22572 | stxa %r12, [%r18]0x58 |
| 22573 | add %r12, 0x4, %r11 |
| 22574 | wrpr %g0, 0x2, %tl |
| 22575 | wrpr %g0, %r12, %tpc |
| 22576 | wrpr %g0, %r11, %tnpc |
| 22577 | set (0x007871fe | (22 << 24)), %r13 |
| 22578 | rdpr %tstate, %r16 |
| 22579 | mov 0x1f, %r19 |
| 22580 | and %r19, %r16, %r17 |
| 22581 | andn %r16, %r19, %r16 |
| 22582 | or %r16, %r17, %r20 |
| 22583 | wrpr %r20, %g0, %tstate |
| 22584 | wrhpr %g0, 0x54d, %htstate |
| 22585 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 22586 | retry |
| 22587 | donretarg_4_358: |
| 22588 | .word 0xd8ffe03d ! 479: SWAPA_I swapa %r12, [%r31 + 0x003d] %asi |
| 22589 | invtsb_4_359: |
| 22590 | nop |
| 22591 | ta T_CHANGE_HPRIV |
| 22592 | rd %asi, %r21 |
| 22593 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 22594 | mov 1, %r20 |
| 22595 | sllx %r20, 63, %r20 |
| 22596 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 22597 | xor %r22 ,%r20, %r22 |
| 22598 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 22599 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 22600 | xor %r22 ,%r20, %r22 |
| 22601 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 22602 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 22603 | xor %r22 ,%r20, %r22 |
| 22604 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 22605 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 22606 | xor %r22 ,%r20, %r22 |
| 22607 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 22608 | wr %r21, %r0, %asi |
| 22609 | ta T_CHANGE_NONHPRIV |
| 22610 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 22611 | mondo_4_360: |
| 22612 | nop |
| 22613 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 22614 | stxa %r9, [%r0+0x3d0] %asi |
| 22615 | .word 0x9d914006 ! 481: WRPR_WSTATE_R wrpr %r5, %r6, %wstate |
| 22616 | .word 0xe19fdf20 ! 482: LDDFA_R ldda [%r31, %r0], %f16 |
| 22617 | br_badelay1_4_361: |
| 22618 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 22619 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 22620 | .word 0xd9e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r12 |
| 22621 | normalw |
| 22622 | .word 0xa9458000 ! 483: RD_SOFTINT_REG rd %softint, %r20 |
| 22623 | .word 0xdbe7c028 ! 1: CASA_I casa [%r31] 0x 1, %r8, %r13 |
| 22624 | .word 0x9f802e85 ! 484: SIR sir 0x0e85 |
| 22625 | .word 0xdb27e18c ! 485: STF_I st %f13, [0x018c, %r31] |
| 22626 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 22627 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 22628 | pmu_4_362: |
| 22629 | nop |
| 22630 | setx 0xfffff264fffff643, %g1, %g7 |
| 22631 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 22632 | .word 0x8d902edc ! 489: WRPR_PSTATE_I wrpr %r0, 0x0edc, %pstate |
| 22633 | .word 0xda3fc000 ! 490: STD_R std %r13, [%r31 + %r0] |
| 22634 | donret_4_365: |
| 22635 | nop |
| 22636 | ta T_CHANGE_HPRIV ! macro |
| 22637 | rd %pc, %r12 |
| 22638 | add %r12, (donretarg_4_365-donret_4_365-4), %r12 |
| 22639 | mov 0x38, %r18 |
| 22640 | stxa %r12, [%r18]0x58 |
| 22641 | add %r12, 0x4, %r11 |
| 22642 | wrpr %g0, 0x2, %tl |
| 22643 | wrpr %g0, %r12, %tpc |
| 22644 | wrpr %g0, %r11, %tnpc |
| 22645 | set (0x00cb6f64 | (20 << 24)), %r13 |
| 22646 | rdpr %tstate, %r16 |
| 22647 | mov 0x1f, %r19 |
| 22648 | and %r19, %r16, %r17 |
| 22649 | andn %r16, %r19, %r16 |
| 22650 | or %r16, %r17, %r20 |
| 22651 | wrpr %r20, %g0, %tstate |
| 22652 | wrhpr %g0, 0x567, %htstate |
| 22653 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 22654 | done |
| 22655 | donretarg_4_365: |
| 22656 | .word 0xdaffe0b4 ! 491: SWAPA_I swapa %r13, [%r31 + 0x00b4] %asi |
| 22657 | .word 0xdb27e1c0 ! 492: STF_I st %f13, [0x01c0, %r31] |
| 22658 | .word 0xdaffc032 ! 493: SWAPA_R swapa %r13, [%r31 + %r18] 0x01 |
| 22659 | splash_cmpr_4_366: |
| 22660 | mov 0, %r18 |
| 22661 | sllx %r18, 63, %r18 |
| 22662 | rd %tick, %r17 |
| 22663 | add %r17, 0x60, %r17 |
| 22664 | or %r17, %r18, %r17 |
| 22665 | ta T_CHANGE_PRIV |
| 22666 | .word 0xaf800011 ! 494: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 22667 | nop |
| 22668 | mov 0x80, %g3 |
| 22669 | stxa %g3, [%g3] 0x57 |
| 22670 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 22671 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 22672 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 22673 | .word 0x9ba7c9b2 ! 1: FDIVs fdivs %f31, %f18, %f13 |
| 22674 | .word 0x9f80381b ! 496: SIR sir 0x181b |
| 22675 | pmu_4_367: |
| 22676 | nop |
| 22677 | ta T_CHANGE_PRIV |
| 22678 | setx 0xfffffae5fffffe92, %g1, %g7 |
| 22679 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 22680 | nop |
| 22681 | ta T_CHANGE_HPRIV |
| 22682 | mov 0x4+1, %r10 |
| 22683 | set sync_thr_counter5, %r23 |
| 22684 | #ifndef SPC |
| 22685 | ldxa [%g0]0x63, %o1 |
| 22686 | and %o1, 0x38, %o1 |
| 22687 | add %o1, %r23, %r23 |
| 22688 | sllx %o1, 5, %o3 !(CID*256) |
| 22689 | #endif |
| 22690 | cas [%r23],%g0,%r10 !lock |
| 22691 | brnz %r10, cwq_4_368 |
| 22692 | rd %asi, %r12 |
| 22693 | wr %g0, 0x40, %asi |
| 22694 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 22695 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 22696 | cmp %l1, 1 |
| 22697 | bne cwq_4_368 |
| 22698 | set CWQ_BASE, %l6 |
| 22699 | #ifndef SPC |
| 22700 | add %l6, %o3, %l6 |
| 22701 | #endif |
| 22702 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 22703 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 22704 | sllx %l2, 32, %l2 |
| 22705 | stx %l2, [%l6 + 0x0] |
| 22706 | membar #Sync |
| 22707 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 22708 | sub %l2, 0x40, %l2 |
| 22709 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 22710 | wr %r12, %g0, %asi |
| 22711 | st %g0, [%r23] |
| 22712 | cwq_4_368: |
| 22713 | ta T_CHANGE_NONHPRIV |
| 22714 | .word 0xa5414000 ! 498: RDPC rd %pc, %r18 |
| 22715 | change_to_randtl_4_369: |
| 22716 | ta T_CHANGE_HPRIV ! macro |
| 22717 | done_change_to_randtl_4_369: |
| 22718 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 22719 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 22720 | mondo_4_370: |
| 22721 | nop |
| 22722 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 22723 | stxa %r18, [%r0+0x3d8] %asi |
| 22724 | .word 0x9d90c004 ! 501: WRPR_WSTATE_R wrpr %r3, %r4, %wstate |
| 22725 | cmpenall_4_371: |
| 22726 | nop |
| 22727 | nop |
| 22728 | ta T_CHANGE_HPRIV |
| 22729 | rd %asi, %r12 |
| 22730 | wr %r0, 0x41, %asi |
| 22731 | set sync_thr_counter4, %r23 |
| 22732 | #ifndef SPC |
| 22733 | ldxa [%g0]0x63, %r8 |
| 22734 | and %r8, 0x38, %r8 ! Core ID |
| 22735 | add %r8, %r23, %r23 |
| 22736 | mov 0xff, %r9 |
| 22737 | sllx %r9, %r8, %r9 ! My core mask |
| 22738 | #else |
| 22739 | mov 0xff, %r9 ! My core mask |
| 22740 | #endif |
| 22741 | cmpenall_startwait4_371: |
| 22742 | mov 0x4, %r10 |
| 22743 | cas [%r23],%g0,%r10 !lock |
| 22744 | brz,a %r10, continue_cmpenall_4_371 |
| 22745 | nop |
| 22746 | cmpenall_wait4_371: |
| 22747 | ld [%r23], %r10 |
| 22748 | brnz %r10, cmpenall_wait4_371 |
| 22749 | nop |
| 22750 | ba,a cmpenall_startwait4_371 |
| 22751 | continue_cmpenall_4_371: |
| 22752 | ldxa [0x58]%asi, %r14 !Running_status |
| 22753 | wait_for_cmpstat_4_371: |
| 22754 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22755 | cmp %r13, %r14 |
| 22756 | bne,a %xcc, wait_for_cmpstat_4_371 |
| 22757 | ldxa [0x58]%asi, %r14 !Running_status |
| 22758 | ldxa [0x10]%asi, %r14 !Get enabled threads |
| 22759 | and %r14, %r9, %r14 !My core mask |
| 22760 | stxa %r14, [0x60]%asi !W1S |
| 22761 | ldxa [0x58]%asi, %r16 !Running_status |
| 22762 | wait_for_cmpstat2_4_371: |
| 22763 | and %r16, %r9, %r16 !My core mask |
| 22764 | cmp %r14, %r16 |
| 22765 | bne,a %xcc, wait_for_cmpstat2_4_371 |
| 22766 | ldxa [0x58]%asi, %r16 !Running_status |
| 22767 | st %g0, [%r23] !clear lock |
| 22768 | nop |
| 22769 | nop |
| 22770 | ta T_CHANGE_PRIV |
| 22771 | wrpr %g0, %g0, %gl |
| 22772 | nop |
| 22773 | nop |
| 22774 | setx join_lbl_0_0, %g1, %g2 |
| 22775 | jmp %g2 |
| 22776 | nop |
| 22777 | fork_lbl_0_2: |
| 22778 | ta T_CHANGE_NONHPRIV |
| 22779 | br_longdelay1_2_0: |
| 22780 | .word 0x24ca8001 ! 1: BRLEZ brlez,a,pt %r10,<label_0xa8001> |
| 22781 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 22782 | brnz,a,pt %r20, skip_2_1 |
| 22783 | brlez,a,pt %r18, skip_2_1 |
| 22784 | .align 1024 |
| 22785 | skip_2_1: |
| 22786 | .word 0xe7e7c020 ! 2: CASA_I casa [%r31] 0x 1, %r0, %r19 |
| 22787 | nop |
| 22788 | ta T_CHANGE_HPRIV |
| 22789 | mov 0x2, %r10 |
| 22790 | set sync_thr_counter6, %r23 |
| 22791 | #ifndef SPC |
| 22792 | ldxa [%g0]0x63, %o1 |
| 22793 | and %o1, 0x38, %o1 |
| 22794 | add %o1, %r23, %r23 |
| 22795 | #endif |
| 22796 | cas [%r23],%g0,%r10 !lock |
| 22797 | brnz %r10, sma_2_2 |
| 22798 | rd %asi, %r12 |
| 22799 | wr %g0, 0x40, %asi |
| 22800 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 22801 | set 0x00121fff, %g1 |
| 22802 | stxa %g1, [%g0 + 0x80] %asi |
| 22803 | wr %r12, %g0, %asi |
| 22804 | st %g0, [%r23] |
| 22805 | sma_2_2: |
| 22806 | ta T_CHANGE_NONHPRIV |
| 22807 | .word 0xe7e7e009 ! 3: CASA_R casa [%r31] %asi, %r9, %r19 |
| 22808 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 22809 | reduce_priv_lvl_2_3: |
| 22810 | ta T_CHANGE_NONHPRIV ! macro |
| 22811 | splash_decr_2_4: |
| 22812 | nop |
| 22813 | ta T_CHANGE_HPRIV |
| 22814 | mov 8, %r1 |
| 22815 | stxa %r19, [%r1] 0x45 |
| 22816 | .word 0xa7848011 ! 5: WR_GRAPHICS_STATUS_REG_R wr %r18, %r17, %- |
| 22817 | .word 0x87aa4ad4 ! 6: FCMPEd fcmped %fcc<n>, %f40, %f20 |
| 22818 | vahole_2_5: |
| 22819 | nop |
| 22820 | ta T_CHANGE_NONHPRIV |
| 22821 | setx vahole_target1, %r18, %r27 |
| 22822 | jmpl %r27+0, %r27 |
| 22823 | .word 0xe63fe1e0 ! 7: STD_I std %r19, [%r31 + 0x01e0] |
| 22824 | memptr_2_6: |
| 22825 | set user_data_start, %r31 |
| 22826 | .word 0x858378ec ! 8: WRCCR_I wr %r13, 0x18ec, %ccr |
| 22827 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 22828 | ceter_2_7: |
| 22829 | nop |
| 22830 | ta T_CHANGE_HPRIV |
| 22831 | mov 3, %r17 |
| 22832 | sllx %r17, 60, %r17 |
| 22833 | mov 0x18, %r16 |
| 22834 | stxa %r17, [%r16]0x4c |
| 22835 | .word 0x9b410000 ! 10: RDTICK rd %tick, %r13 |
| 22836 | splash_lsu_2_8: |
| 22837 | nop |
| 22838 | ta T_CHANGE_HPRIV |
| 22839 | set 0xbccc9f7b, %r2 |
| 22840 | mov 0x4, %r1 |
| 22841 | sllx %r1, 32, %r1 |
| 22842 | or %r1, %r2, %r2 |
| 22843 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 22844 | ta T_CHANGE_NONHPRIV |
| 22845 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 22846 | brcommon1_2_9: |
| 22847 | nop |
| 22848 | setx common_target, %r12, %r27 |
| 22849 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 22850 | ba,a .+12 |
| 22851 | .word 0xd06fe020 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0020] |
| 22852 | ba,a .+8 |
| 22853 | jmpl %r27+0, %r27 |
| 22854 | .word 0x9f8030f8 ! 12: SIR sir 0x10f8 |
| 22855 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 22856 | pmu_2_10: |
| 22857 | nop |
| 22858 | setx 0xfffff392fffff6ca, %g1, %g7 |
| 22859 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 22860 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 22861 | pmu_2_11: |
| 22862 | nop |
| 22863 | ta T_CHANGE_PRIV |
| 22864 | setx 0xfffff583fffff839, %g1, %g7 |
| 22865 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 22866 | ibp_2_12: |
| 22867 | nop |
| 22868 | ta T_CHANGE_HPRIV |
| 22869 | mov 8, %r18 |
| 22870 | rd %asi, %r12 |
| 22871 | wr %r0, 0x41, %asi |
| 22872 | set sync_thr_counter4, %r23 |
| 22873 | #ifndef SPC |
| 22874 | ldxa [%g0]0x63, %r8 |
| 22875 | and %r8, 0x38, %r8 ! Core ID |
| 22876 | add %r8, %r23, %r23 |
| 22877 | #else |
| 22878 | mov 0, %r8 |
| 22879 | #endif |
| 22880 | mov 0x2, %r16 |
| 22881 | ibp_startwait2_12: |
| 22882 | cas [%r23],%g0,%r16 !lock |
| 22883 | brz,a %r16, continue_ibp_2_12 |
| 22884 | mov (~0x2&0xf), %r16 |
| 22885 | ld [%r23], %r16 |
| 22886 | ibp_wait2_12: |
| 22887 | brnz %r16, ibp_wait2_12 |
| 22888 | ld [%r23], %r16 |
| 22889 | ba ibp_startwait2_12 |
| 22890 | mov 0x2, %r16 |
| 22891 | continue_ibp_2_12: |
| 22892 | sllx %r16, %r8, %r16 !Mask for my core only |
| 22893 | ldxa [0x58]%asi, %r17 !Running_status |
| 22894 | wait_for_stat_2_12: |
| 22895 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22896 | cmp %r13, %r17 |
| 22897 | bne,a wait_for_stat_2_12 |
| 22898 | ldxa [0x58]%asi, %r17 !Running_status |
| 22899 | stxa %r16, [0x68]%asi !Park (W1C) |
| 22900 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22901 | wait_for_ibp_2_12: |
| 22902 | ldxa [0x58]%asi, %r17 !Running_status |
| 22903 | cmp %r14, %r17 |
| 22904 | bne,a wait_for_ibp_2_12 |
| 22905 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22906 | ibp_doit2_12: |
| 22907 | best_set_reg(0x0000004099c00792,%r19, %r20) |
| 22908 | stxa %r20, [%r18]0x42 |
| 22909 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 22910 | st %g0, [%r23] !clear lock |
| 22911 | wr %r0, %r12, %asi !restore %asi |
| 22912 | .word 0xc1bfdc00 ! 17: STDFA_R stda %f0, [%r0, %r31] |
| 22913 | ibp_2_13: |
| 22914 | nop |
| 22915 | ta T_CHANGE_HPRIV |
| 22916 | mov 8, %r18 |
| 22917 | rd %asi, %r12 |
| 22918 | wr %r0, 0x41, %asi |
| 22919 | set sync_thr_counter4, %r23 |
| 22920 | #ifndef SPC |
| 22921 | ldxa [%g0]0x63, %r8 |
| 22922 | and %r8, 0x38, %r8 ! Core ID |
| 22923 | add %r8, %r23, %r23 |
| 22924 | #else |
| 22925 | mov 0, %r8 |
| 22926 | #endif |
| 22927 | mov 0x2, %r16 |
| 22928 | ibp_startwait2_13: |
| 22929 | cas [%r23],%g0,%r16 !lock |
| 22930 | brz,a %r16, continue_ibp_2_13 |
| 22931 | mov (~0x2&0xf), %r16 |
| 22932 | ld [%r23], %r16 |
| 22933 | ibp_wait2_13: |
| 22934 | brnz %r16, ibp_wait2_13 |
| 22935 | ld [%r23], %r16 |
| 22936 | ba ibp_startwait2_13 |
| 22937 | mov 0x2, %r16 |
| 22938 | continue_ibp_2_13: |
| 22939 | sllx %r16, %r8, %r16 !Mask for my core only |
| 22940 | ldxa [0x58]%asi, %r17 !Running_status |
| 22941 | wait_for_stat_2_13: |
| 22942 | ldxa [0x50]%asi, %r13 !Running_rw |
| 22943 | cmp %r13, %r17 |
| 22944 | bne,a wait_for_stat_2_13 |
| 22945 | ldxa [0x58]%asi, %r17 !Running_status |
| 22946 | stxa %r16, [0x68]%asi !Park (W1C) |
| 22947 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22948 | wait_for_ibp_2_13: |
| 22949 | ldxa [0x58]%asi, %r17 !Running_status |
| 22950 | cmp %r14, %r17 |
| 22951 | bne,a wait_for_ibp_2_13 |
| 22952 | ldxa [0x50]%asi, %r14 !Running_rw |
| 22953 | ibp_doit2_13: |
| 22954 | best_set_reg(0x00000050edc792b1,%r19, %r20) |
| 22955 | stxa %r20, [%r18]0x42 |
| 22956 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 22957 | st %g0, [%r23] !clear lock |
| 22958 | wr %r0, %r12, %asi !restore %asi |
| 22959 | .word 0xe1bfd960 ! 18: STDFA_R stda %f16, [%r0, %r31] |
| 22960 | .word 0xd65fe128 ! 19: LDX_I ldx [%r31 + 0x0128], %r11 |
| 22961 | .word 0xd727e16c ! 20: STF_I st %f11, [0x016c, %r31] |
| 22962 | .word 0x81580000 ! 21: FLUSHW flushw |
| 22963 | #if (defined SPC || defined CMP) |
| 22964 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_14) + 32, 16, 16)) -> intp(6,0,27) |
| 22965 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_14)&0xffffffff) + 32, 16, 16)) -> intp(6,0,27) |
| 22966 | #else |
| 22967 | setx 0xec23930ccf54e058, %r1, %r28 |
| 22968 | stxa %r28, [%g0] 0x73 |
| 22969 | #endif |
| 22970 | intvec_2_14: |
| 22971 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 22972 | donret_2_15: |
| 22973 | nop |
| 22974 | ta T_CHANGE_HPRIV ! macro |
| 22975 | rd %pc, %r12 |
| 22976 | add %r12, (donretarg_2_15-donret_2_15-4), %r12 |
| 22977 | mov 0x38, %r18 |
| 22978 | stxa %r12, [%r18]0x58 |
| 22979 | add %r12, 0x4, %r11 |
| 22980 | wrpr %g0, 0x2, %tl |
| 22981 | wrpr %g0, %r12, %tpc |
| 22982 | wrpr %g0, %r11, %tnpc |
| 22983 | set (0x006a0aff | (0x4f << 24)), %r13 |
| 22984 | rdpr %tstate, %r16 |
| 22985 | mov 0x1f, %r19 |
| 22986 | and %r19, %r16, %r17 |
| 22987 | andn %r16, %r19, %r16 |
| 22988 | or %r16, %r17, %r20 |
| 22989 | wrpr %r20, %g0, %tstate |
| 22990 | wrhpr %g0, 0x1fcf, %htstate |
| 22991 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 22992 | done |
| 22993 | donretarg_2_15: |
| 22994 | .word 0xd6ffe044 ! 23: SWAPA_I swapa %r11, [%r31 + 0x0044] %asi |
| 22995 | set 0x22fd, %l3 |
| 22996 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 22997 | .word 0x93b247c3 ! 24: PDIST pdistn %d40, %d34, %d40 |
| 22998 | .word 0xe1bfde00 ! 25: STDFA_R stda %f16, [%r0, %r31] |
| 22999 | pmu_2_16: |
| 23000 | nop |
| 23001 | ta T_CHANGE_PRIV |
| 23002 | setx 0xfffffd0bfffff7e8, %g1, %g7 |
| 23003 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 23004 | vahole_2_17: |
| 23005 | nop |
| 23006 | ta T_CHANGE_NONHPRIV |
| 23007 | setx vahole_target1, %r18, %r27 |
| 23008 | jmpl %r27+0, %r27 |
| 23009 | .word 0xd09fc02c ! 27: LDDA_R ldda [%r31, %r12] 0x01, %r8 |
| 23010 | #if (defined SPC || defined CMP) |
| 23011 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_18)+40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23012 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_18)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23013 | #else |
| 23014 | !! TODO:Generate XIR via RESET_GEN register |
| 23015 | ! setx 0x8900000808, %r16, %r17 |
| 23016 | ! mov 0x2, %r16 |
| 23017 | ! stw %r16, [%r17] |
| 23018 | #endif |
| 23019 | xir_2_18: |
| 23020 | .word 0xa9823f67 ! 28: WR_SET_SOFTINT_I wr %r8, 0x1f67, %set_softint |
| 23021 | .word 0x9ba0016c ! 29: FABSq dis not found |
| 23022 | |
| 23023 | donret_2_20: |
| 23024 | nop |
| 23025 | ta T_CHANGE_HPRIV ! macro |
| 23026 | rd %pc, %r12 |
| 23027 | add %r12, (donretarg_2_20-donret_2_20-8), %r12 |
| 23028 | mov 0x38, %r18 |
| 23029 | stxa %r12, [%r18]0x58 |
| 23030 | add %r12, 0x4, %r11 |
| 23031 | wrpr %g0, 0x2, %tl |
| 23032 | wrpr %g0, %r12, %tpc |
| 23033 | wrpr %g0, %r11, %tnpc |
| 23034 | set (0x008cf890 | (0x83 << 24)), %r13 |
| 23035 | rdpr %tstate, %r16 |
| 23036 | mov 0x1f, %r19 |
| 23037 | and %r19, %r16, %r17 |
| 23038 | andn %r16, %r19, %r16 |
| 23039 | or %r16, %r17, %r20 |
| 23040 | wrpr %r20, %g0, %tstate |
| 23041 | wrhpr %g0, 0x175f, %htstate |
| 23042 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 23043 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> |
| 23044 | retry |
| 23045 | donretarg_2_20: |
| 23046 | .word 0xe2ffe0ad ! 30: SWAPA_I swapa %r17, [%r31 + 0x00ad] %asi |
| 23047 | splash_decr_2_21: |
| 23048 | nop |
| 23049 | ta T_CHANGE_HPRIV |
| 23050 | mov 8, %r1 |
| 23051 | stxa %r10, [%r1] 0x45 |
| 23052 | .word 0xa7844008 ! 31: WR_GRAPHICS_STATUS_REG_R wr %r17, %r8, %- |
| 23053 | #if (defined SPC || defined CMP) |
| 23054 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_22) + 8, 16, 16)) -> intp(7,0,20) |
| 23055 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_22)&0xffffffff) + 8, 16, 16)) -> intp(7,0,20) |
| 23056 | #else |
| 23057 | setx 0xcafc5c9a27396114, %r1, %r28 |
| 23058 | stxa %r28, [%g0] 0x73 |
| 23059 | #endif |
| 23060 | intvec_2_22: |
| 23061 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23062 | memptr_2_23: |
| 23063 | set 0x60340000, %r31 |
| 23064 | .word 0x85833eb7 ! 33: WRCCR_I wr %r12, 0x1eb7, %ccr |
| 23065 | unsupttte_2_24: |
| 23066 | nop |
| 23067 | ta T_CHANGE_HPRIV |
| 23068 | mov 1, %r20 |
| 23069 | sllx %r20, 63, %r20 |
| 23070 | or %r20, 2,%r20 |
| 23071 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 23072 | ta T_CHANGE_NONHPRIV |
| 23073 | .word 0xa9a409a1 ! 34: FDIVs fdivs %f16, %f1, %f20 |
| 23074 | brcommon3_2_25: |
| 23075 | nop |
| 23076 | setx common_target, %r12, %r27 |
| 23077 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 23078 | ba,a .+12 |
| 23079 | .word 0xd3e7c030 ! 1: CASA_I casa [%r31] 0x 1, %r16, %r9 |
| 23080 | ba,a .+8 |
| 23081 | jmpl %r27+0, %r27 |
| 23082 | .word 0xd29fe0b0 ! 35: LDDA_I ldda [%r31, + 0x00b0] %asi, %r9 |
| 23083 | jmptr_2_26: |
| 23084 | nop |
| 23085 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23086 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 23087 | splash_cmpr_2_27: |
| 23088 | mov 0, %r18 |
| 23089 | sllx %r18, 63, %r18 |
| 23090 | rd %tick, %r17 |
| 23091 | add %r17, 0x50, %r17 |
| 23092 | or %r17, %r18, %r17 |
| 23093 | ta T_CHANGE_PRIV |
| 23094 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 23095 | splash_cmpr_2_28: |
| 23096 | mov 1, %r18 |
| 23097 | sllx %r18, 63, %r18 |
| 23098 | rd %tick, %r17 |
| 23099 | add %r17, 0x60, %r17 |
| 23100 | or %r17, %r18, %r17 |
| 23101 | ta T_CHANGE_PRIV |
| 23102 | .word 0xaf800011 ! 38: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23103 | mondo_2_29: |
| 23104 | nop |
| 23105 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23106 | ta T_CHANGE_PRIV |
| 23107 | stxa %r17, [%r0+0x3c0] %asi |
| 23108 | .word 0x9d92800d ! 39: WRPR_WSTATE_R wrpr %r10, %r13, %wstate |
| 23109 | brcommon3_2_30: |
| 23110 | nop |
| 23111 | setx common_target, %r12, %r27 |
| 23112 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 23113 | ba,a .+12 |
| 23114 | .word 0xd26fe1e0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x01e0] |
| 23115 | ba,a .+8 |
| 23116 | jmpl %r27+0, %r27 |
| 23117 | .word 0xd2bfc032 ! 40: STDA_R stda %r9, [%r31 + %r18] 0x01 |
| 23118 | .word 0xd2dfe1f0 ! 41: LDXA_I ldxa [%r31, + 0x01f0] %asi, %r9 |
| 23119 | .word 0xd327e0a4 ! 42: STF_I st %f9, [0x00a4, %r31] |
| 23120 | setx 0x2e577144d7ab7956, %r1, %r28 |
| 23121 | stxa %r28, [%g0] 0x73 |
| 23122 | intvec_2_31: |
| 23123 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23124 | mondo_2_32: |
| 23125 | nop |
| 23126 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23127 | stxa %r17, [%r0+0x3e0] %asi |
| 23128 | .word 0x9d934005 ! 44: WRPR_WSTATE_R wrpr %r13, %r5, %wstate |
| 23129 | ceter_2_33: |
| 23130 | nop |
| 23131 | ta T_CHANGE_HPRIV |
| 23132 | mov 7, %r17 |
| 23133 | sllx %r17, 60, %r17 |
| 23134 | mov 0x18, %r16 |
| 23135 | stxa %r17, [%r16]0x4c |
| 23136 | ta T_CHANGE_NONHPRIV |
| 23137 | .word 0xa7410000 ! 45: RDTICK rd %tick, %r19 |
| 23138 | .word 0x91934013 ! 46: WRPR_PIL_R wrpr %r13, %r19, %pil |
| 23139 | splash_tba_2_35: |
| 23140 | ta T_CHANGE_PRIV |
| 23141 | setx 0x00000004003a0000, %r11, %r12 |
| 23142 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 23143 | mondo_2_36: |
| 23144 | nop |
| 23145 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23146 | ta T_CHANGE_PRIV |
| 23147 | stxa %r5, [%r0+0x3c0] %asi |
| 23148 | .word 0x9d940005 ! 48: WRPR_WSTATE_R wrpr %r16, %r5, %wstate |
| 23149 | .word 0xe2bfc031 ! 1: STDA_R stda %r17, [%r31 + %r17] 0x01 |
| 23150 | .word 0x9f80275d ! 49: SIR sir 0x075d |
| 23151 | br_longdelay2_2_37: |
| 23152 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23153 | .word 0x24cfc001 ! 50: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 23154 | splash_cmpr_2_38: |
| 23155 | mov 0, %r18 |
| 23156 | sllx %r18, 63, %r18 |
| 23157 | rd %tick, %r17 |
| 23158 | add %r17, 0x100, %r17 |
| 23159 | or %r17, %r18, %r17 |
| 23160 | ta T_CHANGE_PRIV |
| 23161 | .word 0xaf800011 ! 51: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23162 | nop |
| 23163 | ta T_CHANGE_HPRIV |
| 23164 | mov 0x2, %r10 |
| 23165 | set sync_thr_counter6, %r23 |
| 23166 | #ifndef SPC |
| 23167 | ldxa [%g0]0x63, %o1 |
| 23168 | and %o1, 0x38, %o1 |
| 23169 | add %o1, %r23, %r23 |
| 23170 | #endif |
| 23171 | cas [%r23],%g0,%r10 !lock |
| 23172 | brnz %r10, sma_2_39 |
| 23173 | rd %asi, %r12 |
| 23174 | wr %g0, 0x40, %asi |
| 23175 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23176 | set 0x001a1fff, %g1 |
| 23177 | stxa %g1, [%g0 + 0x80] %asi |
| 23178 | wr %r12, %g0, %asi |
| 23179 | st %g0, [%r23] |
| 23180 | sma_2_39: |
| 23181 | ta T_CHANGE_NONHPRIV |
| 23182 | .word 0xe3e7e010 ! 52: CASA_R casa [%r31] %asi, %r16, %r17 |
| 23183 | #if (defined SPC || defined CMP) |
| 23184 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_40)+40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23185 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_40)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23186 | #else |
| 23187 | !! TODO:Generate XIR via RESET_GEN register |
| 23188 | ! setx 0x8900000808, %r16, %r17 |
| 23189 | ! mov 0x2, %r16 |
| 23190 | ! stw %r16, [%r17] |
| 23191 | #endif |
| 23192 | xir_2_40: |
| 23193 | .word 0xa984bae1 ! 53: WR_SET_SOFTINT_I wr %r18, 0x1ae1, %set_softint |
| 23194 | jmptr_2_41: |
| 23195 | nop |
| 23196 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23197 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 23198 | donret_2_42: |
| 23199 | nop |
| 23200 | ta T_CHANGE_HPRIV ! macro |
| 23201 | rd %pc, %r12 |
| 23202 | add %r12, (donretarg_2_42-donret_2_42-8), %r12 |
| 23203 | mov 0x38, %r18 |
| 23204 | stxa %r12, [%r18]0x58 |
| 23205 | add %r12, 0x4, %r11 |
| 23206 | wrpr %g0, 0x1, %tl |
| 23207 | wrpr %g0, %r12, %tpc |
| 23208 | wrpr %g0, %r11, %tnpc |
| 23209 | set (0x00181ce7 | (16 << 24)), %r13 |
| 23210 | rdpr %tstate, %r16 |
| 23211 | mov 0x1f, %r19 |
| 23212 | and %r19, %r16, %r17 |
| 23213 | andn %r16, %r19, %r16 |
| 23214 | or %r16, %r17, %r20 |
| 23215 | wrpr %r20, %g0, %tstate |
| 23216 | wrhpr %g0, 0x1c87, %htstate |
| 23217 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23218 | retry |
| 23219 | donretarg_2_42: |
| 23220 | .word 0xe26fe0aa ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x00aa] |
| 23221 | nop |
| 23222 | ta T_CHANGE_HPRIV |
| 23223 | mov 0x2+1, %r10 |
| 23224 | set sync_thr_counter5, %r23 |
| 23225 | #ifndef SPC |
| 23226 | ldxa [%g0]0x63, %o1 |
| 23227 | and %o1, 0x38, %o1 |
| 23228 | add %o1, %r23, %r23 |
| 23229 | sllx %o1, 5, %o3 !(CID*256) |
| 23230 | #endif |
| 23231 | cas [%r23],%g0,%r10 !lock |
| 23232 | brnz %r10, cwq_2_43 |
| 23233 | rd %asi, %r12 |
| 23234 | wr %g0, 0x40, %asi |
| 23235 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 23236 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 23237 | cmp %l1, 1 |
| 23238 | bne cwq_2_43 |
| 23239 | set CWQ_BASE, %l6 |
| 23240 | #ifndef SPC |
| 23241 | add %l6, %o3, %l6 |
| 23242 | #endif |
| 23243 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 23244 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 23245 | sllx %l2, 32, %l2 |
| 23246 | stx %l2, [%l6 + 0x0] |
| 23247 | membar #Sync |
| 23248 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 23249 | sub %l2, 0x40, %l2 |
| 23250 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 23251 | wr %r12, %g0, %asi |
| 23252 | st %g0, [%r23] |
| 23253 | cwq_2_43: |
| 23254 | ta T_CHANGE_NONHPRIV |
| 23255 | .word 0x93414000 ! 56: RDPC rd %pc, %r9 |
| 23256 | splash_hpstate_2_44: |
| 23257 | .word 0x81983bcf ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x1bcf, %hpstate |
| 23258 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 23259 | .word 0x8d903e39 ! 58: WRPR_PSTATE_I wrpr %r0, 0x1e39, %pstate |
| 23260 | mondo_2_46: |
| 23261 | nop |
| 23262 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23263 | ta T_CHANGE_PRIV |
| 23264 | stxa %r11, [%r0+0x3e0] %asi |
| 23265 | .word 0x9d94c006 ! 59: WRPR_WSTATE_R wrpr %r19, %r6, %wstate |
| 23266 | mondo_2_47: |
| 23267 | nop |
| 23268 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23269 | ta T_CHANGE_PRIV |
| 23270 | stxa %r16, [%r0+0x3c8] %asi |
| 23271 | .word 0x9d934010 ! 60: WRPR_WSTATE_R wrpr %r13, %r16, %wstate |
| 23272 | splash_hpstate_2_48: |
| 23273 | ta T_CHANGE_NONHPRIV |
| 23274 | .word 0x81982c0f ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x0c0f, %hpstate |
| 23275 | .word 0xd31fe0b0 ! 62: LDDF_I ldd [%r31, 0x00b0], %f9 |
| 23276 | vahole_2_49: |
| 23277 | nop |
| 23278 | ta T_CHANGE_NONHPRIV |
| 23279 | setx vahole_target2, %r18, %r27 |
| 23280 | jmpl %r27+0, %r27 |
| 23281 | .word 0xc1bfd960 ! 63: STDFA_R stda %f0, [%r0, %r31] |
| 23282 | brcommon1_2_50: |
| 23283 | nop |
| 23284 | setx common_target, %r12, %r27 |
| 23285 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 23286 | ba,a .+12 |
| 23287 | .word 0xd3e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r9 |
| 23288 | ba,a .+8 |
| 23289 | jmpl %r27+0, %r27 |
| 23290 | .word 0x9f802d7b ! 64: SIR sir 0x0d7b |
| 23291 | splash_hpstate_2_51: |
| 23292 | ta T_CHANGE_NONHPRIV |
| 23293 | .word 0x81982d8e ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0d8e, %hpstate |
| 23294 | .word 0x8d903382 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1382, %pstate |
| 23295 | .word 0xe1bfe1e0 ! 67: STDFA_I stda %f16, [0x01e0, %r31] |
| 23296 | br_badelay1_2_54: |
| 23297 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 23298 | .word 0xd337e190 ! 1: STQF_I - %f9, [0x0190, %r31] |
| 23299 | .word 0xd3e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r9 |
| 23300 | normalw |
| 23301 | .word 0xa7458000 ! 68: RD_SOFTINT_REG rd %softint, %r19 |
| 23302 | .word 0xd82fe0d1 ! 69: STB_I stb %r12, [%r31 + 0x00d1] |
| 23303 | donret_2_55: |
| 23304 | nop |
| 23305 | ta T_CHANGE_HPRIV ! macro |
| 23306 | rd %pc, %r12 |
| 23307 | add %r12, (donretarg_2_55-donret_2_55-4), %r12 |
| 23308 | mov 0x38, %r18 |
| 23309 | stxa %r12, [%r18]0x58 |
| 23310 | add %r12, 0x4, %r11 |
| 23311 | wrpr %g0, 0x1, %tl |
| 23312 | wrpr %g0, %r12, %tpc |
| 23313 | wrpr %g0, %r11, %tnpc |
| 23314 | set (0x00e6f20e | (0x55 << 24)), %r13 |
| 23315 | rdpr %tstate, %r16 |
| 23316 | mov 0x1f, %r19 |
| 23317 | and %r19, %r16, %r17 |
| 23318 | andn %r16, %r19, %r16 |
| 23319 | or %r16, %r17, %r20 |
| 23320 | wrpr %r20, %g0, %tstate |
| 23321 | wrhpr %g0, 0x795, %htstate |
| 23322 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23323 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 23324 | done |
| 23325 | donretarg_2_55: |
| 23326 | .word 0x9ba449c7 ! 70: FDIVd fdivd %f48, %f38, %f44 |
| 23327 | nop |
| 23328 | ta T_CHANGE_HPRIV |
| 23329 | mov 0x2, %r10 |
| 23330 | set sync_thr_counter6, %r23 |
| 23331 | #ifndef SPC |
| 23332 | ldxa [%g0]0x63, %o1 |
| 23333 | and %o1, 0x38, %o1 |
| 23334 | add %o1, %r23, %r23 |
| 23335 | #endif |
| 23336 | cas [%r23],%g0,%r10 !lock |
| 23337 | brnz %r10, sma_2_56 |
| 23338 | rd %asi, %r12 |
| 23339 | wr %g0, 0x40, %asi |
| 23340 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23341 | set 0x00121fff, %g1 |
| 23342 | stxa %g1, [%g0 + 0x80] %asi |
| 23343 | wr %r12, %g0, %asi |
| 23344 | st %g0, [%r23] |
| 23345 | sma_2_56: |
| 23346 | ta T_CHANGE_NONHPRIV |
| 23347 | .word 0xe7e7e00c ! 71: CASA_R casa [%r31] %asi, %r12, %r19 |
| 23348 | .word 0xc19fe020 ! 72: LDDFA_I ldda [%r31, 0x0020], %f0 |
| 23349 | mondo_2_57: |
| 23350 | nop |
| 23351 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23352 | stxa %r4, [%r0+0x3e0] %asi |
| 23353 | .word 0x9d948014 ! 73: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 23354 | nop |
| 23355 | mov 0x80, %g3 |
| 23356 | stxa %g3, [%g3] 0x5f |
| 23357 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 23358 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 23359 | nop |
| 23360 | ta T_CHANGE_HPRIV |
| 23361 | mov 0x2, %r10 |
| 23362 | set sync_thr_counter6, %r23 |
| 23363 | #ifndef SPC |
| 23364 | ldxa [%g0]0x63, %o1 |
| 23365 | and %o1, 0x38, %o1 |
| 23366 | add %o1, %r23, %r23 |
| 23367 | #endif |
| 23368 | cas [%r23],%g0,%r10 !lock |
| 23369 | brnz %r10, sma_2_58 |
| 23370 | rd %asi, %r12 |
| 23371 | wr %g0, 0x40, %asi |
| 23372 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23373 | set 0x00061fff, %g1 |
| 23374 | stxa %g1, [%g0 + 0x80] %asi |
| 23375 | wr %r12, %g0, %asi |
| 23376 | st %g0, [%r23] |
| 23377 | sma_2_58: |
| 23378 | ta T_CHANGE_NONHPRIV |
| 23379 | .word 0xe7e7e010 ! 76: CASA_R casa [%r31] %asi, %r16, %r19 |
| 23380 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 23381 | nop |
| 23382 | mov 0x80, %g3 |
| 23383 | stxa %g3, [%g3] 0x57 |
| 23384 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 23385 | .word 0x9353c000 ! 79: RDPR_FQ <illegal instruction> |
| 23386 | donret_2_59: |
| 23387 | nop |
| 23388 | ta T_CHANGE_HPRIV ! macro |
| 23389 | rd %pc, %r12 |
| 23390 | add %r12, (donretarg_2_59-donret_2_59-4), %r12 |
| 23391 | mov 0x38, %r18 |
| 23392 | stxa %r12, [%r18]0x58 |
| 23393 | add %r12, 0x4, %r11 |
| 23394 | wrpr %g0, 0x1, %tl |
| 23395 | wrpr %g0, %r12, %tpc |
| 23396 | wrpr %g0, %r11, %tnpc |
| 23397 | set (0x00f8523f | (22 << 24)), %r13 |
| 23398 | rdpr %tstate, %r16 |
| 23399 | mov 0x1f, %r19 |
| 23400 | and %r19, %r16, %r17 |
| 23401 | andn %r16, %r19, %r16 |
| 23402 | or %r16, %r17, %r20 |
| 23403 | wrpr %r20, %g0, %tstate |
| 23404 | wrhpr %g0, 0x4c5, %htstate |
| 23405 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23406 | done |
| 23407 | donretarg_2_59: |
| 23408 | .word 0xa7a1c9ca ! 80: FDIVd fdivd %f38, %f10, %f50 |
| 23409 | .word 0xda8fe0c0 ! 81: LDUBA_I lduba [%r31, + 0x00c0] %asi, %r13 |
| 23410 | .word 0xe19fde00 ! 82: LDDFA_R ldda [%r31, %r0], %f16 |
| 23411 | change_to_randtl_2_60: |
| 23412 | ta T_CHANGE_PRIV ! macro |
| 23413 | done_change_to_randtl_2_60: |
| 23414 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23415 | splash_cmpr_2_61: |
| 23416 | mov 0, %r18 |
| 23417 | sllx %r18, 63, %r18 |
| 23418 | rd %tick, %r17 |
| 23419 | add %r17, 0x60, %r17 |
| 23420 | or %r17, %r18, %r17 |
| 23421 | ta T_CHANGE_PRIV |
| 23422 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 23423 | jmptr_2_62: |
| 23424 | nop |
| 23425 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23426 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 23427 | mondo_2_63: |
| 23428 | nop |
| 23429 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23430 | ta T_CHANGE_PRIV |
| 23431 | stxa %r16, [%r0+0x3d8] %asi |
| 23432 | .word 0x9d94c013 ! 86: WRPR_WSTATE_R wrpr %r19, %r19, %wstate |
| 23433 | #if (defined SPC || defined CMP) |
| 23434 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_64)+8, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23435 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_64)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23436 | #else |
| 23437 | !! TODO:Generate XIR via RESET_GEN register |
| 23438 | ! setx 0x8900000808, %r16, %r17 |
| 23439 | ! mov 0x2, %r16 |
| 23440 | ! stw %r16, [%r17] |
| 23441 | #endif |
| 23442 | xir_2_64: |
| 23443 | .word 0xa982e608 ! 87: WR_SET_SOFTINT_I wr %r11, 0x0608, %set_softint |
| 23444 | .word 0xdb37e19a ! 88: STQF_I - %f13, [0x019a, %r31] |
| 23445 | mondo_2_65: |
| 23446 | nop |
| 23447 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23448 | ta T_CHANGE_PRIV |
| 23449 | stxa %r19, [%r0+0x3c0] %asi |
| 23450 | .word 0x9d90c011 ! 89: WRPR_WSTATE_R wrpr %r3, %r17, %wstate |
| 23451 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 23452 | memptr_2_66: |
| 23453 | set user_data_start, %r31 |
| 23454 | .word 0x8582ab08 ! 91: WRCCR_I wr %r10, 0x0b08, %ccr |
| 23455 | jmptr_2_67: |
| 23456 | nop |
| 23457 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23458 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 23459 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23460 | reduce_priv_lvl_2_68: |
| 23461 | ta T_CHANGE_NONPRIV ! macro |
| 23462 | otherw |
| 23463 | mov 0xb1, %r30 |
| 23464 | .word 0x91d0001e ! 94: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 23465 | vahole_2_69: |
| 23466 | nop |
| 23467 | ta T_CHANGE_NONHPRIV |
| 23468 | setx vahole_target0, %r18, %r27 |
| 23469 | jmpl %r27+0, %r27 |
| 23470 | .word 0xda3fe0a0 ! 95: STD_I std %r13, [%r31 + 0x00a0] |
| 23471 | pmu_2_70: |
| 23472 | nop |
| 23473 | setx 0xfffff5c4fffff0b1, %g1, %g7 |
| 23474 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 23475 | jmptr_2_71: |
| 23476 | nop |
| 23477 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23478 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 23479 | splash_cmpr_2_72: |
| 23480 | mov 0, %r18 |
| 23481 | sllx %r18, 63, %r18 |
| 23482 | rd %tick, %r17 |
| 23483 | add %r17, 0x100, %r17 |
| 23484 | or %r17, %r18, %r17 |
| 23485 | ta T_CHANGE_HPRIV |
| 23486 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 23487 | ta T_CHANGE_PRIV |
| 23488 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23489 | splash_hpstate_2_73: |
| 23490 | .word 0x81982617 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x0617, %hpstate |
| 23491 | donret_2_74: |
| 23492 | nop |
| 23493 | ta T_CHANGE_HPRIV ! macro |
| 23494 | rd %pc, %r12 |
| 23495 | add %r12, (donretarg_2_74-donret_2_74-8), %r12 |
| 23496 | mov 0x38, %r18 |
| 23497 | stxa %r12, [%r18]0x58 |
| 23498 | add %r12, 0x4, %r11 |
| 23499 | wrpr %g0, 0x2, %tl |
| 23500 | wrpr %g0, %r12, %tpc |
| 23501 | wrpr %g0, %r11, %tnpc |
| 23502 | set (0x003b03cb | (0x83 << 24)), %r13 |
| 23503 | rdpr %tstate, %r16 |
| 23504 | mov 0x1f, %r19 |
| 23505 | and %r19, %r16, %r17 |
| 23506 | andn %r16, %r19, %r16 |
| 23507 | or %r16, %r17, %r20 |
| 23508 | wrpr %r20, %g0, %tstate |
| 23509 | wrhpr %g0, 0x179e, %htstate |
| 23510 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23511 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 23512 | retry |
| 23513 | donretarg_2_74: |
| 23514 | .word 0xda6fe004 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x0004] |
| 23515 | change_to_randtl_2_75: |
| 23516 | ta T_CHANGE_HPRIV ! macro |
| 23517 | done_change_to_randtl_2_75: |
| 23518 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23519 | unsupttte_2_76: |
| 23520 | nop |
| 23521 | ta T_CHANGE_HPRIV |
| 23522 | mov 1, %r20 |
| 23523 | sllx %r20, 63, %r20 |
| 23524 | or %r20, 2,%r20 |
| 23525 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 23526 | ta T_CHANGE_NONHPRIV |
| 23527 | .word 0xc3e88032 ! 102: PREFETCHA_R prefetcha [%r2, %r18] 0x01, #one_read |
| 23528 | .word 0x8d9033c4 ! 103: WRPR_PSTATE_I wrpr %r0, 0x13c4, %pstate |
| 23529 | intveclr_2_78: |
| 23530 | nop |
| 23531 | ta T_CHANGE_HPRIV |
| 23532 | setx 0xc25d5cdc401e5bfe, %r1, %r28 |
| 23533 | stxa %r28, [%g0] 0x72 |
| 23534 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 23535 | donret_2_79: |
| 23536 | nop |
| 23537 | ta T_CHANGE_HPRIV ! macro |
| 23538 | rd %pc, %r12 |
| 23539 | add %r12, (donretarg_2_79-donret_2_79-4), %r12 |
| 23540 | mov 0x38, %r18 |
| 23541 | stxa %r12, [%r18]0x58 |
| 23542 | add %r12, 0x4, %r11 |
| 23543 | wrpr %g0, 0x1, %tl |
| 23544 | wrpr %g0, %r12, %tpc |
| 23545 | wrpr %g0, %r11, %tnpc |
| 23546 | set (0x0028ac84 | (20 << 24)), %r13 |
| 23547 | rdpr %tstate, %r16 |
| 23548 | mov 0x1f, %r19 |
| 23549 | and %r19, %r16, %r17 |
| 23550 | andn %r16, %r19, %r16 |
| 23551 | or %r16, %r17, %r20 |
| 23552 | wrpr %r20, %g0, %tstate |
| 23553 | wrhpr %g0, 0x49d, %htstate |
| 23554 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23555 | done |
| 23556 | donretarg_2_79: |
| 23557 | .word 0xa3a509d2 ! 105: FDIVd fdivd %f20, %f18, %f48 |
| 23558 | .word 0xe4d7e088 ! 106: LDSHA_I ldsha [%r31, + 0x0088] %asi, %r18 |
| 23559 | tagged_2_80: |
| 23560 | tsubcctv %r20, 0x1287, %r6 |
| 23561 | .word 0xe407e0f4 ! 107: LDUW_I lduw [%r31 + 0x00f4], %r18 |
| 23562 | nop |
| 23563 | ta T_CHANGE_HPRIV |
| 23564 | mov 0x2+1, %r10 |
| 23565 | set sync_thr_counter5, %r23 |
| 23566 | #ifndef SPC |
| 23567 | ldxa [%g0]0x63, %o1 |
| 23568 | and %o1, 0x38, %o1 |
| 23569 | add %o1, %r23, %r23 |
| 23570 | sllx %o1, 5, %o3 !(CID*256) |
| 23571 | #endif |
| 23572 | cas [%r23],%g0,%r10 !lock |
| 23573 | brnz %r10, cwq_2_81 |
| 23574 | rd %asi, %r12 |
| 23575 | wr %g0, 0x40, %asi |
| 23576 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 23577 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 23578 | cmp %l1, 1 |
| 23579 | bne cwq_2_81 |
| 23580 | set CWQ_BASE, %l6 |
| 23581 | #ifndef SPC |
| 23582 | add %l6, %o3, %l6 |
| 23583 | #endif |
| 23584 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 23585 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 23586 | sllx %l2, 32, %l2 |
| 23587 | stx %l2, [%l6 + 0x0] |
| 23588 | membar #Sync |
| 23589 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 23590 | sub %l2, 0x40, %l2 |
| 23591 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 23592 | wr %r12, %g0, %asi |
| 23593 | st %g0, [%r23] |
| 23594 | cwq_2_81: |
| 23595 | ta T_CHANGE_NONHPRIV |
| 23596 | .word 0xa1414000 ! 108: RDPC rd %pc, %r16 |
| 23597 | splash_lsu_2_82: |
| 23598 | nop |
| 23599 | ta T_CHANGE_HPRIV |
| 23600 | set 0x64c4ce21, %r2 |
| 23601 | mov 0x6, %r1 |
| 23602 | sllx %r1, 32, %r1 |
| 23603 | or %r1, %r2, %r2 |
| 23604 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 23605 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 23606 | splash_cmpr_2_83: |
| 23607 | mov 0, %r18 |
| 23608 | sllx %r18, 63, %r18 |
| 23609 | rd %tick, %r17 |
| 23610 | add %r17, 0x80, %r17 |
| 23611 | or %r17, %r18, %r17 |
| 23612 | ta T_CHANGE_PRIV |
| 23613 | .word 0xb3800011 ! 110: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 23614 | splash_htba_2_84: |
| 23615 | nop |
| 23616 | ta T_CHANGE_HPRIV |
| 23617 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 23618 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 23619 | mondo_2_85: |
| 23620 | nop |
| 23621 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23622 | stxa %r17, [%r0+0x3d8] %asi |
| 23623 | .word 0x9d950014 ! 112: WRPR_WSTATE_R wrpr %r20, %r20, %wstate |
| 23624 | .word 0xc1bfc3e0 ! 113: STDFA_R stda %f0, [%r0, %r31] |
| 23625 | .word 0xe19fc2c0 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 23626 | splash_cmpr_2_86: |
| 23627 | mov 0, %r18 |
| 23628 | sllx %r18, 63, %r18 |
| 23629 | rd %tick, %r17 |
| 23630 | add %r17, 0x100, %r17 |
| 23631 | or %r17, %r18, %r17 |
| 23632 | ta T_CHANGE_PRIV |
| 23633 | .word 0xaf800011 ! 115: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23634 | #if (defined SPC || defined CMP) |
| 23635 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_87)+16, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23636 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_87)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23637 | #else |
| 23638 | !! TODO:Generate XIR via RESET_GEN register |
| 23639 | ! setx 0x8900000808, %r16, %r17 |
| 23640 | ! mov 0x2, %r16 |
| 23641 | ! stw %r16, [%r17] |
| 23642 | #endif |
| 23643 | xir_2_87: |
| 23644 | .word 0xa9846f2a ! 116: WR_SET_SOFTINT_I wr %r17, 0x0f2a, %set_softint |
| 23645 | brcommon3_2_88: |
| 23646 | nop |
| 23647 | setx common_target, %r12, %r27 |
| 23648 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 23649 | ba,a .+12 |
| 23650 | .word 0xd137c00c ! 1: STQF_R - %f8, [%r12, %r31] |
| 23651 | ba,a .+8 |
| 23652 | jmpl %r27+0, %r27 |
| 23653 | .word 0xd13fc014 ! 117: STDF_R std %f8, [%r20, %r31] |
| 23654 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 23655 | .word 0x8d903a13 ! 118: WRPR_PSTATE_I wrpr %r0, 0x1a13, %pstate |
| 23656 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23657 | reduce_priv_lvl_2_90: |
| 23658 | ta T_CHANGE_NONPRIV ! macro |
| 23659 | #if (defined SPC || defined CMP) |
| 23660 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_91)+32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23661 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_91)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23662 | #else |
| 23663 | !! TODO:Generate XIR via RESET_GEN register |
| 23664 | ! setx 0x8900000808, %r16, %r17 |
| 23665 | ! mov 0x2, %r16 |
| 23666 | ! stw %r16, [%r17] |
| 23667 | #endif |
| 23668 | xir_2_91: |
| 23669 | .word 0xa981aefa ! 120: WR_SET_SOFTINT_I wr %r6, 0x0efa, %set_softint |
| 23670 | splash_cmpr_2_92: |
| 23671 | mov 0, %r18 |
| 23672 | sllx %r18, 63, %r18 |
| 23673 | rd %tick, %r17 |
| 23674 | add %r17, 0x60, %r17 |
| 23675 | or %r17, %r18, %r17 |
| 23676 | .word 0xb3800011 ! 121: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 23677 | .word 0x95a00162 ! 122: FABSq dis not found |
| 23678 | |
| 23679 | ta T_CHANGE_NONHPRIV |
| 23680 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 23681 | splash_cmpr_2_95: |
| 23682 | mov 1, %r18 |
| 23683 | sllx %r18, 63, %r18 |
| 23684 | rd %tick, %r17 |
| 23685 | add %r17, 0x60, %r17 |
| 23686 | or %r17, %r18, %r17 |
| 23687 | ta T_CHANGE_HPRIV |
| 23688 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 23689 | ta T_CHANGE_PRIV |
| 23690 | .word 0xaf800011 ! 124: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23691 | .word 0xc1bfd920 ! 125: STDFA_R stda %f0, [%r0, %r31] |
| 23692 | jmptr_2_96: |
| 23693 | nop |
| 23694 | best_set_reg(0xe1a00000, %r20, %r27) |
| 23695 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 23696 | setx 0xe585bd987e17a571, %r1, %r28 |
| 23697 | stxa %r28, [%g0] 0x73 |
| 23698 | intvec_2_97: |
| 23699 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23700 | pmu_2_98: |
| 23701 | nop |
| 23702 | ta T_CHANGE_PRIV |
| 23703 | setx 0xfffffeacfffff25b, %g1, %g7 |
| 23704 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 23705 | donret_2_99: |
| 23706 | nop |
| 23707 | ta T_CHANGE_HPRIV ! macro |
| 23708 | rd %pc, %r12 |
| 23709 | add %r12, (donretarg_2_99-donret_2_99-4), %r12 |
| 23710 | mov 0x38, %r18 |
| 23711 | stxa %r12, [%r18]0x58 |
| 23712 | add %r12, 0x4, %r11 |
| 23713 | wrpr %g0, 0x1, %tl |
| 23714 | wrpr %g0, %r12, %tpc |
| 23715 | wrpr %g0, %r11, %tnpc |
| 23716 | set (0x008d709e | (0x55 << 24)), %r13 |
| 23717 | rdpr %tstate, %r16 |
| 23718 | mov 0x1f, %r19 |
| 23719 | and %r19, %r16, %r17 |
| 23720 | andn %r16, %r19, %r16 |
| 23721 | or %r16, %r17, %r20 |
| 23722 | wrpr %r20, %g0, %tstate |
| 23723 | wrhpr %g0, 0x1dc, %htstate |
| 23724 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 23725 | done |
| 23726 | donretarg_2_99: |
| 23727 | .word 0x93a209d4 ! 129: FDIVd fdivd %f8, %f20, %f40 |
| 23728 | pmu_2_100: |
| 23729 | nop |
| 23730 | setx 0xfffffc0dfffff9b9, %g1, %g7 |
| 23731 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 23732 | mondo_2_101: |
| 23733 | nop |
| 23734 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23735 | ta T_CHANGE_PRIV |
| 23736 | stxa %r18, [%r0+0x3e8] %asi |
| 23737 | .word 0x9d94c012 ! 131: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 23738 | nop |
| 23739 | ta T_CHANGE_HPRIV |
| 23740 | mov 0x2, %r10 |
| 23741 | set sync_thr_counter6, %r23 |
| 23742 | #ifndef SPC |
| 23743 | ldxa [%g0]0x63, %o1 |
| 23744 | and %o1, 0x38, %o1 |
| 23745 | add %o1, %r23, %r23 |
| 23746 | #endif |
| 23747 | cas [%r23],%g0,%r10 !lock |
| 23748 | brnz %r10, sma_2_102 |
| 23749 | rd %asi, %r12 |
| 23750 | wr %g0, 0x40, %asi |
| 23751 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23752 | set 0x001e1fff, %g1 |
| 23753 | stxa %g1, [%g0 + 0x80] %asi |
| 23754 | wr %r12, %g0, %asi |
| 23755 | st %g0, [%r23] |
| 23756 | sma_2_102: |
| 23757 | ta T_CHANGE_NONHPRIV |
| 23758 | .word 0xd9e7e013 ! 132: CASA_R casa [%r31] %asi, %r19, %r12 |
| 23759 | .word 0xc1bfd960 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 23760 | splash_tba_2_103: |
| 23761 | ta T_CHANGE_PRIV |
| 23762 | setx 0x00000004003a0000, %r11, %r12 |
| 23763 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 23764 | splash_lsu_2_104: |
| 23765 | nop |
| 23766 | ta T_CHANGE_HPRIV |
| 23767 | set 0x4d035109, %r2 |
| 23768 | mov 0x3, %r1 |
| 23769 | sllx %r1, 32, %r1 |
| 23770 | or %r1, %r2, %r2 |
| 23771 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 23772 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 23773 | setx 0xcf1531b4076dbd56, %r1, %r28 |
| 23774 | stxa %r28, [%g0] 0x73 |
| 23775 | intvec_2_105: |
| 23776 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23777 | change_to_randtl_2_106: |
| 23778 | ta T_CHANGE_PRIV ! macro |
| 23779 | done_change_to_randtl_2_106: |
| 23780 | .word 0x8f902000 ! 137: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23781 | nop |
| 23782 | ta T_CHANGE_HPRIV |
| 23783 | mov 0x2+1, %r10 |
| 23784 | set sync_thr_counter5, %r23 |
| 23785 | #ifndef SPC |
| 23786 | ldxa [%g0]0x63, %o1 |
| 23787 | and %o1, 0x38, %o1 |
| 23788 | add %o1, %r23, %r23 |
| 23789 | sllx %o1, 5, %o3 !(CID*256) |
| 23790 | #endif |
| 23791 | cas [%r23],%g0,%r10 !lock |
| 23792 | brnz %r10, cwq_2_107 |
| 23793 | rd %asi, %r12 |
| 23794 | wr %g0, 0x40, %asi |
| 23795 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 23796 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 23797 | cmp %l1, 1 |
| 23798 | bne cwq_2_107 |
| 23799 | set CWQ_BASE, %l6 |
| 23800 | #ifndef SPC |
| 23801 | add %l6, %o3, %l6 |
| 23802 | #endif |
| 23803 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 23804 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 23805 | sllx %l2, 32, %l2 |
| 23806 | stx %l2, [%l6 + 0x0] |
| 23807 | membar #Sync |
| 23808 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 23809 | sub %l2, 0x40, %l2 |
| 23810 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 23811 | wr %r12, %g0, %asi |
| 23812 | st %g0, [%r23] |
| 23813 | cwq_2_107: |
| 23814 | ta T_CHANGE_NONHPRIV |
| 23815 | .word 0xa1414000 ! 138: RDPC rd %pc, %r16 |
| 23816 | #if (defined SPC || defined CMP) |
| 23817 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_108)+32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23818 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_108)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 23819 | #else |
| 23820 | !! TODO:Generate XIR via RESET_GEN register |
| 23821 | ! setx 0x8900000808, %r16, %r17 |
| 23822 | ! mov 0x2, %r16 |
| 23823 | ! stw %r16, [%r17] |
| 23824 | #endif |
| 23825 | xir_2_108: |
| 23826 | .word 0xa9842f8b ! 139: WR_SET_SOFTINT_I wr %r16, 0x0f8b, %set_softint |
| 23827 | br_badelay1_2_109: |
| 23828 | .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 23829 | .word 0xe9327413 ! 1: STQF_I - %f20, [0x1413, %r9] |
| 23830 | .word 0x9bb7c4cc ! 1: FCMPNE32 fcmpne32 %d62, %d12, %r13 |
| 23831 | normalw |
| 23832 | .word 0xa3458000 ! 140: RD_SOFTINT_REG rd %softint, %r17 |
| 23833 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 23834 | reduce_priv_lvl_2_110: |
| 23835 | ta T_CHANGE_NONHPRIV ! macro |
| 23836 | vahole_2_111: |
| 23837 | nop |
| 23838 | ta T_CHANGE_NONHPRIV |
| 23839 | setx vahole_target1, %r18, %r27 |
| 23840 | jmpl %r27+0, %r27 |
| 23841 | .word 0xa5b24494 ! 142: FCMPLE32 fcmple32 %d40, %d20, %r18 |
| 23842 | nop |
| 23843 | ta T_CHANGE_HPRIV |
| 23844 | mov 0x2+1, %r10 |
| 23845 | set sync_thr_counter5, %r23 |
| 23846 | #ifndef SPC |
| 23847 | ldxa [%g0]0x63, %o1 |
| 23848 | and %o1, 0x38, %o1 |
| 23849 | add %o1, %r23, %r23 |
| 23850 | sllx %o1, 5, %o3 !(CID*256) |
| 23851 | #endif |
| 23852 | cas [%r23],%g0,%r10 !lock |
| 23853 | brnz %r10, cwq_2_112 |
| 23854 | rd %asi, %r12 |
| 23855 | wr %g0, 0x40, %asi |
| 23856 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 23857 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 23858 | cmp %l1, 1 |
| 23859 | bne cwq_2_112 |
| 23860 | set CWQ_BASE, %l6 |
| 23861 | #ifndef SPC |
| 23862 | add %l6, %o3, %l6 |
| 23863 | #endif |
| 23864 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 23865 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 23866 | sllx %l2, 32, %l2 |
| 23867 | stx %l2, [%l6 + 0x0] |
| 23868 | membar #Sync |
| 23869 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 23870 | sub %l2, 0x40, %l2 |
| 23871 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 23872 | wr %r12, %g0, %asi |
| 23873 | st %g0, [%r23] |
| 23874 | cwq_2_112: |
| 23875 | ta T_CHANGE_NONHPRIV |
| 23876 | .word 0xa3414000 ! 143: RDPC rd %pc, %r17 |
| 23877 | .word 0xd91fe1c8 ! 144: LDDF_I ldd [%r31, 0x01c8], %f12 |
| 23878 | setx 0x0cb6df9e4288d1a5, %r1, %r28 |
| 23879 | stxa %r28, [%g0] 0x73 |
| 23880 | intvec_2_113: |
| 23881 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23882 | .word 0xa6d44011 ! 146: UMULcc_R umulcc %r17, %r17, %r19 |
| 23883 | splash_cmpr_2_114: |
| 23884 | mov 0, %r18 |
| 23885 | sllx %r18, 63, %r18 |
| 23886 | rd %tick, %r17 |
| 23887 | add %r17, 0x50, %r17 |
| 23888 | or %r17, %r18, %r17 |
| 23889 | ta T_CHANGE_HPRIV |
| 23890 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 23891 | .word 0xaf800011 ! 147: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 23892 | mondo_2_115: |
| 23893 | nop |
| 23894 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23895 | ta T_CHANGE_PRIV |
| 23896 | stxa %r5, [%r0+0x3e8] %asi |
| 23897 | .word 0x9d950006 ! 148: WRPR_WSTATE_R wrpr %r20, %r6, %wstate |
| 23898 | change_to_randtl_2_116: |
| 23899 | ta T_CHANGE_PRIV ! macro |
| 23900 | done_change_to_randtl_2_116: |
| 23901 | .word 0x8f902001 ! 149: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 23902 | change_to_randtl_2_117: |
| 23903 | ta T_CHANGE_HPRIV ! macro |
| 23904 | done_change_to_randtl_2_117: |
| 23905 | .word 0x8f902002 ! 150: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 23906 | #if (defined SPC || defined CMP) |
| 23907 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_118) + 16, 16, 16)) -> intp(6,0,5) |
| 23908 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_118)&0xffffffff) + 16, 16, 16)) -> intp(6,0,5) |
| 23909 | #else |
| 23910 | setx 0xb741edae9eba3d6a, %r1, %r28 |
| 23911 | stxa %r28, [%g0] 0x73 |
| 23912 | #endif |
| 23913 | intvec_2_118: |
| 23914 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23915 | memptr_2_119: |
| 23916 | set 0x60740000, %r31 |
| 23917 | .word 0x8580b76e ! 152: WRCCR_I wr %r2, 0x176e, %ccr |
| 23918 | nop |
| 23919 | mov 0x80, %g3 |
| 23920 | stxa %g3, [%g3] 0x57 |
| 23921 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 23922 | .word 0x8d9037f4 ! 154: WRPR_PSTATE_I wrpr %r0, 0x17f4, %pstate |
| 23923 | mondo_2_121: |
| 23924 | nop |
| 23925 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 23926 | ta T_CHANGE_PRIV |
| 23927 | stxa %r1, [%r0+0x3e8] %asi |
| 23928 | .word 0x9d90c00b ! 155: WRPR_WSTATE_R wrpr %r3, %r11, %wstate |
| 23929 | .word 0x8d903ee2 ! 156: WRPR_PSTATE_I wrpr %r0, 0x1ee2, %pstate |
| 23930 | .word 0x83d02033 ! 157: Tcc_I te icc_or_xcc, %r0 + 51 |
| 23931 | setx 0x1c5f289d112e95b8, %r1, %r28 |
| 23932 | stxa %r28, [%g0] 0x73 |
| 23933 | intvec_2_123: |
| 23934 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 23935 | .word 0xc3688012 ! 159: PREFETCH_R prefetch [%r2 + %r18], #one_read |
| 23936 | fpinit_2_124: |
| 23937 | nop |
| 23938 | setx fp_data_quads, %r19, %r20 |
| 23939 | ldd [%r20], %f0 |
| 23940 | ldd [%r20+8], %f4 |
| 23941 | ld [%r20+16], %fsr |
| 23942 | ld [%r20+24], %r19 |
| 23943 | wr %r19, %g0, %gsr |
| 23944 | .word 0x8da009c4 ! 160: FDIVd fdivd %f0, %f4, %f6 |
| 23945 | splash_hpstate_2_125: |
| 23946 | ta T_CHANGE_NONHPRIV |
| 23947 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 23948 | .word 0x81983c1d ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1c1d, %hpstate |
| 23949 | nop |
| 23950 | mov 0x80, %g3 |
| 23951 | stxa %g3, [%g3] 0x57 |
| 23952 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 23953 | nop |
| 23954 | ta T_CHANGE_HPRIV |
| 23955 | mov 0x2, %r10 |
| 23956 | set sync_thr_counter6, %r23 |
| 23957 | #ifndef SPC |
| 23958 | ldxa [%g0]0x63, %o1 |
| 23959 | and %o1, 0x38, %o1 |
| 23960 | add %o1, %r23, %r23 |
| 23961 | #endif |
| 23962 | cas [%r23],%g0,%r10 !lock |
| 23963 | brnz %r10, sma_2_126 |
| 23964 | rd %asi, %r12 |
| 23965 | wr %g0, 0x40, %asi |
| 23966 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23967 | set 0x001a1fff, %g1 |
| 23968 | stxa %g1, [%g0 + 0x80] %asi |
| 23969 | wr %r12, %g0, %asi |
| 23970 | st %g0, [%r23] |
| 23971 | sma_2_126: |
| 23972 | ta T_CHANGE_NONHPRIV |
| 23973 | .word 0xe1e7e009 ! 163: CASA_R casa [%r31] %asi, %r9, %r16 |
| 23974 | nop |
| 23975 | ta T_CHANGE_HPRIV |
| 23976 | mov 0x2, %r10 |
| 23977 | set sync_thr_counter6, %r23 |
| 23978 | #ifndef SPC |
| 23979 | ldxa [%g0]0x63, %o1 |
| 23980 | and %o1, 0x38, %o1 |
| 23981 | add %o1, %r23, %r23 |
| 23982 | #endif |
| 23983 | cas [%r23],%g0,%r10 !lock |
| 23984 | brnz %r10, sma_2_127 |
| 23985 | rd %asi, %r12 |
| 23986 | wr %g0, 0x40, %asi |
| 23987 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 23988 | set 0x00161fff, %g1 |
| 23989 | stxa %g1, [%g0 + 0x80] %asi |
| 23990 | wr %r12, %g0, %asi |
| 23991 | st %g0, [%r23] |
| 23992 | sma_2_127: |
| 23993 | ta T_CHANGE_NONHPRIV |
| 23994 | .word 0xe1e7e010 ! 164: CASA_R casa [%r31] %asi, %r16, %r16 |
| 23995 | pmu_2_128: |
| 23996 | nop |
| 23997 | ta T_CHANGE_PRIV |
| 23998 | setx 0xfffff064fffff2d8, %g1, %g7 |
| 23999 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24000 | splash_cmpr_2_129: |
| 24001 | mov 0, %r18 |
| 24002 | sllx %r18, 63, %r18 |
| 24003 | rd %tick, %r17 |
| 24004 | add %r17, 0x100, %r17 |
| 24005 | or %r17, %r18, %r17 |
| 24006 | ta T_CHANGE_PRIV |
| 24007 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24008 | ceter_2_130: |
| 24009 | nop |
| 24010 | ta T_CHANGE_HPRIV |
| 24011 | mov 2, %r17 |
| 24012 | sllx %r17, 60, %r17 |
| 24013 | mov 0x18, %r16 |
| 24014 | stxa %r17, [%r16]0x4c |
| 24015 | ta T_CHANGE_NONHPRIV |
| 24016 | .word 0xa5410000 ! 167: RDTICK rd %tick, %r18 |
| 24017 | jmptr_2_131: |
| 24018 | nop |
| 24019 | best_set_reg(0xe1a00000, %r20, %r27) |
| 24020 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 24021 | .word 0x996a8014 ! 169: SDIVX_R sdivx %r10, %r20, %r12 |
| 24022 | splash_cmpr_2_132: |
| 24023 | mov 0, %r18 |
| 24024 | sllx %r18, 63, %r18 |
| 24025 | rd %tick, %r17 |
| 24026 | add %r17, 0x100, %r17 |
| 24027 | or %r17, %r18, %r17 |
| 24028 | .word 0xaf800011 ! 170: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 24029 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 24030 | nop |
| 24031 | ta T_CHANGE_HPRIV |
| 24032 | mov 0x2+1, %r10 |
| 24033 | set sync_thr_counter5, %r23 |
| 24034 | #ifndef SPC |
| 24035 | ldxa [%g0]0x63, %o1 |
| 24036 | and %o1, 0x38, %o1 |
| 24037 | add %o1, %r23, %r23 |
| 24038 | sllx %o1, 5, %o3 !(CID*256) |
| 24039 | #endif |
| 24040 | cas [%r23],%g0,%r10 !lock |
| 24041 | brnz %r10, cwq_2_133 |
| 24042 | rd %asi, %r12 |
| 24043 | wr %g0, 0x40, %asi |
| 24044 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 24045 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 24046 | cmp %l1, 1 |
| 24047 | bne cwq_2_133 |
| 24048 | set CWQ_BASE, %l6 |
| 24049 | #ifndef SPC |
| 24050 | add %l6, %o3, %l6 |
| 24051 | #endif |
| 24052 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 24053 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 24054 | sllx %l2, 32, %l2 |
| 24055 | stx %l2, [%l6 + 0x0] |
| 24056 | membar #Sync |
| 24057 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 24058 | sub %l2, 0x40, %l2 |
| 24059 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 24060 | wr %r12, %g0, %asi |
| 24061 | st %g0, [%r23] |
| 24062 | cwq_2_133: |
| 24063 | ta T_CHANGE_NONHPRIV |
| 24064 | .word 0x99414000 ! 172: RDPC rd %pc, %r12 |
| 24065 | jmptr_2_134: |
| 24066 | nop |
| 24067 | best_set_reg(0xe1a00000, %r20, %r27) |
| 24068 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 24069 | .word 0xe09fd060 ! 174: LDDA_R ldda [%r31, %r0] 0x83, %r16 |
| 24070 | setx 0x12d46cfc7feb99d0, %r1, %r28 |
| 24071 | stxa %r28, [%g0] 0x73 |
| 24072 | intvec_2_135: |
| 24073 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24074 | splash_cmpr_2_136: |
| 24075 | mov 1, %r18 |
| 24076 | sllx %r18, 63, %r18 |
| 24077 | rd %tick, %r17 |
| 24078 | add %r17, 0x50, %r17 |
| 24079 | or %r17, %r18, %r17 |
| 24080 | ta T_CHANGE_HPRIV |
| 24081 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24082 | .word 0xb3800011 ! 176: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24083 | .word 0xe0d7e0e8 ! 177: LDSHA_I ldsha [%r31, + 0x00e8] %asi, %r16 |
| 24084 | splash_cmpr_2_137: |
| 24085 | mov 0, %r18 |
| 24086 | sllx %r18, 63, %r18 |
| 24087 | rd %tick, %r17 |
| 24088 | add %r17, 0x50, %r17 |
| 24089 | or %r17, %r18, %r17 |
| 24090 | ta T_CHANGE_HPRIV |
| 24091 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24092 | ta T_CHANGE_PRIV |
| 24093 | .word 0xb3800011 ! 178: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24094 | mondo_2_138: |
| 24095 | nop |
| 24096 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24097 | stxa %r11, [%r0+0x3e0] %asi |
| 24098 | .word 0x9d914012 ! 179: WRPR_WSTATE_R wrpr %r5, %r18, %wstate |
| 24099 | change_to_randtl_2_139: |
| 24100 | ta T_CHANGE_HPRIV ! macro |
| 24101 | done_change_to_randtl_2_139: |
| 24102 | .word 0x8f902001 ! 180: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 24103 | jmptr_2_140: |
| 24104 | nop |
| 24105 | best_set_reg(0xe1a00000, %r20, %r27) |
| 24106 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 24107 | .word 0x9190c013 ! 182: WRPR_PIL_R wrpr %r3, %r19, %pil |
| 24108 | donret_2_142: |
| 24109 | nop |
| 24110 | ta T_CHANGE_HPRIV ! macro |
| 24111 | rd %pc, %r12 |
| 24112 | add %r12, (donretarg_2_142-donret_2_142-8), %r12 |
| 24113 | mov 0x38, %r18 |
| 24114 | stxa %r12, [%r18]0x58 |
| 24115 | add %r12, 0x4, %r11 |
| 24116 | wrpr %g0, 0x2, %tl |
| 24117 | wrpr %g0, %r12, %tpc |
| 24118 | wrpr %g0, %r11, %tnpc |
| 24119 | set (0x0034a3a9 | (0x80 << 24)), %r13 |
| 24120 | rdpr %tstate, %r16 |
| 24121 | mov 0x1f, %r19 |
| 24122 | and %r19, %r16, %r17 |
| 24123 | andn %r16, %r19, %r16 |
| 24124 | or %r16, %r17, %r20 |
| 24125 | wrpr %r20, %g0, %tstate |
| 24126 | wrhpr %g0, 0x745, %htstate |
| 24127 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 24128 | retry |
| 24129 | donretarg_2_142: |
| 24130 | .word 0xa9a149d2 ! 183: FDIVd fdivd %f36, %f18, %f20 |
| 24131 | .word 0xe6c7e110 ! 184: LDSWA_I ldswa [%r31, + 0x0110] %asi, %r19 |
| 24132 | .word 0xe1bfdb60 ! 185: STDFA_R stda %f16, [%r0, %r31] |
| 24133 | .word 0xe6cfe000 ! 186: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r19 |
| 24134 | splash_cmpr_2_143: |
| 24135 | mov 0, %r18 |
| 24136 | sllx %r18, 63, %r18 |
| 24137 | rd %tick, %r17 |
| 24138 | add %r17, 0x80, %r17 |
| 24139 | or %r17, %r18, %r17 |
| 24140 | ta T_CHANGE_HPRIV |
| 24141 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24142 | .word 0xaf800011 ! 187: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 24143 | .word 0xa480c014 ! 188: ADDcc_R addcc %r3, %r20, %r18 |
| 24144 | ibp_2_144: |
| 24145 | nop |
| 24146 | ta T_CHANGE_HPRIV |
| 24147 | mov 8, %r18 |
| 24148 | rd %asi, %r12 |
| 24149 | wr %r0, 0x41, %asi |
| 24150 | set sync_thr_counter4, %r23 |
| 24151 | #ifndef SPC |
| 24152 | ldxa [%g0]0x63, %r8 |
| 24153 | and %r8, 0x38, %r8 ! Core ID |
| 24154 | add %r8, %r23, %r23 |
| 24155 | #else |
| 24156 | mov 0, %r8 |
| 24157 | #endif |
| 24158 | mov 0x2, %r16 |
| 24159 | ibp_startwait2_144: |
| 24160 | cas [%r23],%g0,%r16 !lock |
| 24161 | brz,a %r16, continue_ibp_2_144 |
| 24162 | mov (~0x2&0xf), %r16 |
| 24163 | ld [%r23], %r16 |
| 24164 | ibp_wait2_144: |
| 24165 | brnz %r16, ibp_wait2_144 |
| 24166 | ld [%r23], %r16 |
| 24167 | ba ibp_startwait2_144 |
| 24168 | mov 0x2, %r16 |
| 24169 | continue_ibp_2_144: |
| 24170 | sllx %r16, %r8, %r16 !Mask for my core only |
| 24171 | ldxa [0x58]%asi, %r17 !Running_status |
| 24172 | wait_for_stat_2_144: |
| 24173 | ldxa [0x50]%asi, %r13 !Running_rw |
| 24174 | cmp %r13, %r17 |
| 24175 | bne,a wait_for_stat_2_144 |
| 24176 | ldxa [0x58]%asi, %r17 !Running_status |
| 24177 | stxa %r16, [0x68]%asi !Park (W1C) |
| 24178 | ldxa [0x50]%asi, %r14 !Running_rw |
| 24179 | wait_for_ibp_2_144: |
| 24180 | ldxa [0x58]%asi, %r17 !Running_status |
| 24181 | cmp %r14, %r17 |
| 24182 | bne,a wait_for_ibp_2_144 |
| 24183 | ldxa [0x50]%asi, %r14 !Running_rw |
| 24184 | ibp_doit2_144: |
| 24185 | best_set_reg(0x00000040f4d2b1c2,%r19, %r20) |
| 24186 | stxa %r20, [%r18]0x42 |
| 24187 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 24188 | st %g0, [%r23] !clear lock |
| 24189 | wr %r0, %r12, %asi !restore %asi |
| 24190 | ta T_CHANGE_NONHPRIV |
| 24191 | .word 0xe19fe1a0 ! 189: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 24192 | ceter_2_145: |
| 24193 | nop |
| 24194 | ta T_CHANGE_HPRIV |
| 24195 | mov 4, %r17 |
| 24196 | sllx %r17, 60, %r17 |
| 24197 | mov 0x18, %r16 |
| 24198 | stxa %r17, [%r16]0x4c |
| 24199 | ta T_CHANGE_NONHPRIV |
| 24200 | .word 0x95410000 ! 190: RDTICK rd %tick, %r10 |
| 24201 | ceter_2_146: |
| 24202 | nop |
| 24203 | ta T_CHANGE_HPRIV |
| 24204 | mov 7, %r17 |
| 24205 | sllx %r17, 60, %r17 |
| 24206 | mov 0x18, %r16 |
| 24207 | stxa %r17, [%r16]0x4c |
| 24208 | ta T_CHANGE_NONHPRIV |
| 24209 | .word 0x95410000 ! 191: RDTICK rd %tick, %r10 |
| 24210 | setx 0x7ff3efd293c7a0c6, %r1, %r28 |
| 24211 | stxa %r28, [%g0] 0x73 |
| 24212 | intvec_2_147: |
| 24213 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24214 | invtsb_2_148: |
| 24215 | nop |
| 24216 | ta T_CHANGE_HPRIV |
| 24217 | rd %asi, %r21 |
| 24218 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 24219 | mov 1, %r20 |
| 24220 | sllx %r20, 63, %r20 |
| 24221 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 24222 | xor %r22 ,%r20, %r22 |
| 24223 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 24224 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 24225 | xor %r22 ,%r20, %r22 |
| 24226 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 24227 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 24228 | xor %r22 ,%r20, %r22 |
| 24229 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 24230 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 24231 | xor %r22 ,%r20, %r22 |
| 24232 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 24233 | wr %r21, %r0, %asi |
| 24234 | ta T_CHANGE_NONHPRIV |
| 24235 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 24236 | .word 0xa5a0016d ! 194: FABSq dis not found |
| 24237 | |
| 24238 | .word 0xe6c7e180 ! 195: LDSWA_I ldswa [%r31, + 0x0180] %asi, %r19 |
| 24239 | splash_lsu_2_150: |
| 24240 | nop |
| 24241 | ta T_CHANGE_HPRIV |
| 24242 | set 0x830d39bf, %r2 |
| 24243 | mov 0x6, %r1 |
| 24244 | sllx %r1, 32, %r1 |
| 24245 | or %r1, %r2, %r2 |
| 24246 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24247 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24248 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 24249 | reduce_priv_lvl_2_151: |
| 24250 | ta T_CHANGE_NONPRIV ! macro |
| 24251 | .word 0xe65fe128 ! 198: LDX_I ldx [%r31 + 0x0128], %r19 |
| 24252 | splash_hpstate_2_152: |
| 24253 | ta T_CHANGE_NONHPRIV |
| 24254 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 24255 | .word 0x819835c9 ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x15c9, %hpstate |
| 24256 | .word 0xa353c000 ! 200: RDPR_FQ <illegal instruction> |
| 24257 | .word 0xd297c030 ! 1: LDUHA_R lduha [%r31, %r16] 0x01, %r9 |
| 24258 | .word 0x9f8037bd ! 201: SIR sir 0x17bd |
| 24259 | mondo_2_153: |
| 24260 | nop |
| 24261 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24262 | stxa %r8, [%r0+0x3c8] %asi |
| 24263 | .word 0x9d944014 ! 202: WRPR_WSTATE_R wrpr %r17, %r20, %wstate |
| 24264 | jmptr_2_154: |
| 24265 | nop |
| 24266 | best_set_reg(0xe1a00000, %r20, %r27) |
| 24267 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 24268 | bne skip_2_155 |
| 24269 | fbuge skip_2_155 |
| 24270 | .align 2048 |
| 24271 | skip_2_155: |
| 24272 | .word 0xa7b1c4c1 ! 204: FCMPNE32 fcmpne32 %d38, %d32, %r19 |
| 24273 | pmu_2_156: |
| 24274 | nop |
| 24275 | ta T_CHANGE_PRIV |
| 24276 | setx 0xfffffc4bfffff508, %g1, %g7 |
| 24277 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24278 | setx 0x7bbb66456e0e64c3, %r1, %r28 |
| 24279 | stxa %r28, [%g0] 0x73 |
| 24280 | intvec_2_157: |
| 24281 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24282 | .word 0xe677e159 ! 207: STX_I stx %r19, [%r31 + 0x0159] |
| 24283 | brcommon2_2_158: |
| 24284 | nop |
| 24285 | setx common_target, %r12, %r27 |
| 24286 | ba,a .+12 |
| 24287 | .word 0xd7124014 ! 1: LDQF_R - [%r9, %r20], %f11 |
| 24288 | ba,a .+8 |
| 24289 | jmpl %r27+0, %r27 |
| 24290 | .word 0xc1bfe080 ! 208: STDFA_I stda %f0, [0x0080, %r31] |
| 24291 | .word 0x94f90010 ! 209: SDIVcc_R sdivcc %r4, %r16, %r10 |
| 24292 | .word 0xd897e1b8 ! 210: LDUHA_I lduha [%r31, + 0x01b8] %asi, %r12 |
| 24293 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 24294 | change_to_randtl_2_159: |
| 24295 | ta T_CHANGE_HPRIV ! macro |
| 24296 | done_change_to_randtl_2_159: |
| 24297 | .word 0x8f902000 ! 212: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 24298 | tagged_2_160: |
| 24299 | tsubcctv %r16, 0x14ca, %r12 |
| 24300 | .word 0xd807e118 ! 213: LDUW_I lduw [%r31 + 0x0118], %r12 |
| 24301 | br_badelay1_2_161: |
| 24302 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 24303 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 24304 | .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 24305 | normalw |
| 24306 | .word 0x91458000 ! 214: RD_SOFTINT_REG rd %softint, %r8 |
| 24307 | pmu_2_162: |
| 24308 | nop |
| 24309 | setx 0xfffff0c0fffff09d, %g1, %g7 |
| 24310 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24311 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 24312 | pmu_2_164: |
| 24313 | nop |
| 24314 | ta T_CHANGE_PRIV |
| 24315 | setx 0xfffffef5fffff1c4, %g1, %g7 |
| 24316 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24317 | otherw |
| 24318 | mov 0xb1, %r30 |
| 24319 | .word 0x83d0001e ! 218: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 24320 | .word 0xc1bfdb60 ! 219: STDFA_R stda %f0, [%r0, %r31] |
| 24321 | .word 0xe1bfdf20 ! 220: STDFA_R stda %f16, [%r0, %r31] |
| 24322 | .word 0xe1bfe1a0 ! 221: STDFA_I stda %f16, [0x01a0, %r31] |
| 24323 | setx 0x80db2ee821a3bb7c, %r1, %r28 |
| 24324 | stxa %r28, [%g0] 0x73 |
| 24325 | intvec_2_165: |
| 24326 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24327 | br_longdelay1_2_166: |
| 24328 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 24329 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 24330 | nop |
| 24331 | ta T_CHANGE_HPRIV |
| 24332 | mov 0x2, %r10 |
| 24333 | set sync_thr_counter6, %r23 |
| 24334 | #ifndef SPC |
| 24335 | ldxa [%g0]0x63, %o1 |
| 24336 | and %o1, 0x38, %o1 |
| 24337 | add %o1, %r23, %r23 |
| 24338 | #endif |
| 24339 | cas [%r23],%g0,%r10 !lock |
| 24340 | brnz %r10, sma_2_167 |
| 24341 | rd %asi, %r12 |
| 24342 | wr %g0, 0x40, %asi |
| 24343 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 24344 | set 0x00021fff, %g1 |
| 24345 | stxa %g1, [%g0 + 0x80] %asi |
| 24346 | wr %r12, %g0, %asi |
| 24347 | st %g0, [%r23] |
| 24348 | sma_2_167: |
| 24349 | ta T_CHANGE_NONHPRIV |
| 24350 | .word 0xe1e7e00a ! 224: CASA_R casa [%r31] %asi, %r10, %r16 |
| 24351 | jmptr_2_168: |
| 24352 | nop |
| 24353 | best_set_reg(0xe1a00000, %r20, %r27) |
| 24354 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 24355 | setx 0x5cd2e43c641b7fc3, %r1, %r28 |
| 24356 | stxa %r28, [%g0] 0x73 |
| 24357 | intvec_2_169: |
| 24358 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24359 | mondo_2_170: |
| 24360 | nop |
| 24361 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24362 | ta T_CHANGE_PRIV |
| 24363 | stxa %r18, [%r0+0x3c8] %asi |
| 24364 | .word 0x9d950002 ! 227: WRPR_WSTATE_R wrpr %r20, %r2, %wstate |
| 24365 | splash_cmpr_2_171: |
| 24366 | mov 0, %r18 |
| 24367 | sllx %r18, 63, %r18 |
| 24368 | rd %tick, %r17 |
| 24369 | add %r17, 0x100, %r17 |
| 24370 | or %r17, %r18, %r17 |
| 24371 | ta T_CHANGE_PRIV |
| 24372 | .word 0xb3800011 ! 228: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24373 | pmu_2_172: |
| 24374 | nop |
| 24375 | ta T_CHANGE_PRIV |
| 24376 | setx 0xfffff2c9fffffe34, %g1, %g7 |
| 24377 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24378 | splash_lsu_2_173: |
| 24379 | nop |
| 24380 | ta T_CHANGE_HPRIV |
| 24381 | set 0xed9afae1, %r2 |
| 24382 | mov 0x6, %r1 |
| 24383 | sllx %r1, 32, %r1 |
| 24384 | or %r1, %r2, %r2 |
| 24385 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24386 | ta T_CHANGE_NONHPRIV |
| 24387 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24388 | mondo_2_174: |
| 24389 | nop |
| 24390 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24391 | ta T_CHANGE_PRIV |
| 24392 | stxa %r11, [%r0+0x3e0] %asi |
| 24393 | .word 0x9d934008 ! 231: WRPR_WSTATE_R wrpr %r13, %r8, %wstate |
| 24394 | memptr_2_175: |
| 24395 | set 0x60740000, %r31 |
| 24396 | .word 0x85823c96 ! 232: WRCCR_I wr %r8, 0x1c96, %ccr |
| 24397 | mondo_2_176: |
| 24398 | nop |
| 24399 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24400 | ta T_CHANGE_PRIV |
| 24401 | stxa %r5, [%r0+0x3c0] %asi |
| 24402 | .word 0x9d92c00b ! 233: WRPR_WSTATE_R wrpr %r11, %r11, %wstate |
| 24403 | #if (defined SPC || defined CMP) |
| 24404 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_177)+0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24405 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_177)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24406 | #else |
| 24407 | !! TODO:Generate XIR via RESET_GEN register |
| 24408 | ! setx 0x8900000808, %r16, %r17 |
| 24409 | ! mov 0x2, %r16 |
| 24410 | ! stw %r16, [%r17] |
| 24411 | #endif |
| 24412 | xir_2_177: |
| 24413 | .word 0xa984f9da ! 234: WR_SET_SOFTINT_I wr %r19, 0x19da, %set_softint |
| 24414 | splash_lsu_2_178: |
| 24415 | nop |
| 24416 | ta T_CHANGE_HPRIV |
| 24417 | set 0xf11d83bb, %r2 |
| 24418 | mov 0x1, %r1 |
| 24419 | sllx %r1, 32, %r1 |
| 24420 | or %r1, %r2, %r2 |
| 24421 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24422 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24423 | pmu_2_179: |
| 24424 | nop |
| 24425 | setx 0xfffffd53fffffce0, %g1, %g7 |
| 24426 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24427 | splash_lsu_2_180: |
| 24428 | nop |
| 24429 | ta T_CHANGE_HPRIV |
| 24430 | set 0x64ca957c, %r2 |
| 24431 | mov 0x7, %r1 |
| 24432 | sllx %r1, 32, %r1 |
| 24433 | or %r1, %r2, %r2 |
| 24434 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24435 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24436 | splash_cmpr_2_181: |
| 24437 | mov 0, %r18 |
| 24438 | sllx %r18, 63, %r18 |
| 24439 | rd %tick, %r17 |
| 24440 | add %r17, 0x100, %r17 |
| 24441 | or %r17, %r18, %r17 |
| 24442 | ta T_CHANGE_HPRIV |
| 24443 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24444 | .word 0xb3800011 ! 238: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24445 | .word 0xe057e108 ! 239: LDSH_I ldsh [%r31 + 0x0108], %r16 |
| 24446 | donret_2_182: |
| 24447 | nop |
| 24448 | ta T_CHANGE_HPRIV ! macro |
| 24449 | rd %pc, %r12 |
| 24450 | add %r12, (donretarg_2_182-donret_2_182-8), %r12 |
| 24451 | mov 0x38, %r18 |
| 24452 | stxa %r12, [%r18]0x58 |
| 24453 | add %r12, 0x4, %r11 |
| 24454 | wrpr %g0, 0x1, %tl |
| 24455 | wrpr %g0, %r12, %tpc |
| 24456 | wrpr %g0, %r11, %tnpc |
| 24457 | set (0x00501989 | (0x82 << 24)), %r13 |
| 24458 | rdpr %tstate, %r16 |
| 24459 | mov 0x1f, %r19 |
| 24460 | and %r19, %r16, %r17 |
| 24461 | andn %r16, %r19, %r16 |
| 24462 | or %r16, %r17, %r20 |
| 24463 | wrpr %r20, %g0, %tstate |
| 24464 | wrhpr %g0, 0x1ec7, %htstate |
| 24465 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 24466 | retry |
| 24467 | donretarg_2_182: |
| 24468 | .word 0xe0ffe1f1 ! 240: SWAPA_I swapa %r16, [%r31 + 0x01f1] %asi |
| 24469 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 24470 | reduce_priv_lvl_2_183: |
| 24471 | ta T_CHANGE_NONPRIV ! macro |
| 24472 | .word 0xc1bfe060 ! 242: STDFA_I stda %f0, [0x0060, %r31] |
| 24473 | #if (defined SPC || defined CMP) |
| 24474 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_184)+40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24475 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_184)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24476 | #else |
| 24477 | !! TODO:Generate XIR via RESET_GEN register |
| 24478 | ! setx 0x8900000808, %r16, %r17 |
| 24479 | ! mov 0x2, %r16 |
| 24480 | ! stw %r16, [%r17] |
| 24481 | #endif |
| 24482 | xir_2_184: |
| 24483 | .word 0xa985322c ! 243: WR_SET_SOFTINT_I wr %r20, 0x122c, %set_softint |
| 24484 | unsupttte_2_185: |
| 24485 | nop |
| 24486 | ta T_CHANGE_HPRIV |
| 24487 | mov 1, %r20 |
| 24488 | sllx %r20, 63, %r20 |
| 24489 | or %r20, 2,%r20 |
| 24490 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 24491 | ta T_CHANGE_NONHPRIV |
| 24492 | .word 0x97a1c9a1 ! 244: FDIVs fdivs %f7, %f1, %f11 |
| 24493 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 24494 | nop |
| 24495 | ta T_CHANGE_HPRIV |
| 24496 | mov 0x2+1, %r10 |
| 24497 | set sync_thr_counter5, %r23 |
| 24498 | #ifndef SPC |
| 24499 | ldxa [%g0]0x63, %o1 |
| 24500 | and %o1, 0x38, %o1 |
| 24501 | add %o1, %r23, %r23 |
| 24502 | sllx %o1, 5, %o3 !(CID*256) |
| 24503 | #endif |
| 24504 | cas [%r23],%g0,%r10 !lock |
| 24505 | brnz %r10, cwq_2_186 |
| 24506 | rd %asi, %r12 |
| 24507 | wr %g0, 0x40, %asi |
| 24508 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 24509 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 24510 | cmp %l1, 1 |
| 24511 | bne cwq_2_186 |
| 24512 | set CWQ_BASE, %l6 |
| 24513 | #ifndef SPC |
| 24514 | add %l6, %o3, %l6 |
| 24515 | #endif |
| 24516 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 24517 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 24518 | sllx %l2, 32, %l2 |
| 24519 | stx %l2, [%l6 + 0x0] |
| 24520 | membar #Sync |
| 24521 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 24522 | sub %l2, 0x40, %l2 |
| 24523 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 24524 | wr %r12, %g0, %asi |
| 24525 | st %g0, [%r23] |
| 24526 | cwq_2_186: |
| 24527 | ta T_CHANGE_NONHPRIV |
| 24528 | .word 0xa3414000 ! 246: RDPC rd %pc, %r17 |
| 24529 | setx 0x669359604719d9a4, %r1, %r28 |
| 24530 | stxa %r28, [%g0] 0x73 |
| 24531 | intvec_2_187: |
| 24532 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24533 | pmu_2_188: |
| 24534 | nop |
| 24535 | setx 0xfffffd9dfffff53d, %g1, %g7 |
| 24536 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24537 | splash_cmpr_2_189: |
| 24538 | mov 0, %r18 |
| 24539 | sllx %r18, 63, %r18 |
| 24540 | rd %tick, %r17 |
| 24541 | add %r17, 0x80, %r17 |
| 24542 | or %r17, %r18, %r17 |
| 24543 | ta T_CHANGE_HPRIV |
| 24544 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24545 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 24546 | donret_2_190: |
| 24547 | nop |
| 24548 | ta T_CHANGE_HPRIV ! macro |
| 24549 | rd %pc, %r12 |
| 24550 | add %r12, (donretarg_2_190-donret_2_190-8), %r12 |
| 24551 | mov 0x38, %r18 |
| 24552 | stxa %r12, [%r18]0x58 |
| 24553 | add %r12, 0x4, %r11 |
| 24554 | wrpr %g0, 0x1, %tl |
| 24555 | wrpr %g0, %r12, %tpc |
| 24556 | wrpr %g0, %r11, %tnpc |
| 24557 | set (0x00ccec26 | (0x8a << 24)), %r13 |
| 24558 | rdpr %tstate, %r16 |
| 24559 | mov 0x1f, %r19 |
| 24560 | and %r19, %r16, %r17 |
| 24561 | andn %r16, %r19, %r16 |
| 24562 | or %r16, %r17, %r20 |
| 24563 | wrpr %r20, %g0, %tstate |
| 24564 | wrhpr %g0, 0x17cd, %htstate |
| 24565 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 24566 | retry |
| 24567 | donretarg_2_190: |
| 24568 | .word 0x95a049d1 ! 250: FDIVd fdivd %f32, %f48, %f10 |
| 24569 | memptr_2_191: |
| 24570 | set 0x60340000, %r31 |
| 24571 | .word 0x8583315d ! 251: WRCCR_I wr %r12, 0x115d, %ccr |
| 24572 | .word 0xe49fd160 ! 252: LDDA_R ldda [%r31, %r0] 0x8b, %r18 |
| 24573 | invtsb_2_192: |
| 24574 | nop |
| 24575 | ta T_CHANGE_HPRIV |
| 24576 | rd %asi, %r21 |
| 24577 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 24578 | mov 1, %r20 |
| 24579 | sllx %r20, 63, %r20 |
| 24580 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 24581 | xor %r22 ,%r20, %r22 |
| 24582 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 24583 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 24584 | xor %r22 ,%r20, %r22 |
| 24585 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 24586 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 24587 | xor %r22 ,%r20, %r22 |
| 24588 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 24589 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 24590 | xor %r22 ,%r20, %r22 |
| 24591 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 24592 | wr %r21, %r0, %asi |
| 24593 | ta T_CHANGE_NONHPRIV |
| 24594 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 24595 | nop |
| 24596 | ta T_CHANGE_HPRIV |
| 24597 | mov 0x2+1, %r10 |
| 24598 | set sync_thr_counter5, %r23 |
| 24599 | #ifndef SPC |
| 24600 | ldxa [%g0]0x63, %o1 |
| 24601 | and %o1, 0x38, %o1 |
| 24602 | add %o1, %r23, %r23 |
| 24603 | sllx %o1, 5, %o3 !(CID*256) |
| 24604 | #endif |
| 24605 | cas [%r23],%g0,%r10 !lock |
| 24606 | brnz %r10, cwq_2_193 |
| 24607 | rd %asi, %r12 |
| 24608 | wr %g0, 0x40, %asi |
| 24609 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 24610 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 24611 | cmp %l1, 1 |
| 24612 | bne cwq_2_193 |
| 24613 | set CWQ_BASE, %l6 |
| 24614 | #ifndef SPC |
| 24615 | add %l6, %o3, %l6 |
| 24616 | #endif |
| 24617 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 24618 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 24619 | sllx %l2, 32, %l2 |
| 24620 | stx %l2, [%l6 + 0x0] |
| 24621 | membar #Sync |
| 24622 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 24623 | sub %l2, 0x40, %l2 |
| 24624 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 24625 | wr %r12, %g0, %asi |
| 24626 | st %g0, [%r23] |
| 24627 | cwq_2_193: |
| 24628 | ta T_CHANGE_NONHPRIV |
| 24629 | .word 0xa3414000 ! 254: RDPC rd %pc, %r17 |
| 24630 | splash_lsu_2_194: |
| 24631 | nop |
| 24632 | ta T_CHANGE_HPRIV |
| 24633 | set 0xe39c5958, %r2 |
| 24634 | mov 0x2, %r1 |
| 24635 | sllx %r1, 32, %r1 |
| 24636 | or %r1, %r2, %r2 |
| 24637 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24638 | ta T_CHANGE_NONHPRIV |
| 24639 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24640 | .word 0xa553c000 ! 256: RDPR_FQ <illegal instruction> |
| 24641 | vahole_2_195: |
| 24642 | nop |
| 24643 | ta T_CHANGE_NONHPRIV |
| 24644 | setx vahole_target2, %r18, %r27 |
| 24645 | jmpl %r27+0, %r27 |
| 24646 | .word 0xe8bfc030 ! 257: STDA_R stda %r20, [%r31 + %r16] 0x01 |
| 24647 | #if (defined SPC || defined CMP) |
| 24648 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_196) + 0, 16, 16)) -> intp(2,0,23) |
| 24649 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_196)&0xffffffff) + 0, 16, 16)) -> intp(2,0,23) |
| 24650 | #else |
| 24651 | setx 0xdb1e20794ef37996, %r1, %r28 |
| 24652 | stxa %r28, [%g0] 0x73 |
| 24653 | #endif |
| 24654 | intvec_2_196: |
| 24655 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24656 | nop |
| 24657 | ta T_CHANGE_HPRIV |
| 24658 | mov 0x2, %r10 |
| 24659 | set sync_thr_counter6, %r23 |
| 24660 | #ifndef SPC |
| 24661 | ldxa [%g0]0x63, %o1 |
| 24662 | and %o1, 0x38, %o1 |
| 24663 | add %o1, %r23, %r23 |
| 24664 | #endif |
| 24665 | cas [%r23],%g0,%r10 !lock |
| 24666 | brnz %r10, sma_2_197 |
| 24667 | rd %asi, %r12 |
| 24668 | wr %g0, 0x40, %asi |
| 24669 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 24670 | set 0x001a1fff, %g1 |
| 24671 | stxa %g1, [%g0 + 0x80] %asi |
| 24672 | wr %r12, %g0, %asi |
| 24673 | st %g0, [%r23] |
| 24674 | sma_2_197: |
| 24675 | ta T_CHANGE_NONHPRIV |
| 24676 | .word 0xe9e7e00c ! 259: CASA_R casa [%r31] %asi, %r12, %r20 |
| 24677 | .word 0xe8c7e190 ! 260: LDSWA_I ldswa [%r31, + 0x0190] %asi, %r20 |
| 24678 | vahole_2_198: |
| 24679 | nop |
| 24680 | ta T_CHANGE_NONHPRIV |
| 24681 | setx vahole_target3, %r18, %r27 |
| 24682 | jmpl %r27+0, %r27 |
| 24683 | .word 0xa7b4c483 ! 261: FCMPLE32 fcmple32 %d50, %d34, %r19 |
| 24684 | .word 0xd697e068 ! 262: LDUHA_I lduha [%r31, + 0x0068] %asi, %r11 |
| 24685 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 24686 | .word 0xd68fe010 ! 264: LDUBA_I lduba [%r31, + 0x0010] %asi, %r11 |
| 24687 | pmu_2_199: |
| 24688 | nop |
| 24689 | setx 0xfffff9c8fffffc7b, %g1, %g7 |
| 24690 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24691 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 24692 | vahole_2_201: |
| 24693 | nop |
| 24694 | ta T_CHANGE_NONHPRIV |
| 24695 | setx vahole_target1, %r18, %r27 |
| 24696 | jmpl %r27+0, %r27 |
| 24697 | .word 0x9ba449cc ! 267: FDIVd fdivd %f48, %f12, %f44 |
| 24698 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 24699 | .word 0x8d90238f ! 268: WRPR_PSTATE_I wrpr %r0, 0x038f, %pstate |
| 24700 | .word 0xe097e1d8 ! 269: LDUHA_I lduha [%r31, + 0x01d8] %asi, %r16 |
| 24701 | nop |
| 24702 | ta T_CHANGE_HPRIV |
| 24703 | mov 0x2, %r10 |
| 24704 | set sync_thr_counter6, %r23 |
| 24705 | #ifndef SPC |
| 24706 | ldxa [%g0]0x63, %o1 |
| 24707 | and %o1, 0x38, %o1 |
| 24708 | add %o1, %r23, %r23 |
| 24709 | #endif |
| 24710 | cas [%r23],%g0,%r10 !lock |
| 24711 | brnz %r10, sma_2_203 |
| 24712 | rd %asi, %r12 |
| 24713 | wr %g0, 0x40, %asi |
| 24714 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 24715 | set 0x001e1fff, %g1 |
| 24716 | stxa %g1, [%g0 + 0x80] %asi |
| 24717 | wr %r12, %g0, %asi |
| 24718 | st %g0, [%r23] |
| 24719 | sma_2_203: |
| 24720 | ta T_CHANGE_NONHPRIV |
| 24721 | .word 0xe1e7e00c ! 270: CASA_R casa [%r31] %asi, %r12, %r16 |
| 24722 | .word 0xe07fe1e0 ! 271: SWAP_I swap %r16, [%r31 + 0x01e0] |
| 24723 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 24724 | cwp_2_204: |
| 24725 | set user_data_start, %o7 |
| 24726 | .word 0x93902004 ! 273: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 24727 | pmu_2_205: |
| 24728 | nop |
| 24729 | ta T_CHANGE_PRIV |
| 24730 | setx 0xfffff1aefffff35c, %g1, %g7 |
| 24731 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24732 | mondo_2_206: |
| 24733 | nop |
| 24734 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24735 | ta T_CHANGE_PRIV |
| 24736 | stxa %r19, [%r0+0x3e8] %asi |
| 24737 | .word 0x9d94c002 ! 275: WRPR_WSTATE_R wrpr %r19, %r2, %wstate |
| 24738 | br_badelay3_2_207: |
| 24739 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 24740 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 24741 | .word 0xa1a00545 ! 1: FSQRTd fsqrt |
| 24742 | .word 0xa3a08822 ! 276: FADDs fadds %f2, %f2, %f17 |
| 24743 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 24744 | reduce_priv_lvl_2_208: |
| 24745 | ta T_CHANGE_NONPRIV ! macro |
| 24746 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 24747 | mondo_2_210: |
| 24748 | nop |
| 24749 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24750 | stxa %r18, [%r0+0x3c0] %asi |
| 24751 | .word 0x9d90c006 ! 279: WRPR_WSTATE_R wrpr %r3, %r6, %wstate |
| 24752 | donret_2_211: |
| 24753 | nop |
| 24754 | ta T_CHANGE_HPRIV ! macro |
| 24755 | rd %pc, %r12 |
| 24756 | add %r12, (donretarg_2_211-donret_2_211-4), %r12 |
| 24757 | mov 0x38, %r18 |
| 24758 | stxa %r12, [%r18]0x58 |
| 24759 | add %r12, 0x4, %r11 |
| 24760 | wrpr %g0, 0x1, %tl |
| 24761 | wrpr %g0, %r12, %tpc |
| 24762 | wrpr %g0, %r11, %tnpc |
| 24763 | set (0x006ba6dc | (28 << 24)), %r13 |
| 24764 | rdpr %tstate, %r16 |
| 24765 | mov 0x1f, %r19 |
| 24766 | and %r19, %r16, %r17 |
| 24767 | andn %r16, %r19, %r16 |
| 24768 | or %r16, %r17, %r20 |
| 24769 | wrpr %r20, %g0, %tstate |
| 24770 | wrhpr %g0, 0x175d, %htstate |
| 24771 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 24772 | done |
| 24773 | donretarg_2_211: |
| 24774 | .word 0xd86fe108 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x0108] |
| 24775 | donret_2_212: |
| 24776 | nop |
| 24777 | ta T_CHANGE_HPRIV ! macro |
| 24778 | rd %pc, %r12 |
| 24779 | add %r12, (donretarg_2_212-donret_2_212-8), %r12 |
| 24780 | mov 0x38, %r18 |
| 24781 | stxa %r12, [%r18]0x58 |
| 24782 | add %r12, 0x4, %r11 |
| 24783 | wrpr %g0, 0x1, %tl |
| 24784 | wrpr %g0, %r12, %tpc |
| 24785 | wrpr %g0, %r11, %tnpc |
| 24786 | set (0x00dacb13 | (0x88 << 24)), %r13 |
| 24787 | rdpr %tstate, %r16 |
| 24788 | mov 0x1f, %r19 |
| 24789 | and %r19, %r16, %r17 |
| 24790 | andn %r16, %r19, %r16 |
| 24791 | or %r16, %r17, %r20 |
| 24792 | wrpr %r20, %g0, %tstate |
| 24793 | wrhpr %g0, 0x9d5, %htstate |
| 24794 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 24795 | retry |
| 24796 | donretarg_2_212: |
| 24797 | .word 0xa9a4c9d2 ! 281: FDIVd fdivd %f50, %f18, %f20 |
| 24798 | brcommon1_2_213: |
| 24799 | nop |
| 24800 | setx common_target, %r12, %r27 |
| 24801 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 24802 | ba,a .+12 |
| 24803 | .word 0xe9e7c030 ! 1: CASA_I casa [%r31] 0x 1, %r16, %r20 |
| 24804 | ba,a .+8 |
| 24805 | jmpl %r27+0, %r27 |
| 24806 | .word 0x9f80295f ! 282: SIR sir 0x095f |
| 24807 | .word 0xe19fe1c0 ! 283: LDDFA_I ldda [%r31, 0x01c0], %f16 |
| 24808 | .word 0x8d903a43 ! 284: WRPR_PSTATE_I wrpr %r0, 0x1a43, %pstate |
| 24809 | splash_cmpr_2_215: |
| 24810 | mov 1, %r18 |
| 24811 | sllx %r18, 63, %r18 |
| 24812 | rd %tick, %r17 |
| 24813 | add %r17, 0x60, %r17 |
| 24814 | or %r17, %r18, %r17 |
| 24815 | ta T_CHANGE_PRIV |
| 24816 | .word 0xaf800011 ! 285: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 24817 | splash_cmpr_2_216: |
| 24818 | mov 0, %r18 |
| 24819 | sllx %r18, 63, %r18 |
| 24820 | rd %tick, %r17 |
| 24821 | add %r17, 0x60, %r17 |
| 24822 | or %r17, %r18, %r17 |
| 24823 | ta T_CHANGE_HPRIV |
| 24824 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 24825 | .word 0xaf800011 ! 286: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 24826 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 24827 | reduce_priv_lvl_2_217: |
| 24828 | ta T_CHANGE_NONPRIV ! macro |
| 24829 | .word 0x2cccc001 ! 1: BRGZ brgz,a,pt %r19,<label_0xcc001> |
| 24830 | .word 0x8d9037a3 ! 288: WRPR_PSTATE_I wrpr %r0, 0x17a3, %pstate |
| 24831 | splash_lsu_2_219: |
| 24832 | nop |
| 24833 | ta T_CHANGE_HPRIV |
| 24834 | set 0x47490cfc, %r2 |
| 24835 | mov 0x2, %r1 |
| 24836 | sllx %r1, 32, %r1 |
| 24837 | or %r1, %r2, %r2 |
| 24838 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 24839 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 24840 | donret_2_220: |
| 24841 | nop |
| 24842 | ta T_CHANGE_HPRIV ! macro |
| 24843 | rd %pc, %r12 |
| 24844 | add %r12, (donretarg_2_220-donret_2_220-8), %r12 |
| 24845 | mov 0x38, %r18 |
| 24846 | stxa %r12, [%r18]0x58 |
| 24847 | add %r12, 0x4, %r11 |
| 24848 | wrpr %g0, 0x1, %tl |
| 24849 | wrpr %g0, %r12, %tpc |
| 24850 | wrpr %g0, %r11, %tnpc |
| 24851 | set (0x0076dc42 | (32 << 24)), %r13 |
| 24852 | rdpr %tstate, %r16 |
| 24853 | mov 0x1f, %r19 |
| 24854 | and %r19, %r16, %r17 |
| 24855 | andn %r16, %r19, %r16 |
| 24856 | or %r16, %r17, %r20 |
| 24857 | wrpr %r20, %g0, %tstate |
| 24858 | wrhpr %g0, 0x1775, %htstate |
| 24859 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 24860 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 24861 | retry |
| 24862 | donretarg_2_220: |
| 24863 | .word 0xd66fe1b3 ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x01b3] |
| 24864 | .word 0x91d02034 ! 291: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 24865 | setx 0xf2dc7f9fe0242683, %r1, %r28 |
| 24866 | stxa %r28, [%g0] 0x73 |
| 24867 | intvec_2_221: |
| 24868 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24869 | brcommon3_2_222: |
| 24870 | nop |
| 24871 | setx common_target, %r12, %r27 |
| 24872 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 24873 | ba,a .+12 |
| 24874 | .word 0xd737e120 ! 1: STQF_I - %f11, [0x0120, %r31] |
| 24875 | ba,a .+8 |
| 24876 | jmpl %r27+0, %r27 |
| 24877 | .word 0xd71fe190 ! 293: LDDF_I ldd [%r31, 0x0190], %f11 |
| 24878 | .word 0xd6d7e0e8 ! 294: LDSHA_I ldsha [%r31, + 0x00e8] %asi, %r11 |
| 24879 | pmu_2_223: |
| 24880 | nop |
| 24881 | ta T_CHANGE_PRIV |
| 24882 | setx 0xfffff818fffffe8b, %g1, %g7 |
| 24883 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24884 | .word 0xa3a00162 ! 296: FABSq dis not found |
| 24885 | |
| 24886 | #if (defined SPC || defined CMP) |
| 24887 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_225)+0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24888 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_225)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24889 | #else |
| 24890 | !! TODO:Generate XIR via RESET_GEN register |
| 24891 | ! setx 0x8900000808, %r16, %r17 |
| 24892 | ! mov 0x2, %r16 |
| 24893 | ! stw %r16, [%r17] |
| 24894 | #endif |
| 24895 | xir_2_225: |
| 24896 | .word 0xa984a026 ! 297: WR_SET_SOFTINT_I wr %r18, 0x0026, %set_softint |
| 24897 | memptr_2_226: |
| 24898 | set 0x60540000, %r31 |
| 24899 | .word 0x8584b6a0 ! 298: WRCCR_I wr %r18, 0x16a0, %ccr |
| 24900 | mondo_2_227: |
| 24901 | nop |
| 24902 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 24903 | ta T_CHANGE_PRIV |
| 24904 | stxa %r1, [%r0+0x3d8] %asi |
| 24905 | .word 0x9d94800a ! 299: WRPR_WSTATE_R wrpr %r18, %r10, %wstate |
| 24906 | .word 0xd297e060 ! 300: LDUHA_I lduha [%r31, + 0x0060] %asi, %r9 |
| 24907 | vahole_2_228: |
| 24908 | nop |
| 24909 | ta T_CHANGE_NONHPRIV |
| 24910 | setx vahole_target2, %r18, %r27 |
| 24911 | jmpl %r27+0, %r27 |
| 24912 | .word 0x87ac4a54 ! 301: FCMPd fcmpd %fcc<n>, %f48, %f20 |
| 24913 | #if (defined SPC || defined CMP) |
| 24914 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_229)+40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24915 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_229)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24916 | #else |
| 24917 | !! TODO:Generate XIR via RESET_GEN register |
| 24918 | ! setx 0x8900000808, %r16, %r17 |
| 24919 | ! mov 0x2, %r16 |
| 24920 | ! stw %r16, [%r17] |
| 24921 | #endif |
| 24922 | xir_2_229: |
| 24923 | .word 0xa984332e ! 302: WR_SET_SOFTINT_I wr %r16, 0x132e, %set_softint |
| 24924 | .word 0x8d90372f ! 303: WRPR_PSTATE_I wrpr %r0, 0x172f, %pstate |
| 24925 | vahole_2_231: |
| 24926 | nop |
| 24927 | ta T_CHANGE_NONHPRIV |
| 24928 | setx vahole_target0, %r18, %r27 |
| 24929 | jmpl %r27+0, %r27 |
| 24930 | .word 0xc32fc011 ! 304: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 24931 | trapasi_2_232: |
| 24932 | nop |
| 24933 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 24934 | .word 0xe8904980 ! 305: LDUHA_R lduha [%r1, %r0] 0x4c, %r20 |
| 24935 | #if (defined SPC || defined CMP) |
| 24936 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_233)+56, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24937 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_233)&0xffffffff) +56, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 24938 | #else |
| 24939 | !! TODO:Generate XIR via RESET_GEN register |
| 24940 | ! setx 0x8900000808, %r16, %r17 |
| 24941 | ! mov 0x2, %r16 |
| 24942 | ! stw %r16, [%r17] |
| 24943 | #endif |
| 24944 | xir_2_233: |
| 24945 | .word 0xa984e373 ! 306: WR_SET_SOFTINT_I wr %r19, 0x0373, %set_softint |
| 24946 | #if (defined SPC || defined CMP) |
| 24947 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_234) + 32, 16, 16)) -> intp(4,0,25) |
| 24948 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_234)&0xffffffff) + 32, 16, 16)) -> intp(4,0,25) |
| 24949 | #else |
| 24950 | setx 0xfbcc493a00cf71d2, %r1, %r28 |
| 24951 | stxa %r28, [%g0] 0x73 |
| 24952 | #endif |
| 24953 | intvec_2_234: |
| 24954 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 24955 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 24956 | pmu_2_235: |
| 24957 | nop |
| 24958 | ta T_CHANGE_PRIV |
| 24959 | setx 0xfffffcc3fffff493, %g1, %g7 |
| 24960 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 24961 | nop |
| 24962 | ta T_CHANGE_HPRIV |
| 24963 | mov 0x2+1, %r10 |
| 24964 | set sync_thr_counter5, %r23 |
| 24965 | #ifndef SPC |
| 24966 | ldxa [%g0]0x63, %o1 |
| 24967 | and %o1, 0x38, %o1 |
| 24968 | add %o1, %r23, %r23 |
| 24969 | sllx %o1, 5, %o3 !(CID*256) |
| 24970 | #endif |
| 24971 | cas [%r23],%g0,%r10 !lock |
| 24972 | brnz %r10, cwq_2_236 |
| 24973 | rd %asi, %r12 |
| 24974 | wr %g0, 0x40, %asi |
| 24975 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 24976 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 24977 | cmp %l1, 1 |
| 24978 | bne cwq_2_236 |
| 24979 | set CWQ_BASE, %l6 |
| 24980 | #ifndef SPC |
| 24981 | add %l6, %o3, %l6 |
| 24982 | #endif |
| 24983 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 24984 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 24985 | sllx %l2, 32, %l2 |
| 24986 | stx %l2, [%l6 + 0x0] |
| 24987 | membar #Sync |
| 24988 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 24989 | sub %l2, 0x40, %l2 |
| 24990 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 24991 | wr %r12, %g0, %asi |
| 24992 | st %g0, [%r23] |
| 24993 | cwq_2_236: |
| 24994 | ta T_CHANGE_NONHPRIV |
| 24995 | .word 0xa3414000 ! 310: RDPC rd %pc, %r17 |
| 24996 | nop |
| 24997 | ta T_CHANGE_HPRIV |
| 24998 | mov 0x2, %r10 |
| 24999 | set sync_thr_counter6, %r23 |
| 25000 | #ifndef SPC |
| 25001 | ldxa [%g0]0x63, %o1 |
| 25002 | and %o1, 0x38, %o1 |
| 25003 | add %o1, %r23, %r23 |
| 25004 | #endif |
| 25005 | cas [%r23],%g0,%r10 !lock |
| 25006 | brnz %r10, sma_2_237 |
| 25007 | rd %asi, %r12 |
| 25008 | wr %g0, 0x40, %asi |
| 25009 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25010 | set 0x001e1fff, %g1 |
| 25011 | stxa %g1, [%g0 + 0x80] %asi |
| 25012 | wr %r12, %g0, %asi |
| 25013 | st %g0, [%r23] |
| 25014 | sma_2_237: |
| 25015 | ta T_CHANGE_NONHPRIV |
| 25016 | .word 0xd1e7e009 ! 311: CASA_R casa [%r31] %asi, %r9, %r8 |
| 25017 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 25018 | reduce_priv_lvl_2_238: |
| 25019 | ta T_CHANGE_NONPRIV ! macro |
| 25020 | nop |
| 25021 | ta T_CHANGE_HPRIV |
| 25022 | mov 0x2, %r10 |
| 25023 | set sync_thr_counter6, %r23 |
| 25024 | #ifndef SPC |
| 25025 | ldxa [%g0]0x63, %o1 |
| 25026 | and %o1, 0x38, %o1 |
| 25027 | add %o1, %r23, %r23 |
| 25028 | #endif |
| 25029 | cas [%r23],%g0,%r10 !lock |
| 25030 | brnz %r10, sma_2_239 |
| 25031 | rd %asi, %r12 |
| 25032 | wr %g0, 0x40, %asi |
| 25033 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25034 | set 0x001e1fff, %g1 |
| 25035 | stxa %g1, [%g0 + 0x80] %asi |
| 25036 | wr %r12, %g0, %asi |
| 25037 | st %g0, [%r23] |
| 25038 | sma_2_239: |
| 25039 | ta T_CHANGE_NONHPRIV |
| 25040 | .word 0xd1e7e008 ! 313: CASA_R casa [%r31] %asi, %r8, %r8 |
| 25041 | .word 0xd03fc008 ! 1: STD_R std %r8, [%r31 + %r8] |
| 25042 | .word 0x9f80339d ! 314: SIR sir 0x139d |
| 25043 | .word 0x93d02032 ! 315: Tcc_I tne icc_or_xcc, %r0 + 50 |
| 25044 | splash_cmpr_2_240: |
| 25045 | mov 1, %r18 |
| 25046 | sllx %r18, 63, %r18 |
| 25047 | rd %tick, %r17 |
| 25048 | add %r17, 0x80, %r17 |
| 25049 | or %r17, %r18, %r17 |
| 25050 | ta T_CHANGE_HPRIV |
| 25051 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 25052 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 25053 | mondo_2_241: |
| 25054 | nop |
| 25055 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25056 | stxa %r6, [%r0+0x3e0] %asi |
| 25057 | .word 0x9d948014 ! 317: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 25058 | nop |
| 25059 | mov 0x80, %g3 |
| 25060 | stxa %g3, [%g3] 0x5f |
| 25061 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 25062 | nop |
| 25063 | ta T_CHANGE_HPRIV |
| 25064 | mov 0x2, %r10 |
| 25065 | set sync_thr_counter6, %r23 |
| 25066 | #ifndef SPC |
| 25067 | ldxa [%g0]0x63, %o1 |
| 25068 | and %o1, 0x38, %o1 |
| 25069 | add %o1, %r23, %r23 |
| 25070 | #endif |
| 25071 | cas [%r23],%g0,%r10 !lock |
| 25072 | brnz %r10, sma_2_242 |
| 25073 | rd %asi, %r12 |
| 25074 | wr %g0, 0x40, %asi |
| 25075 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25076 | set 0x00121fff, %g1 |
| 25077 | stxa %g1, [%g0 + 0x80] %asi |
| 25078 | wr %r12, %g0, %asi |
| 25079 | st %g0, [%r23] |
| 25080 | sma_2_242: |
| 25081 | ta T_CHANGE_NONHPRIV |
| 25082 | .word 0xd1e7e00c ! 319: CASA_R casa [%r31] %asi, %r12, %r8 |
| 25083 | br_longdelay1_2_243: |
| 25084 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 25085 | .word 0x9d97c000 ! 320: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 25086 | splash_cmpr_2_244: |
| 25087 | mov 0, %r18 |
| 25088 | sllx %r18, 63, %r18 |
| 25089 | rd %tick, %r17 |
| 25090 | add %r17, 0x100, %r17 |
| 25091 | or %r17, %r18, %r17 |
| 25092 | ta T_CHANGE_HPRIV |
| 25093 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 25094 | .word 0xaf800011 ! 321: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 25095 | pmu_2_245: |
| 25096 | nop |
| 25097 | ta T_CHANGE_PRIV |
| 25098 | setx 0xfffffcb5fffff1d6, %g1, %g7 |
| 25099 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25100 | pmu_2_246: |
| 25101 | nop |
| 25102 | setx 0xfffff104fffff7bc, %g1, %g7 |
| 25103 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25104 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 25105 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 25106 | .word 0xa3a00171 ! 326: FABSq dis not found |
| 25107 | |
| 25108 | mondo_2_249: |
| 25109 | nop |
| 25110 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25111 | stxa %r11, [%r0+0x3c0] %asi |
| 25112 | .word 0x9d944006 ! 327: WRPR_WSTATE_R wrpr %r17, %r6, %wstate |
| 25113 | #if (defined SPC || defined CMP) |
| 25114 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_250) + 56, 16, 16)) -> intp(5,0,21) |
| 25115 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_250)&0xffffffff) + 56, 16, 16)) -> intp(5,0,21) |
| 25116 | #else |
| 25117 | setx 0xac94d49751b23600, %r1, %r28 |
| 25118 | stxa %r28, [%g0] 0x73 |
| 25119 | #endif |
| 25120 | intvec_2_250: |
| 25121 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25122 | donret_2_251: |
| 25123 | nop |
| 25124 | ta T_CHANGE_HPRIV ! macro |
| 25125 | rd %pc, %r12 |
| 25126 | add %r12, (donretarg_2_251-donret_2_251-4), %r12 |
| 25127 | mov 0x38, %r18 |
| 25128 | stxa %r12, [%r18]0x58 |
| 25129 | add %r12, 0x4, %r11 |
| 25130 | wrpr %g0, 0x2, %tl |
| 25131 | wrpr %g0, %r12, %tpc |
| 25132 | wrpr %g0, %r11, %tnpc |
| 25133 | set (0x003996de | (0x83 << 24)), %r13 |
| 25134 | rdpr %tstate, %r16 |
| 25135 | mov 0x1f, %r19 |
| 25136 | and %r19, %r16, %r17 |
| 25137 | andn %r16, %r19, %r16 |
| 25138 | or %r16, %r17, %r20 |
| 25139 | wrpr %r20, %g0, %tstate |
| 25140 | wrhpr %g0, 0x13a4, %htstate |
| 25141 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 25142 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 25143 | done |
| 25144 | donretarg_2_251: |
| 25145 | .word 0xa1a4c9d1 ! 329: FDIVd fdivd %f50, %f48, %f16 |
| 25146 | .word 0xd4c7e118 ! 330: LDSWA_I ldswa [%r31, + 0x0118] %asi, %r10 |
| 25147 | .word 0xc1bfe1c0 ! 331: STDFA_I stda %f0, [0x01c0, %r31] |
| 25148 | nop |
| 25149 | mov 0x80, %g3 |
| 25150 | stxa %g3, [%g3] 0x57 |
| 25151 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 25152 | br_badelay3_2_252: |
| 25153 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 25154 | .word 0x8b4d5252 ! Random illegal ? |
| 25155 | .word 0xa1a00551 ! 1: FSQRTd fsqrt |
| 25156 | .word 0x93a34825 ! 333: FADDs fadds %f13, %f5, %f9 |
| 25157 | splash_hpstate_2_253: |
| 25158 | .word 0x24cc8001 ! 1: BRLEZ brlez,a,pt %r18,<label_0xc8001> |
| 25159 | .word 0x81983e07 ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x1e07, %hpstate |
| 25160 | mondo_2_254: |
| 25161 | nop |
| 25162 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25163 | ta T_CHANGE_PRIV |
| 25164 | stxa %r6, [%r0+0x3c0] %asi |
| 25165 | .word 0x9d918013 ! 335: WRPR_WSTATE_R wrpr %r6, %r19, %wstate |
| 25166 | .word 0xe33fc00a ! 1: STDF_R std %f17, [%r10, %r31] |
| 25167 | .word 0x9f802070 ! 336: SIR sir 0x0070 |
| 25168 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 25169 | reduce_priv_lvl_2_255: |
| 25170 | ta T_CHANGE_NONHPRIV ! macro |
| 25171 | .word 0xe277e1fb ! 338: STX_I stx %r17, [%r31 + 0x01fb] |
| 25172 | pmu_2_256: |
| 25173 | nop |
| 25174 | ta T_CHANGE_PRIV |
| 25175 | setx 0xfffffc0cfffffd5c, %g1, %g7 |
| 25176 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25177 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 25178 | otherw |
| 25179 | mov 0xb0, %r30 |
| 25180 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 25181 | .word 0xe227e11c ! 342: STW_I stw %r17, [%r31 + 0x011c] |
| 25182 | setx 0x4edc07a460b05e19, %r1, %r28 |
| 25183 | stxa %r28, [%g0] 0x73 |
| 25184 | intvec_2_257: |
| 25185 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25186 | jmptr_2_258: |
| 25187 | nop |
| 25188 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25189 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 25190 | donret_2_259: |
| 25191 | nop |
| 25192 | ta T_CHANGE_HPRIV ! macro |
| 25193 | rd %pc, %r12 |
| 25194 | add %r12, (donretarg_2_259-donret_2_259-4), %r12 |
| 25195 | mov 0x38, %r18 |
| 25196 | stxa %r12, [%r18]0x58 |
| 25197 | add %r12, 0x4, %r11 |
| 25198 | wrpr %g0, 0x1, %tl |
| 25199 | wrpr %g0, %r12, %tpc |
| 25200 | wrpr %g0, %r11, %tnpc |
| 25201 | set (0x009a060f | (0x55 << 24)), %r13 |
| 25202 | rdpr %tstate, %r16 |
| 25203 | mov 0x1f, %r19 |
| 25204 | and %r19, %r16, %r17 |
| 25205 | andn %r16, %r19, %r16 |
| 25206 | or %r16, %r17, %r20 |
| 25207 | wrpr %r20, %g0, %tstate |
| 25208 | wrhpr %g0, 0x556, %htstate |
| 25209 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 25210 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 25211 | done |
| 25212 | donretarg_2_259: |
| 25213 | .word 0x93a049d4 ! 345: FDIVd fdivd %f32, %f20, %f40 |
| 25214 | jmptr_2_260: |
| 25215 | nop |
| 25216 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25217 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 25218 | .word 0x91a00169 ! 347: FABSq dis not found |
| 25219 | |
| 25220 | .word 0x98c36d2a ! 348: ADDCcc_I addccc %r13, 0x0d2a, %r12 |
| 25221 | mondo_2_262: |
| 25222 | nop |
| 25223 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25224 | stxa %r16, [%r0+0x3c8] %asi |
| 25225 | .word 0x9d948012 ! 349: WRPR_WSTATE_R wrpr %r18, %r18, %wstate |
| 25226 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 25227 | .word 0x8d903ed9 ! 350: WRPR_PSTATE_I wrpr %r0, 0x1ed9, %pstate |
| 25228 | .word 0xc19fe0e0 ! 351: LDDFA_I ldda [%r31, 0x00e0], %f0 |
| 25229 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 25230 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 25231 | reduce_priv_lvl_2_265: |
| 25232 | ta T_CHANGE_NONHPRIV ! macro |
| 25233 | #if (defined SPC || defined CMP) |
| 25234 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_266) + 0, 16, 16)) -> intp(5,0,6) |
| 25235 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_266)&0xffffffff) + 0, 16, 16)) -> intp(5,0,6) |
| 25236 | #else |
| 25237 | setx 0x3417e8d1db359628, %r1, %r28 |
| 25238 | stxa %r28, [%g0] 0x73 |
| 25239 | #endif |
| 25240 | intvec_2_266: |
| 25241 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25242 | vahole_2_267: |
| 25243 | nop |
| 25244 | ta T_CHANGE_NONHPRIV |
| 25245 | setx vahole_target1, %r18, %r27 |
| 25246 | jmpl %r27+0, %r27 |
| 25247 | .word 0xe6dfc033 ! 355: LDXA_R ldxa [%r31, %r19] 0x01, %r19 |
| 25248 | .word 0xc19fe0a0 ! 356: LDDFA_I ldda [%r31, 0x00a0], %f0 |
| 25249 | #if (defined SPC || defined CMP) |
| 25250 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_268)+32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25251 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_268)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25252 | #else |
| 25253 | !! TODO:Generate XIR via RESET_GEN register |
| 25254 | ! setx 0x8900000808, %r16, %r17 |
| 25255 | ! mov 0x2, %r16 |
| 25256 | ! stw %r16, [%r17] |
| 25257 | #endif |
| 25258 | xir_2_268: |
| 25259 | .word 0xa98477d2 ! 357: WR_SET_SOFTINT_I wr %r17, 0x17d2, %set_softint |
| 25260 | setx 0x69c1ff7b1b3525ea, %r1, %r28 |
| 25261 | stxa %r28, [%g0] 0x73 |
| 25262 | intvec_2_269: |
| 25263 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25264 | nop |
| 25265 | ta T_CHANGE_HPRIV |
| 25266 | mov 0x2+1, %r10 |
| 25267 | set sync_thr_counter5, %r23 |
| 25268 | #ifndef SPC |
| 25269 | ldxa [%g0]0x63, %o1 |
| 25270 | and %o1, 0x38, %o1 |
| 25271 | add %o1, %r23, %r23 |
| 25272 | sllx %o1, 5, %o3 !(CID*256) |
| 25273 | #endif |
| 25274 | cas [%r23],%g0,%r10 !lock |
| 25275 | brnz %r10, cwq_2_270 |
| 25276 | rd %asi, %r12 |
| 25277 | wr %g0, 0x40, %asi |
| 25278 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 25279 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 25280 | cmp %l1, 1 |
| 25281 | bne cwq_2_270 |
| 25282 | set CWQ_BASE, %l6 |
| 25283 | #ifndef SPC |
| 25284 | add %l6, %o3, %l6 |
| 25285 | #endif |
| 25286 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 25287 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 25288 | sllx %l2, 32, %l2 |
| 25289 | stx %l2, [%l6 + 0x0] |
| 25290 | membar #Sync |
| 25291 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 25292 | sub %l2, 0x40, %l2 |
| 25293 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 25294 | wr %r12, %g0, %asi |
| 25295 | st %g0, [%r23] |
| 25296 | cwq_2_270: |
| 25297 | ta T_CHANGE_NONHPRIV |
| 25298 | .word 0xa7414000 ! 359: RDPC rd %pc, %r19 |
| 25299 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 25300 | br_longdelay1_2_272: |
| 25301 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 25302 | .word 0xbfe7c000 ! 361: SAVE_R save %r31, %r0, %r31 |
| 25303 | fpinit_2_273: |
| 25304 | nop |
| 25305 | setx fp_data_quads, %r19, %r20 |
| 25306 | ldd [%r20], %f0 |
| 25307 | ldd [%r20+8], %f4 |
| 25308 | ld [%r20+16], %fsr |
| 25309 | ld [%r20+24], %r19 |
| 25310 | wr %r19, %g0, %gsr |
| 25311 | .word 0xc3e8376b ! 362: PREFETCHA_I prefetcha [%r0, + 0xfffff76b] %asi, #one_read |
| 25312 | jmptr_2_274: |
| 25313 | nop |
| 25314 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25315 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 25316 | ta T_CHANGE_NONHPRIV |
| 25317 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 25318 | intveclr_2_276: |
| 25319 | nop |
| 25320 | ta T_CHANGE_HPRIV |
| 25321 | setx 0x895e0c796d001ff9, %r1, %r28 |
| 25322 | stxa %r28, [%g0] 0x72 |
| 25323 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 25324 | nop |
| 25325 | ta T_CHANGE_HPRIV |
| 25326 | mov 0x2+1, %r10 |
| 25327 | set sync_thr_counter5, %r23 |
| 25328 | #ifndef SPC |
| 25329 | ldxa [%g0]0x63, %o1 |
| 25330 | and %o1, 0x38, %o1 |
| 25331 | add %o1, %r23, %r23 |
| 25332 | sllx %o1, 5, %o3 !(CID*256) |
| 25333 | #endif |
| 25334 | cas [%r23],%g0,%r10 !lock |
| 25335 | brnz %r10, cwq_2_277 |
| 25336 | rd %asi, %r12 |
| 25337 | wr %g0, 0x40, %asi |
| 25338 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 25339 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 25340 | cmp %l1, 1 |
| 25341 | bne cwq_2_277 |
| 25342 | set CWQ_BASE, %l6 |
| 25343 | #ifndef SPC |
| 25344 | add %l6, %o3, %l6 |
| 25345 | #endif |
| 25346 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 25347 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 25348 | sllx %l2, 32, %l2 |
| 25349 | stx %l2, [%l6 + 0x0] |
| 25350 | membar #Sync |
| 25351 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 25352 | sub %l2, 0x40, %l2 |
| 25353 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 25354 | wr %r12, %g0, %asi |
| 25355 | st %g0, [%r23] |
| 25356 | cwq_2_277: |
| 25357 | ta T_CHANGE_NONHPRIV |
| 25358 | .word 0x93414000 ! 366: RDPC rd %pc, %r9 |
| 25359 | brcommon3_2_278: |
| 25360 | nop |
| 25361 | setx common_target, %r12, %r27 |
| 25362 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 25363 | ba,a .+12 |
| 25364 | .word 0xd937c010 ! 1: STQF_R - %f12, [%r16, %r31] |
| 25365 | ba,a .+8 |
| 25366 | jmpl %r27+0, %r27 |
| 25367 | .word 0xd83fe130 ! 367: STD_I std %r12, [%r31 + 0x0130] |
| 25368 | .word 0xd827e08c ! 368: STW_I stw %r12, [%r31 + 0x008c] |
| 25369 | .word 0xd8c7e1b0 ! 369: LDSWA_I ldswa [%r31, + 0x01b0] %asi, %r12 |
| 25370 | #if (defined SPC || defined CMP) |
| 25371 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_279)+0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25372 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_279)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25373 | #else |
| 25374 | !! TODO:Generate XIR via RESET_GEN register |
| 25375 | ! setx 0x8900000808, %r16, %r17 |
| 25376 | ! mov 0x2, %r16 |
| 25377 | ! stw %r16, [%r17] |
| 25378 | #endif |
| 25379 | xir_2_279: |
| 25380 | .word 0xa9847140 ! 370: WR_SET_SOFTINT_I wr %r17, 0x1140, %set_softint |
| 25381 | nop |
| 25382 | ta T_CHANGE_HPRIV |
| 25383 | mov 0x2+1, %r10 |
| 25384 | set sync_thr_counter5, %r23 |
| 25385 | #ifndef SPC |
| 25386 | ldxa [%g0]0x63, %o1 |
| 25387 | and %o1, 0x38, %o1 |
| 25388 | add %o1, %r23, %r23 |
| 25389 | sllx %o1, 5, %o3 !(CID*256) |
| 25390 | #endif |
| 25391 | cas [%r23],%g0,%r10 !lock |
| 25392 | brnz %r10, cwq_2_280 |
| 25393 | rd %asi, %r12 |
| 25394 | wr %g0, 0x40, %asi |
| 25395 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 25396 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 25397 | cmp %l1, 1 |
| 25398 | bne cwq_2_280 |
| 25399 | set CWQ_BASE, %l6 |
| 25400 | #ifndef SPC |
| 25401 | add %l6, %o3, %l6 |
| 25402 | #endif |
| 25403 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 25404 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 25405 | sllx %l2, 32, %l2 |
| 25406 | stx %l2, [%l6 + 0x0] |
| 25407 | membar #Sync |
| 25408 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 25409 | sub %l2, 0x40, %l2 |
| 25410 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 25411 | wr %r12, %g0, %asi |
| 25412 | st %g0, [%r23] |
| 25413 | cwq_2_280: |
| 25414 | ta T_CHANGE_NONHPRIV |
| 25415 | .word 0xa7414000 ! 371: RDPC rd %pc, %r19 |
| 25416 | .word 0xd4cfe1e0 ! 372: LDSBA_I ldsba [%r31, + 0x01e0] %asi, %r10 |
| 25417 | splash_cmpr_2_281: |
| 25418 | mov 1, %r18 |
| 25419 | sllx %r18, 63, %r18 |
| 25420 | rd %tick, %r17 |
| 25421 | add %r17, 0x50, %r17 |
| 25422 | or %r17, %r18, %r17 |
| 25423 | ta T_CHANGE_HPRIV |
| 25424 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 25425 | .word 0xb3800011 ! 373: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 25426 | nop |
| 25427 | ta T_CHANGE_HPRIV |
| 25428 | mov 0x2, %r10 |
| 25429 | set sync_thr_counter6, %r23 |
| 25430 | #ifndef SPC |
| 25431 | ldxa [%g0]0x63, %o1 |
| 25432 | and %o1, 0x38, %o1 |
| 25433 | add %o1, %r23, %r23 |
| 25434 | #endif |
| 25435 | cas [%r23],%g0,%r10 !lock |
| 25436 | brnz %r10, sma_2_282 |
| 25437 | rd %asi, %r12 |
| 25438 | wr %g0, 0x40, %asi |
| 25439 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25440 | set 0x00021fff, %g1 |
| 25441 | stxa %g1, [%g0 + 0x80] %asi |
| 25442 | wr %r12, %g0, %asi |
| 25443 | st %g0, [%r23] |
| 25444 | sma_2_282: |
| 25445 | ta T_CHANGE_NONHPRIV |
| 25446 | .word 0xd5e7e011 ! 374: CASA_R casa [%r31] %asi, %r17, %r10 |
| 25447 | br_badelay2_2_283: |
| 25448 | .word 0xa5a509c9 ! 1: FDIVd fdivd %f20, %f40, %f18 |
| 25449 | pdist %f8, %f0, %f2 |
| 25450 | .word 0xa7b48312 ! 375: ALIGNADDRESS alignaddr %r18, %r18, %r19 |
| 25451 | .word 0xe19fe0c0 ! 376: LDDFA_I ldda [%r31, 0x00c0], %f16 |
| 25452 | .word 0xc30fc00b ! 1: LDXFSR_R ld-fsr [%r31, %r11], %f1 |
| 25453 | .word 0x9f80288a ! 377: SIR sir 0x088a |
| 25454 | .word 0xc1bfd960 ! 378: STDFA_R stda %f0, [%r0, %r31] |
| 25455 | .word 0xa8d9c009 ! 379: SMULcc_R smulcc %r7, %r9, %r20 |
| 25456 | bgu,a skip_2_284 |
| 25457 | brgez,pn %r1, skip_2_284 |
| 25458 | .align 2048 |
| 25459 | skip_2_284: |
| 25460 | .word 0xe83fc000 ! 380: STD_R std %r20, [%r31 + %r0] |
| 25461 | nop |
| 25462 | ta T_CHANGE_HPRIV |
| 25463 | mov 0x2+1, %r10 |
| 25464 | set sync_thr_counter5, %r23 |
| 25465 | #ifndef SPC |
| 25466 | ldxa [%g0]0x63, %o1 |
| 25467 | and %o1, 0x38, %o1 |
| 25468 | add %o1, %r23, %r23 |
| 25469 | sllx %o1, 5, %o3 !(CID*256) |
| 25470 | #endif |
| 25471 | cas [%r23],%g0,%r10 !lock |
| 25472 | brnz %r10, cwq_2_285 |
| 25473 | rd %asi, %r12 |
| 25474 | wr %g0, 0x40, %asi |
| 25475 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 25476 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 25477 | cmp %l1, 1 |
| 25478 | bne cwq_2_285 |
| 25479 | set CWQ_BASE, %l6 |
| 25480 | #ifndef SPC |
| 25481 | add %l6, %o3, %l6 |
| 25482 | #endif |
| 25483 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 25484 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 25485 | sllx %l2, 32, %l2 |
| 25486 | stx %l2, [%l6 + 0x0] |
| 25487 | membar #Sync |
| 25488 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 25489 | sub %l2, 0x40, %l2 |
| 25490 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 25491 | wr %r12, %g0, %asi |
| 25492 | st %g0, [%r23] |
| 25493 | cwq_2_285: |
| 25494 | ta T_CHANGE_NONHPRIV |
| 25495 | .word 0x93414000 ! 381: RDPC rd %pc, %r9 |
| 25496 | brcommon3_2_286: |
| 25497 | nop |
| 25498 | setx common_target, %r12, %r27 |
| 25499 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 25500 | ba,a .+12 |
| 25501 | .word 0xdb37c014 ! 1: STQF_R - %f13, [%r20, %r31] |
| 25502 | ba,a .+8 |
| 25503 | jmpl %r27+0, %r27 |
| 25504 | .word 0xc32fc013 ! 382: STXFSR_R st-sfr %f1, [%r19, %r31] |
| 25505 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 25506 | .word 0xdadfc02d ! 384: LDXA_R ldxa [%r31, %r13] 0x01, %r13 |
| 25507 | #if (defined SPC || defined CMP) |
| 25508 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_288) + 24, 16, 16)) -> intp(4,0,27) |
| 25509 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_288)&0xffffffff) + 24, 16, 16)) -> intp(4,0,27) |
| 25510 | #else |
| 25511 | setx 0xebd0bd873d634b60, %r1, %r28 |
| 25512 | stxa %r28, [%g0] 0x73 |
| 25513 | #endif |
| 25514 | intvec_2_288: |
| 25515 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25516 | tagged_2_289: |
| 25517 | taddcctv %r6, 0x1099, %r10 |
| 25518 | .word 0xda07e16c ! 386: LDUW_I lduw [%r31 + 0x016c], %r13 |
| 25519 | ibp_2_290: |
| 25520 | nop |
| 25521 | ta T_CHANGE_HPRIV |
| 25522 | mov 8, %r18 |
| 25523 | rd %asi, %r12 |
| 25524 | wr %r0, 0x41, %asi |
| 25525 | set sync_thr_counter4, %r23 |
| 25526 | #ifndef SPC |
| 25527 | ldxa [%g0]0x63, %r8 |
| 25528 | and %r8, 0x38, %r8 ! Core ID |
| 25529 | add %r8, %r23, %r23 |
| 25530 | #else |
| 25531 | mov 0, %r8 |
| 25532 | #endif |
| 25533 | mov 0x2, %r16 |
| 25534 | ibp_startwait2_290: |
| 25535 | cas [%r23],%g0,%r16 !lock |
| 25536 | brz,a %r16, continue_ibp_2_290 |
| 25537 | mov (~0x2&0xf), %r16 |
| 25538 | ld [%r23], %r16 |
| 25539 | ibp_wait2_290: |
| 25540 | brnz %r16, ibp_wait2_290 |
| 25541 | ld [%r23], %r16 |
| 25542 | ba ibp_startwait2_290 |
| 25543 | mov 0x2, %r16 |
| 25544 | continue_ibp_2_290: |
| 25545 | sllx %r16, %r8, %r16 !Mask for my core only |
| 25546 | ldxa [0x58]%asi, %r17 !Running_status |
| 25547 | wait_for_stat_2_290: |
| 25548 | ldxa [0x50]%asi, %r13 !Running_rw |
| 25549 | cmp %r13, %r17 |
| 25550 | bne,a wait_for_stat_2_290 |
| 25551 | ldxa [0x58]%asi, %r17 !Running_status |
| 25552 | stxa %r16, [0x68]%asi !Park (W1C) |
| 25553 | ldxa [0x50]%asi, %r14 !Running_rw |
| 25554 | wait_for_ibp_2_290: |
| 25555 | ldxa [0x58]%asi, %r17 !Running_status |
| 25556 | cmp %r14, %r17 |
| 25557 | bne,a wait_for_ibp_2_290 |
| 25558 | ldxa [0x50]%asi, %r14 !Running_rw |
| 25559 | ibp_doit2_290: |
| 25560 | best_set_reg(0x0000005092f1c287,%r19, %r20) |
| 25561 | stxa %r20, [%r18]0x42 |
| 25562 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 25563 | st %g0, [%r23] !clear lock |
| 25564 | wr %r0, %r12, %asi !restore %asi |
| 25565 | .word 0xc19fc3e0 ! 387: LDDFA_R ldda [%r31, %r0], %f0 |
| 25566 | cwp_2_291: |
| 25567 | set user_data_start, %o7 |
| 25568 | .word 0x93902003 ! 388: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 25569 | pmu_2_292: |
| 25570 | nop |
| 25571 | ta T_CHANGE_PRIV |
| 25572 | setx 0xfffffc35fffffb04, %g1, %g7 |
| 25573 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25574 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 25575 | reduce_priv_lvl_2_293: |
| 25576 | ta T_CHANGE_NONPRIV ! macro |
| 25577 | ceter_2_294: |
| 25578 | nop |
| 25579 | ta T_CHANGE_HPRIV |
| 25580 | mov 7, %r17 |
| 25581 | sllx %r17, 60, %r17 |
| 25582 | mov 0x18, %r16 |
| 25583 | stxa %r17, [%r16]0x4c |
| 25584 | .word 0xa9410000 ! 391: RDTICK rd %tick, %r20 |
| 25585 | cwp_2_295: |
| 25586 | set user_data_start, %o7 |
| 25587 | .word 0x93902003 ! 392: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 25588 | splash_lsu_2_296: |
| 25589 | nop |
| 25590 | ta T_CHANGE_HPRIV |
| 25591 | set 0x50631bab, %r2 |
| 25592 | mov 0x2, %r1 |
| 25593 | sllx %r1, 32, %r1 |
| 25594 | or %r1, %r2, %r2 |
| 25595 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 25596 | ta T_CHANGE_NONHPRIV |
| 25597 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 25598 | intveclr_2_297: |
| 25599 | nop |
| 25600 | ta T_CHANGE_HPRIV |
| 25601 | setx 0x7c3ce77f8b555720, %r1, %r28 |
| 25602 | stxa %r28, [%g0] 0x72 |
| 25603 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 25604 | nop |
| 25605 | mov 0x80, %g3 |
| 25606 | stxa %g3, [%g3] 0x5f |
| 25607 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 25608 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 25609 | reduce_priv_lvl_2_298: |
| 25610 | ta T_CHANGE_NONPRIV ! macro |
| 25611 | dvapa_2_299: |
| 25612 | nop |
| 25613 | ta T_CHANGE_HPRIV |
| 25614 | mov 0xe8a, %r20 |
| 25615 | mov 0x1b, %r19 |
| 25616 | sllx %r20, 23, %r20 |
| 25617 | or %r19, %r20, %r19 |
| 25618 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 25619 | mov 0x38, %r18 |
| 25620 | stxa %r31, [%r18]0x58 |
| 25621 | ta T_CHANGE_NONHPRIV |
| 25622 | .word 0xe297c02d ! 397: LDUHA_R lduha [%r31, %r13] 0x01, %r17 |
| 25623 | mondo_2_300: |
| 25624 | nop |
| 25625 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25626 | stxa %r17, [%r0+0x3e0] %asi |
| 25627 | .word 0x9d94800c ! 398: WRPR_WSTATE_R wrpr %r18, %r12, %wstate |
| 25628 | .word 0xc19fde00 ! 399: LDDFA_R ldda [%r31, %r0], %f0 |
| 25629 | splash_decr_2_301: |
| 25630 | nop |
| 25631 | ta T_CHANGE_HPRIV |
| 25632 | mov 8, %r1 |
| 25633 | stxa %r20, [%r1] 0x45 |
| 25634 | .word 0xa780c013 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r3, %r19, %- |
| 25635 | #if (defined SPC || defined CMP) |
| 25636 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_302) + 40, 16, 16)) -> intp(6,0,3) |
| 25637 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_302)&0xffffffff) + 40, 16, 16)) -> intp(6,0,3) |
| 25638 | #else |
| 25639 | setx 0xae2e50a68efac38f, %r1, %r28 |
| 25640 | stxa %r28, [%g0] 0x73 |
| 25641 | #endif |
| 25642 | intvec_2_302: |
| 25643 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25644 | brcommon2_2_303: |
| 25645 | nop |
| 25646 | setx common_target, %r12, %r27 |
| 25647 | ba,a .+12 |
| 25648 | .word 0x93a00553 ! 1: FSQRTd fsqrt |
| 25649 | ba,a .+8 |
| 25650 | jmpl %r27+0, %r27 |
| 25651 | .word 0xe1bfe060 ! 402: STDFA_I stda %f16, [0x0060, %r31] |
| 25652 | nop |
| 25653 | ta T_CHANGE_HPRIV |
| 25654 | mov 0x2, %r10 |
| 25655 | set sync_thr_counter6, %r23 |
| 25656 | #ifndef SPC |
| 25657 | ldxa [%g0]0x63, %o1 |
| 25658 | and %o1, 0x38, %o1 |
| 25659 | add %o1, %r23, %r23 |
| 25660 | #endif |
| 25661 | cas [%r23],%g0,%r10 !lock |
| 25662 | brnz %r10, sma_2_304 |
| 25663 | rd %asi, %r12 |
| 25664 | wr %g0, 0x40, %asi |
| 25665 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25666 | set 0x00021fff, %g1 |
| 25667 | stxa %g1, [%g0 + 0x80] %asi |
| 25668 | wr %r12, %g0, %asi |
| 25669 | st %g0, [%r23] |
| 25670 | sma_2_304: |
| 25671 | ta T_CHANGE_NONHPRIV |
| 25672 | .word 0xd3e7e013 ! 403: CASA_R casa [%r31] %asi, %r19, %r9 |
| 25673 | pmu_2_305: |
| 25674 | nop |
| 25675 | setx 0xfffff800fffffba3, %g1, %g7 |
| 25676 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25677 | jmptr_2_306: |
| 25678 | nop |
| 25679 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25680 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 25681 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 25682 | #if (defined SPC || defined CMP) |
| 25683 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_308) + 32, 16, 16)) -> intp(4,0,5) |
| 25684 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_308)&0xffffffff) + 32, 16, 16)) -> intp(4,0,5) |
| 25685 | #else |
| 25686 | setx 0xcff40e605a2f1559, %r1, %r28 |
| 25687 | stxa %r28, [%g0] 0x73 |
| 25688 | #endif |
| 25689 | intvec_2_308: |
| 25690 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25691 | splash_hpstate_2_309: |
| 25692 | .word 0x819824d1 ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x04d1, %hpstate |
| 25693 | br_badelay2_2_310: |
| 25694 | .word 0x97a1c9d1 ! 1: FDIVd fdivd %f38, %f48, %f42 |
| 25695 | pdist %f12, %f12, %f26 |
| 25696 | .word 0x91b44312 ! 409: ALIGNADDRESS alignaddr %r17, %r18, %r8 |
| 25697 | splash_cmpr_2_311: |
| 25698 | mov 0, %r18 |
| 25699 | sllx %r18, 63, %r18 |
| 25700 | rd %tick, %r17 |
| 25701 | add %r17, 0x50, %r17 |
| 25702 | or %r17, %r18, %r17 |
| 25703 | ta T_CHANGE_HPRIV |
| 25704 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 25705 | ta T_CHANGE_PRIV |
| 25706 | .word 0xb3800011 ! 410: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 25707 | nop |
| 25708 | ta T_CHANGE_HPRIV |
| 25709 | mov 0x2, %r10 |
| 25710 | set sync_thr_counter6, %r23 |
| 25711 | #ifndef SPC |
| 25712 | ldxa [%g0]0x63, %o1 |
| 25713 | and %o1, 0x38, %o1 |
| 25714 | add %o1, %r23, %r23 |
| 25715 | #endif |
| 25716 | cas [%r23],%g0,%r10 !lock |
| 25717 | brnz %r10, sma_2_312 |
| 25718 | rd %asi, %r12 |
| 25719 | wr %g0, 0x40, %asi |
| 25720 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 25721 | set 0x00061fff, %g1 |
| 25722 | stxa %g1, [%g0 + 0x80] %asi |
| 25723 | wr %r12, %g0, %asi |
| 25724 | st %g0, [%r23] |
| 25725 | sma_2_312: |
| 25726 | ta T_CHANGE_NONHPRIV |
| 25727 | .word 0xe5e7e013 ! 411: CASA_R casa [%r31] %asi, %r19, %r18 |
| 25728 | #if (defined SPC || defined CMP) |
| 25729 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_313)+0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25730 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_313)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 25731 | #else |
| 25732 | !! TODO:Generate XIR via RESET_GEN register |
| 25733 | ! setx 0x8900000808, %r16, %r17 |
| 25734 | ! mov 0x2, %r16 |
| 25735 | ! stw %r16, [%r17] |
| 25736 | #endif |
| 25737 | xir_2_313: |
| 25738 | .word 0xa98475a5 ! 412: WR_SET_SOFTINT_I wr %r17, 0x15a5, %set_softint |
| 25739 | memptr_2_314: |
| 25740 | set 0x60140000, %r31 |
| 25741 | .word 0x85846164 ! 413: WRCCR_I wr %r17, 0x0164, %ccr |
| 25742 | .word 0x91904002 ! 414: WRPR_PIL_R wrpr %r1, %r2, %pil |
| 25743 | .word 0xe49fe050 ! 1: LDDA_I ldda [%r31, + 0x0050] %asi, %r18 |
| 25744 | .word 0x9f80387c ! 415: SIR sir 0x187c |
| 25745 | nop |
| 25746 | ta T_CHANGE_HPRIV |
| 25747 | mov 0x2+1, %r10 |
| 25748 | set sync_thr_counter5, %r23 |
| 25749 | #ifndef SPC |
| 25750 | ldxa [%g0]0x63, %o1 |
| 25751 | and %o1, 0x38, %o1 |
| 25752 | add %o1, %r23, %r23 |
| 25753 | sllx %o1, 5, %o3 !(CID*256) |
| 25754 | #endif |
| 25755 | cas [%r23],%g0,%r10 !lock |
| 25756 | brnz %r10, cwq_2_316 |
| 25757 | rd %asi, %r12 |
| 25758 | wr %g0, 0x40, %asi |
| 25759 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 25760 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 25761 | cmp %l1, 1 |
| 25762 | bne cwq_2_316 |
| 25763 | set CWQ_BASE, %l6 |
| 25764 | #ifndef SPC |
| 25765 | add %l6, %o3, %l6 |
| 25766 | #endif |
| 25767 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 25768 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 25769 | sllx %l2, 32, %l2 |
| 25770 | stx %l2, [%l6 + 0x0] |
| 25771 | membar #Sync |
| 25772 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 25773 | sub %l2, 0x40, %l2 |
| 25774 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 25775 | wr %r12, %g0, %asi |
| 25776 | st %g0, [%r23] |
| 25777 | cwq_2_316: |
| 25778 | ta T_CHANGE_NONHPRIV |
| 25779 | .word 0xa7414000 ! 416: RDPC rd %pc, %r19 |
| 25780 | intveclr_2_317: |
| 25781 | nop |
| 25782 | ta T_CHANGE_HPRIV |
| 25783 | setx 0xfe758089cdc2bfc2, %r1, %r28 |
| 25784 | stxa %r28, [%g0] 0x72 |
| 25785 | ta T_CHANGE_NONHPRIV |
| 25786 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 25787 | splash_cmpr_2_318: |
| 25788 | mov 0, %r18 |
| 25789 | sllx %r18, 63, %r18 |
| 25790 | rd %tick, %r17 |
| 25791 | add %r17, 0x70, %r17 |
| 25792 | or %r17, %r18, %r17 |
| 25793 | ta T_CHANGE_HPRIV |
| 25794 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 25795 | ta T_CHANGE_PRIV |
| 25796 | .word 0xb3800011 ! 418: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 25797 | setx 0x55f10995c4035ddf, %r1, %r28 |
| 25798 | stxa %r28, [%g0] 0x73 |
| 25799 | intvec_2_319: |
| 25800 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25801 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 25802 | reduce_priv_lvl_2_320: |
| 25803 | ta T_CHANGE_NONHPRIV ! macro |
| 25804 | mondo_2_321: |
| 25805 | nop |
| 25806 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25807 | stxa %r10, [%r0+0x3c8] %asi |
| 25808 | .word 0x9d944009 ! 421: WRPR_WSTATE_R wrpr %r17, %r9, %wstate |
| 25809 | splash_lsu_2_322: |
| 25810 | nop |
| 25811 | ta T_CHANGE_HPRIV |
| 25812 | set 0xdf24f5ef, %r2 |
| 25813 | mov 0x6, %r1 |
| 25814 | sllx %r1, 32, %r1 |
| 25815 | or %r1, %r2, %r2 |
| 25816 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 25817 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 25818 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 25819 | .word 0xda3fe054 ! 424: STD_I std %r13, [%r31 + 0x0054] |
| 25820 | .word 0x93d020b3 ! 425: Tcc_I tne icc_or_xcc, %r0 + 179 |
| 25821 | otherw |
| 25822 | mov 0x34, %r30 |
| 25823 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 25824 | .word 0x2cccc001 ! 1: BRGZ brgz,a,pt %r19,<label_0xcc001> |
| 25825 | .word 0x8d9036cf ! 427: WRPR_PSTATE_I wrpr %r0, 0x16cf, %pstate |
| 25826 | br_badelay2_2_324: |
| 25827 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 25828 | allclean |
| 25829 | .word 0xa3b40308 ! 428: ALIGNADDRESS alignaddr %r16, %r8, %r17 |
| 25830 | vahole_2_325: |
| 25831 | nop |
| 25832 | ta T_CHANGE_NONHPRIV |
| 25833 | setx vahole_target0, %r18, %r27 |
| 25834 | jmpl %r27+0, %r27 |
| 25835 | .word 0xc32fc00d ! 429: STXFSR_R st-sfr %f1, [%r13, %r31] |
| 25836 | #if (defined SPC || defined CMP) |
| 25837 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_326) + 48, 16, 16)) -> intp(0,0,4) |
| 25838 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_326)&0xffffffff) + 48, 16, 16)) -> intp(0,0,4) |
| 25839 | #else |
| 25840 | setx 0xa8554a1f7c49f765, %r1, %r28 |
| 25841 | stxa %r28, [%g0] 0x73 |
| 25842 | #endif |
| 25843 | intvec_2_326: |
| 25844 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25845 | splash_hpstate_2_327: |
| 25846 | ta T_CHANGE_NONHPRIV |
| 25847 | .word 0x819833cf ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x13cf, %hpstate |
| 25848 | splash_htba_2_328: |
| 25849 | nop |
| 25850 | ta T_CHANGE_HPRIV |
| 25851 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 25852 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 25853 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 25854 | .word 0x93b40552 ! 434: FCMPEQ16 fcmpeq16 %d16, %d18, %r9 |
| 25855 | donret_2_329: |
| 25856 | nop |
| 25857 | ta T_CHANGE_HPRIV ! macro |
| 25858 | rd %pc, %r12 |
| 25859 | add %r12, (donretarg_2_329-donret_2_329-4), %r12 |
| 25860 | mov 0x38, %r18 |
| 25861 | stxa %r12, [%r18]0x58 |
| 25862 | add %r12, 0x4, %r11 |
| 25863 | wrpr %g0, 0x2, %tl |
| 25864 | wrpr %g0, %r12, %tpc |
| 25865 | wrpr %g0, %r11, %tnpc |
| 25866 | set (0x00608b11 | (0x4f << 24)), %r13 |
| 25867 | rdpr %tstate, %r16 |
| 25868 | mov 0x1f, %r19 |
| 25869 | and %r19, %r16, %r17 |
| 25870 | andn %r16, %r19, %r16 |
| 25871 | or %r16, %r17, %r20 |
| 25872 | wrpr %r20, %g0, %tstate |
| 25873 | wrhpr %g0, 0x54a, %htstate |
| 25874 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 25875 | done |
| 25876 | donretarg_2_329: |
| 25877 | .word 0xd8ffe1c8 ! 435: SWAPA_I swapa %r12, [%r31 + 0x01c8] %asi |
| 25878 | .word 0x99a04d26 ! 436: FsMULd fsmuld %f1, %f6, %f12 |
| 25879 | splash_tba_2_330: |
| 25880 | ta T_CHANGE_PRIV |
| 25881 | setx 0x00000004003a0000, %r11, %r12 |
| 25882 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 25883 | nop |
| 25884 | mov 0x80, %g3 |
| 25885 | stxa %g3, [%g3] 0x5f |
| 25886 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 25887 | nop |
| 25888 | mov 0x80, %g3 |
| 25889 | stxa %g3, [%g3] 0x57 |
| 25890 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 25891 | donret_2_331: |
| 25892 | nop |
| 25893 | ta T_CHANGE_HPRIV ! macro |
| 25894 | rd %pc, %r12 |
| 25895 | add %r12, (donretarg_2_331-donret_2_331-4), %r12 |
| 25896 | mov 0x38, %r18 |
| 25897 | stxa %r12, [%r18]0x58 |
| 25898 | add %r12, 0x4, %r11 |
| 25899 | wrpr %g0, 0x2, %tl |
| 25900 | wrpr %g0, %r12, %tpc |
| 25901 | wrpr %g0, %r11, %tnpc |
| 25902 | set (0x00ac9fba | (0x55 << 24)), %r13 |
| 25903 | rdpr %tstate, %r16 |
| 25904 | mov 0x1f, %r19 |
| 25905 | and %r19, %r16, %r17 |
| 25906 | andn %r16, %r19, %r16 |
| 25907 | or %r16, %r17, %r20 |
| 25908 | wrpr %r20, %g0, %tstate |
| 25909 | wrhpr %g0, 0xe1f, %htstate |
| 25910 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 25911 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> |
| 25912 | done |
| 25913 | donretarg_2_331: |
| 25914 | .word 0xe26fe080 ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x0080] |
| 25915 | donret_2_332: |
| 25916 | nop |
| 25917 | ta T_CHANGE_HPRIV ! macro |
| 25918 | rd %pc, %r12 |
| 25919 | add %r12, (donretarg_2_332-donret_2_332-8), %r12 |
| 25920 | mov 0x38, %r18 |
| 25921 | stxa %r12, [%r18]0x58 |
| 25922 | add %r12, 0x4, %r11 |
| 25923 | wrpr %g0, 0x1, %tl |
| 25924 | wrpr %g0, %r12, %tpc |
| 25925 | wrpr %g0, %r11, %tnpc |
| 25926 | set (0x003cc299 | (16 << 24)), %r13 |
| 25927 | rdpr %tstate, %r16 |
| 25928 | mov 0x1f, %r19 |
| 25929 | and %r19, %r16, %r17 |
| 25930 | andn %r16, %r19, %r16 |
| 25931 | or %r16, %r17, %r20 |
| 25932 | wrpr %r20, %g0, %tstate |
| 25933 | wrhpr %g0, 0x154d, %htstate |
| 25934 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 25935 | retry |
| 25936 | donretarg_2_332: |
| 25937 | .word 0xa3a449d4 ! 441: FDIVd fdivd %f48, %f20, %f48 |
| 25938 | setx 0x35ee5e93315e8cdf, %r1, %r28 |
| 25939 | stxa %r28, [%g0] 0x73 |
| 25940 | intvec_2_333: |
| 25941 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 25942 | .word 0xe88fe098 ! 443: LDUBA_I lduba [%r31, + 0x0098] %asi, %r20 |
| 25943 | .word 0xe937e0cd ! 444: STQF_I - %f20, [0x00cd, %r31] |
| 25944 | ta T_CHANGE_NONHPRIV |
| 25945 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 25946 | .word 0x97a4c9a3 ! 446: FDIVs fdivs %f19, %f3, %f11 |
| 25947 | brcommon2_2_336: |
| 25948 | nop |
| 25949 | setx common_target, %r12, %r27 |
| 25950 | ba,a .+12 |
| 25951 | .word 0xe7120012 ! 1: LDQF_R - [%r8, %r18], %f19 |
| 25952 | ba,a .+8 |
| 25953 | jmpl %r27+0, %r27 |
| 25954 | .word 0xc1bfc2c0 ! 447: STDFA_R stda %f0, [%r0, %r31] |
| 25955 | .word 0xa24b0006 ! 448: MULX_R mulx %r12, %r6, %r17 |
| 25956 | splash_lsu_2_337: |
| 25957 | nop |
| 25958 | ta T_CHANGE_HPRIV |
| 25959 | set 0x04d59e84, %r2 |
| 25960 | mov 0x4, %r1 |
| 25961 | sllx %r1, 32, %r1 |
| 25962 | or %r1, %r2, %r2 |
| 25963 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 25964 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 25965 | mondo_2_338: |
| 25966 | nop |
| 25967 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 25968 | ta T_CHANGE_PRIV |
| 25969 | stxa %r17, [%r0+0x3c8] %asi |
| 25970 | .word 0x9d948010 ! 450: WRPR_WSTATE_R wrpr %r18, %r16, %wstate |
| 25971 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 25972 | splash_hpstate_2_340: |
| 25973 | ta T_CHANGE_NONHPRIV |
| 25974 | .word 0x2cc98001 ! 1: BRGZ brgz,a,pt %r6,<label_0x98001> |
| 25975 | .word 0x8198344d ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x144d, %hpstate |
| 25976 | pmu_2_341: |
| 25977 | nop |
| 25978 | ta T_CHANGE_PRIV |
| 25979 | setx 0xfffffc30fffff74b, %g1, %g7 |
| 25980 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 25981 | .word 0x91d020b5 ! 454: Tcc_I ta icc_or_xcc, %r0 + 181 |
| 25982 | .word 0xa9a149b4 ! 455: FDIVs fdivs %f5, %f20, %f20 |
| 25983 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 25984 | cwp_2_342: |
| 25985 | set user_data_start, %o7 |
| 25986 | .word 0x93902001 ! 457: WRPR_CWP_I wrpr %r0, 0x0001, %cwp |
| 25987 | jmptr_2_343: |
| 25988 | nop |
| 25989 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25990 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 25991 | jmptr_2_344: |
| 25992 | nop |
| 25993 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25994 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 25995 | jmptr_2_345: |
| 25996 | nop |
| 25997 | best_set_reg(0xe1a00000, %r20, %r27) |
| 25998 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 25999 | .word 0xe71fe1a0 ! 461: LDDF_I ldd [%r31, 0x01a0], %f19 |
| 26000 | brcommon1_2_347: |
| 26001 | nop |
| 26002 | setx common_target, %r12, %r27 |
| 26003 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 26004 | ba,a .+12 |
| 26005 | .word 0xa7702130 ! 1: POPC_I popc 0x0130, %r19 |
| 26006 | ba,a .+8 |
| 26007 | jmpl %r27+0, %r27 |
| 26008 | .word 0xa9a089d4 ! 462: FDIVd fdivd %f2, %f20, %f20 |
| 26009 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 26010 | ceter_2_349: |
| 26011 | nop |
| 26012 | ta T_CHANGE_HPRIV |
| 26013 | mov 7, %r17 |
| 26014 | sllx %r17, 60, %r17 |
| 26015 | mov 0x18, %r16 |
| 26016 | stxa %r17, [%r16]0x4c |
| 26017 | ta T_CHANGE_NONHPRIV |
| 26018 | .word 0xa9410000 ! 464: RDTICK rd %tick, %r20 |
| 26019 | splash_cmpr_2_350: |
| 26020 | mov 0, %r18 |
| 26021 | sllx %r18, 63, %r18 |
| 26022 | rd %tick, %r17 |
| 26023 | add %r17, 0x100, %r17 |
| 26024 | or %r17, %r18, %r17 |
| 26025 | ta T_CHANGE_HPRIV |
| 26026 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 26027 | .word 0xaf800011 ! 465: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 26028 | .word 0xa6828011 ! 466: ADDcc_R addcc %r10, %r17, %r19 |
| 26029 | .word 0xd2800c20 ! 467: LDUWA_R lduwa [%r0, %r0] 0x61, %r9 |
| 26030 | memptr_2_351: |
| 26031 | set user_data_start, %r31 |
| 26032 | .word 0x8584ef04 ! 468: WRCCR_I wr %r19, 0x0f04, %ccr |
| 26033 | .word 0xd27fe010 ! 469: SWAP_I swap %r9, [%r31 + 0x0010] |
| 26034 | .word 0x93a7c9aa ! 1: FDIVs fdivs %f31, %f10, %f9 |
| 26035 | .word 0x9f802820 ! 470: SIR sir 0x0820 |
| 26036 | .word 0x9195000c ! 471: WRPR_PIL_R wrpr %r20, %r12, %pil |
| 26037 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 26038 | jmptr_2_353: |
| 26039 | nop |
| 26040 | best_set_reg(0xe0a00000, %r20, %r27) |
| 26041 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 26042 | .word 0x9ba309d4 ! 474: FDIVd fdivd %f12, %f20, %f44 |
| 26043 | unsupttte_2_355: |
| 26044 | nop |
| 26045 | ta T_CHANGE_HPRIV |
| 26046 | mov 1, %r20 |
| 26047 | sllx %r20, 63, %r20 |
| 26048 | or %r20, 2,%r20 |
| 26049 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 26050 | ta T_CHANGE_NONHPRIV |
| 26051 | .word 0x93a109aa ! 475: FDIVs fdivs %f4, %f10, %f9 |
| 26052 | #if (defined SPC || defined CMP) |
| 26053 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_356)+32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 26054 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_356)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x2),1,3) |
| 26055 | #else |
| 26056 | !! TODO:Generate XIR via RESET_GEN register |
| 26057 | ! setx 0x8900000808, %r16, %r17 |
| 26058 | ! mov 0x2, %r16 |
| 26059 | ! stw %r16, [%r17] |
| 26060 | #endif |
| 26061 | xir_2_356: |
| 26062 | .word 0xa984ea69 ! 476: WR_SET_SOFTINT_I wr %r19, 0x0a69, %set_softint |
| 26063 | trapasi_2_357: |
| 26064 | nop |
| 26065 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 26066 | .word 0xd8c84980 ! 477: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 |
| 26067 | .word 0xe19fe1c0 ! 478: LDDFA_I ldda [%r31, 0x01c0], %f16 |
| 26068 | donret_2_358: |
| 26069 | nop |
| 26070 | ta T_CHANGE_HPRIV ! macro |
| 26071 | rd %pc, %r12 |
| 26072 | add %r12, (donretarg_2_358-donret_2_358-8), %r12 |
| 26073 | mov 0x38, %r18 |
| 26074 | stxa %r12, [%r18]0x58 |
| 26075 | add %r12, 0x4, %r11 |
| 26076 | wrpr %g0, 0x1, %tl |
| 26077 | wrpr %g0, %r12, %tpc |
| 26078 | wrpr %g0, %r11, %tnpc |
| 26079 | set (0x006612c2 | (0x8b << 24)), %r13 |
| 26080 | rdpr %tstate, %r16 |
| 26081 | mov 0x1f, %r19 |
| 26082 | and %r19, %r16, %r17 |
| 26083 | andn %r16, %r19, %r16 |
| 26084 | or %r16, %r17, %r20 |
| 26085 | wrpr %r20, %g0, %tstate |
| 26086 | wrhpr %g0, 0x64f, %htstate |
| 26087 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 26088 | retry |
| 26089 | donretarg_2_358: |
| 26090 | .word 0xd8ffe0e4 ! 479: SWAPA_I swapa %r12, [%r31 + 0x00e4] %asi |
| 26091 | invtsb_2_359: |
| 26092 | nop |
| 26093 | ta T_CHANGE_HPRIV |
| 26094 | rd %asi, %r21 |
| 26095 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 26096 | mov 1, %r20 |
| 26097 | sllx %r20, 63, %r20 |
| 26098 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 26099 | xor %r22 ,%r20, %r22 |
| 26100 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 26101 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 26102 | xor %r22 ,%r20, %r22 |
| 26103 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 26104 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 26105 | xor %r22 ,%r20, %r22 |
| 26106 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 26107 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 26108 | xor %r22 ,%r20, %r22 |
| 26109 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 26110 | wr %r21, %r0, %asi |
| 26111 | ta T_CHANGE_NONHPRIV |
| 26112 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 26113 | mondo_2_360: |
| 26114 | nop |
| 26115 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26116 | stxa %r17, [%r0+0x3e8] %asi |
| 26117 | .word 0x9d908004 ! 481: WRPR_WSTATE_R wrpr %r2, %r4, %wstate |
| 26118 | .word 0xe19fdc00 ! 482: LDDFA_R ldda [%r31, %r0], %f16 |
| 26119 | br_badelay1_2_361: |
| 26120 | .word 0x2cc8c001 ! 1: BRGZ brgz,a,pt %r3,<label_0x8c001> |
| 26121 | .word 0xd937c00b ! 1: STQF_R - %f12, [%r11, %r31] |
| 26122 | .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 26123 | normalw |
| 26124 | .word 0x93458000 ! 483: RD_SOFTINT_REG rd %softint, %r9 |
| 26125 | .word 0xdbe7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r13 |
| 26126 | .word 0x9f80336e ! 484: SIR sir 0x136e |
| 26127 | .word 0xdb27e03a ! 485: STF_I st %f13, [0x003a, %r31] |
| 26128 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 26129 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 26130 | pmu_2_362: |
| 26131 | nop |
| 26132 | setx 0xfffff314fffff80e, %g1, %g7 |
| 26133 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26134 | .word 0x8d90308d ! 489: WRPR_PSTATE_I wrpr %r0, 0x108d, %pstate |
| 26135 | brnz,pt %r12, skip_2_364 |
| 26136 | .word 0xc36ce6f6 ! 1: PREFETCH_I prefetch [%r19 + 0x06f6], #one_read |
| 26137 | .align 32 |
| 26138 | skip_2_364: |
| 26139 | .word 0xda3fc000 ! 490: STD_R std %r13, [%r31 + %r0] |
| 26140 | donret_2_365: |
| 26141 | nop |
| 26142 | ta T_CHANGE_HPRIV ! macro |
| 26143 | rd %pc, %r12 |
| 26144 | add %r12, (donretarg_2_365-donret_2_365-4), %r12 |
| 26145 | mov 0x38, %r18 |
| 26146 | stxa %r12, [%r18]0x58 |
| 26147 | add %r12, 0x4, %r11 |
| 26148 | wrpr %g0, 0x2, %tl |
| 26149 | wrpr %g0, %r12, %tpc |
| 26150 | wrpr %g0, %r11, %tnpc |
| 26151 | set (0x002ac69b | (0x80 << 24)), %r13 |
| 26152 | rdpr %tstate, %r16 |
| 26153 | mov 0x1f, %r19 |
| 26154 | and %r19, %r16, %r17 |
| 26155 | andn %r16, %r19, %r16 |
| 26156 | or %r16, %r17, %r20 |
| 26157 | wrpr %r20, %g0, %tstate |
| 26158 | wrhpr %g0, 0x1441, %htstate |
| 26159 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 26160 | done |
| 26161 | donretarg_2_365: |
| 26162 | .word 0xdaffe1ec ! 491: SWAPA_I swapa %r13, [%r31 + 0x01ec] %asi |
| 26163 | .word 0xdb27e0d4 ! 492: STF_I st %f13, [0x00d4, %r31] |
| 26164 | .word 0xdaffc02c ! 493: SWAPA_R swapa %r13, [%r31 + %r12] 0x01 |
| 26165 | splash_cmpr_2_366: |
| 26166 | mov 0, %r18 |
| 26167 | sllx %r18, 63, %r18 |
| 26168 | rd %tick, %r17 |
| 26169 | add %r17, 0x50, %r17 |
| 26170 | or %r17, %r18, %r17 |
| 26171 | ta T_CHANGE_PRIV |
| 26172 | .word 0xaf800011 ! 494: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 26173 | nop |
| 26174 | mov 0x80, %g3 |
| 26175 | stxa %g3, [%g3] 0x57 |
| 26176 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 26177 | .word 0x9bb7c7c9 ! 1: PDIST pdistn %d62, %d40, %d44 |
| 26178 | .word 0x9f802cd6 ! 496: SIR sir 0x0cd6 |
| 26179 | pmu_2_367: |
| 26180 | nop |
| 26181 | ta T_CHANGE_PRIV |
| 26182 | setx 0xfffff21dfffffd28, %g1, %g7 |
| 26183 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26184 | nop |
| 26185 | ta T_CHANGE_HPRIV |
| 26186 | mov 0x2+1, %r10 |
| 26187 | set sync_thr_counter5, %r23 |
| 26188 | #ifndef SPC |
| 26189 | ldxa [%g0]0x63, %o1 |
| 26190 | and %o1, 0x38, %o1 |
| 26191 | add %o1, %r23, %r23 |
| 26192 | sllx %o1, 5, %o3 !(CID*256) |
| 26193 | #endif |
| 26194 | cas [%r23],%g0,%r10 !lock |
| 26195 | brnz %r10, cwq_2_368 |
| 26196 | rd %asi, %r12 |
| 26197 | wr %g0, 0x40, %asi |
| 26198 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 26199 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 26200 | cmp %l1, 1 |
| 26201 | bne cwq_2_368 |
| 26202 | set CWQ_BASE, %l6 |
| 26203 | #ifndef SPC |
| 26204 | add %l6, %o3, %l6 |
| 26205 | #endif |
| 26206 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 26207 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 26208 | sllx %l2, 32, %l2 |
| 26209 | stx %l2, [%l6 + 0x0] |
| 26210 | membar #Sync |
| 26211 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 26212 | sub %l2, 0x40, %l2 |
| 26213 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 26214 | wr %r12, %g0, %asi |
| 26215 | st %g0, [%r23] |
| 26216 | cwq_2_368: |
| 26217 | ta T_CHANGE_NONHPRIV |
| 26218 | .word 0x99414000 ! 498: RDPC rd %pc, %r12 |
| 26219 | change_to_randtl_2_369: |
| 26220 | ta T_CHANGE_HPRIV ! macro |
| 26221 | done_change_to_randtl_2_369: |
| 26222 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 26223 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 26224 | mondo_2_370: |
| 26225 | nop |
| 26226 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26227 | stxa %r19, [%r0+0x3c0] %asi |
| 26228 | .word 0x9d944011 ! 501: WRPR_WSTATE_R wrpr %r17, %r17, %wstate |
| 26229 | nop |
| 26230 | nop |
| 26231 | ta T_CHANGE_PRIV |
| 26232 | wrpr %g0, %g0, %gl |
| 26233 | nop |
| 26234 | nop |
| 26235 | setx join_lbl_0_0, %g1, %g2 |
| 26236 | jmp %g2 |
| 26237 | nop |
| 26238 | fork_lbl_0_1: |
| 26239 | ta T_CHANGE_NONHPRIV |
| 26240 | br_longdelay1_1_0: |
| 26241 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 26242 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 26243 | fbug skip_1_1 |
| 26244 | bge skip_1_1 |
| 26245 | .align 1024 |
| 26246 | skip_1_1: |
| 26247 | .word 0xe63fc000 ! 2: STD_R std %r19, [%r31 + %r0] |
| 26248 | nop |
| 26249 | ta T_CHANGE_HPRIV |
| 26250 | mov 0x1, %r10 |
| 26251 | set sync_thr_counter6, %r23 |
| 26252 | #ifndef SPC |
| 26253 | ldxa [%g0]0x63, %o1 |
| 26254 | and %o1, 0x38, %o1 |
| 26255 | add %o1, %r23, %r23 |
| 26256 | #endif |
| 26257 | cas [%r23],%g0,%r10 !lock |
| 26258 | brnz %r10, sma_1_2 |
| 26259 | rd %asi, %r12 |
| 26260 | wr %g0, 0x40, %asi |
| 26261 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 26262 | set 0x001e1fff, %g1 |
| 26263 | stxa %g1, [%g0 + 0x80] %asi |
| 26264 | wr %r12, %g0, %asi |
| 26265 | st %g0, [%r23] |
| 26266 | sma_1_2: |
| 26267 | ta T_CHANGE_NONHPRIV |
| 26268 | .word 0xe7e7e00c ! 3: CASA_R casa [%r31] %asi, %r12, %r19 |
| 26269 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 26270 | reduce_priv_lvl_1_3: |
| 26271 | ta T_CHANGE_NONHPRIV ! macro |
| 26272 | .word 0xa784800b ! 5: WR_GRAPHICS_STATUS_REG_R wr %r18, %r11, %- |
| 26273 | .word 0x87a88ac9 ! 6: FCMPEd fcmped %fcc<n>, %f2, %f40 |
| 26274 | vahole_1_5: |
| 26275 | nop |
| 26276 | ta T_CHANGE_NONHPRIV |
| 26277 | setx vahole_target1, %r18, %r27 |
| 26278 | jmpl %r27+0, %r27 |
| 26279 | .word 0xe7e7e010 ! 7: CASA_R casa [%r31] %asi, %r16, %r19 |
| 26280 | memptr_1_6: |
| 26281 | set user_data_start, %r31 |
| 26282 | .word 0x85846bf5 ! 8: WRCCR_I wr %r17, 0x0bf5, %ccr |
| 26283 | .word 0x2e780001 ! 9: BPVS <illegal instruction> |
| 26284 | ceter_1_7: |
| 26285 | nop |
| 26286 | ta T_CHANGE_HPRIV |
| 26287 | mov 7, %r17 |
| 26288 | sllx %r17, 60, %r17 |
| 26289 | mov 0x18, %r16 |
| 26290 | stxa %r17, [%r16]0x4c |
| 26291 | .word 0x91410000 ! 10: RDTICK rd %tick, %r8 |
| 26292 | splash_lsu_1_8: |
| 26293 | nop |
| 26294 | ta T_CHANGE_HPRIV |
| 26295 | set 0x704fbe56, %r2 |
| 26296 | mov 0x2, %r1 |
| 26297 | sllx %r1, 32, %r1 |
| 26298 | or %r1, %r2, %r2 |
| 26299 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 26300 | ta T_CHANGE_NONHPRIV |
| 26301 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 26302 | brcommon1_1_9: |
| 26303 | nop |
| 26304 | setx common_target, %r12, %r27 |
| 26305 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 26306 | ba,a .+12 |
| 26307 | .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] |
| 26308 | ba,a .+8 |
| 26309 | jmpl %r27+0, %r27 |
| 26310 | .word 0xc3ecc02a ! 12: PREFETCHA_R prefetcha [%r19, %r10] 0x01, #one_read |
| 26311 | .word 0x22800001 ! 13: BE be,a <label_0x1> |
| 26312 | pmu_1_10: |
| 26313 | nop |
| 26314 | setx 0xfffff444fffff7bc, %g1, %g7 |
| 26315 | .word 0xa3800007 ! 14: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26316 | .word 0x32780001 ! 15: BPNE <illegal instruction> |
| 26317 | pmu_1_11: |
| 26318 | nop |
| 26319 | ta T_CHANGE_PRIV |
| 26320 | setx 0xfffff868fffffd5e, %g1, %g7 |
| 26321 | .word 0xa3800007 ! 16: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26322 | ibp_1_12: |
| 26323 | nop |
| 26324 | .word 0xe1bfe080 ! 17: STDFA_I stda %f16, [0x0080, %r31] |
| 26325 | ibp_1_13: |
| 26326 | nop |
| 26327 | .word 0xe19fc3e0 ! 18: LDDFA_R ldda [%r31, %r0], %f16 |
| 26328 | .word 0xd65fe170 ! 19: LDX_I ldx [%r31 + 0x0170], %r11 |
| 26329 | .word 0xd727e1d1 ! 20: STF_I st %f11, [0x01d1, %r31] |
| 26330 | .word 0x81580000 ! 21: FLUSHW flushw |
| 26331 | #if (defined SPC || defined CMP) |
| 26332 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_14) + 24, 16, 16)) -> intp(2,0,29) |
| 26333 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_14)&0xffffffff) + 24, 16, 16)) -> intp(2,0,29) |
| 26334 | #else |
| 26335 | setx 0x60e47d2edcae3e69, %r1, %r28 |
| 26336 | stxa %r28, [%g0] 0x73 |
| 26337 | #endif |
| 26338 | intvec_1_14: |
| 26339 | .word 0x39400001 ! 22: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 26340 | donret_1_15: |
| 26341 | nop |
| 26342 | ta T_CHANGE_HPRIV ! macro |
| 26343 | rd %pc, %r12 |
| 26344 | add %r12, (donretarg_1_15-donret_1_15-4), %r12 |
| 26345 | add %r12, 0x4, %r11 |
| 26346 | wrpr %g0, 0x1, %tl |
| 26347 | wrpr %g0, %r12, %tpc |
| 26348 | wrpr %g0, %r11, %tnpc |
| 26349 | set (0x007235a6 | (0x83 << 24)), %r13 |
| 26350 | rdpr %tstate, %r16 |
| 26351 | mov 0x1f, %r19 |
| 26352 | and %r19, %r16, %r17 |
| 26353 | andn %r16, %r19, %r16 |
| 26354 | or %r16, %r17, %r20 |
| 26355 | wrpr %r20, %g0, %tstate |
| 26356 | wrhpr %g0, 0x1615, %htstate |
| 26357 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26358 | done |
| 26359 | donretarg_1_15: |
| 26360 | .word 0xd6ffe071 ! 23: SWAPA_I swapa %r11, [%r31 + 0x0071] %asi |
| 26361 | set 0x101d, %l3 |
| 26362 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 26363 | .word 0x91b447c9 ! 24: PDIST pdistn %d48, %d40, %d8 |
| 26364 | .word 0xc1bfdf20 ! 25: STDFA_R stda %f0, [%r0, %r31] |
| 26365 | pmu_1_16: |
| 26366 | nop |
| 26367 | ta T_CHANGE_PRIV |
| 26368 | setx 0xfffff321fffffa85, %g1, %g7 |
| 26369 | .word 0xa3800007 ! 26: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26370 | vahole_1_17: |
| 26371 | nop |
| 26372 | ta T_CHANGE_NONHPRIV |
| 26373 | setx vahole_target1, %r18, %r27 |
| 26374 | jmpl %r27+0, %r27 |
| 26375 | .word 0xd11fc013 ! 27: LDDF_R ldd [%r31, %r19], %f8 |
| 26376 | #if (defined SPC || defined CMP) |
| 26377 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_18)+48, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26378 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_18)&0xffffffff) +48, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26379 | #else |
| 26380 | !! TODO:Generate XIR via RESET_GEN register |
| 26381 | ! setx 0x8900000808, %r16, %r17 |
| 26382 | ! mov 0x2, %r16 |
| 26383 | ! stw %r16, [%r17] |
| 26384 | #endif |
| 26385 | xir_1_18: |
| 26386 | .word 0xa981eeb7 ! 28: WR_SET_SOFTINT_I wr %r7, 0x0eb7, %set_softint |
| 26387 | .word 0xa3a00165 ! 29: FABSq dis not found |
| 26388 | |
| 26389 | donret_1_20: |
| 26390 | nop |
| 26391 | ta T_CHANGE_HPRIV ! macro |
| 26392 | rd %pc, %r12 |
| 26393 | add %r12, (donretarg_1_20-donret_1_20-8), %r12 |
| 26394 | add %r12, 0x4, %r11 |
| 26395 | wrpr %g0, 0x2, %tl |
| 26396 | wrpr %g0, %r12, %tpc |
| 26397 | wrpr %g0, %r11, %tnpc |
| 26398 | set (0x008efdea | (32 << 24)), %r13 |
| 26399 | rdpr %tstate, %r16 |
| 26400 | mov 0x1f, %r19 |
| 26401 | and %r19, %r16, %r17 |
| 26402 | andn %r16, %r19, %r16 |
| 26403 | or %r16, %r17, %r20 |
| 26404 | wrpr %r20, %g0, %tstate |
| 26405 | wrhpr %g0, 0xed5, %htstate |
| 26406 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 26407 | .word 0x2cc94001 ! 1: BRGZ brgz,a,pt %r5,<label_0x94001> |
| 26408 | retry |
| 26409 | donretarg_1_20: |
| 26410 | .word 0xe2ffe04d ! 30: SWAPA_I swapa %r17, [%r31 + 0x004d] %asi |
| 26411 | .word 0xa784400b ! 31: WR_GRAPHICS_STATUS_REG_R wr %r17, %r11, %- |
| 26412 | #if (defined SPC || defined CMP) |
| 26413 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_22) + 0, 16, 16)) -> intp(2,0,11) |
| 26414 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_22)&0xffffffff) + 0, 16, 16)) -> intp(2,0,11) |
| 26415 | #else |
| 26416 | setx 0xf587e78fdd6db3ce, %r1, %r28 |
| 26417 | stxa %r28, [%g0] 0x73 |
| 26418 | #endif |
| 26419 | intvec_1_22: |
| 26420 | .word 0x39400001 ! 32: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 26421 | memptr_1_23: |
| 26422 | set 0x60740000, %r31 |
| 26423 | .word 0x8585380e ! 33: WRCCR_I wr %r20, 0x180e, %ccr |
| 26424 | unsupttte_1_24: |
| 26425 | nop |
| 26426 | ta T_CHANGE_HPRIV |
| 26427 | mov 1, %r20 |
| 26428 | sllx %r20, 63, %r20 |
| 26429 | or %r20, 2,%r20 |
| 26430 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 26431 | ta T_CHANGE_NONHPRIV |
| 26432 | .word 0x93b48481 ! 34: FCMPLE32 fcmple32 %d18, %d32, %r9 |
| 26433 | brcommon3_1_25: |
| 26434 | nop |
| 26435 | setx common_target, %r12, %r27 |
| 26436 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 26437 | ba,a .+12 |
| 26438 | .word 0xd3e7c032 ! 1: CASA_I casa [%r31] 0x 1, %r18, %r9 |
| 26439 | ba,a .+8 |
| 26440 | jmpl %r27+0, %r27 |
| 26441 | .word 0xd297c032 ! 35: LDUHA_R lduha [%r31, %r18] 0x01, %r9 |
| 26442 | jmptr_1_26: |
| 26443 | nop |
| 26444 | best_set_reg(0xe0200000, %r20, %r27) |
| 26445 | .word 0xb7c6c000 ! 36: JMPL_R jmpl %r27 + %r0, %r27 |
| 26446 | splash_cmpr_1_27: |
| 26447 | mov 0, %r18 |
| 26448 | sllx %r18, 63, %r18 |
| 26449 | rd %tick, %r17 |
| 26450 | add %r17, 0x100, %r17 |
| 26451 | or %r17, %r18, %r17 |
| 26452 | ta T_CHANGE_PRIV |
| 26453 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 26454 | splash_cmpr_1_28: |
| 26455 | mov 1, %r18 |
| 26456 | sllx %r18, 63, %r18 |
| 26457 | rd %tick, %r17 |
| 26458 | add %r17, 0x70, %r17 |
| 26459 | or %r17, %r18, %r17 |
| 26460 | ta T_CHANGE_PRIV |
| 26461 | .word 0xaf800011 ! 38: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 26462 | mondo_1_29: |
| 26463 | nop |
| 26464 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26465 | ta T_CHANGE_PRIV |
| 26466 | stxa %r20, [%r0+0x3c0] %asi |
| 26467 | .word 0x9d948013 ! 39: WRPR_WSTATE_R wrpr %r18, %r19, %wstate |
| 26468 | brcommon3_1_30: |
| 26469 | nop |
| 26470 | setx common_target, %r12, %r27 |
| 26471 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 26472 | ba,a .+12 |
| 26473 | .word 0xd26fe0c0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00c0] |
| 26474 | ba,a .+8 |
| 26475 | jmpl %r27+0, %r27 |
| 26476 | .word 0xd31fc010 ! 40: LDDF_R ldd [%r31, %r16], %f9 |
| 26477 | .word 0xd2dfe1d8 ! 41: LDXA_I ldxa [%r31, + 0x01d8] %asi, %r9 |
| 26478 | .word 0xd327e114 ! 42: STF_I st %f9, [0x0114, %r31] |
| 26479 | setx 0xa46e9520798cdc17, %r1, %r28 |
| 26480 | stxa %r28, [%g0] 0x73 |
| 26481 | intvec_1_31: |
| 26482 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 26483 | mondo_1_32: |
| 26484 | nop |
| 26485 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26486 | stxa %r18, [%r0+0x3d0] %asi |
| 26487 | .word 0x9d91c010 ! 44: WRPR_WSTATE_R wrpr %r7, %r16, %wstate |
| 26488 | ceter_1_33: |
| 26489 | nop |
| 26490 | ta T_CHANGE_HPRIV |
| 26491 | mov 7, %r17 |
| 26492 | sllx %r17, 60, %r17 |
| 26493 | mov 0x18, %r16 |
| 26494 | stxa %r17, [%r16]0x4c |
| 26495 | ta T_CHANGE_NONHPRIV |
| 26496 | .word 0xa3410000 ! 45: RDTICK rd %tick, %r17 |
| 26497 | .word 0x9194800c ! 46: WRPR_PIL_R wrpr %r18, %r12, %pil |
| 26498 | splash_tba_1_35: |
| 26499 | ta T_CHANGE_PRIV |
| 26500 | setx 0x0000000000380000, %r11, %r12 |
| 26501 | .word 0x8b90000c ! 47: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 26502 | mondo_1_36: |
| 26503 | nop |
| 26504 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26505 | ta T_CHANGE_PRIV |
| 26506 | stxa %r6, [%r0+0x3e0] %asi |
| 26507 | .word 0x9d930010 ! 48: WRPR_WSTATE_R wrpr %r12, %r16, %wstate |
| 26508 | .word 0x9f802412 ! 49: SIR sir 0x0412 |
| 26509 | br_longdelay2_1_37: |
| 26510 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> |
| 26511 | .word 0xa3a7c9d2 ! 50: FDIVd fdivd %f62, %f18, %f48 |
| 26512 | splash_cmpr_1_38: |
| 26513 | mov 0, %r18 |
| 26514 | sllx %r18, 63, %r18 |
| 26515 | rd %tick, %r17 |
| 26516 | add %r17, 0x70, %r17 |
| 26517 | or %r17, %r18, %r17 |
| 26518 | ta T_CHANGE_PRIV |
| 26519 | .word 0xb3800011 ! 51: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 26520 | nop |
| 26521 | ta T_CHANGE_HPRIV |
| 26522 | mov 0x1, %r10 |
| 26523 | set sync_thr_counter6, %r23 |
| 26524 | #ifndef SPC |
| 26525 | ldxa [%g0]0x63, %o1 |
| 26526 | and %o1, 0x38, %o1 |
| 26527 | add %o1, %r23, %r23 |
| 26528 | #endif |
| 26529 | cas [%r23],%g0,%r10 !lock |
| 26530 | brnz %r10, sma_1_39 |
| 26531 | rd %asi, %r12 |
| 26532 | wr %g0, 0x40, %asi |
| 26533 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 26534 | set 0x001e1fff, %g1 |
| 26535 | stxa %g1, [%g0 + 0x80] %asi |
| 26536 | wr %r12, %g0, %asi |
| 26537 | st %g0, [%r23] |
| 26538 | sma_1_39: |
| 26539 | ta T_CHANGE_NONHPRIV |
| 26540 | .word 0xe3e7e009 ! 52: CASA_R casa [%r31] %asi, %r9, %r17 |
| 26541 | #if (defined SPC || defined CMP) |
| 26542 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_40)+40, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26543 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_40)&0xffffffff) +40, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26544 | #else |
| 26545 | !! TODO:Generate XIR via RESET_GEN register |
| 26546 | ! setx 0x8900000808, %r16, %r17 |
| 26547 | ! mov 0x2, %r16 |
| 26548 | ! stw %r16, [%r17] |
| 26549 | #endif |
| 26550 | xir_1_40: |
| 26551 | .word 0xa9826764 ! 53: WR_SET_SOFTINT_I wr %r9, 0x0764, %set_softint |
| 26552 | jmptr_1_41: |
| 26553 | nop |
| 26554 | best_set_reg(0xe0200000, %r20, %r27) |
| 26555 | .word 0xb7c6c000 ! 54: JMPL_R jmpl %r27 + %r0, %r27 |
| 26556 | donret_1_42: |
| 26557 | nop |
| 26558 | ta T_CHANGE_HPRIV ! macro |
| 26559 | rd %pc, %r12 |
| 26560 | add %r12, (donretarg_1_42-donret_1_42-8), %r12 |
| 26561 | add %r12, 0x4, %r11 |
| 26562 | wrpr %g0, 0x2, %tl |
| 26563 | wrpr %g0, %r12, %tpc |
| 26564 | wrpr %g0, %r11, %tnpc |
| 26565 | set (0x0018dfd3 | (0x8a << 24)), %r13 |
| 26566 | rdpr %tstate, %r16 |
| 26567 | mov 0x1f, %r19 |
| 26568 | and %r19, %r16, %r17 |
| 26569 | andn %r16, %r19, %r16 |
| 26570 | or %r16, %r17, %r20 |
| 26571 | wrpr %r20, %g0, %tstate |
| 26572 | wrhpr %g0, 0xb1f, %htstate |
| 26573 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26574 | retry |
| 26575 | donretarg_1_42: |
| 26576 | .word 0xe26fe0ef ! 55: LDSTUB_I ldstub %r17, [%r31 + 0x00ef] |
| 26577 | nop |
| 26578 | ta T_CHANGE_HPRIV |
| 26579 | mov 0x1+1, %r10 |
| 26580 | set sync_thr_counter5, %r23 |
| 26581 | #ifndef SPC |
| 26582 | ldxa [%g0]0x63, %o1 |
| 26583 | and %o1, 0x38, %o1 |
| 26584 | add %o1, %r23, %r23 |
| 26585 | sllx %o1, 5, %o3 !(CID*256) |
| 26586 | #endif |
| 26587 | cas [%r23],%g0,%r10 !lock |
| 26588 | brnz %r10, cwq_1_43 |
| 26589 | rd %asi, %r12 |
| 26590 | wr %g0, 0x40, %asi |
| 26591 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 26592 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 26593 | cmp %l1, 1 |
| 26594 | bne cwq_1_43 |
| 26595 | set CWQ_BASE, %l6 |
| 26596 | #ifndef SPC |
| 26597 | add %l6, %o3, %l6 |
| 26598 | #endif |
| 26599 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 26600 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 26601 | sllx %l2, 32, %l2 |
| 26602 | stx %l2, [%l6 + 0x0] |
| 26603 | membar #Sync |
| 26604 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 26605 | sub %l2, 0x40, %l2 |
| 26606 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 26607 | wr %r12, %g0, %asi |
| 26608 | st %g0, [%r23] |
| 26609 | cwq_1_43: |
| 26610 | ta T_CHANGE_NONHPRIV |
| 26611 | .word 0x93414000 ! 56: RDPC rd %pc, %r9 |
| 26612 | splash_hpstate_1_44: |
| 26613 | .word 0x8198308f ! 57: WRHPR_HPSTATE_I wrhpr %r0, 0x108f, %hpstate |
| 26614 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 26615 | .word 0x8d90364f ! 58: WRPR_PSTATE_I wrpr %r0, 0x164f, %pstate |
| 26616 | mondo_1_46: |
| 26617 | nop |
| 26618 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26619 | ta T_CHANGE_PRIV |
| 26620 | stxa %r9, [%r0+0x3e8] %asi |
| 26621 | .word 0x9d928008 ! 59: WRPR_WSTATE_R wrpr %r10, %r8, %wstate |
| 26622 | mondo_1_47: |
| 26623 | nop |
| 26624 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26625 | ta T_CHANGE_PRIV |
| 26626 | stxa %r11, [%r0+0x3e0] %asi |
| 26627 | .word 0x9d94c010 ! 60: WRPR_WSTATE_R wrpr %r19, %r16, %wstate |
| 26628 | splash_hpstate_1_48: |
| 26629 | ta T_CHANGE_NONHPRIV |
| 26630 | .word 0x81982c97 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x0c97, %hpstate |
| 26631 | .word 0xd31fe000 ! 62: LDDF_I ldd [%r31, 0x0000], %f9 |
| 26632 | vahole_1_49: |
| 26633 | nop |
| 26634 | ta T_CHANGE_NONHPRIV |
| 26635 | setx vahole_target2, %r18, %r27 |
| 26636 | jmpl %r27+0, %r27 |
| 26637 | .word 0xc19fe1a0 ! 63: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 26638 | brcommon1_1_50: |
| 26639 | nop |
| 26640 | setx common_target, %r12, %r27 |
| 26641 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 26642 | ba,a .+12 |
| 26643 | .word 0xd3e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r9 |
| 26644 | ba,a .+8 |
| 26645 | jmpl %r27+0, %r27 |
| 26646 | .word 0x93b2c7c3 ! 64: PDIST pdistn %d42, %d34, %d40 |
| 26647 | splash_hpstate_1_51: |
| 26648 | ta T_CHANGE_NONHPRIV |
| 26649 | .word 0x81983ccf ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x1ccf, %hpstate |
| 26650 | .word 0x8d902601 ! 66: WRPR_PSTATE_I wrpr %r0, 0x0601, %pstate |
| 26651 | .word 0xe19fe0e0 ! 67: LDDFA_I ldda [%r31, 0x00e0], %f16 |
| 26652 | br_badelay1_1_54: |
| 26653 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 26654 | .word 0xd337e0a0 ! 1: STQF_I - %f9, [0x00a0, %r31] |
| 26655 | .word 0x93b7c4d4 ! 1: FCMPNE32 fcmpne32 %d62, %d20, %r9 |
| 26656 | normalw |
| 26657 | .word 0x99458000 ! 68: RD_SOFTINT_REG rd %softint, %r12 |
| 26658 | .word 0xd82fe12d ! 69: STB_I stb %r12, [%r31 + 0x012d] |
| 26659 | donret_1_55: |
| 26660 | nop |
| 26661 | ta T_CHANGE_HPRIV ! macro |
| 26662 | rd %pc, %r12 |
| 26663 | add %r12, (donretarg_1_55-donret_1_55-4), %r12 |
| 26664 | add %r12, 0x4, %r11 |
| 26665 | wrpr %g0, 0x2, %tl |
| 26666 | wrpr %g0, %r12, %tpc |
| 26667 | wrpr %g0, %r11, %tnpc |
| 26668 | set (0x00e25a56 | (0x89 << 24)), %r13 |
| 26669 | rdpr %tstate, %r16 |
| 26670 | mov 0x1f, %r19 |
| 26671 | and %r19, %r16, %r17 |
| 26672 | andn %r16, %r19, %r16 |
| 26673 | or %r16, %r17, %r20 |
| 26674 | wrpr %r20, %g0, %tstate |
| 26675 | wrhpr %g0, 0x1a0f, %htstate |
| 26676 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26677 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 26678 | done |
| 26679 | donretarg_1_55: |
| 26680 | .word 0xa7a309d0 ! 70: FDIVd fdivd %f12, %f16, %f50 |
| 26681 | nop |
| 26682 | ta T_CHANGE_HPRIV |
| 26683 | mov 0x1, %r10 |
| 26684 | set sync_thr_counter6, %r23 |
| 26685 | #ifndef SPC |
| 26686 | ldxa [%g0]0x63, %o1 |
| 26687 | and %o1, 0x38, %o1 |
| 26688 | add %o1, %r23, %r23 |
| 26689 | #endif |
| 26690 | cas [%r23],%g0,%r10 !lock |
| 26691 | brnz %r10, sma_1_56 |
| 26692 | rd %asi, %r12 |
| 26693 | wr %g0, 0x40, %asi |
| 26694 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 26695 | set 0x00161fff, %g1 |
| 26696 | stxa %g1, [%g0 + 0x80] %asi |
| 26697 | wr %r12, %g0, %asi |
| 26698 | st %g0, [%r23] |
| 26699 | sma_1_56: |
| 26700 | ta T_CHANGE_NONHPRIV |
| 26701 | .word 0xe7e7e014 ! 71: CASA_R casa [%r31] %asi, %r20, %r19 |
| 26702 | .word 0xe19fe160 ! 72: LDDFA_I ldda [%r31, 0x0160], %f16 |
| 26703 | mondo_1_57: |
| 26704 | nop |
| 26705 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26706 | stxa %r19, [%r0+0x3d8] %asi |
| 26707 | .word 0x9d948010 ! 73: WRPR_WSTATE_R wrpr %r18, %r16, %wstate |
| 26708 | nop |
| 26709 | mov 0x80, %g3 |
| 26710 | stxa %g3, [%g3] 0x5f |
| 26711 | .word 0xe65fc000 ! 74: LDX_R ldx [%r31 + %r0], %r19 |
| 26712 | .word 0xe727c000 ! 75: STF_R st %f19, [%r0, %r31] |
| 26713 | nop |
| 26714 | ta T_CHANGE_HPRIV |
| 26715 | mov 0x1, %r10 |
| 26716 | set sync_thr_counter6, %r23 |
| 26717 | #ifndef SPC |
| 26718 | ldxa [%g0]0x63, %o1 |
| 26719 | and %o1, 0x38, %o1 |
| 26720 | add %o1, %r23, %r23 |
| 26721 | #endif |
| 26722 | cas [%r23],%g0,%r10 !lock |
| 26723 | brnz %r10, sma_1_58 |
| 26724 | rd %asi, %r12 |
| 26725 | wr %g0, 0x40, %asi |
| 26726 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 26727 | set 0x00061fff, %g1 |
| 26728 | stxa %g1, [%g0 + 0x80] %asi |
| 26729 | wr %r12, %g0, %asi |
| 26730 | st %g0, [%r23] |
| 26731 | sma_1_58: |
| 26732 | ta T_CHANGE_NONHPRIV |
| 26733 | .word 0xe7e7e00b ! 76: CASA_R casa [%r31] %asi, %r11, %r19 |
| 26734 | .word 0x2a800001 ! 77: BCS bcs,a <label_0x1> |
| 26735 | nop |
| 26736 | mov 0x80, %g3 |
| 26737 | stxa %g3, [%g3] 0x57 |
| 26738 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 26739 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 26740 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 26741 | .word 0xe65fc000 ! 78: LDX_R ldx [%r31 + %r0], %r19 |
| 26742 | .word 0x9753c000 ! 79: RDPR_FQ <illegal instruction> |
| 26743 | donret_1_59: |
| 26744 | nop |
| 26745 | ta T_CHANGE_HPRIV ! macro |
| 26746 | rd %pc, %r12 |
| 26747 | add %r12, (donretarg_1_59-donret_1_59-4), %r12 |
| 26748 | add %r12, 0x4, %r11 |
| 26749 | wrpr %g0, 0x1, %tl |
| 26750 | wrpr %g0, %r12, %tpc |
| 26751 | wrpr %g0, %r11, %tnpc |
| 26752 | set (0x00e18962 | (0x8a << 24)), %r13 |
| 26753 | rdpr %tstate, %r16 |
| 26754 | mov 0x1f, %r19 |
| 26755 | and %r19, %r16, %r17 |
| 26756 | andn %r16, %r19, %r16 |
| 26757 | or %r16, %r17, %r20 |
| 26758 | wrpr %r20, %g0, %tstate |
| 26759 | wrhpr %g0, 0x1ac5, %htstate |
| 26760 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26761 | done |
| 26762 | donretarg_1_59: |
| 26763 | .word 0x9ba4c9d1 ! 80: FDIVd fdivd %f50, %f48, %f44 |
| 26764 | .word 0xda8fe1a8 ! 81: LDUBA_I lduba [%r31, + 0x01a8] %asi, %r13 |
| 26765 | .word 0xc19fc3e0 ! 82: LDDFA_R ldda [%r31, %r0], %f0 |
| 26766 | change_to_randtl_1_60: |
| 26767 | ta T_CHANGE_PRIV ! macro |
| 26768 | done_change_to_randtl_1_60: |
| 26769 | .word 0x8f902000 ! 83: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 26770 | splash_cmpr_1_61: |
| 26771 | mov 0, %r18 |
| 26772 | sllx %r18, 63, %r18 |
| 26773 | rd %tick, %r17 |
| 26774 | add %r17, 0x50, %r17 |
| 26775 | or %r17, %r18, %r17 |
| 26776 | ta T_CHANGE_PRIV |
| 26777 | .word 0xb3800011 ! 84: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 26778 | jmptr_1_62: |
| 26779 | nop |
| 26780 | best_set_reg(0xe0200000, %r20, %r27) |
| 26781 | .word 0xb7c6c000 ! 85: JMPL_R jmpl %r27 + %r0, %r27 |
| 26782 | mondo_1_63: |
| 26783 | nop |
| 26784 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26785 | ta T_CHANGE_PRIV |
| 26786 | stxa %r18, [%r0+0x3d8] %asi |
| 26787 | .word 0x9d92c009 ! 86: WRPR_WSTATE_R wrpr %r11, %r9, %wstate |
| 26788 | #if (defined SPC || defined CMP) |
| 26789 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_64)+8, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26790 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_64)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26791 | #else |
| 26792 | !! TODO:Generate XIR via RESET_GEN register |
| 26793 | ! setx 0x8900000808, %r16, %r17 |
| 26794 | ! mov 0x2, %r16 |
| 26795 | ! stw %r16, [%r17] |
| 26796 | #endif |
| 26797 | xir_1_64: |
| 26798 | .word 0xa984398e ! 87: WR_SET_SOFTINT_I wr %r16, 0x198e, %set_softint |
| 26799 | .word 0xdb37e05e ! 88: STQF_I - %f13, [0x005e, %r31] |
| 26800 | mondo_1_65: |
| 26801 | nop |
| 26802 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26803 | ta T_CHANGE_PRIV |
| 26804 | stxa %r18, [%r0+0x3e0] %asi |
| 26805 | .word 0x9d94800d ! 89: WRPR_WSTATE_R wrpr %r18, %r13, %wstate |
| 26806 | .word 0xda0fc000 ! 90: LDUB_R ldub [%r31 + %r0], %r13 |
| 26807 | memptr_1_66: |
| 26808 | set user_data_start, %r31 |
| 26809 | .word 0x858473d3 ! 91: WRCCR_I wr %r17, 0x13d3, %ccr |
| 26810 | jmptr_1_67: |
| 26811 | nop |
| 26812 | best_set_reg(0xe0200000, %r20, %r27) |
| 26813 | .word 0xb7c6c000 ! 92: JMPL_R jmpl %r27 + %r0, %r27 |
| 26814 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 26815 | reduce_priv_lvl_1_68: |
| 26816 | ta T_CHANGE_NONPRIV ! macro |
| 26817 | otherw |
| 26818 | mov 0x32, %r30 |
| 26819 | .word 0x93d0001e ! 94: Tcc_R tne icc_or_xcc, %r0 + %r30 |
| 26820 | vahole_1_69: |
| 26821 | nop |
| 26822 | ta T_CHANGE_NONHPRIV |
| 26823 | setx vahole_target0, %r18, %r27 |
| 26824 | jmpl %r27+0, %r27 |
| 26825 | .word 0xda9fe080 ! 95: LDDA_I ldda [%r31, + 0x0080] %asi, %r13 |
| 26826 | pmu_1_70: |
| 26827 | nop |
| 26828 | setx 0xffffff6dfffff499, %g1, %g7 |
| 26829 | .word 0xa3800007 ! 96: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 26830 | jmptr_1_71: |
| 26831 | nop |
| 26832 | best_set_reg(0xe0200000, %r20, %r27) |
| 26833 | .word 0xb7c6c000 ! 97: JMPL_R jmpl %r27 + %r0, %r27 |
| 26834 | splash_cmpr_1_72: |
| 26835 | mov 1, %r18 |
| 26836 | sllx %r18, 63, %r18 |
| 26837 | rd %tick, %r17 |
| 26838 | add %r17, 0x80, %r17 |
| 26839 | or %r17, %r18, %r17 |
| 26840 | ta T_CHANGE_HPRIV |
| 26841 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 26842 | ta T_CHANGE_PRIV |
| 26843 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 26844 | splash_hpstate_1_73: |
| 26845 | .word 0x81982281 ! 99: WRHPR_HPSTATE_I wrhpr %r0, 0x0281, %hpstate |
| 26846 | donret_1_74: |
| 26847 | nop |
| 26848 | ta T_CHANGE_HPRIV ! macro |
| 26849 | rd %pc, %r12 |
| 26850 | add %r12, (donretarg_1_74-donret_1_74-8), %r12 |
| 26851 | add %r12, 0x4, %r11 |
| 26852 | wrpr %g0, 0x2, %tl |
| 26853 | wrpr %g0, %r12, %tpc |
| 26854 | wrpr %g0, %r11, %tnpc |
| 26855 | set (0x00c064fa | (0x83 << 24)), %r13 |
| 26856 | rdpr %tstate, %r16 |
| 26857 | mov 0x1f, %r19 |
| 26858 | and %r19, %r16, %r17 |
| 26859 | andn %r16, %r19, %r16 |
| 26860 | or %r16, %r17, %r20 |
| 26861 | wrpr %r20, %g0, %tstate |
| 26862 | wrhpr %g0, 0x16ff, %htstate |
| 26863 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26864 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 26865 | retry |
| 26866 | donretarg_1_74: |
| 26867 | .word 0xda6fe102 ! 100: LDSTUB_I ldstub %r13, [%r31 + 0x0102] |
| 26868 | change_to_randtl_1_75: |
| 26869 | ta T_CHANGE_HPRIV ! macro |
| 26870 | done_change_to_randtl_1_75: |
| 26871 | .word 0x8f902000 ! 101: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 26872 | unsupttte_1_76: |
| 26873 | nop |
| 26874 | ta T_CHANGE_HPRIV |
| 26875 | mov 1, %r20 |
| 26876 | sllx %r20, 63, %r20 |
| 26877 | or %r20, 2,%r20 |
| 26878 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 26879 | ta T_CHANGE_NONHPRIV |
| 26880 | .word 0xa9a349d4 ! 102: FDIVd fdivd %f44, %f20, %f20 |
| 26881 | .word 0x8d903303 ! 103: WRPR_PSTATE_I wrpr %r0, 0x1303, %pstate |
| 26882 | intveclr_1_78: |
| 26883 | nop |
| 26884 | ta T_CHANGE_HPRIV |
| 26885 | setx 0xdf6a1ab2dd0c5a28, %r1, %r28 |
| 26886 | stxa %r28, [%g0] 0x72 |
| 26887 | .word 0x25400001 ! 104: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 26888 | donret_1_79: |
| 26889 | nop |
| 26890 | ta T_CHANGE_HPRIV ! macro |
| 26891 | rd %pc, %r12 |
| 26892 | add %r12, (donretarg_1_79-donret_1_79-4), %r12 |
| 26893 | add %r12, 0x4, %r11 |
| 26894 | wrpr %g0, 0x2, %tl |
| 26895 | wrpr %g0, %r12, %tpc |
| 26896 | wrpr %g0, %r11, %tnpc |
| 26897 | set (0x0058c963 | (0x80 << 24)), %r13 |
| 26898 | rdpr %tstate, %r16 |
| 26899 | mov 0x1f, %r19 |
| 26900 | and %r19, %r16, %r17 |
| 26901 | andn %r16, %r19, %r16 |
| 26902 | or %r16, %r17, %r20 |
| 26903 | wrpr %r20, %g0, %tstate |
| 26904 | wrhpr %g0, 0x1e8d, %htstate |
| 26905 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 26906 | done |
| 26907 | donretarg_1_79: |
| 26908 | .word 0xa5a149cb ! 105: FDIVd fdivd %f36, %f42, %f18 |
| 26909 | .word 0xe4d7e1b0 ! 106: LDSHA_I ldsha [%r31, + 0x01b0] %asi, %r18 |
| 26910 | tagged_1_80: |
| 26911 | tsubcctv %r17, 0x19c0, %r0 |
| 26912 | .word 0xe407e04d ! 107: LDUW_I lduw [%r31 + 0x004d], %r18 |
| 26913 | nop |
| 26914 | ta T_CHANGE_HPRIV |
| 26915 | mov 0x1+1, %r10 |
| 26916 | set sync_thr_counter5, %r23 |
| 26917 | #ifndef SPC |
| 26918 | ldxa [%g0]0x63, %o1 |
| 26919 | and %o1, 0x38, %o1 |
| 26920 | add %o1, %r23, %r23 |
| 26921 | sllx %o1, 5, %o3 !(CID*256) |
| 26922 | #endif |
| 26923 | cas [%r23],%g0,%r10 !lock |
| 26924 | brnz %r10, cwq_1_81 |
| 26925 | rd %asi, %r12 |
| 26926 | wr %g0, 0x40, %asi |
| 26927 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 26928 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 26929 | cmp %l1, 1 |
| 26930 | bne cwq_1_81 |
| 26931 | set CWQ_BASE, %l6 |
| 26932 | #ifndef SPC |
| 26933 | add %l6, %o3, %l6 |
| 26934 | #endif |
| 26935 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 26936 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 26937 | sllx %l2, 32, %l2 |
| 26938 | stx %l2, [%l6 + 0x0] |
| 26939 | membar #Sync |
| 26940 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 26941 | sub %l2, 0x40, %l2 |
| 26942 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 26943 | wr %r12, %g0, %asi |
| 26944 | st %g0, [%r23] |
| 26945 | cwq_1_81: |
| 26946 | ta T_CHANGE_NONHPRIV |
| 26947 | .word 0x91414000 ! 108: RDPC rd %pc, %r8 |
| 26948 | splash_lsu_1_82: |
| 26949 | nop |
| 26950 | ta T_CHANGE_HPRIV |
| 26951 | set 0x967d0d43, %r2 |
| 26952 | mov 0x4, %r1 |
| 26953 | sllx %r1, 32, %r1 |
| 26954 | or %r1, %r2, %r2 |
| 26955 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 26956 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 26957 | splash_cmpr_1_83: |
| 26958 | mov 0, %r18 |
| 26959 | sllx %r18, 63, %r18 |
| 26960 | rd %tick, %r17 |
| 26961 | add %r17, 0x80, %r17 |
| 26962 | or %r17, %r18, %r17 |
| 26963 | ta T_CHANGE_PRIV |
| 26964 | .word 0xb3800011 ! 110: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 26965 | splash_htba_1_84: |
| 26966 | nop |
| 26967 | ta T_CHANGE_HPRIV |
| 26968 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 26969 | .word 0x8b98000c ! 111: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 26970 | mondo_1_85: |
| 26971 | nop |
| 26972 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 26973 | stxa %r10, [%r0+0x3d0] %asi |
| 26974 | .word 0x9d950002 ! 112: WRPR_WSTATE_R wrpr %r20, %r2, %wstate |
| 26975 | .word 0xe1bfda00 ! 113: STDFA_R stda %f16, [%r0, %r31] |
| 26976 | .word 0xe19fda00 ! 114: LDDFA_R ldda [%r31, %r0], %f16 |
| 26977 | splash_cmpr_1_86: |
| 26978 | mov 0, %r18 |
| 26979 | sllx %r18, 63, %r18 |
| 26980 | rd %tick, %r17 |
| 26981 | add %r17, 0x80, %r17 |
| 26982 | or %r17, %r18, %r17 |
| 26983 | ta T_CHANGE_PRIV |
| 26984 | .word 0xaf800011 ! 115: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 26985 | #if (defined SPC || defined CMP) |
| 26986 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_87)+16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26987 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_87)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 26988 | #else |
| 26989 | !! TODO:Generate XIR via RESET_GEN register |
| 26990 | ! setx 0x8900000808, %r16, %r17 |
| 26991 | ! mov 0x2, %r16 |
| 26992 | ! stw %r16, [%r17] |
| 26993 | #endif |
| 26994 | xir_1_87: |
| 26995 | .word 0xa982fa58 ! 116: WR_SET_SOFTINT_I wr %r11, 0x1a58, %set_softint |
| 26996 | brcommon3_1_88: |
| 26997 | nop |
| 26998 | setx common_target, %r12, %r27 |
| 26999 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 27000 | ba,a .+12 |
| 27001 | .word 0xd137c009 ! 1: STQF_R - %f8, [%r9, %r31] |
| 27002 | ba,a .+8 |
| 27003 | jmpl %r27+0, %r27 |
| 27004 | .word 0xd13fc011 ! 117: STDF_R std %f8, [%r17, %r31] |
| 27005 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 27006 | .word 0x8d902d69 ! 118: WRPR_PSTATE_I wrpr %r0, 0x0d69, %pstate |
| 27007 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 27008 | reduce_priv_lvl_1_90: |
| 27009 | ta T_CHANGE_NONPRIV ! macro |
| 27010 | #if (defined SPC || defined CMP) |
| 27011 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_91)+16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27012 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_91)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27013 | #else |
| 27014 | !! TODO:Generate XIR via RESET_GEN register |
| 27015 | ! setx 0x8900000808, %r16, %r17 |
| 27016 | ! mov 0x2, %r16 |
| 27017 | ! stw %r16, [%r17] |
| 27018 | #endif |
| 27019 | xir_1_91: |
| 27020 | .word 0xa985307c ! 120: WR_SET_SOFTINT_I wr %r20, 0x107c, %set_softint |
| 27021 | splash_cmpr_1_92: |
| 27022 | mov 1, %r18 |
| 27023 | sllx %r18, 63, %r18 |
| 27024 | rd %tick, %r17 |
| 27025 | add %r17, 0x80, %r17 |
| 27026 | or %r17, %r18, %r17 |
| 27027 | .word 0xb3800011 ! 121: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 27028 | .word 0xa1a00163 ! 122: FABSq dis not found |
| 27029 | |
| 27030 | ta T_CHANGE_NONHPRIV |
| 27031 | .word 0x8143e011 ! 123: MEMBAR membar #LoadLoad | #Lookaside |
| 27032 | splash_cmpr_1_95: |
| 27033 | mov 1, %r18 |
| 27034 | sllx %r18, 63, %r18 |
| 27035 | rd %tick, %r17 |
| 27036 | add %r17, 0x80, %r17 |
| 27037 | or %r17, %r18, %r17 |
| 27038 | ta T_CHANGE_HPRIV |
| 27039 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27040 | ta T_CHANGE_PRIV |
| 27041 | .word 0xaf800011 ! 124: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27042 | .word 0xe1bfc2c0 ! 125: STDFA_R stda %f16, [%r0, %r31] |
| 27043 | jmptr_1_96: |
| 27044 | nop |
| 27045 | best_set_reg(0xe0200000, %r20, %r27) |
| 27046 | .word 0xb7c6c000 ! 126: JMPL_R jmpl %r27 + %r0, %r27 |
| 27047 | setx 0x5d0d483e1ef98448, %r1, %r28 |
| 27048 | stxa %r28, [%g0] 0x73 |
| 27049 | intvec_1_97: |
| 27050 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27051 | pmu_1_98: |
| 27052 | nop |
| 27053 | ta T_CHANGE_PRIV |
| 27054 | setx 0xfffff7aefffffec6, %g1, %g7 |
| 27055 | .word 0xa3800007 ! 128: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27056 | donret_1_99: |
| 27057 | nop |
| 27058 | ta T_CHANGE_HPRIV ! macro |
| 27059 | rd %pc, %r12 |
| 27060 | add %r12, (donretarg_1_99-donret_1_99-4), %r12 |
| 27061 | add %r12, 0x4, %r11 |
| 27062 | wrpr %g0, 0x2, %tl |
| 27063 | wrpr %g0, %r12, %tpc |
| 27064 | wrpr %g0, %r11, %tnpc |
| 27065 | set (0x009fbe11 | (4 << 24)), %r13 |
| 27066 | rdpr %tstate, %r16 |
| 27067 | mov 0x1f, %r19 |
| 27068 | and %r19, %r16, %r17 |
| 27069 | andn %r16, %r19, %r16 |
| 27070 | or %r16, %r17, %r20 |
| 27071 | wrpr %r20, %g0, %tstate |
| 27072 | wrhpr %g0, 0x21f, %htstate |
| 27073 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 27074 | done |
| 27075 | donretarg_1_99: |
| 27076 | .word 0x99a0c9ca ! 129: FDIVd fdivd %f34, %f10, %f12 |
| 27077 | pmu_1_100: |
| 27078 | nop |
| 27079 | setx 0xfffff5d9ffffff90, %g1, %g7 |
| 27080 | .word 0xa3800007 ! 130: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27081 | mondo_1_101: |
| 27082 | nop |
| 27083 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27084 | ta T_CHANGE_PRIV |
| 27085 | stxa %r16, [%r0+0x3c0] %asi |
| 27086 | .word 0x9d948011 ! 131: WRPR_WSTATE_R wrpr %r18, %r17, %wstate |
| 27087 | nop |
| 27088 | ta T_CHANGE_HPRIV |
| 27089 | mov 0x1, %r10 |
| 27090 | set sync_thr_counter6, %r23 |
| 27091 | #ifndef SPC |
| 27092 | ldxa [%g0]0x63, %o1 |
| 27093 | and %o1, 0x38, %o1 |
| 27094 | add %o1, %r23, %r23 |
| 27095 | #endif |
| 27096 | cas [%r23],%g0,%r10 !lock |
| 27097 | brnz %r10, sma_1_102 |
| 27098 | rd %asi, %r12 |
| 27099 | wr %g0, 0x40, %asi |
| 27100 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27101 | set 0x00161fff, %g1 |
| 27102 | stxa %g1, [%g0 + 0x80] %asi |
| 27103 | wr %r12, %g0, %asi |
| 27104 | st %g0, [%r23] |
| 27105 | sma_1_102: |
| 27106 | ta T_CHANGE_NONHPRIV |
| 27107 | .word 0xd9e7e009 ! 132: CASA_R casa [%r31] %asi, %r9, %r12 |
| 27108 | .word 0xc1bfda00 ! 133: STDFA_R stda %f0, [%r0, %r31] |
| 27109 | splash_tba_1_103: |
| 27110 | ta T_CHANGE_PRIV |
| 27111 | setx 0x0000000000380000, %r11, %r12 |
| 27112 | .word 0x8b90000c ! 134: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 27113 | splash_lsu_1_104: |
| 27114 | nop |
| 27115 | ta T_CHANGE_HPRIV |
| 27116 | set 0x5046f3b4, %r2 |
| 27117 | mov 0x7, %r1 |
| 27118 | sllx %r1, 32, %r1 |
| 27119 | or %r1, %r2, %r2 |
| 27120 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27121 | .word 0x3d400001 ! 135: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27122 | setx 0xc06a3bcbc8082181, %r1, %r28 |
| 27123 | stxa %r28, [%g0] 0x73 |
| 27124 | intvec_1_105: |
| 27125 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27126 | change_to_randtl_1_106: |
| 27127 | ta T_CHANGE_PRIV ! macro |
| 27128 | done_change_to_randtl_1_106: |
| 27129 | .word 0x8f902000 ! 137: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 27130 | nop |
| 27131 | ta T_CHANGE_HPRIV |
| 27132 | mov 0x1+1, %r10 |
| 27133 | set sync_thr_counter5, %r23 |
| 27134 | #ifndef SPC |
| 27135 | ldxa [%g0]0x63, %o1 |
| 27136 | and %o1, 0x38, %o1 |
| 27137 | add %o1, %r23, %r23 |
| 27138 | sllx %o1, 5, %o3 !(CID*256) |
| 27139 | #endif |
| 27140 | cas [%r23],%g0,%r10 !lock |
| 27141 | brnz %r10, cwq_1_107 |
| 27142 | rd %asi, %r12 |
| 27143 | wr %g0, 0x40, %asi |
| 27144 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 27145 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 27146 | cmp %l1, 1 |
| 27147 | bne cwq_1_107 |
| 27148 | set CWQ_BASE, %l6 |
| 27149 | #ifndef SPC |
| 27150 | add %l6, %o3, %l6 |
| 27151 | #endif |
| 27152 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 27153 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 27154 | sllx %l2, 32, %l2 |
| 27155 | stx %l2, [%l6 + 0x0] |
| 27156 | membar #Sync |
| 27157 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 27158 | sub %l2, 0x40, %l2 |
| 27159 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 27160 | wr %r12, %g0, %asi |
| 27161 | st %g0, [%r23] |
| 27162 | cwq_1_107: |
| 27163 | ta T_CHANGE_NONHPRIV |
| 27164 | .word 0xa5414000 ! 138: RDPC rd %pc, %r18 |
| 27165 | #if (defined SPC || defined CMP) |
| 27166 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_108)+8, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27167 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_108)&0xffffffff) +8, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27168 | #else |
| 27169 | !! TODO:Generate XIR via RESET_GEN register |
| 27170 | ! setx 0x8900000808, %r16, %r17 |
| 27171 | ! mov 0x2, %r16 |
| 27172 | ! stw %r16, [%r17] |
| 27173 | #endif |
| 27174 | xir_1_108: |
| 27175 | .word 0xa984fc32 ! 139: WR_SET_SOFTINT_I wr %r19, 0x1c32, %set_softint |
| 27176 | br_badelay1_1_109: |
| 27177 | .word 0xe43fc009 ! 1: STD_R std %r18, [%r31 + %r9] |
| 27178 | .word 0xdb33318e ! 1: STQF_I - %f13, [0x118e, %r12] |
| 27179 | .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31,<label_0xfc001> |
| 27180 | normalw |
| 27181 | .word 0x95458000 ! 140: RD_SOFTINT_REG rd %softint, %r10 |
| 27182 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 27183 | reduce_priv_lvl_1_110: |
| 27184 | ta T_CHANGE_NONHPRIV ! macro |
| 27185 | vahole_1_111: |
| 27186 | nop |
| 27187 | ta T_CHANGE_NONHPRIV |
| 27188 | setx vahole_target1, %r18, %r27 |
| 27189 | jmpl %r27+0, %r27 |
| 27190 | .word 0xc3ec4031 ! 142: PREFETCHA_R prefetcha [%r17, %r17] 0x01, #one_read |
| 27191 | nop |
| 27192 | ta T_CHANGE_HPRIV |
| 27193 | mov 0x1+1, %r10 |
| 27194 | set sync_thr_counter5, %r23 |
| 27195 | #ifndef SPC |
| 27196 | ldxa [%g0]0x63, %o1 |
| 27197 | and %o1, 0x38, %o1 |
| 27198 | add %o1, %r23, %r23 |
| 27199 | sllx %o1, 5, %o3 !(CID*256) |
| 27200 | #endif |
| 27201 | cas [%r23],%g0,%r10 !lock |
| 27202 | brnz %r10, cwq_1_112 |
| 27203 | rd %asi, %r12 |
| 27204 | wr %g0, 0x40, %asi |
| 27205 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 27206 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 27207 | cmp %l1, 1 |
| 27208 | bne cwq_1_112 |
| 27209 | set CWQ_BASE, %l6 |
| 27210 | #ifndef SPC |
| 27211 | add %l6, %o3, %l6 |
| 27212 | #endif |
| 27213 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 27214 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 27215 | sllx %l2, 32, %l2 |
| 27216 | stx %l2, [%l6 + 0x0] |
| 27217 | membar #Sync |
| 27218 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 27219 | sub %l2, 0x40, %l2 |
| 27220 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 27221 | wr %r12, %g0, %asi |
| 27222 | st %g0, [%r23] |
| 27223 | cwq_1_112: |
| 27224 | ta T_CHANGE_NONHPRIV |
| 27225 | .word 0x99414000 ! 143: RDPC rd %pc, %r12 |
| 27226 | .word 0xd91fe070 ! 144: LDDF_I ldd [%r31, 0x0070], %f12 |
| 27227 | setx 0x4e0a47a3cc4f300c, %r1, %r28 |
| 27228 | stxa %r28, [%g0] 0x73 |
| 27229 | intvec_1_113: |
| 27230 | .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27231 | .word 0xa0d2400c ! 146: UMULcc_R umulcc %r9, %r12, %r16 |
| 27232 | splash_cmpr_1_114: |
| 27233 | mov 1, %r18 |
| 27234 | sllx %r18, 63, %r18 |
| 27235 | rd %tick, %r17 |
| 27236 | add %r17, 0x70, %r17 |
| 27237 | or %r17, %r18, %r17 |
| 27238 | ta T_CHANGE_HPRIV |
| 27239 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27240 | .word 0xaf800011 ! 147: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27241 | mondo_1_115: |
| 27242 | nop |
| 27243 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27244 | ta T_CHANGE_PRIV |
| 27245 | stxa %r20, [%r0+0x3e8] %asi |
| 27246 | .word 0x9d924014 ! 148: WRPR_WSTATE_R wrpr %r9, %r20, %wstate |
| 27247 | change_to_randtl_1_116: |
| 27248 | ta T_CHANGE_PRIV ! macro |
| 27249 | done_change_to_randtl_1_116: |
| 27250 | .word 0x8f902001 ! 149: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 27251 | change_to_randtl_1_117: |
| 27252 | ta T_CHANGE_HPRIV ! macro |
| 27253 | done_change_to_randtl_1_117: |
| 27254 | .word 0x8f902001 ! 150: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 27255 | #if (defined SPC || defined CMP) |
| 27256 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_118) + 56, 16, 16)) -> intp(3,0,25) |
| 27257 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_118)&0xffffffff) + 56, 16, 16)) -> intp(3,0,25) |
| 27258 | #else |
| 27259 | setx 0x9dcec6453ee2f102, %r1, %r28 |
| 27260 | stxa %r28, [%g0] 0x73 |
| 27261 | #endif |
| 27262 | intvec_1_118: |
| 27263 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27264 | memptr_1_119: |
| 27265 | set 0x60740000, %r31 |
| 27266 | .word 0x8582e7a2 ! 152: WRCCR_I wr %r11, 0x07a2, %ccr |
| 27267 | nop |
| 27268 | mov 0x80, %g3 |
| 27269 | stxa %g3, [%g3] 0x57 |
| 27270 | .word 0xe05fc000 ! 153: LDX_R ldx [%r31 + %r0], %r16 |
| 27271 | .word 0x8d902209 ! 154: WRPR_PSTATE_I wrpr %r0, 0x0209, %pstate |
| 27272 | mondo_1_121: |
| 27273 | nop |
| 27274 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27275 | ta T_CHANGE_PRIV |
| 27276 | stxa %r16, [%r0+0x3e8] %asi |
| 27277 | .word 0x9d948014 ! 155: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 27278 | .word 0x8d9023bb ! 156: WRPR_PSTATE_I wrpr %r0, 0x03bb, %pstate |
| 27279 | .word 0x91d020b4 ! 157: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 27280 | setx 0x0083e556e94f4b80, %r1, %r28 |
| 27281 | stxa %r28, [%g0] 0x73 |
| 27282 | intvec_1_123: |
| 27283 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27284 | .word 0xc36a4013 ! 159: PREFETCH_R prefetch [%r9 + %r19], #one_read |
| 27285 | fpinit_1_124: |
| 27286 | nop |
| 27287 | setx fp_data_quads, %r19, %r20 |
| 27288 | ldd [%r20], %f0 |
| 27289 | ldd [%r20+8], %f4 |
| 27290 | ld [%r20+16], %fsr |
| 27291 | ld [%r20+24], %r19 |
| 27292 | wr %r19, %g0, %gsr |
| 27293 | .word 0x89b00484 ! 160: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 27294 | splash_hpstate_1_125: |
| 27295 | ta T_CHANGE_NONHPRIV |
| 27296 | .word 0x2ac9c001 ! 1: BRNZ brnz,a,pt %r7,<label_0x9c001> |
| 27297 | .word 0x81983d45 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1d45, %hpstate |
| 27298 | nop |
| 27299 | mov 0x80, %g3 |
| 27300 | stxa %g3, [%g3] 0x57 |
| 27301 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 27302 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 27303 | .word 0xe05fc000 ! 162: LDX_R ldx [%r31 + %r0], %r16 |
| 27304 | nop |
| 27305 | ta T_CHANGE_HPRIV |
| 27306 | mov 0x1, %r10 |
| 27307 | set sync_thr_counter6, %r23 |
| 27308 | #ifndef SPC |
| 27309 | ldxa [%g0]0x63, %o1 |
| 27310 | and %o1, 0x38, %o1 |
| 27311 | add %o1, %r23, %r23 |
| 27312 | #endif |
| 27313 | cas [%r23],%g0,%r10 !lock |
| 27314 | brnz %r10, sma_1_126 |
| 27315 | rd %asi, %r12 |
| 27316 | wr %g0, 0x40, %asi |
| 27317 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27318 | set 0x001a1fff, %g1 |
| 27319 | stxa %g1, [%g0 + 0x80] %asi |
| 27320 | wr %r12, %g0, %asi |
| 27321 | st %g0, [%r23] |
| 27322 | sma_1_126: |
| 27323 | ta T_CHANGE_NONHPRIV |
| 27324 | .word 0xe1e7e00b ! 163: CASA_R casa [%r31] %asi, %r11, %r16 |
| 27325 | nop |
| 27326 | ta T_CHANGE_HPRIV |
| 27327 | mov 0x1, %r10 |
| 27328 | set sync_thr_counter6, %r23 |
| 27329 | #ifndef SPC |
| 27330 | ldxa [%g0]0x63, %o1 |
| 27331 | and %o1, 0x38, %o1 |
| 27332 | add %o1, %r23, %r23 |
| 27333 | #endif |
| 27334 | cas [%r23],%g0,%r10 !lock |
| 27335 | brnz %r10, sma_1_127 |
| 27336 | rd %asi, %r12 |
| 27337 | wr %g0, 0x40, %asi |
| 27338 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27339 | set 0x00021fff, %g1 |
| 27340 | stxa %g1, [%g0 + 0x80] %asi |
| 27341 | wr %r12, %g0, %asi |
| 27342 | st %g0, [%r23] |
| 27343 | sma_1_127: |
| 27344 | ta T_CHANGE_NONHPRIV |
| 27345 | .word 0xe1e7e010 ! 164: CASA_R casa [%r31] %asi, %r16, %r16 |
| 27346 | pmu_1_128: |
| 27347 | nop |
| 27348 | ta T_CHANGE_PRIV |
| 27349 | setx 0xfffff21bfffff873, %g1, %g7 |
| 27350 | .word 0xa3800007 ! 165: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27351 | splash_cmpr_1_129: |
| 27352 | mov 0, %r18 |
| 27353 | sllx %r18, 63, %r18 |
| 27354 | rd %tick, %r17 |
| 27355 | add %r17, 0x50, %r17 |
| 27356 | or %r17, %r18, %r17 |
| 27357 | ta T_CHANGE_PRIV |
| 27358 | .word 0xb3800011 ! 166: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 27359 | ceter_1_130: |
| 27360 | nop |
| 27361 | ta T_CHANGE_HPRIV |
| 27362 | mov 7, %r17 |
| 27363 | sllx %r17, 60, %r17 |
| 27364 | mov 0x18, %r16 |
| 27365 | stxa %r17, [%r16]0x4c |
| 27366 | ta T_CHANGE_NONHPRIV |
| 27367 | .word 0xa1410000 ! 167: RDTICK rd %tick, %r16 |
| 27368 | jmptr_1_131: |
| 27369 | nop |
| 27370 | best_set_reg(0xe0200000, %r20, %r27) |
| 27371 | .word 0xb7c6c000 ! 168: JMPL_R jmpl %r27 + %r0, %r27 |
| 27372 | .word 0x91684008 ! 169: SDIVX_R sdivx %r1, %r8, %r8 |
| 27373 | splash_cmpr_1_132: |
| 27374 | mov 1, %r18 |
| 27375 | sllx %r18, 63, %r18 |
| 27376 | rd %tick, %r17 |
| 27377 | add %r17, 0x70, %r17 |
| 27378 | or %r17, %r18, %r17 |
| 27379 | .word 0xaf800011 ! 170: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27380 | .word 0xd01fc000 ! 171: LDD_R ldd [%r31 + %r0], %r8 |
| 27381 | nop |
| 27382 | ta T_CHANGE_HPRIV |
| 27383 | mov 0x1+1, %r10 |
| 27384 | set sync_thr_counter5, %r23 |
| 27385 | #ifndef SPC |
| 27386 | ldxa [%g0]0x63, %o1 |
| 27387 | and %o1, 0x38, %o1 |
| 27388 | add %o1, %r23, %r23 |
| 27389 | sllx %o1, 5, %o3 !(CID*256) |
| 27390 | #endif |
| 27391 | cas [%r23],%g0,%r10 !lock |
| 27392 | brnz %r10, cwq_1_133 |
| 27393 | rd %asi, %r12 |
| 27394 | wr %g0, 0x40, %asi |
| 27395 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 27396 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 27397 | cmp %l1, 1 |
| 27398 | bne cwq_1_133 |
| 27399 | set CWQ_BASE, %l6 |
| 27400 | #ifndef SPC |
| 27401 | add %l6, %o3, %l6 |
| 27402 | #endif |
| 27403 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 27404 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 27405 | sllx %l2, 32, %l2 |
| 27406 | stx %l2, [%l6 + 0x0] |
| 27407 | membar #Sync |
| 27408 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 27409 | sub %l2, 0x40, %l2 |
| 27410 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 27411 | wr %r12, %g0, %asi |
| 27412 | st %g0, [%r23] |
| 27413 | cwq_1_133: |
| 27414 | ta T_CHANGE_NONHPRIV |
| 27415 | .word 0xa1414000 ! 172: RDPC rd %pc, %r16 |
| 27416 | jmptr_1_134: |
| 27417 | nop |
| 27418 | best_set_reg(0xe0200000, %r20, %r27) |
| 27419 | .word 0xb7c6c000 ! 173: JMPL_R jmpl %r27 + %r0, %r27 |
| 27420 | .word 0xe09fd100 ! 174: LDDA_R ldda [%r31, %r0] 0x88, %r16 |
| 27421 | setx 0xa5b8e1695cd3b7b0, %r1, %r28 |
| 27422 | stxa %r28, [%g0] 0x73 |
| 27423 | intvec_1_135: |
| 27424 | .word 0x39400001 ! 175: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27425 | splash_cmpr_1_136: |
| 27426 | mov 0, %r18 |
| 27427 | sllx %r18, 63, %r18 |
| 27428 | rd %tick, %r17 |
| 27429 | add %r17, 0x70, %r17 |
| 27430 | or %r17, %r18, %r17 |
| 27431 | ta T_CHANGE_HPRIV |
| 27432 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27433 | .word 0xaf800011 ! 176: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27434 | .word 0xe0d7e008 ! 177: LDSHA_I ldsha [%r31, + 0x0008] %asi, %r16 |
| 27435 | splash_cmpr_1_137: |
| 27436 | mov 0, %r18 |
| 27437 | sllx %r18, 63, %r18 |
| 27438 | rd %tick, %r17 |
| 27439 | add %r17, 0x100, %r17 |
| 27440 | or %r17, %r18, %r17 |
| 27441 | ta T_CHANGE_HPRIV |
| 27442 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27443 | ta T_CHANGE_PRIV |
| 27444 | .word 0xb3800011 ! 178: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 27445 | mondo_1_138: |
| 27446 | nop |
| 27447 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27448 | stxa %r10, [%r0+0x3c0] %asi |
| 27449 | .word 0x9d940011 ! 179: WRPR_WSTATE_R wrpr %r16, %r17, %wstate |
| 27450 | change_to_randtl_1_139: |
| 27451 | ta T_CHANGE_HPRIV ! macro |
| 27452 | done_change_to_randtl_1_139: |
| 27453 | .word 0x8f902001 ! 180: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 27454 | jmptr_1_140: |
| 27455 | nop |
| 27456 | best_set_reg(0xe0200000, %r20, %r27) |
| 27457 | .word 0xb7c6c000 ! 181: JMPL_R jmpl %r27 + %r0, %r27 |
| 27458 | .word 0x91928013 ! 182: WRPR_PIL_R wrpr %r10, %r19, %pil |
| 27459 | donret_1_142: |
| 27460 | nop |
| 27461 | ta T_CHANGE_HPRIV ! macro |
| 27462 | rd %pc, %r12 |
| 27463 | add %r12, (donretarg_1_142-donret_1_142-8), %r12 |
| 27464 | add %r12, 0x4, %r11 |
| 27465 | wrpr %g0, 0x2, %tl |
| 27466 | wrpr %g0, %r12, %tpc |
| 27467 | wrpr %g0, %r11, %tnpc |
| 27468 | set (0x00d4bc88 | (28 << 24)), %r13 |
| 27469 | rdpr %tstate, %r16 |
| 27470 | mov 0x1f, %r19 |
| 27471 | and %r19, %r16, %r17 |
| 27472 | andn %r16, %r19, %r16 |
| 27473 | or %r16, %r17, %r20 |
| 27474 | wrpr %r20, %g0, %tstate |
| 27475 | wrhpr %g0, 0x1645, %htstate |
| 27476 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 27477 | retry |
| 27478 | donretarg_1_142: |
| 27479 | .word 0xa7a449ca ! 183: FDIVd fdivd %f48, %f10, %f50 |
| 27480 | .word 0xe6c7e040 ! 184: LDSWA_I ldswa [%r31, + 0x0040] %asi, %r19 |
| 27481 | .word 0xc1bfdf20 ! 185: STDFA_R stda %f0, [%r0, %r31] |
| 27482 | .word 0xe6cfe0a0 ! 186: LDSBA_I ldsba [%r31, + 0x00a0] %asi, %r19 |
| 27483 | splash_cmpr_1_143: |
| 27484 | mov 1, %r18 |
| 27485 | sllx %r18, 63, %r18 |
| 27486 | rd %tick, %r17 |
| 27487 | add %r17, 0x80, %r17 |
| 27488 | or %r17, %r18, %r17 |
| 27489 | ta T_CHANGE_HPRIV |
| 27490 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27491 | .word 0xaf800011 ! 187: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27492 | .word 0x9a830002 ! 188: ADDcc_R addcc %r12, %r2, %r13 |
| 27493 | ibp_1_144: |
| 27494 | nop |
| 27495 | ta T_CHANGE_NONHPRIV |
| 27496 | .word 0xc19fdc00 ! 189: LDDFA_R ldda [%r31, %r0], %f0 |
| 27497 | ceter_1_145: |
| 27498 | nop |
| 27499 | ta T_CHANGE_HPRIV |
| 27500 | mov 7, %r17 |
| 27501 | sllx %r17, 60, %r17 |
| 27502 | mov 0x18, %r16 |
| 27503 | stxa %r17, [%r16]0x4c |
| 27504 | ta T_CHANGE_NONHPRIV |
| 27505 | .word 0x93410000 ! 190: RDTICK rd %tick, %r9 |
| 27506 | ceter_1_146: |
| 27507 | nop |
| 27508 | ta T_CHANGE_HPRIV |
| 27509 | mov 3, %r17 |
| 27510 | sllx %r17, 60, %r17 |
| 27511 | mov 0x18, %r16 |
| 27512 | stxa %r17, [%r16]0x4c |
| 27513 | ta T_CHANGE_NONHPRIV |
| 27514 | .word 0xa3410000 ! 191: RDTICK rd %tick, %r17 |
| 27515 | setx 0x20c153e68220c828, %r1, %r28 |
| 27516 | stxa %r28, [%g0] 0x73 |
| 27517 | intvec_1_147: |
| 27518 | .word 0x39400001 ! 192: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27519 | .word 0x29800001 ! 193: FBL fbl,a <label_0x1> |
| 27520 | .word 0xa7a0016c ! 194: FABSq dis not found |
| 27521 | |
| 27522 | .word 0xe6c7e1b0 ! 195: LDSWA_I ldswa [%r31, + 0x01b0] %asi, %r19 |
| 27523 | splash_lsu_1_150: |
| 27524 | nop |
| 27525 | ta T_CHANGE_HPRIV |
| 27526 | set 0x561664af, %r2 |
| 27527 | mov 0x5, %r1 |
| 27528 | sllx %r1, 32, %r1 |
| 27529 | or %r1, %r2, %r2 |
| 27530 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27531 | .word 0x3d400001 ! 196: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27532 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 27533 | reduce_priv_lvl_1_151: |
| 27534 | ta T_CHANGE_NONPRIV ! macro |
| 27535 | .word 0xe65fe150 ! 198: LDX_I ldx [%r31 + 0x0150], %r19 |
| 27536 | splash_hpstate_1_152: |
| 27537 | ta T_CHANGE_NONHPRIV |
| 27538 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 27539 | .word 0x81983cc4 ! 199: WRHPR_HPSTATE_I wrhpr %r0, 0x1cc4, %hpstate |
| 27540 | .word 0x9353c000 ! 200: RDPR_FQ <illegal instruction> |
| 27541 | .word 0x9f80320f ! 201: SIR sir 0x120f |
| 27542 | mondo_1_153: |
| 27543 | nop |
| 27544 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27545 | stxa %r17, [%r0+0x3e8] %asi |
| 27546 | .word 0x9d944005 ! 202: WRPR_WSTATE_R wrpr %r17, %r5, %wstate |
| 27547 | jmptr_1_154: |
| 27548 | nop |
| 27549 | best_set_reg(0xe0200000, %r20, %r27) |
| 27550 | .word 0xb7c6c000 ! 203: JMPL_R jmpl %r27 + %r0, %r27 |
| 27551 | fbe,a,pn %fcc0, skip_1_155 |
| 27552 | fbuge skip_1_155 |
| 27553 | .align 2048 |
| 27554 | skip_1_155: |
| 27555 | .word 0x24c94001 ! 204: BRLEZ brlez,a,pt %r5,<label_0x94001> |
| 27556 | pmu_1_156: |
| 27557 | nop |
| 27558 | ta T_CHANGE_PRIV |
| 27559 | setx 0xfffff58cfffffc73, %g1, %g7 |
| 27560 | .word 0xa3800007 ! 205: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27561 | setx 0xac9c457ddf49215d, %r1, %r28 |
| 27562 | stxa %r28, [%g0] 0x73 |
| 27563 | intvec_1_157: |
| 27564 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27565 | .word 0xe677e188 ! 207: STX_I stx %r19, [%r31 + 0x0188] |
| 27566 | brcommon2_1_158: |
| 27567 | nop |
| 27568 | setx common_target, %r12, %r27 |
| 27569 | ba,a .+12 |
| 27570 | .word 0xa7a7c96c ! 1: FMULq dis not found |
| 27571 | |
| 27572 | ba,a .+8 |
| 27573 | jmpl %r27+0, %r27 |
| 27574 | .word 0xc19fe1a0 ! 208: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 27575 | .word 0x98fc8014 ! 209: SDIVcc_R sdivcc %r18, %r20, %r12 |
| 27576 | .word 0xd897e1b0 ! 210: LDUHA_I lduha [%r31, + 0x01b0] %asi, %r12 |
| 27577 | .word 0x3c800001 ! 211: BPOS bpos,a <label_0x1> |
| 27578 | change_to_randtl_1_159: |
| 27579 | ta T_CHANGE_HPRIV ! macro |
| 27580 | done_change_to_randtl_1_159: |
| 27581 | .word 0x8f902002 ! 212: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 27582 | tagged_1_160: |
| 27583 | tsubcctv %r19, 0x1d99, %r16 |
| 27584 | .word 0xd807e16e ! 213: LDUW_I lduw [%r31 + 0x016e], %r12 |
| 27585 | br_badelay1_1_161: |
| 27586 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> |
| 27587 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 27588 | .word 0xd9e7c032 ! 1: CASA_I casa [%r31] 0x 1, %r18, %r12 |
| 27589 | normalw |
| 27590 | .word 0xa1458000 ! 214: RD_SOFTINT_REG rd %softint, %r16 |
| 27591 | pmu_1_162: |
| 27592 | nop |
| 27593 | setx 0xfffff383fffff408, %g1, %g7 |
| 27594 | .word 0xa3800007 ! 215: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27595 | .word 0x89800011 ! 216: WRTICK_R wr %r0, %r17, %tick |
| 27596 | pmu_1_164: |
| 27597 | nop |
| 27598 | ta T_CHANGE_PRIV |
| 27599 | setx 0xfffff696fffff652, %g1, %g7 |
| 27600 | .word 0xa3800007 ! 217: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27601 | otherw |
| 27602 | mov 0x35, %r30 |
| 27603 | .word 0x91d0001e ! 218: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 27604 | .word 0xc1bfc3e0 ! 219: STDFA_R stda %f0, [%r0, %r31] |
| 27605 | .word 0xc1bfd920 ! 220: STDFA_R stda %f0, [%r0, %r31] |
| 27606 | .word 0xc1bfe1c0 ! 221: STDFA_I stda %f0, [0x01c0, %r31] |
| 27607 | setx 0x176a420241c68c80, %r1, %r28 |
| 27608 | stxa %r28, [%g0] 0x73 |
| 27609 | intvec_1_165: |
| 27610 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27611 | br_longdelay1_1_166: |
| 27612 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 27613 | .word 0xbfefc000 ! 223: RESTORE_R restore %r31, %r0, %r31 |
| 27614 | nop |
| 27615 | ta T_CHANGE_HPRIV |
| 27616 | mov 0x1, %r10 |
| 27617 | set sync_thr_counter6, %r23 |
| 27618 | #ifndef SPC |
| 27619 | ldxa [%g0]0x63, %o1 |
| 27620 | and %o1, 0x38, %o1 |
| 27621 | add %o1, %r23, %r23 |
| 27622 | #endif |
| 27623 | cas [%r23],%g0,%r10 !lock |
| 27624 | brnz %r10, sma_1_167 |
| 27625 | rd %asi, %r12 |
| 27626 | wr %g0, 0x40, %asi |
| 27627 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27628 | set 0x000e1fff, %g1 |
| 27629 | stxa %g1, [%g0 + 0x80] %asi |
| 27630 | wr %r12, %g0, %asi |
| 27631 | st %g0, [%r23] |
| 27632 | sma_1_167: |
| 27633 | ta T_CHANGE_NONHPRIV |
| 27634 | .word 0xe1e7e012 ! 224: CASA_R casa [%r31] %asi, %r18, %r16 |
| 27635 | jmptr_1_168: |
| 27636 | nop |
| 27637 | best_set_reg(0xe0200000, %r20, %r27) |
| 27638 | .word 0xb7c6c000 ! 225: JMPL_R jmpl %r27 + %r0, %r27 |
| 27639 | setx 0xad8877e244a404a7, %r1, %r28 |
| 27640 | stxa %r28, [%g0] 0x73 |
| 27641 | intvec_1_169: |
| 27642 | .word 0x39400001 ! 226: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27643 | mondo_1_170: |
| 27644 | nop |
| 27645 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27646 | ta T_CHANGE_PRIV |
| 27647 | stxa %r9, [%r0+0x3d0] %asi |
| 27648 | .word 0x9d940005 ! 227: WRPR_WSTATE_R wrpr %r16, %r5, %wstate |
| 27649 | splash_cmpr_1_171: |
| 27650 | mov 0, %r18 |
| 27651 | sllx %r18, 63, %r18 |
| 27652 | rd %tick, %r17 |
| 27653 | add %r17, 0x80, %r17 |
| 27654 | or %r17, %r18, %r17 |
| 27655 | ta T_CHANGE_PRIV |
| 27656 | .word 0xaf800011 ! 228: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27657 | pmu_1_172: |
| 27658 | nop |
| 27659 | ta T_CHANGE_PRIV |
| 27660 | setx 0xfffffbd7fffff64a, %g1, %g7 |
| 27661 | .word 0xa3800007 ! 229: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27662 | splash_lsu_1_173: |
| 27663 | nop |
| 27664 | ta T_CHANGE_HPRIV |
| 27665 | set 0xfbc7aea3, %r2 |
| 27666 | mov 0x2, %r1 |
| 27667 | sllx %r1, 32, %r1 |
| 27668 | or %r1, %r2, %r2 |
| 27669 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27670 | ta T_CHANGE_NONHPRIV |
| 27671 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27672 | mondo_1_174: |
| 27673 | nop |
| 27674 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27675 | ta T_CHANGE_PRIV |
| 27676 | stxa %r13, [%r0+0x3e8] %asi |
| 27677 | .word 0x9d950012 ! 231: WRPR_WSTATE_R wrpr %r20, %r18, %wstate |
| 27678 | memptr_1_175: |
| 27679 | set 0x60740000, %r31 |
| 27680 | .word 0x8584b713 ! 232: WRCCR_I wr %r18, 0x1713, %ccr |
| 27681 | mondo_1_176: |
| 27682 | nop |
| 27683 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27684 | ta T_CHANGE_PRIV |
| 27685 | stxa %r7, [%r0+0x3d0] %asi |
| 27686 | .word 0x9d94c012 ! 233: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 27687 | #if (defined SPC || defined CMP) |
| 27688 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_177)+32, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27689 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_177)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27690 | #else |
| 27691 | !! TODO:Generate XIR via RESET_GEN register |
| 27692 | ! setx 0x8900000808, %r16, %r17 |
| 27693 | ! mov 0x2, %r16 |
| 27694 | ! stw %r16, [%r17] |
| 27695 | #endif |
| 27696 | xir_1_177: |
| 27697 | .word 0xa9852a47 ! 234: WR_SET_SOFTINT_I wr %r20, 0x0a47, %set_softint |
| 27698 | splash_lsu_1_178: |
| 27699 | nop |
| 27700 | ta T_CHANGE_HPRIV |
| 27701 | set 0xc0d9a69d, %r2 |
| 27702 | mov 0x6, %r1 |
| 27703 | sllx %r1, 32, %r1 |
| 27704 | or %r1, %r2, %r2 |
| 27705 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27706 | .word 0x3d400001 ! 235: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27707 | pmu_1_179: |
| 27708 | nop |
| 27709 | setx 0xfffff802fffffb2c, %g1, %g7 |
| 27710 | .word 0xa3800007 ! 236: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27711 | splash_lsu_1_180: |
| 27712 | nop |
| 27713 | ta T_CHANGE_HPRIV |
| 27714 | set 0x257eae75, %r2 |
| 27715 | mov 0x5, %r1 |
| 27716 | sllx %r1, 32, %r1 |
| 27717 | or %r1, %r2, %r2 |
| 27718 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27719 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27720 | splash_cmpr_1_181: |
| 27721 | mov 0, %r18 |
| 27722 | sllx %r18, 63, %r18 |
| 27723 | rd %tick, %r17 |
| 27724 | add %r17, 0x50, %r17 |
| 27725 | or %r17, %r18, %r17 |
| 27726 | ta T_CHANGE_HPRIV |
| 27727 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27728 | .word 0xaf800011 ! 238: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 27729 | .word 0xe057e128 ! 239: LDSH_I ldsh [%r31 + 0x0128], %r16 |
| 27730 | donret_1_182: |
| 27731 | nop |
| 27732 | ta T_CHANGE_HPRIV ! macro |
| 27733 | rd %pc, %r12 |
| 27734 | add %r12, (donretarg_1_182-donret_1_182-8), %r12 |
| 27735 | add %r12, 0x4, %r11 |
| 27736 | wrpr %g0, 0x1, %tl |
| 27737 | wrpr %g0, %r12, %tpc |
| 27738 | wrpr %g0, %r11, %tnpc |
| 27739 | set (0x004a70bf | (0x88 << 24)), %r13 |
| 27740 | rdpr %tstate, %r16 |
| 27741 | mov 0x1f, %r19 |
| 27742 | and %r19, %r16, %r17 |
| 27743 | andn %r16, %r19, %r16 |
| 27744 | or %r16, %r17, %r20 |
| 27745 | wrpr %r20, %g0, %tstate |
| 27746 | wrhpr %g0, 0x89d, %htstate |
| 27747 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 27748 | retry |
| 27749 | donretarg_1_182: |
| 27750 | .word 0xe0ffe157 ! 240: SWAPA_I swapa %r16, [%r31 + 0x0157] %asi |
| 27751 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 27752 | reduce_priv_lvl_1_183: |
| 27753 | ta T_CHANGE_NONPRIV ! macro |
| 27754 | .word 0xe1bfe160 ! 242: STDFA_I stda %f16, [0x0160, %r31] |
| 27755 | #if (defined SPC || defined CMP) |
| 27756 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_184)+24, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27757 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_184)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 27758 | #else |
| 27759 | !! TODO:Generate XIR via RESET_GEN register |
| 27760 | ! setx 0x8900000808, %r16, %r17 |
| 27761 | ! mov 0x2, %r16 |
| 27762 | ! stw %r16, [%r17] |
| 27763 | #endif |
| 27764 | xir_1_184: |
| 27765 | .word 0xa9846617 ! 243: WR_SET_SOFTINT_I wr %r17, 0x0617, %set_softint |
| 27766 | unsupttte_1_185: |
| 27767 | nop |
| 27768 | ta T_CHANGE_HPRIV |
| 27769 | mov 1, %r20 |
| 27770 | sllx %r20, 63, %r20 |
| 27771 | or %r20, 2,%r20 |
| 27772 | stxa %r20, [%g0]0x54 ! I unsupported page size .. |
| 27773 | ta T_CHANGE_NONHPRIV |
| 27774 | .word 0x87ac0a52 ! 244: FCMPd fcmpd %fcc<n>, %f16, %f18 |
| 27775 | .word 0x2a800001 ! 245: BCS bcs,a <label_0x1> |
| 27776 | nop |
| 27777 | ta T_CHANGE_HPRIV |
| 27778 | mov 0x1+1, %r10 |
| 27779 | set sync_thr_counter5, %r23 |
| 27780 | #ifndef SPC |
| 27781 | ldxa [%g0]0x63, %o1 |
| 27782 | and %o1, 0x38, %o1 |
| 27783 | add %o1, %r23, %r23 |
| 27784 | sllx %o1, 5, %o3 !(CID*256) |
| 27785 | #endif |
| 27786 | cas [%r23],%g0,%r10 !lock |
| 27787 | brnz %r10, cwq_1_186 |
| 27788 | rd %asi, %r12 |
| 27789 | wr %g0, 0x40, %asi |
| 27790 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 27791 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 27792 | cmp %l1, 1 |
| 27793 | bne cwq_1_186 |
| 27794 | set CWQ_BASE, %l6 |
| 27795 | #ifndef SPC |
| 27796 | add %l6, %o3, %l6 |
| 27797 | #endif |
| 27798 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 27799 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 27800 | sllx %l2, 32, %l2 |
| 27801 | stx %l2, [%l6 + 0x0] |
| 27802 | membar #Sync |
| 27803 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 27804 | sub %l2, 0x40, %l2 |
| 27805 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 27806 | wr %r12, %g0, %asi |
| 27807 | st %g0, [%r23] |
| 27808 | cwq_1_186: |
| 27809 | ta T_CHANGE_NONHPRIV |
| 27810 | .word 0x91414000 ! 246: RDPC rd %pc, %r8 |
| 27811 | setx 0xbab8ed0b4a8c01ae, %r1, %r28 |
| 27812 | stxa %r28, [%g0] 0x73 |
| 27813 | intvec_1_187: |
| 27814 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27815 | pmu_1_188: |
| 27816 | nop |
| 27817 | setx 0xfffffd9afffff5f3, %g1, %g7 |
| 27818 | .word 0xa3800007 ! 248: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27819 | splash_cmpr_1_189: |
| 27820 | mov 1, %r18 |
| 27821 | sllx %r18, 63, %r18 |
| 27822 | rd %tick, %r17 |
| 27823 | add %r17, 0x70, %r17 |
| 27824 | or %r17, %r18, %r17 |
| 27825 | ta T_CHANGE_HPRIV |
| 27826 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 27827 | .word 0xb3800011 ! 249: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 27828 | donret_1_190: |
| 27829 | nop |
| 27830 | ta T_CHANGE_HPRIV ! macro |
| 27831 | rd %pc, %r12 |
| 27832 | add %r12, (donretarg_1_190-donret_1_190-8), %r12 |
| 27833 | add %r12, 0x4, %r11 |
| 27834 | wrpr %g0, 0x1, %tl |
| 27835 | wrpr %g0, %r12, %tpc |
| 27836 | wrpr %g0, %r11, %tnpc |
| 27837 | set (0x00e9ce63 | (22 << 24)), %r13 |
| 27838 | rdpr %tstate, %r16 |
| 27839 | mov 0x1f, %r19 |
| 27840 | and %r19, %r16, %r17 |
| 27841 | andn %r16, %r19, %r16 |
| 27842 | or %r16, %r17, %r20 |
| 27843 | wrpr %r20, %g0, %tstate |
| 27844 | wrhpr %g0, 0xf4d, %htstate |
| 27845 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 27846 | retry |
| 27847 | donretarg_1_190: |
| 27848 | .word 0xa5a449c8 ! 250: FDIVd fdivd %f48, %f8, %f18 |
| 27849 | memptr_1_191: |
| 27850 | set 0x60740000, %r31 |
| 27851 | .word 0x858431c7 ! 251: WRCCR_I wr %r16, 0x11c7, %ccr |
| 27852 | .word 0xe49fdf00 ! 252: LDDA_R ldda [%r31, %r0] 0xf8, %r18 |
| 27853 | .word 0x29800001 ! 253: FBL fbl,a <label_0x1> |
| 27854 | nop |
| 27855 | ta T_CHANGE_HPRIV |
| 27856 | mov 0x1+1, %r10 |
| 27857 | set sync_thr_counter5, %r23 |
| 27858 | #ifndef SPC |
| 27859 | ldxa [%g0]0x63, %o1 |
| 27860 | and %o1, 0x38, %o1 |
| 27861 | add %o1, %r23, %r23 |
| 27862 | sllx %o1, 5, %o3 !(CID*256) |
| 27863 | #endif |
| 27864 | cas [%r23],%g0,%r10 !lock |
| 27865 | brnz %r10, cwq_1_193 |
| 27866 | rd %asi, %r12 |
| 27867 | wr %g0, 0x40, %asi |
| 27868 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 27869 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 27870 | cmp %l1, 1 |
| 27871 | bne cwq_1_193 |
| 27872 | set CWQ_BASE, %l6 |
| 27873 | #ifndef SPC |
| 27874 | add %l6, %o3, %l6 |
| 27875 | #endif |
| 27876 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 27877 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 27878 | sllx %l2, 32, %l2 |
| 27879 | stx %l2, [%l6 + 0x0] |
| 27880 | membar #Sync |
| 27881 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 27882 | sub %l2, 0x40, %l2 |
| 27883 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 27884 | wr %r12, %g0, %asi |
| 27885 | st %g0, [%r23] |
| 27886 | cwq_1_193: |
| 27887 | ta T_CHANGE_NONHPRIV |
| 27888 | .word 0xa1414000 ! 254: RDPC rd %pc, %r16 |
| 27889 | splash_lsu_1_194: |
| 27890 | nop |
| 27891 | ta T_CHANGE_HPRIV |
| 27892 | set 0x43322f4f, %r2 |
| 27893 | mov 0x5, %r1 |
| 27894 | sllx %r1, 32, %r1 |
| 27895 | or %r1, %r2, %r2 |
| 27896 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 27897 | ta T_CHANGE_NONHPRIV |
| 27898 | .word 0x3d400001 ! 255: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 27899 | .word 0xa953c000 ! 256: RDPR_FQ <illegal instruction> |
| 27900 | vahole_1_195: |
| 27901 | nop |
| 27902 | ta T_CHANGE_NONHPRIV |
| 27903 | setx vahole_target2, %r18, %r27 |
| 27904 | jmpl %r27+0, %r27 |
| 27905 | .word 0xe897c02b ! 257: LDUHA_R lduha [%r31, %r11] 0x01, %r20 |
| 27906 | #if (defined SPC || defined CMP) |
| 27907 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_196) + 32, 16, 16)) -> intp(2,0,1) |
| 27908 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_196)&0xffffffff) + 32, 16, 16)) -> intp(2,0,1) |
| 27909 | #else |
| 27910 | setx 0xf91ae3841bdb43c2, %r1, %r28 |
| 27911 | stxa %r28, [%g0] 0x73 |
| 27912 | #endif |
| 27913 | intvec_1_196: |
| 27914 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 27915 | nop |
| 27916 | ta T_CHANGE_HPRIV |
| 27917 | mov 0x1, %r10 |
| 27918 | set sync_thr_counter6, %r23 |
| 27919 | #ifndef SPC |
| 27920 | ldxa [%g0]0x63, %o1 |
| 27921 | and %o1, 0x38, %o1 |
| 27922 | add %o1, %r23, %r23 |
| 27923 | #endif |
| 27924 | cas [%r23],%g0,%r10 !lock |
| 27925 | brnz %r10, sma_1_197 |
| 27926 | rd %asi, %r12 |
| 27927 | wr %g0, 0x40, %asi |
| 27928 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27929 | set 0x000e1fff, %g1 |
| 27930 | stxa %g1, [%g0 + 0x80] %asi |
| 27931 | wr %r12, %g0, %asi |
| 27932 | st %g0, [%r23] |
| 27933 | sma_1_197: |
| 27934 | ta T_CHANGE_NONHPRIV |
| 27935 | .word 0xe9e7e011 ! 259: CASA_R casa [%r31] %asi, %r17, %r20 |
| 27936 | .word 0xe8c7e0e8 ! 260: LDSWA_I ldswa [%r31, + 0x00e8] %asi, %r20 |
| 27937 | vahole_1_198: |
| 27938 | nop |
| 27939 | ta T_CHANGE_NONHPRIV |
| 27940 | setx vahole_target3, %r18, %r27 |
| 27941 | jmpl %r27+0, %r27 |
| 27942 | .word 0x97a409a3 ! 261: FDIVs fdivs %f16, %f3, %f11 |
| 27943 | .word 0xd697e0d8 ! 262: LDUHA_I lduha [%r31, + 0x00d8] %asi, %r11 |
| 27944 | .word 0xd73fc000 ! 263: STDF_R std %f11, [%r0, %r31] |
| 27945 | .word 0xd68fe070 ! 264: LDUBA_I lduba [%r31, + 0x0070] %asi, %r11 |
| 27946 | pmu_1_199: |
| 27947 | nop |
| 27948 | setx 0xfffffc52fffff33d, %g1, %g7 |
| 27949 | .word 0xa3800007 ! 265: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27950 | .word 0x89800011 ! 266: WRTICK_R wr %r0, %r17, %tick |
| 27951 | vahole_1_201: |
| 27952 | nop |
| 27953 | ta T_CHANGE_NONHPRIV |
| 27954 | setx vahole_target1, %r18, %r27 |
| 27955 | jmpl %r27+0, %r27 |
| 27956 | .word 0xa1b247ca ! 267: PDIST pdistn %d40, %d10, %d16 |
| 27957 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 27958 | .word 0x8d903132 ! 268: WRPR_PSTATE_I wrpr %r0, 0x1132, %pstate |
| 27959 | .word 0xe097e1e0 ! 269: LDUHA_I lduha [%r31, + 0x01e0] %asi, %r16 |
| 27960 | nop |
| 27961 | ta T_CHANGE_HPRIV |
| 27962 | mov 0x1, %r10 |
| 27963 | set sync_thr_counter6, %r23 |
| 27964 | #ifndef SPC |
| 27965 | ldxa [%g0]0x63, %o1 |
| 27966 | and %o1, 0x38, %o1 |
| 27967 | add %o1, %r23, %r23 |
| 27968 | #endif |
| 27969 | cas [%r23],%g0,%r10 !lock |
| 27970 | brnz %r10, sma_1_203 |
| 27971 | rd %asi, %r12 |
| 27972 | wr %g0, 0x40, %asi |
| 27973 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 27974 | set 0x000a1fff, %g1 |
| 27975 | stxa %g1, [%g0 + 0x80] %asi |
| 27976 | wr %r12, %g0, %asi |
| 27977 | st %g0, [%r23] |
| 27978 | sma_1_203: |
| 27979 | ta T_CHANGE_NONHPRIV |
| 27980 | .word 0xe1e7e009 ! 270: CASA_R casa [%r31] %asi, %r9, %r16 |
| 27981 | .word 0xe07fe0d0 ! 271: SWAP_I swap %r16, [%r31 + 0x00d0] |
| 27982 | .word 0x28780001 ! 272: BPLEU <illegal instruction> |
| 27983 | cwp_1_204: |
| 27984 | set user_data_start, %o7 |
| 27985 | .word 0x93902007 ! 273: WRPR_CWP_I wrpr %r0, 0x0007, %cwp |
| 27986 | pmu_1_205: |
| 27987 | nop |
| 27988 | ta T_CHANGE_PRIV |
| 27989 | setx 0xfffff737fffff090, %g1, %g7 |
| 27990 | .word 0xa3800007 ! 274: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 27991 | mondo_1_206: |
| 27992 | nop |
| 27993 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 27994 | ta T_CHANGE_PRIV |
| 27995 | stxa %r17, [%r0+0x3c8] %asi |
| 27996 | .word 0x9d92c012 ! 275: WRPR_WSTATE_R wrpr %r11, %r18, %wstate |
| 27997 | br_badelay3_1_207: |
| 27998 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 27999 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 28000 | .word 0xa1a0054a ! 1: FSQRTd fsqrt |
| 28001 | .word 0x99a24831 ! 276: FADDs fadds %f9, %f17, %f12 |
| 28002 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 28003 | reduce_priv_lvl_1_208: |
| 28004 | ta T_CHANGE_NONPRIV ! macro |
| 28005 | .word 0x89800011 ! 278: WRTICK_R wr %r0, %r17, %tick |
| 28006 | mondo_1_210: |
| 28007 | nop |
| 28008 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28009 | stxa %r1, [%r0+0x3c0] %asi |
| 28010 | .word 0x9d924014 ! 279: WRPR_WSTATE_R wrpr %r9, %r20, %wstate |
| 28011 | donret_1_211: |
| 28012 | nop |
| 28013 | ta T_CHANGE_HPRIV ! macro |
| 28014 | rd %pc, %r12 |
| 28015 | add %r12, (donretarg_1_211-donret_1_211-4), %r12 |
| 28016 | add %r12, 0x4, %r11 |
| 28017 | wrpr %g0, 0x1, %tl |
| 28018 | wrpr %g0, %r12, %tpc |
| 28019 | wrpr %g0, %r11, %tnpc |
| 28020 | set (0x00b38eb5 | (4 << 24)), %r13 |
| 28021 | rdpr %tstate, %r16 |
| 28022 | mov 0x1f, %r19 |
| 28023 | and %r19, %r16, %r17 |
| 28024 | andn %r16, %r19, %r16 |
| 28025 | or %r16, %r17, %r20 |
| 28026 | wrpr %r20, %g0, %tstate |
| 28027 | wrhpr %g0, 0xa45, %htstate |
| 28028 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 28029 | done |
| 28030 | donretarg_1_211: |
| 28031 | .word 0xd86fe061 ! 280: LDSTUB_I ldstub %r12, [%r31 + 0x0061] |
| 28032 | donret_1_212: |
| 28033 | nop |
| 28034 | ta T_CHANGE_HPRIV ! macro |
| 28035 | rd %pc, %r12 |
| 28036 | add %r12, (donretarg_1_212-donret_1_212-8), %r12 |
| 28037 | add %r12, 0x4, %r11 |
| 28038 | wrpr %g0, 0x1, %tl |
| 28039 | wrpr %g0, %r12, %tpc |
| 28040 | wrpr %g0, %r11, %tnpc |
| 28041 | set (0x00460bb6 | (0x4f << 24)), %r13 |
| 28042 | rdpr %tstate, %r16 |
| 28043 | mov 0x1f, %r19 |
| 28044 | and %r19, %r16, %r17 |
| 28045 | andn %r16, %r19, %r16 |
| 28046 | or %r16, %r17, %r20 |
| 28047 | wrpr %r20, %g0, %tstate |
| 28048 | wrhpr %g0, 0xac7, %htstate |
| 28049 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 28050 | retry |
| 28051 | donretarg_1_212: |
| 28052 | .word 0xa9a4c9c7 ! 281: FDIVd fdivd %f50, %f38, %f20 |
| 28053 | brcommon1_1_213: |
| 28054 | nop |
| 28055 | setx common_target, %r12, %r27 |
| 28056 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 28057 | ba,a .+12 |
| 28058 | .word 0xe9e7c02b ! 1: CASA_I casa [%r31] 0x 1, %r11, %r20 |
| 28059 | ba,a .+8 |
| 28060 | jmpl %r27+0, %r27 |
| 28061 | .word 0x97b4c491 ! 282: FCMPLE32 fcmple32 %d50, %d48, %r11 |
| 28062 | .word 0xc19fe160 ! 283: LDDFA_I ldda [%r31, 0x0160], %f0 |
| 28063 | .word 0x8d903153 ! 284: WRPR_PSTATE_I wrpr %r0, 0x1153, %pstate |
| 28064 | splash_cmpr_1_215: |
| 28065 | mov 0, %r18 |
| 28066 | sllx %r18, 63, %r18 |
| 28067 | rd %tick, %r17 |
| 28068 | add %r17, 0x50, %r17 |
| 28069 | or %r17, %r18, %r17 |
| 28070 | ta T_CHANGE_PRIV |
| 28071 | .word 0xb3800011 ! 285: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 28072 | splash_cmpr_1_216: |
| 28073 | mov 0, %r18 |
| 28074 | sllx %r18, 63, %r18 |
| 28075 | rd %tick, %r17 |
| 28076 | add %r17, 0x50, %r17 |
| 28077 | or %r17, %r18, %r17 |
| 28078 | ta T_CHANGE_HPRIV |
| 28079 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28080 | .word 0xb3800011 ! 286: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 28081 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 28082 | reduce_priv_lvl_1_217: |
| 28083 | ta T_CHANGE_NONPRIV ! macro |
| 28084 | .word 0x2acc8001 ! 1: BRNZ brnz,a,pt %r18,<label_0xc8001> |
| 28085 | .word 0x8d9031ea ! 288: WRPR_PSTATE_I wrpr %r0, 0x11ea, %pstate |
| 28086 | splash_lsu_1_219: |
| 28087 | nop |
| 28088 | ta T_CHANGE_HPRIV |
| 28089 | set 0x617875bb, %r2 |
| 28090 | mov 0x4, %r1 |
| 28091 | sllx %r1, 32, %r1 |
| 28092 | or %r1, %r2, %r2 |
| 28093 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 28094 | .word 0x3d400001 ! 289: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 28095 | donret_1_220: |
| 28096 | nop |
| 28097 | ta T_CHANGE_HPRIV ! macro |
| 28098 | rd %pc, %r12 |
| 28099 | add %r12, (donretarg_1_220-donret_1_220-8), %r12 |
| 28100 | add %r12, 0x4, %r11 |
| 28101 | wrpr %g0, 0x2, %tl |
| 28102 | wrpr %g0, %r12, %tpc |
| 28103 | wrpr %g0, %r11, %tnpc |
| 28104 | set (0x004ea376 | (0x88 << 24)), %r13 |
| 28105 | rdpr %tstate, %r16 |
| 28106 | mov 0x1f, %r19 |
| 28107 | and %r19, %r16, %r17 |
| 28108 | andn %r16, %r19, %r16 |
| 28109 | or %r16, %r17, %r20 |
| 28110 | wrpr %r20, %g0, %tstate |
| 28111 | wrhpr %g0, 0x1b8d, %htstate |
| 28112 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 28113 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 28114 | retry |
| 28115 | donretarg_1_220: |
| 28116 | .word 0xd66fe07c ! 290: LDSTUB_I ldstub %r11, [%r31 + 0x007c] |
| 28117 | .word 0x91d02034 ! 291: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 28118 | setx 0xf3a359b9fb2eaa01, %r1, %r28 |
| 28119 | stxa %r28, [%g0] 0x73 |
| 28120 | intvec_1_221: |
| 28121 | .word 0x39400001 ! 292: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28122 | brcommon3_1_222: |
| 28123 | nop |
| 28124 | setx common_target, %r12, %r27 |
| 28125 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 28126 | ba,a .+12 |
| 28127 | .word 0xd737e020 ! 1: STQF_I - %f11, [0x0020, %r31] |
| 28128 | ba,a .+8 |
| 28129 | jmpl %r27+0, %r27 |
| 28130 | .word 0xd69fc028 ! 293: LDDA_R ldda [%r31, %r8] 0x01, %r11 |
| 28131 | .word 0xd6d7e1c0 ! 294: LDSHA_I ldsha [%r31, + 0x01c0] %asi, %r11 |
| 28132 | pmu_1_223: |
| 28133 | nop |
| 28134 | ta T_CHANGE_PRIV |
| 28135 | setx 0xfffffd94fffff505, %g1, %g7 |
| 28136 | .word 0xa3800007 ! 295: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28137 | .word 0x93a00172 ! 296: FABSq dis not found |
| 28138 | |
| 28139 | #if (defined SPC || defined CMP) |
| 28140 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_225)+32, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28141 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_225)&0xffffffff) +32, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28142 | #else |
| 28143 | !! TODO:Generate XIR via RESET_GEN register |
| 28144 | ! setx 0x8900000808, %r16, %r17 |
| 28145 | ! mov 0x2, %r16 |
| 28146 | ! stw %r16, [%r17] |
| 28147 | #endif |
| 28148 | xir_1_225: |
| 28149 | .word 0xa98463c3 ! 297: WR_SET_SOFTINT_I wr %r17, 0x03c3, %set_softint |
| 28150 | memptr_1_226: |
| 28151 | set 0x60740000, %r31 |
| 28152 | .word 0x8582fdfa ! 298: WRCCR_I wr %r11, 0x1dfa, %ccr |
| 28153 | mondo_1_227: |
| 28154 | nop |
| 28155 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28156 | ta T_CHANGE_PRIV |
| 28157 | stxa %r19, [%r0+0x3e8] %asi |
| 28158 | .word 0x9d94c001 ! 299: WRPR_WSTATE_R wrpr %r19, %r1, %wstate |
| 28159 | .word 0xd297e000 ! 300: LDUHA_I lduha [%r31, + 0x0000] %asi, %r9 |
| 28160 | vahole_1_228: |
| 28161 | nop |
| 28162 | ta T_CHANGE_NONHPRIV |
| 28163 | setx vahole_target2, %r18, %r27 |
| 28164 | jmpl %r27+0, %r27 |
| 28165 | .word 0xa9a049ac ! 301: FDIVs fdivs %f1, %f12, %f20 |
| 28166 | #if (defined SPC || defined CMP) |
| 28167 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_229)+16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28168 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_229)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28169 | #else |
| 28170 | !! TODO:Generate XIR via RESET_GEN register |
| 28171 | ! setx 0x8900000808, %r16, %r17 |
| 28172 | ! mov 0x2, %r16 |
| 28173 | ! stw %r16, [%r17] |
| 28174 | #endif |
| 28175 | xir_1_229: |
| 28176 | .word 0xa9827d5d ! 302: WR_SET_SOFTINT_I wr %r9, 0x1d5d, %set_softint |
| 28177 | .word 0x8d9024db ! 303: WRPR_PSTATE_I wrpr %r0, 0x04db, %pstate |
| 28178 | vahole_1_231: |
| 28179 | nop |
| 28180 | ta T_CHANGE_NONHPRIV |
| 28181 | setx vahole_target0, %r18, %r27 |
| 28182 | jmpl %r27+0, %r27 |
| 28183 | .word 0xe93fc008 ! 304: STDF_R std %f20, [%r8, %r31] |
| 28184 | trapasi_1_232: |
| 28185 | nop |
| 28186 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 28187 | .word 0xe8d04980 ! 305: LDSHA_R ldsha [%r1, %r0] 0x4c, %r20 |
| 28188 | #if (defined SPC || defined CMP) |
| 28189 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_233)+0, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28190 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_233)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28191 | #else |
| 28192 | !! TODO:Generate XIR via RESET_GEN register |
| 28193 | ! setx 0x8900000808, %r16, %r17 |
| 28194 | ! mov 0x2, %r16 |
| 28195 | ! stw %r16, [%r17] |
| 28196 | #endif |
| 28197 | xir_1_233: |
| 28198 | .word 0xa981bf4d ! 306: WR_SET_SOFTINT_I wr %r6, 0x1f4d, %set_softint |
| 28199 | #if (defined SPC || defined CMP) |
| 28200 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_234) + 24, 16, 16)) -> intp(5,0,30) |
| 28201 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_234)&0xffffffff) + 24, 16, 16)) -> intp(5,0,30) |
| 28202 | #else |
| 28203 | setx 0xc65b7623d10006a3, %r1, %r28 |
| 28204 | stxa %r28, [%g0] 0x73 |
| 28205 | #endif |
| 28206 | intvec_1_234: |
| 28207 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28208 | .word 0xe83fc000 ! 308: STD_R std %r20, [%r31 + %r0] |
| 28209 | pmu_1_235: |
| 28210 | nop |
| 28211 | ta T_CHANGE_PRIV |
| 28212 | setx 0xfffff361fffff44b, %g1, %g7 |
| 28213 | .word 0xa3800007 ! 309: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28214 | nop |
| 28215 | ta T_CHANGE_HPRIV |
| 28216 | mov 0x1+1, %r10 |
| 28217 | set sync_thr_counter5, %r23 |
| 28218 | #ifndef SPC |
| 28219 | ldxa [%g0]0x63, %o1 |
| 28220 | and %o1, 0x38, %o1 |
| 28221 | add %o1, %r23, %r23 |
| 28222 | sllx %o1, 5, %o3 !(CID*256) |
| 28223 | #endif |
| 28224 | cas [%r23],%g0,%r10 !lock |
| 28225 | brnz %r10, cwq_1_236 |
| 28226 | rd %asi, %r12 |
| 28227 | wr %g0, 0x40, %asi |
| 28228 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28229 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28230 | cmp %l1, 1 |
| 28231 | bne cwq_1_236 |
| 28232 | set CWQ_BASE, %l6 |
| 28233 | #ifndef SPC |
| 28234 | add %l6, %o3, %l6 |
| 28235 | #endif |
| 28236 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28237 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 28238 | sllx %l2, 32, %l2 |
| 28239 | stx %l2, [%l6 + 0x0] |
| 28240 | membar #Sync |
| 28241 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28242 | sub %l2, 0x40, %l2 |
| 28243 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28244 | wr %r12, %g0, %asi |
| 28245 | st %g0, [%r23] |
| 28246 | cwq_1_236: |
| 28247 | ta T_CHANGE_NONHPRIV |
| 28248 | .word 0x91414000 ! 310: RDPC rd %pc, %r8 |
| 28249 | nop |
| 28250 | ta T_CHANGE_HPRIV |
| 28251 | mov 0x1, %r10 |
| 28252 | set sync_thr_counter6, %r23 |
| 28253 | #ifndef SPC |
| 28254 | ldxa [%g0]0x63, %o1 |
| 28255 | and %o1, 0x38, %o1 |
| 28256 | add %o1, %r23, %r23 |
| 28257 | #endif |
| 28258 | cas [%r23],%g0,%r10 !lock |
| 28259 | brnz %r10, sma_1_237 |
| 28260 | rd %asi, %r12 |
| 28261 | wr %g0, 0x40, %asi |
| 28262 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28263 | set 0x00061fff, %g1 |
| 28264 | stxa %g1, [%g0 + 0x80] %asi |
| 28265 | wr %r12, %g0, %asi |
| 28266 | st %g0, [%r23] |
| 28267 | sma_1_237: |
| 28268 | ta T_CHANGE_NONHPRIV |
| 28269 | .word 0xd1e7e00c ! 311: CASA_R casa [%r31] %asi, %r12, %r8 |
| 28270 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 28271 | reduce_priv_lvl_1_238: |
| 28272 | ta T_CHANGE_NONPRIV ! macro |
| 28273 | nop |
| 28274 | ta T_CHANGE_HPRIV |
| 28275 | mov 0x1, %r10 |
| 28276 | set sync_thr_counter6, %r23 |
| 28277 | #ifndef SPC |
| 28278 | ldxa [%g0]0x63, %o1 |
| 28279 | and %o1, 0x38, %o1 |
| 28280 | add %o1, %r23, %r23 |
| 28281 | #endif |
| 28282 | cas [%r23],%g0,%r10 !lock |
| 28283 | brnz %r10, sma_1_239 |
| 28284 | rd %asi, %r12 |
| 28285 | wr %g0, 0x40, %asi |
| 28286 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28287 | set 0x000a1fff, %g1 |
| 28288 | stxa %g1, [%g0 + 0x80] %asi |
| 28289 | wr %r12, %g0, %asi |
| 28290 | st %g0, [%r23] |
| 28291 | sma_1_239: |
| 28292 | ta T_CHANGE_NONHPRIV |
| 28293 | .word 0xd1e7e00d ! 313: CASA_R casa [%r31] %asi, %r13, %r8 |
| 28294 | .word 0x9f802b4e ! 314: SIR sir 0x0b4e |
| 28295 | .word 0x91d02033 ! 315: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 28296 | splash_cmpr_1_240: |
| 28297 | mov 0, %r18 |
| 28298 | sllx %r18, 63, %r18 |
| 28299 | rd %tick, %r17 |
| 28300 | add %r17, 0x80, %r17 |
| 28301 | or %r17, %r18, %r17 |
| 28302 | ta T_CHANGE_HPRIV |
| 28303 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28304 | .word 0xaf800011 ! 316: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 28305 | mondo_1_241: |
| 28306 | nop |
| 28307 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28308 | stxa %r6, [%r0+0x3d0] %asi |
| 28309 | .word 0x9d940007 ! 317: WRPR_WSTATE_R wrpr %r16, %r7, %wstate |
| 28310 | nop |
| 28311 | mov 0x80, %g3 |
| 28312 | stxa %g3, [%g3] 0x57 |
| 28313 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 28314 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 28315 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 28316 | .word 0xd05fc000 ! 318: LDX_R ldx [%r31 + %r0], %r8 |
| 28317 | nop |
| 28318 | ta T_CHANGE_HPRIV |
| 28319 | mov 0x1, %r10 |
| 28320 | set sync_thr_counter6, %r23 |
| 28321 | #ifndef SPC |
| 28322 | ldxa [%g0]0x63, %o1 |
| 28323 | and %o1, 0x38, %o1 |
| 28324 | add %o1, %r23, %r23 |
| 28325 | #endif |
| 28326 | cas [%r23],%g0,%r10 !lock |
| 28327 | brnz %r10, sma_1_242 |
| 28328 | rd %asi, %r12 |
| 28329 | wr %g0, 0x40, %asi |
| 28330 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28331 | set 0x001e1fff, %g1 |
| 28332 | stxa %g1, [%g0 + 0x80] %asi |
| 28333 | wr %r12, %g0, %asi |
| 28334 | st %g0, [%r23] |
| 28335 | sma_1_242: |
| 28336 | ta T_CHANGE_NONHPRIV |
| 28337 | .word 0xd1e7e011 ! 319: CASA_R casa [%r31] %asi, %r17, %r8 |
| 28338 | br_longdelay1_1_243: |
| 28339 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 28340 | .word 0xbfefc000 ! 320: RESTORE_R restore %r31, %r0, %r31 |
| 28341 | splash_cmpr_1_244: |
| 28342 | mov 0, %r18 |
| 28343 | sllx %r18, 63, %r18 |
| 28344 | rd %tick, %r17 |
| 28345 | add %r17, 0x80, %r17 |
| 28346 | or %r17, %r18, %r17 |
| 28347 | ta T_CHANGE_HPRIV |
| 28348 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28349 | .word 0xb3800011 ! 321: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 28350 | pmu_1_245: |
| 28351 | nop |
| 28352 | ta T_CHANGE_PRIV |
| 28353 | setx 0xffffff15ffffffb3, %g1, %g7 |
| 28354 | .word 0xa3800007 ! 322: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28355 | pmu_1_246: |
| 28356 | nop |
| 28357 | setx 0xfffff688fffff0e0, %g1, %g7 |
| 28358 | .word 0xa3800007 ! 323: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28359 | .word 0xd127c000 ! 324: STF_R st %f8, [%r0, %r31] |
| 28360 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick |
| 28361 | .word 0xa3a00166 ! 326: FABSq dis not found |
| 28362 | |
| 28363 | mondo_1_249: |
| 28364 | nop |
| 28365 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28366 | stxa %r17, [%r0+0x3e0] %asi |
| 28367 | .word 0x9d944008 ! 327: WRPR_WSTATE_R wrpr %r17, %r8, %wstate |
| 28368 | #if (defined SPC || defined CMP) |
| 28369 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_250) + 0, 16, 16)) -> intp(6,0,18) |
| 28370 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_250)&0xffffffff) + 0, 16, 16)) -> intp(6,0,18) |
| 28371 | #else |
| 28372 | setx 0xea2bde9d63c1da5d, %r1, %r28 |
| 28373 | stxa %r28, [%g0] 0x73 |
| 28374 | #endif |
| 28375 | intvec_1_250: |
| 28376 | .word 0x39400001 ! 328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28377 | donret_1_251: |
| 28378 | nop |
| 28379 | ta T_CHANGE_HPRIV ! macro |
| 28380 | rd %pc, %r12 |
| 28381 | add %r12, (donretarg_1_251-donret_1_251-4), %r12 |
| 28382 | add %r12, 0x4, %r11 |
| 28383 | wrpr %g0, 0x2, %tl |
| 28384 | wrpr %g0, %r12, %tpc |
| 28385 | wrpr %g0, %r11, %tnpc |
| 28386 | set (0x00c615d1 | (0x88 << 24)), %r13 |
| 28387 | rdpr %tstate, %r16 |
| 28388 | mov 0x1f, %r19 |
| 28389 | and %r19, %r16, %r17 |
| 28390 | andn %r16, %r19, %r16 |
| 28391 | or %r16, %r17, %r20 |
| 28392 | wrpr %r20, %g0, %tstate |
| 28393 | wrhpr %g0, 0x44e, %htstate |
| 28394 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 28395 | .word 0x2ccd0001 ! 1: BRGZ brgz,a,pt %r20,<label_0xd0001> |
| 28396 | done |
| 28397 | donretarg_1_251: |
| 28398 | .word 0x95a4c9d0 ! 329: FDIVd fdivd %f50, %f16, %f10 |
| 28399 | .word 0xd4c7e180 ! 330: LDSWA_I ldswa [%r31, + 0x0180] %asi, %r10 |
| 28400 | .word 0xe1bfe0e0 ! 331: STDFA_I stda %f16, [0x00e0, %r31] |
| 28401 | nop |
| 28402 | mov 0x80, %g3 |
| 28403 | stxa %g3, [%g3] 0x5f |
| 28404 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 28405 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 28406 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 28407 | .word 0xd45fc000 ! 332: LDX_R ldx [%r31 + %r0], %r10 |
| 28408 | br_badelay3_1_252: |
| 28409 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 28410 | .word 0xbf4fc694 ! Random illegal ? |
| 28411 | .word 0xa7a0054c ! 1: FSQRTd fsqrt |
| 28412 | .word 0xa3a40825 ! 333: FADDs fadds %f16, %f5, %f17 |
| 28413 | splash_hpstate_1_253: |
| 28414 | .word 0x26ca0001 ! 1: BRLZ brlz,a,pt %r8,<label_0xa0001> |
| 28415 | .word 0x819835ce ! 334: WRHPR_HPSTATE_I wrhpr %r0, 0x15ce, %hpstate |
| 28416 | mondo_1_254: |
| 28417 | nop |
| 28418 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28419 | ta T_CHANGE_PRIV |
| 28420 | stxa %r6, [%r0+0x3c8] %asi |
| 28421 | .word 0x9d950012 ! 335: WRPR_WSTATE_R wrpr %r20, %r18, %wstate |
| 28422 | .word 0x9f8025e2 ! 336: SIR sir 0x05e2 |
| 28423 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 28424 | reduce_priv_lvl_1_255: |
| 28425 | ta T_CHANGE_NONHPRIV ! macro |
| 28426 | .word 0xe277e060 ! 338: STX_I stx %r17, [%r31 + 0x0060] |
| 28427 | pmu_1_256: |
| 28428 | nop |
| 28429 | ta T_CHANGE_PRIV |
| 28430 | setx 0xfffff84bfffffbed, %g1, %g7 |
| 28431 | .word 0xa3800007 ! 339: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28432 | .word 0xe327c000 ! 340: STF_R st %f17, [%r0, %r31] |
| 28433 | otherw |
| 28434 | mov 0x30, %r30 |
| 28435 | .word 0x91d0001e ! 341: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 28436 | .word 0xe227e054 ! 342: STW_I stw %r17, [%r31 + 0x0054] |
| 28437 | setx 0xd29918d10733b789, %r1, %r28 |
| 28438 | stxa %r28, [%g0] 0x73 |
| 28439 | intvec_1_257: |
| 28440 | .word 0x39400001 ! 343: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28441 | jmptr_1_258: |
| 28442 | nop |
| 28443 | best_set_reg(0xe0200000, %r20, %r27) |
| 28444 | .word 0xb7c6c000 ! 344: JMPL_R jmpl %r27 + %r0, %r27 |
| 28445 | donret_1_259: |
| 28446 | nop |
| 28447 | ta T_CHANGE_HPRIV ! macro |
| 28448 | rd %pc, %r12 |
| 28449 | add %r12, (donretarg_1_259-donret_1_259-4), %r12 |
| 28450 | add %r12, 0x4, %r11 |
| 28451 | wrpr %g0, 0x2, %tl |
| 28452 | wrpr %g0, %r12, %tpc |
| 28453 | wrpr %g0, %r11, %tnpc |
| 28454 | set (0x009b9b19 | (0x55 << 24)), %r13 |
| 28455 | rdpr %tstate, %r16 |
| 28456 | mov 0x1f, %r19 |
| 28457 | and %r19, %r16, %r17 |
| 28458 | andn %r16, %r19, %r16 |
| 28459 | or %r16, %r17, %r20 |
| 28460 | wrpr %r20, %g0, %tstate |
| 28461 | wrhpr %g0, 0x10de, %htstate |
| 28462 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 28463 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 28464 | done |
| 28465 | donretarg_1_259: |
| 28466 | .word 0xa9a349c8 ! 345: FDIVd fdivd %f44, %f8, %f20 |
| 28467 | jmptr_1_260: |
| 28468 | nop |
| 28469 | best_set_reg(0xe0200000, %r20, %r27) |
| 28470 | .word 0xb7c6c000 ! 346: JMPL_R jmpl %r27 + %r0, %r27 |
| 28471 | .word 0xa9a00173 ! 347: FABSq dis not found |
| 28472 | |
| 28473 | .word 0xa6c331fe ! 348: ADDCcc_I addccc %r12, 0xfffff1fe, %r19 |
| 28474 | mondo_1_262: |
| 28475 | nop |
| 28476 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28477 | stxa %r18, [%r0+0x3e0] %asi |
| 28478 | .word 0x9d944006 ! 349: WRPR_WSTATE_R wrpr %r17, %r6, %wstate |
| 28479 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 28480 | .word 0x8d9026a4 ! 350: WRPR_PSTATE_I wrpr %r0, 0x06a4, %pstate |
| 28481 | .word 0xe19fe000 ! 351: LDDFA_I ldda [%r31, 0x0000], %f16 |
| 28482 | .word 0x89800011 ! 352: WRTICK_R wr %r0, %r17, %tick |
| 28483 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 28484 | reduce_priv_lvl_1_265: |
| 28485 | ta T_CHANGE_NONHPRIV ! macro |
| 28486 | #if (defined SPC || defined CMP) |
| 28487 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_266) + 32, 16, 16)) -> intp(2,0,23) |
| 28488 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_266)&0xffffffff) + 32, 16, 16)) -> intp(2,0,23) |
| 28489 | #else |
| 28490 | setx 0xa083ece4724f3ca6, %r1, %r28 |
| 28491 | stxa %r28, [%g0] 0x73 |
| 28492 | #endif |
| 28493 | intvec_1_266: |
| 28494 | .word 0x39400001 ! 354: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28495 | vahole_1_267: |
| 28496 | nop |
| 28497 | ta T_CHANGE_NONHPRIV |
| 28498 | setx vahole_target1, %r18, %r27 |
| 28499 | jmpl %r27+0, %r27 |
| 28500 | .word 0xe6bfc033 ! 355: STDA_R stda %r19, [%r31 + %r19] 0x01 |
| 28501 | .word 0xc19fe000 ! 356: LDDFA_I ldda [%r31, 0x0000], %f0 |
| 28502 | #if (defined SPC || defined CMP) |
| 28503 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_268)+16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28504 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_268)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28505 | #else |
| 28506 | !! TODO:Generate XIR via RESET_GEN register |
| 28507 | ! setx 0x8900000808, %r16, %r17 |
| 28508 | ! mov 0x2, %r16 |
| 28509 | ! stw %r16, [%r17] |
| 28510 | #endif |
| 28511 | xir_1_268: |
| 28512 | .word 0xa984f76b ! 357: WR_SET_SOFTINT_I wr %r19, 0x176b, %set_softint |
| 28513 | setx 0x87b753679a5a70b4, %r1, %r28 |
| 28514 | stxa %r28, [%g0] 0x73 |
| 28515 | intvec_1_269: |
| 28516 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28517 | nop |
| 28518 | ta T_CHANGE_HPRIV |
| 28519 | mov 0x1+1, %r10 |
| 28520 | set sync_thr_counter5, %r23 |
| 28521 | #ifndef SPC |
| 28522 | ldxa [%g0]0x63, %o1 |
| 28523 | and %o1, 0x38, %o1 |
| 28524 | add %o1, %r23, %r23 |
| 28525 | sllx %o1, 5, %o3 !(CID*256) |
| 28526 | #endif |
| 28527 | cas [%r23],%g0,%r10 !lock |
| 28528 | brnz %r10, cwq_1_270 |
| 28529 | rd %asi, %r12 |
| 28530 | wr %g0, 0x40, %asi |
| 28531 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28532 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28533 | cmp %l1, 1 |
| 28534 | bne cwq_1_270 |
| 28535 | set CWQ_BASE, %l6 |
| 28536 | #ifndef SPC |
| 28537 | add %l6, %o3, %l6 |
| 28538 | #endif |
| 28539 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28540 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 28541 | sllx %l2, 32, %l2 |
| 28542 | stx %l2, [%l6 + 0x0] |
| 28543 | membar #Sync |
| 28544 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28545 | sub %l2, 0x40, %l2 |
| 28546 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28547 | wr %r12, %g0, %asi |
| 28548 | st %g0, [%r23] |
| 28549 | cwq_1_270: |
| 28550 | ta T_CHANGE_NONHPRIV |
| 28551 | .word 0xa1414000 ! 359: RDPC rd %pc, %r16 |
| 28552 | .word 0x89800011 ! 360: WRTICK_R wr %r0, %r17, %tick |
| 28553 | br_longdelay1_1_272: |
| 28554 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 28555 | .word 0x9d97c000 ! 361: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 28556 | fpinit_1_273: |
| 28557 | nop |
| 28558 | setx fp_data_quads, %r19, %r20 |
| 28559 | ldd [%r20], %f0 |
| 28560 | ldd [%r20+8], %f4 |
| 28561 | ld [%r20+16], %fsr |
| 28562 | ld [%r20+24], %r19 |
| 28563 | wr %r19, %g0, %gsr |
| 28564 | .word 0x87a80a44 ! 362: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 28565 | jmptr_1_274: |
| 28566 | nop |
| 28567 | best_set_reg(0xe0200000, %r20, %r27) |
| 28568 | .word 0xb7c6c000 ! 363: JMPL_R jmpl %r27 + %r0, %r27 |
| 28569 | ta T_CHANGE_NONHPRIV |
| 28570 | .word 0x8143e011 ! 364: MEMBAR membar #LoadLoad | #Lookaside |
| 28571 | intveclr_1_276: |
| 28572 | nop |
| 28573 | ta T_CHANGE_HPRIV |
| 28574 | setx 0xabdc1c7386e955c7, %r1, %r28 |
| 28575 | stxa %r28, [%g0] 0x72 |
| 28576 | .word 0x25400001 ! 365: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 28577 | nop |
| 28578 | ta T_CHANGE_HPRIV |
| 28579 | mov 0x1+1, %r10 |
| 28580 | set sync_thr_counter5, %r23 |
| 28581 | #ifndef SPC |
| 28582 | ldxa [%g0]0x63, %o1 |
| 28583 | and %o1, 0x38, %o1 |
| 28584 | add %o1, %r23, %r23 |
| 28585 | sllx %o1, 5, %o3 !(CID*256) |
| 28586 | #endif |
| 28587 | cas [%r23],%g0,%r10 !lock |
| 28588 | brnz %r10, cwq_1_277 |
| 28589 | rd %asi, %r12 |
| 28590 | wr %g0, 0x40, %asi |
| 28591 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28592 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28593 | cmp %l1, 1 |
| 28594 | bne cwq_1_277 |
| 28595 | set CWQ_BASE, %l6 |
| 28596 | #ifndef SPC |
| 28597 | add %l6, %o3, %l6 |
| 28598 | #endif |
| 28599 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28600 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 28601 | sllx %l2, 32, %l2 |
| 28602 | stx %l2, [%l6 + 0x0] |
| 28603 | membar #Sync |
| 28604 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28605 | sub %l2, 0x40, %l2 |
| 28606 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28607 | wr %r12, %g0, %asi |
| 28608 | st %g0, [%r23] |
| 28609 | cwq_1_277: |
| 28610 | ta T_CHANGE_NONHPRIV |
| 28611 | .word 0x99414000 ! 366: RDPC rd %pc, %r12 |
| 28612 | brcommon3_1_278: |
| 28613 | nop |
| 28614 | setx common_target, %r12, %r27 |
| 28615 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 28616 | ba,a .+12 |
| 28617 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 28618 | ba,a .+8 |
| 28619 | jmpl %r27+0, %r27 |
| 28620 | .word 0xd89fc030 ! 367: LDDA_R ldda [%r31, %r16] 0x01, %r12 |
| 28621 | .word 0xd827e0a2 ! 368: STW_I stw %r12, [%r31 + 0x00a2] |
| 28622 | .word 0xd8c7e018 ! 369: LDSWA_I ldswa [%r31, + 0x0018] %asi, %r12 |
| 28623 | #if (defined SPC || defined CMP) |
| 28624 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_279)+16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28625 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_279)&0xffffffff) +16, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28626 | #else |
| 28627 | !! TODO:Generate XIR via RESET_GEN register |
| 28628 | ! setx 0x8900000808, %r16, %r17 |
| 28629 | ! mov 0x2, %r16 |
| 28630 | ! stw %r16, [%r17] |
| 28631 | #endif |
| 28632 | xir_1_279: |
| 28633 | .word 0xa984a405 ! 370: WR_SET_SOFTINT_I wr %r18, 0x0405, %set_softint |
| 28634 | nop |
| 28635 | ta T_CHANGE_HPRIV |
| 28636 | mov 0x1+1, %r10 |
| 28637 | set sync_thr_counter5, %r23 |
| 28638 | #ifndef SPC |
| 28639 | ldxa [%g0]0x63, %o1 |
| 28640 | and %o1, 0x38, %o1 |
| 28641 | add %o1, %r23, %r23 |
| 28642 | sllx %o1, 5, %o3 !(CID*256) |
| 28643 | #endif |
| 28644 | cas [%r23],%g0,%r10 !lock |
| 28645 | brnz %r10, cwq_1_280 |
| 28646 | rd %asi, %r12 |
| 28647 | wr %g0, 0x40, %asi |
| 28648 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28649 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28650 | cmp %l1, 1 |
| 28651 | bne cwq_1_280 |
| 28652 | set CWQ_BASE, %l6 |
| 28653 | #ifndef SPC |
| 28654 | add %l6, %o3, %l6 |
| 28655 | #endif |
| 28656 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28657 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 28658 | sllx %l2, 32, %l2 |
| 28659 | stx %l2, [%l6 + 0x0] |
| 28660 | membar #Sync |
| 28661 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28662 | sub %l2, 0x40, %l2 |
| 28663 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28664 | wr %r12, %g0, %asi |
| 28665 | st %g0, [%r23] |
| 28666 | cwq_1_280: |
| 28667 | ta T_CHANGE_NONHPRIV |
| 28668 | .word 0x95414000 ! 371: RDPC rd %pc, %r10 |
| 28669 | .word 0xd4cfe010 ! 372: LDSBA_I ldsba [%r31, + 0x0010] %asi, %r10 |
| 28670 | splash_cmpr_1_281: |
| 28671 | mov 0, %r18 |
| 28672 | sllx %r18, 63, %r18 |
| 28673 | rd %tick, %r17 |
| 28674 | add %r17, 0x70, %r17 |
| 28675 | or %r17, %r18, %r17 |
| 28676 | ta T_CHANGE_HPRIV |
| 28677 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28678 | .word 0xb3800011 ! 373: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 28679 | nop |
| 28680 | ta T_CHANGE_HPRIV |
| 28681 | mov 0x1, %r10 |
| 28682 | set sync_thr_counter6, %r23 |
| 28683 | #ifndef SPC |
| 28684 | ldxa [%g0]0x63, %o1 |
| 28685 | and %o1, 0x38, %o1 |
| 28686 | add %o1, %r23, %r23 |
| 28687 | #endif |
| 28688 | cas [%r23],%g0,%r10 !lock |
| 28689 | brnz %r10, sma_1_282 |
| 28690 | rd %asi, %r12 |
| 28691 | wr %g0, 0x40, %asi |
| 28692 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28693 | set 0x00121fff, %g1 |
| 28694 | stxa %g1, [%g0 + 0x80] %asi |
| 28695 | wr %r12, %g0, %asi |
| 28696 | st %g0, [%r23] |
| 28697 | sma_1_282: |
| 28698 | ta T_CHANGE_NONHPRIV |
| 28699 | .word 0xd5e7e008 ! 374: CASA_R casa [%r31] %asi, %r8, %r10 |
| 28700 | br_badelay2_1_283: |
| 28701 | .word 0x91a509cb ! 1: FDIVd fdivd %f20, %f42, %f8 |
| 28702 | pdist %f10, %f6, %f16 |
| 28703 | .word 0x95b2430c ! 375: ALIGNADDRESS alignaddr %r9, %r12, %r10 |
| 28704 | .word 0xe19fe0a0 ! 376: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 28705 | .word 0x9f802ebe ! 377: SIR sir 0x0ebe |
| 28706 | .word 0xc1bfde00 ! 378: STDFA_R stda %f0, [%r0, %r31] |
| 28707 | .word 0xa8dc4001 ! 379: SMULcc_R smulcc %r17, %r1, %r20 |
| 28708 | bvc skip_1_284 |
| 28709 | bne,a skip_1_284 |
| 28710 | .align 2048 |
| 28711 | skip_1_284: |
| 28712 | .word 0xc36fe125 ! 380: PREFETCH_I prefetch [%r31 + 0x0125], #one_read |
| 28713 | nop |
| 28714 | ta T_CHANGE_HPRIV |
| 28715 | mov 0x1+1, %r10 |
| 28716 | set sync_thr_counter5, %r23 |
| 28717 | #ifndef SPC |
| 28718 | ldxa [%g0]0x63, %o1 |
| 28719 | and %o1, 0x38, %o1 |
| 28720 | add %o1, %r23, %r23 |
| 28721 | sllx %o1, 5, %o3 !(CID*256) |
| 28722 | #endif |
| 28723 | cas [%r23],%g0,%r10 !lock |
| 28724 | brnz %r10, cwq_1_285 |
| 28725 | rd %asi, %r12 |
| 28726 | wr %g0, 0x40, %asi |
| 28727 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28728 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28729 | cmp %l1, 1 |
| 28730 | bne cwq_1_285 |
| 28731 | set CWQ_BASE, %l6 |
| 28732 | #ifndef SPC |
| 28733 | add %l6, %o3, %l6 |
| 28734 | #endif |
| 28735 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28736 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 28737 | sllx %l2, 32, %l2 |
| 28738 | stx %l2, [%l6 + 0x0] |
| 28739 | membar #Sync |
| 28740 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28741 | sub %l2, 0x40, %l2 |
| 28742 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28743 | wr %r12, %g0, %asi |
| 28744 | st %g0, [%r23] |
| 28745 | cwq_1_285: |
| 28746 | ta T_CHANGE_NONHPRIV |
| 28747 | .word 0x9b414000 ! 381: RDPC rd %pc, %r13 |
| 28748 | brcommon3_1_286: |
| 28749 | nop |
| 28750 | setx common_target, %r12, %r27 |
| 28751 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 28752 | ba,a .+12 |
| 28753 | .word 0xdb37c008 ! 1: STQF_R - %f13, [%r8, %r31] |
| 28754 | ba,a .+8 |
| 28755 | jmpl %r27+0, %r27 |
| 28756 | .word 0xdb1fc012 ! 382: LDDF_R ldd [%r31, %r18], %f13 |
| 28757 | .word 0x28800001 ! 383: BLEU bleu,a <label_0x1> |
| 28758 | .word 0xda9fc033 ! 384: LDDA_R ldda [%r31, %r19] 0x01, %r13 |
| 28759 | #if (defined SPC || defined CMP) |
| 28760 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_288) + 56, 16, 16)) -> intp(5,0,2) |
| 28761 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_288)&0xffffffff) + 56, 16, 16)) -> intp(5,0,2) |
| 28762 | #else |
| 28763 | setx 0xc9d21836ad429260, %r1, %r28 |
| 28764 | stxa %r28, [%g0] 0x73 |
| 28765 | #endif |
| 28766 | intvec_1_288: |
| 28767 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28768 | tagged_1_289: |
| 28769 | taddcctv %r11, 0x1d42, %r16 |
| 28770 | .word 0xda07e046 ! 386: LDUW_I lduw [%r31 + 0x0046], %r13 |
| 28771 | ibp_1_290: |
| 28772 | nop |
| 28773 | .word 0xc19fe0c0 ! 387: LDDFA_I ldda [%r31, 0x00c0], %f0 |
| 28774 | cwp_1_291: |
| 28775 | set user_data_start, %o7 |
| 28776 | .word 0x93902004 ! 388: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 28777 | pmu_1_292: |
| 28778 | nop |
| 28779 | ta T_CHANGE_PRIV |
| 28780 | setx 0xfffff38bfffffede, %g1, %g7 |
| 28781 | .word 0xa3800007 ! 389: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28782 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 28783 | reduce_priv_lvl_1_293: |
| 28784 | ta T_CHANGE_NONPRIV ! macro |
| 28785 | ceter_1_294: |
| 28786 | nop |
| 28787 | ta T_CHANGE_HPRIV |
| 28788 | mov 7, %r17 |
| 28789 | sllx %r17, 60, %r17 |
| 28790 | mov 0x18, %r16 |
| 28791 | stxa %r17, [%r16]0x4c |
| 28792 | .word 0xa3410000 ! 391: RDTICK rd %tick, %r17 |
| 28793 | cwp_1_295: |
| 28794 | set user_data_start, %o7 |
| 28795 | .word 0x93902005 ! 392: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 28796 | splash_lsu_1_296: |
| 28797 | nop |
| 28798 | ta T_CHANGE_HPRIV |
| 28799 | set 0xc68943a9, %r2 |
| 28800 | mov 0x6, %r1 |
| 28801 | sllx %r1, 32, %r1 |
| 28802 | or %r1, %r2, %r2 |
| 28803 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 28804 | ta T_CHANGE_NONHPRIV |
| 28805 | .word 0x3d400001 ! 393: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 28806 | intveclr_1_297: |
| 28807 | nop |
| 28808 | ta T_CHANGE_HPRIV |
| 28809 | setx 0x5464fecb70502773, %r1, %r28 |
| 28810 | stxa %r28, [%g0] 0x72 |
| 28811 | .word 0x25400001 ! 394: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 28812 | nop |
| 28813 | mov 0x80, %g3 |
| 28814 | stxa %g3, [%g3] 0x5f |
| 28815 | .word 0xe25fc000 ! 395: LDX_R ldx [%r31 + %r0], %r17 |
| 28816 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 28817 | reduce_priv_lvl_1_298: |
| 28818 | ta T_CHANGE_NONPRIV ! macro |
| 28819 | dvapa_1_299: |
| 28820 | nop |
| 28821 | ta T_CHANGE_HPRIV |
| 28822 | mov 0xaab, %r20 |
| 28823 | mov 0x1b, %r19 |
| 28824 | sllx %r20, 23, %r20 |
| 28825 | or %r19, %r20, %r19 |
| 28826 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 28827 | mov 0x38, %r18 |
| 28828 | stxa %r31, [%r18]0x58 |
| 28829 | ta T_CHANGE_NONHPRIV |
| 28830 | .word 0xe3e7e011 ! 397: CASA_R casa [%r31] %asi, %r17, %r17 |
| 28831 | mondo_1_300: |
| 28832 | nop |
| 28833 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 28834 | stxa %r19, [%r0+0x3d8] %asi |
| 28835 | .word 0x9d94c009 ! 398: WRPR_WSTATE_R wrpr %r19, %r9, %wstate |
| 28836 | .word 0xc19fdb60 ! 399: LDDFA_R ldda [%r31, %r0], %f0 |
| 28837 | .word 0xa7804014 ! 400: WR_GRAPHICS_STATUS_REG_R wr %r1, %r20, %- |
| 28838 | #if (defined SPC || defined CMP) |
| 28839 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_302) + 56, 16, 16)) -> intp(4,0,27) |
| 28840 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_302)&0xffffffff) + 56, 16, 16)) -> intp(4,0,27) |
| 28841 | #else |
| 28842 | setx 0xec0d105134513e4c, %r1, %r28 |
| 28843 | stxa %r28, [%g0] 0x73 |
| 28844 | #endif |
| 28845 | intvec_1_302: |
| 28846 | .word 0x39400001 ! 401: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28847 | brcommon2_1_303: |
| 28848 | nop |
| 28849 | setx common_target, %r12, %r27 |
| 28850 | ba,a .+12 |
| 28851 | .word 0x9f8020d0 ! 1: SIR sir 0x00d0 |
| 28852 | ba,a .+8 |
| 28853 | jmpl %r27+0, %r27 |
| 28854 | .word 0xe19fe180 ! 402: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 28855 | nop |
| 28856 | ta T_CHANGE_HPRIV |
| 28857 | mov 0x1, %r10 |
| 28858 | set sync_thr_counter6, %r23 |
| 28859 | #ifndef SPC |
| 28860 | ldxa [%g0]0x63, %o1 |
| 28861 | and %o1, 0x38, %o1 |
| 28862 | add %o1, %r23, %r23 |
| 28863 | #endif |
| 28864 | cas [%r23],%g0,%r10 !lock |
| 28865 | brnz %r10, sma_1_304 |
| 28866 | rd %asi, %r12 |
| 28867 | wr %g0, 0x40, %asi |
| 28868 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28869 | set 0x000a1fff, %g1 |
| 28870 | stxa %g1, [%g0 + 0x80] %asi |
| 28871 | wr %r12, %g0, %asi |
| 28872 | st %g0, [%r23] |
| 28873 | sma_1_304: |
| 28874 | ta T_CHANGE_NONHPRIV |
| 28875 | .word 0xd3e7e00b ! 403: CASA_R casa [%r31] %asi, %r11, %r9 |
| 28876 | pmu_1_305: |
| 28877 | nop |
| 28878 | setx 0xfffff53ffffff7f4, %g1, %g7 |
| 28879 | .word 0xa3800007 ! 404: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 28880 | jmptr_1_306: |
| 28881 | nop |
| 28882 | best_set_reg(0xe0200000, %r20, %r27) |
| 28883 | .word 0xb7c6c000 ! 405: JMPL_R jmpl %r27 + %r0, %r27 |
| 28884 | .word 0x89800011 ! 406: WRTICK_R wr %r0, %r17, %tick |
| 28885 | #if (defined SPC || defined CMP) |
| 28886 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_308) + 0, 16, 16)) -> intp(3,0,5) |
| 28887 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_308)&0xffffffff) + 0, 16, 16)) -> intp(3,0,5) |
| 28888 | #else |
| 28889 | setx 0x7c0387ea7b81cd21, %r1, %r28 |
| 28890 | stxa %r28, [%g0] 0x73 |
| 28891 | #endif |
| 28892 | intvec_1_308: |
| 28893 | .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 28894 | splash_hpstate_1_309: |
| 28895 | .word 0x81982589 ! 408: WRHPR_HPSTATE_I wrhpr %r0, 0x0589, %hpstate |
| 28896 | br_badelay2_1_310: |
| 28897 | .word 0xa1a4c9cc ! 1: FDIVd fdivd %f50, %f12, %f16 |
| 28898 | pdist %f12, %f18, %f22 |
| 28899 | .word 0xa5b2c313 ! 409: ALIGNADDRESS alignaddr %r11, %r19, %r18 |
| 28900 | splash_cmpr_1_311: |
| 28901 | mov 0, %r18 |
| 28902 | sllx %r18, 63, %r18 |
| 28903 | rd %tick, %r17 |
| 28904 | add %r17, 0x80, %r17 |
| 28905 | or %r17, %r18, %r17 |
| 28906 | ta T_CHANGE_HPRIV |
| 28907 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28908 | ta T_CHANGE_PRIV |
| 28909 | .word 0xaf800011 ! 410: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 28910 | nop |
| 28911 | ta T_CHANGE_HPRIV |
| 28912 | mov 0x1, %r10 |
| 28913 | set sync_thr_counter6, %r23 |
| 28914 | #ifndef SPC |
| 28915 | ldxa [%g0]0x63, %o1 |
| 28916 | and %o1, 0x38, %o1 |
| 28917 | add %o1, %r23, %r23 |
| 28918 | #endif |
| 28919 | cas [%r23],%g0,%r10 !lock |
| 28920 | brnz %r10, sma_1_312 |
| 28921 | rd %asi, %r12 |
| 28922 | wr %g0, 0x40, %asi |
| 28923 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 28924 | set 0x001a1fff, %g1 |
| 28925 | stxa %g1, [%g0 + 0x80] %asi |
| 28926 | wr %r12, %g0, %asi |
| 28927 | st %g0, [%r23] |
| 28928 | sma_1_312: |
| 28929 | ta T_CHANGE_NONHPRIV |
| 28930 | .word 0xe5e7e009 ! 411: CASA_R casa [%r31] %asi, %r9, %r18 |
| 28931 | #if (defined SPC || defined CMP) |
| 28932 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_313)+0, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28933 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_313)&0xffffffff) +0, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 28934 | #else |
| 28935 | !! TODO:Generate XIR via RESET_GEN register |
| 28936 | ! setx 0x8900000808, %r16, %r17 |
| 28937 | ! mov 0x2, %r16 |
| 28938 | ! stw %r16, [%r17] |
| 28939 | #endif |
| 28940 | xir_1_313: |
| 28941 | .word 0xa984af00 ! 412: WR_SET_SOFTINT_I wr %r18, 0x0f00, %set_softint |
| 28942 | memptr_1_314: |
| 28943 | set 0x60740000, %r31 |
| 28944 | .word 0x8584220d ! 413: WRCCR_I wr %r16, 0x020d, %ccr |
| 28945 | .word 0x91948001 ! 414: WRPR_PIL_R wrpr %r18, %r1, %pil |
| 28946 | .word 0x9f803b5f ! 415: SIR sir 0x1b5f |
| 28947 | nop |
| 28948 | ta T_CHANGE_HPRIV |
| 28949 | mov 0x1+1, %r10 |
| 28950 | set sync_thr_counter5, %r23 |
| 28951 | #ifndef SPC |
| 28952 | ldxa [%g0]0x63, %o1 |
| 28953 | and %o1, 0x38, %o1 |
| 28954 | add %o1, %r23, %r23 |
| 28955 | sllx %o1, 5, %o3 !(CID*256) |
| 28956 | #endif |
| 28957 | cas [%r23],%g0,%r10 !lock |
| 28958 | brnz %r10, cwq_1_316 |
| 28959 | rd %asi, %r12 |
| 28960 | wr %g0, 0x40, %asi |
| 28961 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 28962 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 28963 | cmp %l1, 1 |
| 28964 | bne cwq_1_316 |
| 28965 | set CWQ_BASE, %l6 |
| 28966 | #ifndef SPC |
| 28967 | add %l6, %o3, %l6 |
| 28968 | #endif |
| 28969 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 28970 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 28971 | sllx %l2, 32, %l2 |
| 28972 | stx %l2, [%l6 + 0x0] |
| 28973 | membar #Sync |
| 28974 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 28975 | sub %l2, 0x40, %l2 |
| 28976 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 28977 | wr %r12, %g0, %asi |
| 28978 | st %g0, [%r23] |
| 28979 | cwq_1_316: |
| 28980 | ta T_CHANGE_NONHPRIV |
| 28981 | .word 0x9b414000 ! 416: RDPC rd %pc, %r13 |
| 28982 | intveclr_1_317: |
| 28983 | nop |
| 28984 | ta T_CHANGE_HPRIV |
| 28985 | setx 0x4a125e980806c4a4, %r1, %r28 |
| 28986 | stxa %r28, [%g0] 0x72 |
| 28987 | ta T_CHANGE_NONHPRIV |
| 28988 | .word 0x25400001 ! 417: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 28989 | splash_cmpr_1_318: |
| 28990 | mov 0, %r18 |
| 28991 | sllx %r18, 63, %r18 |
| 28992 | rd %tick, %r17 |
| 28993 | add %r17, 0x100, %r17 |
| 28994 | or %r17, %r18, %r17 |
| 28995 | ta T_CHANGE_HPRIV |
| 28996 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 28997 | ta T_CHANGE_PRIV |
| 28998 | .word 0xb3800011 ! 418: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 28999 | setx 0x722a6ccdb9ac8722, %r1, %r28 |
| 29000 | stxa %r28, [%g0] 0x73 |
| 29001 | intvec_1_319: |
| 29002 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 29003 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 29004 | reduce_priv_lvl_1_320: |
| 29005 | ta T_CHANGE_NONHPRIV ! macro |
| 29006 | mondo_1_321: |
| 29007 | nop |
| 29008 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 29009 | stxa %r12, [%r0+0x3e0] %asi |
| 29010 | .word 0x9d950007 ! 421: WRPR_WSTATE_R wrpr %r20, %r7, %wstate |
| 29011 | splash_lsu_1_322: |
| 29012 | nop |
| 29013 | ta T_CHANGE_HPRIV |
| 29014 | set 0x3f745404, %r2 |
| 29015 | mov 0x5, %r1 |
| 29016 | sllx %r1, 32, %r1 |
| 29017 | or %r1, %r2, %r2 |
| 29018 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 29019 | .word 0x3d400001 ! 422: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 29020 | .word 0x3a780001 ! 423: BPCC <illegal instruction> |
| 29021 | .word 0xda3fe1c8 ! 424: STD_I std %r13, [%r31 + 0x01c8] |
| 29022 | .word 0x83d02033 ! 425: Tcc_I te icc_or_xcc, %r0 + 51 |
| 29023 | otherw |
| 29024 | mov 0xb4, %r30 |
| 29025 | .word 0x91d0001e ! 426: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 29026 | .word 0x2ecb0001 ! 1: BRGEZ brgez,a,pt %r12,<label_0xb0001> |
| 29027 | .word 0x8d903a5d ! 427: WRPR_PSTATE_I wrpr %r0, 0x1a5d, %pstate |
| 29028 | br_badelay2_1_324: |
| 29029 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 29030 | allclean |
| 29031 | .word 0x97b14312 ! 428: ALIGNADDRESS alignaddr %r5, %r18, %r11 |
| 29032 | vahole_1_325: |
| 29033 | nop |
| 29034 | ta T_CHANGE_NONHPRIV |
| 29035 | setx vahole_target0, %r18, %r27 |
| 29036 | jmpl %r27+0, %r27 |
| 29037 | .word 0xd697c02d ! 429: LDUHA_R lduha [%r31, %r13] 0x01, %r11 |
| 29038 | #if (defined SPC || defined CMP) |
| 29039 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_326) + 16, 16, 16)) -> intp(5,0,31) |
| 29040 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_326)&0xffffffff) + 16, 16, 16)) -> intp(5,0,31) |
| 29041 | #else |
| 29042 | setx 0xf9d5bfdf12c5e2be, %r1, %r28 |
| 29043 | stxa %r28, [%g0] 0x73 |
| 29044 | #endif |
| 29045 | intvec_1_326: |
| 29046 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 29047 | splash_hpstate_1_327: |
| 29048 | ta T_CHANGE_NONHPRIV |
| 29049 | .word 0x81983448 ! 431: WRHPR_HPSTATE_I wrhpr %r0, 0x1448, %hpstate |
| 29050 | splash_htba_1_328: |
| 29051 | nop |
| 29052 | ta T_CHANGE_HPRIV |
| 29053 | best_set_reg(HV_TRAP_BASE_PA, %r11,%r12) |
| 29054 | .word 0x8b98000c ! 432: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 29055 | .word 0xd607c000 ! 433: LDUW_R lduw [%r31 + %r0], %r11 |
| 29056 | .word 0x99b1c541 ! 434: FCMPEQ16 fcmpeq16 %d38, %d32, %r12 |
| 29057 | donret_1_329: |
| 29058 | nop |
| 29059 | ta T_CHANGE_HPRIV ! macro |
| 29060 | rd %pc, %r12 |
| 29061 | add %r12, (donretarg_1_329-donret_1_329-4), %r12 |
| 29062 | add %r12, 0x4, %r11 |
| 29063 | wrpr %g0, 0x2, %tl |
| 29064 | wrpr %g0, %r12, %tpc |
| 29065 | wrpr %g0, %r11, %tnpc |
| 29066 | set (0x00a2abb3 | (28 << 24)), %r13 |
| 29067 | rdpr %tstate, %r16 |
| 29068 | mov 0x1f, %r19 |
| 29069 | and %r19, %r16, %r17 |
| 29070 | andn %r16, %r19, %r16 |
| 29071 | or %r16, %r17, %r20 |
| 29072 | wrpr %r20, %g0, %tstate |
| 29073 | wrhpr %g0, 23, %htstate |
| 29074 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 29075 | done |
| 29076 | donretarg_1_329: |
| 29077 | .word 0xd8ffe198 ! 435: SWAPA_I swapa %r12, [%r31 + 0x0198] %asi |
| 29078 | .word 0xa3a40d33 ! 436: FsMULd fsmuld %f16, %f50, %f48 |
| 29079 | splash_tba_1_330: |
| 29080 | ta T_CHANGE_PRIV |
| 29081 | setx 0x0000000000380000, %r11, %r12 |
| 29082 | .word 0x8b90000c ! 437: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 29083 | nop |
| 29084 | mov 0x80, %g3 |
| 29085 | stxa %g3, [%g3] 0x57 |
| 29086 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 29087 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 29088 | .word 0xe25fc000 ! 438: LDX_R ldx [%r31 + %r0], %r17 |
| 29089 | nop |
| 29090 | mov 0x80, %g3 |
| 29091 | stxa %g3, [%g3] 0x57 |
| 29092 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 29093 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 29094 | .word 0xe25fc000 ! 439: LDX_R ldx [%r31 + %r0], %r17 |
| 29095 | donret_1_331: |
| 29096 | nop |
| 29097 | ta T_CHANGE_HPRIV ! macro |
| 29098 | rd %pc, %r12 |
| 29099 | add %r12, (donretarg_1_331-donret_1_331-4), %r12 |
| 29100 | add %r12, 0x4, %r11 |
| 29101 | wrpr %g0, 0x2, %tl |
| 29102 | wrpr %g0, %r12, %tpc |
| 29103 | wrpr %g0, %r11, %tnpc |
| 29104 | set (0x000daa9b | (28 << 24)), %r13 |
| 29105 | rdpr %tstate, %r16 |
| 29106 | mov 0x1f, %r19 |
| 29107 | and %r19, %r16, %r17 |
| 29108 | andn %r16, %r19, %r16 |
| 29109 | or %r16, %r17, %r20 |
| 29110 | wrpr %r20, %g0, %tstate |
| 29111 | wrhpr %g0, 0xe13, %htstate |
| 29112 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 29113 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 29114 | done |
| 29115 | donretarg_1_331: |
| 29116 | .word 0xe26fe106 ! 440: LDSTUB_I ldstub %r17, [%r31 + 0x0106] |
| 29117 | donret_1_332: |
| 29118 | nop |
| 29119 | ta T_CHANGE_HPRIV ! macro |
| 29120 | rd %pc, %r12 |
| 29121 | add %r12, (donretarg_1_332-donret_1_332-8), %r12 |
| 29122 | add %r12, 0x4, %r11 |
| 29123 | wrpr %g0, 0x2, %tl |
| 29124 | wrpr %g0, %r12, %tpc |
| 29125 | wrpr %g0, %r11, %tnpc |
| 29126 | set (0x0004d9a6 | (20 << 24)), %r13 |
| 29127 | rdpr %tstate, %r16 |
| 29128 | mov 0x1f, %r19 |
| 29129 | and %r19, %r16, %r17 |
| 29130 | andn %r16, %r19, %r16 |
| 29131 | or %r16, %r17, %r20 |
| 29132 | wrpr %r20, %g0, %tstate |
| 29133 | wrhpr %g0, 0x1d98, %htstate |
| 29134 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 29135 | retry |
| 29136 | donretarg_1_332: |
| 29137 | .word 0xa9a409d3 ! 441: FDIVd fdivd %f16, %f50, %f20 |
| 29138 | setx 0xc179f0b7662e98bf, %r1, %r28 |
| 29139 | stxa %r28, [%g0] 0x73 |
| 29140 | intvec_1_333: |
| 29141 | .word 0x39400001 ! 442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 29142 | .word 0xe88fe060 ! 443: LDUBA_I lduba [%r31, + 0x0060] %asi, %r20 |
| 29143 | .word 0xe937e040 ! 444: STQF_I - %f20, [0x0040, %r31] |
| 29144 | ta T_CHANGE_NONHPRIV |
| 29145 | .word 0x8143e011 ! 445: MEMBAR membar #LoadLoad | #Lookaside |
| 29146 | .word 0xa9b0c487 ! 446: FCMPLE32 fcmple32 %d34, %d38, %r20 |
| 29147 | brcommon2_1_336: |
| 29148 | nop |
| 29149 | setx common_target, %r12, %r27 |
| 29150 | ba,a .+12 |
| 29151 | .word 0xa9b7c70d ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f13, %d20 |
| 29152 | ba,a .+8 |
| 29153 | jmpl %r27+0, %r27 |
| 29154 | .word 0xc1bfc2c0 ! 447: STDFA_R stda %f0, [%r0, %r31] |
| 29155 | .word 0xa6484003 ! 448: MULX_R mulx %r1, %r3, %r19 |
| 29156 | splash_lsu_1_337: |
| 29157 | nop |
| 29158 | ta T_CHANGE_HPRIV |
| 29159 | set 0x4993264d, %r2 |
| 29160 | mov 0x5, %r1 |
| 29161 | sllx %r1, 32, %r1 |
| 29162 | or %r1, %r2, %r2 |
| 29163 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 29164 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 29165 | mondo_1_338: |
| 29166 | nop |
| 29167 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 29168 | ta T_CHANGE_PRIV |
| 29169 | stxa %r19, [%r0+0x3d8] %asi |
| 29170 | .word 0x9d944010 ! 450: WRPR_WSTATE_R wrpr %r17, %r16, %wstate |
| 29171 | .word 0x89800011 ! 451: WRTICK_R wr %r0, %r17, %tick |
| 29172 | splash_hpstate_1_340: |
| 29173 | ta T_CHANGE_NONHPRIV |
| 29174 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 29175 | .word 0x81983907 ! 452: WRHPR_HPSTATE_I wrhpr %r0, 0x1907, %hpstate |
| 29176 | pmu_1_341: |
| 29177 | nop |
| 29178 | ta T_CHANGE_PRIV |
| 29179 | setx 0xfffff41cffffff2d, %g1, %g7 |
| 29180 | .word 0xa3800007 ! 453: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 29181 | .word 0x93d02035 ! 454: Tcc_I tne icc_or_xcc, %r0 + 53 |
| 29182 | .word 0xa7a509b1 ! 455: FDIVs fdivs %f20, %f17, %f19 |
| 29183 | .word 0xe73fc000 ! 456: STDF_R std %f19, [%r0, %r31] |
| 29184 | cwp_1_342: |
| 29185 | set user_data_start, %o7 |
| 29186 | .word 0x93902006 ! 457: WRPR_CWP_I wrpr %r0, 0x0006, %cwp |
| 29187 | jmptr_1_343: |
| 29188 | nop |
| 29189 | best_set_reg(0xe0200000, %r20, %r27) |
| 29190 | .word 0xb7c6c000 ! 458: JMPL_R jmpl %r27 + %r0, %r27 |
| 29191 | jmptr_1_344: |
| 29192 | nop |
| 29193 | best_set_reg(0xe0200000, %r20, %r27) |
| 29194 | .word 0xb7c6c000 ! 459: JMPL_R jmpl %r27 + %r0, %r27 |
| 29195 | jmptr_1_345: |
| 29196 | nop |
| 29197 | best_set_reg(0xe0200000, %r20, %r27) |
| 29198 | .word 0xb7c6c000 ! 460: JMPL_R jmpl %r27 + %r0, %r27 |
| 29199 | .word 0xe71fc014 ! 461: LDDF_R ldd [%r31, %r20], %f19 |
| 29200 | brcommon1_1_347: |
| 29201 | nop |
| 29202 | setx common_target, %r12, %r27 |
| 29203 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 29204 | ba,a .+12 |
| 29205 | .word 0xa7702080 ! 1: POPC_I popc 0x0080, %r19 |
| 29206 | ba,a .+8 |
| 29207 | jmpl %r27+0, %r27 |
| 29208 | .word 0x97b187d3 ! 462: PDIST pdistn %d6, %d50, %d42 |
| 29209 | .word 0x89800011 ! 463: WRTICK_R wr %r0, %r17, %tick |
| 29210 | ceter_1_349: |
| 29211 | nop |
| 29212 | ta T_CHANGE_HPRIV |
| 29213 | mov 7, %r17 |
| 29214 | sllx %r17, 60, %r17 |
| 29215 | mov 0x18, %r16 |
| 29216 | stxa %r17, [%r16]0x4c |
| 29217 | ta T_CHANGE_NONHPRIV |
| 29218 | .word 0x95410000 ! 464: RDTICK rd %tick, %r10 |
| 29219 | splash_cmpr_1_350: |
| 29220 | mov 0, %r18 |
| 29221 | sllx %r18, 63, %r18 |
| 29222 | rd %tick, %r17 |
| 29223 | add %r17, 0x60, %r17 |
| 29224 | or %r17, %r18, %r17 |
| 29225 | ta T_CHANGE_HPRIV |
| 29226 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 29227 | .word 0xaf800011 ! 465: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 29228 | .word 0x92818011 ! 466: ADDcc_R addcc %r6, %r17, %r9 |
| 29229 | .word 0xd2800b20 ! 467: LDUWA_R lduwa [%r0, %r0] 0x59, %r9 |
| 29230 | memptr_1_351: |
| 29231 | set user_data_start, %r31 |
| 29232 | .word 0x85827a2a ! 468: WRCCR_I wr %r9, 0x1a2a, %ccr |
| 29233 | .word 0xd27fe190 ! 469: SWAP_I swap %r9, [%r31 + 0x0190] |
| 29234 | .word 0x9f803bcb ! 470: SIR sir 0x1bcb |
| 29235 | .word 0x91920001 ! 471: WRPR_PIL_R wrpr %r8, %r1, %pil |
| 29236 | .word 0x28780001 ! 472: BPLEU <illegal instruction> |
| 29237 | jmptr_1_353: |
| 29238 | nop |
| 29239 | best_set_reg(0xe1200000, %r20, %r27) |
| 29240 | .word 0xb7c6c000 ! 473: JMPL_R jmpl %r27 + %r0, %r27 |
| 29241 | .word 0x95b18484 ! 474: FCMPLE32 fcmple32 %d6, %d4, %r10 |
| 29242 | unsupttte_1_355: |
| 29243 | nop |
| 29244 | ta T_CHANGE_HPRIV |
| 29245 | mov 1, %r20 |
| 29246 | sllx %r20, 63, %r20 |
| 29247 | or %r20, 2,%r20 |
| 29248 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 29249 | ta T_CHANGE_NONHPRIV |
| 29250 | .word 0x99a189b1 ! 475: FDIVs fdivs %f6, %f17, %f12 |
| 29251 | #if (defined SPC || defined CMP) |
| 29252 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_356)+24, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 29253 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_356)&0xffffffff) +24, 16, 16)) -> intp(mask2tid(0x1),1,3) |
| 29254 | #else |
| 29255 | !! TODO:Generate XIR via RESET_GEN register |
| 29256 | ! setx 0x8900000808, %r16, %r17 |
| 29257 | ! mov 0x2, %r16 |
| 29258 | ! stw %r16, [%r17] |
| 29259 | #endif |
| 29260 | xir_1_356: |
| 29261 | .word 0xa982b2e7 ! 476: WR_SET_SOFTINT_I wr %r10, 0x12e7, %set_softint |
| 29262 | trapasi_1_357: |
| 29263 | nop |
| 29264 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 29265 | .word 0xd8c04980 ! 477: LDSWA_R ldswa [%r1, %r0] 0x4c, %r12 |
| 29266 | .word 0xc19fe120 ! 478: LDDFA_I ldda [%r31, 0x0120], %f0 |
| 29267 | donret_1_358: |
| 29268 | nop |
| 29269 | ta T_CHANGE_HPRIV ! macro |
| 29270 | rd %pc, %r12 |
| 29271 | add %r12, (donretarg_1_358-donret_1_358-8), %r12 |
| 29272 | add %r12, 0x4, %r11 |
| 29273 | wrpr %g0, 0x2, %tl |
| 29274 | wrpr %g0, %r12, %tpc |
| 29275 | wrpr %g0, %r11, %tnpc |
| 29276 | set (0x00358aad | (16 << 24)), %r13 |
| 29277 | rdpr %tstate, %r16 |
| 29278 | mov 0x1f, %r19 |
| 29279 | and %r19, %r16, %r17 |
| 29280 | andn %r16, %r19, %r16 |
| 29281 | or %r16, %r17, %r20 |
| 29282 | wrpr %r20, %g0, %tstate |
| 29283 | wrhpr %g0, 0x1c10, %htstate |
| 29284 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 29285 | retry |
| 29286 | donretarg_1_358: |
| 29287 | .word 0xd8ffe1fc ! 479: SWAPA_I swapa %r12, [%r31 + 0x01fc] %asi |
| 29288 | .word 0x29800001 ! 480: FBL fbl,a <label_0x1> |
| 29289 | mondo_1_360: |
| 29290 | nop |
| 29291 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 29292 | stxa %r16, [%r0+0x3e8] %asi |
| 29293 | .word 0x9d944012 ! 481: WRPR_WSTATE_R wrpr %r17, %r18, %wstate |
| 29294 | .word 0xe19fdb60 ! 482: LDDFA_R ldda [%r31, %r0], %f16 |
| 29295 | br_badelay1_1_361: |
| 29296 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 29297 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 29298 | .word 0xd83fc008 ! 1: STD_R std %r12, [%r31 + %r8] |
| 29299 | normalw |
| 29300 | .word 0x9b458000 ! 483: RD_SOFTINT_REG rd %softint, %r13 |
| 29301 | .word 0x9f802073 ! 484: SIR sir 0x0073 |
| 29302 | .word 0xdb27e158 ! 485: STF_I st %f13, [0x0158, %r31] |
| 29303 | .word 0xda0fc000 ! 486: LDUB_R ldub [%r31 + %r0], %r13 |
| 29304 | .word 0x26800001 ! 487: BL bl,a <label_0x1> |
| 29305 | pmu_1_362: |
| 29306 | nop |
| 29307 | setx 0xfffff2f9fffff050, %g1, %g7 |
| 29308 | .word 0xa3800007 ! 488: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 29309 | .word 0x8d903a33 ! 489: WRPR_PSTATE_I wrpr %r0, 0x1a33, %pstate |
| 29310 | bvs,a skip_1_364 |
| 29311 | .word 0xa1a289d2 ! 1: FDIVd fdivd %f10, %f18, %f16 |
| 29312 | .align 32 |
| 29313 | skip_1_364: |
| 29314 | .word 0xc36fe0b5 ! 490: PREFETCH_I prefetch [%r31 + 0x00b5], #one_read |
| 29315 | donret_1_365: |
| 29316 | nop |
| 29317 | ta T_CHANGE_HPRIV ! macro |
| 29318 | rd %pc, %r12 |
| 29319 | add %r12, (donretarg_1_365-donret_1_365-4), %r12 |
| 29320 | add %r12, 0x4, %r11 |
| 29321 | wrpr %g0, 0x2, %tl |
| 29322 | wrpr %g0, %r12, %tpc |
| 29323 | wrpr %g0, %r11, %tnpc |
| 29324 | set (0x0070313e | (0x55 << 24)), %r13 |
| 29325 | rdpr %tstate, %r16 |
| 29326 | mov 0x1f, %r19 |
| 29327 | and %r19, %r16, %r17 |
| 29328 | andn %r16, %r19, %r16 |
| 29329 | or %r16, %r17, %r20 |
| 29330 | wrpr %r20, %g0, %tstate |
| 29331 | wrhpr %g0, 0x1757, %htstate |
| 29332 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 29333 | done |
| 29334 | donretarg_1_365: |
| 29335 | .word 0xdaffe09c ! 491: SWAPA_I swapa %r13, [%r31 + 0x009c] %asi |
| 29336 | .word 0xdb27e0dc ! 492: STF_I st %f13, [0x00dc, %r31] |
| 29337 | .word 0xdaffc030 ! 493: SWAPA_R swapa %r13, [%r31 + %r16] 0x01 |
| 29338 | splash_cmpr_1_366: |
| 29339 | mov 0, %r18 |
| 29340 | sllx %r18, 63, %r18 |
| 29341 | rd %tick, %r17 |
| 29342 | add %r17, 0x100, %r17 |
| 29343 | or %r17, %r18, %r17 |
| 29344 | ta T_CHANGE_PRIV |
| 29345 | .word 0xaf800011 ! 494: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 29346 | nop |
| 29347 | mov 0x80, %g3 |
| 29348 | stxa %g3, [%g3] 0x57 |
| 29349 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 29350 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 29351 | .word 0xda5fc000 ! 495: LDX_R ldx [%r31 + %r0], %r13 |
| 29352 | .word 0x9f8038fd ! 496: SIR sir 0x18fd |
| 29353 | pmu_1_367: |
| 29354 | nop |
| 29355 | ta T_CHANGE_PRIV |
| 29356 | setx 0xfffff91dfffffc4e, %g1, %g7 |
| 29357 | .word 0xa3800007 ! 497: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 29358 | nop |
| 29359 | ta T_CHANGE_HPRIV |
| 29360 | mov 0x1+1, %r10 |
| 29361 | set sync_thr_counter5, %r23 |
| 29362 | #ifndef SPC |
| 29363 | ldxa [%g0]0x63, %o1 |
| 29364 | and %o1, 0x38, %o1 |
| 29365 | add %o1, %r23, %r23 |
| 29366 | sllx %o1, 5, %o3 !(CID*256) |
| 29367 | #endif |
| 29368 | cas [%r23],%g0,%r10 !lock |
| 29369 | brnz %r10, cwq_1_368 |
| 29370 | rd %asi, %r12 |
| 29371 | wr %g0, 0x40, %asi |
| 29372 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 29373 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 29374 | cmp %l1, 1 |
| 29375 | bne cwq_1_368 |
| 29376 | set CWQ_BASE, %l6 |
| 29377 | #ifndef SPC |
| 29378 | add %l6, %o3, %l6 |
| 29379 | #endif |
| 29380 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 29381 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 29382 | sllx %l2, 32, %l2 |
| 29383 | stx %l2, [%l6 + 0x0] |
| 29384 | membar #Sync |
| 29385 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 29386 | sub %l2, 0x40, %l2 |
| 29387 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 29388 | wr %r12, %g0, %asi |
| 29389 | st %g0, [%r23] |
| 29390 | cwq_1_368: |
| 29391 | ta T_CHANGE_NONHPRIV |
| 29392 | .word 0xa7414000 ! 498: RDPC rd %pc, %r19 |
| 29393 | change_to_randtl_1_369: |
| 29394 | ta T_CHANGE_HPRIV ! macro |
| 29395 | done_change_to_randtl_1_369: |
| 29396 | .word 0x8f902000 ! 499: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 29397 | .word 0xe737c000 ! 500: STQF_R - %f19, [%r0, %r31] |
| 29398 | mondo_1_370: |
| 29399 | nop |
| 29400 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 29401 | stxa %r16, [%r0+0x3d0] %asi |
| 29402 | .word 0x9d91c00d ! 501: WRPR_WSTATE_R wrpr %r7, %r13, %wstate |
| 29403 | nop |
| 29404 | nop |
| 29405 | ta T_CHANGE_PRIV |
| 29406 | wrpr %g0, %g0, %gl |
| 29407 | nop |
| 29408 | nop |
| 29409 | |
| 29410 | join_lbl_0_0: |
| 29411 | SECTION .MAIN |
| 29412 | .text |
| 29413 | diag_finish: |
| 29414 | nop |
| 29415 | nop |
| 29416 | nop |
| 29417 | ta T_CHANGE_HPRIV |
| 29418 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) |
| 29419 | wrhpr %g2, %g0, %htba |
| 29420 | ta T_GOOD_TRAP |
| 29421 | nop |
| 29422 | nop |
| 29423 | nop |
| 29424 | .data |
| 29425 | .xword 0x0 |
| 29426 | ! fp data rs1, rs2, fsr, gsr quads .. |
| 29427 | .global fp_data_quads |
| 29428 | fp_data_quads: |
| 29429 | .xword 0x0044000000000000 |
| 29430 | .xword 0x4028000000000000 |
| 29431 | .xword 0x0fc0400400000000 |
| 29432 | .xword 0x0000000000000000 |
| 29433 | .xword 0x0041000000000000 |
| 29434 | .xword 0x4022000000000000 |
| 29435 | .xword 0x0600800000000000 |
| 29436 | .xword 0x0000000000000000 |
| 29437 | .xword 0x0220000000000000 |
| 29438 | .xword 0x4140000000000000 |
| 29439 | .xword 0x4fc0400400000000 |
| 29440 | .xword 0x0000000000000000 |
| 29441 | .xword 0x4090000000000000 |
| 29442 | .xword 0x0090000000000000 |
| 29443 | .xword 0x0f80400800000000 |
| 29444 | .xword 0x0a00000000000000 |
| 29445 | .align 128 |
| 29446 | .global user_data_start |
| 29447 | .data |
| 29448 | user_data_start: |
| 29449 | |
| 29450 | .xword 0x010a401ac1b8ecde |
| 29451 | .xword 0xe01a0ce85f82688f |
| 29452 | .xword 0x6a9cb07cdc08ed37 |
| 29453 | .xword 0x4992bdd39afeed80 |
| 29454 | .xword 0x0b9ca2437e84c78a |
| 29455 | .xword 0x07f49a4343976769 |
| 29456 | .xword 0x8c8025e4fda128ce |
| 29457 | .xword 0xba12e5552d930d7e |
| 29458 | .xword 0x8886e11660450c78 |
| 29459 | .xword 0x5ef62827cd098cff |
| 29460 | .xword 0xbad5dfd695753419 |
| 29461 | .xword 0x1267dd6e45feac20 |
| 29462 | .xword 0x718af2561954053e |
| 29463 | .xword 0xc9c49d75a805d192 |
| 29464 | .xword 0x1da6001183e7db6e |
| 29465 | .xword 0xc2421dc7282e8cc7 |
| 29466 | .xword 0x1c3d1d6fe17de071 |
| 29467 | .xword 0xaa933dd5109d36c2 |
| 29468 | .xword 0x8af30780df9da078 |
| 29469 | .xword 0x1db299012c318f35 |
| 29470 | .xword 0x8515f4c467af40e7 |
| 29471 | .xword 0x7e761451ee6fe19c |
| 29472 | .xword 0x3768966b370b0265 |
| 29473 | .xword 0x5885d5d2d722107b |
| 29474 | .xword 0x76c8bea19300715b |
| 29475 | .xword 0x90f2ad45ff2eaeb1 |
| 29476 | .xword 0xb18d818a08ca9964 |
| 29477 | .xword 0xa53a63538db0253f |
| 29478 | .xword 0xf051e1ceb181d4ae |
| 29479 | .xword 0x8a844946d11177ff |
| 29480 | .xword 0xf6dc7d512768f76e |
| 29481 | .xword 0xc870d71285292157 |
| 29482 | .xword 0xc68f51bb00eb0fd9 |
| 29483 | .xword 0x865d80fadb7958c3 |
| 29484 | .xword 0x5e7145b3468bfd71 |
| 29485 | .xword 0x55aca4a6e1968779 |
| 29486 | .xword 0x30b3895d6b0c0400 |
| 29487 | .xword 0x0e0c67cc3b7225e4 |
| 29488 | .xword 0xfd8a2a5c13b42238 |
| 29489 | .xword 0x71b455dce8ce2826 |
| 29490 | .xword 0xf7bef0ad07ea3101 |
| 29491 | .xword 0xc2a87e556acc0de8 |
| 29492 | .xword 0x136a1374baa26184 |
| 29493 | .xword 0x70e92cab03f71d9e |
| 29494 | .xword 0xdc48a3bca6a1ae47 |
| 29495 | .xword 0xa40e65d64eba3e42 |
| 29496 | .xword 0x6608017804c53efe |
| 29497 | .xword 0x8dac03fd5ea5d314 |
| 29498 | .xword 0xf590423d7c04faaa |
| 29499 | .xword 0x9bf0879006e681a6 |
| 29500 | .xword 0xc3a586affd3b1204 |
| 29501 | .xword 0xc29a5e2bf922dad6 |
| 29502 | .xword 0x3c49a1c13e3c84a3 |
| 29503 | .xword 0xfe050d063ec45538 |
| 29504 | .xword 0x6d19d02d6024f4e4 |
| 29505 | .xword 0xcea6eb9bae3991d4 |
| 29506 | .xword 0xbb70d1a3c4bd7d4e |
| 29507 | .xword 0x8bafb1f419813c11 |
| 29508 | .xword 0x7443a38e69fd7e7a |
| 29509 | .xword 0xd75434d907e0e060 |
| 29510 | .xword 0xfcae1e1072cb3a51 |
| 29511 | .xword 0x9cf53fa882486517 |
| 29512 | .xword 0xc731047f032becbe |
| 29513 | .xword 0x255d33aed4d070b3 |
| 29514 | .xword 0x845889b015faf9b7 |
| 29515 | .xword 0x73ec7df1819f379a |
| 29516 | .xword 0x18687ab28aa5d147 |
| 29517 | .xword 0xd8cfce09467ff322 |
| 29518 | .xword 0xf47ca7549f10f052 |
| 29519 | .xword 0x3eca05ed4751e946 |
| 29520 | .xword 0x6813e8351cac71e0 |
| 29521 | .xword 0x545b61cda5d0f71d |
| 29522 | .xword 0x65f59976b2430995 |
| 29523 | .xword 0x240a4dbba8a73d7d |
| 29524 | .xword 0xe33ecb0d8c069fe5 |
| 29525 | .xword 0xcd15a9f025d5c5d5 |
| 29526 | .xword 0x7a99b05c700e06f3 |
| 29527 | .xword 0x565971d8a5df42a4 |
| 29528 | .xword 0x7c5a378d5002e75f |
| 29529 | .xword 0xaad4cb9ee6867b00 |
| 29530 | .xword 0x7c4e2d63f610f5b4 |
| 29531 | .xword 0xd080c582a1b4a339 |
| 29532 | .xword 0x942bfda9afffd301 |
| 29533 | .xword 0x998bc3290356bf7e |
| 29534 | .xword 0x33d363d9dcf93d2b |
| 29535 | .xword 0x3cea5cd1216ee478 |
| 29536 | .xword 0x13c4237c580cd6e2 |
| 29537 | .xword 0xdc8d1c254764d1b0 |
| 29538 | .xword 0x4df409af2cd3a237 |
| 29539 | .xword 0xf29abba23e461892 |
| 29540 | .xword 0xec87bc3a2aa4655c |
| 29541 | .xword 0x37a9bfc8b18faec3 |
| 29542 | .xword 0x0c6ea6ca4f4fbd6c |
| 29543 | .xword 0x3d047e4c1504da09 |
| 29544 | .xword 0x3f9e9b3cc45a1258 |
| 29545 | .xword 0x5584729527041540 |
| 29546 | .xword 0xe8aab7a90324e75c |
| 29547 | .xword 0xf57a1db1b1862619 |
| 29548 | .xword 0xa6099e6cd5aa2e79 |
| 29549 | .xword 0x9fc6072975ed4ca0 |
| 29550 | .xword 0x58fafd5c6298efab |
| 29551 | .xword 0x05a5a461b8339520 |
| 29552 | .xword 0x4833451a7eefb897 |
| 29553 | .xword 0x54eec075d18e32b3 |
| 29554 | .xword 0x6dd1f5388c7bc38b |
| 29555 | .xword 0xfcc045210e46b971 |
| 29556 | .xword 0xd7fb39d02c4f6e7c |
| 29557 | .xword 0x31f8293bb7db35b6 |
| 29558 | .xword 0x7d85345158656e08 |
| 29559 | .xword 0xff82ff388110c958 |
| 29560 | .xword 0xf8405a122ed0f3a5 |
| 29561 | .xword 0xea5dfe54a2e1cd97 |
| 29562 | .xword 0xa6ded29d66f81c3c |
| 29563 | .xword 0x9f8c3942300cffa7 |
| 29564 | .xword 0x9edcd87f71bf3dce |
| 29565 | .xword 0x62ee388f950348a1 |
| 29566 | .xword 0xa573477f2e3e801a |
| 29567 | .xword 0x93c63938c5c59480 |
| 29568 | .xword 0x9328a47e46be4ab8 |
| 29569 | .xword 0xf0dd2a212615d872 |
| 29570 | .xword 0x2296e566d0889bee |
| 29571 | .xword 0xdc993a6338470fd8 |
| 29572 | .xword 0xa1fbd4eabd821f23 |
| 29573 | .xword 0x7cf9858799167464 |
| 29574 | .xword 0x2beafb34773eddcd |
| 29575 | .xword 0xb42ad5a4fe169ad8 |
| 29576 | .xword 0xcd3fb5ea917fd0d9 |
| 29577 | .xword 0xdd75f0e4374738bf |
| 29578 | .xword 0x590b9a605059e547 |
| 29579 | .xword 0xd9beb747c426d114 |
| 29580 | .xword 0xe361283150b4192d |
| 29581 | .xword 0x417ead5e8fca012c |
| 29582 | .xword 0xa91e1d3524932e44 |
| 29583 | .xword 0xe964d94e0053a440 |
| 29584 | .xword 0xfa7ae30ce6b8791b |
| 29585 | .xword 0x6ac74e97f1ee5238 |
| 29586 | .xword 0xa095e4c52f22ab20 |
| 29587 | .xword 0x84f224acaac8b18d |
| 29588 | .xword 0xe1af6f963683e1d2 |
| 29589 | .xword 0xbd62f295c631e45b |
| 29590 | .xword 0x62b218e8ecba18d5 |
| 29591 | .xword 0x654493db4479bcdd |
| 29592 | .xword 0xd19e3d23e5689a7f |
| 29593 | .xword 0xbaab3c1d2df40be8 |
| 29594 | .xword 0x3817cc28307ecfcb |
| 29595 | .xword 0x6778d794d1e77d67 |
| 29596 | .xword 0xce5e7167eff6c141 |
| 29597 | .xword 0xdcf94bf4db783ea3 |
| 29598 | .xword 0x1695da63c1c38280 |
| 29599 | .xword 0x7efa3e317593e901 |
| 29600 | .xword 0xfc0a0ecc5fd5339e |
| 29601 | .xword 0x3fcd2b3c7d554330 |
| 29602 | .xword 0x3699dc9ee46d47ce |
| 29603 | .xword 0x68520a899e18b82b |
| 29604 | .xword 0xe82c909488c912c8 |
| 29605 | .xword 0x0a15dc2ebd7c57e5 |
| 29606 | .xword 0x0167c5b5915f24c4 |
| 29607 | .xword 0xfe4c2ace91544bfa |
| 29608 | .xword 0x8ff175c8101c0758 |
| 29609 | .xword 0xc0f41b069d246315 |
| 29610 | .xword 0x0934d527a48a1d5f |
| 29611 | .xword 0xf64624621333597f |
| 29612 | .xword 0x44859854004e8e19 |
| 29613 | .xword 0xcbe22bd4db09d612 |
| 29614 | .xword 0x98bf91b5643438c8 |
| 29615 | .xword 0xbd93e4c24ac16c56 |
| 29616 | .xword 0x44600d495bc50a35 |
| 29617 | .xword 0xa707e87a283f49b3 |
| 29618 | .xword 0x34b7c1ea30de6627 |
| 29619 | .xword 0xa22b014bc682cad1 |
| 29620 | .xword 0x12db714c55851c12 |
| 29621 | .xword 0x081f2d24e6d63437 |
| 29622 | .xword 0xb881c8033e878075 |
| 29623 | .xword 0x09325bd2a99bc686 |
| 29624 | .xword 0x45e9e2eca9551390 |
| 29625 | .xword 0x3bf4501e5d58f1be |
| 29626 | .xword 0x05060a273016ee10 |
| 29627 | .xword 0x2424117e55cfb3ce |
| 29628 | .xword 0xe68e71422dc31f45 |
| 29629 | .xword 0x6d38efa76e22410a |
| 29630 | .xword 0xe12810feca31778b |
| 29631 | .xword 0x15c34c5065616f8b |
| 29632 | .xword 0x34074c2f0f4ea3a0 |
| 29633 | .xword 0xfa6b7fb5e393f3f2 |
| 29634 | .xword 0x9c4dac5c600d69d1 |
| 29635 | .xword 0x49db1f89bc886794 |
| 29636 | .xword 0x0c831444481af0e4 |
| 29637 | .xword 0x3f55d88f743e9efb |
| 29638 | .xword 0xd1b95dbf6a34c793 |
| 29639 | .xword 0x88eb74b292e48b79 |
| 29640 | .xword 0x9efcb517545d9432 |
| 29641 | .xword 0x849ef50a7a3e8600 |
| 29642 | .xword 0x844c00b038e7e41c |
| 29643 | .xword 0xc9009731e8e382df |
| 29644 | .xword 0x0adbe8f310facf40 |
| 29645 | .xword 0x46f79815d4313316 |
| 29646 | .xword 0x61cdd31fae80baf3 |
| 29647 | .xword 0xc1c8851e43d61286 |
| 29648 | .xword 0xac4965cb0073a4dc |
| 29649 | .xword 0x9abb608b6eaf0e82 |
| 29650 | .xword 0xecd4043b8a7dc9b1 |
| 29651 | .xword 0x1985b4c639a1a64d |
| 29652 | .xword 0x72bd2e12696994ce |
| 29653 | .xword 0x89b6137d470a46dc |
| 29654 | .xword 0x82156a12426a7361 |
| 29655 | .xword 0xb5e41ae06e0d980a |
| 29656 | .xword 0xd29afd648c4a6562 |
| 29657 | .xword 0x594fbd57f85a60bb |
| 29658 | .xword 0x79771c34fc16070b |
| 29659 | .xword 0x5f51f5f7c556faf6 |
| 29660 | .xword 0x1d9b07895f935932 |
| 29661 | .xword 0xa5e19a2d7e2edea8 |
| 29662 | .xword 0x8502c57d23bf7145 |
| 29663 | .xword 0x5f3d837fd55781f6 |
| 29664 | .xword 0xc2b5ebc5957a8f4b |
| 29665 | .xword 0xd734679756a38256 |
| 29666 | .xword 0x048090af28bc305e |
| 29667 | .xword 0xe46dd30fcc33a295 |
| 29668 | .xword 0xea44955fc259825e |
| 29669 | .xword 0x0263fe2ba45e8d10 |
| 29670 | .xword 0x0284ba00f1a49c50 |
| 29671 | .xword 0x572430978dcbf29b |
| 29672 | .xword 0x52d256039e943434 |
| 29673 | .xword 0xeb69958876b4bc07 |
| 29674 | .xword 0x360e5ae4d9c3173d |
| 29675 | .xword 0xaefc5fe88762f9d7 |
| 29676 | .xword 0x86568bf13b7101bd |
| 29677 | .xword 0x54e67249acf0490d |
| 29678 | .xword 0x9cb66137cac133e5 |
| 29679 | .xword 0xd75bb3f1a60f828a |
| 29680 | .xword 0x1c302cac9eb869c6 |
| 29681 | .xword 0x2e092d213ca07117 |
| 29682 | .xword 0xfda351f62fc42d73 |
| 29683 | .xword 0x862f5a19ca692c94 |
| 29684 | .xword 0x6f9e009317067bc4 |
| 29685 | .xword 0xaf3f8d330d9136d3 |
| 29686 | .xword 0x7e01e61ad570de7e |
| 29687 | .xword 0x1ac7b61f385a84a5 |
| 29688 | .xword 0x746a1403f365809d |
| 29689 | .xword 0xe61fa950b291217b |
| 29690 | .xword 0x49a3ec9cca82b557 |
| 29691 | .xword 0x11e53d98d21feb78 |
| 29692 | .xword 0x03c12bd49751d87d |
| 29693 | .xword 0x4bc49e8a53be2750 |
| 29694 | .xword 0xe3ad9813749ccda1 |
| 29695 | .xword 0xa7b58b00db629fdb |
| 29696 | .xword 0xcb7a3d8761aaf0be |
| 29697 | .xword 0x852c0083fd2185a3 |
| 29698 | .xword 0x82017ea0bb8fb013 |
| 29699 | .xword 0xe6a9aa2700034107 |
| 29700 | .xword 0x7c009d1a7c5d2079 |
| 29701 | .xword 0x1ee6c269678a2a9c |
| 29702 | .xword 0xdc074f23ff0608bb |
| 29703 | .xword 0x0221c9c33dff7849 |
| 29704 | .xword 0x48c2c822f7cba2aa |
| 29705 | .xword 0xc16d85c7070872aa |
| 29706 | |
| 29707 | SECTION .HTRAPS |
| 29708 | .text |
| 29709 | .global restore_range_regs |
| 29710 | restore_range_regs: |
| 29711 | wr %g0, ASI_MMU_REAL_RANGE, %asi |
| 29712 | mov 1, %g1 |
| 29713 | sllx %g1, 63, %g1 |
| 29714 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 |
| 29715 | or %g2 ,%g1, %g2 |
| 29716 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi |
| 29717 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 |
| 29718 | or %g2 ,%g1, %g2 |
| 29719 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi |
| 29720 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 |
| 29721 | or %g2 ,%g1, %g2 |
| 29722 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi |
| 29723 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 |
| 29724 | or %g2 ,%g1, %g2 |
| 29725 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi |
| 29726 | retry |
| 29727 | |
| 29728 | .global wdog_2_ext |
| 29729 | # 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 29730 | SECTION .HTRAPS |
| 29731 | .global wdog_2_ext |
| 29732 | .global retry_with_base_tba |
| 29733 | .global resolve_bad_tte |
| 29734 | |
| 29735 | .text |
| 29736 | resolve_bad_tte: |
| 29737 | !if pc[13:5]==0, then assume not a relocated handler |
| 29738 | rdpr %tpc, %r4 |
| 29739 | andn %r4, 0xf, %r4 |
| 29740 | sllx %r4, 49, %r5 |
| 29741 | brnz,a %r5, retry_with_base_tba |
| 29742 | !assume %r27 is where we came from .. |
| 29743 | fdivd %f0, %f4, %f12 |
| 29744 | jmpl %r27+8, %r0 |
| 29745 | fdivs %f0, %f4, %f12 |
| 29746 | retry_with_base_tba: |
| 29747 | best_set_reg(TRAP_BASE_VA, %r3, %r5) |
| 29748 | cmp %r4, %r5 |
| 29749 | bz htrap_5_ext_done |
| 29750 | set 0x7fff, %r3 |
| 29751 | and %r4, %r3, %r4 |
| 29752 | or %r5, %r4, %r4 |
| 29753 | wrpr %r4, %tpc |
| 29754 | rdpr %tnpc, %r4 |
| 29755 | and %r4, %r3, %r4 |
| 29756 | or %r5, %r4, %r4 |
| 29757 | wrpr %r4, %tnpc |
| 29758 | retry |
| 29759 | |
| 29760 | htrap_5_ext: |
| 29761 | rd %pc, %l2 |
| 29762 | inc %l3 |
| 29763 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 |
| 29764 | rdpr %tl, %l3 |
| 29765 | rdpr %tstate, %l4 |
| 29766 | rdhpr %htstate, %l5 |
| 29767 | or %l5, 0x4, %l5 |
| 29768 | inc %l3 |
| 29769 | wrpr %l3, %tl |
| 29770 | wrpr %l2, %tpc |
| 29771 | add %l2, 4, %l2 |
| 29772 | wrpr %l2, %tnpc |
| 29773 | wrpr %l4, %tstate |
| 29774 | wrhpr %l5, %htstate |
| 29775 | retry |
| 29776 | htrap_5_ext_done: |
| 29777 | done |
| 29778 | |
| 29779 | wdog_2_ext: |
| 29780 | mov 0x1f, %l1 |
| 29781 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 29782 | ! If TT != 2, then goto trap handler |
| 29783 | rdpr %tt, %l1 |
| 29784 | cmp %l1, 0x2 |
| 29785 | bne wdog_2_goto_handler |
| 29786 | nop |
| 29787 | ! else done |
| 29788 | done |
| 29789 | wdog_2_goto_handler: |
| 29790 | rdhpr %htstate, %l3 |
| 29791 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv |
| 29792 | brnz,a %l3, wdog_2_goto_handler_1 |
| 29793 | rdhpr %htba, %l3 |
| 29794 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. |
| 29795 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 29796 | be,a wdog_2_goto_handler_1 |
| 29797 | rdpr %tba, %l3 |
| 29798 | rdhpr %htba, %l3 |
| 29799 | wdog_2_goto_handler_1: |
| 29800 | sllx %l1, 5, %l1 |
| 29801 | add %l1, %l3, %l3 |
| 29802 | jmp %l3 |
| 29803 | nop |
| 29804 | # 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 29805 | ! Red mode other reset handler |
| 29806 | ! Get htba, and tt and make trap address |
| 29807 | ! Jump to trap handler .. |
| 29808 | |
| 29809 | SECTION .RED_SEC |
| 29810 | .global red_other_ext |
| 29811 | .global wdog_red_ext |
| 29812 | .text |
| 29813 | red_other_ext: |
| 29814 | ! IF TL=6, shift stack by one .. |
| 29815 | rdpr %tl, %l1 |
| 29816 | cmp %l1, 6 |
| 29817 | be start_tsa_shift |
| 29818 | nop |
| 29819 | |
| 29820 | continue_red_other: |
| 29821 | mov 0x1f, %l1 |
| 29822 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 29823 | |
| 29824 | rdpr %tt, %l1 |
| 29825 | |
| 29826 | rdhpr %htstate, %l2 |
| 29827 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv |
| 29828 | brnz,a %l2, red_goto_handler |
| 29829 | rdhpr %htba, %l2 |
| 29830 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. |
| 29831 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 29832 | be,a red_goto_handler |
| 29833 | rdpr %tba, %l2 |
| 29834 | rdhpr %htba, %l2 |
| 29835 | red_goto_handler: |
| 29836 | |
| 29837 | sllx %l1, 5, %l1 |
| 29838 | add %l1, %l2, %l2 |
| 29839 | rdhpr %hpstate, %l1 |
| 29840 | jmp %l2 |
| 29841 | wrhpr %l1, 0x20, %hpstate |
| 29842 | nop |
| 29843 | |
| 29844 | wdog_red_ext: |
| 29845 | ! Shift stack down by 1 ... |
| 29846 | rdpr %tl, %l1 |
| 29847 | cmp %l1, 6 |
| 29848 | bl wdog_end |
| 29849 | start_tsa_shift: |
| 29850 | mov 0x2, %l2 |
| 29851 | |
| 29852 | tsa_shift: |
| 29853 | wrpr %l2, %tl |
| 29854 | rdpr %tt, %l3 |
| 29855 | rdpr %tpc, %l4 |
| 29856 | rdpr %tnpc, %l5 |
| 29857 | rdpr %tstate, %l6 |
| 29858 | rdhpr %htstate, %l7 |
| 29859 | dec %l2 |
| 29860 | wrpr %l2, %tl |
| 29861 | wrpr %l3, %tt |
| 29862 | wrpr %l4, %tpc |
| 29863 | wrpr %l5, %tnpc |
| 29864 | wrpr %l6, %tstate |
| 29865 | wrhpr %l7, %htstate |
| 29866 | add %l2, 2, %l2 |
| 29867 | cmp %l2, %l1 |
| 29868 | ble tsa_shift |
| 29869 | nop |
| 29870 | tsa_shift_done: |
| 29871 | dec %l1 |
| 29872 | wrpr %l1, %tl |
| 29873 | |
| 29874 | wdog_end: |
| 29875 | ! If TT != 2, then goto trap handler |
| 29876 | rdpr %tt, %l1 |
| 29877 | |
| 29878 | cmp %l1, 0x2 |
| 29879 | bne continue_red_other |
| 29880 | nop |
| 29881 | ! else done |
| 29882 | mov 0x1f, %l1 |
| 29883 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 29884 | done |
| 29885 | # 961 "diag.j" |
| 29886 | |
| 29887 | SECTION .CWQ_DATA DATA_VA =0x4000 |
| 29888 | attr_data { |
| 29889 | Name = .CWQ_DATA |
| 29890 | hypervisor |
| 29891 | } |
| 29892 | |
| 29893 | .data |
| 29894 | .align 16 |
| 29895 | .global msg |
| 29896 | msg: |
| 29897 | .xword 0xad32fa52374cc6ba |
| 29898 | .xword 0x4cbf52280549003a |
| 29899 | |
| 29900 | .align 16 |
| 29901 | .global results |
| 29902 | results: |
| 29903 | .xword 0xDEADBEEFDEADBEEF |
| 29904 | .xword 0xDEADBEEFDEADBEEF |
| 29905 | !# CWQ data area |
| 29906 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) |
| 29907 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) |
| 29908 | .align 64 |
| 29909 | .global CWQ_BASE |
| 29910 | CWQ_BASE: |
| 29911 | .xword 0xAAAAAAAAAAAAAAA |
| 29912 | .xword 0xAAAAAAAAAAAAAAA |
| 29913 | .xword 0xAAAAAAAAAAAAAAA |
| 29914 | .xword 0xAAAAAAAAAAAAAAA |
| 29915 | .xword 0xAAAAAAAAAAAAAAA |
| 29916 | .xword 0xAAAAAAAAAAAAAAA |
| 29917 | .xword 0xAAAAAAAAAAAAAAA |
| 29918 | .xword 0xAAAAAAAAAAAAAAA |
| 29919 | .xword 0xAAAAAAAAAAAAAAA |
| 29920 | .xword 0xAAAAAAAAAAAAAAA |
| 29921 | .xword 0xAAAAAAAAAAAAAAA |
| 29922 | .xword 0xAAAAAAAAAAAAAAA |
| 29923 | .xword 0xAAAAAAAAAAAAAAA |
| 29924 | .xword 0xAAAAAAAAAAAAAAA |
| 29925 | .xword 0xAAAAAAAAAAAAAAA |
| 29926 | .xword 0xAAAAAAAAAAAAAAA |
| 29927 | .xword 0xAAAAAAAAAAAAAAA |
| 29928 | .xword 0xAAAAAAAAAAAAAAA |
| 29929 | .xword 0xAAAAAAAAAAAAAAA |
| 29930 | .xword 0xAAAAAAAAAAAAAAA |
| 29931 | .xword 0xAAAAAAAAAAAAAAA |
| 29932 | .xword 0xAAAAAAAAAAAAAAA |
| 29933 | .xword 0xAAAAAAAAAAAAAAA |
| 29934 | .xword 0xAAAAAAAAAAAAAAA |
| 29935 | .global CWQ_LAST |
| 29936 | .align 64 |
| 29937 | CWQ_LAST: |
| 29938 | .word 0x0 |
| 29939 | .align 64 |
| 29940 | cwq_base1: |
| 29941 | .xword 0xAAAAAAAAAAAAAAA |
| 29942 | .xword 0xAAAAAAAAAAAAAAA |
| 29943 | .xword 0xAAAAAAAAAAAAAAA |
| 29944 | .xword 0xAAAAAAAAAAAAAAA |
| 29945 | .xword 0xAAAAAAAAAAAAAAA |
| 29946 | .xword 0xAAAAAAAAAAAAAAA |
| 29947 | .xword 0xAAAAAAAAAAAAAAA |
| 29948 | .xword 0xAAAAAAAAAAAAAAA |
| 29949 | .xword 0xAAAAAAAAAAAAAAA |
| 29950 | .xword 0xAAAAAAAAAAAAAAA |
| 29951 | .xword 0xAAAAAAAAAAAAAAA |
| 29952 | .xword 0xAAAAAAAAAAAAAAA |
| 29953 | .xword 0xAAAAAAAAAAAAAAA |
| 29954 | .xword 0xAAAAAAAAAAAAAAA |
| 29955 | .xword 0xAAAAAAAAAAAAAAA |
| 29956 | .xword 0xAAAAAAAAAAAAAAA |
| 29957 | .xword 0xAAAAAAAAAAAAAAA |
| 29958 | .xword 0xAAAAAAAAAAAAAAA |
| 29959 | .xword 0xAAAAAAAAAAAAAAA |
| 29960 | .xword 0xAAAAAAAAAAAAAAA |
| 29961 | .xword 0xAAAAAAAAAAAAAAA |
| 29962 | .xword 0xAAAAAAAAAAAAAAA |
| 29963 | .xword 0xAAAAAAAAAAAAAAA |
| 29964 | .xword 0xAAAAAAAAAAAAAAA |
| 29965 | .align 64 |
| 29966 | cwq_last1: |
| 29967 | .word 0x0 |
| 29968 | .align 64 |
| 29969 | .xword 0xAAAAAAAAAAAAAAA |
| 29970 | .xword 0xAAAAAAAAAAAAAAA |
| 29971 | .xword 0xAAAAAAAAAAAAAAA |
| 29972 | .xword 0xAAAAAAAAAAAAAAA |
| 29973 | .xword 0xAAAAAAAAAAAAAAA |
| 29974 | .xword 0xAAAAAAAAAAAAAAA |
| 29975 | .xword 0xAAAAAAAAAAAAAAA |
| 29976 | .xword 0xAAAAAAAAAAAAAAA |
| 29977 | .xword 0xAAAAAAAAAAAAAAA |
| 29978 | .xword 0xAAAAAAAAAAAAAAA |
| 29979 | .xword 0xAAAAAAAAAAAAAAA |
| 29980 | .xword 0xAAAAAAAAAAAAAAA |
| 29981 | .xword 0xAAAAAAAAAAAAAAA |
| 29982 | .xword 0xAAAAAAAAAAAAAAA |
| 29983 | .xword 0xAAAAAAAAAAAAAAA |
| 29984 | .xword 0xAAAAAAAAAAAAAAA |
| 29985 | .xword 0xAAAAAAAAAAAAAAA |
| 29986 | .xword 0xAAAAAAAAAAAAAAA |
| 29987 | .xword 0xAAAAAAAAAAAAAAA |
| 29988 | .xword 0xAAAAAAAAAAAAAAA |
| 29989 | .xword 0xAAAAAAAAAAAAAAA |
| 29990 | .xword 0xAAAAAAAAAAAAAAA |
| 29991 | .xword 0xAAAAAAAAAAAAAAA |
| 29992 | .xword 0xAAAAAAAAAAAAAAA |
| 29993 | .align 64 |
| 29994 | .word 0x0 |
| 29995 | .align 64 |
| 29996 | .xword 0xAAAAAAAAAAAAAAA |
| 29997 | .xword 0xAAAAAAAAAAAAAAA |
| 29998 | .xword 0xAAAAAAAAAAAAAAA |
| 29999 | .xword 0xAAAAAAAAAAAAAAA |
| 30000 | .xword 0xAAAAAAAAAAAAAAA |
| 30001 | .xword 0xAAAAAAAAAAAAAAA |
| 30002 | .xword 0xAAAAAAAAAAAAAAA |
| 30003 | .xword 0xAAAAAAAAAAAAAAA |
| 30004 | .xword 0xAAAAAAAAAAAAAAA |
| 30005 | .xword 0xAAAAAAAAAAAAAAA |
| 30006 | .xword 0xAAAAAAAAAAAAAAA |
| 30007 | .xword 0xAAAAAAAAAAAAAAA |
| 30008 | .xword 0xAAAAAAAAAAAAAAA |
| 30009 | .xword 0xAAAAAAAAAAAAAAA |
| 30010 | .xword 0xAAAAAAAAAAAAAAA |
| 30011 | .xword 0xAAAAAAAAAAAAAAA |
| 30012 | .xword 0xAAAAAAAAAAAAAAA |
| 30013 | .xword 0xAAAAAAAAAAAAAAA |
| 30014 | .xword 0xAAAAAAAAAAAAAAA |
| 30015 | .xword 0xAAAAAAAAAAAAAAA |
| 30016 | .xword 0xAAAAAAAAAAAAAAA |
| 30017 | .xword 0xAAAAAAAAAAAAAAA |
| 30018 | .xword 0xAAAAAAAAAAAAAAA |
| 30019 | .xword 0xAAAAAAAAAAAAAAA |
| 30020 | .align 64 |
| 30021 | .word 0x0 |
| 30022 | .align 64 |
| 30023 | .xword 0xAAAAAAAAAAAAAAA |
| 30024 | .xword 0xAAAAAAAAAAAAAAA |
| 30025 | .xword 0xAAAAAAAAAAAAAAA |
| 30026 | .xword 0xAAAAAAAAAAAAAAA |
| 30027 | .xword 0xAAAAAAAAAAAAAAA |
| 30028 | .xword 0xAAAAAAAAAAAAAAA |
| 30029 | .xword 0xAAAAAAAAAAAAAAA |
| 30030 | .xword 0xAAAAAAAAAAAAAAA |
| 30031 | .xword 0xAAAAAAAAAAAAAAA |
| 30032 | .xword 0xAAAAAAAAAAAAAAA |
| 30033 | .xword 0xAAAAAAAAAAAAAAA |
| 30034 | .xword 0xAAAAAAAAAAAAAAA |
| 30035 | .xword 0xAAAAAAAAAAAAAAA |
| 30036 | .xword 0xAAAAAAAAAAAAAAA |
| 30037 | .xword 0xAAAAAAAAAAAAAAA |
| 30038 | .xword 0xAAAAAAAAAAAAAAA |
| 30039 | .xword 0xAAAAAAAAAAAAAAA |
| 30040 | .xword 0xAAAAAAAAAAAAAAA |
| 30041 | .xword 0xAAAAAAAAAAAAAAA |
| 30042 | .xword 0xAAAAAAAAAAAAAAA |
| 30043 | .xword 0xAAAAAAAAAAAAAAA |
| 30044 | .xword 0xAAAAAAAAAAAAAAA |
| 30045 | .xword 0xAAAAAAAAAAAAAAA |
| 30046 | .xword 0xAAAAAAAAAAAAAAA |
| 30047 | .align 64 |
| 30048 | .word 0x0 |
| 30049 | .align 64 |
| 30050 | .xword 0xAAAAAAAAAAAAAAA |
| 30051 | .xword 0xAAAAAAAAAAAAAAA |
| 30052 | .xword 0xAAAAAAAAAAAAAAA |
| 30053 | .xword 0xAAAAAAAAAAAAAAA |
| 30054 | .xword 0xAAAAAAAAAAAAAAA |
| 30055 | .xword 0xAAAAAAAAAAAAAAA |
| 30056 | .xword 0xAAAAAAAAAAAAAAA |
| 30057 | .xword 0xAAAAAAAAAAAAAAA |
| 30058 | .xword 0xAAAAAAAAAAAAAAA |
| 30059 | .xword 0xAAAAAAAAAAAAAAA |
| 30060 | .xword 0xAAAAAAAAAAAAAAA |
| 30061 | .xword 0xAAAAAAAAAAAAAAA |
| 30062 | .xword 0xAAAAAAAAAAAAAAA |
| 30063 | .xword 0xAAAAAAAAAAAAAAA |
| 30064 | .xword 0xAAAAAAAAAAAAAAA |
| 30065 | .xword 0xAAAAAAAAAAAAAAA |
| 30066 | .xword 0xAAAAAAAAAAAAAAA |
| 30067 | .xword 0xAAAAAAAAAAAAAAA |
| 30068 | .xword 0xAAAAAAAAAAAAAAA |
| 30069 | .xword 0xAAAAAAAAAAAAAAA |
| 30070 | .xword 0xAAAAAAAAAAAAAAA |
| 30071 | .xword 0xAAAAAAAAAAAAAAA |
| 30072 | .xword 0xAAAAAAAAAAAAAAA |
| 30073 | .xword 0xAAAAAAAAAAAAAAA |
| 30074 | .align 64 |
| 30075 | .word 0x0 |
| 30076 | .align 64 |
| 30077 | .xword 0xAAAAAAAAAAAAAAA |
| 30078 | .xword 0xAAAAAAAAAAAAAAA |
| 30079 | .xword 0xAAAAAAAAAAAAAAA |
| 30080 | .xword 0xAAAAAAAAAAAAAAA |
| 30081 | .xword 0xAAAAAAAAAAAAAAA |
| 30082 | .xword 0xAAAAAAAAAAAAAAA |
| 30083 | .xword 0xAAAAAAAAAAAAAAA |
| 30084 | .xword 0xAAAAAAAAAAAAAAA |
| 30085 | .xword 0xAAAAAAAAAAAAAAA |
| 30086 | .xword 0xAAAAAAAAAAAAAAA |
| 30087 | .xword 0xAAAAAAAAAAAAAAA |
| 30088 | .xword 0xAAAAAAAAAAAAAAA |
| 30089 | .xword 0xAAAAAAAAAAAAAAA |
| 30090 | .xword 0xAAAAAAAAAAAAAAA |
| 30091 | .xword 0xAAAAAAAAAAAAAAA |
| 30092 | .xword 0xAAAAAAAAAAAAAAA |
| 30093 | .xword 0xAAAAAAAAAAAAAAA |
| 30094 | .xword 0xAAAAAAAAAAAAAAA |
| 30095 | .xword 0xAAAAAAAAAAAAAAA |
| 30096 | .xword 0xAAAAAAAAAAAAAAA |
| 30097 | .xword 0xAAAAAAAAAAAAAAA |
| 30098 | .xword 0xAAAAAAAAAAAAAAA |
| 30099 | .xword 0xAAAAAAAAAAAAAAA |
| 30100 | .xword 0xAAAAAAAAAAAAAAA |
| 30101 | .align 64 |
| 30102 | .word 0x0 |
| 30103 | .align 64 |
| 30104 | .xword 0xAAAAAAAAAAAAAAA |
| 30105 | .xword 0xAAAAAAAAAAAAAAA |
| 30106 | .xword 0xAAAAAAAAAAAAAAA |
| 30107 | .xword 0xAAAAAAAAAAAAAAA |
| 30108 | .xword 0xAAAAAAAAAAAAAAA |
| 30109 | .xword 0xAAAAAAAAAAAAAAA |
| 30110 | .xword 0xAAAAAAAAAAAAAAA |
| 30111 | .xword 0xAAAAAAAAAAAAAAA |
| 30112 | .xword 0xAAAAAAAAAAAAAAA |
| 30113 | .xword 0xAAAAAAAAAAAAAAA |
| 30114 | .xword 0xAAAAAAAAAAAAAAA |
| 30115 | .xword 0xAAAAAAAAAAAAAAA |
| 30116 | .xword 0xAAAAAAAAAAAAAAA |
| 30117 | .xword 0xAAAAAAAAAAAAAAA |
| 30118 | .xword 0xAAAAAAAAAAAAAAA |
| 30119 | .xword 0xAAAAAAAAAAAAAAA |
| 30120 | .xword 0xAAAAAAAAAAAAAAA |
| 30121 | .xword 0xAAAAAAAAAAAAAAA |
| 30122 | .xword 0xAAAAAAAAAAAAAAA |
| 30123 | .xword 0xAAAAAAAAAAAAAAA |
| 30124 | .xword 0xAAAAAAAAAAAAAAA |
| 30125 | .xword 0xAAAAAAAAAAAAAAA |
| 30126 | .xword 0xAAAAAAAAAAAAAAA |
| 30127 | .xword 0xAAAAAAAAAAAAAAA |
| 30128 | .align 64 |
| 30129 | .word 0x0 |
| 30130 | |
| 30131 | |
| 30132 | |
| 30133 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 |
| 30134 | attr_text { |
| 30135 | Name = .MyHTRAPS_0, |
| 30136 | RA = 0x0000000000280000, |
| 30137 | PA = ra2pa(0x0000000000280000,0), |
| 30138 | part_0_ctx_zero_tsb_config_3, |
| 30139 | part_0_ctx_nonzero_tsb_config_3, |
| 30140 | TTE_G = 1, |
| 30141 | TTE_Context = 0, |
| 30142 | TTE_V = 1, |
| 30143 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30144 | TTE_NFO = 0, |
| 30145 | TTE_IE = 0, |
| 30146 | TTE_Soft2 = 0, |
| 30147 | TTE_Diag = 0, |
| 30148 | TTE_Soft = 0, |
| 30149 | TTE_L = 0, |
| 30150 | TTE_CP = 0, |
| 30151 | TTE_CV = 0, |
| 30152 | TTE_E = 0, |
| 30153 | TTE_P = 1, |
| 30154 | TTE_W = 0, |
| 30155 | TTE_X = 0 |
| 30156 | } |
| 30157 | |
| 30158 | |
| 30159 | attr_data { |
| 30160 | Name = .MyHTRAPS_0, |
| 30161 | RA = 0x00000000002c0000, |
| 30162 | PA = ra2pa(0x00000000002c0000,0), |
| 30163 | part_0_ctx_zero_tsb_config_3, |
| 30164 | part_0_ctx_nonzero_tsb_config_3, |
| 30165 | TTE_G = 1, |
| 30166 | TTE_Context = 0, |
| 30167 | TTE_V = 1, |
| 30168 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30169 | TTE_NFO = 0, |
| 30170 | TTE_IE = 0, |
| 30171 | TTE_Soft2 = 0, |
| 30172 | TTE_Diag = 0, |
| 30173 | TTE_Soft = 0, |
| 30174 | TTE_L = 0, |
| 30175 | TTE_CP = 1, |
| 30176 | TTE_CV = 1, |
| 30177 | TTE_E = 0, |
| 30178 | TTE_P = 1, |
| 30179 | TTE_W = 0 |
| 30180 | } |
| 30181 | |
| 30182 | .text |
| 30183 | #include "htraps.s" |
| 30184 | #include "tlu_htraps_ext.s" |
| 30185 | |
| 30186 | |
| 30187 | |
| 30188 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 |
| 30189 | attr_text { |
| 30190 | Name = .MyHTRAPS_1, |
| 30191 | RA = 0x00000000002a0000, |
| 30192 | PA = ra2pa(0x00000000002a0000,0), |
| 30193 | part_0_ctx_zero_tsb_config_3, |
| 30194 | part_0_ctx_nonzero_tsb_config_3, |
| 30195 | TTE_G = 1, |
| 30196 | TTE_Context = 0, |
| 30197 | TTE_V = 1, |
| 30198 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30199 | TTE_NFO = 0, |
| 30200 | TTE_IE = 0, |
| 30201 | TTE_Soft2 = 0, |
| 30202 | TTE_Diag = 0, |
| 30203 | TTE_Soft = 0, |
| 30204 | TTE_L = 0, |
| 30205 | TTE_CP = 0, |
| 30206 | TTE_CV = 1, |
| 30207 | TTE_E = 1, |
| 30208 | TTE_P = 1, |
| 30209 | TTE_W = 0, |
| 30210 | TTE_X = 0 |
| 30211 | } |
| 30212 | |
| 30213 | |
| 30214 | attr_data { |
| 30215 | Name = .MyHTRAPS_1, |
| 30216 | RA = 0x00000000002e0000, |
| 30217 | PA = ra2pa(0x00000000002e0000,0), |
| 30218 | part_0_ctx_zero_tsb_config_3, |
| 30219 | part_0_ctx_nonzero_tsb_config_3, |
| 30220 | TTE_G = 1, |
| 30221 | TTE_Context = 0, |
| 30222 | TTE_V = 1, |
| 30223 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30224 | TTE_NFO = 0, |
| 30225 | TTE_IE = 0, |
| 30226 | TTE_Soft2 = 0, |
| 30227 | TTE_Diag = 0, |
| 30228 | TTE_Soft = 0, |
| 30229 | TTE_L = 0, |
| 30230 | TTE_CP = 1, |
| 30231 | TTE_CV = 1, |
| 30232 | TTE_E = 0, |
| 30233 | TTE_P = 1, |
| 30234 | TTE_W = 0 |
| 30235 | } |
| 30236 | |
| 30237 | .text |
| 30238 | #include "htraps.s" |
| 30239 | #include "tlu_htraps_ext.s" |
| 30240 | |
| 30241 | |
| 30242 | |
| 30243 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 |
| 30244 | attr_text { |
| 30245 | Name = .MyHTRAPS_2, |
| 30246 | RA = 0x0000000200280000, |
| 30247 | PA = ra2pa(0x0000000200280000,0), |
| 30248 | part_0_ctx_zero_tsb_config_3, |
| 30249 | part_0_ctx_nonzero_tsb_config_3, |
| 30250 | TTE_G = 1, |
| 30251 | TTE_Context = 0, |
| 30252 | TTE_V = 1, |
| 30253 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30254 | TTE_NFO = 0, |
| 30255 | TTE_IE = 0, |
| 30256 | TTE_Soft2 = 0, |
| 30257 | TTE_Diag = 0, |
| 30258 | TTE_Soft = 0, |
| 30259 | TTE_L = 0, |
| 30260 | TTE_CP = 1, |
| 30261 | TTE_CV = 0, |
| 30262 | TTE_E = 1, |
| 30263 | TTE_P = 1, |
| 30264 | TTE_W = 0, |
| 30265 | TTE_X = 0 |
| 30266 | } |
| 30267 | |
| 30268 | |
| 30269 | attr_data { |
| 30270 | Name = .MyHTRAPS_2, |
| 30271 | RA = 0x00000002002c0000, |
| 30272 | PA = ra2pa(0x00000002002c0000,0), |
| 30273 | part_0_ctx_zero_tsb_config_3, |
| 30274 | part_0_ctx_nonzero_tsb_config_3, |
| 30275 | TTE_G = 1, |
| 30276 | TTE_Context = 0, |
| 30277 | TTE_V = 1, |
| 30278 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30279 | TTE_NFO = 0, |
| 30280 | TTE_IE = 0, |
| 30281 | TTE_Soft2 = 0, |
| 30282 | TTE_Diag = 0, |
| 30283 | TTE_Soft = 0, |
| 30284 | TTE_L = 0, |
| 30285 | TTE_CP = 0, |
| 30286 | TTE_CV = 0, |
| 30287 | TTE_E = 0, |
| 30288 | TTE_P = 1, |
| 30289 | TTE_W = 0 |
| 30290 | } |
| 30291 | |
| 30292 | .text |
| 30293 | #include "htraps.s" |
| 30294 | #include "tlu_htraps_ext.s" |
| 30295 | |
| 30296 | |
| 30297 | |
| 30298 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 |
| 30299 | attr_text { |
| 30300 | Name = .MyHTRAPS_3, |
| 30301 | RA = 0x00000002002a0000, |
| 30302 | PA = ra2pa(0x00000002002a0000,0), |
| 30303 | part_0_ctx_zero_tsb_config_3, |
| 30304 | part_0_ctx_nonzero_tsb_config_3, |
| 30305 | TTE_G = 1, |
| 30306 | TTE_Context = 0, |
| 30307 | TTE_V = 1, |
| 30308 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30309 | TTE_NFO = 0, |
| 30310 | TTE_IE = 0, |
| 30311 | TTE_Soft2 = 0, |
| 30312 | TTE_Diag = 0, |
| 30313 | TTE_Soft = 0, |
| 30314 | TTE_L = 0, |
| 30315 | TTE_CP = 1, |
| 30316 | TTE_CV = 1, |
| 30317 | TTE_E = 0, |
| 30318 | TTE_P = 1, |
| 30319 | TTE_W = 0, |
| 30320 | TTE_X = 0 |
| 30321 | } |
| 30322 | |
| 30323 | |
| 30324 | attr_data { |
| 30325 | Name = .MyHTRAPS_3, |
| 30326 | RA = 0x00000002002e0000, |
| 30327 | PA = ra2pa(0x00000002002e0000,0), |
| 30328 | part_0_ctx_zero_tsb_config_3, |
| 30329 | part_0_ctx_nonzero_tsb_config_3, |
| 30330 | TTE_G = 1, |
| 30331 | TTE_Context = 0, |
| 30332 | TTE_V = 1, |
| 30333 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30334 | TTE_NFO = 0, |
| 30335 | TTE_IE = 0, |
| 30336 | TTE_Soft2 = 0, |
| 30337 | TTE_Diag = 0, |
| 30338 | TTE_Soft = 0, |
| 30339 | TTE_L = 0, |
| 30340 | TTE_CP = 1, |
| 30341 | TTE_CV = 0, |
| 30342 | TTE_E = 0, |
| 30343 | TTE_P = 1, |
| 30344 | TTE_W = 0 |
| 30345 | } |
| 30346 | |
| 30347 | .text |
| 30348 | #include "htraps.s" |
| 30349 | #include "tlu_htraps_ext.s" |
| 30350 | |
| 30351 | |
| 30352 | |
| 30353 | |
| 30354 | |
| 30355 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 |
| 30356 | attr_text { |
| 30357 | Name = .MyTRAPS_0, |
| 30358 | RA = 0x0000000000380000, |
| 30359 | PA = ra2pa(0x0000000000380000,0), |
| 30360 | part_0_ctx_zero_tsb_config_3, |
| 30361 | part_0_ctx_nonzero_tsb_config_3, |
| 30362 | TTE_G = 1, |
| 30363 | TTE_Context = 0, |
| 30364 | TTE_V = 1, |
| 30365 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30366 | TTE_NFO = 1, |
| 30367 | TTE_IE = 0, |
| 30368 | TTE_Soft2 = 0, |
| 30369 | TTE_Diag = 0, |
| 30370 | TTE_Soft = 0, |
| 30371 | TTE_L = 0, |
| 30372 | TTE_CP = 1, |
| 30373 | TTE_CV = 1, |
| 30374 | TTE_E = 0, |
| 30375 | TTE_P = 1, |
| 30376 | TTE_W = 1, |
| 30377 | TTE_X = 0 |
| 30378 | } |
| 30379 | |
| 30380 | |
| 30381 | attr_data { |
| 30382 | Name = .MyTRAPS_0, |
| 30383 | RA = 0x00000000003c0000, |
| 30384 | PA = ra2pa(0x00000000003c0000,0), |
| 30385 | part_0_ctx_zero_tsb_config_3, |
| 30386 | part_0_ctx_nonzero_tsb_config_3, |
| 30387 | TTE_G = 1, |
| 30388 | TTE_Context = 0, |
| 30389 | TTE_V = 1, |
| 30390 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30391 | TTE_NFO = 1, |
| 30392 | TTE_IE = 1, |
| 30393 | TTE_Soft2 = 0, |
| 30394 | TTE_Diag = 0, |
| 30395 | TTE_Soft = 0, |
| 30396 | TTE_L = 0, |
| 30397 | TTE_CP = 0, |
| 30398 | TTE_CV = 1, |
| 30399 | TTE_E = 0, |
| 30400 | TTE_P = 1, |
| 30401 | TTE_W = 0 |
| 30402 | } |
| 30403 | |
| 30404 | #include "traps.s" |
| 30405 | |
| 30406 | |
| 30407 | |
| 30408 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 |
| 30409 | attr_text { |
| 30410 | Name = .MyTRAPS_1, |
| 30411 | RA = 0x00000000003a0000, |
| 30412 | PA = ra2pa(0x00000000003a0000,0), |
| 30413 | part_0_ctx_zero_tsb_config_3, |
| 30414 | part_0_ctx_nonzero_tsb_config_3, |
| 30415 | TTE_G = 1, |
| 30416 | TTE_Context = 0, |
| 30417 | TTE_V = 1, |
| 30418 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30419 | TTE_NFO = 1, |
| 30420 | TTE_IE = 1, |
| 30421 | TTE_Soft2 = 0, |
| 30422 | TTE_Diag = 0, |
| 30423 | TTE_Soft = 0, |
| 30424 | TTE_L = 0, |
| 30425 | TTE_CP = 0, |
| 30426 | TTE_CV = 1, |
| 30427 | TTE_E = 0, |
| 30428 | TTE_P = 1, |
| 30429 | TTE_W = 1, |
| 30430 | TTE_X = 0 |
| 30431 | } |
| 30432 | |
| 30433 | |
| 30434 | attr_data { |
| 30435 | Name = .MyTRAPS_1, |
| 30436 | RA = 0x00000000003e0000, |
| 30437 | PA = ra2pa(0x00000000003e0000,0), |
| 30438 | part_0_ctx_zero_tsb_config_3, |
| 30439 | part_0_ctx_nonzero_tsb_config_3, |
| 30440 | TTE_G = 1, |
| 30441 | TTE_Context = 0, |
| 30442 | TTE_V = 1, |
| 30443 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30444 | TTE_NFO = 1, |
| 30445 | TTE_IE = 1, |
| 30446 | TTE_Soft2 = 0, |
| 30447 | TTE_Diag = 0, |
| 30448 | TTE_Soft = 0, |
| 30449 | TTE_L = 0, |
| 30450 | TTE_CP = 1, |
| 30451 | TTE_CV = 0, |
| 30452 | TTE_E = 0, |
| 30453 | TTE_P = 1, |
| 30454 | TTE_W = 0 |
| 30455 | } |
| 30456 | |
| 30457 | #include "traps.s" |
| 30458 | |
| 30459 | |
| 30460 | |
| 30461 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 |
| 30462 | attr_text { |
| 30463 | Name = .MyTRAPS_2, |
| 30464 | RA = 0x0000000400380000, |
| 30465 | PA = ra2pa(0x0000000400380000,0), |
| 30466 | part_0_ctx_zero_tsb_config_3, |
| 30467 | part_0_ctx_nonzero_tsb_config_3, |
| 30468 | TTE_G = 1, |
| 30469 | TTE_Context = 0, |
| 30470 | TTE_V = 1, |
| 30471 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30472 | TTE_NFO = 0, |
| 30473 | TTE_IE = 0, |
| 30474 | TTE_Soft2 = 0, |
| 30475 | TTE_Diag = 0, |
| 30476 | TTE_Soft = 0, |
| 30477 | TTE_L = 0, |
| 30478 | TTE_CP = 1, |
| 30479 | TTE_CV = 0, |
| 30480 | TTE_E = 0, |
| 30481 | TTE_P = 1, |
| 30482 | TTE_W = 1, |
| 30483 | TTE_X = 0 |
| 30484 | } |
| 30485 | |
| 30486 | |
| 30487 | attr_data { |
| 30488 | Name = .MyTRAPS_2, |
| 30489 | RA = 0x00000004003c0000, |
| 30490 | PA = ra2pa(0x00000004003c0000,0), |
| 30491 | part_0_ctx_zero_tsb_config_3, |
| 30492 | part_0_ctx_nonzero_tsb_config_3, |
| 30493 | TTE_G = 1, |
| 30494 | TTE_Context = 0, |
| 30495 | TTE_V = 1, |
| 30496 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30497 | TTE_NFO = 0, |
| 30498 | TTE_IE = 0, |
| 30499 | TTE_Soft2 = 0, |
| 30500 | TTE_Diag = 0, |
| 30501 | TTE_Soft = 0, |
| 30502 | TTE_L = 0, |
| 30503 | TTE_CP = 0, |
| 30504 | TTE_CV = 0, |
| 30505 | TTE_E = 0, |
| 30506 | TTE_P = 1, |
| 30507 | TTE_W = 0 |
| 30508 | } |
| 30509 | |
| 30510 | #include "traps.s" |
| 30511 | |
| 30512 | |
| 30513 | |
| 30514 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 |
| 30515 | attr_text { |
| 30516 | Name = .MyTRAPS_3, |
| 30517 | RA = 0x00000004003a0000, |
| 30518 | PA = ra2pa(0x00000004003a0000,0), |
| 30519 | part_0_ctx_zero_tsb_config_3, |
| 30520 | part_0_ctx_nonzero_tsb_config_3, |
| 30521 | TTE_G = 1, |
| 30522 | TTE_Context = 0, |
| 30523 | TTE_V = 1, |
| 30524 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30525 | TTE_NFO = 1, |
| 30526 | TTE_IE = 1, |
| 30527 | TTE_Soft2 = 0, |
| 30528 | TTE_Diag = 0, |
| 30529 | TTE_Soft = 0, |
| 30530 | TTE_L = 0, |
| 30531 | TTE_CP = 1, |
| 30532 | TTE_CV = 1, |
| 30533 | TTE_E = 0, |
| 30534 | TTE_P = 0, |
| 30535 | TTE_W = 1, |
| 30536 | TTE_X = 0 |
| 30537 | } |
| 30538 | |
| 30539 | |
| 30540 | attr_data { |
| 30541 | Name = .MyTRAPS_3, |
| 30542 | RA = 0x00000004003e0000, |
| 30543 | PA = ra2pa(0x00000004003e0000,0), |
| 30544 | part_0_ctx_zero_tsb_config_3, |
| 30545 | part_0_ctx_nonzero_tsb_config_3, |
| 30546 | TTE_G = 1, |
| 30547 | TTE_Context = 0, |
| 30548 | TTE_V = 1, |
| 30549 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 30550 | TTE_NFO = 1, |
| 30551 | TTE_IE = 0, |
| 30552 | TTE_Soft2 = 0, |
| 30553 | TTE_Diag = 0, |
| 30554 | TTE_Soft = 0, |
| 30555 | TTE_L = 0, |
| 30556 | TTE_CP = 1, |
| 30557 | TTE_CV = 0, |
| 30558 | TTE_E = 0, |
| 30559 | TTE_P = 1, |
| 30560 | TTE_W = 0 |
| 30561 | } |
| 30562 | |
| 30563 | #include "traps.s" |
| 30564 | |
| 30565 | |
| 30566 | |
| 30567 | |
| 30568 | |
| 30569 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 |
| 30570 | attr_data { |
| 30571 | Name = .MyDATA_0, |
| 30572 | RA = 0x0000000170100000, |
| 30573 | PA = ra2pa(0x0000000170100000,0), |
| 30574 | part_0_ctx_zero_tsb_config_0, |
| 30575 | part_0_ctx_nonzero_tsb_config_0, |
| 30576 | TTE_G = 1, |
| 30577 | TTE_Context = PCONTEXT, |
| 30578 | TTE_V = 1, |
| 30579 | TTE_Size = 1, |
| 30580 | TTE_NFO = 0, |
| 30581 | TTE_IE = 1, |
| 30582 | TTE_Soft2 = 0, |
| 30583 | TTE_Diag = 0, |
| 30584 | TTE_Soft = 0, |
| 30585 | TTE_L = 0, |
| 30586 | TTE_CP = 1, |
| 30587 | TTE_CV = 0, |
| 30588 | TTE_E = 0, |
| 30589 | TTE_P = 1, |
| 30590 | TTE_W = 0 |
| 30591 | } |
| 30592 | |
| 30593 | |
| 30594 | attr_data { |
| 30595 | Name = .MyDATA_0, |
| 30596 | RA = 0x0000000170100000, |
| 30597 | PA = ra2pa(0x0000000170100000,0), |
| 30598 | part_0_ctx_zero_tsb_config_1, |
| 30599 | part_0_ctx_nonzero_tsb_config_1, |
| 30600 | TTE_G = 1, |
| 30601 | TTE_Context = SCONTEXT, |
| 30602 | TTE_V = 1, |
| 30603 | TTE_Size = 3, |
| 30604 | TTE_NFO = 1, |
| 30605 | TTE_IE = 1, |
| 30606 | TTE_Soft2 = 0, |
| 30607 | TTE_Diag = 0, |
| 30608 | TTE_Soft = 0, |
| 30609 | TTE_L = 0, |
| 30610 | TTE_CP = 1, |
| 30611 | TTE_CV = 0, |
| 30612 | TTE_E = 0, |
| 30613 | TTE_P = 0, |
| 30614 | TTE_W = 1, |
| 30615 | tsbonly |
| 30616 | } |
| 30617 | |
| 30618 | |
| 30619 | attr_data { |
| 30620 | Name = .MyDATA_0, |
| 30621 | hypervisor |
| 30622 | } |
| 30623 | |
| 30624 | |
| 30625 | attr_text { |
| 30626 | Name = .MyDATA_0, |
| 30627 | hypervisor |
| 30628 | } |
| 30629 | |
| 30630 | .data |
| 30631 | .xword 0x1e63788adcefa661 |
| 30632 | .xword 0x34d068861ae48239 |
| 30633 | .xword 0xc18468fc7a78bd93 |
| 30634 | .xword 0x5bd389e46ce06542 |
| 30635 | .xword 0x94686674c5937a89 |
| 30636 | .xword 0xdd3239f4cfa82021 |
| 30637 | .xword 0x2fa2198fc232f6fe |
| 30638 | .xword 0x82c2acf32e447c83 |
| 30639 | .xword 0x3ff5bb204f707a95 |
| 30640 | .xword 0xe169367644aaf730 |
| 30641 | .xword 0xfc4fca1ebd9bea51 |
| 30642 | .xword 0x74b7ad7d6a996f8b |
| 30643 | .xword 0xb4e7d24ec472838a |
| 30644 | .xword 0xfbb4ea2005b49d1e |
| 30645 | .xword 0x9fffd6017ffc4fd9 |
| 30646 | .xword 0x2992361a09e12c3b |
| 30647 | .xword 0xdb2706e5a0aab5f2 |
| 30648 | .xword 0x79d8bbd3f1437a0e |
| 30649 | .xword 0xa7478ce0eeda9ff1 |
| 30650 | .xword 0x235fddf488ba51ba |
| 30651 | .xword 0x23d298cdf783a516 |
| 30652 | .xword 0xd3db69d588a8428a |
| 30653 | .xword 0x1ada27b4a14cd4d0 |
| 30654 | .xword 0x862d643f1ef506cb |
| 30655 | .xword 0x58a71f5fd4d997a9 |
| 30656 | .xword 0x234f2259c71c78ad |
| 30657 | .xword 0xf8e8a9cab7d794a6 |
| 30658 | .xword 0x0addea84803dd59d |
| 30659 | .xword 0x771ed93c1671e1a0 |
| 30660 | .xword 0xd535440d985d7973 |
| 30661 | .xword 0xe9dd84d4b40ee5bc |
| 30662 | .xword 0xfecabf5966323cb8 |
| 30663 | |
| 30664 | |
| 30665 | |
| 30666 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 |
| 30667 | attr_data { |
| 30668 | Name = .MyDATA_1, |
| 30669 | RA = 0x0000000170300000, |
| 30670 | PA = ra2pa(0x0000000170300000,0), |
| 30671 | part_0_ctx_zero_tsb_config_0, |
| 30672 | part_0_ctx_nonzero_tsb_config_0, |
| 30673 | TTE_G = 1, |
| 30674 | TTE_Context = PCONTEXT, |
| 30675 | TTE_V = 1, |
| 30676 | TTE_Size = 3, |
| 30677 | TTE_NFO = 0, |
| 30678 | TTE_IE = 1, |
| 30679 | TTE_Soft2 = 0, |
| 30680 | TTE_Diag = 0, |
| 30681 | TTE_Soft = 0, |
| 30682 | TTE_L = 0, |
| 30683 | TTE_CP = 0, |
| 30684 | TTE_CV = 1, |
| 30685 | TTE_E = 0, |
| 30686 | TTE_P = 0, |
| 30687 | TTE_W = 1 |
| 30688 | } |
| 30689 | |
| 30690 | |
| 30691 | attr_data { |
| 30692 | Name = .MyDATA_1, |
| 30693 | RA = 0x0000000170300000, |
| 30694 | PA = ra2pa(0x0000000170300000,0), |
| 30695 | part_0_ctx_zero_tsb_config_1, |
| 30696 | part_0_ctx_nonzero_tsb_config_1, |
| 30697 | TTE_G = 1, |
| 30698 | TTE_Context = SCONTEXT, |
| 30699 | TTE_V = 1, |
| 30700 | TTE_Size = 1, |
| 30701 | TTE_NFO = 1, |
| 30702 | TTE_IE = 1, |
| 30703 | TTE_Soft2 = 0, |
| 30704 | TTE_Diag = 0, |
| 30705 | TTE_Soft = 0, |
| 30706 | TTE_L = 0, |
| 30707 | TTE_CP = 0, |
| 30708 | TTE_CV = 1, |
| 30709 | TTE_E = 0, |
| 30710 | TTE_P = 1, |
| 30711 | TTE_W = 1, |
| 30712 | tsbonly |
| 30713 | } |
| 30714 | |
| 30715 | |
| 30716 | attr_data { |
| 30717 | Name = .MyDATA_1, |
| 30718 | hypervisor |
| 30719 | } |
| 30720 | |
| 30721 | |
| 30722 | attr_text { |
| 30723 | Name = .MyDATA_1, |
| 30724 | hypervisor |
| 30725 | } |
| 30726 | |
| 30727 | .data |
| 30728 | .xword 0x6d4854208a792ed8 |
| 30729 | .xword 0x2138b2e680ecb2ec |
| 30730 | .xword 0xd16e98392e96f03e |
| 30731 | .xword 0x05749cee4cf1dadf |
| 30732 | .xword 0xf1abc7b8b47bf6d8 |
| 30733 | .xword 0xc84500f35cfdf2f5 |
| 30734 | .xword 0xd402af0fe36bdf79 |
| 30735 | .xword 0x13c7bd8944909eac |
| 30736 | .xword 0x64462ece0af8b532 |
| 30737 | .xword 0xcddd540b541fab8d |
| 30738 | .xword 0x17bb22cfc292c26d |
| 30739 | .xword 0xc6bd66f47394734e |
| 30740 | .xword 0x5936ff40bb391b11 |
| 30741 | .xword 0x40444fc01f316936 |
| 30742 | .xword 0xaa4f1b49563fb4e5 |
| 30743 | .xword 0xc275e70b9eaf0d94 |
| 30744 | .xword 0x7547d63020035c64 |
| 30745 | .xword 0xc5740bd7a3781368 |
| 30746 | .xword 0x418b6751e95e9ccd |
| 30747 | .xword 0xf0feadc0439b2396 |
| 30748 | .xword 0x1029cefcb0acee7f |
| 30749 | .xword 0xd63f0eb7b6146e5c |
| 30750 | .xword 0xb3885c4ae4c49165 |
| 30751 | .xword 0xa9af82832704fdf8 |
| 30752 | .xword 0x2198baa1fbb6d62f |
| 30753 | .xword 0xd6f259241c632aaa |
| 30754 | .xword 0xa0d51871de981c80 |
| 30755 | .xword 0x6e8d9ab15f464237 |
| 30756 | .xword 0xa28063935bad7304 |
| 30757 | .xword 0x797a04a8f488e969 |
| 30758 | .xword 0xadc55c544ea564a8 |
| 30759 | .xword 0x1bd580b0a4318e42 |
| 30760 | |
| 30761 | |
| 30762 | |
| 30763 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 |
| 30764 | attr_data { |
| 30765 | Name = .MyDATA_2, |
| 30766 | RA = 0x0000000170500000, |
| 30767 | PA = ra2pa(0x0000000170500000,0), |
| 30768 | part_0_ctx_zero_tsb_config_0, |
| 30769 | part_0_ctx_nonzero_tsb_config_0, |
| 30770 | TTE_G = 1, |
| 30771 | TTE_Context = PCONTEXT, |
| 30772 | TTE_V = 1, |
| 30773 | TTE_Size = 1, |
| 30774 | TTE_NFO = 0, |
| 30775 | TTE_IE = 0, |
| 30776 | TTE_Soft2 = 0, |
| 30777 | TTE_Diag = 0, |
| 30778 | TTE_Soft = 0, |
| 30779 | TTE_L = 0, |
| 30780 | TTE_CP = 1, |
| 30781 | TTE_CV = 0, |
| 30782 | TTE_E = 0, |
| 30783 | TTE_P = 1, |
| 30784 | TTE_W = 0 |
| 30785 | } |
| 30786 | |
| 30787 | |
| 30788 | attr_data { |
| 30789 | Name = .MyDATA_2, |
| 30790 | RA = 0x0000000170500000, |
| 30791 | PA = ra2pa(0x0000000170500000,0), |
| 30792 | part_0_ctx_zero_tsb_config_1, |
| 30793 | part_0_ctx_nonzero_tsb_config_1, |
| 30794 | TTE_G = 1, |
| 30795 | TTE_Context = SCONTEXT, |
| 30796 | TTE_V = 1, |
| 30797 | TTE_Size = 3, |
| 30798 | TTE_NFO = 1, |
| 30799 | TTE_IE = 0, |
| 30800 | TTE_Soft2 = 0, |
| 30801 | TTE_Diag = 0, |
| 30802 | TTE_Soft = 0, |
| 30803 | TTE_L = 0, |
| 30804 | TTE_CP = 0, |
| 30805 | TTE_CV = 0, |
| 30806 | TTE_E = 1, |
| 30807 | TTE_P = 1, |
| 30808 | TTE_W = 0, |
| 30809 | tsbonly |
| 30810 | } |
| 30811 | |
| 30812 | |
| 30813 | attr_data { |
| 30814 | Name = .MyDATA_2, |
| 30815 | hypervisor |
| 30816 | } |
| 30817 | |
| 30818 | |
| 30819 | attr_text { |
| 30820 | Name = .MyDATA_2, |
| 30821 | hypervisor |
| 30822 | } |
| 30823 | |
| 30824 | .data |
| 30825 | .xword 0xa55938ca91aca3f3 |
| 30826 | .xword 0x2a88abee5a41b05d |
| 30827 | .xword 0xb20fd415def59bdd |
| 30828 | .xword 0x07288f58d55373ce |
| 30829 | .xword 0x805827c7ab5849aa |
| 30830 | .xword 0x9ccd23b4445412b8 |
| 30831 | .xword 0x48bf22eb9a6150d6 |
| 30832 | .xword 0xeef0612956b0b063 |
| 30833 | .xword 0xb55aad0b71801a4c |
| 30834 | .xword 0xe7b338447028fac2 |
| 30835 | .xword 0xf75bd6bed4639182 |
| 30836 | .xword 0xaee68e03744e2ff7 |
| 30837 | .xword 0xb1eef80ff49a66d3 |
| 30838 | .xword 0x9f2634c56ea83d95 |
| 30839 | .xword 0x8db3d9ab6440da2d |
| 30840 | .xword 0xa5dce371361c0f7c |
| 30841 | .xword 0x41cbefd9aa64e9a2 |
| 30842 | .xword 0xc0ca2a6097aae39d |
| 30843 | .xword 0xf17154a8452f7da5 |
| 30844 | .xword 0x26a1f7a8f6c72e87 |
| 30845 | .xword 0x8518a874244862b0 |
| 30846 | .xword 0xbe6f88ca81f663d6 |
| 30847 | .xword 0xf8391f5eecfa36a5 |
| 30848 | .xword 0x418e8fc0c0ae8c42 |
| 30849 | .xword 0x51fe69f1712e7d6d |
| 30850 | .xword 0x985f508c8098427a |
| 30851 | .xword 0x9cf6714bba6a0f4f |
| 30852 | .xword 0xd2cb77ff1de7a5aa |
| 30853 | .xword 0xf0d83483cf0a5e94 |
| 30854 | .xword 0x848cbb96e2e81c11 |
| 30855 | .xword 0xb2c7311fe8ec90d7 |
| 30856 | .xword 0x7d7a2f5825361fbd |
| 30857 | |
| 30858 | |
| 30859 | |
| 30860 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 |
| 30861 | attr_data { |
| 30862 | Name = .MyDATA_3, |
| 30863 | RA = 0x0000000170700000, |
| 30864 | PA = ra2pa(0x0000000170700000,0), |
| 30865 | part_0_ctx_zero_tsb_config_0, |
| 30866 | part_0_ctx_nonzero_tsb_config_0, |
| 30867 | TTE_G = 1, |
| 30868 | TTE_Context = PCONTEXT, |
| 30869 | TTE_V = 1, |
| 30870 | TTE_Size = 0, |
| 30871 | TTE_NFO = 0, |
| 30872 | TTE_IE = 0, |
| 30873 | TTE_Soft2 = 0, |
| 30874 | TTE_Diag = 0, |
| 30875 | TTE_Soft = 0, |
| 30876 | TTE_L = 0, |
| 30877 | TTE_CP = 1, |
| 30878 | TTE_CV = 1, |
| 30879 | TTE_E = 1, |
| 30880 | TTE_P = 0, |
| 30881 | TTE_W = 1 |
| 30882 | } |
| 30883 | |
| 30884 | |
| 30885 | attr_data { |
| 30886 | Name = .MyDATA_3, |
| 30887 | RA = 0x0000000170700000, |
| 30888 | PA = ra2pa(0x0000000170700000,0), |
| 30889 | part_0_ctx_zero_tsb_config_1, |
| 30890 | part_0_ctx_nonzero_tsb_config_1, |
| 30891 | TTE_G = 1, |
| 30892 | TTE_Context = SCONTEXT, |
| 30893 | TTE_V = 1, |
| 30894 | TTE_Size = 3, |
| 30895 | TTE_NFO = 1, |
| 30896 | TTE_IE = 0, |
| 30897 | TTE_Soft2 = 0, |
| 30898 | TTE_Diag = 0, |
| 30899 | TTE_Soft = 0, |
| 30900 | TTE_L = 0, |
| 30901 | TTE_CP = 0, |
| 30902 | TTE_CV = 0, |
| 30903 | TTE_E = 1, |
| 30904 | TTE_P = 0, |
| 30905 | TTE_W = 1, |
| 30906 | tsbonly |
| 30907 | } |
| 30908 | |
| 30909 | |
| 30910 | attr_data { |
| 30911 | Name = .MyDATA_3, |
| 30912 | hypervisor |
| 30913 | } |
| 30914 | |
| 30915 | |
| 30916 | attr_text { |
| 30917 | Name = .MyDATA_3, |
| 30918 | hypervisor |
| 30919 | } |
| 30920 | |
| 30921 | .data |
| 30922 | .xword 0x21adbd97c51d2b95 |
| 30923 | .xword 0x2d63b75f3a59c038 |
| 30924 | .xword 0x0b603a59e09ab365 |
| 30925 | .xword 0x5600d59825fcb6fd |
| 30926 | .xword 0x76a1e2f2c551dba1 |
| 30927 | .xword 0x8a78e3f353c1997d |
| 30928 | .xword 0x33d89d46edcb1934 |
| 30929 | .xword 0xc0dce043d97af13b |
| 30930 | .xword 0x6082f2ee3633c527 |
| 30931 | .xword 0x0812e6360706b1cd |
| 30932 | .xword 0xa5ff36a573d196ba |
| 30933 | .xword 0x6d9627e5e48d8182 |
| 30934 | .xword 0x2b240faf36cb5e50 |
| 30935 | .xword 0x415060ae72d16253 |
| 30936 | .xword 0x3413326ff35a63a1 |
| 30937 | .xword 0xc83016d3d3af2223 |
| 30938 | .xword 0x4200a45cca66c7ea |
| 30939 | .xword 0x45cc74de9e569648 |
| 30940 | .xword 0x964b23a2291672a9 |
| 30941 | .xword 0xee541c6b4cdcbd9b |
| 30942 | .xword 0x4bcd509df9eaa208 |
| 30943 | .xword 0xff237e9e49d2bec9 |
| 30944 | .xword 0xbd0de5201b070604 |
| 30945 | .xword 0x7f3259fed2ebe84f |
| 30946 | .xword 0x1959dd2258c6f7bc |
| 30947 | .xword 0x2f3741cfb863a1d3 |
| 30948 | .xword 0xba961a49c2684b0d |
| 30949 | .xword 0x9c193a8c143c9dd8 |
| 30950 | .xword 0xc14c26d7b75dd03e |
| 30951 | .xword 0xcb9cedfce57c0bff |
| 30952 | .xword 0x018782958edfa663 |
| 30953 | .xword 0x4905df69106e9628 |
| 30954 | |
| 30955 | |
| 30956 | |
| 30957 | |
| 30958 | |
| 30959 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 |
| 30960 | attr_text { |
| 30961 | Name = .MyTEXT_0, |
| 30962 | RA = 0x00000000e0200000, |
| 30963 | PA = ra2pa(0x00000000e0200000,0), |
| 30964 | part_0_ctx_zero_tsb_config_1, |
| 30965 | part_0_ctx_nonzero_tsb_config_1, |
| 30966 | TTE_G = 1, |
| 30967 | TTE_Context = PCONTEXT, |
| 30968 | TTE_V = 1, |
| 30969 | TTE_Size = 3, |
| 30970 | TTE_NFO = 0, |
| 30971 | TTE_IE = 1, |
| 30972 | TTE_Soft2 = 0, |
| 30973 | TTE_Diag = 0, |
| 30974 | TTE_Soft = 0, |
| 30975 | TTE_L = 0, |
| 30976 | TTE_CP = 0, |
| 30977 | TTE_CV = 1, |
| 30978 | TTE_E = 0, |
| 30979 | TTE_P = 1, |
| 30980 | TTE_W = 0 |
| 30981 | } |
| 30982 | |
| 30983 | .text |
| 30984 | nuff_said_0: |
| 30985 | fdivd %f0, %f4, %f4 |
| 30986 | jmpl %r27+8, %r0 |
| 30987 | fdivs %f0, %f4, %f4 |
| 30988 | |
| 30989 | |
| 30990 | |
| 30991 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 |
| 30992 | attr_text { |
| 30993 | Name = .MyTEXT_1, |
| 30994 | RA = 0x00000000e0a00000, |
| 30995 | PA = ra2pa(0x00000000e0a00000,0), |
| 30996 | part_0_ctx_zero_tsb_config_1, |
| 30997 | part_0_ctx_nonzero_tsb_config_1, |
| 30998 | TTE_G = 1, |
| 30999 | TTE_Context = PCONTEXT, |
| 31000 | TTE_V = 1, |
| 31001 | TTE_Size = 1, |
| 31002 | TTE_NFO = 0, |
| 31003 | TTE_IE = 0, |
| 31004 | TTE_Soft2 = 0, |
| 31005 | TTE_Diag = 0, |
| 31006 | TTE_Soft = 0, |
| 31007 | TTE_L = 0, |
| 31008 | TTE_CP = 0, |
| 31009 | TTE_CV = 0, |
| 31010 | TTE_E = 0, |
| 31011 | TTE_P = 1, |
| 31012 | TTE_W = 1 |
| 31013 | } |
| 31014 | |
| 31015 | .text |
| 31016 | nuff_said_1: |
| 31017 | fdivs %f0, %f4, %f6 |
| 31018 | jmpl %r27+8, %r0 |
| 31019 | fdivd %f0, %f4, %f8 |
| 31020 | |
| 31021 | |
| 31022 | |
| 31023 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 |
| 31024 | attr_text { |
| 31025 | Name = .MyTEXT_2, |
| 31026 | RA = 0x00000000e1200000, |
| 31027 | PA = ra2pa(0x00000000e1200000,0), |
| 31028 | part_0_ctx_zero_tsb_config_1, |
| 31029 | part_0_ctx_nonzero_tsb_config_1, |
| 31030 | TTE_G = 1, |
| 31031 | TTE_Context = PCONTEXT, |
| 31032 | TTE_V = 1, |
| 31033 | TTE_Size = 0, |
| 31034 | TTE_NFO = 0, |
| 31035 | TTE_IE = 0, |
| 31036 | TTE_Soft2 = 0, |
| 31037 | TTE_Diag = 0, |
| 31038 | TTE_Soft = 0, |
| 31039 | TTE_L = 0, |
| 31040 | TTE_CP = 1, |
| 31041 | TTE_CV = 0, |
| 31042 | TTE_E = 1, |
| 31043 | TTE_P = 1, |
| 31044 | TTE_W = 1 |
| 31045 | } |
| 31046 | |
| 31047 | .text |
| 31048 | nuff_said_2: |
| 31049 | fdivd %f0, %f4, %f8 |
| 31050 | jmpl %r27+8, %r0 |
| 31051 | fdivs %f0, %f4, %f4 |
| 31052 | |
| 31053 | |
| 31054 | |
| 31055 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 |
| 31056 | attr_text { |
| 31057 | Name = .MyTEXT_3, |
| 31058 | RA = 0x00000000e1a00000, |
| 31059 | PA = ra2pa(0x00000000e1a00000,0), |
| 31060 | part_0_ctx_zero_tsb_config_1, |
| 31061 | part_0_ctx_nonzero_tsb_config_1, |
| 31062 | TTE_G = 1, |
| 31063 | TTE_Context = PCONTEXT, |
| 31064 | TTE_V = 1, |
| 31065 | TTE_Size = 3, |
| 31066 | TTE_NFO = 0, |
| 31067 | TTE_IE = 1, |
| 31068 | TTE_Soft2 = 0, |
| 31069 | TTE_Diag = 0, |
| 31070 | TTE_Soft = 0, |
| 31071 | TTE_L = 0, |
| 31072 | TTE_CP = 1, |
| 31073 | TTE_CV = 1, |
| 31074 | TTE_E = 1, |
| 31075 | TTE_P = 0, |
| 31076 | TTE_W = 1 |
| 31077 | } |
| 31078 | |
| 31079 | .text |
| 31080 | nuff_said_3: |
| 31081 | fdivs %f0, %f4, %f4 |
| 31082 | jmpl %r27+8, %r0 |
| 31083 | fdivd %f0, %f4, %f8 |
| 31084 | |
| 31085 | |
| 31086 | |
| 31087 | |
| 31088 | |
| 31089 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 |
| 31090 | attr_text { |
| 31091 | Name = .VaHOLE_0, |
| 31092 | RA = 0x00000000ffffe000, |
| 31093 | PA = ra2pa(0x00000000ffffe000,0), |
| 31094 | part_0_ctx_zero_tsb_config_1, |
| 31095 | part_0_ctx_nonzero_tsb_config_1, |
| 31096 | TTE_G = 1, |
| 31097 | TTE_Context = PCONTEXT, |
| 31098 | TTE_V = 1, |
| 31099 | TTE_Size = 3, |
| 31100 | TTE_NFO = 0, |
| 31101 | TTE_IE = 1, |
| 31102 | TTE_Soft2 = 0, |
| 31103 | TTE_Diag = 0, |
| 31104 | TTE_Soft = 0, |
| 31105 | TTE_L = 0, |
| 31106 | TTE_CP = 1, |
| 31107 | TTE_CV = 1, |
| 31108 | TTE_E = 1, |
| 31109 | TTE_P = 0, |
| 31110 | TTE_W = 0, |
| 31111 | TTE_X = 1 |
| 31112 | } |
| 31113 | |
| 31114 | .text |
| 31115 | .global vahole_target0 |
| 31116 | .text |
| 31117 | .global vahole_target1 |
| 31118 | .text |
| 31119 | .global vahole_target2 |
| 31120 | .text |
| 31121 | .global vahole_target3 |
| 31122 | nop |
| 31123 | .align 4096 |
| 31124 | nop |
| 31125 | .align 2048 |
| 31126 | nop |
| 31127 | .align 1024 |
| 31128 | nop |
| 31129 | .align 512 |
| 31130 | nop |
| 31131 | .align 256 |
| 31132 | nop |
| 31133 | .align 128 |
| 31134 | nop |
| 31135 | .align 64 |
| 31136 | nop |
| 31137 | nop |
| 31138 | .align 16 |
| 31139 | nop;nop;nop |
| 31140 | vahole_target0: nop;nop |
| 31141 | vahole_target1: nop |
| 31142 | vahole_target2: nop;nop;nop |
| 31143 | vahole_target3: nop;nop;nop |
| 31144 | |
| 31145 | |
| 31146 | |
| 31147 | |
| 31148 | |
| 31149 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 |
| 31150 | attr_text { |
| 31151 | Name = .VaHOLEL_0, |
| 31152 | RA = 0x00000000ffffe000, |
| 31153 | PA = ra2pa(0x00000000ffffe000,0), |
| 31154 | part_0_ctx_zero_tsb_config_0, |
| 31155 | part_0_ctx_nonzero_tsb_config_0, |
| 31156 | TTE_G = 1, |
| 31157 | TTE_Context = PCONTEXT, |
| 31158 | TTE_V = 1, |
| 31159 | TTE_Size = 3, |
| 31160 | TTE_NFO = 0, |
| 31161 | TTE_IE = 0, |
| 31162 | TTE_Soft2 = 0, |
| 31163 | TTE_Diag = 0, |
| 31164 | TTE_Soft = 0, |
| 31165 | TTE_L = 0, |
| 31166 | TTE_CP = 0, |
| 31167 | TTE_CV = 1, |
| 31168 | TTE_E = 0, |
| 31169 | TTE_P = 0, |
| 31170 | TTE_W = 1, |
| 31171 | TTE_X = 1, |
| 31172 | tsbonly |
| 31173 | } |
| 31174 | |
| 31175 | .text |
| 31176 | nop |
| 31177 | |
| 31178 | |
| 31179 | |
| 31180 | SECTION .MASKEDHOLE TEXT_VA = 0x0000000100000000 |
| 31181 | attr_text { |
| 31182 | Name = .MASKEDHOLE, |
| 31183 | RA = 0x0000000000000000, |
| 31184 | PA = ra2pa(0x0000000000000000,0), |
| 31185 | part_0_ctx_zero_tsb_config_3, |
| 31186 | part_0_ctx_nonzero_tsb_config_3, |
| 31187 | TTE_G = 1, TTE_Context = 0x44, TTE_V = 1, TTE_Size = 1, |
| 31188 | TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, |
| 31189 | TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, |
| 31190 | TTE_E = 0, TTE_P = 0, TTE_W = 1, TTE_X = 1 |
| 31191 | tsbonly |
| 31192 | } |
| 31193 | |
| 31194 | |
| 31195 | .text |
| 31196 | nop |
| 31197 | nop |
| 31198 | jmpl %r27+8, %r0 |
| 31199 | nop |
| 31200 | nop |
| 31201 | nop |
| 31202 | nop |
| 31203 | nop |
| 31204 | |
| 31205 | |
| 31206 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 |
| 31207 | attr_text { |
| 31208 | Name = .ZERO_0, |
| 31209 | RA = 0x0000000000000000, |
| 31210 | PA = ra2pa(0x0000000000000000,0), |
| 31211 | part_0_ctx_zero_tsb_config_1, |
| 31212 | part_0_ctx_nonzero_tsb_config_1, |
| 31213 | TTE_G = 1, |
| 31214 | TTE_Context = 0x44, |
| 31215 | TTE_V = 1, |
| 31216 | TTE_Size = 0, |
| 31217 | TTE_NFO = 0, |
| 31218 | TTE_IE = 0, |
| 31219 | TTE_Soft2 = 0, |
| 31220 | TTE_Diag = 0, |
| 31221 | TTE_Soft = 0, |
| 31222 | TTE_L = 0, |
| 31223 | TTE_CP = 0, |
| 31224 | TTE_CV = 0, |
| 31225 | TTE_E = 1, |
| 31226 | TTE_P = 0, |
| 31227 | TTE_W = 1, |
| 31228 | TTE_X = 1 |
| 31229 | } |
| 31230 | |
| 31231 | |
| 31232 | .text |
| 31233 | nop |
| 31234 | nop |
| 31235 | jmpl %r27+8, %r0 |
| 31236 | nop |
| 31237 | nop |
| 31238 | nop |
| 31239 | nop |
| 31240 | nop |
| 31241 | |
| 31242 | Power_On_Reset: |
| 31243 | setx HRedmode_Reset_Handler, %g1, %g2 |
| 31244 | jmp %g2 |
| 31245 | nop |
| 31246 | .align 32 |
| 31247 | |
| 31248 | Watchdog_Reset: |
| 31249 | !setx wdog_red_ext, %g1, %g2 |
| 31250 | jmp %g2 |
| 31251 | nop |
| 31252 | .align 32 |
| 31253 | |
| 31254 | External_Reset: |
| 31255 | My_External_Reset |
| 31256 | |
| 31257 | .align 32 |
| 31258 | |
| 31259 | Software_Initiated_Reset: |
| 31260 | setx Software_Reset_Handler, %g1, %g2 |
| 31261 | jmp %g2 |
| 31262 | nop |
| 31263 | |
| 31264 | .align 32 |
| 31265 | |
| 31266 | RED_Mode_Other_Reset: |
| 31267 | setx red_other_ext, %g1, %g2 |
| 31268 | jmp %g2 |
| 31269 | nop |
| 31270 | |
| 31271 | |
| 31272 | |
| 31273 | |
| 31274 | |
| 31275 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 |
| 31276 | attr_text { |
| 31277 | Name = .VAHOLE_PA_0, |
| 31278 | hypervisor |
| 31279 | } |
| 31280 | |
| 31281 | nop |
| 31282 | .align 4096 |
| 31283 | nop |
| 31284 | .align 2048 |
| 31285 | nop |
| 31286 | .align 1024 |
| 31287 | nop |
| 31288 | .align 512 |
| 31289 | nop |
| 31290 | .align 256 |
| 31291 | nop |
| 31292 | .align 128 |
| 31293 | nop |
| 31294 | .align 64 |
| 31295 | nop |
| 31296 | nop |
| 31297 | .align 16 |
| 31298 | nop;nop;nop |
| 31299 | nop |
| 31300 | nop |
| 31301 | jmpl %r27+8, %r0 |
| 31302 | nop |
| 31303 | nop |
| 31304 | nop |
| 31305 | jmpl %r27+8, %r0 |
| 31306 | nop |
| 31307 | |
| 31308 | |
| 31309 | |
| 31310 | #if 0 |
| 31311 | #endif |
| 31312 | |
| 31313 | |