| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: fc_dmupeu_csr_probe.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
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| 28 | // otherwise unspecified. |
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| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | `include "fc.vh" |
| 36 | `include "defines.vh" |
| 37 | |
| 38 | module fc_dmupeu_csr_probe; |
| 39 | |
| 40 | reg [1:0] state; |
| 41 | integer dmupeu_csr; |
| 42 | |
| 43 | parameter IDLE = 0, DATA1 = 1, DATA2 = 2; |
| 44 | |
| 45 | wire clk = `DMU.l1clk; |
| 46 | wire rst_ = `DMU.wmr_; |
| 47 | wire [`FIRE_CSR_CMND_BITS] cmd; |
| 48 | reg [`FIRE_CSR_DATA_BITS] data; |
| 49 | reg [`FIRE_CSR_ADDR_BITS] addr; |
| 50 | reg [63:0] nas_addr; |
| 51 | wire [`FIRE_CSR_RING_BITS] csr_ring_in = `DMU.d2j_csr_ring_in; |
| 52 | |
| 53 | assign cmd = csr_ring_in[`FIRE_CSR_RING_CMND_BITS]; |
| 54 | |
| 55 | wire vld_read_rsp = (cmd == `FIRE_CSR_CMND_RRSP) ; |
| 56 | wire req_vld = (cmd != `FIRE_CSR_CMND_IDLE) ; |
| 57 | |
| 58 | always @ (negedge clk or negedge rst_) begin |
| 59 | if (rst_ !== 1'b1) begin |
| 60 | state = IDLE; |
| 61 | data = {`FIRE_CSR_DATA_WIDTH{1'b0}}; |
| 62 | addr = {`FIRE_CSR_ADDR_MAX_WIDTH{1'b1}}; |
| 63 | end |
| 64 | else begin |
| 65 | case (state) |
| 66 | IDLE: begin |
| 67 | if(req_vld) begin |
| 68 | if(vld_read_rsp) begin |
| 69 | addr = csr_ring_in[`FIRE_CSR_RING_ADDR_BITS]; |
| 70 | end |
| 71 | state = DATA1; |
| 72 | end |
| 73 | end |
| 74 | |
| 75 | DATA1: begin |
| 76 | data[`FIRE_CSR_RDMS_BITS] = csr_ring_in; |
| 77 | state = DATA2; |
| 78 | end |
| 79 | |
| 80 | DATA2: begin |
| 81 | data[`FIRE_CSR_RDLS_BITS] = csr_ring_in; |
| 82 | state = IDLE; |
| 83 | |
| 84 | if (`PARGS.nas_check_on && `PARGS.soc_sync_on && addr != 27'h7ffffff) begin |
| 85 | nas_addr = {24'h0, 8'h88, 2'h0, addr, 3'b000}; |
| 86 | `PR_INFO ("dmupeu_csr_probe", `INFO, "ts=%0d DMU/PEU CSR READ RETURN: address %x data %x ", |
| 87 | `TOP.core_cycle_cnt-1, nas_addr, data); |
| 88 | dmupeu_csr = $sim_send(`PLI_CSR_READ, nas_addr, data, 8'h0); |
| 89 | end |
| 90 | addr = {`FIRE_CSR_ADDR_MAX_WIDTH{1'b1}}; |
| 91 | end |
| 92 | |
| 93 | default: |
| 94 | `PR_ERROR("dmupeu_csr_probe", `ERROR, "ts=%0d illegal state=%x", `TOP.core_cycle_cnt-1, state); |
| 95 | |
| 96 | endcase // case(state) |
| 97 | end // else: !if(!`DMU.wmr_) |
| 98 | end // always @ (negedge `DMU.l1clk or negedge `DMU.wmr_) |
| 99 | |
| 100 | endmodule // fc_dmupeu_csr_probe |