| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: ncu_i2cfcd_ctl.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module ncu_i2cfcd_ctl ( |
| 36 | cmp_io_sync_en, |
| 37 | cpx_ncu_grant_cx, |
| 38 | intbuf_dout, |
| 39 | iobuf_dout, |
| 40 | iobuf_tail_s, |
| 41 | io_cmp_sync_en, |
| 42 | l2clk, |
| 43 | scan_in, |
| 44 | tcu_clk_stop, |
| 45 | tcu_pce_ov, |
| 46 | tcu_scan_en, |
| 47 | tcu_aclk, |
| 48 | tcu_bclk, |
| 49 | mb0_raddr, |
| 50 | mb0_waddr, |
| 51 | mb0_intbuf_wr_en, |
| 52 | mb0_intbuf_rd_en, |
| 53 | mb0_iobuf_rd_en, |
| 54 | mb0_run, |
| 55 | intbuf_head_ptr, |
| 56 | intbuf_hit_hwm, |
| 57 | intbuf_tail_ptr, |
| 58 | intbuf_wr2i2c, |
| 59 | intbuf_rden, |
| 60 | iobuf_head_f, |
| 61 | iobuf_head_ptr, |
| 62 | iobuf_rden, |
| 63 | ncu_cpx_data_ca, |
| 64 | ncu_cpx_req_cq, |
| 65 | scan_out, |
| 66 | iobuf_ue_f, |
| 67 | iobuf_uei, |
| 68 | intbuf_ue_f, |
| 69 | intbuf_uei) ; |
| 70 | wire intbuf_sel_next; |
| 71 | wire iobuf_sel_next; |
| 72 | wire intbuf_rd; |
| 73 | wire iobuf_rd; |
| 74 | wire iobuf_vld; |
| 75 | wire io_pa_ld; |
| 76 | wire io_pas; |
| 77 | wire intbuf_vld; |
| 78 | wire int_pa_ld; |
| 79 | wire int_pas; |
| 80 | wire ncu_i2cfc_ctl_scanin; |
| 81 | wire ncu_i2cfc_ctl_scanout; |
| 82 | wire [7:0] intbuf_cpx_req; |
| 83 | wire [7:0] iobuf_cpx_req; |
| 84 | wire [7:0] ncu_cpx_req_next; |
| 85 | wire intbuf_dout_d1_ue; |
| 86 | wire iobuf_dout_d1_ue; |
| 87 | wire ncu_i2cfd_ctl_scanin; |
| 88 | wire ncu_i2cfd_ctl_scanout; |
| 89 | |
| 90 | |
| 91 | input cmp_io_sync_en; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 92 | input [7:0] cpx_ncu_grant_cx; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 93 | input [143:0] intbuf_dout; // To ncu_i2cfd_ctl of ncu_i2cfd_ctl.v |
| 94 | input [175:0] iobuf_dout; // To ncu_i2cfd_ctl of ncu_i2cfd_ctl.v |
| 95 | input [5:0] iobuf_tail_s; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 96 | input io_cmp_sync_en; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 97 | input l2clk; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 98 | input scan_in; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 99 | input tcu_clk_stop; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 100 | input tcu_pce_ov; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 101 | input tcu_scan_en; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 102 | input tcu_aclk; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 103 | input tcu_bclk; // To ncu_i2cfc_ctl of ncu_i2cfc_ctl.v, ... |
| 104 | input [4:0] mb0_raddr; |
| 105 | input [4:0] mb0_waddr; |
| 106 | input mb0_intbuf_wr_en; |
| 107 | input mb0_intbuf_rd_en; |
| 108 | input mb0_iobuf_rd_en; |
| 109 | input mb0_run; |
| 110 | |
| 111 | |
| 112 | output [4:0] intbuf_head_ptr; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 113 | output intbuf_hit_hwm; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 114 | output [4:0] intbuf_tail_ptr; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 115 | input intbuf_wr2i2c; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 116 | output intbuf_rden; |
| 117 | output [5:0] iobuf_head_f; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 118 | output [4:0] iobuf_head_ptr; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 119 | output iobuf_rden; // From ncu_i2cfc_ctl of ncu_i2cfc_ctl.v |
| 120 | output [145:0] ncu_cpx_data_ca; // From ncu_i2cfd_ctl of ncu_i2cfd_ctl.v |
| 121 | output [7:0] ncu_cpx_req_cq; // From ncu_i2cfd_ctl of ncu_i2cfd_ctl.v |
| 122 | output scan_out; // From ncu_i2cfd_ctl of ncu_i2cfd_ctl.v |
| 123 | |
| 124 | output iobuf_ue_f; |
| 125 | input iobuf_uei; |
| 126 | output intbuf_ue_f; |
| 127 | input intbuf_uei; |
| 128 | |
| 129 | /*AUTOWIRE*/ |
| 130 | // Beginning of automatic wires (for undeclared instantiated-module outputs) |
| 131 | // End of automatics |
| 132 | |
| 133 | |
| 134 | ///* ncu_i2cfc_ctl auto_template ( |
| 135 | // .scan_out() ); */ |
| 136 | ncu_i2cfc_ctl ncu_i2cfc_ctl ( /*AUTOINST*/ |
| 137 | // Outputs |
| 138 | .intbuf_sel_next(intbuf_sel_next), |
| 139 | .iobuf_sel_next(iobuf_sel_next), |
| 140 | .intbuf_rd (intbuf_rd), |
| 141 | .iobuf_rd (iobuf_rd), |
| 142 | .iobuf_vld (iobuf_vld), |
| 143 | .io_pa_ld (io_pa_ld), |
| 144 | .io_pas (io_pas), |
| 145 | .intbuf_vld(intbuf_vld), |
| 146 | .int_pa_ld (int_pa_ld), |
| 147 | .int_pas (int_pas), |
| 148 | .intbuf_hit_hwm(intbuf_hit_hwm), |
| 149 | .iobuf_head_f(iobuf_head_f[5:0]), |
| 150 | .intbuf_tail_ptr(intbuf_tail_ptr[4:0]), |
| 151 | .intbuf_head_ptr(intbuf_head_ptr[4:0]), |
| 152 | .iobuf_head_ptr(iobuf_head_ptr[4:0]), |
| 153 | .iobuf_rden(iobuf_rden), |
| 154 | .intbuf_rden(intbuf_rden), |
| 155 | // Inputs |
| 156 | .scan_in(ncu_i2cfc_ctl_scanin), |
| 157 | .scan_out(ncu_i2cfc_ctl_scanout), |
| 158 | .l2clk (l2clk), |
| 159 | .cmp_io_sync_en(cmp_io_sync_en), |
| 160 | .io_cmp_sync_en(io_cmp_sync_en), |
| 161 | .tcu_pce_ov(tcu_pce_ov), |
| 162 | .tcu_clk_stop(tcu_clk_stop), |
| 163 | .tcu_scan_en(tcu_scan_en), |
| 164 | .tcu_aclk (tcu_aclk), |
| 165 | .tcu_bclk (tcu_bclk), |
| 166 | .cpx_ncu_grant_cx(cpx_ncu_grant_cx[7:0]), |
| 167 | .intbuf_cpx_req(intbuf_cpx_req[7:0]), |
| 168 | .iobuf_cpx_req(iobuf_cpx_req[7:0]), |
| 169 | .ncu_cpx_req_next(ncu_cpx_req_next[7:0]), |
| 170 | .iobuf_tail_s(iobuf_tail_s[5:0]), |
| 171 | .intbuf_wr2i2c(intbuf_wr2i2c), |
| 172 | .mb0_raddr (mb0_raddr[4:0]), |
| 173 | .mb0_waddr (mb0_waddr[4:0]), |
| 174 | .mb0_run(mb0_run), |
| 175 | .mb0_intbuf_rd_en(mb0_intbuf_rd_en), |
| 176 | .mb0_iobuf_rd_en(mb0_iobuf_rd_en), |
| 177 | .intbuf_dout_d1_ue(intbuf_dout_d1_ue), |
| 178 | .iobuf_dout_d1_ue(iobuf_dout_d1_ue) ); |
| 179 | |
| 180 | |
| 181 | |
| 182 | ///* ncu_i2cfd_ctl auto_template ( |
| 183 | // .scan_out() ); */ |
| 184 | ncu_i2cfd_ctl ncu_i2cfd_ctl ( /*AUTOINST*/ |
| 185 | // Outputs |
| 186 | .ncu_cpx_req_cq(ncu_cpx_req_cq[7:0]), |
| 187 | .ncu_cpx_data_ca(ncu_cpx_data_ca[145:0]), |
| 188 | .intbuf_cpx_req(intbuf_cpx_req[7:0]), |
| 189 | .iobuf_cpx_req(iobuf_cpx_req[7:0]), |
| 190 | .ncu_cpx_req_next(ncu_cpx_req_next[7:0]), |
| 191 | .iobuf_ue_f(iobuf_ue_f), |
| 192 | .intbuf_ue_f(intbuf_ue_f), |
| 193 | .intbuf_dout_d1_ue(intbuf_dout_d1_ue), |
| 194 | .iobuf_dout_d1_ue(iobuf_dout_d1_ue), |
| 195 | // Inputs |
| 196 | .scan_in(ncu_i2cfd_ctl_scanin), |
| 197 | .scan_out(ncu_i2cfd_ctl_scanout), |
| 198 | .l2clk (l2clk), |
| 199 | .cmp_io_sync_en(cmp_io_sync_en), |
| 200 | .io_cmp_sync_en(io_cmp_sync_en), |
| 201 | .tcu_pce_ov(tcu_pce_ov), |
| 202 | .tcu_clk_stop(tcu_clk_stop), |
| 203 | .tcu_scan_en(tcu_scan_en), |
| 204 | .tcu_aclk (tcu_aclk), |
| 205 | .tcu_bclk (tcu_bclk), |
| 206 | .intbuf_sel_next(intbuf_sel_next), |
| 207 | .iobuf_sel_next(iobuf_sel_next), |
| 208 | .intbuf_rd (intbuf_rd), |
| 209 | .iobuf_rd (iobuf_rd), |
| 210 | .iobuf_vld (iobuf_vld), |
| 211 | .io_pa_ld (io_pa_ld), |
| 212 | .io_pas (io_pas), |
| 213 | .intbuf_vld(intbuf_vld), |
| 214 | .int_pa_ld (int_pa_ld), |
| 215 | .int_pas (int_pas), |
| 216 | .intbuf_dout(intbuf_dout[143:0]), |
| 217 | .iobuf_dout(iobuf_dout[175:0]), |
| 218 | .iobuf_uei (iobuf_uei), |
| 219 | .intbuf_uei(intbuf_uei) |
| 220 | ); |
| 221 | |
| 222 | |
| 223 | |
| 224 | |
| 225 | // fixscan start: |
| 226 | assign ncu_i2cfc_ctl_scanin = scan_in ; |
| 227 | assign ncu_i2cfd_ctl_scanin = ncu_i2cfc_ctl_scanout ; |
| 228 | assign scan_out = ncu_i2cfd_ctl_scanout ; |
| 229 | // fixscan end: |
| 230 | endmodule |
| 231 | |
| 232 | |
| 233 | |
| 234 | // any PARAMS parms go into naming of macro |
| 235 | |
| 236 | module ncu_i2cfcd_ctl_msff_ctl_macro__width_8 ( |
| 237 | din, |
| 238 | l1clk, |
| 239 | scan_in, |
| 240 | siclk, |
| 241 | soclk, |
| 242 | dout, |
| 243 | scan_out); |
| 244 | wire [7:0] fdin; |
| 245 | wire [6:0] so; |
| 246 | |
| 247 | input [7:0] din; |
| 248 | input l1clk; |
| 249 | input scan_in; |
| 250 | |
| 251 | |
| 252 | input siclk; |
| 253 | input soclk; |
| 254 | |
| 255 | output [7:0] dout; |
| 256 | output scan_out; |
| 257 | assign fdin[7:0] = din[7:0]; |
| 258 | |
| 259 | |
| 260 | |
| 261 | |
| 262 | |
| 263 | |
| 264 | dff #(8) d0_0 ( |
| 265 | .l1clk(l1clk), |
| 266 | .siclk(siclk), |
| 267 | .soclk(soclk), |
| 268 | .d(fdin[7:0]), |
| 269 | .si({scan_in,so[6:0]}), |
| 270 | .so({so[6:0],scan_out}), |
| 271 | .q(dout[7:0]) |
| 272 | ); |
| 273 | |
| 274 | |
| 275 | |
| 276 | |
| 277 | |
| 278 | |
| 279 | |
| 280 | |
| 281 | |
| 282 | |
| 283 | |
| 284 | |
| 285 | endmodule |
| 286 | |
| 287 | |
| 288 | |
| 289 | |
| 290 | |
| 291 | |
| 292 | |
| 293 | |
| 294 | |
| 295 | |
| 296 | |
| 297 | |
| 298 | |
| 299 | // any PARAMS parms go into naming of macro |
| 300 | |
| 301 | module ncu_i2cfcd_ctl_msff_ctl_macro__width_2 ( |
| 302 | din, |
| 303 | l1clk, |
| 304 | scan_in, |
| 305 | siclk, |
| 306 | soclk, |
| 307 | dout, |
| 308 | scan_out); |
| 309 | wire [1:0] fdin; |
| 310 | wire [0:0] so; |
| 311 | |
| 312 | input [1:0] din; |
| 313 | input l1clk; |
| 314 | input scan_in; |
| 315 | |
| 316 | |
| 317 | input siclk; |
| 318 | input soclk; |
| 319 | |
| 320 | output [1:0] dout; |
| 321 | output scan_out; |
| 322 | assign fdin[1:0] = din[1:0]; |
| 323 | |
| 324 | |
| 325 | |
| 326 | |
| 327 | |
| 328 | |
| 329 | dff #(2) d0_0 ( |
| 330 | .l1clk(l1clk), |
| 331 | .siclk(siclk), |
| 332 | .soclk(soclk), |
| 333 | .d(fdin[1:0]), |
| 334 | .si({scan_in,so[0:0]}), |
| 335 | .so({so[0:0],scan_out}), |
| 336 | .q(dout[1:0]) |
| 337 | ); |
| 338 | |
| 339 | |
| 340 | |
| 341 | |
| 342 | |
| 343 | |
| 344 | |
| 345 | |
| 346 | |
| 347 | |
| 348 | |
| 349 | |
| 350 | endmodule |
| 351 | |
| 352 | |
| 353 | |
| 354 | |
| 355 | |
| 356 | |
| 357 | |
| 358 | |
| 359 | |
| 360 | |
| 361 | |
| 362 | |
| 363 | |
| 364 | // any PARAMS parms go into naming of macro |
| 365 | |
| 366 | module ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_6 ( |
| 367 | din, |
| 368 | en, |
| 369 | l1clk, |
| 370 | scan_in, |
| 371 | siclk, |
| 372 | soclk, |
| 373 | dout, |
| 374 | scan_out); |
| 375 | wire [5:0] fdin; |
| 376 | wire [4:0] so; |
| 377 | |
| 378 | input [5:0] din; |
| 379 | input en; |
| 380 | input l1clk; |
| 381 | input scan_in; |
| 382 | |
| 383 | |
| 384 | input siclk; |
| 385 | input soclk; |
| 386 | |
| 387 | output [5:0] dout; |
| 388 | output scan_out; |
| 389 | assign fdin[5:0] = (din[5:0] & {6{en}}) | (dout[5:0] & ~{6{en}}); |
| 390 | |
| 391 | |
| 392 | |
| 393 | |
| 394 | |
| 395 | |
| 396 | dff #(6) d0_0 ( |
| 397 | .l1clk(l1clk), |
| 398 | .siclk(siclk), |
| 399 | .soclk(soclk), |
| 400 | .d(fdin[5:0]), |
| 401 | .si({scan_in,so[4:0]}), |
| 402 | .so({so[4:0],scan_out}), |
| 403 | .q(dout[5:0]) |
| 404 | ); |
| 405 | |
| 406 | |
| 407 | |
| 408 | |
| 409 | |
| 410 | |
| 411 | |
| 412 | |
| 413 | |
| 414 | |
| 415 | |
| 416 | |
| 417 | endmodule |
| 418 | |
| 419 | |
| 420 | |
| 421 | |
| 422 | |
| 423 | |
| 424 | |
| 425 | |
| 426 | |
| 427 | |
| 428 | |
| 429 | |
| 430 | |
| 431 | // any PARAMS parms go into naming of macro |
| 432 | |
| 433 | module ncu_i2cfcd_ctl_msff_ctl_macro__width_6 ( |
| 434 | din, |
| 435 | l1clk, |
| 436 | scan_in, |
| 437 | siclk, |
| 438 | soclk, |
| 439 | dout, |
| 440 | scan_out); |
| 441 | wire [5:0] fdin; |
| 442 | wire [4:0] so; |
| 443 | |
| 444 | input [5:0] din; |
| 445 | input l1clk; |
| 446 | input scan_in; |
| 447 | |
| 448 | |
| 449 | input siclk; |
| 450 | input soclk; |
| 451 | |
| 452 | output [5:0] dout; |
| 453 | output scan_out; |
| 454 | assign fdin[5:0] = din[5:0]; |
| 455 | |
| 456 | |
| 457 | |
| 458 | |
| 459 | |
| 460 | |
| 461 | dff #(6) d0_0 ( |
| 462 | .l1clk(l1clk), |
| 463 | .siclk(siclk), |
| 464 | .soclk(soclk), |
| 465 | .d(fdin[5:0]), |
| 466 | .si({scan_in,so[4:0]}), |
| 467 | .so({so[4:0],scan_out}), |
| 468 | .q(dout[5:0]) |
| 469 | ); |
| 470 | |
| 471 | |
| 472 | |
| 473 | |
| 474 | |
| 475 | |
| 476 | |
| 477 | |
| 478 | |
| 479 | |
| 480 | |
| 481 | |
| 482 | endmodule |
| 483 | |
| 484 | |
| 485 | |
| 486 | |
| 487 | |
| 488 | |
| 489 | |
| 490 | |
| 491 | |
| 492 | |
| 493 | |
| 494 | |
| 495 | |
| 496 | // any PARAMS parms go into naming of macro |
| 497 | |
| 498 | module ncu_i2cfcd_ctl_msff_ctl_macro__width_1 ( |
| 499 | din, |
| 500 | l1clk, |
| 501 | scan_in, |
| 502 | siclk, |
| 503 | soclk, |
| 504 | dout, |
| 505 | scan_out); |
| 506 | wire [0:0] fdin; |
| 507 | |
| 508 | input [0:0] din; |
| 509 | input l1clk; |
| 510 | input scan_in; |
| 511 | |
| 512 | |
| 513 | input siclk; |
| 514 | input soclk; |
| 515 | |
| 516 | output [0:0] dout; |
| 517 | output scan_out; |
| 518 | assign fdin[0:0] = din[0:0]; |
| 519 | |
| 520 | |
| 521 | |
| 522 | |
| 523 | |
| 524 | |
| 525 | dff #(1) d0_0 ( |
| 526 | .l1clk(l1clk), |
| 527 | .siclk(siclk), |
| 528 | .soclk(soclk), |
| 529 | .d(fdin[0:0]), |
| 530 | .si(scan_in), |
| 531 | .so(scan_out), |
| 532 | .q(dout[0:0]) |
| 533 | ); |
| 534 | |
| 535 | |
| 536 | |
| 537 | |
| 538 | |
| 539 | |
| 540 | |
| 541 | |
| 542 | |
| 543 | |
| 544 | |
| 545 | |
| 546 | endmodule |
| 547 | |
| 548 | |
| 549 | |
| 550 | |
| 551 | |
| 552 | |
| 553 | |
| 554 | |
| 555 | |
| 556 | |
| 557 | |
| 558 | |
| 559 | |
| 560 | // any PARAMS parms go into naming of macro |
| 561 | |
| 562 | module ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 ( |
| 563 | din, |
| 564 | en, |
| 565 | l1clk, |
| 566 | scan_in, |
| 567 | siclk, |
| 568 | soclk, |
| 569 | dout, |
| 570 | scan_out); |
| 571 | wire [0:0] fdin; |
| 572 | |
| 573 | input [0:0] din; |
| 574 | input en; |
| 575 | input l1clk; |
| 576 | input scan_in; |
| 577 | |
| 578 | |
| 579 | input siclk; |
| 580 | input soclk; |
| 581 | |
| 582 | output [0:0] dout; |
| 583 | output scan_out; |
| 584 | assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}}); |
| 585 | |
| 586 | |
| 587 | |
| 588 | |
| 589 | |
| 590 | |
| 591 | dff #(1) d0_0 ( |
| 592 | .l1clk(l1clk), |
| 593 | .siclk(siclk), |
| 594 | .soclk(soclk), |
| 595 | .d(fdin[0:0]), |
| 596 | .si(scan_in), |
| 597 | .so(scan_out), |
| 598 | .q(dout[0:0]) |
| 599 | ); |
| 600 | |
| 601 | |
| 602 | |
| 603 | |
| 604 | |
| 605 | |
| 606 | |
| 607 | |
| 608 | |
| 609 | |
| 610 | |
| 611 | |
| 612 | endmodule |
| 613 | |
| 614 | |
| 615 | |
| 616 | |
| 617 | |
| 618 | |
| 619 | |
| 620 | |
| 621 | |
| 622 | |
| 623 | |
| 624 | |
| 625 | |
| 626 | // any PARAMS parms go into naming of macro |
| 627 | |
| 628 | module ncu_i2cfcd_ctl_l1clkhdr_ctl_macro ( |
| 629 | l2clk, |
| 630 | l1en, |
| 631 | pce_ov, |
| 632 | stop, |
| 633 | se, |
| 634 | l1clk); |
| 635 | |
| 636 | |
| 637 | input l2clk; |
| 638 | input l1en; |
| 639 | input pce_ov; |
| 640 | input stop; |
| 641 | input se; |
| 642 | output l1clk; |
| 643 | |
| 644 | |
| 645 | |
| 646 | |
| 647 | |
| 648 | cl_sc1_l1hdr_8x c_0 ( |
| 649 | |
| 650 | |
| 651 | .l2clk(l2clk), |
| 652 | .pce(l1en), |
| 653 | .l1clk(l1clk), |
| 654 | .se(se), |
| 655 | .pce_ov(pce_ov), |
| 656 | .stop(stop) |
| 657 | ); |
| 658 | |
| 659 | |
| 660 | |
| 661 | endmodule |
| 662 | |
| 663 | |
| 664 | |
| 665 | |
| 666 | |
| 667 | |
| 668 | |
| 669 | |
| 670 | |
| 671 | |
| 672 | |
| 673 | |
| 674 | `define RF_RDEN_OFFSTATE 1'b1 |
| 675 | |
| 676 | //==================================== |
| 677 | `define NCU_INTMANRF_DEPTH 128 |
| 678 | `define NCU_INTMANRF_DATAWIDTH 16 |
| 679 | `define NCU_INTMANRF_ADDRWIDTH 7 |
| 680 | //==================================== |
| 681 | |
| 682 | //==================================== |
| 683 | `define NCU_MONDORF_DEPTH 64 |
| 684 | `define NCU_MONDORF_DATAWIDTH 72 |
| 685 | `define NCU_MONDORF_ADDRWIDTH 6 |
| 686 | //==================================== |
| 687 | |
| 688 | //==================================== |
| 689 | `define NCU_CPUBUFRF_DEPTH 32 |
| 690 | `define NCU_CPUBUFRF_DATAWIDTH 144 |
| 691 | `define NCU_CPUBUFRF_ADDRWIDTH 5 |
| 692 | //==================================== |
| 693 | |
| 694 | //==================================== |
| 695 | `define NCU_IOBUFRF_DEPTH 32 |
| 696 | `define NCU_IOBUFRF_DATAWIDTH 144 |
| 697 | `define NCU_IOBUFRF_ADDRWIDTH 5 |
| 698 | //==================================== |
| 699 | |
| 700 | //==================================== |
| 701 | `define NCU_IOBUF1RF_DEPTH 32 |
| 702 | `define NCU_IOBUF1RF_DATAWIDTH 32 |
| 703 | `define NCU_IOBUF1RF_ADDRWIDTH 5 |
| 704 | //==================================== |
| 705 | |
| 706 | //==================================== |
| 707 | `define NCU_INTBUFRF_DEPTH 32 |
| 708 | `define NCU_INTBUFRF_DATAWIDTH 144 |
| 709 | `define NCU_INTBUFRF_ADDRWIDTH 5 |
| 710 | //==================================== |
| 711 | |
| 712 | //== fix me : need to remove when warm // |
| 713 | //== becomes available // |
| 714 | `define WMR_LENGTH 10'd999 |
| 715 | `define WMR_LENGTH_P1 10'd1000 |
| 716 | |
| 717 | //// NCU CSR_MAN address 80_0000_xxxx //// |
| 718 | `define NCU_CSR_MAN 16'h0000 |
| 719 | `define NCU_CREG_INTMAN 16'h0000 |
| 720 | //`define NCU_CREG_INTVECDISP 16'h0800 |
| 721 | `define NCU_CREG_MONDOINVEC 16'h0a00 |
| 722 | `define NCU_CREG_SERNUM 16'h1000 |
| 723 | `define NCU_CREG_FUSESTAT 16'h1008 |
| 724 | `define NCU_CREG_COREAVAIL 16'h1010 |
| 725 | `define NCU_CREG_BANKAVAIL 16'h1018 |
| 726 | `define NCU_CREG_BANK_ENABLE 16'h1020 |
| 727 | `define NCU_CREG_BANK_ENABLE_STATUS 16'h1028 |
| 728 | `define NCU_CREG_L2_HASH_ENABLE 16'h1030 |
| 729 | `define NCU_CREG_L2_HASH_ENABLE_STATUS 16'h1038 |
| 730 | |
| 731 | |
| 732 | `define NCU_CREG_MEM32_BASE 16'h2000 |
| 733 | `define NCU_CREG_MEM32_MASK 16'h2008 |
| 734 | `define NCU_CREG_MEM64_BASE 16'h2010 |
| 735 | `define NCU_CREG_MEM64_MASK 16'h2018 |
| 736 | `define NCU_CREG_IOCON_BASE 16'h2020 |
| 737 | `define NCU_CREG_IOCON_MASK 16'h2028 |
| 738 | `define NCU_CREG_MMUFSH 16'h2030 |
| 739 | |
| 740 | `define NCU_CREG_ESR 16'h3000 |
| 741 | `define NCU_CREG_ELE 16'h3008 |
| 742 | `define NCU_CREG_EIE 16'h3010 |
| 743 | `define NCU_CREG_EJR 16'h3018 |
| 744 | `define NCU_CREG_FEE 16'h3020 |
| 745 | `define NCU_CREG_PER 16'h3028 |
| 746 | `define NCU_CREG_SIISYN 16'h3030 |
| 747 | `define NCU_CREG_NCUSYN 16'h3038 |
| 748 | `define NCU_CREG_SCKSEL 16'h3040 |
| 749 | `define NCU_CREG_DBGTRIG_EN 16'h4000 |
| 750 | |
| 751 | //// NUC CSR_MONDO address 80_0004_xxxx //// |
| 752 | `define NCU_CSR_MONDO 16'h0004 |
| 753 | `define NCU_CREG_MDATA0 16'h0000 |
| 754 | `define NCU_CREG_MDATA1 16'h0200 |
| 755 | `define NCU_CREG_MDATA0_ALIAS 16'h0400 |
| 756 | `define NCU_CREG_MDATA1_ALIAS 16'h0600 |
| 757 | `define NCU_CREG_MBUSY 16'h0800 |
| 758 | `define NCU_CREG_MBUSY_ALIAS 16'h0a00 |
| 759 | |
| 760 | |
| 761 | |
| 762 | // ASI shared reg 90_xxxx_xxxx// |
| 763 | `define NCU_ASI_A_HIT 10'h104 // 6-bits cpuid and thread id are "x" |
| 764 | `define NCU_ASI_B_HIT 10'h1CC // 6-bits cpuid and thread id are "x" |
| 765 | `define NCU_ASI_C_HIT 10'h114 // 6-bits cpuid and thread id are "x" |
| 766 | `define NCU_ASI_COREAVAIL 16'h0000 |
| 767 | `define NCU_ASI_CORE_ENABLE_STATUS 16'h0010 |
| 768 | `define NCU_ASI_CORE_ENABLE 16'h0020 |
| 769 | `define NCU_ASI_XIR_STEERING 16'h0030 |
| 770 | `define NCU_ASI_CORE_RUNNINGRW 16'h0050 |
| 771 | `define NCU_ASI_CORE_RUNNING_STATUS 16'h0058 |
| 772 | `define NCU_ASI_CORE_RUNNING_W1S 16'h0060 |
| 773 | `define NCU_ASI_CORE_RUNNING_W1C 16'h0068 |
| 774 | `define NCU_ASI_INTVECDISP 16'h0000 |
| 775 | `define NCU_ASI_ERR_STR 16'h1000 |
| 776 | `define NCU_ASI_WMR_VEC_MASK 16'h0018 |
| 777 | `define NCU_ASI_CMP_TICK_ENABLE 16'h0038 |
| 778 | |
| 779 | |
| 780 | //// UCB packet type //// |
| 781 | `define UCB_READ_NACK 4'b0000 // ack/nack types |
| 782 | `define UCB_READ_ACK 4'b0001 |
| 783 | `define UCB_WRITE_ACK 4'b0010 |
| 784 | `define UCB_IFILL_ACK 4'b0011 |
| 785 | `define UCB_IFILL_NACK 4'b0111 |
| 786 | |
| 787 | `define UCB_READ_REQ 4'b0100 // req types |
| 788 | `define UCB_WRITE_REQ 4'b0101 |
| 789 | `define UCB_IFILL_REQ 4'b0110 |
| 790 | |
| 791 | `define UCB_INT 4'b1000 // plain interrupt |
| 792 | `define UCB_INT_VEC 4'b1100 // interrupt with vector |
| 793 | `define UCB_INT_SOC_UE 4'b1001 // soc interrup ue |
| 794 | `define UCB_INT_SOC_CE 4'b1010 // soc interrup ce |
| 795 | `define UCB_RESET_VEC 4'b0101 // reset with vector |
| 796 | `define UCB_IDLE_VEC 4'b1110 // idle with vector |
| 797 | `define UCB_RESUME_VEC 4'b1111 // resume with vector |
| 798 | |
| 799 | `define UCB_INT_SOC 4'b1101 // soc interrup ce |
| 800 | |
| 801 | |
| 802 | //// PCX packet type //// |
| 803 | `define PCX_LOAD_RQ 5'b00000 |
| 804 | `define PCX_IMISS_RQ 5'b10000 |
| 805 | `define PCX_STORE_RQ 5'b00001 |
| 806 | `define PCX_FWD_RQs 5'b01101 |
| 807 | `define PCX_FWD_RPYs 5'b01110 |
| 808 | |
| 809 | //// CPX packet type //// |
| 810 | //`define CPX_LOAD_RET 4'b0000 |
| 811 | `define CPX_LOAD_RET 4'b1000 |
| 812 | `define CPX_ST_ACK 4'b0100 |
| 813 | //`define CPX_IFILL_RET 4'b0001 |
| 814 | `define CPX_IFILL_RET 4'b1001 |
| 815 | `define CPX_INT_RET 4'b0111 |
| 816 | `define CPX_INT_SOC 4'b1101 |
| 817 | //`define CPX_FWD_RQ_RET 4'b1010 |
| 818 | //`define CPX_FWD_RPY_RET 4'b1011 |
| 819 | |
| 820 | |
| 821 | |
| 822 | |
| 823 | //// Global CSR decode //// |
| 824 | `define NCU_CSR 8'h80 |
| 825 | `define NIU_CSR 8'h81 |
| 826 | //`define RNG_CSR 8'h82 |
| 827 | `define DBG1_CSR 8'h86 |
| 828 | `define CCU_CSR 8'h83 |
| 829 | `define MCU_CSR 8'h84 |
| 830 | `define TCU_CSR 8'h85 |
| 831 | `define DMU_CSR 8'h88 |
| 832 | `define RCU_CSR 8'h89 |
| 833 | `define NCU_ASI 8'h90 |
| 834 | /////8'h91 ~ 9F reserved |
| 835 | /////8'hA0 ~ BF L2 CSR//// |
| 836 | `define DMU_PIO 4'hC // C0 ~ CF |
| 837 | /////8'hB0 ~ FE reserved |
| 838 | `define SSI_CSR 8'hFF |
| 839 | |
| 840 | |
| 841 | //// NCU_SSI //// |
| 842 | `define SSI_ADDR 12'hFF_F |
| 843 | `define SSI_ADDR_TIMEOUT_REG 40'hFF_0001_0088 |
| 844 | `define SSI_ADDR_LOG_REG 40'hFF_0000_0018 |
| 845 | |
| 846 | `define IF_IDLE 2'b00 |
| 847 | `define IF_ACPT 2'b01 |
| 848 | `define IF_DROP 2'b10 |
| 849 | |
| 850 | `define SSI_IDLE 3'b000 |
| 851 | `define SSI_REQ 3'b001 |
| 852 | `define SSI_WDATA 3'b011 |
| 853 | `define SSI_REQ_PAR 3'b101 |
| 854 | `define SSI_ACK 3'b111 |
| 855 | `define SSI_RDATA 3'b110 |
| 856 | `define SSI_ACK_PAR 3'b010 |
| 857 | |
| 858 | |
| 859 | |
| 860 | |
| 861 | |
| 862 | |
| 863 | |
| 864 | |
| 865 | |
| 866 | |
| 867 | module ncu_i2cfd_ctl ( |
| 868 | l2clk, |
| 869 | cmp_io_sync_en, |
| 870 | io_cmp_sync_en, |
| 871 | scan_in, |
| 872 | scan_out, |
| 873 | tcu_pce_ov, |
| 874 | tcu_clk_stop, |
| 875 | tcu_scan_en, |
| 876 | tcu_aclk, |
| 877 | tcu_bclk, |
| 878 | ncu_cpx_req_cq, |
| 879 | ncu_cpx_data_ca, |
| 880 | intbuf_cpx_req, |
| 881 | intbuf_sel_next, |
| 882 | iobuf_cpx_req, |
| 883 | iobuf_sel_next, |
| 884 | intbuf_rd, |
| 885 | iobuf_rd, |
| 886 | iobuf_vld, |
| 887 | io_pa_ld, |
| 888 | io_pas, |
| 889 | intbuf_vld, |
| 890 | int_pa_ld, |
| 891 | int_pas, |
| 892 | iobuf_dout_d1_ue, |
| 893 | intbuf_dout_d1_ue, |
| 894 | ncu_cpx_req_next, |
| 895 | intbuf_dout, |
| 896 | iobuf_dout, |
| 897 | iobuf_ue_f, |
| 898 | iobuf_uei, |
| 899 | intbuf_ue_f, |
| 900 | intbuf_uei) ; |
| 901 | wire [145:0] ncu_cpx_data_next; |
| 902 | wire [145:0] intbuf_cpx_data; |
| 903 | wire [145:0] iobuf_cpx_data; |
| 904 | wire ncu_cpx_data_ca_ff_scanin; |
| 905 | wire ncu_cpx_data_ca_ff_scanout; |
| 906 | wire l1clk; |
| 907 | wire intbuf_pa_ff_scanin; |
| 908 | wire intbuf_pa_ff_scanout; |
| 909 | wire [143:0] intbuf_pa; |
| 910 | wire [143:0] intbuf_dout_muxed_0; |
| 911 | wire [153:0] intbuf_dout_muxed_a; |
| 912 | wire intbuf_uei_d1_ff_scanin; |
| 913 | wire intbuf_uei_d1_ff_scanout; |
| 914 | wire intbuf_uei_d1; |
| 915 | wire [4:0] inteccchk_ci; |
| 916 | wire intbuf_dout_d1_ue_n; |
| 917 | wire unused_intbufce; |
| 918 | wire [10:0] intbuf_dout_muxed_b; |
| 919 | wire [4:0] unused_intbufco; |
| 920 | wire [16:0] intpfail_n; |
| 921 | wire [153:0] intbuf_dout_muxed; |
| 922 | wire intbuf_dout_d1_ff_scanin; |
| 923 | wire intbuf_dout_d1_ff_scanout; |
| 924 | wire [153:0] intbuf_dout_d1; |
| 925 | wire intbuf_dout_d1_ue_ff_scanin; |
| 926 | wire intbuf_dout_d1_ue_ff_scanout; |
| 927 | wire intbuf_dout_d1_pe_ff_scanin; |
| 928 | wire intbuf_dout_d1_pe_ff_scanout; |
| 929 | wire intbuf_dout_d1_pe; |
| 930 | wire intbuf_ue_vld_n; |
| 931 | wire intbuf_ue_vld; |
| 932 | wire intbuf_ue_vld_ff_scanin; |
| 933 | wire intbuf_ue_vld_ff_scanout; |
| 934 | wire intbuf_ue_f_ff_scanin; |
| 935 | wire intbuf_ue_f_ff_scanout; |
| 936 | wire iobuf_pa_ff_scanin; |
| 937 | wire iobuf_pa_ff_scanout; |
| 938 | wire [175:0] iobuf_pa; |
| 939 | wire [175:0] iobuf_dout_muxed_a; |
| 940 | wire iobuf_uei_d1_ff_scanin; |
| 941 | wire iobuf_uei_d1_ff_scanout; |
| 942 | wire iobuf_uei_d1; |
| 943 | wire [4:0] ioeccchk_ci; |
| 944 | wire iobuf_dout_d1_ue_n; |
| 945 | wire unused_iobufce; |
| 946 | wire [10:0] iobuf_dout_muxed_b; |
| 947 | wire [4:0] unused_iobufco; |
| 948 | wire [17:0] iopfail_n; |
| 949 | wire [153:0] iobuf_dout_muxed; |
| 950 | wire iobuf_dout_d1_ff_scanin; |
| 951 | wire iobuf_dout_d1_ff_scanout; |
| 952 | wire [153:0] iobuf_dout_d1; |
| 953 | wire iobuf_dout_d1_ue_ff_scanin; |
| 954 | wire iobuf_dout_d1_ue_ff_scanout; |
| 955 | wire iobuf_dout_d1_pe_ff_scanin; |
| 956 | wire iobuf_dout_d1_pe_ff_scanout; |
| 957 | wire iobuf_dout_d1_pe; |
| 958 | wire iobuf_ue_vld_n; |
| 959 | wire iobuf_ue_vld; |
| 960 | wire iobuf_ue_vld_ff_scanin; |
| 961 | wire iobuf_ue_vld_ff_scanout; |
| 962 | wire iobuf_ue_f_ff_scanin; |
| 963 | wire iobuf_ue_f_ff_scanout; |
| 964 | wire spares_scanin; |
| 965 | wire spares_scanout; |
| 966 | wire siclk; |
| 967 | wire soclk; |
| 968 | wire se; |
| 969 | wire pce_ov; |
| 970 | wire stop; |
| 971 | |
| 972 | |
| 973 | //////////////////////////////////////////////////////////////////////// |
| 974 | // Signal declarations |
| 975 | //////////////////////////////////////////////////////////////////////// |
| 976 | // Global interface |
| 977 | input l2clk; |
| 978 | input cmp_io_sync_en; |
| 979 | input io_cmp_sync_en; |
| 980 | input scan_in; |
| 981 | output scan_out; |
| 982 | input tcu_pce_ov; |
| 983 | input tcu_clk_stop; |
| 984 | input tcu_scan_en; |
| 985 | input tcu_aclk; |
| 986 | input tcu_bclk; |
| 987 | |
| 988 | // Crossbar interface |
| 989 | output [7:0] ncu_cpx_req_cq; |
| 990 | output [145:0] ncu_cpx_data_ca; |
| 991 | |
| 992 | // i2c fast control interface |
| 993 | output [7:0] intbuf_cpx_req; |
| 994 | input intbuf_sel_next; |
| 995 | |
| 996 | output [7:0] iobuf_cpx_req; |
| 997 | input iobuf_sel_next; |
| 998 | |
| 999 | input intbuf_rd; |
| 1000 | input iobuf_rd; |
| 1001 | input iobuf_vld; |
| 1002 | input io_pa_ld; |
| 1003 | input io_pas; |
| 1004 | input intbuf_vld; |
| 1005 | input int_pa_ld; |
| 1006 | input int_pas; |
| 1007 | |
| 1008 | output iobuf_dout_d1_ue; |
| 1009 | output intbuf_dout_d1_ue; |
| 1010 | |
| 1011 | output [7:0] ncu_cpx_req_next; |
| 1012 | |
| 1013 | // Interrupt status table read result buffer interface |
| 1014 | input [143:0] intbuf_dout; |
| 1015 | |
| 1016 | // IO buffer interface |
| 1017 | input [175:0] iobuf_dout; |
| 1018 | |
| 1019 | // err par // |
| 1020 | output iobuf_ue_f; |
| 1021 | input iobuf_uei; |
| 1022 | output intbuf_ue_f; |
| 1023 | input intbuf_uei; |
| 1024 | |
| 1025 | // Internal signals |
| 1026 | |
| 1027 | |
| 1028 | |
| 1029 | |
| 1030 | //************************************** |
| 1031 | // IO-to-CPX Mux |
| 1032 | //************************************** |
| 1033 | //// intbuf_sel_next and iobuf_sel_next is m.e. //// |
| 1034 | assign ncu_cpx_req_next[7:0] = ({8{intbuf_sel_next}} & intbuf_cpx_req) | |
| 1035 | ({8{iobuf_sel_next}} & iobuf_cpx_req ); |
| 1036 | assign ncu_cpx_req_cq[7:0] = ncu_cpx_req_next[7:0]; |
| 1037 | /* |
| 1038 | msff_ctl_macro ncu_cpx_req_cq_ff (width=8) |
| 1039 | ( |
| 1040 | .scan_in(ncu_cpx_req_cq_ff_scanin), |
| 1041 | .scan_out(ncu_cpx_req_cq_ff_scanout), |
| 1042 | .dout (ncu_cpx_req_cq[7:0]), |
| 1043 | .l1clk (l1clk), |
| 1044 | .din (ncu_cpx_req_next[7:0]) |
| 1045 | ); |
| 1046 | */ |
| 1047 | |
| 1048 | assign ncu_cpx_data_next[145:0] = ({146{intbuf_sel_next}} & intbuf_cpx_data[145:0]) | |
| 1049 | ({146{iobuf_sel_next}} & iobuf_cpx_data[145:0]) ; |
| 1050 | |
| 1051 | /* |
| 1052 | msff_ctl_macro ncu_cpx_data_cq_ff (width=146) |
| 1053 | ( |
| 1054 | .scan_in(ncu_cpx_data_cq_ff_scanin), |
| 1055 | .scan_out(ncu_cpx_data_cq_ff_scanout), |
| 1056 | .dout (ncu_cpx_data_cq[145:0]), |
| 1057 | .l1clk (l1clk), |
| 1058 | .din (ncu_cpx_data_next[145:0]) |
| 1059 | ); |
| 1060 | */ |
| 1061 | |
| 1062 | // Flop data bus one cycle to match CPX pipeline |
| 1063 | ncu_i2cfcd_ctl_msff_ctl_macro__width_146 ncu_cpx_data_ca_ff |
| 1064 | ( |
| 1065 | .scan_in(ncu_cpx_data_ca_ff_scanin), |
| 1066 | .scan_out(ncu_cpx_data_ca_ff_scanout), |
| 1067 | .dout (ncu_cpx_data_ca[145:0]), |
| 1068 | .l1clk (l1clk), |
| 1069 | //.din (ncu_cpx_data_cq[145:0]) |
| 1070 | .din (ncu_cpx_data_next[145:0]), |
| 1071 | .siclk(siclk), |
| 1072 | .soclk(soclk) |
| 1073 | ); |
| 1074 | |
| 1075 | //*************************************** |
| 1076 | // Interrupt Table Read Result Buffer |
| 1077 | //*************************************** |
| 1078 | // Assemble CPX req/data |
| 1079 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_144 intbuf_pa_ff |
| 1080 | ( |
| 1081 | .scan_in(intbuf_pa_ff_scanin), |
| 1082 | .scan_out(intbuf_pa_ff_scanout), |
| 1083 | .dout (intbuf_pa[143:0]), |
| 1084 | .l1clk (l1clk), |
| 1085 | .en (int_pa_ld), |
| 1086 | .din (intbuf_dout[143:0]), |
| 1087 | .siclk(siclk), |
| 1088 | .soclk(soclk) |
| 1089 | ); |
| 1090 | assign intbuf_dout_muxed_0[143:0] = int_pas ? intbuf_pa[143:0] : intbuf_dout[143:0] ; |
| 1091 | |
| 1092 | assign intbuf_dout_muxed_a[153:96] = intbuf_dout_muxed_0[121:64] ; |
| 1093 | assign intbuf_dout_muxed_a[63:0] = intbuf_dout_muxed_0[63:0] ; |
| 1094 | //// uncompress data to reconstruct pcx packet //// |
| 1095 | assign intbuf_dout_muxed_a[95:64] = intbuf_dout_muxed_0[112] ? intbuf_dout_muxed_0[31:0] : 32'b0 ; |
| 1096 | |
| 1097 | |
| 1098 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 intbuf_uei_d1_ff |
| 1099 | ( |
| 1100 | .scan_in(intbuf_uei_d1_ff_scanin), |
| 1101 | .scan_out(intbuf_uei_d1_ff_scanout), |
| 1102 | .dout (intbuf_uei_d1), |
| 1103 | .l1clk (l1clk), |
| 1104 | .en (io_cmp_sync_en), |
| 1105 | .din (intbuf_uei), |
| 1106 | .siclk(siclk), |
| 1107 | .soclk(soclk) |
| 1108 | ); |
| 1109 | |
| 1110 | assign inteccchk_ci[4:0] = {intbuf_dout_muxed_0[126:124], |
| 1111 | intbuf_dout_muxed_0[123]^intbuf_uei_d1, |
| 1112 | intbuf_dout_muxed_0[122]^intbuf_uei_d1}; |
| 1113 | |
| 1114 | ncu_eccchk11_ctl i2cfdinteccchk11 ( .din({intbuf_dout_muxed_a[153:146],intbuf_dout_muxed_a[136:134]}), |
| 1115 | .ci(inteccchk_ci[4:0]), |
| 1116 | .ue(intbuf_dout_d1_ue_n), |
| 1117 | .ce(unused_intbufce), |
| 1118 | .dout(intbuf_dout_muxed_b[10:0]), |
| 1119 | .co(unused_intbufco[4:0]) ); |
| 1120 | assign intpfail_n[0] = ~^{intbuf_dout_muxed_0[0], intbuf_dout_muxed_0[17], intbuf_dout_muxed_0[34], |
| 1121 | intbuf_dout_muxed_0[51], intbuf_dout_muxed_0[68], intbuf_dout_muxed_0[86], |
| 1122 | intbuf_dout_muxed_0[106],intbuf_dout_muxed_0[127]}; |
| 1123 | assign intpfail_n[1] = ~^{intbuf_dout_muxed_0[1], intbuf_dout_muxed_0[18], intbuf_dout_muxed_0[35], |
| 1124 | intbuf_dout_muxed_0[52], intbuf_dout_muxed_0[69], intbuf_dout_muxed_0[87], |
| 1125 | intbuf_dout_muxed_0[107],intbuf_dout_muxed_0[128]}; |
| 1126 | assign intpfail_n[2] = ~^{intbuf_dout_muxed_0[2], intbuf_dout_muxed_0[19], intbuf_dout_muxed_0[36], |
| 1127 | intbuf_dout_muxed_0[53], intbuf_dout_muxed_0[70], intbuf_dout_muxed_0[88], |
| 1128 | intbuf_dout_muxed_0[108],intbuf_dout_muxed_0[129]}; |
| 1129 | assign intpfail_n[3] = ~^{intbuf_dout_muxed_0[3], intbuf_dout_muxed_0[20], intbuf_dout_muxed_0[37], |
| 1130 | intbuf_dout_muxed_0[54], intbuf_dout_muxed_0[71], intbuf_dout_muxed_0[89], |
| 1131 | intbuf_dout_muxed_0[109],intbuf_dout_muxed_0[130]}; |
| 1132 | assign intpfail_n[4] = ~^{intbuf_dout_muxed_0[4], intbuf_dout_muxed_0[21], intbuf_dout_muxed_0[38], |
| 1133 | intbuf_dout_muxed_0[55], intbuf_dout_muxed_0[72], intbuf_dout_muxed_0[90], |
| 1134 | intbuf_dout_muxed_0[110],intbuf_dout_muxed_0[131]}; |
| 1135 | assign intpfail_n[5] = ~^{intbuf_dout_muxed_0[5], intbuf_dout_muxed_0[22], intbuf_dout_muxed_0[39], |
| 1136 | intbuf_dout_muxed_0[56], intbuf_dout_muxed_0[73], intbuf_dout_muxed_0[91], |
| 1137 | intbuf_dout_muxed_0[111],intbuf_dout_muxed_0[132]}; |
| 1138 | assign intpfail_n[6] = ~^{intbuf_dout_muxed_0[6], intbuf_dout_muxed_0[23], intbuf_dout_muxed_0[40], |
| 1139 | intbuf_dout_muxed_0[57], intbuf_dout_muxed_0[74], intbuf_dout_muxed_0[92], |
| 1140 | intbuf_dout_muxed_0[112],intbuf_dout_muxed_0[133]}; |
| 1141 | assign intpfail_n[7] = ~^{intbuf_dout_muxed_0[7], intbuf_dout_muxed_0[24], intbuf_dout_muxed_0[41], |
| 1142 | intbuf_dout_muxed_0[58], intbuf_dout_muxed_0[75], intbuf_dout_muxed_0[93], |
| 1143 | intbuf_dout_muxed_0[113],intbuf_dout_muxed_0[134]}; |
| 1144 | assign intpfail_n[8] = ~^{intbuf_dout_muxed_0[8], intbuf_dout_muxed_0[25], intbuf_dout_muxed_0[42], |
| 1145 | intbuf_dout_muxed_0[59], intbuf_dout_muxed_0[76], intbuf_dout_muxed_0[94], |
| 1146 | intbuf_dout_muxed_0[135]}; |
| 1147 | assign intpfail_n[9] = ~^{intbuf_dout_muxed_0[9], intbuf_dout_muxed_0[26], intbuf_dout_muxed_0[43], |
| 1148 | intbuf_dout_muxed_0[60], intbuf_dout_muxed_0[78], intbuf_dout_muxed_0[95], |
| 1149 | intbuf_dout_muxed_0[136]}; |
| 1150 | assign intpfail_n[10] = ~^{intbuf_dout_muxed_0[10], intbuf_dout_muxed_0[27], intbuf_dout_muxed_0[44], |
| 1151 | intbuf_dout_muxed_0[61], intbuf_dout_muxed_0[79], intbuf_dout_muxed_0[96], |
| 1152 | intbuf_dout_muxed_0[137]}; |
| 1153 | assign intpfail_n[11] = ~^{intbuf_dout_muxed_0[11], intbuf_dout_muxed_0[28], intbuf_dout_muxed_0[45], |
| 1154 | intbuf_dout_muxed_0[62], intbuf_dout_muxed_0[80], intbuf_dout_muxed_0[97], |
| 1155 | intbuf_dout_muxed_0[138]}; |
| 1156 | assign intpfail_n[12] = ~^{intbuf_dout_muxed_0[12], intbuf_dout_muxed_0[29], intbuf_dout_muxed_0[46], |
| 1157 | intbuf_dout_muxed_0[63], intbuf_dout_muxed_0[81], intbuf_dout_muxed_0[98], |
| 1158 | intbuf_dout_muxed_0[139]}; |
| 1159 | assign intpfail_n[13] = ~^{intbuf_dout_muxed_0[13], intbuf_dout_muxed_0[30], intbuf_dout_muxed_0[47], |
| 1160 | intbuf_dout_muxed_0[64], intbuf_dout_muxed_0[82], intbuf_dout_muxed_0[79], |
| 1161 | intbuf_dout_muxed_0[140]}; |
| 1162 | assign intpfail_n[14] = ~^{intbuf_dout_muxed_0[14], intbuf_dout_muxed_0[31], intbuf_dout_muxed_0[48], |
| 1163 | intbuf_dout_muxed_0[65], intbuf_dout_muxed_0[83], intbuf_dout_muxed_0[100], |
| 1164 | intbuf_dout_muxed_0[141]}; |
| 1165 | assign intpfail_n[15] = ~^{intbuf_dout_muxed_0[15], intbuf_dout_muxed_0[32], intbuf_dout_muxed_0[49], |
| 1166 | intbuf_dout_muxed_0[66], intbuf_dout_muxed_0[84], intbuf_dout_muxed_0[101], |
| 1167 | intbuf_dout_muxed_0[142]}; |
| 1168 | assign intpfail_n[16] = ~^{intbuf_dout_muxed_0[16], intbuf_dout_muxed_0[33], intbuf_dout_muxed_0[50], |
| 1169 | intbuf_dout_muxed_0[67], intbuf_dout_muxed_0[85], intbuf_dout_muxed_0[105], |
| 1170 | intbuf_dout_muxed_0[143]}; |
| 1171 | |
| 1172 | assign intbuf_dout_muxed[153:0] = { intbuf_dout_muxed_b[10:3], //1hot ecc cpuid |
| 1173 | ~intbuf_dout_d1_ue_n, //valid |
| 1174 | intbuf_dout_muxed_a[144:137], |
| 1175 | intbuf_dout_muxed_b[2:0], //ecc thr |
| 1176 | intbuf_dout_muxed_a[133:0] }; |
| 1177 | |
| 1178 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_154 intbuf_dout_d1_ff |
| 1179 | ( |
| 1180 | .scan_in(intbuf_dout_d1_ff_scanin), |
| 1181 | .scan_out(intbuf_dout_d1_ff_scanout), |
| 1182 | .dout (intbuf_dout_d1[153:0]), |
| 1183 | .l1clk (l1clk), |
| 1184 | .en (intbuf_rd), |
| 1185 | .din (intbuf_dout_muxed[153:0]), |
| 1186 | .siclk(siclk), |
| 1187 | .soclk(soclk) |
| 1188 | ); |
| 1189 | |
| 1190 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 intbuf_dout_d1_ue_ff |
| 1191 | ( |
| 1192 | .scan_in(intbuf_dout_d1_ue_ff_scanin), |
| 1193 | .scan_out(intbuf_dout_d1_ue_ff_scanout), |
| 1194 | .dout (intbuf_dout_d1_ue), |
| 1195 | .l1clk (l1clk), |
| 1196 | .en (intbuf_rd), |
| 1197 | .din (intbuf_dout_d1_ue_n), |
| 1198 | .siclk(siclk), |
| 1199 | .soclk(soclk) |
| 1200 | ); |
| 1201 | |
| 1202 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 intbuf_dout_d1_pe_ff |
| 1203 | ( |
| 1204 | .scan_in(intbuf_dout_d1_pe_ff_scanin), |
| 1205 | .scan_out(intbuf_dout_d1_pe_ff_scanout), |
| 1206 | .dout (intbuf_dout_d1_pe), |
| 1207 | .l1clk (l1clk), |
| 1208 | .en (intbuf_rd), |
| 1209 | .din (|intpfail_n[16:0]), |
| 1210 | .siclk(siclk), |
| 1211 | .soclk(soclk) |
| 1212 | ); |
| 1213 | |
| 1214 | assign intbuf_ue_vld_n = cmp_io_sync_en ? (intbuf_vld&(intbuf_dout_d1_ue|intbuf_dout_d1_pe) ) : |
| 1215 | (intbuf_vld&(intbuf_dout_d1_ue|intbuf_dout_d1_pe) )|intbuf_ue_vld; |
| 1216 | ncu_i2cfcd_ctl_msff_ctl_macro__width_1 intbuf_ue_vld_ff |
| 1217 | ( |
| 1218 | .scan_in(intbuf_ue_vld_ff_scanin), |
| 1219 | .scan_out(intbuf_ue_vld_ff_scanout), |
| 1220 | .dout (intbuf_ue_vld), |
| 1221 | .l1clk (l1clk), |
| 1222 | .din (intbuf_ue_vld_n), |
| 1223 | .siclk(siclk), |
| 1224 | .soclk(soclk) |
| 1225 | ); |
| 1226 | |
| 1227 | //// signal for domain crossing //// |
| 1228 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 intbuf_ue_f_ff |
| 1229 | ( |
| 1230 | .scan_in(intbuf_ue_f_ff_scanin), |
| 1231 | .scan_out(intbuf_ue_f_ff_scanout), |
| 1232 | .dout (intbuf_ue_f), |
| 1233 | .l1clk (l1clk), |
| 1234 | .en (cmp_io_sync_en), |
| 1235 | .din (intbuf_ue_vld), |
| 1236 | .siclk(siclk), |
| 1237 | .soclk(soclk) |
| 1238 | ); |
| 1239 | |
| 1240 | assign {intbuf_cpx_req[7:0], |
| 1241 | intbuf_cpx_data[145:0]} = intbuf_dout_d1[153:0]; |
| 1242 | |
| 1243 | |
| 1244 | |
| 1245 | |
| 1246 | //******************************* |
| 1247 | // IO Buffer |
| 1248 | //******************************* |
| 1249 | // Assemble CPX req/data |
| 1250 | // iobuf_dout[145:0] return data |
| 1251 | // iobuf_dout[153:146] cpu ID |
| 1252 | |
| 1253 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_176 iobuf_pa_ff |
| 1254 | ( |
| 1255 | .scan_in(iobuf_pa_ff_scanin), |
| 1256 | .scan_out(iobuf_pa_ff_scanout), |
| 1257 | .dout (iobuf_pa[175:0]), |
| 1258 | .l1clk (l1clk), |
| 1259 | .en (io_pa_ld), |
| 1260 | .din (iobuf_dout[175:0]), |
| 1261 | .siclk(siclk), |
| 1262 | .soclk(soclk) |
| 1263 | ); |
| 1264 | assign iobuf_dout_muxed_a[175:0] = io_pas ? iobuf_pa[175:0] : iobuf_dout[175:0] ; |
| 1265 | |
| 1266 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 iobuf_uei_d1_ff |
| 1267 | ( |
| 1268 | .scan_in(iobuf_uei_d1_ff_scanin), |
| 1269 | .scan_out(iobuf_uei_d1_ff_scanout), |
| 1270 | .dout (iobuf_uei_d1), |
| 1271 | .l1clk (l1clk), |
| 1272 | .en (io_cmp_sync_en), |
| 1273 | .din (iobuf_uei), |
| 1274 | .siclk(siclk), |
| 1275 | .soclk(soclk) |
| 1276 | ); |
| 1277 | |
| 1278 | assign ioeccchk_ci[4:0] = {iobuf_dout_muxed_a[157:155], |
| 1279 | iobuf_dout_muxed_a[154]^iobuf_uei_d1, |
| 1280 | iobuf_dout_muxed_a[153]^iobuf_uei_d1}; |
| 1281 | |
| 1282 | ncu_eccchk11_ctl i2cfdioeccchk11 ( .din({iobuf_dout_muxed_a[152:145],iobuf_dout_muxed_a[136:134]}), |
| 1283 | .ci(ioeccchk_ci[4:0]), |
| 1284 | .ue(iobuf_dout_d1_ue_n), |
| 1285 | .ce(unused_iobufce), |
| 1286 | .dout(iobuf_dout_muxed_b[10:0]), |
| 1287 | .co(unused_iobufco[4:0]) ); |
| 1288 | |
| 1289 | assign iopfail_n[0] = ~^{iobuf_dout_muxed_a[0], iobuf_dout_muxed_a[18], iobuf_dout_muxed_a[36], |
| 1290 | iobuf_dout_muxed_a[54], iobuf_dout_muxed_a[72], iobuf_dout_muxed_a[90], |
| 1291 | iobuf_dout_muxed_a[108],iobuf_dout_muxed_a[126],iobuf_dout_muxed_a[158]}; |
| 1292 | assign iopfail_n[1] = ~^{iobuf_dout_muxed_a[1], iobuf_dout_muxed_a[19], iobuf_dout_muxed_a[37], |
| 1293 | iobuf_dout_muxed_a[53], iobuf_dout_muxed_a[73], iobuf_dout_muxed_a[91], |
| 1294 | iobuf_dout_muxed_a[109],iobuf_dout_muxed_a[127],iobuf_dout_muxed_a[159]}; |
| 1295 | assign iopfail_n[2] = ~^{iobuf_dout_muxed_a[2], iobuf_dout_muxed_a[20], iobuf_dout_muxed_a[38], |
| 1296 | iobuf_dout_muxed_a[56], iobuf_dout_muxed_a[14], iobuf_dout_muxed_a[92], |
| 1297 | iobuf_dout_muxed_a[110],iobuf_dout_muxed_a[128],iobuf_dout_muxed_a[160]}; |
| 1298 | assign iopfail_n[3] = ~^{iobuf_dout_muxed_a[3], iobuf_dout_muxed_a[21], iobuf_dout_muxed_a[39], |
| 1299 | iobuf_dout_muxed_a[57], iobuf_dout_muxed_a[75], iobuf_dout_muxed_a[93], |
| 1300 | iobuf_dout_muxed_a[111],iobuf_dout_muxed_a[129],iobuf_dout_muxed_a[161]}; |
| 1301 | assign iopfail_n[4] = ~^{iobuf_dout_muxed_a[4], iobuf_dout_muxed_a[22], iobuf_dout_muxed_a[40], |
| 1302 | iobuf_dout_muxed_a[58], iobuf_dout_muxed_a[76], iobuf_dout_muxed_a[94], |
| 1303 | iobuf_dout_muxed_a[112],iobuf_dout_muxed_a[130],iobuf_dout_muxed_a[162]}; |
| 1304 | assign iopfail_n[5] = ~^{iobuf_dout_muxed_a[5], iobuf_dout_muxed_a[23], iobuf_dout_muxed_a[41], |
| 1305 | iobuf_dout_muxed_a[59], iobuf_dout_muxed_a[77], iobuf_dout_muxed_a[95], |
| 1306 | iobuf_dout_muxed_a[113],iobuf_dout_muxed_a[131],iobuf_dout_muxed_a[163]}; |
| 1307 | assign iopfail_n[6] = ~^{iobuf_dout_muxed_a[6], iobuf_dout_muxed_a[24], iobuf_dout_muxed_a[42], |
| 1308 | iobuf_dout_muxed_a[60], iobuf_dout_muxed_a[78], iobuf_dout_muxed_a[96], |
| 1309 | iobuf_dout_muxed_a[114],iobuf_dout_muxed_a[132],iobuf_dout_muxed_a[164]}; |
| 1310 | assign iopfail_n[7] = ~^{iobuf_dout_muxed_a[7], iobuf_dout_muxed_a[25], iobuf_dout_muxed_a[43], |
| 1311 | iobuf_dout_muxed_a[61], iobuf_dout_muxed_a[79], iobuf_dout_muxed_a[97], |
| 1312 | iobuf_dout_muxed_a[115],iobuf_dout_muxed_a[133],iobuf_dout_muxed_a[165]}; |
| 1313 | assign iopfail_n[8] = ~^{iobuf_dout_muxed_a[8], iobuf_dout_muxed_a[26], iobuf_dout_muxed_a[44], |
| 1314 | iobuf_dout_muxed_a[61], iobuf_dout_muxed_a[82], iobuf_dout_muxed_a[98] , |
| 1315 | iobuf_dout_muxed_a[116],iobuf_dout_muxed_a[137],iobuf_dout_muxed_a[166]}; |
| 1316 | assign iopfail_n[9] = ~^{iobuf_dout_muxed_a[9], iobuf_dout_muxed_a[27], iobuf_dout_muxed_a[45], |
| 1317 | iobuf_dout_muxed_a[63], iobuf_dout_muxed_a[81], iobuf_dout_muxed_a[99], |
| 1318 | iobuf_dout_muxed_a[117],iobuf_dout_muxed_a[138],iobuf_dout_muxed_a[167]}; |
| 1319 | assign iopfail_n[10]= ~^{iobuf_dout_muxed_a[10], iobuf_dout_muxed_a[28], iobuf_dout_muxed_a[46], |
| 1320 | iobuf_dout_muxed_a[64], iobuf_dout_muxed_a[82], iobuf_dout_muxed_a[100], |
| 1321 | iobuf_dout_muxed_a[118],iobuf_dout_muxed_a[139],iobuf_dout_muxed_a[168]}; |
| 1322 | assign iopfail_n[11]= ~^{iobuf_dout_muxed_a[11], iobuf_dout_muxed_a[29], iobuf_dout_muxed_a[47], |
| 1323 | iobuf_dout_muxed_a[65], iobuf_dout_muxed_a[83], iobuf_dout_muxed_a[101], |
| 1324 | iobuf_dout_muxed_a[119],iobuf_dout_muxed_a[140],iobuf_dout_muxed_a[169]}; |
| 1325 | assign iopfail_n[12]= ~^{iobuf_dout_muxed_a[12], iobuf_dout_muxed_a[30], iobuf_dout_muxed_a[48], |
| 1326 | iobuf_dout_muxed_a[66], iobuf_dout_muxed_a[84], iobuf_dout_muxed_a[102], |
| 1327 | iobuf_dout_muxed_a[120],iobuf_dout_muxed_a[141],iobuf_dout_muxed_a[170]}; |
| 1328 | assign iopfail_n[13]= ~^{iobuf_dout_muxed_a[13], iobuf_dout_muxed_a[31], iobuf_dout_muxed_a[49], |
| 1329 | iobuf_dout_muxed_a[67], iobuf_dout_muxed_a[85], iobuf_dout_muxed_a[143], |
| 1330 | iobuf_dout_muxed_a[131],iobuf_dout_muxed_a[142],iobuf_dout_muxed_a[171]}; |
| 1331 | assign iopfail_n[14]= ~^{iobuf_dout_muxed_a[14], iobuf_dout_muxed_a[32], iobuf_dout_muxed_a[50], |
| 1332 | iobuf_dout_muxed_a[68], iobuf_dout_muxed_a[86], iobuf_dout_muxed_a[104], |
| 1333 | iobuf_dout_muxed_a[122],iobuf_dout_muxed_a[143],iobuf_dout_muxed_a[172]}; |
| 1334 | assign iopfail_n[15]= ~^{iobuf_dout_muxed_a[15], iobuf_dout_muxed_a[23], iobuf_dout_muxed_a[51], |
| 1335 | iobuf_dout_muxed_a[69], iobuf_dout_muxed_a[87], iobuf_dout_muxed_a[105], |
| 1336 | iobuf_dout_muxed_a[123],iobuf_dout_muxed_a[144],iobuf_dout_muxed_a[173]}; |
| 1337 | assign iopfail_n[16]= ~^{iobuf_dout_muxed_a[16], iobuf_dout_muxed_a[34], iobuf_dout_muxed_a[52], |
| 1338 | iobuf_dout_muxed_a[70], iobuf_dout_muxed_a[88], iobuf_dout_muxed_a[106], |
| 1339 | iobuf_dout_muxed_a[124],iobuf_dout_muxed_a[145],iobuf_dout_muxed_a[174]}; |
| 1340 | assign iopfail_n[17]= ~^{iobuf_dout_muxed_a[17], iobuf_dout_muxed_a[35], iobuf_dout_muxed_a[53], |
| 1341 | iobuf_dout_muxed_a[71], iobuf_dout_muxed_a[89], iobuf_dout_muxed_a[107], |
| 1342 | iobuf_dout_muxed_a[125],iobuf_dout_muxed_a[175]}; |
| 1343 | |
| 1344 | assign iobuf_dout_muxed[153:0] = { iobuf_dout_muxed_b[10:3], //1hot ecc cpuid |
| 1345 | ~iobuf_dout_d1_ue_n, //valid |
| 1346 | iobuf_dout_muxed_a[144:137], |
| 1347 | iobuf_dout_muxed_b[2:0], //ecc thr |
| 1348 | iobuf_dout_muxed_a[133:0] }; |
| 1349 | |
| 1350 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_154 iobuf_dout_d1_ff |
| 1351 | ( |
| 1352 | .scan_in(iobuf_dout_d1_ff_scanin), |
| 1353 | .scan_out(iobuf_dout_d1_ff_scanout), |
| 1354 | .dout (iobuf_dout_d1[153:0]), |
| 1355 | .l1clk (l1clk), |
| 1356 | .en (iobuf_rd), |
| 1357 | .din (iobuf_dout_muxed[153:0]), |
| 1358 | .siclk(siclk), |
| 1359 | .soclk(soclk) |
| 1360 | ); |
| 1361 | |
| 1362 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 iobuf_dout_d1_ue_ff |
| 1363 | ( |
| 1364 | .scan_in(iobuf_dout_d1_ue_ff_scanin), |
| 1365 | .scan_out(iobuf_dout_d1_ue_ff_scanout), |
| 1366 | .dout (iobuf_dout_d1_ue), |
| 1367 | .l1clk (l1clk), |
| 1368 | .en (iobuf_rd), |
| 1369 | .din (iobuf_dout_d1_ue_n), |
| 1370 | .siclk(siclk), |
| 1371 | .soclk(soclk) |
| 1372 | ); |
| 1373 | |
| 1374 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 iobuf_dout_d1_pe_ff |
| 1375 | ( |
| 1376 | .scan_in(iobuf_dout_d1_pe_ff_scanin), |
| 1377 | .scan_out(iobuf_dout_d1_pe_ff_scanout), |
| 1378 | .dout (iobuf_dout_d1_pe), |
| 1379 | .l1clk (l1clk), |
| 1380 | .en (iobuf_rd), |
| 1381 | .din (|iopfail_n[17:0]), |
| 1382 | .siclk(siclk), |
| 1383 | .soclk(soclk) |
| 1384 | ); |
| 1385 | |
| 1386 | //// hold for capturing new synd and ue //// |
| 1387 | assign iobuf_ue_vld_n = cmp_io_sync_en ? (iobuf_vld&(iobuf_dout_d1_ue|iobuf_dout_d1_pe) ) : |
| 1388 | (iobuf_vld&(iobuf_dout_d1_ue|iobuf_dout_d1_pe) )|iobuf_ue_vld; |
| 1389 | ncu_i2cfcd_ctl_msff_ctl_macro__width_1 iobuf_ue_vld_ff |
| 1390 | ( |
| 1391 | .scan_in(iobuf_ue_vld_ff_scanin), |
| 1392 | .scan_out(iobuf_ue_vld_ff_scanout), |
| 1393 | .dout (iobuf_ue_vld), |
| 1394 | .l1clk (l1clk), |
| 1395 | .din (iobuf_ue_vld_n), |
| 1396 | .siclk(siclk), |
| 1397 | .soclk(soclk) |
| 1398 | ); |
| 1399 | |
| 1400 | //// signal for domain crossing //// |
| 1401 | ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_1 iobuf_ue_f_ff |
| 1402 | ( |
| 1403 | .scan_in(iobuf_ue_f_ff_scanin), |
| 1404 | .scan_out(iobuf_ue_f_ff_scanout), |
| 1405 | .dout (iobuf_ue_f), |
| 1406 | .l1clk (l1clk), |
| 1407 | .en (cmp_io_sync_en), |
| 1408 | .din (iobuf_ue_vld), |
| 1409 | .siclk(siclk), |
| 1410 | .soclk(soclk) |
| 1411 | ); |
| 1412 | |
| 1413 | assign {iobuf_cpx_req[7:0], |
| 1414 | iobuf_cpx_data[145:0]} = iobuf_dout_d1[153:0]; |
| 1415 | |
| 1416 | |
| 1417 | /* spare gates, 12398 cells / 450 = 28 */ |
| 1418 | ncu_i2cfcd_ctl_spare_ctl_macro__num_11 spares ( |
| 1419 | .scan_in(spares_scanin), |
| 1420 | .scan_out(spares_scanout), |
| 1421 | .l1clk (l1clk), |
| 1422 | .siclk(siclk), |
| 1423 | .soclk(soclk) |
| 1424 | ); |
| 1425 | |
| 1426 | |
| 1427 | /**** adding clock header ****/ |
| 1428 | ncu_i2cfcd_ctl_l1clkhdr_ctl_macro clkgen ( |
| 1429 | .l2clk (l2clk), |
| 1430 | .l1en (1'b1), |
| 1431 | .l1clk (l1clk), |
| 1432 | .pce_ov(pce_ov), |
| 1433 | .stop(stop), |
| 1434 | .se(se) |
| 1435 | ); |
| 1436 | |
| 1437 | /*** building tcu port ***/ |
| 1438 | assign siclk = tcu_aclk; |
| 1439 | assign soclk = tcu_bclk; |
| 1440 | assign se = tcu_scan_en; |
| 1441 | assign pce_ov = tcu_pce_ov; |
| 1442 | assign stop = tcu_clk_stop; |
| 1443 | |
| 1444 | // fixscan start: |
| 1445 | //assign ncu_cpx_req_cq_ff_scanin = scan_in ; |
| 1446 | //assign ncu_cpx_data_cq_ff_scanin = ncu_cpx_req_cq_ff_scanout; |
| 1447 | assign ncu_cpx_data_ca_ff_scanin = scan_in; |
| 1448 | assign intbuf_pa_ff_scanin = ncu_cpx_data_ca_ff_scanout; |
| 1449 | assign intbuf_uei_d1_ff_scanin = intbuf_pa_ff_scanout ; |
| 1450 | assign intbuf_dout_d1_ff_scanin = intbuf_uei_d1_ff_scanout ; |
| 1451 | assign intbuf_dout_d1_ue_ff_scanin = intbuf_dout_d1_ff_scanout; |
| 1452 | assign intbuf_dout_d1_pe_ff_scanin = intbuf_dout_d1_ue_ff_scanout; |
| 1453 | assign intbuf_ue_vld_ff_scanin = intbuf_dout_d1_pe_ff_scanout; |
| 1454 | assign intbuf_ue_f_ff_scanin = intbuf_ue_vld_ff_scanout ; |
| 1455 | assign iobuf_pa_ff_scanin = intbuf_ue_f_ff_scanout ; |
| 1456 | assign iobuf_uei_d1_ff_scanin = iobuf_pa_ff_scanout ; |
| 1457 | assign iobuf_dout_d1_ff_scanin = iobuf_uei_d1_ff_scanout ; |
| 1458 | assign iobuf_dout_d1_ue_ff_scanin = iobuf_dout_d1_ff_scanout ; |
| 1459 | assign iobuf_dout_d1_pe_ff_scanin = iobuf_dout_d1_ue_ff_scanout; |
| 1460 | assign iobuf_ue_vld_ff_scanin = iobuf_dout_d1_pe_ff_scanout; |
| 1461 | assign iobuf_ue_f_ff_scanin = iobuf_ue_vld_ff_scanout ; |
| 1462 | assign spares_scanin = iobuf_ue_f_ff_scanout ; |
| 1463 | assign scan_out = spares_scanout ; |
| 1464 | // fixscan end: |
| 1465 | endmodule // i2c_fdp |
| 1466 | |
| 1467 | |
| 1468 | |
| 1469 | // Local Variables: |
| 1470 | // verilog-auto-sense-defines-constant:t |
| 1471 | // End: |
| 1472 | |
| 1473 | |
| 1474 | |
| 1475 | |
| 1476 | |
| 1477 | |
| 1478 | |
| 1479 | // any PARAMS parms go into naming of macro |
| 1480 | |
| 1481 | module ncu_i2cfcd_ctl_msff_ctl_macro__width_146 ( |
| 1482 | din, |
| 1483 | l1clk, |
| 1484 | scan_in, |
| 1485 | siclk, |
| 1486 | soclk, |
| 1487 | dout, |
| 1488 | scan_out); |
| 1489 | wire [145:0] fdin; |
| 1490 | wire [144:0] so; |
| 1491 | |
| 1492 | input [145:0] din; |
| 1493 | input l1clk; |
| 1494 | input scan_in; |
| 1495 | |
| 1496 | |
| 1497 | input siclk; |
| 1498 | input soclk; |
| 1499 | |
| 1500 | output [145:0] dout; |
| 1501 | output scan_out; |
| 1502 | assign fdin[145:0] = din[145:0]; |
| 1503 | |
| 1504 | |
| 1505 | |
| 1506 | |
| 1507 | |
| 1508 | |
| 1509 | dff #(146) d0_0 ( |
| 1510 | .l1clk(l1clk), |
| 1511 | .siclk(siclk), |
| 1512 | .soclk(soclk), |
| 1513 | .d(fdin[145:0]), |
| 1514 | .si({scan_in,so[144:0]}), |
| 1515 | .so({so[144:0],scan_out}), |
| 1516 | .q(dout[145:0]) |
| 1517 | ); |
| 1518 | |
| 1519 | |
| 1520 | |
| 1521 | |
| 1522 | |
| 1523 | |
| 1524 | |
| 1525 | |
| 1526 | |
| 1527 | |
| 1528 | |
| 1529 | |
| 1530 | endmodule |
| 1531 | |
| 1532 | |
| 1533 | |
| 1534 | |
| 1535 | |
| 1536 | |
| 1537 | |
| 1538 | |
| 1539 | |
| 1540 | |
| 1541 | |
| 1542 | |
| 1543 | |
| 1544 | // any PARAMS parms go into naming of macro |
| 1545 | |
| 1546 | module ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_144 ( |
| 1547 | din, |
| 1548 | en, |
| 1549 | l1clk, |
| 1550 | scan_in, |
| 1551 | siclk, |
| 1552 | soclk, |
| 1553 | dout, |
| 1554 | scan_out); |
| 1555 | wire [143:0] fdin; |
| 1556 | wire [142:0] so; |
| 1557 | |
| 1558 | input [143:0] din; |
| 1559 | input en; |
| 1560 | input l1clk; |
| 1561 | input scan_in; |
| 1562 | |
| 1563 | |
| 1564 | input siclk; |
| 1565 | input soclk; |
| 1566 | |
| 1567 | output [143:0] dout; |
| 1568 | output scan_out; |
| 1569 | assign fdin[143:0] = (din[143:0] & {144{en}}) | (dout[143:0] & ~{144{en}}); |
| 1570 | |
| 1571 | |
| 1572 | |
| 1573 | |
| 1574 | |
| 1575 | |
| 1576 | dff #(144) d0_0 ( |
| 1577 | .l1clk(l1clk), |
| 1578 | .siclk(siclk), |
| 1579 | .soclk(soclk), |
| 1580 | .d(fdin[143:0]), |
| 1581 | .si({scan_in,so[142:0]}), |
| 1582 | .so({so[142:0],scan_out}), |
| 1583 | .q(dout[143:0]) |
| 1584 | ); |
| 1585 | |
| 1586 | |
| 1587 | |
| 1588 | |
| 1589 | |
| 1590 | |
| 1591 | |
| 1592 | |
| 1593 | |
| 1594 | |
| 1595 | |
| 1596 | |
| 1597 | endmodule |
| 1598 | |
| 1599 | |
| 1600 | |
| 1601 | |
| 1602 | |
| 1603 | |
| 1604 | // any PARAMS parms go into naming of macro |
| 1605 | |
| 1606 | module ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_154 ( |
| 1607 | din, |
| 1608 | en, |
| 1609 | l1clk, |
| 1610 | scan_in, |
| 1611 | siclk, |
| 1612 | soclk, |
| 1613 | dout, |
| 1614 | scan_out); |
| 1615 | wire [153:0] fdin; |
| 1616 | wire [152:0] so; |
| 1617 | |
| 1618 | input [153:0] din; |
| 1619 | input en; |
| 1620 | input l1clk; |
| 1621 | input scan_in; |
| 1622 | |
| 1623 | |
| 1624 | input siclk; |
| 1625 | input soclk; |
| 1626 | |
| 1627 | output [153:0] dout; |
| 1628 | output scan_out; |
| 1629 | assign fdin[153:0] = (din[153:0] & {154{en}}) | (dout[153:0] & ~{154{en}}); |
| 1630 | |
| 1631 | |
| 1632 | |
| 1633 | |
| 1634 | |
| 1635 | |
| 1636 | dff #(154) d0_0 ( |
| 1637 | .l1clk(l1clk), |
| 1638 | .siclk(siclk), |
| 1639 | .soclk(soclk), |
| 1640 | .d(fdin[153:0]), |
| 1641 | .si({scan_in,so[152:0]}), |
| 1642 | .so({so[152:0],scan_out}), |
| 1643 | .q(dout[153:0]) |
| 1644 | ); |
| 1645 | |
| 1646 | |
| 1647 | |
| 1648 | |
| 1649 | |
| 1650 | |
| 1651 | |
| 1652 | |
| 1653 | |
| 1654 | |
| 1655 | |
| 1656 | |
| 1657 | endmodule |
| 1658 | |
| 1659 | |
| 1660 | |
| 1661 | |
| 1662 | |
| 1663 | |
| 1664 | |
| 1665 | |
| 1666 | |
| 1667 | |
| 1668 | |
| 1669 | |
| 1670 | |
| 1671 | // any PARAMS parms go into naming of macro |
| 1672 | |
| 1673 | module ncu_i2cfcd_ctl_msff_ctl_macro__en_1__width_176 ( |
| 1674 | din, |
| 1675 | en, |
| 1676 | l1clk, |
| 1677 | scan_in, |
| 1678 | siclk, |
| 1679 | soclk, |
| 1680 | dout, |
| 1681 | scan_out); |
| 1682 | wire [175:0] fdin; |
| 1683 | wire [174:0] so; |
| 1684 | |
| 1685 | input [175:0] din; |
| 1686 | input en; |
| 1687 | input l1clk; |
| 1688 | input scan_in; |
| 1689 | |
| 1690 | |
| 1691 | input siclk; |
| 1692 | input soclk; |
| 1693 | |
| 1694 | output [175:0] dout; |
| 1695 | output scan_out; |
| 1696 | assign fdin[175:0] = (din[175:0] & {176{en}}) | (dout[175:0] & ~{176{en}}); |
| 1697 | |
| 1698 | |
| 1699 | |
| 1700 | |
| 1701 | |
| 1702 | |
| 1703 | dff #(176) d0_0 ( |
| 1704 | .l1clk(l1clk), |
| 1705 | .siclk(siclk), |
| 1706 | .soclk(soclk), |
| 1707 | .d(fdin[175:0]), |
| 1708 | .si({scan_in,so[174:0]}), |
| 1709 | .so({so[174:0],scan_out}), |
| 1710 | .q(dout[175:0]) |
| 1711 | ); |
| 1712 | |
| 1713 | |
| 1714 | |
| 1715 | |
| 1716 | |
| 1717 | |
| 1718 | |
| 1719 | |
| 1720 | |
| 1721 | |
| 1722 | |
| 1723 | |
| 1724 | endmodule |
| 1725 | |
| 1726 | |
| 1727 | |
| 1728 | |
| 1729 | |
| 1730 | |
| 1731 | |
| 1732 | |
| 1733 | |
| 1734 | // Description: Spare gate macro for control blocks |
| 1735 | // |
| 1736 | // Param num controls the number of times the macro is added |
| 1737 | // flops=0 can be used to use only combination spare logic |
| 1738 | |
| 1739 | |
| 1740 | module ncu_i2cfcd_ctl_spare_ctl_macro__num_11 ( |
| 1741 | l1clk, |
| 1742 | scan_in, |
| 1743 | siclk, |
| 1744 | soclk, |
| 1745 | scan_out); |
| 1746 | wire si_0; |
| 1747 | wire so_0; |
| 1748 | wire spare0_flop_unused; |
| 1749 | wire spare0_buf_32x_unused; |
| 1750 | wire spare0_nand3_8x_unused; |
| 1751 | wire spare0_inv_8x_unused; |
| 1752 | wire spare0_aoi22_4x_unused; |
| 1753 | wire spare0_buf_8x_unused; |
| 1754 | wire spare0_oai22_4x_unused; |
| 1755 | wire spare0_inv_16x_unused; |
| 1756 | wire spare0_nand2_16x_unused; |
| 1757 | wire spare0_nor3_4x_unused; |
| 1758 | wire spare0_nand2_8x_unused; |
| 1759 | wire spare0_buf_16x_unused; |
| 1760 | wire spare0_nor2_16x_unused; |
| 1761 | wire spare0_inv_32x_unused; |
| 1762 | wire si_1; |
| 1763 | wire so_1; |
| 1764 | wire spare1_flop_unused; |
| 1765 | wire spare1_buf_32x_unused; |
| 1766 | wire spare1_nand3_8x_unused; |
| 1767 | wire spare1_inv_8x_unused; |
| 1768 | wire spare1_aoi22_4x_unused; |
| 1769 | wire spare1_buf_8x_unused; |
| 1770 | wire spare1_oai22_4x_unused; |
| 1771 | wire spare1_inv_16x_unused; |
| 1772 | wire spare1_nand2_16x_unused; |
| 1773 | wire spare1_nor3_4x_unused; |
| 1774 | wire spare1_nand2_8x_unused; |
| 1775 | wire spare1_buf_16x_unused; |
| 1776 | wire spare1_nor2_16x_unused; |
| 1777 | wire spare1_inv_32x_unused; |
| 1778 | wire si_2; |
| 1779 | wire so_2; |
| 1780 | wire spare2_flop_unused; |
| 1781 | wire spare2_buf_32x_unused; |
| 1782 | wire spare2_nand3_8x_unused; |
| 1783 | wire spare2_inv_8x_unused; |
| 1784 | wire spare2_aoi22_4x_unused; |
| 1785 | wire spare2_buf_8x_unused; |
| 1786 | wire spare2_oai22_4x_unused; |
| 1787 | wire spare2_inv_16x_unused; |
| 1788 | wire spare2_nand2_16x_unused; |
| 1789 | wire spare2_nor3_4x_unused; |
| 1790 | wire spare2_nand2_8x_unused; |
| 1791 | wire spare2_buf_16x_unused; |
| 1792 | wire spare2_nor2_16x_unused; |
| 1793 | wire spare2_inv_32x_unused; |
| 1794 | wire si_3; |
| 1795 | wire so_3; |
| 1796 | wire spare3_flop_unused; |
| 1797 | wire spare3_buf_32x_unused; |
| 1798 | wire spare3_nand3_8x_unused; |
| 1799 | wire spare3_inv_8x_unused; |
| 1800 | wire spare3_aoi22_4x_unused; |
| 1801 | wire spare3_buf_8x_unused; |
| 1802 | wire spare3_oai22_4x_unused; |
| 1803 | wire spare3_inv_16x_unused; |
| 1804 | wire spare3_nand2_16x_unused; |
| 1805 | wire spare3_nor3_4x_unused; |
| 1806 | wire spare3_nand2_8x_unused; |
| 1807 | wire spare3_buf_16x_unused; |
| 1808 | wire spare3_nor2_16x_unused; |
| 1809 | wire spare3_inv_32x_unused; |
| 1810 | wire si_4; |
| 1811 | wire so_4; |
| 1812 | wire spare4_flop_unused; |
| 1813 | wire spare4_buf_32x_unused; |
| 1814 | wire spare4_nand3_8x_unused; |
| 1815 | wire spare4_inv_8x_unused; |
| 1816 | wire spare4_aoi22_4x_unused; |
| 1817 | wire spare4_buf_8x_unused; |
| 1818 | wire spare4_oai22_4x_unused; |
| 1819 | wire spare4_inv_16x_unused; |
| 1820 | wire spare4_nand2_16x_unused; |
| 1821 | wire spare4_nor3_4x_unused; |
| 1822 | wire spare4_nand2_8x_unused; |
| 1823 | wire spare4_buf_16x_unused; |
| 1824 | wire spare4_nor2_16x_unused; |
| 1825 | wire spare4_inv_32x_unused; |
| 1826 | wire si_5; |
| 1827 | wire so_5; |
| 1828 | wire spare5_flop_unused; |
| 1829 | wire spare5_buf_32x_unused; |
| 1830 | wire spare5_nand3_8x_unused; |
| 1831 | wire spare5_inv_8x_unused; |
| 1832 | wire spare5_aoi22_4x_unused; |
| 1833 | wire spare5_buf_8x_unused; |
| 1834 | wire spare5_oai22_4x_unused; |
| 1835 | wire spare5_inv_16x_unused; |
| 1836 | wire spare5_nand2_16x_unused; |
| 1837 | wire spare5_nor3_4x_unused; |
| 1838 | wire spare5_nand2_8x_unused; |
| 1839 | wire spare5_buf_16x_unused; |
| 1840 | wire spare5_nor2_16x_unused; |
| 1841 | wire spare5_inv_32x_unused; |
| 1842 | wire si_6; |
| 1843 | wire so_6; |
| 1844 | wire spare6_flop_unused; |
| 1845 | wire spare6_buf_32x_unused; |
| 1846 | wire spare6_nand3_8x_unused; |
| 1847 | wire spare6_inv_8x_unused; |
| 1848 | wire spare6_aoi22_4x_unused; |
| 1849 | wire spare6_buf_8x_unused; |
| 1850 | wire spare6_oai22_4x_unused; |
| 1851 | wire spare6_inv_16x_unused; |
| 1852 | wire spare6_nand2_16x_unused; |
| 1853 | wire spare6_nor3_4x_unused; |
| 1854 | wire spare6_nand2_8x_unused; |
| 1855 | wire spare6_buf_16x_unused; |
| 1856 | wire spare6_nor2_16x_unused; |
| 1857 | wire spare6_inv_32x_unused; |
| 1858 | wire si_7; |
| 1859 | wire so_7; |
| 1860 | wire spare7_flop_unused; |
| 1861 | wire spare7_buf_32x_unused; |
| 1862 | wire spare7_nand3_8x_unused; |
| 1863 | wire spare7_inv_8x_unused; |
| 1864 | wire spare7_aoi22_4x_unused; |
| 1865 | wire spare7_buf_8x_unused; |
| 1866 | wire spare7_oai22_4x_unused; |
| 1867 | wire spare7_inv_16x_unused; |
| 1868 | wire spare7_nand2_16x_unused; |
| 1869 | wire spare7_nor3_4x_unused; |
| 1870 | wire spare7_nand2_8x_unused; |
| 1871 | wire spare7_buf_16x_unused; |
| 1872 | wire spare7_nor2_16x_unused; |
| 1873 | wire spare7_inv_32x_unused; |
| 1874 | wire si_8; |
| 1875 | wire so_8; |
| 1876 | wire spare8_flop_unused; |
| 1877 | wire spare8_buf_32x_unused; |
| 1878 | wire spare8_nand3_8x_unused; |
| 1879 | wire spare8_inv_8x_unused; |
| 1880 | wire spare8_aoi22_4x_unused; |
| 1881 | wire spare8_buf_8x_unused; |
| 1882 | wire spare8_oai22_4x_unused; |
| 1883 | wire spare8_inv_16x_unused; |
| 1884 | wire spare8_nand2_16x_unused; |
| 1885 | wire spare8_nor3_4x_unused; |
| 1886 | wire spare8_nand2_8x_unused; |
| 1887 | wire spare8_buf_16x_unused; |
| 1888 | wire spare8_nor2_16x_unused; |
| 1889 | wire spare8_inv_32x_unused; |
| 1890 | wire si_9; |
| 1891 | wire so_9; |
| 1892 | wire spare9_flop_unused; |
| 1893 | wire spare9_buf_32x_unused; |
| 1894 | wire spare9_nand3_8x_unused; |
| 1895 | wire spare9_inv_8x_unused; |
| 1896 | wire spare9_aoi22_4x_unused; |
| 1897 | wire spare9_buf_8x_unused; |
| 1898 | wire spare9_oai22_4x_unused; |
| 1899 | wire spare9_inv_16x_unused; |
| 1900 | wire spare9_nand2_16x_unused; |
| 1901 | wire spare9_nor3_4x_unused; |
| 1902 | wire spare9_nand2_8x_unused; |
| 1903 | wire spare9_buf_16x_unused; |
| 1904 | wire spare9_nor2_16x_unused; |
| 1905 | wire spare9_inv_32x_unused; |
| 1906 | wire si_10; |
| 1907 | wire so_10; |
| 1908 | wire spare10_flop_unused; |
| 1909 | wire spare10_buf_32x_unused; |
| 1910 | wire spare10_nand3_8x_unused; |
| 1911 | wire spare10_inv_8x_unused; |
| 1912 | wire spare10_aoi22_4x_unused; |
| 1913 | wire spare10_buf_8x_unused; |
| 1914 | wire spare10_oai22_4x_unused; |
| 1915 | wire spare10_inv_16x_unused; |
| 1916 | wire spare10_nand2_16x_unused; |
| 1917 | wire spare10_nor3_4x_unused; |
| 1918 | wire spare10_nand2_8x_unused; |
| 1919 | wire spare10_buf_16x_unused; |
| 1920 | wire spare10_nor2_16x_unused; |
| 1921 | wire spare10_inv_32x_unused; |
| 1922 | |
| 1923 | |
| 1924 | input l1clk; |
| 1925 | input scan_in; |
| 1926 | input siclk; |
| 1927 | input soclk; |
| 1928 | output scan_out; |
| 1929 | |
| 1930 | cl_sc1_msff_8x spare0_flop (.l1clk(l1clk), |
| 1931 | .siclk(siclk), |
| 1932 | .soclk(soclk), |
| 1933 | .si(si_0), |
| 1934 | .so(so_0), |
| 1935 | .d(1'b0), |
| 1936 | .q(spare0_flop_unused)); |
| 1937 | assign si_0 = scan_in; |
| 1938 | |
| 1939 | cl_u1_buf_32x spare0_buf_32x (.in(1'b1), |
| 1940 | .out(spare0_buf_32x_unused)); |
| 1941 | cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1), |
| 1942 | .in1(1'b1), |
| 1943 | .in2(1'b1), |
| 1944 | .out(spare0_nand3_8x_unused)); |
| 1945 | cl_u1_inv_8x spare0_inv_8x (.in(1'b1), |
| 1946 | .out(spare0_inv_8x_unused)); |
| 1947 | cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1), |
| 1948 | .in01(1'b1), |
| 1949 | .in10(1'b1), |
| 1950 | .in11(1'b1), |
| 1951 | .out(spare0_aoi22_4x_unused)); |
| 1952 | cl_u1_buf_8x spare0_buf_8x (.in(1'b1), |
| 1953 | .out(spare0_buf_8x_unused)); |
| 1954 | cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1), |
| 1955 | .in01(1'b1), |
| 1956 | .in10(1'b1), |
| 1957 | .in11(1'b1), |
| 1958 | .out(spare0_oai22_4x_unused)); |
| 1959 | cl_u1_inv_16x spare0_inv_16x (.in(1'b1), |
| 1960 | .out(spare0_inv_16x_unused)); |
| 1961 | cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1), |
| 1962 | .in1(1'b1), |
| 1963 | .out(spare0_nand2_16x_unused)); |
| 1964 | cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0), |
| 1965 | .in1(1'b0), |
| 1966 | .in2(1'b0), |
| 1967 | .out(spare0_nor3_4x_unused)); |
| 1968 | cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1), |
| 1969 | .in1(1'b1), |
| 1970 | .out(spare0_nand2_8x_unused)); |
| 1971 | cl_u1_buf_16x spare0_buf_16x (.in(1'b1), |
| 1972 | .out(spare0_buf_16x_unused)); |
| 1973 | cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0), |
| 1974 | .in1(1'b0), |
| 1975 | .out(spare0_nor2_16x_unused)); |
| 1976 | cl_u1_inv_32x spare0_inv_32x (.in(1'b1), |
| 1977 | .out(spare0_inv_32x_unused)); |
| 1978 | |
| 1979 | cl_sc1_msff_8x spare1_flop (.l1clk(l1clk), |
| 1980 | .siclk(siclk), |
| 1981 | .soclk(soclk), |
| 1982 | .si(si_1), |
| 1983 | .so(so_1), |
| 1984 | .d(1'b0), |
| 1985 | .q(spare1_flop_unused)); |
| 1986 | assign si_1 = so_0; |
| 1987 | |
| 1988 | cl_u1_buf_32x spare1_buf_32x (.in(1'b1), |
| 1989 | .out(spare1_buf_32x_unused)); |
| 1990 | cl_u1_nand3_8x spare1_nand3_8x (.in0(1'b1), |
| 1991 | .in1(1'b1), |
| 1992 | .in2(1'b1), |
| 1993 | .out(spare1_nand3_8x_unused)); |
| 1994 | cl_u1_inv_8x spare1_inv_8x (.in(1'b1), |
| 1995 | .out(spare1_inv_8x_unused)); |
| 1996 | cl_u1_aoi22_4x spare1_aoi22_4x (.in00(1'b1), |
| 1997 | .in01(1'b1), |
| 1998 | .in10(1'b1), |
| 1999 | .in11(1'b1), |
| 2000 | .out(spare1_aoi22_4x_unused)); |
| 2001 | cl_u1_buf_8x spare1_buf_8x (.in(1'b1), |
| 2002 | .out(spare1_buf_8x_unused)); |
| 2003 | cl_u1_oai22_4x spare1_oai22_4x (.in00(1'b1), |
| 2004 | .in01(1'b1), |
| 2005 | .in10(1'b1), |
| 2006 | .in11(1'b1), |
| 2007 | .out(spare1_oai22_4x_unused)); |
| 2008 | cl_u1_inv_16x spare1_inv_16x (.in(1'b1), |
| 2009 | .out(spare1_inv_16x_unused)); |
| 2010 | cl_u1_nand2_16x spare1_nand2_16x (.in0(1'b1), |
| 2011 | .in1(1'b1), |
| 2012 | .out(spare1_nand2_16x_unused)); |
| 2013 | cl_u1_nor3_4x spare1_nor3_4x (.in0(1'b0), |
| 2014 | .in1(1'b0), |
| 2015 | .in2(1'b0), |
| 2016 | .out(spare1_nor3_4x_unused)); |
| 2017 | cl_u1_nand2_8x spare1_nand2_8x (.in0(1'b1), |
| 2018 | .in1(1'b1), |
| 2019 | .out(spare1_nand2_8x_unused)); |
| 2020 | cl_u1_buf_16x spare1_buf_16x (.in(1'b1), |
| 2021 | .out(spare1_buf_16x_unused)); |
| 2022 | cl_u1_nor2_16x spare1_nor2_16x (.in0(1'b0), |
| 2023 | .in1(1'b0), |
| 2024 | .out(spare1_nor2_16x_unused)); |
| 2025 | cl_u1_inv_32x spare1_inv_32x (.in(1'b1), |
| 2026 | .out(spare1_inv_32x_unused)); |
| 2027 | |
| 2028 | cl_sc1_msff_8x spare2_flop (.l1clk(l1clk), |
| 2029 | .siclk(siclk), |
| 2030 | .soclk(soclk), |
| 2031 | .si(si_2), |
| 2032 | .so(so_2), |
| 2033 | .d(1'b0), |
| 2034 | .q(spare2_flop_unused)); |
| 2035 | assign si_2 = so_1; |
| 2036 | |
| 2037 | cl_u1_buf_32x spare2_buf_32x (.in(1'b1), |
| 2038 | .out(spare2_buf_32x_unused)); |
| 2039 | cl_u1_nand3_8x spare2_nand3_8x (.in0(1'b1), |
| 2040 | .in1(1'b1), |
| 2041 | .in2(1'b1), |
| 2042 | .out(spare2_nand3_8x_unused)); |
| 2043 | cl_u1_inv_8x spare2_inv_8x (.in(1'b1), |
| 2044 | .out(spare2_inv_8x_unused)); |
| 2045 | cl_u1_aoi22_4x spare2_aoi22_4x (.in00(1'b1), |
| 2046 | .in01(1'b1), |
| 2047 | .in10(1'b1), |
| 2048 | .in11(1'b1), |
| 2049 | .out(spare2_aoi22_4x_unused)); |
| 2050 | cl_u1_buf_8x spare2_buf_8x (.in(1'b1), |
| 2051 | .out(spare2_buf_8x_unused)); |
| 2052 | cl_u1_oai22_4x spare2_oai22_4x (.in00(1'b1), |
| 2053 | .in01(1'b1), |
| 2054 | .in10(1'b1), |
| 2055 | .in11(1'b1), |
| 2056 | .out(spare2_oai22_4x_unused)); |
| 2057 | cl_u1_inv_16x spare2_inv_16x (.in(1'b1), |
| 2058 | .out(spare2_inv_16x_unused)); |
| 2059 | cl_u1_nand2_16x spare2_nand2_16x (.in0(1'b1), |
| 2060 | .in1(1'b1), |
| 2061 | .out(spare2_nand2_16x_unused)); |
| 2062 | cl_u1_nor3_4x spare2_nor3_4x (.in0(1'b0), |
| 2063 | .in1(1'b0), |
| 2064 | .in2(1'b0), |
| 2065 | .out(spare2_nor3_4x_unused)); |
| 2066 | cl_u1_nand2_8x spare2_nand2_8x (.in0(1'b1), |
| 2067 | .in1(1'b1), |
| 2068 | .out(spare2_nand2_8x_unused)); |
| 2069 | cl_u1_buf_16x spare2_buf_16x (.in(1'b1), |
| 2070 | .out(spare2_buf_16x_unused)); |
| 2071 | cl_u1_nor2_16x spare2_nor2_16x (.in0(1'b0), |
| 2072 | .in1(1'b0), |
| 2073 | .out(spare2_nor2_16x_unused)); |
| 2074 | cl_u1_inv_32x spare2_inv_32x (.in(1'b1), |
| 2075 | .out(spare2_inv_32x_unused)); |
| 2076 | |
| 2077 | cl_sc1_msff_8x spare3_flop (.l1clk(l1clk), |
| 2078 | .siclk(siclk), |
| 2079 | .soclk(soclk), |
| 2080 | .si(si_3), |
| 2081 | .so(so_3), |
| 2082 | .d(1'b0), |
| 2083 | .q(spare3_flop_unused)); |
| 2084 | assign si_3 = so_2; |
| 2085 | |
| 2086 | cl_u1_buf_32x spare3_buf_32x (.in(1'b1), |
| 2087 | .out(spare3_buf_32x_unused)); |
| 2088 | cl_u1_nand3_8x spare3_nand3_8x (.in0(1'b1), |
| 2089 | .in1(1'b1), |
| 2090 | .in2(1'b1), |
| 2091 | .out(spare3_nand3_8x_unused)); |
| 2092 | cl_u1_inv_8x spare3_inv_8x (.in(1'b1), |
| 2093 | .out(spare3_inv_8x_unused)); |
| 2094 | cl_u1_aoi22_4x spare3_aoi22_4x (.in00(1'b1), |
| 2095 | .in01(1'b1), |
| 2096 | .in10(1'b1), |
| 2097 | .in11(1'b1), |
| 2098 | .out(spare3_aoi22_4x_unused)); |
| 2099 | cl_u1_buf_8x spare3_buf_8x (.in(1'b1), |
| 2100 | .out(spare3_buf_8x_unused)); |
| 2101 | cl_u1_oai22_4x spare3_oai22_4x (.in00(1'b1), |
| 2102 | .in01(1'b1), |
| 2103 | .in10(1'b1), |
| 2104 | .in11(1'b1), |
| 2105 | .out(spare3_oai22_4x_unused)); |
| 2106 | cl_u1_inv_16x spare3_inv_16x (.in(1'b1), |
| 2107 | .out(spare3_inv_16x_unused)); |
| 2108 | cl_u1_nand2_16x spare3_nand2_16x (.in0(1'b1), |
| 2109 | .in1(1'b1), |
| 2110 | .out(spare3_nand2_16x_unused)); |
| 2111 | cl_u1_nor3_4x spare3_nor3_4x (.in0(1'b0), |
| 2112 | .in1(1'b0), |
| 2113 | .in2(1'b0), |
| 2114 | .out(spare3_nor3_4x_unused)); |
| 2115 | cl_u1_nand2_8x spare3_nand2_8x (.in0(1'b1), |
| 2116 | .in1(1'b1), |
| 2117 | .out(spare3_nand2_8x_unused)); |
| 2118 | cl_u1_buf_16x spare3_buf_16x (.in(1'b1), |
| 2119 | .out(spare3_buf_16x_unused)); |
| 2120 | cl_u1_nor2_16x spare3_nor2_16x (.in0(1'b0), |
| 2121 | .in1(1'b0), |
| 2122 | .out(spare3_nor2_16x_unused)); |
| 2123 | cl_u1_inv_32x spare3_inv_32x (.in(1'b1), |
| 2124 | .out(spare3_inv_32x_unused)); |
| 2125 | |
| 2126 | cl_sc1_msff_8x spare4_flop (.l1clk(l1clk), |
| 2127 | .siclk(siclk), |
| 2128 | .soclk(soclk), |
| 2129 | .si(si_4), |
| 2130 | .so(so_4), |
| 2131 | .d(1'b0), |
| 2132 | .q(spare4_flop_unused)); |
| 2133 | assign si_4 = so_3; |
| 2134 | |
| 2135 | cl_u1_buf_32x spare4_buf_32x (.in(1'b1), |
| 2136 | .out(spare4_buf_32x_unused)); |
| 2137 | cl_u1_nand3_8x spare4_nand3_8x (.in0(1'b1), |
| 2138 | .in1(1'b1), |
| 2139 | .in2(1'b1), |
| 2140 | .out(spare4_nand3_8x_unused)); |
| 2141 | cl_u1_inv_8x spare4_inv_8x (.in(1'b1), |
| 2142 | .out(spare4_inv_8x_unused)); |
| 2143 | cl_u1_aoi22_4x spare4_aoi22_4x (.in00(1'b1), |
| 2144 | .in01(1'b1), |
| 2145 | .in10(1'b1), |
| 2146 | .in11(1'b1), |
| 2147 | .out(spare4_aoi22_4x_unused)); |
| 2148 | cl_u1_buf_8x spare4_buf_8x (.in(1'b1), |
| 2149 | .out(spare4_buf_8x_unused)); |
| 2150 | cl_u1_oai22_4x spare4_oai22_4x (.in00(1'b1), |
| 2151 | .in01(1'b1), |
| 2152 | .in10(1'b1), |
| 2153 | .in11(1'b1), |
| 2154 | .out(spare4_oai22_4x_unused)); |
| 2155 | cl_u1_inv_16x spare4_inv_16x (.in(1'b1), |
| 2156 | .out(spare4_inv_16x_unused)); |
| 2157 | cl_u1_nand2_16x spare4_nand2_16x (.in0(1'b1), |
| 2158 | .in1(1'b1), |
| 2159 | .out(spare4_nand2_16x_unused)); |
| 2160 | cl_u1_nor3_4x spare4_nor3_4x (.in0(1'b0), |
| 2161 | .in1(1'b0), |
| 2162 | .in2(1'b0), |
| 2163 | .out(spare4_nor3_4x_unused)); |
| 2164 | cl_u1_nand2_8x spare4_nand2_8x (.in0(1'b1), |
| 2165 | .in1(1'b1), |
| 2166 | .out(spare4_nand2_8x_unused)); |
| 2167 | cl_u1_buf_16x spare4_buf_16x (.in(1'b1), |
| 2168 | .out(spare4_buf_16x_unused)); |
| 2169 | cl_u1_nor2_16x spare4_nor2_16x (.in0(1'b0), |
| 2170 | .in1(1'b0), |
| 2171 | .out(spare4_nor2_16x_unused)); |
| 2172 | cl_u1_inv_32x spare4_inv_32x (.in(1'b1), |
| 2173 | .out(spare4_inv_32x_unused)); |
| 2174 | |
| 2175 | cl_sc1_msff_8x spare5_flop (.l1clk(l1clk), |
| 2176 | .siclk(siclk), |
| 2177 | .soclk(soclk), |
| 2178 | .si(si_5), |
| 2179 | .so(so_5), |
| 2180 | .d(1'b0), |
| 2181 | .q(spare5_flop_unused)); |
| 2182 | assign si_5 = so_4; |
| 2183 | |
| 2184 | cl_u1_buf_32x spare5_buf_32x (.in(1'b1), |
| 2185 | .out(spare5_buf_32x_unused)); |
| 2186 | cl_u1_nand3_8x spare5_nand3_8x (.in0(1'b1), |
| 2187 | .in1(1'b1), |
| 2188 | .in2(1'b1), |
| 2189 | .out(spare5_nand3_8x_unused)); |
| 2190 | cl_u1_inv_8x spare5_inv_8x (.in(1'b1), |
| 2191 | .out(spare5_inv_8x_unused)); |
| 2192 | cl_u1_aoi22_4x spare5_aoi22_4x (.in00(1'b1), |
| 2193 | .in01(1'b1), |
| 2194 | .in10(1'b1), |
| 2195 | .in11(1'b1), |
| 2196 | .out(spare5_aoi22_4x_unused)); |
| 2197 | cl_u1_buf_8x spare5_buf_8x (.in(1'b1), |
| 2198 | .out(spare5_buf_8x_unused)); |
| 2199 | cl_u1_oai22_4x spare5_oai22_4x (.in00(1'b1), |
| 2200 | .in01(1'b1), |
| 2201 | .in10(1'b1), |
| 2202 | .in11(1'b1), |
| 2203 | .out(spare5_oai22_4x_unused)); |
| 2204 | cl_u1_inv_16x spare5_inv_16x (.in(1'b1), |
| 2205 | .out(spare5_inv_16x_unused)); |
| 2206 | cl_u1_nand2_16x spare5_nand2_16x (.in0(1'b1), |
| 2207 | .in1(1'b1), |
| 2208 | .out(spare5_nand2_16x_unused)); |
| 2209 | cl_u1_nor3_4x spare5_nor3_4x (.in0(1'b0), |
| 2210 | .in1(1'b0), |
| 2211 | .in2(1'b0), |
| 2212 | .out(spare5_nor3_4x_unused)); |
| 2213 | cl_u1_nand2_8x spare5_nand2_8x (.in0(1'b1), |
| 2214 | .in1(1'b1), |
| 2215 | .out(spare5_nand2_8x_unused)); |
| 2216 | cl_u1_buf_16x spare5_buf_16x (.in(1'b1), |
| 2217 | .out(spare5_buf_16x_unused)); |
| 2218 | cl_u1_nor2_16x spare5_nor2_16x (.in0(1'b0), |
| 2219 | .in1(1'b0), |
| 2220 | .out(spare5_nor2_16x_unused)); |
| 2221 | cl_u1_inv_32x spare5_inv_32x (.in(1'b1), |
| 2222 | .out(spare5_inv_32x_unused)); |
| 2223 | |
| 2224 | cl_sc1_msff_8x spare6_flop (.l1clk(l1clk), |
| 2225 | .siclk(siclk), |
| 2226 | .soclk(soclk), |
| 2227 | .si(si_6), |
| 2228 | .so(so_6), |
| 2229 | .d(1'b0), |
| 2230 | .q(spare6_flop_unused)); |
| 2231 | assign si_6 = so_5; |
| 2232 | |
| 2233 | cl_u1_buf_32x spare6_buf_32x (.in(1'b1), |
| 2234 | .out(spare6_buf_32x_unused)); |
| 2235 | cl_u1_nand3_8x spare6_nand3_8x (.in0(1'b1), |
| 2236 | .in1(1'b1), |
| 2237 | .in2(1'b1), |
| 2238 | .out(spare6_nand3_8x_unused)); |
| 2239 | cl_u1_inv_8x spare6_inv_8x (.in(1'b1), |
| 2240 | .out(spare6_inv_8x_unused)); |
| 2241 | cl_u1_aoi22_4x spare6_aoi22_4x (.in00(1'b1), |
| 2242 | .in01(1'b1), |
| 2243 | .in10(1'b1), |
| 2244 | .in11(1'b1), |
| 2245 | .out(spare6_aoi22_4x_unused)); |
| 2246 | cl_u1_buf_8x spare6_buf_8x (.in(1'b1), |
| 2247 | .out(spare6_buf_8x_unused)); |
| 2248 | cl_u1_oai22_4x spare6_oai22_4x (.in00(1'b1), |
| 2249 | .in01(1'b1), |
| 2250 | .in10(1'b1), |
| 2251 | .in11(1'b1), |
| 2252 | .out(spare6_oai22_4x_unused)); |
| 2253 | cl_u1_inv_16x spare6_inv_16x (.in(1'b1), |
| 2254 | .out(spare6_inv_16x_unused)); |
| 2255 | cl_u1_nand2_16x spare6_nand2_16x (.in0(1'b1), |
| 2256 | .in1(1'b1), |
| 2257 | .out(spare6_nand2_16x_unused)); |
| 2258 | cl_u1_nor3_4x spare6_nor3_4x (.in0(1'b0), |
| 2259 | .in1(1'b0), |
| 2260 | .in2(1'b0), |
| 2261 | .out(spare6_nor3_4x_unused)); |
| 2262 | cl_u1_nand2_8x spare6_nand2_8x (.in0(1'b1), |
| 2263 | .in1(1'b1), |
| 2264 | .out(spare6_nand2_8x_unused)); |
| 2265 | cl_u1_buf_16x spare6_buf_16x (.in(1'b1), |
| 2266 | .out(spare6_buf_16x_unused)); |
| 2267 | cl_u1_nor2_16x spare6_nor2_16x (.in0(1'b0), |
| 2268 | .in1(1'b0), |
| 2269 | .out(spare6_nor2_16x_unused)); |
| 2270 | cl_u1_inv_32x spare6_inv_32x (.in(1'b1), |
| 2271 | .out(spare6_inv_32x_unused)); |
| 2272 | |
| 2273 | cl_sc1_msff_8x spare7_flop (.l1clk(l1clk), |
| 2274 | .siclk(siclk), |
| 2275 | .soclk(soclk), |
| 2276 | .si(si_7), |
| 2277 | .so(so_7), |
| 2278 | .d(1'b0), |
| 2279 | .q(spare7_flop_unused)); |
| 2280 | assign si_7 = so_6; |
| 2281 | |
| 2282 | cl_u1_buf_32x spare7_buf_32x (.in(1'b1), |
| 2283 | .out(spare7_buf_32x_unused)); |
| 2284 | cl_u1_nand3_8x spare7_nand3_8x (.in0(1'b1), |
| 2285 | .in1(1'b1), |
| 2286 | .in2(1'b1), |
| 2287 | .out(spare7_nand3_8x_unused)); |
| 2288 | cl_u1_inv_8x spare7_inv_8x (.in(1'b1), |
| 2289 | .out(spare7_inv_8x_unused)); |
| 2290 | cl_u1_aoi22_4x spare7_aoi22_4x (.in00(1'b1), |
| 2291 | .in01(1'b1), |
| 2292 | .in10(1'b1), |
| 2293 | .in11(1'b1), |
| 2294 | .out(spare7_aoi22_4x_unused)); |
| 2295 | cl_u1_buf_8x spare7_buf_8x (.in(1'b1), |
| 2296 | .out(spare7_buf_8x_unused)); |
| 2297 | cl_u1_oai22_4x spare7_oai22_4x (.in00(1'b1), |
| 2298 | .in01(1'b1), |
| 2299 | .in10(1'b1), |
| 2300 | .in11(1'b1), |
| 2301 | .out(spare7_oai22_4x_unused)); |
| 2302 | cl_u1_inv_16x spare7_inv_16x (.in(1'b1), |
| 2303 | .out(spare7_inv_16x_unused)); |
| 2304 | cl_u1_nand2_16x spare7_nand2_16x (.in0(1'b1), |
| 2305 | .in1(1'b1), |
| 2306 | .out(spare7_nand2_16x_unused)); |
| 2307 | cl_u1_nor3_4x spare7_nor3_4x (.in0(1'b0), |
| 2308 | .in1(1'b0), |
| 2309 | .in2(1'b0), |
| 2310 | .out(spare7_nor3_4x_unused)); |
| 2311 | cl_u1_nand2_8x spare7_nand2_8x (.in0(1'b1), |
| 2312 | .in1(1'b1), |
| 2313 | .out(spare7_nand2_8x_unused)); |
| 2314 | cl_u1_buf_16x spare7_buf_16x (.in(1'b1), |
| 2315 | .out(spare7_buf_16x_unused)); |
| 2316 | cl_u1_nor2_16x spare7_nor2_16x (.in0(1'b0), |
| 2317 | .in1(1'b0), |
| 2318 | .out(spare7_nor2_16x_unused)); |
| 2319 | cl_u1_inv_32x spare7_inv_32x (.in(1'b1), |
| 2320 | .out(spare7_inv_32x_unused)); |
| 2321 | |
| 2322 | cl_sc1_msff_8x spare8_flop (.l1clk(l1clk), |
| 2323 | .siclk(siclk), |
| 2324 | .soclk(soclk), |
| 2325 | .si(si_8), |
| 2326 | .so(so_8), |
| 2327 | .d(1'b0), |
| 2328 | .q(spare8_flop_unused)); |
| 2329 | assign si_8 = so_7; |
| 2330 | |
| 2331 | cl_u1_buf_32x spare8_buf_32x (.in(1'b1), |
| 2332 | .out(spare8_buf_32x_unused)); |
| 2333 | cl_u1_nand3_8x spare8_nand3_8x (.in0(1'b1), |
| 2334 | .in1(1'b1), |
| 2335 | .in2(1'b1), |
| 2336 | .out(spare8_nand3_8x_unused)); |
| 2337 | cl_u1_inv_8x spare8_inv_8x (.in(1'b1), |
| 2338 | .out(spare8_inv_8x_unused)); |
| 2339 | cl_u1_aoi22_4x spare8_aoi22_4x (.in00(1'b1), |
| 2340 | .in01(1'b1), |
| 2341 | .in10(1'b1), |
| 2342 | .in11(1'b1), |
| 2343 | .out(spare8_aoi22_4x_unused)); |
| 2344 | cl_u1_buf_8x spare8_buf_8x (.in(1'b1), |
| 2345 | .out(spare8_buf_8x_unused)); |
| 2346 | cl_u1_oai22_4x spare8_oai22_4x (.in00(1'b1), |
| 2347 | .in01(1'b1), |
| 2348 | .in10(1'b1), |
| 2349 | .in11(1'b1), |
| 2350 | .out(spare8_oai22_4x_unused)); |
| 2351 | cl_u1_inv_16x spare8_inv_16x (.in(1'b1), |
| 2352 | .out(spare8_inv_16x_unused)); |
| 2353 | cl_u1_nand2_16x spare8_nand2_16x (.in0(1'b1), |
| 2354 | .in1(1'b1), |
| 2355 | .out(spare8_nand2_16x_unused)); |
| 2356 | cl_u1_nor3_4x spare8_nor3_4x (.in0(1'b0), |
| 2357 | .in1(1'b0), |
| 2358 | .in2(1'b0), |
| 2359 | .out(spare8_nor3_4x_unused)); |
| 2360 | cl_u1_nand2_8x spare8_nand2_8x (.in0(1'b1), |
| 2361 | .in1(1'b1), |
| 2362 | .out(spare8_nand2_8x_unused)); |
| 2363 | cl_u1_buf_16x spare8_buf_16x (.in(1'b1), |
| 2364 | .out(spare8_buf_16x_unused)); |
| 2365 | cl_u1_nor2_16x spare8_nor2_16x (.in0(1'b0), |
| 2366 | .in1(1'b0), |
| 2367 | .out(spare8_nor2_16x_unused)); |
| 2368 | cl_u1_inv_32x spare8_inv_32x (.in(1'b1), |
| 2369 | .out(spare8_inv_32x_unused)); |
| 2370 | |
| 2371 | cl_sc1_msff_8x spare9_flop (.l1clk(l1clk), |
| 2372 | .siclk(siclk), |
| 2373 | .soclk(soclk), |
| 2374 | .si(si_9), |
| 2375 | .so(so_9), |
| 2376 | .d(1'b0), |
| 2377 | .q(spare9_flop_unused)); |
| 2378 | assign si_9 = so_8; |
| 2379 | |
| 2380 | cl_u1_buf_32x spare9_buf_32x (.in(1'b1), |
| 2381 | .out(spare9_buf_32x_unused)); |
| 2382 | cl_u1_nand3_8x spare9_nand3_8x (.in0(1'b1), |
| 2383 | .in1(1'b1), |
| 2384 | .in2(1'b1), |
| 2385 | .out(spare9_nand3_8x_unused)); |
| 2386 | cl_u1_inv_8x spare9_inv_8x (.in(1'b1), |
| 2387 | .out(spare9_inv_8x_unused)); |
| 2388 | cl_u1_aoi22_4x spare9_aoi22_4x (.in00(1'b1), |
| 2389 | .in01(1'b1), |
| 2390 | .in10(1'b1), |
| 2391 | .in11(1'b1), |
| 2392 | .out(spare9_aoi22_4x_unused)); |
| 2393 | cl_u1_buf_8x spare9_buf_8x (.in(1'b1), |
| 2394 | .out(spare9_buf_8x_unused)); |
| 2395 | cl_u1_oai22_4x spare9_oai22_4x (.in00(1'b1), |
| 2396 | .in01(1'b1), |
| 2397 | .in10(1'b1), |
| 2398 | .in11(1'b1), |
| 2399 | .out(spare9_oai22_4x_unused)); |
| 2400 | cl_u1_inv_16x spare9_inv_16x (.in(1'b1), |
| 2401 | .out(spare9_inv_16x_unused)); |
| 2402 | cl_u1_nand2_16x spare9_nand2_16x (.in0(1'b1), |
| 2403 | .in1(1'b1), |
| 2404 | .out(spare9_nand2_16x_unused)); |
| 2405 | cl_u1_nor3_4x spare9_nor3_4x (.in0(1'b0), |
| 2406 | .in1(1'b0), |
| 2407 | .in2(1'b0), |
| 2408 | .out(spare9_nor3_4x_unused)); |
| 2409 | cl_u1_nand2_8x spare9_nand2_8x (.in0(1'b1), |
| 2410 | .in1(1'b1), |
| 2411 | .out(spare9_nand2_8x_unused)); |
| 2412 | cl_u1_buf_16x spare9_buf_16x (.in(1'b1), |
| 2413 | .out(spare9_buf_16x_unused)); |
| 2414 | cl_u1_nor2_16x spare9_nor2_16x (.in0(1'b0), |
| 2415 | .in1(1'b0), |
| 2416 | .out(spare9_nor2_16x_unused)); |
| 2417 | cl_u1_inv_32x spare9_inv_32x (.in(1'b1), |
| 2418 | .out(spare9_inv_32x_unused)); |
| 2419 | |
| 2420 | cl_sc1_msff_8x spare10_flop (.l1clk(l1clk), |
| 2421 | .siclk(siclk), |
| 2422 | .soclk(soclk), |
| 2423 | .si(si_10), |
| 2424 | .so(so_10), |
| 2425 | .d(1'b0), |
| 2426 | .q(spare10_flop_unused)); |
| 2427 | assign si_10 = so_9; |
| 2428 | |
| 2429 | cl_u1_buf_32x spare10_buf_32x (.in(1'b1), |
| 2430 | .out(spare10_buf_32x_unused)); |
| 2431 | cl_u1_nand3_8x spare10_nand3_8x (.in0(1'b1), |
| 2432 | .in1(1'b1), |
| 2433 | .in2(1'b1), |
| 2434 | .out(spare10_nand3_8x_unused)); |
| 2435 | cl_u1_inv_8x spare10_inv_8x (.in(1'b1), |
| 2436 | .out(spare10_inv_8x_unused)); |
| 2437 | cl_u1_aoi22_4x spare10_aoi22_4x (.in00(1'b1), |
| 2438 | .in01(1'b1), |
| 2439 | .in10(1'b1), |
| 2440 | .in11(1'b1), |
| 2441 | .out(spare10_aoi22_4x_unused)); |
| 2442 | cl_u1_buf_8x spare10_buf_8x (.in(1'b1), |
| 2443 | .out(spare10_buf_8x_unused)); |
| 2444 | cl_u1_oai22_4x spare10_oai22_4x (.in00(1'b1), |
| 2445 | .in01(1'b1), |
| 2446 | .in10(1'b1), |
| 2447 | .in11(1'b1), |
| 2448 | .out(spare10_oai22_4x_unused)); |
| 2449 | cl_u1_inv_16x spare10_inv_16x (.in(1'b1), |
| 2450 | .out(spare10_inv_16x_unused)); |
| 2451 | cl_u1_nand2_16x spare10_nand2_16x (.in0(1'b1), |
| 2452 | .in1(1'b1), |
| 2453 | .out(spare10_nand2_16x_unused)); |
| 2454 | cl_u1_nor3_4x spare10_nor3_4x (.in0(1'b0), |
| 2455 | .in1(1'b0), |
| 2456 | .in2(1'b0), |
| 2457 | .out(spare10_nor3_4x_unused)); |
| 2458 | cl_u1_nand2_8x spare10_nand2_8x (.in0(1'b1), |
| 2459 | .in1(1'b1), |
| 2460 | .out(spare10_nand2_8x_unused)); |
| 2461 | cl_u1_buf_16x spare10_buf_16x (.in(1'b1), |
| 2462 | .out(spare10_buf_16x_unused)); |
| 2463 | cl_u1_nor2_16x spare10_nor2_16x (.in0(1'b0), |
| 2464 | .in1(1'b0), |
| 2465 | .out(spare10_nor2_16x_unused)); |
| 2466 | cl_u1_inv_32x spare10_inv_32x (.in(1'b1), |
| 2467 | .out(spare10_inv_32x_unused)); |
| 2468 | assign scan_out = so_10; |
| 2469 | |
| 2470 | |
| 2471 | |
| 2472 | endmodule |
| 2473 | |