| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: xmac_2pcs_core.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | /*%W% %G%*/ |
| 36 | /************************************************************************* |
| 37 | * |
| 38 | * File Name : xmac_2pcs_core |
| 39 | * Author Name : John Lo |
| 40 | * Description : xmac + pcs + xpcs |
| 41 | * Parent Module: mac_top |
| 42 | * Child Module: many |
| 43 | * Interface Mod: many. |
| 44 | * Date Created : 8/17/01 |
| 45 | * |
| 46 | * Copyright (c) 2003, Sun Microsystems, Inc. |
| 47 | * Sun Proprietary and Confidential |
| 48 | * |
| 49 | * Modification : on 3-23-04 loj changed xrx_code_group and xtx_code_group |
| 50 | * from 80 bits to 40 bits. |
| 51 | * |
| 52 | * Synthesis Notes: |
| 53 | * |
| 54 | *************************************************************************/ |
| 55 | |
| 56 | `include "xmac.h" |
| 57 | |
| 58 | module xmac_2pcs_core ( |
| 59 | /******************************************************************* |
| 60 | * xmac signals |
| 61 | *******************************************************************/ |
| 62 | /* ------------- xmac clocks --------------------------------------- */ |
| 63 | clk, // from system clock |
| 64 | tx_clk, // from clock tree |
| 65 | tx_clk_312mhz, // from clock tree |
| 66 | tx_nbclk, // from clock tree |
| 67 | rx_clk, // from clock tree |
| 68 | rx_nbclk, // from clock tree |
| 69 | sys_clk_count, |
| 70 | tx_heart_beat_timer, |
| 71 | rx_heart_beat_timer, |
| 72 | /* ------------- shared MII/GMII/RGMII Interface ------------------ */ |
| 73 | gmii_rxd, |
| 74 | gmii_rx_dv, |
| 75 | gmii_rx_err, |
| 76 | gmii_txd, |
| 77 | gmii_tx_en, |
| 78 | gmii_tx_err, |
| 79 | /* ------------- XGMII Interface ----------------------------------- */ |
| 80 | xgmii_rxc, |
| 81 | xgmii_rxd, |
| 82 | xgmii_txc, |
| 83 | xgmii_txd, |
| 84 | /* ------------- xmac pio Interface -------------------------------- */ |
| 85 | pio_core_reset, // becomes hw_reset |
| 86 | pio_rd, // r/w_ |
| 87 | pio_addr, // address |
| 88 | pio_wr_data, // wr_data |
| 89 | pio_rd_data_xmac, // rd_data |
| 90 | pio_core_sel_xmac,// sel |
| 91 | pio_ack_xmac, // ack |
| 92 | pio_err_xmac, |
| 93 | txmac_interrupt, |
| 94 | rxmac_interrupt, |
| 95 | xmac_fc_interrupt, |
| 96 | /* ------------- xpcs pio Interface -------------------------------- */ |
| 97 | rdata_xpcs, // rd_data |
| 98 | sel_xpcs, // sel |
| 99 | ack_xpcs, // ack |
| 100 | pio_err_xpcs, |
| 101 | xpcs_interrupt, |
| 102 | /* ------------- Tx DMA Interface ---------------------------------- */ |
| 103 | txmac_opp_req, |
| 104 | opp_txmac_ack, |
| 105 | opp_txmac_tag, |
| 106 | opp_txmac_data, |
| 107 | opp_txmac_stat, |
| 108 | opp_txmac_abort, |
| 109 | /* ------------- Rx DMA Interface ---------------------------------- */ |
| 110 | ipp_rxmac_req, |
| 111 | rxmac_ipp_ack, |
| 112 | rxmac_ipp_tag, |
| 113 | rxmac_ipp_data, // {64 bit data} |
| 114 | rxmac_ipp_ctrl, |
| 115 | rxmac_ipp_stat, |
| 116 | /* ------------- xmac_xpcs_clk_mux control signals ----------------- */ |
| 117 | sel_clk_25mhz, |
| 118 | loopback, |
| 119 | sel_por_clk_src, |
| 120 | mii_mode, |
| 121 | gmii_mode, |
| 122 | xgmii_mode, |
| 123 | pcs_bypass, |
| 124 | xpcs_loopback, |
| 125 | /* ------------- PCS related Interface ----------------------------- */ |
| 126 | /************* |
| 127 | * phy_dpath signals |
| 128 | *************/ |
| 129 | gmii_crs, // from external gmii interface |
| 130 | gmii_col, // from external gmii interface |
| 131 | /************ |
| 132 | * pcs signals |
| 133 | ************/ |
| 134 | odd_rx, // indicates alignment to word boundary |
| 135 | serdes_rdy, |
| 136 | signal_detect, // input from optics which indicates light ok |
| 137 | rx_code_group, // from internal serdes |
| 138 | tx_code_group, // to internal serdes |
| 139 | pcs_pio_req, // |
| 140 | pcs_pio_ack, // pio acknowledge |
| 141 | pcs_pio_err, |
| 142 | pcs_pio_rd_data, // pio read data out |
| 143 | pcs_int, // pcs link down interrupt, secondary interrupt |
| 144 | /* ------------- xPCS Interface ------------------------------------ */ |
| 145 | // rx xpcs signals |
| 146 | xserdes_rdy, |
| 147 | xsignal_detect, // input from optics which indicates light ok |
| 148 | rbc0_a, // 312 MHz rx clock |
| 149 | rbc0_b, // 312 MHz rx clock |
| 150 | rbc0_c, // 312 MHz rx clock |
| 151 | rbc0_d, // 312 MHz rx clock |
| 152 | // rx PMD related signals |
| 153 | link_up_led, |
| 154 | activity_led, |
| 155 | xrx_code_group, // symbol to send over link |
| 156 | xtx_code_group, // symbol to send over link |
| 157 | MDINT, |
| 158 | // debug |
| 159 | xmac_debug, |
| 160 | xpcs_debug, |
| 161 | mac_debug_sel |
| 162 | ); |
| 163 | |
| 164 | /******************************************************************* |
| 165 | * xmac signals |
| 166 | *******************************************************************/ |
| 167 | /* ------------- xmac clocks --------------------------------------- */ |
| 168 | input clk; // from system clock |
| 169 | input tx_clk; // from clock tree |
| 170 | input tx_clk_312mhz; // from clock tree |
| 171 | input tx_nbclk; // from clock tree |
| 172 | input rx_clk; // from clock tree |
| 173 | input rx_nbclk; // from clock tree |
| 174 | output [2:0] sys_clk_count; |
| 175 | output [3:0] tx_heart_beat_timer; |
| 176 | output [3:0] rx_heart_beat_timer; |
| 177 | /* ------------- shared MII/GMII Interface ------------------------ */ |
| 178 | input gmii_rx_dv; |
| 179 | input [`BYTE] gmii_rxd; |
| 180 | input gmii_rx_err; |
| 181 | output gmii_tx_en; |
| 182 | output [`BYTE] gmii_txd; |
| 183 | output gmii_tx_err; |
| 184 | /* ------------- XGMII Interface ----------------------------------- */ |
| 185 | input [3:0] xgmii_rxc; |
| 186 | input [31:0] xgmii_rxd; |
| 187 | output [3:0] xgmii_txc; |
| 188 | output [31:0] xgmii_txd; |
| 189 | /* ------------- xmac pio Interface -------------------------------- */ |
| 190 | input pio_core_reset; // becomes hw_reset |
| 191 | input pio_core_sel_xmac;// sel |
| 192 | output pio_ack_xmac; |
| 193 | input pio_rd; // r/w |
| 194 | input [8:0] pio_addr; // address |
| 195 | input [31:0] pio_wr_data; // wr_data |
| 196 | output [31:0] pio_rd_data_xmac; // rd_data |
| 197 | output pio_err_xmac; |
| 198 | output txmac_interrupt; |
| 199 | output rxmac_interrupt; |
| 200 | output xmac_fc_interrupt; |
| 201 | /* ------------- xpcs pio Interface -------------------------------- */ |
| 202 | output [31:0] rdata_xpcs; |
| 203 | input sel_xpcs; |
| 204 | output ack_xpcs; |
| 205 | output pio_err_xpcs; |
| 206 | output xpcs_interrupt; |
| 207 | /* ------------- Tx DMA Interface ---------------------------------- */ |
| 208 | output txmac_opp_req; |
| 209 | input opp_txmac_ack; |
| 210 | input opp_txmac_tag; |
| 211 | input [63:0] opp_txmac_data; |
| 212 | input [3:0] opp_txmac_stat; |
| 213 | input opp_txmac_abort; |
| 214 | /* ------------- Rx DMA Interface ---------------------------------- */ |
| 215 | input ipp_rxmac_req; |
| 216 | output rxmac_ipp_ack; |
| 217 | output rxmac_ipp_tag; // output of rxfifo. non-registered. |
| 218 | output [63:0] rxmac_ipp_data; // {64bit data} |
| 219 | output rxmac_ipp_ctrl; |
| 220 | output [`TBITS] rxmac_ipp_stat; // {24bit data} |
| 221 | /* ------------- xmac_xpcs_clk_mux control signals ----------------- */ |
| 222 | output sel_clk_25mhz; |
| 223 | output loopback; |
| 224 | output sel_por_clk_src; |
| 225 | output mii_mode; |
| 226 | output gmii_mode; |
| 227 | output xgmii_mode; |
| 228 | output pcs_bypass; |
| 229 | output xpcs_loopback; |
| 230 | |
| 231 | |
| 232 | /* ------------- PCS Interface ------------------------------------- */ |
| 233 | /**************************** |
| 234 | * phy_dpath signals |
| 235 | ****************************/ |
| 236 | // input [7:0] gmii_rxd; // from external gmii interface |
| 237 | // input gmii_rx_dv; // from external gmii interface |
| 238 | // input gmii_rx_err; // from external gmii interface |
| 239 | input gmii_crs; // from external gmii interface |
| 240 | input gmii_col; // from external gmii interface |
| 241 | /******************************************************************* |
| 242 | * pcs signals |
| 243 | *******************************************************************/ |
| 244 | input odd_rx; // indicates alignment to word boundary |
| 245 | input serdes_rdy; |
| 246 | input signal_detect;// input from optics which indicates light ok |
| 247 | input [9:0] rx_code_group;// from internal serdes |
| 248 | output [9:0] tx_code_group;// to internal serdes |
| 249 | input pcs_pio_req; |
| 250 | output pcs_pio_ack; // pio acknowledge |
| 251 | output pcs_pio_err; |
| 252 | output [31:0] pcs_pio_rd_data;// pio read data out |
| 253 | output pcs_int; // pcs link down interrupt, secondary interrupt |
| 254 | /* ------------- xPCS Interface ------------------------------------ */ |
| 255 | // rx xpcs signals |
| 256 | input xserdes_rdy; |
| 257 | input [3:0] xsignal_detect;// input from optics which indicates light ok |
| 258 | input rbc0_a; // 312 MHz rx clock |
| 259 | input rbc0_b; // 312 MHz rx clock |
| 260 | input rbc0_c; // 312 MHz rx clock |
| 261 | input rbc0_d; // 312 MHz rx clock |
| 262 | /* ------------- led signals --------------------------------------- */ |
| 263 | output link_up_led; // signal to on-board LED, low pulse elongated |
| 264 | output activity_led; |
| 265 | /* ------------- PMD signals --------------------------------------- */ |
| 266 | input [39:0] xrx_code_group; // symbol from link |
| 267 | output [39:0] xtx_code_group; // symbol to send over link |
| 268 | input MDINT; |
| 269 | /* ------------- debug Interface ----------------------------------- */ |
| 270 | output [31:0] xmac_debug; |
| 271 | output [31:0] xpcs_debug; |
| 272 | output [2:0] mac_debug_sel; |
| 273 | |
| 274 | // \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ |
| 275 | |
| 276 | // internal signal |
| 277 | wire loopback; |
| 278 | wire sel_por_clk_src; |
| 279 | wire gmii_mode; |
| 280 | wire mii_mode; |
| 281 | wire [2:0] sys_clk_count; |
| 282 | wire [3:0] tx_heart_beat_timer; |
| 283 | wire [3:0] rx_heart_beat_timer; |
| 284 | wire [`BYTE] gmii_rxd_mux; |
| 285 | wire [`BYTE] gmii_rxd; |
| 286 | wire [`BYTE] gmii_txd; |
| 287 | wire [9:0] rx_code_group; |
| 288 | wire [9:0] tx_code_group; |
| 289 | wire [7:0] rxd_int; |
| 290 | wire [31:0] xgmii_rxd; |
| 291 | wire [31:0] xgmii_txd; |
| 292 | wire [3:0] xgmii_rxc; |
| 293 | wire [3:0] xgmii_txc; |
| 294 | wire [63:0] xpcs_rxd; |
| 295 | wire [63:0] xpcs_txd; |
| 296 | wire [7:0] xpcs_rxc; |
| 297 | wire [7:0] xpcs_txc; |
| 298 | wire force_LED_on; |
| 299 | wire led_polarity; |
| 300 | wire xlink_up_tx; |
| 301 | wire link_up_tx; |
| 302 | wire led_equation = force_LED_on ? 1'b1 : |
| 303 | xgmii_mode ? xlink_up_tx : |
| 304 | link_up_tx ; |
| 305 | |
| 306 | wire link_up_led = led_polarity ? led_equation : |
| 307 | ~led_equation ; |
| 308 | |
| 309 | wire [3:0] xsignal_detect; |
| 310 | wire [7:0] xmac_rxc; |
| 311 | wire [63:0] xmac_rxd; |
| 312 | wire [7:0] xmac_txc; |
| 313 | wire [63:0] xmac_txd; |
| 314 | |
| 315 | wire gmii_rx_err_mux,rx_dv_int,rx_er_int,crs_int,col_int; |
| 316 | |
| 317 | // vlint flag_net_has_no_load off |
| 318 | // vlint flag_dangling_net_within_module off |
| 319 | wire [79:0] xtx_code_group_80bits; |
| 320 | wire [2:0] shared_sel; |
| 321 | wire loss_sync_rx; |
| 322 | wire ewrap; |
| 323 | wire sw_lockref; |
| 324 | wire phy_mode; |
| 325 | wire gmii_crs_mux; |
| 326 | wire sw_ensyncdet; |
| 327 | wire gmii_col_mux; |
| 328 | wire xpcs_bypass; |
| 329 | // vlint flag_dangling_net_within_module on |
| 330 | // vlint flag_net_has_no_load on |
| 331 | |
| 332 | wire gmii_rx_dv_mux; |
| 333 | |
| 334 | /************************************************************/ |
| 335 | /* Instantiation of the XMAC */ |
| 336 | /************************************************************/ |
| 337 | xmac xmac( |
| 338 | /* ------------- xmac clocks --------------------------------------- */ |
| 339 | .clk(clk), |
| 340 | .tx_clk(tx_clk), |
| 341 | .tx_nbclk(tx_nbclk), |
| 342 | .rx_clk(rx_clk), |
| 343 | .rx_nbclk(rx_nbclk), |
| 344 | .sys_clk_count(sys_clk_count), |
| 345 | .tx_heart_beat_timer(tx_heart_beat_timer), |
| 346 | .rx_heart_beat_timer(rx_heart_beat_timer), |
| 347 | /* ------------- shared MII/GMII Interface ------------------------ */ |
| 348 | .gmii_rxd(gmii_rxd_mux), |
| 349 | .gmii_rx_dv(gmii_rx_dv_mux), |
| 350 | .gmii_rx_err(gmii_rx_err_mux), |
| 351 | .gmii_txd(gmii_txd), |
| 352 | .gmii_tx_en(gmii_tx_en), |
| 353 | .gmii_tx_err(gmii_tx_err), |
| 354 | /* ------------- XGMII Interface ----------------------------------- */ |
| 355 | .xgmii_rxc(xgmii_rxc), |
| 356 | .xgmii_rxd(xgmii_rxd), |
| 357 | .xgmii_txc(xgmii_txc), |
| 358 | .xgmii_txd(xgmii_txd), |
| 359 | /* ------------- XPCS Interface ----------------------------------- */ |
| 360 | .xpcs_rxd(xmac_rxd), // data going onto xGMII// internal 64 bit receive signals |
| 361 | .xpcs_rxc(xmac_rxc), // receive data valid, GMII interface |
| 362 | .xpcs_txd(xmac_txd), // internal 64 bit transmit signals // byte from MAC over GMII |
| 363 | .xpcs_txc(xmac_txc), // GMII transmit enable from Mac |
| 364 | /* ---------------- pio Interface ---------------------------------- */ |
| 365 | .pio_core_reset(pio_core_reset), // becomes hw_reset |
| 366 | .pio_core_sel(pio_core_sel_xmac), // sel mac |
| 367 | .pio_ack(pio_ack_xmac), |
| 368 | .pio_rd(pio_rd), // r/w |
| 369 | .pio_addr(pio_addr), // address |
| 370 | .pio_wr_data(pio_wr_data), // wr_data |
| 371 | .pio_rd_data(pio_rd_data_xmac), // rd_data |
| 372 | .pio_err(pio_err_xmac), |
| 373 | .txmac_interrupt(txmac_interrupt), |
| 374 | .rxmac_interrupt(rxmac_interrupt), |
| 375 | .xmac_fc_interrupt(xmac_fc_interrupt), |
| 376 | /* ---------------- Tx DMA Interface ------------------------------- */ |
| 377 | .txmac_opp_req(txmac_opp_req), |
| 378 | .opp_txmac_ack(opp_txmac_ack), |
| 379 | .opp_txmac_tag(opp_txmac_tag), |
| 380 | .opp_txmac_data(opp_txmac_data), |
| 381 | .opp_txmac_stat(opp_txmac_stat), |
| 382 | .opp_txmac_abort(opp_txmac_abort), |
| 383 | /* ---------------- Rx DMA Interface ------------------------------- */ |
| 384 | .rxmac_ipp_ack(rxmac_ipp_ack), |
| 385 | .ipp_rxmac_req(ipp_rxmac_req), |
| 386 | .rxmac_ipp_tag(rxmac_ipp_tag), |
| 387 | .rxmac_ipp_data(rxmac_ipp_data), |
| 388 | .rxmac_ipp_ctrl(rxmac_ipp_ctrl), |
| 389 | .rxmac_ipp_stat(rxmac_ipp_stat), |
| 390 | /* ------------- xmac_clk_mux control signals ---------------------- */ |
| 391 | .sel_clk_25mhz(sel_clk_25mhz), |
| 392 | .loopback(loopback), |
| 393 | .sel_por_clk_src(sel_por_clk_src), |
| 394 | .mii_mode(mii_mode), |
| 395 | .gmii_mode(gmii_mode), |
| 396 | .xgmii_mode(xgmii_mode), |
| 397 | .pcs_bypass(pcs_bypass), |
| 398 | .xpcs_bypass(xpcs_bypass), |
| 399 | /* ------------- led signals ---------------------- */ |
| 400 | .force_LED_on(force_LED_on), |
| 401 | .led_polarity(led_polarity), |
| 402 | .activity_led(activity_led), |
| 403 | /* ------------- PMD signals ---------------------- */ |
| 404 | .MDINT(MDINT), |
| 405 | /* ------------- debug signals -------------------- */ |
| 406 | .xmac_debug(xmac_debug[31:0]), |
| 407 | .mac_debug_sel(mac_debug_sel[2:0]) |
| 408 | ); |
| 409 | |
| 410 | `ifdef XGMII_ONLY |
| 411 | wire nothing_happen = 1; |
| 412 | `else |
| 413 | /************************************************************/ |
| 414 | /* Instantiation of the PHY Datapath for MAC */ |
| 415 | /************************************************************/ |
| 416 | |
| 417 | phy_dpath phy_dpath( |
| 418 | .phy_mode(pcs_bypass), |
| 419 | .rxd_int(rxd_int[7:0]), // from PCS block |
| 420 | .rx_dv_int(rx_dv_int), // from PCS block |
| 421 | .rx_er_int(rx_er_int), // from PCS block |
| 422 | .crs_int(crs_int), // from PCS block |
| 423 | .col_int(col_int), // from PCS block |
| 424 | .gmii_rxd(gmii_rxd), // from external gmii interface |
| 425 | .gmii_rx_dv(gmii_rx_dv), // from external gmii interface |
| 426 | .gmii_rx_err(gmii_rx_err), // from external gmii interface |
| 427 | .gmii_crs(gmii_crs), // from external gmii interface |
| 428 | .gmii_col(gmii_col), // from external gmii interface |
| 429 | // outputs |
| 430 | .mii_rxd(gmii_rxd_mux), // to MAC |
| 431 | .mii_rx_dv(gmii_rx_dv_mux), // to MAC |
| 432 | .mii_rx_err(gmii_rx_err_mux), // to MAC |
| 433 | .mii_crs(gmii_crs_mux), // to MAC |
| 434 | .mii_col(gmii_col_mux) // to MAC |
| 435 | ); |
| 436 | |
| 437 | /************************************************************/ |
| 438 | /* Instantiation of the MAC Physical Coding Sublayer */ |
| 439 | /************************************************************/ |
| 440 | pcs pcs ( |
| 441 | .rxclk(rx_nbclk), |
| 442 | .rx_10bdata(rx_code_group), // from internal serdes |
| 443 | .rxd(rxd_int[7:0]), // to phy_dpath |
| 444 | |
| 445 | .rx_dv(rx_dv_int), // to phy_dpath |
| 446 | .rx_er(rx_er_int), // to phy_dpath |
| 447 | |
| 448 | .serdes_rdy(serdes_rdy), // from esr_ctrl // from slink_ctrl,serdes initialized |
| 449 | .link_up_tx(link_up_tx), // to big_mac and to on-board LED, low pulse elongated. It is called link_up_tx internal to pcs. |
| 450 | |
| 451 | .odd_rx(odd_rx), // from phy_clock. |
| 452 | .signal_detect(signal_detect),// input from optics which indicates light ok |
| 453 | .an_loss_sync(loss_sync_rx),// loss of word synchronization in rx_clk domain |
| 454 | |
| 455 | .txclk(tx_nbclk), |
| 456 | .tx_en(gmii_tx_en), // from xmac |
| 457 | .tx_er(gmii_tx_err), // from xmac |
| 458 | .crs(crs_int), // to phy_dpath |
| 459 | .col(col_int), // to phy_dpath |
| 460 | |
| 461 | .txd(gmii_txd), // from xmac |
| 462 | .tx_10bdata(tx_code_group), // to serdes |
| 463 | |
| 464 | .clk(clk), |
| 465 | .pio_core_reset(pio_core_reset), |
| 466 | .pio_core_sel(pcs_pio_req), |
| 467 | .pio_rd_wr(pio_rd), |
| 468 | .pio_addr(pio_addr[6:0]), |
| 469 | .pio_wr_data(pio_wr_data[17:0]), |
| 470 | .slink_state(2'b0), |
| 471 | |
| 472 | .pio_err(pcs_pio_err), |
| 473 | .pio_core_ack(pcs_pio_ack), |
| 474 | .pio_rd_data(pcs_pio_rd_data), |
| 475 | .sw_ensyncdet(sw_ensyncdet), // to slink_ctrl |
| 476 | .sw_lockref(sw_lockref), // to slink_ctrl |
| 477 | .phy_mode(phy_mode), |
| 478 | .shared_sel(shared_sel[2:0]),// used as a select for shared output pins |
| 479 | .pcs_int(pcs_int), |
| 480 | .ewrap(ewrap) // to external serdes for loopback enable |
| 481 | ); |
| 482 | |
| 483 | `endif // !ifdef XGMII_ONLY |
| 484 | |
| 485 | |
| 486 | /************************************************************/ |
| 487 | /* Instantiation of the 10G MAC Physical Coding Sublayer */ |
| 488 | /************************************************************/ |
| 489 | |
| 490 | wire [79:0] xrx_code_group_80bits; |
| 491 | |
| 492 | assign xrx_code_group_80bits={10'b0,xrx_code_group[39:30], |
| 493 | 10'b0,xrx_code_group[29:20], |
| 494 | 10'b0,xrx_code_group[19:10], |
| 495 | 10'b0,xrx_code_group[9:0]}; |
| 496 | |
| 497 | wire [39:0] xtx_code_group; |
| 498 | |
| 499 | assign xtx_code_group[9:0] =xtx_code_group_80bits[9:0]; |
| 500 | assign xtx_code_group[19:10]=xtx_code_group_80bits[29:20]; |
| 501 | assign xtx_code_group[29:20]=xtx_code_group_80bits[49:40]; |
| 502 | assign xtx_code_group[39:30]=xtx_code_group_80bits[69:60]; |
| 503 | |
| 504 | xpcs xpcs ( |
| 505 | .tx_clk(tx_clk_312mhz), |
| 506 | // |
| 507 | .clk(clk), |
| 508 | // Serdes signals |
| 509 | .rbc0_a(rbc0_a), // channel a 312 Mhz rx clock |
| 510 | .rbc0_b(rbc0_b), // channel b 312 Mhz rx clock |
| 511 | .rbc0_c(rbc0_c), // channel c 312 Mhz rx clock |
| 512 | .rbc0_d(rbc0_d), // channel d 312 Mhz rx clock |
| 513 | |
| 514 | .xrx_code_group(xrx_code_group_80bits), // Serdes to xpcs receive symbols |
| 515 | .xtx_code_group(xtx_code_group_80bits), // xpcs to Serdes transmit symbols |
| 516 | // rx PMD related signals |
| 517 | .xsignal_detect(xsignal_detect[3:0]), // input from optics which indicates light ok. Inputs from Sequence Detect. |
| 518 | .xserdes_rdy(xserdes_rdy), |
| 519 | |
| 520 | .xlink_up_tx(xlink_up_tx), // signal to on-board LED, low pulse elongated |
| 521 | // internal 64 bit receive signals |
| 522 | .xpcs_rxd(xpcs_rxd), // data going onto xGMII |
| 523 | .xpcs_rxc(xpcs_rxc), // receive data valid, GMII interface |
| 524 | // internal 64 bit transmit signals |
| 525 | .xpcs_txd(xpcs_txd), // byte from MAC over GMII |
| 526 | .xpcs_txc(xpcs_txc), // GMII transmit enable from Mac |
| 527 | .xpcs_loopback(xpcs_loopback), |
| 528 | // |
| 529 | // pio signals |
| 530 | .pio_core_reset(pio_core_reset), // becomes hw_reset |
| 531 | .sel_xpcs(sel_xpcs), |
| 532 | .ack_xpcs(ack_xpcs), |
| 533 | .pio_err_xpcs(pio_err_xpcs), |
| 534 | .pio_addr(pio_addr[8:0] ), // local global pio signal |
| 535 | .pio_rd(pio_rd), // local global pio signal |
| 536 | .pio_wdata(pio_wr_data[31:0] ),// local global pio signal |
| 537 | .rdata_xpcs(rdata_xpcs[31:0] ), |
| 538 | .xpcs_interrupt(xpcs_interrupt), |
| 539 | .xpcs_debug(xpcs_debug) |
| 540 | ); |
| 541 | |
| 542 | |
| 543 | /************************************************************/ |
| 544 | /* Instantiation of the xMAC xPCS interface */ |
| 545 | /************************************************************/ |
| 546 | x64_intf x64_intf( |
| 547 | // XPCS Interface |
| 548 | .rbc0_a(rbc0_a), // 312mhz |
| 549 | .tx_clk_312mhz(tx_clk_312mhz), // 312mhz |
| 550 | .xpcs_rxc(xpcs_rxc), |
| 551 | .xpcs_rxd(xpcs_rxd), |
| 552 | .xpcs_txc(xpcs_txc), |
| 553 | .xpcs_txd(xpcs_txd), |
| 554 | // XMAC Interface |
| 555 | .rx_clk(rx_clk), |
| 556 | .tx_clk(tx_clk), |
| 557 | .xmac_rxc(xmac_rxc), |
| 558 | .xmac_rxd(xmac_rxd), |
| 559 | .xmac_txc(xmac_txc), |
| 560 | .xmac_txd(xmac_txd) |
| 561 | ); |
| 562 | |
| 563 | endmodule // xmac_2pcs_core |
| 564 | |
| 565 | |
| 566 | |
| 567 | module x64_intf ( |
| 568 | // XPCS Interface |
| 569 | rbc0_a, // 312mhz |
| 570 | tx_clk_312mhz, // 312mhz |
| 571 | xpcs_rxc, |
| 572 | xpcs_rxd, |
| 573 | xpcs_txc, |
| 574 | xpcs_txd, |
| 575 | // XMAC Interface |
| 576 | rx_clk, |
| 577 | tx_clk, |
| 578 | xmac_rxc, |
| 579 | xmac_rxd, |
| 580 | xmac_txc, |
| 581 | xmac_txd |
| 582 | ); |
| 583 | // XPCS Interface |
| 584 | input rbc0_a; // 312mhz |
| 585 | input tx_clk_312mhz; // 312mhz |
| 586 | input [7:0] xpcs_rxc; |
| 587 | input [63:0] xpcs_rxd; |
| 588 | output [7:0] xpcs_txc; |
| 589 | output [63:0] xpcs_txd; |
| 590 | // XMAC Interface |
| 591 | input rx_clk; |
| 592 | input tx_clk; |
| 593 | output [7:0] xmac_rxc; |
| 594 | output [63:0] xmac_rxd; |
| 595 | input [7:0] xmac_txc; |
| 596 | input [63:0] xmac_txd; |
| 597 | |
| 598 | wire [7:0] xpcs_rxc; |
| 599 | wire [63:0] xpcs_rxd; |
| 600 | wire [7:0] xpcs_xmac_rxc; |
| 601 | wire [63:0] xpcs_xmac_rxd; |
| 602 | wire [7:0] xmac_rxc; |
| 603 | wire [63:0] xmac_rxd; |
| 604 | |
| 605 | wire [7:0] xmac_txc; |
| 606 | wire [63:0] xmac_txd; |
| 607 | wire [7:0] xmac_xpcs_txc; |
| 608 | wire [63:0] xmac_xpcs_txd; |
| 609 | wire [7:0] xpcs_txc; |
| 610 | wire [63:0] xpcs_txd; |
| 611 | |
| 612 | //----- receive side: xpcs -> xmac ----- |
| 613 | // rx_clk is triggered by the falling edge of rbc0_a. |
| 614 | // There is a build in half rbc0_a period delay to take care of the race condition |
| 615 | // between xpcs_xmac_rxd and rx_clk. |
| 616 | RegDff #(8) xpcs_xmac_rxc_RegDff(.din(xpcs_rxc),.clk(rbc0_a),.qout(xpcs_xmac_rxc)); |
| 617 | RegDff #(64) xpcs_xmac_rxd_RegDff(.din(xpcs_rxd),.clk(rbc0_a),.qout(xpcs_xmac_rxd)); |
| 618 | |
| 619 | RegDff #(8) xmac_rxc_RegDff(.din(xpcs_xmac_rxc),.clk(rx_clk),.qout(xmac_rxc)); |
| 620 | RegDff #(64) xmac_rxd_RegDff(.din(xpcs_xmac_rxd),.clk(rx_clk),.qout(xmac_rxd)); |
| 621 | |
| 622 | //----- transmit side: xmac -> xpcs ----- |
| 623 | // tx_clk is triggered by the falling edge of tx_clk_312mhz. |
| 624 | // There is a build in half tx_clk_312mhz period delay to take care of the race condition |
| 625 | // between xmac_xpcs_txc and tx_clk_312mhz. |
| 626 | RegDff #(8) xmac_xpcs_txc_RegDff(.din(xmac_txc),.clk(tx_clk),.qout(xmac_xpcs_txc)); |
| 627 | RegDff #(64) xmac_xpcs_txd_RegDff(.din(xmac_txd),.clk(tx_clk),.qout(xmac_xpcs_txd)); |
| 628 | |
| 629 | RegDff #(8) xpcs_txc_RegDff(.din(xmac_xpcs_txc),.clk(tx_clk_312mhz),.qout(xpcs_txc)); |
| 630 | RegDff #(64) xpcs_txd_RegDff(.din(xmac_xpcs_txd),.clk(tx_clk_312mhz),.qout(xpcs_txd)); |
| 631 | |
| 632 | endmodule // x64_intf |