| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: tlu_tel_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module tlu_tel_dp ( |
| 36 | l2clk, |
| 37 | scan_in, |
| 38 | tcu_pce_ov, |
| 39 | spc_aclk, |
| 40 | spc_bclk, |
| 41 | tcu_scan_en, |
| 42 | trl_tel_en, |
| 43 | asi_mbist_tel_en, |
| 44 | ted_syndrome, |
| 45 | tsa_ecc, |
| 46 | ted0_cecc_err, |
| 47 | ted0_uecc_err, |
| 48 | ted0_uecc_err_, |
| 49 | ted1_cecc_err, |
| 50 | ted1_uecc_err, |
| 51 | ted1_uecc_err_, |
| 52 | trl_tsacu_en_in, |
| 53 | scan_out, |
| 54 | tel_syndrome, |
| 55 | tel_ecc, |
| 56 | tel_crit_ecc, |
| 57 | tel_tsac, |
| 58 | tel_tsau, |
| 59 | tel_tsacu_exc, |
| 60 | tel_tsac_exc, |
| 61 | tel_tsau_exc); |
| 62 | wire pce_ov; |
| 63 | wire clk; |
| 64 | wire stop; |
| 65 | wire siclk; |
| 66 | wire soclk; |
| 67 | wire se; |
| 68 | wire en; |
| 69 | wire [15:0] tsa_ecc_minbuf; |
| 70 | wire [3:0] trl_tsacu_en_in_minbuf; |
| 71 | wire ecc_lat_scanin; |
| 72 | wire ecc_lat_scanout; |
| 73 | wire tsac_in; |
| 74 | wire tsau_in; |
| 75 | wire [15:0] rd_ecc; |
| 76 | wire [3:0] tsacu_en; |
| 77 | wire tsac; |
| 78 | wire tsau; |
| 79 | wire cecc_or_; |
| 80 | wire [3:0] tsac_exc_; |
| 81 | wire [3:0] tsau_exc_; |
| 82 | |
| 83 | |
| 84 | |
| 85 | |
| 86 | input l2clk; |
| 87 | input scan_in; |
| 88 | input tcu_pce_ov; |
| 89 | input spc_aclk; |
| 90 | input spc_bclk; |
| 91 | input tcu_scan_en; |
| 92 | |
| 93 | input trl_tel_en; |
| 94 | input asi_mbist_tel_en; |
| 95 | |
| 96 | input [15:0] ted_syndrome; |
| 97 | input [15:0] tsa_ecc; |
| 98 | |
| 99 | input ted0_cecc_err; |
| 100 | input ted0_uecc_err; |
| 101 | input ted0_uecc_err_; |
| 102 | input ted1_cecc_err; |
| 103 | input ted1_uecc_err; |
| 104 | input ted1_uecc_err_; |
| 105 | |
| 106 | input [3:0] trl_tsacu_en_in; |
| 107 | |
| 108 | |
| 109 | output scan_out; |
| 110 | |
| 111 | output [15:0] tel_syndrome; |
| 112 | output [15:0] tel_ecc; |
| 113 | output [15:0] tel_crit_ecc; |
| 114 | |
| 115 | output tel_tsac; |
| 116 | output tel_tsau; |
| 117 | |
| 118 | output [3:0] tel_tsacu_exc; |
| 119 | output [3:0] tel_tsac_exc; |
| 120 | output [3:0] tel_tsau_exc; |
| 121 | |
| 122 | |
| 123 | |
| 124 | //////////////////////////////////////////////////////////////////////////////// |
| 125 | |
| 126 | assign pce_ov = tcu_pce_ov; |
| 127 | assign clk = l2clk; |
| 128 | assign stop = 1'b0; |
| 129 | assign siclk = spc_aclk; |
| 130 | assign soclk = spc_bclk; |
| 131 | assign se = tcu_scan_en; |
| 132 | |
| 133 | |
| 134 | |
| 135 | //////////////////////////////////////////////////////////////////////////////// |
| 136 | // Clock enable |
| 137 | |
| 138 | tlu_tel_dp_or_macro__ports_2__width_1 en_or ( |
| 139 | .din0 (trl_tel_en ), |
| 140 | .din1 (asi_mbist_tel_en ), |
| 141 | .dout (en ) |
| 142 | ); |
| 143 | |
| 144 | // Data is flopped, but ECC is not, so flop here |
| 145 | |
| 146 | tlu_tel_dp_buff_macro__minbuff_1__width_20 ecc_lat_minbuff ( |
| 147 | .din ({tsa_ecc [15:0], |
| 148 | trl_tsacu_en_in [3:0]}), |
| 149 | .dout ({tsa_ecc_minbuf [15:0], |
| 150 | trl_tsacu_en_in_minbuf[3:0]})); |
| 151 | |
| 152 | |
| 153 | tlu_tel_dp_msff_macro__width_38 ecc_lat ( |
| 154 | .scan_in(ecc_lat_scanin), |
| 155 | .scan_out(ecc_lat_scanout), |
| 156 | .din ({tsa_ecc_minbuf [15:0], |
| 157 | trl_tsacu_en_in_minbuf[3:0], |
| 158 | tsac_in , |
| 159 | tsau_in , |
| 160 | ted_syndrome [15:0]}), |
| 161 | .dout ({rd_ecc [15:0], |
| 162 | tsacu_en [3:0], |
| 163 | tsac , |
| 164 | tsau , |
| 165 | tel_syndrome [15:0]}), |
| 166 | .clk(clk), |
| 167 | .en(en), |
| 168 | .se(se), |
| 169 | .siclk(siclk), |
| 170 | .soclk(soclk), |
| 171 | .pce_ov(pce_ov), |
| 172 | .stop(stop) |
| 173 | ); |
| 174 | |
| 175 | assign tel_crit_ecc[15:0] = |
| 176 | rd_ecc[15:0]; |
| 177 | |
| 178 | tlu_tel_dp_buff_macro__rep_1__width_16 ecc_buf ( |
| 179 | .din (rd_ecc [15:0] ), |
| 180 | .dout (tel_ecc [15:0] ) |
| 181 | ); |
| 182 | |
| 183 | |
| 184 | |
| 185 | tlu_tel_dp_nand_macro__ports_2__width_1 tsau_in_nand ( |
| 186 | .din0 (ted0_uecc_err_ ), |
| 187 | .din1 (ted1_uecc_err_ ), |
| 188 | .dout (tsau_in ) |
| 189 | ); |
| 190 | |
| 191 | tlu_tel_dp_nor_macro__ports_2__width_1 cecc_or_inv_nor ( |
| 192 | .din0 (ted0_cecc_err ), |
| 193 | .din1 (ted1_cecc_err ), |
| 194 | .dout (cecc_or_ ) |
| 195 | ); |
| 196 | |
| 197 | tlu_tel_dp_nor_macro__ports_3__width_1 tsac_in_nor ( |
| 198 | .din0 (cecc_or_ ), |
| 199 | .din1 (ted0_uecc_err ), |
| 200 | .din2 (ted1_uecc_err ), |
| 201 | .dout (tsac_in ) |
| 202 | ); |
| 203 | |
| 204 | tlu_tel_dp_buff_macro__rep_1__width_1 tsac_buf ( |
| 205 | .din (tsac ), |
| 206 | .dout (tel_tsac ) |
| 207 | ); |
| 208 | |
| 209 | tlu_tel_dp_buff_macro__rep_1__width_1 tsau_buf ( |
| 210 | .din (tsau ), |
| 211 | .dout (tel_tsau ) |
| 212 | ); |
| 213 | |
| 214 | |
| 215 | tlu_tel_dp_nand_macro__ports_2__width_4 tsac_exc_b_nand ( |
| 216 | .din0 ({4 {tsac}} ), |
| 217 | .din1 (tsacu_en [3:0] ), |
| 218 | .dout (tsac_exc_ [3:0] ) |
| 219 | ); |
| 220 | |
| 221 | tlu_tel_dp_nand_macro__ports_2__width_4 tsau_exc_b_nand ( |
| 222 | .din0 ({4 {tsau}} ), |
| 223 | .din1 (tsacu_en [3:0] ), |
| 224 | .dout (tsau_exc_ [3:0] ) |
| 225 | ); |
| 226 | |
| 227 | tlu_tel_dp_inv_macro__width_4 tsac_exc_inv ( |
| 228 | .din (tsac_exc_ [3:0] ), |
| 229 | .dout (tel_tsac_exc [3:0] ) |
| 230 | ); |
| 231 | |
| 232 | tlu_tel_dp_inv_macro__width_4 tsau_exc_inv ( |
| 233 | .din (tsau_exc_ [3:0] ), |
| 234 | .dout (tel_tsau_exc [3:0] ) |
| 235 | ); |
| 236 | |
| 237 | tlu_tel_dp_nand_macro__ports_2__width_4 tsacu_exc_nand ( |
| 238 | .din0 (tsac_exc_ [3:0] ), |
| 239 | .din1 (tsau_exc_ [3:0] ), |
| 240 | .dout (tel_tsacu_exc [3:0] ) |
| 241 | ); |
| 242 | |
| 243 | |
| 244 | |
| 245 | |
| 246 | |
| 247 | |
| 248 | supply0 vss; // <- port for ground |
| 249 | supply1 vdd; // <- port for power |
| 250 | |
| 251 | // fixscan start: |
| 252 | assign ecc_lat_scanin = scan_in ; |
| 253 | assign scan_out = ecc_lat_scanout ; |
| 254 | // fixscan end: |
| 255 | endmodule |
| 256 | |
| 257 | |
| 258 | |
| 259 | // |
| 260 | // or macro for ports = 2,3 |
| 261 | // |
| 262 | // |
| 263 | |
| 264 | |
| 265 | |
| 266 | |
| 267 | |
| 268 | module tlu_tel_dp_or_macro__ports_2__width_1 ( |
| 269 | din0, |
| 270 | din1, |
| 271 | dout); |
| 272 | input [0:0] din0; |
| 273 | input [0:0] din1; |
| 274 | output [0:0] dout; |
| 275 | |
| 276 | |
| 277 | |
| 278 | |
| 279 | |
| 280 | |
| 281 | or2 #(1) d0_0 ( |
| 282 | .in0(din0[0:0]), |
| 283 | .in1(din1[0:0]), |
| 284 | .out(dout[0:0]) |
| 285 | ); |
| 286 | |
| 287 | |
| 288 | |
| 289 | |
| 290 | |
| 291 | |
| 292 | |
| 293 | |
| 294 | |
| 295 | endmodule |
| 296 | |
| 297 | |
| 298 | |
| 299 | |
| 300 | |
| 301 | // |
| 302 | // buff macro |
| 303 | // |
| 304 | // |
| 305 | |
| 306 | |
| 307 | |
| 308 | |
| 309 | |
| 310 | module tlu_tel_dp_buff_macro__minbuff_1__width_20 ( |
| 311 | din, |
| 312 | dout); |
| 313 | input [19:0] din; |
| 314 | output [19:0] dout; |
| 315 | |
| 316 | |
| 317 | |
| 318 | |
| 319 | |
| 320 | |
| 321 | buff #(20) d0_0 ( |
| 322 | .in(din[19:0]), |
| 323 | .out(dout[19:0]) |
| 324 | ); |
| 325 | |
| 326 | |
| 327 | |
| 328 | |
| 329 | |
| 330 | |
| 331 | |
| 332 | |
| 333 | endmodule |
| 334 | |
| 335 | |
| 336 | |
| 337 | |
| 338 | |
| 339 | |
| 340 | |
| 341 | |
| 342 | |
| 343 | // any PARAMS parms go into naming of macro |
| 344 | |
| 345 | module tlu_tel_dp_msff_macro__width_38 ( |
| 346 | din, |
| 347 | clk, |
| 348 | en, |
| 349 | se, |
| 350 | scan_in, |
| 351 | siclk, |
| 352 | soclk, |
| 353 | pce_ov, |
| 354 | stop, |
| 355 | dout, |
| 356 | scan_out); |
| 357 | wire l1clk; |
| 358 | wire siclk_out; |
| 359 | wire soclk_out; |
| 360 | wire [36:0] so; |
| 361 | |
| 362 | input [37:0] din; |
| 363 | |
| 364 | |
| 365 | input clk; |
| 366 | input en; |
| 367 | input se; |
| 368 | input scan_in; |
| 369 | input siclk; |
| 370 | input soclk; |
| 371 | input pce_ov; |
| 372 | input stop; |
| 373 | |
| 374 | |
| 375 | |
| 376 | output [37:0] dout; |
| 377 | |
| 378 | |
| 379 | output scan_out; |
| 380 | |
| 381 | |
| 382 | |
| 383 | |
| 384 | cl_dp1_l1hdr_8x c0_0 ( |
| 385 | .l2clk(clk), |
| 386 | .pce(en), |
| 387 | .aclk(siclk), |
| 388 | .bclk(soclk), |
| 389 | .l1clk(l1clk), |
| 390 | .se(se), |
| 391 | .pce_ov(pce_ov), |
| 392 | .stop(stop), |
| 393 | .siclk_out(siclk_out), |
| 394 | .soclk_out(soclk_out) |
| 395 | ); |
| 396 | dff #(38) d0_0 ( |
| 397 | .l1clk(l1clk), |
| 398 | .siclk(siclk_out), |
| 399 | .soclk(soclk_out), |
| 400 | .d(din[37:0]), |
| 401 | .si({scan_in,so[36:0]}), |
| 402 | .so({so[36:0],scan_out}), |
| 403 | .q(dout[37:0]) |
| 404 | ); |
| 405 | |
| 406 | |
| 407 | |
| 408 | |
| 409 | |
| 410 | |
| 411 | |
| 412 | |
| 413 | |
| 414 | |
| 415 | |
| 416 | |
| 417 | |
| 418 | |
| 419 | |
| 420 | |
| 421 | |
| 422 | |
| 423 | |
| 424 | |
| 425 | endmodule |
| 426 | |
| 427 | |
| 428 | |
| 429 | |
| 430 | |
| 431 | |
| 432 | |
| 433 | |
| 434 | |
| 435 | // |
| 436 | // buff macro |
| 437 | // |
| 438 | // |
| 439 | |
| 440 | |
| 441 | |
| 442 | |
| 443 | |
| 444 | module tlu_tel_dp_buff_macro__rep_1__width_16 ( |
| 445 | din, |
| 446 | dout); |
| 447 | input [15:0] din; |
| 448 | output [15:0] dout; |
| 449 | |
| 450 | |
| 451 | |
| 452 | |
| 453 | |
| 454 | |
| 455 | buff #(16) d0_0 ( |
| 456 | .in(din[15:0]), |
| 457 | .out(dout[15:0]) |
| 458 | ); |
| 459 | |
| 460 | |
| 461 | |
| 462 | |
| 463 | |
| 464 | |
| 465 | |
| 466 | |
| 467 | endmodule |
| 468 | |
| 469 | |
| 470 | |
| 471 | |
| 472 | |
| 473 | // |
| 474 | // nand macro for ports = 2,3,4 |
| 475 | // |
| 476 | // |
| 477 | |
| 478 | |
| 479 | |
| 480 | |
| 481 | |
| 482 | module tlu_tel_dp_nand_macro__ports_2__width_1 ( |
| 483 | din0, |
| 484 | din1, |
| 485 | dout); |
| 486 | input [0:0] din0; |
| 487 | input [0:0] din1; |
| 488 | output [0:0] dout; |
| 489 | |
| 490 | |
| 491 | |
| 492 | |
| 493 | |
| 494 | |
| 495 | nand2 #(1) d0_0 ( |
| 496 | .in0(din0[0:0]), |
| 497 | .in1(din1[0:0]), |
| 498 | .out(dout[0:0]) |
| 499 | ); |
| 500 | |
| 501 | |
| 502 | |
| 503 | |
| 504 | |
| 505 | |
| 506 | |
| 507 | |
| 508 | |
| 509 | endmodule |
| 510 | |
| 511 | |
| 512 | |
| 513 | |
| 514 | |
| 515 | // |
| 516 | // nor macro for ports = 2,3 |
| 517 | // |
| 518 | // |
| 519 | |
| 520 | |
| 521 | |
| 522 | |
| 523 | |
| 524 | module tlu_tel_dp_nor_macro__ports_2__width_1 ( |
| 525 | din0, |
| 526 | din1, |
| 527 | dout); |
| 528 | input [0:0] din0; |
| 529 | input [0:0] din1; |
| 530 | output [0:0] dout; |
| 531 | |
| 532 | |
| 533 | |
| 534 | |
| 535 | |
| 536 | |
| 537 | nor2 #(1) d0_0 ( |
| 538 | .in0(din0[0:0]), |
| 539 | .in1(din1[0:0]), |
| 540 | .out(dout[0:0]) |
| 541 | ); |
| 542 | |
| 543 | |
| 544 | |
| 545 | |
| 546 | |
| 547 | |
| 548 | |
| 549 | endmodule |
| 550 | |
| 551 | |
| 552 | |
| 553 | |
| 554 | |
| 555 | // |
| 556 | // nor macro for ports = 2,3 |
| 557 | // |
| 558 | // |
| 559 | |
| 560 | |
| 561 | |
| 562 | |
| 563 | |
| 564 | module tlu_tel_dp_nor_macro__ports_3__width_1 ( |
| 565 | din0, |
| 566 | din1, |
| 567 | din2, |
| 568 | dout); |
| 569 | input [0:0] din0; |
| 570 | input [0:0] din1; |
| 571 | input [0:0] din2; |
| 572 | output [0:0] dout; |
| 573 | |
| 574 | |
| 575 | |
| 576 | |
| 577 | |
| 578 | |
| 579 | nor3 #(1) d0_0 ( |
| 580 | .in0(din0[0:0]), |
| 581 | .in1(din1[0:0]), |
| 582 | .in2(din2[0:0]), |
| 583 | .out(dout[0:0]) |
| 584 | ); |
| 585 | |
| 586 | |
| 587 | |
| 588 | |
| 589 | |
| 590 | |
| 591 | |
| 592 | endmodule |
| 593 | |
| 594 | |
| 595 | |
| 596 | |
| 597 | |
| 598 | // |
| 599 | // buff macro |
| 600 | // |
| 601 | // |
| 602 | |
| 603 | |
| 604 | |
| 605 | |
| 606 | |
| 607 | module tlu_tel_dp_buff_macro__rep_1__width_1 ( |
| 608 | din, |
| 609 | dout); |
| 610 | input [0:0] din; |
| 611 | output [0:0] dout; |
| 612 | |
| 613 | |
| 614 | |
| 615 | |
| 616 | |
| 617 | |
| 618 | buff #(1) d0_0 ( |
| 619 | .in(din[0:0]), |
| 620 | .out(dout[0:0]) |
| 621 | ); |
| 622 | |
| 623 | |
| 624 | |
| 625 | |
| 626 | |
| 627 | |
| 628 | |
| 629 | |
| 630 | endmodule |
| 631 | |
| 632 | |
| 633 | |
| 634 | |
| 635 | |
| 636 | // |
| 637 | // nand macro for ports = 2,3,4 |
| 638 | // |
| 639 | // |
| 640 | |
| 641 | |
| 642 | |
| 643 | |
| 644 | |
| 645 | module tlu_tel_dp_nand_macro__ports_2__width_4 ( |
| 646 | din0, |
| 647 | din1, |
| 648 | dout); |
| 649 | input [3:0] din0; |
| 650 | input [3:0] din1; |
| 651 | output [3:0] dout; |
| 652 | |
| 653 | |
| 654 | |
| 655 | |
| 656 | |
| 657 | |
| 658 | nand2 #(4) d0_0 ( |
| 659 | .in0(din0[3:0]), |
| 660 | .in1(din1[3:0]), |
| 661 | .out(dout[3:0]) |
| 662 | ); |
| 663 | |
| 664 | |
| 665 | |
| 666 | |
| 667 | |
| 668 | |
| 669 | |
| 670 | |
| 671 | |
| 672 | endmodule |
| 673 | |
| 674 | |
| 675 | |
| 676 | |
| 677 | |
| 678 | // |
| 679 | // invert macro |
| 680 | // |
| 681 | // |
| 682 | |
| 683 | |
| 684 | |
| 685 | |
| 686 | |
| 687 | module tlu_tel_dp_inv_macro__width_4 ( |
| 688 | din, |
| 689 | dout); |
| 690 | input [3:0] din; |
| 691 | output [3:0] dout; |
| 692 | |
| 693 | |
| 694 | |
| 695 | |
| 696 | |
| 697 | |
| 698 | inv #(4) d0_0 ( |
| 699 | .in(din[3:0]), |
| 700 | .out(dout[3:0]) |
| 701 | ); |
| 702 | |
| 703 | |
| 704 | |
| 705 | |
| 706 | |
| 707 | |
| 708 | |
| 709 | |
| 710 | |
| 711 | endmodule |
| 712 | |
| 713 | |
| 714 | |
| 715 | |