/* * ========== Copyright Header Begin ========================================== * * OpenSPARC T2 Processor File: tlu_rand5err_10529315.s * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved * 4150 Network Circle, Santa Clara, California 95054, U.S.A. * * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * For the avoidance of doubt, and except that if any non-GPL license * choice is available it will apply instead, Sun elects to use only * the General Public License version 2 (GPLv2) at this time for any * software where a choice of GPL license versions is made * available with the language indicating that GPLv2 or any later version * may be used, or where a choice of which version of the GPL is applied is * otherwise unspecified. * * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, * CA 95054 USA or visit www.sun.com if you need additional information or * have any questions. * * * ========== Copyright Header End ============================================ */ #d #define IMMU_SKIP_IF_NO_TTE #define DMMU_SKIP_IF_NO_TTE #define PORTABLE_CORE #define MAIN_PAGE_NUCLEUS_ALSO #define MAIN_PAGE_HV_ALSO #define MAIN_PAGE_VA_IS_RA_ALSO #define DISABLE_PART_LIMIT_CHECK #define MAIN_PAGE_USE_CONFIG 3 #define PART0_Z_TSB_SIZE_3 10 #define PART0_Z_PAGE_SIZE_3 1 #define PART0_NZ_TSB_SIZE_3 10 #define PART0_NZ_PAGE_SIZE_3 1 #define PART0_Z_TSB_SIZE_1 3 #define PART0_NZ_TSB_SIZE_1 3 #define PART_0_BASE 0x0 #define USER_PAGE_CUSTOM_MAP #define MAIN_BASE_TEXT_VA 0x333000000 #define MAIN_BASE_TEXT_RA 0x033000000 #define MAIN_BASE_DATA_VA 0x379400000 #define MAIN_BASE_DATA_RA 0x079400000 #define HIGHVA_HIGHNUM 0x3 #d #define NO_EOB_MARKER #undef INC_ERR_TRAPS #undef H_HT0_Instruction_Access_MMU_Error_0x71 #define H_HT0_Instruction_Access_MMU_Error_0x71 #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ mov 0x80, %l3;\ stxa %g0, [%l3]0x57;\ retry; #undef H_HT0_Instruction_access_error_0x0a #define H_HT0_Instruction_access_error_0x0a #define SUN_H_HT0_Instruction_access_error_0x0a retry #undef H_HT0_Internal_Processor_Error_0x29 #define H_HT0_Internal_Processor_Error_0x29 #define SUN_H_HT0_Internal_Processor_Error_0x29 retry #undef H_HT0_Data_Access_MMU_Error_0x72 #define H_HT0_Data_Access_MMU_Error_0x72 #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ mov 0x80, %l3;\ stxa %g0, [%l3]0x5f;\ retry; #undef H_HT0_Data_access_error_0x32 #define H_HT0_Data_access_error_0x32 #define SUN_H_HT0_Data_access_error_0x32 \ add %g0, 0x18, %i1;\ ldxa [%i1] 0x58, %i2;\ cmp %i2, 0x4;\ bne 1f;\ nop;\ done;\ 1:retry #undef H_HT0_Hw_Corrected_Error_0x63 #define H_HT0_Hw_Corrected_Error_0x63 #define SUN_H_HT0_Hw_Corrected_Error_0x63 ldxa [%g0]ASI_DESR, %i1; retry #undef H_HT0_Sw_Recoverable_Error_0x40 #define H_HT0_Sw_Recoverable_Error_0x40 #define SUN_H_HT0_Sw_Recoverable_Error_0x40 ldxa [%g0]ASI_DESR, %i1; retry #undef H_HT0_Store_Error_0x07 #define H_HT0_Store_Error_0x07 #define SUN_H_HT0_Store_Error_0x07 retry #define DAE_SKIP_IF_SOCU_ERROR #ifndef T_HANDLER_RAND4_1 #define T_HANDLER_RAND4_1 b .+16;\ sdiv %r1, %r0, %l4;nop;nop #endif #ifndef T_HANDLER_RAND7_1 #define T_HANDLER_RAND7_1 b .+28;\ pdist %f4, %f6, %f20; \ nop; nop ; nop; nop; illtrap #endif #ifndef T_HANDLER_RAND4_2 #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ save %i7, %g0, %i7; \ restore %i7, %g0, %i7;\ restore %i7, %g0, %i7; #endif #ifndef T_HANDLER_RAND7_2 #define T_HANDLER_RAND7_2 b .+8 ;\ rdpr %pstate, %l2;\ b .+8 ;\ rdpr %tstate, %l3;\ b .+12 ;\ wrpr %l3, %r0, %tstate; nop #endif #ifndef T_HANDLER_RAND4_3 #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ restore %i7, %g0, %i7;\ save %i7, %g0, %i7; \ restore %i7, %g0, %i7; #endif #ifndef T_HANDLER_RAND7_3 #define T_HANDLER_RAND7_3 b .+8 ;\ rdpr %tnpc, %l2;\ and %l2, 0xfc0, %l2;\ add %i7, %l2, %l2;\ stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ b .+8 ;\ stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; #endif #ifndef T_HANDLER_RAND4_4 #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 #endif #ifndef T_HANDLER_RAND7_4 #define T_HANDLER_RAND7_4 b .+8;\ save %i7, %g0, %i7; \ b,a .+8;\ b .+12;\ stw %i7, [%i7];\ b .-8;;\ restore %i7, %g0, %i7; #endif #ifndef T_HANDLER_RAND4_5 #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %f16;\ sdiv %l4, %l5, %l7;\ add %r31, 128, %l5;\ stda %l4, [%i7]ASI_BLOCK_PRIMARY_LITTLE; #endif #ifndef T_HANDLER_RAND7_5 #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ rdpr %tnpc, %l2;\ wrpr %l2, %tpc;\ add %l2, 4, %l2;\ wrpr %l2, %tnpc;\ restore %i7, %g0, %i7;\ retry; #endif #ifndef T_HANDLER_RAND4_6 #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %f32;\ rd %fprs, %l2; \ wr %l2, 0x4, %fprs ;\ stda %f0,[%r31]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; #endif #ifndef T_HANDLER_RAND7_6 #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ rdpr %tnpc, %l2;\ wrpr %l2, %tpc;\ add %l2, 4, %l2;\ wrpr %l2, %tnpc;\ stw %l2, [%i7];\ retry; #endif !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! #ifndef HT_HANDLER_RAND4_1 #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ b .+12;\ stxa %l3, [%l3]0x57 ;\ nop #endif #ifndef HT_HANDLER_RAND7_1 #define HT_HANDLER_RAND7_1 b .+28;\ pdist %f4, %f4, %f20;\ nop; nop ; nop; nop; illtrap #endif #ifndef HT_HANDLER_RAND4_2 #define HT_HANDLER_RAND4_2 rdpr %tstate, %l2;\ b .+12;\ wrpr %l2, 0x800, %tstate;\ nop; #endif #ifndef HT_HANDLER_RAND7_2 #define HT_HANDLER_RAND7_2 b .+8 ;\ rdhpr %hpstate, %l2;\ b .+8 ;\ rdhpr %htstate, %l3;\ b .+12 ;\ wrhpr %l3, %r0, %htstate; nop #endif #ifndef HT_HANDLER_RAND4_3 #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ mov 0x80, %l3;\ stxa %l3, [%l3]0x5f ;\ b .+8 ;\ ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; #endif #ifndef HT_HANDLER_RAND7_3 #define HT_HANDLER_RAND7_3 b .+8 ;\ rdpr %tnpc, %l2;\ and %l2, 0xfc0, %l2;\ add %i7, %l2, %l2;\ stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ b .+8 ;\ stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; #endif #ifndef HT_HANDLER_RAND4_4 #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_PRIMARY_LITTLE, %f0;\ b .+12 ;\ stxa %l3, [%g0]ASI_LSU_CONTROL; nop #endif #ifndef HT_HANDLER_RAND7_4 #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ and %l3, 0xff, %l3;\ sllx %l3, 26, %l3;\ ldxa [%g0]0x45, %l4;\ or %l3, %l4, %l3 ;\ stxa %l3, [%g0]0x45 ;\ nop; #endif #ifndef HT_HANDLER_RAND4_5 #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %f48;\ sdiv %l4, %l5, %l6;\ sdiv %l3, %l6, %l7;\ stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; #endif #ifndef HT_HANDLER_RAND7_5 #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ rdpr %tnpc, %l2;\ wrpr %l2, %tpc;\ add %l2, 4, %l2;\ wrpr %l2, %tnpc;\ restore %i7, %g0, %i7;\ retry; #endif #ifndef HT_HANDLER_RAND4_6 #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ rd %fprs, %l2; \ wr %l2, 0x4, %fprs ;\ stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; #endif #ifndef HT_HANDLER_RAND7_6 #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ rdpr %tnpc, %l2;\ wrpr %l2, %tpc;\ add %l2, 4, %l2;\ wrpr %l2, %tnpc;\ wrhpr %o4, %r0, %htstate;\ retry; #endif !!!!!!!!!!!!!!!!!!!!!!!!! !! Disable trap checking #define NO_TRAPCHECK ! Enable Traps #define ENABLE_T1_Privileged_Opcode_0x11 #define ENABLE_T1_Fp_Disabled_0x20 #define ENABLE_HT0_Watchdog_Reset_0x02 #define FILL_TRAP_RETRY #define SPILL_TRAP_RETRY #define CLEAN_WIN_RETRY #define My_RED_Mode_Other_Reset #define My_RED_Mode_Other_Reset \ ba red_other_ext;\ nop;retry;nop;nop;nop;nop;nop #define H_HT0_Software_Initiated_Reset_0x04 #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ setx Software_Reset_Handler, %g1, %g2 ;\ jmp %g2 ;\ nop #define H_T1_Clean_Window_0x24 #define SUN_H_T1_Clean_Window_0x24 \ rdpr %cleanwin, %l1;\ add %l1,1,%l1;\ wrpr %l1, %g0, %cleanwin;\ retry; nop; nop; nop; nop #define H_T1_Clean_Window_0x25 #define SUN_H_T1_Clean_Window_0x25 \ rdpr %cleanwin, %l1;\ add %l1,1,%l1;\ wrpr %l1, %g0, %cleanwin;\ retry; nop; nop; nop; nop #define H_T1_Clean_Window_0x26 #define SUN_H_T1_Clean_Window_0x26 \ rdpr %cleanwin, %l1;\ add %l1,1,%l1;\ wrpr %l1, %g0, %cleanwin;\ retry; nop; nop; nop; nop #define H_T1_Clean_Window_0x27 #define SUN_H_T1_Clean_Window_0x27 \ rdpr %cleanwin, %l1;\ add %l1,1,%l1;\ wrpr %l1, %g0, %cleanwin;\ retry; nop; nop; nop; nop #define H_HT0_Tag_Overflow #define My_HT0_Tag_Overflow \ HT_HANDLER_RAND7_1 ;\ done #define H_T0_Tag_Overflow #define My_T0_Tag_Overflow \ T_HANDLER_RAND7_2 ;\ done #define H_T1_Tag_Overflow_0x23 #define SUN_H_T1_Tag_Overflow_0x23 \ T_HANDLER_RAND7_3 ;\ done #define H_T0_Window_Spill_0_Normal_Trap #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_1_Normal_Trap #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_2_Normal_Trap #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_3_Normal_Trap #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_4_Normal_Trap #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_5_Normal_Trap #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_6_Normal_Trap #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_7_Normal_Trap #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_0_Other_Trap #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_1_Other_Trap #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_2_Other_Trap #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_3_Other_Trap #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_4_Other_Trap #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_5_Other_Trap #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_6_Other_Trap #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Spill_7_Other_Trap #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_0_Normal_Trap #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_1_Normal_Trap #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_2_Normal_Trap #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_3_Normal_Trap #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_4_Normal_Trap #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_5_Normal_Trap #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_6_Normal_Trap #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_7_Normal_Trap #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_0_Other_Trap #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_1_Other_Trap #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_2_Other_Trap #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_3_Other_Trap #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_4_Other_Trap #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_5_Other_Trap #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_6_Other_Trap #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Window_Fill_7_Other_Trap #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_0_Normal_Trap #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_1_Normal_Trap #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_2_Normal_Trap #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_3_Normal_Trap #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_4_Normal_Trap #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_5_Normal_Trap #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_6_Normal_Trap #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_7_Normal_Trap #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_0_Other_Trap #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_1_Other_Trap #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_2_Other_Trap #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_3_Other_Trap #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_4_Other_Trap #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_5_Other_Trap #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_6_Other_Trap #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Spill_7_Other_Trap #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_0_Normal_Trap #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_1_Normal_Trap #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_2_Normal_Trap #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_3_Normal_Trap #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_4_Normal_Trap #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_5_Normal_Trap #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_6_Normal_Trap #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_7_Normal_Trap #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_0_Other_Trap #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_1_Other_Trap #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_2_Other_Trap #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_3_Other_Trap #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_4_Other_Trap #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_5_Other_Trap #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_6_Other_Trap #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T1_Window_Fill_7_Other_Trap #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; #define H_T0_Trap_Instruction_0 #define My_T0_Trap_Instruction_0 \ T_HANDLER_RAND7_5 ;\ done; #define H_T0_Trap_Instruction_1 #define My_T0_Trap_Instruction_1 \ T_HANDLER_RAND7_6 ;\ done; #define H_T0_Trap_Instruction_2 #define My_T0_Trap_Instruction_2 \ inc %o3;\ umul %o3, 2, %o4;\ ba 1f; \ save %i7, %g0, %i7; \ 2: done; \ nop; \ 1: ba 2b; \ restore %i7, %g0, %i7 #define H_T0_Trap_Instruction_3 #define My_T0_Trap_Instruction_3 \ save %i7, %g0, %i7 ;\ T_HANDLER_RAND4_5;\ stw %o4, [%i7];\ restore %i7, %g0, %i7 ;\ done #define H_T0_Trap_Instruction_4 #define My_T0_Trap_Instruction_4 \ T_HANDLER_RAND7_6 ;\ done; #define H_T0_Trap_Instruction_5 #define My_T0_Trap_Instruction_5 \ T_HANDLER_RAND4_5;\ done; #define H_T1_Trap_Instruction_0 #define My_T1_Trap_Instruction_0 \ inc %o4;\ umul %o4, 2, %o5;\ ba 3f; \ save %i7, %g0, %i7; \ 4: done; \ nop; \ 3: ba 4b; \ restore %i7, %g0, %i7 #define H_T1_Trap_Instruction_1 #define My_T1_Trap_Instruction_1 \ T_HANDLER_RAND7_3;\ done #define H_T1_Trap_Instruction_2 #define My_T1_Trap_Instruction_2 \ inc %o3;\ umul %o3, 2, %o4;\ ba 5f; \ save %i7, %g0, %i7; \ 6: done; \ nop; \ 5: ba 6b; \ restore %i7, %g0, %i7 #define H_T1_Trap_Instruction_3 #define My_T1_Trap_Instruction_3 \ T_HANDLER_RAND4_1;\ done; #define H_T1_Trap_Instruction_4 #define My_T1_Trap_Instruction_4 \ T_HANDLER_RAND7_1;\ done; #define H_T1_Trap_Instruction_5 #define My_T1_Trap_Instruction_5 \ T_HANDLER_RAND7_2;\ done #define H_HT0_Trap_Instruction_0 #define My_HT0_Trap_Instruction_0 \ HT_HANDLER_RAND4_1 ;\ done; #define H_HT0_Trap_Instruction_1 #define My_HT0_Trap_Instruction_1 \ HT_HANDLER_RAND4_3 ;\ done #define H_HT0_Trap_Instruction_2 #define My_HT0_Trap_Instruction_2 \ HT_HANDLER_RAND7_5 ;\ done; #define H_HT0_Trap_Instruction_3 #define My_HT0_Trap_Instruction_3 \ HT_HANDLER_RAND4_5 ;\ done #define H_HT0_Trap_Instruction_4 #define My_HT0_Trap_Instruction_4 \ HT_HANDLER_RAND7_4 ;\ done #define H_HT0_Trap_Instruction_5 #define My_HT0_Trap_Instruction_5 \ ba htrap_5_ext;\ nop; retry;\ nop; nop; nop; nop; nop #define H_HT0_Mem_Address_Not_Aligned_0x34 #define My_HT0_Mem_Address_Not_Aligned_0x34 \ HT_HANDLER_RAND4_2 ;\ done ; #define H_HT0_Illegal_instruction_0x10 #define My_HT0_Illegal_instruction_0x10 \ done; #define H_HT0_DAE_so_page_0x30 #define My_HT0_DAE_so_page_0x30 \ done; #define H_HT0_DAE_invalid_asi_0x14 #define SUN_H_HT0_DAE_invalid_asi_0x14 \ done #define H_HT0_DAE_privilege_violation_0x15 #define SUN_H_HT0_DAE_privilege_violation_0x15 \ done; #define H_HT0_Privileged_Action_0x37 #define My_HT0_Privileged_Action_0x37 \ done; \ nop; nop #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ HT_HANDLER_RAND4_3 ;\ done #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ HT_HANDLER_RAND7_1;\ done #define H_HT0_Fp_exception_ieee_754_0x21 #define My_HT0_Fp_exception_ieee_754_0x21 \ HT_HANDLER_RAND4_2 ;\ done #define H_HT0_Fp_exception_other_0x22 #define My_HT0_Fp_exception_other_0x22 \ HT_HANDLER_RAND7_2 ;\ done #define H_HT0_Division_By_Zero #define My_HT0_Division_By_Zero \ HT_HANDLER_RAND4_6;\ done #define H_T0_Division_By_Zero #define My_T0_Division_By_Zero \ T_HANDLER_RAND4_3;\ done #define H_T1_Division_By_Zero_0x28 #define My_H_T1_Division_By_Zero_0x28 \ T_HANDLER_RAND4_3;\ done #define H_T0_Division_By_Zero #define My_T0_Division_By_Zero\ T_HANDLER_RAND4_4 ;\ done #define H_T0_Fp_exception_ieee_754_0x21 #define My_T0_Fp_exception_ieee_754_0x21 \ T_HANDLER_RAND4_3 ;\ done #define H_T1_Fp_Exception_Ieee_754_0x21 #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ T_HANDLER_RAND4_4 ;\ done #define H_T1_Fp_Exception_Other_0x22 #define My_H_T1_Fp_Exception_Other_0x22 \ T_HANDLER_RAND4_5 ;\ done #define H_T1_Privileged_Opcode_0x11 #define SUN_H_T1_Privileged_Opcode_0x11 \ T_HANDLER_RAND4_6 ;\ done #define H_HT0_Privileged_opcode_0x11 #define My_HT0_Privileged_opcode_0x11 \ HT_HANDLER_RAND4_1;\ done; #define H_HT0_Fp_disabled_0x20 #define My_HT0_Fp_disabled_0x20 \ mov 0x4, %l2 ;\ wr %l2, 0x0, %fprs ;\ sllx %l2, 10, %l3; \ rdpr %tstate, %l2;\ or %l2, %l3, %l2 ;\ stw %l2, [%i7];\ wrpr %l2, 0x0, %tstate;\ retry; #define H_T0_Fp_disabled_0x20 #define My_T0_Fp_disabled_0x20 \ mov 0x4, %l2 ;\ wr %l2, 0x0, %fprs ;\ sllx %l2, 10, %l3; \ rdpr %tstate, %l2;\ or %l2, %l3, %l2 ;\ wrpr %l2, 0x0, %tstate;\ retry; nop #define H_T1_Fp_Disabled_0x20 #define My_H_T1_Fp_Disabled_0x20 \ mov 0x4, %l2 ;\ wr %l2, 0x0, %fprs ;\ sllx %l2, 10, %l3; \ rdpr %tstate, %l2;\ or %l2, %l3, %l2 ;\ wrpr %l2, 0x0, %tstate;\ stw %l2, [%i7];\ retry #define H_HT0_Watchdog_Reset_0x02 #define My_HT0_Watchdog_Reset_0x02 \ ba wdog_2_ext;\ nop;retry;nop;nop;nop;nop;nop #define H_T0_Privileged_opcode_0x11 #define My_T0_Privileged_opcode_0x11 \ T_HANDLER_RAND4_4;\ done #define H_T1_Fp_exception_other_0x22 #define My_T1_Fp_exception_other_0x22 \ T_HANDLER_RAND7_3 ;\ done; #define H_T0_Fp_exception_other_0x22 #define My_T0_Fp_exception_other_0x22 \ T_HANDLER_RAND7_4;\ done #define H_HT0_Trap_Level_Zero_0x5f #define My_HT0_Trap_Level_Zero_0x5f \ not %g0, %r13; \ rdhpr %hpstate, %l3;\ jmp %r13;\ rdhpr %htstate, %l3;\ and %l3, 0xfe, %l3;\ wrhpr %l3, 0, %htstate;\ stw %r13, [%i7];\ retry #define My_Watchdog_Reset #define My_Watchdog_Reset \ ba wdog_red_ext;\ nop;retry;nop;nop;nop;nop;nop #define H_HT0_Control_Transfer_Instr_0x74 #define My_H_HT0_Control_Transfer_Instr_0x74 \ rdpr %tstate, %l3;\ mov 1, %l4;\ sllx %l4, 20, %l4;\ wrpr %l3, %l4, %tstate ;\ retry;nop; #define H_T0_Control_Transfer_Instr_0x74 #define My_H_T0_Control_Transfer_Instr_0x74 \ rdpr %tstate, %l3;\ mov 1, %l4;\ sllx %l4, 20, %l4;\ wrpr %l3, %l4, %tstate ;\ retry;nop; #define H_T1_Control_Transfer_Instr_0x74 #define My_H_T1_Control_Transfer_Instr_0x74 \ rdpr %tstate, %l3;\ mov 1, %l4;\ sllx %l4, 20, %l4;\ wrpr %l3, %l4, %tstate ;\ retry;nop; #define H_HT0_data_access_protection_0x6c #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop #define H_HT0_PA_Watchpoint_0x61 #define My_H_HT0_PA_Watchpoint_0x61 \ HT_HANDLER_RAND7_4;\ done #ifndef H_HT0_Data_access_error_0x32 #define H_HT0_Data_access_error_0x32 #define SUN_H_HT0_Data_access_error_0x32 \ done;nop #endif #define H_T0_VA_Watchpoint_0x62 #define My_T0_VA_Watchpoint_0x62 \ T_HANDLER_RAND7_5;\ done #define H_T1_VA_Watchpoint_0x62 #define SUN_H_T1_VA_Watchpoint_0x62 \ T_HANDLER_RAND7_3;\ done #define H_HT0_VA_Watchpoint_0x62 #define My_H_HT0_VA_Watchpoint_0x62 \ HT_HANDLER_RAND7_5;\ done #define H_HT0_Instruction_VA_Watchpoint_0x75 #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ done; #define H_HT0_Instruction_Breakpoint_0x76 #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ rdhpr %htstate, %g1;\ wrhpr %g1, 0x400, %htstate;\ retry;nop #define H_HT0_Instruction_address_range_0x0d #define SUN_H_HT0_Instruction_address_range_0x0d \ HT_HANDLER_RAND4_1;\ done; #define H_HT0_Instruction_real_range_0x0e #define SUN_H_HT0_Instruction_real_range_0x0e \ HT_HANDLER_RAND4_1;\ done; #define H_HT0_mem_real_range_0x2d #define SUN_H_HT0_mem_real_range_0x2d \ HT_HANDLER_RAND4_2;\ done; #define H_HT0_mem_address_range_0x2e #define SUN_H_HT0_mem_address_range_0x2e \ HT_HANDLER_RAND4_3;\ done; #define H_HT0_DAE_nc_page_0x16 #define SUN_H_HT0_DAE_nc_page_0x16 \ done; #define H_HT0_DAE_nfo_page_0x17 #define SUN_H_HT0_DAE_nfo_page_0x17 \ done; #define H_HT0_IAE_unauth_access_0x0b #define SUN_H_HT0_IAE_unauth_access_0x0b \ HT_HANDLER_RAND7_3;\ done; #define H_HT0_IAE_nfo_page_0x0c #define SUN_H_HT0_IAE_nfo_page_0x0c \ HT_HANDLER_RAND7_6;\ done; #define H_HT0_Reserved_0x3b #define SUN_H_HT0_Reserved_0x3b \ mov 0x80, %l3;\ stxa %l3, [%l3]0x5f ;\ stxa %l3, [%l3]0x57 ;\ done; #define H_HT0_IAE_privilege_violation_0x08 #define My_HT0_IAE_privilege_violation_0x08 \ HT_HANDLER_RAND7_2;\ done; #ifndef H_HT0_Instruction_Access_MMU_Error_0x71 #define H_HT0_Instruction_Access_MMU_Error_0x71 #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ mov 0x80, %l3;\ stxa %l3, [%l3]0x5f ;\ stxa %l3, [%l3]0x57 ;\ retry; #endif #ifndef H_HT0_Data_Access_MMU_Error_0x72 #define H_HT0_Data_Access_MMU_Error_0x72 #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ mov 0x80, %l3;\ stxa %l3, [%l3]0x5f ;\ stxa %l3, [%l3]0x57 ;\ retry; #endif !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! #ifndef INT_HANDLER_RAND4_1 #define INT_HANDLER_RAND4_1 retry; nop; nop; nop #endif #ifndef INT_HANDLER_RAND7_1 #define INT_HANDLER_RAND7_1 retry; nop; nop; nop ; nop; nop; nop #endif #ifndef INT_HANDLER_RAND4_2 #define INT_HANDLER_RAND4_2 retry; nop; nop; nop #endif #ifndef INT_HANDLER_RAND7_2 #define INT_HANDLER_RAND7_2 retry; nop; nop; nop ; nop; nop; nop #endif #ifndef INT_HANDLER_RAND4_3 #define INT_HANDLER_RAND4_3 retry; nop; nop; nop #endif #ifndef INT_HANDLER_RAND7_3 #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop #endif #define H_HT0_Externally_Initiated_Reset_0x03 #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ set cregs_lsu_ctl_reg_r64, %g1; \ stxa %g1, [%g0] ASI_LSU_CTL_REG; \ retry;nop #define My_External_Reset \ ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ set cregs_lsu_ctl_reg_r64, %l5; \ stxa %l5, [%g0] ASI_LSU_CTL_REG; \ retry;nop !!!!! SPU Interrupt Handlers #define H_HT0_Control_Word_Queue_Interrupt_0x3c #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ INT_HANDLER_RAND7_1 ;\ retry ; #define H_HT0_Modular_Arithmetic_Interrupt_0x3d #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ INT_HANDLER_RAND7_2 ;\ retry ; !!!!! HW interrupt handlers #define H_HT0_Interrupt_0x60 #define My_HT0_Interrupt_0x60 \ ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ INT_HANDLER_RAND4_1 ;\ retry; !!!!! Queue interrupt handler #define H_T0_Cpu_Mondo_Trap_0x7c #define My_T0_Cpu_Mondo_Trap_0x7c \ mov 0x3c8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3c0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_T0_Dev_Mondo_Trap_0x7d #define My_T0_Dev_Mondo_Trap_0x7d \ mov 0x3d8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3d0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_T0_Resumable_Error_0x7e #define My_T0_Resumable_Error_0x7e \ mov 0x3e8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3e0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_T1_Cpu_Mondo_Trap_0x7c #define My_T1_Cpu_Mondo_Trap_0x7c \ mov 0x3c8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3c0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_T1_Dev_Mondo_Trap_0x7d #define My_T1_Dev_Mondo_Trap_0x7d \ mov 0x3d8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3d0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_T1_Resumable_Error_0x7e #define My_T1_Resumable_Error_0x7e \ mov 0x3e8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3e0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_HT0_Reserved_0x7c #define SUN_H_HT0_Reserved_0x7c \ mov 0x3c8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3c0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_HT0_Reserved_0x7d #define SUN_H_HT0_Reserved_0x7d \ mov 0x3d8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3d0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop #define H_HT0_Reserved_0x7e #define SUN_H_HT0_Reserved_0x7e \ mov 0x3e8, %g3; \ ldxa [%g3] 0x25, %g5; \ mov 0x3e0, %g3; \ stxa %g5, [%g3] 0x25; \ retry; \ nop; \ nop; \ nop !!!!! Hstick-match trap handler #define H_T0_Reserved_0x5e #define My_T0_Reserved_0x5e \ rdhpr %hintp, %g3; \ wrhpr %g3, %g3, %hintp; \ retry; \ nop; \ nop; \ nop; \ nop; \ nop #define H_HT0_Hstick_Match_0x5e #define My_HT0_Hstick_Match_0x5e \ rdhpr %hintp, %g3; \ wrhpr %g3, %g3, %hintp; \ retry; \ nop; \ nop; \ nop; \ nop; \ nop #define H_T0_Reserved_0x5e #define My_T0_Reserved_0x5e \ rdhpr %hintp, %g3; \ wrhpr %g3, %g3, %hintp; \ retry; \ nop; \ nop; \ nop; \ nop; \ nop #define H_T1_Reserved_0x5e #define My_T1_Reserved_0x5e \ rdhpr %hintp, %g3; \ wrhpr %g3, %g3, %hintp; \ retry; \ nop; \ nop; \ nop; \ nop; \ nop !!!!! SW interuupt handlers #define H_T0_Interrupt_Level_14_0x4e #define My_T0_Interrupt_Level_14_0x4e \ rd %softint, %g3; \ sethi %hi(0x14000), %g3; \ or %g3, 0x1, %g3; \ wr %g3, %g0, %clear_softint; \ rd %tick, %g3 ;\ retry; \ #define H_T0_Interrupt_Level_1_0x41 #define My_T0_Interrupt_Level_1_0x41 \ rd %softint, %g3; \ or %g0, 0x2, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_2_0x42 #define My_T0_Interrupt_Level_2_0x42 \ rd %softint, %g3; \ or %g0, 0x4, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_3_0x43 #define My_T0_Interrupt_Level_3_0x43 \ rd %softint, %g3; \ or %g0, 0x8, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_4_0x44 #define My_T0_Interrupt_Level_4_0x44 \ rd %softint, %g3; \ or %g0, 0x10, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_5_0x45 #define My_T0_Interrupt_Level_5_0x45 \ rd %softint, %g3; \ or %g0, 0x20, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_6_0x46 #define My_T0_Interrupt_Level_6_0x46 \ rd %softint, %g3; \ or %g0, 0x40, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_7_0x47 #define My_T0_Interrupt_Level_7_0x47 \ rd %softint, %g3; \ or %g0, 0x80, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_8_0x48 #define My_T0_Interrupt_Level_8_0x48 \ rd %softint, %g3; \ or %g0, 0x100, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_9_0x49 #define My_T0_Interrupt_Level_9_0x49 \ rd %softint, %g3; \ or %g0, 0x200, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_10_0x4a #define My_T0_Interrupt_Level_10_0x4a \ rd %softint, %g3; \ or %g0, 0x400, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_11_0x4b #define My_T0_Interrupt_Level_11_0x4b \ rd %softint, %g3; \ or %g0, 0x800, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_12_0x4c #define My_T0_Interrupt_Level_12_0x4c \ rd %softint, %g3; \ sethi %hi(0x1000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_13_0x4d #define My_T0_Interrupt_Level_13_0x4d \ rd %softint, %g3; \ sethi %hi(0x2000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T0_Interrupt_Level_15_0x4f #define My_T0_Interrupt_Level_15_0x4f \ sethi %hi(0x8000), %g3; \ wr %g3, %g0, %clear_softint; \ wr %g0, %g0, %pic;\ sethi %hi(0x80040000), %g2;\ rd %pcr, %g3;\ andn %g3, %g2, %g3;\ wr %g3, %g0, %pcr;\ retry; #define H_T1_Interrupt_Level_14_0x4e #define My_T1_Interrupt_Level_14_0x4e \ rd %softint, %g3; \ sethi %hi(0x14000), %g3; \ or %g3, 0x1, %g3; \ wr %g3, %g0, %clear_softint; \ rd %tick, %g3 ;\ retry; \ #define H_T1_Interrupt_Level_1_0x41 #define My_T1_Interrupt_Level_1_0x41 \ rd %softint, %g3; \ or %g0, 0x2, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_2_0x42 #define My_T1_Interrupt_Level_2_0x42 \ rd %softint, %g3; \ or %g0, 0x4, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_3_0x43 #define My_T1_Interrupt_Level_3_0x43 \ rd %softint, %g3; \ or %g0, 0x8, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_4_0x44 #define My_T1_Interrupt_Level_4_0x44 \ rd %softint, %g3; \ or %g0, 0x10, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_5_0x45 #define My_T1_Interrupt_Level_5_0x45 \ rd %softint, %g3; \ or %g0, 0x20, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_6_0x46 #define My_T1_Interrupt_Level_6_0x46 \ rd %softint, %g3; \ or %g0, 0x40, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_7_0x47 #define My_T1_Interrupt_Level_7_0x47 \ rd %softint, %g3; \ or %g0, 0x80, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_8_0x48 #define My_T1_Interrupt_Level_8_0x48 \ rd %softint, %g3; \ or %g0, 0x100, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_9_0x49 #define My_T1_Interrupt_Level_9_0x49 \ rd %softint, %g3; \ or %g0, 0x200, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_10_0x4a #define My_T1_Interrupt_Level_10_0x4a \ rd %softint, %g3; \ or %g0, 0x400, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_11_0x4b #define My_T1_Interrupt_Level_11_0x4b \ rd %softint, %g3; \ or %g0, 0x800, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_12_0x4c #define My_T1_Interrupt_Level_12_0x4c \ rd %softint, %g3; \ sethi %hi(0x1000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_13_0x4d #define My_T1_Interrupt_Level_13_0x4d \ rd %softint, %g3; \ sethi %hi(0x2000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_T1_Interrupt_Level_15_0x4f #define My_T1_Interrupt_Level_15_0x4f \ sethi %hi(0x8000), %g3; \ wr %g3, %g0, %clear_softint; \ wr %g0, %g0, %pic;\ sethi %hi(0x80040000), %g2;\ rd %pcr, %g3;\ andn %g3, %g2, %g3;\ wr %g3, %g0, %pcr;\ retry; #define H_HT0_Interrupt_Level_14_0x4e #define My_HT0_Interrupt_Level_14_0x4e \ rd %softint, %g3; \ sethi %hi(0x14000), %g3; \ or %g3, 0x1, %g3; \ wr %g3, %g0, %clear_softint; \ rd %tick, %g3 ;\ sub %g3, 0x80, %g3;\ wrpr %g3, %g0, %tick;\ retry; \ #define H_HT0_Interrupt_Level_1_0x41 #define My_HT0_Interrupt_Level_1_0x41 \ rd %softint, %g3; \ or %g0, 0x2, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_2_0x42 #define My_HT0_Interrupt_Level_2_0x42 \ rd %softint, %g3; \ or %g0, 0x4, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_3_0x43 #define My_HT0_Interrupt_Level_3_0x43 \ rd %softint, %g3; \ or %g0, 0x8, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_4_0x44 #define My_HT0_Interrupt_Level_4_0x44 \ rd %softint, %g3; \ or %g0, 0x10, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_5_0x45 #define My_HT0_Interrupt_Level_5_0x45 \ rd %softint, %g3; \ or %g0, 0x20, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_6_0x46 #define My_HT0_Interrupt_Level_6_0x46 \ rd %softint, %g3; \ or %g0, 0x40, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_7_0x47 #define My_HT0_Interrupt_Level_7_0x47 \ rd %softint, %g3; \ or %g0, 0x80, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_8_0x48 #define My_HT0_Interrupt_Level_8_0x48 \ rd %softint, %g3; \ or %g0, 0x100, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_9_0x49 #define My_HT0_Interrupt_Level_9_0x49 \ rd %softint, %g3; \ or %g0, 0x200, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_10_0x4a #define My_HT0_Interrupt_Level_10_0x4a \ rd %softint, %g3; \ or %g0, 0x400, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_11_0x4b #define My_HT0_Interrupt_Level_11_0x4b \ rd %softint, %g3; \ or %g0, 0x800, %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_12_0x4c #define My_HT0_Interrupt_Level_12_0x4c \ rd %softint, %g3; \ sethi %hi(0x1000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_13_0x4d #define My_HT0_Interrupt_Level_13_0x4d \ rd %softint, %g3; \ sethi %hi(0x2000), %g3; \ wr %g3, %g0, %clear_softint; \ retry; \ nop; \ nop; \ nop; \ nop #define H_HT0_Interrupt_Level_15_0x4f #define My_HT0_Interrupt_Level_15_0x4f \ sethi %hi(0x8000), %g3; \ wr %g3, %g0, %clear_softint; \ wr %g0, %g0, %pic;\ sethi %hi(0x80040000), %g2;\ rd %pcr, %g3;\ andn %g3, %g2, %g3;\ wr %g3, %g0, %pcr;\ retry; !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! !# Steer towards main TBA on these errors .. !# These are redefines ... #undef SUN_H_HT0_IAE_unauth_access_0x0b #define SUN_H_HT0_IAE_unauth_access_0x0b \ set resolve_bad_tte, %g3;\ jmp %g3;\ nop #undef My_HT0_IAE_privilege_violation_0x08 #define My_HT0_IAE_privilege_violation_0x08 \ set resolve_bad_tte, %g3;\ jmp %g3;\ nop #define H_HT0_Instruction_address_range_0x0d #define SUN_H_HT0_Instruction_address_range_0x0d \ rdpr %tpc, %g1;\ rdpr %tnpc, %g2;\ stw %g1, [%i7];\ stw %g2, [%i7+4];\ jmpl %r27+8, %r27;\ fdivd %f0, %f4, %f4;\ nop; #define H_HT0_Instruction_real_range_0x0e #define SUN_H_HT0_Instruction_real_range_0x0e \ rdpr %tpc, %g1;\ rdpr %tnpc, %g2;\ stw %g1, [%i7];\ stw %g2, [%i7+4];\ jmpl %r27+8, %r27;\ fdivd %f0, %f4, %f4;\ nop; #undef SUN_H_HT0_IAE_nfo_page_0x0c #define SUN_H_HT0_IAE_nfo_page_0x0c \ set resolve_bad_tte, %g3;\ jmp %g3;\ nop #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ set restore_range_regs, %g3;\ jmp %g3;\ nop #define H_HT0_Data_Invalid_TSB_Entry_0x2b #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ set restore_range_regs, %g3;\ jmp %g3;\ nop #define H_T1_Reserved_0x00 #define SUN_H_T1_Reserved_0x00 \ nop;\ jmpl %r27+8, %r0;\ nop; #undef FAST_BOOT #include "hboot.s" #ifndef MULTIPASS #define MULTIPASS 0 #endif #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) changequote([, ])dnl SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA attr_text { Name = .LOMEIN, VA= LOMEIN_TEXT_VA, RA= MAIN_BASE_TEXT_RA, PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), part_0_ctx_nonzero_tsb_config_1, part_0_ctx_zero_tsb_config_1, TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, tsbonly } attr_data { Name = .LOMEIN, VA= LOMEIN_DATA_VA, RA= MAIN_BASE_DATA_RA, PA= ra2pa2(MAIN_BASE_DATA_RA, 0), part_0_ctx_nonzero_tsb_config_2, part_0_ctx_zero_tsb_config_2 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, tsbonly } attr_data { Name = .LOMEIN, VA= LOMEIN_DATA_VA, RA= MAIN_BASE_DATA_RA, PA= ra2pa2(MAIN_BASE_DATA_RA, 0), part_0_ctx_nonzero_tsb_config_3, part_0_ctx_zero_tsb_config_3 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, tsbonly } .text .align 0x100000 nop .data .word 0x0 SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA attr_text { Name = .MAIN, VA=MAIN_BASE_TEXT_VA, RA= LOMEIN_TEXT_VA, PA= LOMEIN_TEXT_VA, part_0_ctx_nonzero_tsb_config_2, part_0_ctx_zero_tsb_config_2, TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, } attr_data { Name = .MAIN, VA=MAIN_BASE_DATA_VA RA= LOMEIN_DATA_VA, PA= LOMEIN_DATA_VA, part_0_ctx_nonzero_tsb_config_1, part_0_ctx_zero_tsb_config_1 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, } attr_data { Name = .MAIN, VA=MAIN_BASE_DATA_VA RA= LOMEIN_DATA_VA, PA= LOMEIN_DATA_VA, part_0_ctx_nonzero_tsb_config_3, part_0_ctx_zero_tsb_config_3 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, tsbonly } attr_text { Name = .MAIN, VA=MAIN_BASE_TEXT_VA, hypervisor } attr_data { Name = .MAIN, VA=MAIN_BASE_DATA_VA hypervisor } changequote(`,')dnl' .text .global main main: ! Set up ld/st area per thread ta T_CHANGE_HPRIV ldxa [%g0]0x63, %o2 and %o2, 0x7, %o1 brnz %o1, init_start mov 0xff, %r11 lock_sync_thds: set sync_thr_counter4, %r23 #ifndef SPC and %o2, 0x38, %o2 add %o2,%r23,%r23 !Core's sync counter #endif st %r11, [%r23] !lock sync_thr_counter4 add %r23, 64, %r23 st %r11, [%r23] !lock sync_thr_counter5 add %r23, 64, %r23 st %r11, [%r23] !lock sync_thr_counter6 init_start: wrhpr %g0, 0x0, %hpstate ! ta T_CHANGE_NONHPRIV umul %r9, 256, %r31 setx user_data_start, %r1, %r3 add %r31, %r3, %r31 wr %r0, 0x4, %asi !Initializing integer registers ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0xb4, %r14 mov 0xb1, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0xb3, %r14 mov 0xb0, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0xb2, %r14 mov 0x31, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0x31, %r14 mov 0xb1, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0xb3, %r14 mov 0xb0, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0x32, %r14 mov 0xb2, %r30 save %r31, %r0, %r31 ldx [%r31+0], %r0 ldx [%r31+8], %r1 ldx [%r31+16], %r2 ldx [%r31+24], %r3 ldx [%r31+32], %r4 ldx [%r31+40], %r5 ldx [%r31+48], %r6 ldx [%r31+56], %r7 ldx [%r31+64], %r8 ldx [%r31+72], %r9 ldx [%r31+80], %r10 ldx [%r31+88], %r11 ldx [%r31+96], %r12 ldx [%r31+104], %r13 ldx [%r31+112], %r14 mov %r31, %r15 ldx [%r31+128], %r16 ldx [%r31+136], %r17 ldx [%r31+144], %r18 ldx [%r31+152], %r19 ldx [%r31+160], %r20 ldx [%r31+168], %r21 ldx [%r31+176], %r22 ldx [%r31+184], %r23 ldx [%r31+192], %r24 ldx [%r31+200], %r25 ldx [%r31+208], %r26 ldx [%r31+216], %r27 ldx [%r31+224], %r28 ldx [%r31+232], %r29 mov 0x33, %r14 mov 0xb2, %r30 save %r31, %r0, %r31 restore restore restore !Initializing float registers ldd [%r31+0], %f0 ldd [%r31+16], %f2 ldd [%r31+32], %f4 ldd [%r31+48], %f6 ldd [%r31+64], %f8 ldd [%r31+80], %f10 ldd [%r31+96], %f12 ldd [%r31+112], %f14 ldd [%r31+128], %f16 ldd [%r31+144], %f18 ldd [%r31+160], %f20 ldd [%r31+176], %f22 ldd [%r31+192], %f24 ldd [%r31+208], %f26 ldd [%r31+224], %f28 ldd [%r31+240], %f30 !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. ta T_CHANGE_HPRIV setx diag_finish, %r29, %r28 add %r28, 4, %r29 wrpr %g0, 1, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 2, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 3, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 4, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 5, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 6, %tl wrpr %r28, %tpc wrpr %r29, %tnpc wrpr %g0, 0, %tl !Initializing Tick Cmprs mov 1, %g2 sllx %g2, 63, %g2 or %g1, %g2, %g1 wrhpr %g1, %g0, %hsys_tick_cmpr wr %g1, %g0, %tick_cmpr wr %g1, %g0, %sys_tick_cmpr #if (MULTIPASS > 0) mov 0x38, %g1 stxa %r0, [%g1]ASI_SCRATCHPAD #endif ! Set up fpr PMU traps set 0x59e91937, %g2 b fork_threads wr %g2, %g0, %pcr .align 1024 common_target: nop sub %r27, 8, %r27 and %r27, 8, %r12 mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 brz,a %r12, .+8 lduw [%r27], %r12 ! load jmp dest into dcache - xinval return %r27 .word 0xd1e7dd40 ! 1: CASA_I casa [%r31] 0xea, %r0, %r8 nop jmp %r27 nop !$EV trig_pc_d(1,@VA(.MAIN.fork_threads)) -> marker(bootEnd, *, 1) fork_threads: rd %tick, %r17 mov 0x40, %g1 setup_hwtw_config: stxa %r17, [%g1]0x58 ta %icc, T_RD_THID ! fork: source strm = 0xffffffffffffffff; target strm = 0x1 cmp %o1, 0 setx fork_lbl_0_1, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x2 cmp %o1, 1 setx fork_lbl_0_2, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x4 cmp %o1, 2 setx fork_lbl_0_3, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x8 cmp %o1, 3 setx fork_lbl_0_4, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x10 cmp %o1, 4 setx fork_lbl_0_5, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x20 cmp %o1, 5 setx fork_lbl_0_6, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x40 cmp %o1, 6 setx fork_lbl_0_7, %g2, %g3 be,a .+8 jmp %g3 nop ! fork: source strm = 0xffffffffffffffff; target strm = 0x80 cmp %o1, 7 setx fork_lbl_0_8, %g2, %g3 be,a .+8 jmp %g3 nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_8: wrhpr %g0, 0xe50, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_80_0: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e1f4 ! 2: STF_I st %f8, [0x01f4, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_80 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_1: wrhpr %g0, 0x893, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d100 ! 3: CASA_I casa [%r31] 0x88, %r0, %r8 dvapa_80_2: nop nop ta T_CHANGE_HPRIV mov 0x947, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x840, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1a249c8 ! 4: FDIVd fdivd %f40, %f8, %f16 nop nop set 0x6ce0c6dc, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_3: .word 0x99b444c9 ! 5: FCMPNE32 fcmpne32 %d48, %d40, %r12 br_longdelay3_80_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x81983617 ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x1617, %hpstate mondo_80_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d94c00b ! 7: WRPR_WSTATE_R wrpr %r19, %r11, %wstate .word 0xe1bfda00 ! 8: STDFA_R stda %f16, [%r0, %r31] br_badelay3_80_7: .word 0x12800001 ! 1: BNE bne .word 0x32800001 ! 1: BNE bne,a .word 0xd7108013 ! 1: LDQF_R - [%r2, %r19], %f11 .word 0xa5a40822 ! 9: FADDs fadds %f16, %f2, %f18 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_8), 16, 16)) -> intp(mask2tid(0x80),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,904,*,*,1) xir_80_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_8: and %g1, 2, %g1 brnz,a %g1, xirwait_80_8 ldx [%r17], %g1 xir_80_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842286 ! 10: WR_CLEAR_SOFTINT_I wr %r16, 0x0286, %clear_softint .word 0x2cc90001 ! 1: BRGZ brgz,a,pt %r4, .word 0x8d903a17 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1a17, %pstate .word 0xe2dfd160 ! 12: LDXA_R ldxa [%r31, %r0] 0x8b, %r17 nop nop set 0x9d104dd9, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa3a449d0 ! 1: FDIVd fdivd %f48, %f16, %f48 intvec_80_11: .word 0x9f80369d ! 13: SIR sir 0x169d .word 0xe19fdb40 ! 14: LDDFA_R ldda [%r31, %r0], %f16 ibp_80_13: nop nop .word 0x9b7036bc ! 15: POPC_I popc 0x16bc, %r13 nop nop ta T_CHANGE_HPRIV ! macro donret_80_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_14-donret_80_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b88a00 | (0x58 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1bb5, %htstate best_set_reg(0x940, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) ldx [%r12+%r0], %g1 retry donretarg_80_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_80_15: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_16: wrhpr %g0, 0x4c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d140 ! 18: CASA_I casa [%r31] 0x8a, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_17: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_17) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,728,*,*,1)') ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_17: wrhpr %g0, 0x399, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 19: RDPC rd %pc, %r17 .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 .word 0x9f8024a9 ! 20: SIR sir 0x04a9 brcommon3_80_18: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd31fe1e0 ! 21: LDDF_I ldd [%r31, 0x01e0], %f9 .word 0xf16fe180 ! 1: PREFETCH_I prefetch [%r31 + 0x0180], #24 .word 0x9f80279c ! 22: SIR sir 0x079c .word 0x93d020b3 ! 23: Tcc_I tne icc_or_xcc, %r0 + 179 br_badelay2_80_19: .word 0x12800001 ! 1: BNE bne pdist %f10, %f22, %f14 .word 0xa7b48313 ! 24: ALIGNADDRESS alignaddr %r18, %r19, %r19 ibp_80_20: nop nop wrhpr %g0, 0xb43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fda00 ! 25: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983713 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1713, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_80_22: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfde00 ! 27: STDFA_R stda %f0, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_23: wrhpr %g0, 0x401, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c540 ! 28: CASA_I casa [%r31] 0x2a, %r0, %r17 mondo_80_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3c0] %asi stxa %r1, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948013 ! 29: WRPR_WSTATE_R wrpr %r18, %r19, %wstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_25: wrhpr %g0, 0xadb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c2c0 ! 30: CASA_I casa [%r31] 0x16, %r0, %r17 .word 0xe22fe1a2 ! 31: STB_I stb %r17, [%r31 + 0x01a2] brcommon3_80_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7d060 ! 1: CASA_I casa [%r31] 0x83, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe2bfc080 ! 32: STDA_R stda %r17, [%r31 + %r0] 0x04 .word 0xe33fe090 ! 1: STDF_I std %f17, [0x0090, %r31] .word 0xa3b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d48 mov 0x32, %r30 .word 0x91d0001e ! 33: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe19fe060 ! 34: LDDFA_I ldda [%r31, 0x0060], %f16 brcommon3_80_27: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe297d000 ! 35: LDUHA_R lduha [%r31, %r0] 0x80, %r17 nop nop mov 0x0, %r18 splash_cmpr_80_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 36: SIAM siam 1 jmptr_80_29: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_30: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_30) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,736,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_30: wrhpr %g0, 0xd10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 38: RDPC rd %pc, %r19 cancelint_80_31: rdhpr %halt, %r11 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_33), 16, 16)) -> intp(mask2tid(0x80),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,712,*,*,1) xir_80_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_33: and %g1, 2, %g1 brnz,a %g1, xirwait_80_33 ldx [%r17], %g1 xir_80_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853b19 ! 41: WR_CLEAR_SOFTINT_I wr %r20, 0x1b19, %clear_softint frzptr_80_34: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 42: BN bn,a brcommon3_80_35: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe180 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0180] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d90254d ! 43: WRPR_PSTATE_I wrpr %r0, 0x054d, %pstate frzptr_80_36: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe43fe0a0 ! 1: STD_I std %r18, [%r31 + 0x00a0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 44: BN bn,a nop nop set 0x35e0050a, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_37: .word 0x9bb504c6 ! 45: FCMPNE32 fcmpne32 %d20, %d6, %r13 frzptr_80_38: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe000 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0000] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_39: wrhpr %g0, 0xe18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d060 ! 47: CASA_I casa [%r31] 0x83, %r0, %r16 .word 0xe19fda00 ! 48: LDDFA_R ldda [%r31, %r0], %f16 .word 0xe0bfc400 ! 49: STDA_R stda %r16, [%r31 + %r0] 0x20 nop nop mov 0x1, %r18 splash_cmpr_80_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_42)+8 , 16, 16)) -> intp(5,0,21,*,640,*,8a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_42)&0xffffffff)+8 , 16, 16)) -> intp(1,0,9,*,1008,*,8a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 50: SIAM siam 1 mondo_80_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d910012 ! 51: WRPR_WSTATE_R wrpr %r4, %r18, %wstate .word 0xe09fe120 ! 52: LDDA_I ldda [%r31, + 0x0120] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_44) , 16, 16)) -> intp(5,0,26,*,1000,*,e1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_44)&0xffffffff) , 16, 16)) -> intp(1,0,0,*,928,*,e1,1) #else set 0xcf40d71a, %r28 !TTID : 7 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_44: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803872 ! 53: SIR sir 0x1872 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_80_46: rdhpr %halt, %r13 .word 0x85880000 ! 55: ALLCLEAN brcommon3_80_47: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe070 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0070] ba,a .+8 jmpl %r27-0, %r27 .word 0xd13fe190 ! 56: STDF_I std %f8, [0x0190, %r31] dvapa_80_48: nop nop ta T_CHANGE_HPRIV mov 0xe6f, %r20 mov 0x6, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x31b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd03fe030 ! 57: STD_I std %r8, [%r31 + 0x0030] cancelint_80_49: rdhpr %halt, %r8 .word 0x85880000 ! 58: ALLCLEAN intveclr_80_50: nop nop ta T_CHANGE_HPRIV setx 0xfc0474c3fd695cb7, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xadb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_80_51: nop nop setx 0xffffffbfffffffa2, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_80_52: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e190 ! 1: STQF_I - %f10, [0x0190, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd4dfc2c0 ! 61: LDXA_R ldxa [%r31, %r0] 0x16, %r10 mondo_80_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r4, [%r0+0x3d8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d94c00a ! 62: WRPR_WSTATE_R wrpr %r19, %r10, %wstate intveclr_80_54: nop nop ta T_CHANGE_HPRIV setx 0x00bab7384c402201, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x6cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 63: FBPLG fblg,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_55), 16, 16)) -> intp(mask2tid(0x80),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) xir_80_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_55: and %g1, 2, %g1 brnz,a %g1, xirwait_80_55 ldx [%r17], %g1 xir_80_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ea0b ! 64: WR_CLEAR_SOFTINT_I wr %r19, 0x0a0b, %clear_softint ibp_80_56: nop nop .word 0xa7a489d1 ! 65: FDIVd fdivd %f18, %f48, %f50 ibp_80_57: nop nop wrhpr %g0, 0x148, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91b4c7d0 ! 66: PDIST pdistn %d50, %d16, %d8 .word 0xc19fde20 ! 67: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_59), 16, 16)) -> intp(mask2tid(0x80),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,648,*,*,1) xir_80_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_59: and %g1, 2, %g1 brnz,a %g1, xirwait_80_59 ldx [%r17], %g1 xir_80_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ff84 ! 68: WR_CLEAR_SOFTINT_I wr %r19, 0x1f84, %clear_softint br_longdelay4_80_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902001 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate .word 0xe69fd100 ! 70: LDDA_R ldda [%r31, %r0] 0x88, %r19 .word 0xe09fdf00 ! 71: LDDA_R ldda [%r31, %r0] 0xf8, %r16 splash_tba_80_62: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_80_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3c0] %asi stxa %r10, [%r0+0x3d8] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d940008 ! 73: WRPR_WSTATE_R wrpr %r16, %r8, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_64) , 16, 16)) -> intp(7,0,5,*,744,*,e2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_64)&0xffffffff) , 16, 16)) -> intp(7,0,17,*,904,*,e2,1) #else set 0x6c801285, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7a449c3 ! 1: FDIVd fdivd %f48, %f34, %f50 intvec_80_64: .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, mondo_80_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c8] %asi stxa %r16, [%r0+0x3e8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d94c006 ! 75: WRPR_WSTATE_R wrpr %r19, %r6, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_66), 16, 16)) -> intp(mask2tid(0x80),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,984,*,*,1) xir_80_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_66: and %g1, 2, %g1 brnz,a %g1, xirwait_80_66 ldx [%r17], %g1 xir_80_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84651a ! 76: WR_CLEAR_SOFTINT_I wr %r17, 0x051a, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_67), 16, 16)) -> intp(mask2tid(0x80),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,976,*,*,1) xir_80_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_67: and %g1, 2, %g1 brnz,a %g1, xirwait_80_67 ldx [%r17], %g1 xir_80_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab806ac4 ! 77: WR_CLEAR_SOFTINT_I wr %r1, 0x0ac4, %clear_softint splash_hpstate_80_68: ta T_CHANGE_NONHPRIV .word 0x1b400001 ! 1: FBPLE fble .word 0x81983843 ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x1843, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_69: wrhpr %g0, 0xe83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d100 ! 79: CASA_I casa [%r31] 0x88, %r0, %r19 .word 0xe6bfdc40 ! 1: STDA_R stda %r19, [%r31 + %r0] 0xe2 .word 0xe6dfc6c0 ! 1: LDXA_R ldxa [%r31, %r0] 0x36, %r19 mov 0xb0, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_80_70: nop nop ta T_CHANGE_HPRIV set 0x6a7b2d01, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x28800001 ! 1: BLEU bleu,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_80_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_71)+8 , 16, 16)) -> intp(1,0,20,*,920,*,ee,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_71)&0xffffffff)+8 , 16, 16)) -> intp(6,0,11,*,952,*,ee,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_72), 16, 16)) -> intp(mask2tid(0x80),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,936,*,*,1) xir_80_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_72: and %g1, 2, %g1 brnz,a %g1, xirwait_80_72 ldx [%r17], %g1 xir_80_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8437c7 ! 83: WR_CLEAR_SOFTINT_I wr %r16, 0x17c7, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_73: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_73) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,904,*,*,1)') ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_73: wrhpr %g0, 0xe8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 84: RDPC rd %pc, %r13 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983344 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1344, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_80_75: set user_data_start, %o7 .word 0x93902002 ! 86: WRPR_CWP_I wrpr %r0, 0x0002, %cwp cwp_80_76: set user_data_start, %o7 .word 0x93902007 ! 87: WRPR_CWP_I wrpr %r0, 0x0007, %cwp brcommon1_80_77: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0x87a90a47 ! 88: FCMPd fcmpd %fcc, %f4, %f38 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_78), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,936,*,*,1) xir_80_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_78: and %g1, 2, %g1 brnz,a %g1, xirwait_80_78 ldx [%r17], %g1 xir_80_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a5dd ! 89: WR_CLEAR_SOFTINT_I wr %r10, 0x05dd, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_80_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_79-donret_80_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d97000 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1e0d, %htstate best_set_reg(0x71b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) done donretarg_80_79: .word 0x81983554 ! 90: WRHPR_HPSTATE_I wrhpr %r0, 0x1554, %hpstate .word 0xc19fe0c0 ! 91: LDDFA_I ldda [%r31, 0x00c0], %f0 ibp_80_80: nop nop .word 0xd43fe120 ! 92: STD_I std %r10, [%r31 + 0x0120] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_80 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_81: wrhpr %g0, 0x658, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7d040 ! 93: CASA_I casa [%r31] 0x82, %r0, %r10 trapasi_80_82: nop mov 0x8, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_80_83: nop nop ta T_CHANGE_HPRIV setx 0xdfecbf9c45dcf974, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 95: FBPLG fblg intveclr_80_84: nop nop ta T_CHANGE_HPRIV setx 0x91ff1f8a0b7be65c, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_80_85: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdb40 ! 97: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_86: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_86) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,896,*,*,1)') ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_86: wrhpr %g0, 0xcc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 98: RDPC rd %pc, %r20 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_87: wrhpr %g0, 0x83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 99: CASA_I casa [%r31] 0xf8, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_80_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_88-donret_80_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x005c9a00 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xdc5, %htstate best_set_reg(0x11a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) ldx [%r12+%r0], %g1 retry donretarg_80_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_80_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x87a98a4c ! 102: FCMPd fcmpd %fcc, %f6, %f12 .word 0x87a9ca42 ! 103: FCMPd fcmpd %fcc, %f38, %f2 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_92), 16, 16)) -> intp(mask2tid(0x80),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,680,*,*,1) xir_80_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_92: and %g1, 2, %g1 brnz,a %g1, xirwait_80_92 ldx [%r17], %g1 xir_80_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843dcd ! 104: WR_CLEAR_SOFTINT_I wr %r16, 0x1dcd, %clear_softint ibp_80_93: nop nop .word 0x20800001 ! 105: BN bn,a nop nop mov 0x0, %r18 splash_cmpr_80_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 106: SIAM siam 1 frzptr_80_95: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 107: BN bn,a .word 0xe3e7c2c0 ! 1: CASA_I casa [%r31] 0x16, %r0, %r17 .word 0x9f803067 ! 108: SIR sir 0x1067 nop nop ta T_CHANGE_HPRIV ! macro donret_80_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_96-donret_80_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x005c6200 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xa9f, %htstate wrhpr %g0, 0xf92, %hpstate ! rand=1 (80) ldx [%r12+%r0], %g1 retry donretarg_80_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x1c780002 ! 110: BPPOS .word 0xe2dfc400 ! 111: LDXA_R ldxa [%r31, %r0] 0x20, %r17 splash_tba_80_98: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0xee50d584, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa1b084d4 ! 1: FCMPNE32 fcmpne32 %d2, %d20, %r16 intvec_80_99: .word 0x9f803b59 ! 113: SIR sir 0x1b59 memptr_80_100: set 0x60340000, %r31 .word 0x8580e0b7 ! 114: WRCCR_I wr %r3, 0x00b7, %ccr nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_101: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_101) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,976,*,*,1)') ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_101: wrhpr %g0, 0x149, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 115: RDPC rd %pc, %r10 splash_tba_80_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_103)+8 , 16, 16)) -> intp(5,0,14,*,720,*,fe,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_103)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,704,*,fe,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982484 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0484, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_104: wrhpr %g0, 0x20a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d060 ! 118: CASA_I casa [%r31] 0x83, %r0, %r13 ibp_80_105: nop nop .word 0x95a509d4 ! 119: FDIVd fdivd %f20, %f20, %f10 ibp_80_106: nop nop .word 0x9f8020e0 ! 120: SIR sir 0x00e0 mondo_80_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3d0] %asi stxa %r1, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d924002 ! 121: WRPR_WSTATE_R wrpr %r9, %r2, %wstate .word 0xe19fde20 ! 122: LDDFA_R ldda [%r31, %r0], %f16 .word 0xda9fe1a0 ! 123: LDDA_I ldda [%r31, + 0x01a0] %asi, %r13 brcommon3_80_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0x95aac824 ! 124: FMOVGE fmovs %fcc1, %f4, %f10 .word 0xe037e008 ! 125: STH_I sth %r16, [%r31 + 0x0008] frzptr_80_109: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702180 ! 1: POPC_I popc 0x0180, %r16 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 126: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_110: wrhpr %g0, 0x6c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c240 ! 127: CASA_I casa [%r31] 0x12, %r0, %r16 nop nop set 0x59709433, %r28 !TTID : 4 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_111: .word 0x99a189d0 ! 128: FDIVd fdivd %f6, %f16, %f12 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_112) , 16, 16)) -> intp(7,0,10,*,752,*,92,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_112)&0xffffffff) , 16, 16)) -> intp(5,0,7,*,648,*,92,1) #else set 0xd3109c05, %r28 !TTID : 4 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7b444cb ! 1: FCMPNE32 fcmpne32 %d48, %d42, %r19 intvec_80_112: .word 0x39400001 ! 129: FBPUGE fbuge,a,pn %fcc0, .word 0xc0bfc2c0 ! 130: STDA_R stda %r0, [%r31 + %r0] 0x16 .word 0xd4bfdf00 ! 131: STDA_R stda %r10, [%r31 + %r0] 0xf8 .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_80_116: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe110 ! 134: LDDA_I ldda [%r31, + 0x0110] %asi, %r10 intveclr_80_117: nop nop ta T_CHANGE_HPRIV setx 0x06965edc3a7d4639, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x119, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x2c800001 ! 1: BNEG bneg,a .word 0x8d903745 ! 136: WRPR_PSTATE_I wrpr %r0, 0x1745, %pstate .word 0xd49fc180 ! 137: LDDA_R ldda [%r31, %r0] 0x0c, %r10 ibp_80_120: nop nop wrhpr %g0, 0xac9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd497dc40 ! 138: LDUHA_R lduha [%r31, %r0] 0xe2, %r10 .word 0x8d9035af ! 139: WRPR_PSTATE_I wrpr %r0, 0x15af, %pstate frzptr_80_122: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd43fe050 ! 1: STD_I std %r10, [%r31 + 0x0050] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 140: BN bn,a nop nop set 0xd3d06e43, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7b044cd ! 1: FCMPNE32 fcmpne32 %d32, %d44, %r19 intvec_80_123: .word 0x97b4c4d1 ! 141: FCMPNE32 fcmpne32 %d50, %d48, %r11 .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982fc6 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0fc6, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_80_126: ta T_CHANGE_NONHPRIV .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, .word 0x81983455 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x1455, %hpstate demap_80_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, stxa %g3, [%g3] 0x57 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0xd49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe160 ! 145: LDD_I ldd [%r31 + 0x0160], %r19 .word 0xe63fe091 ! 146: STD_I std %r19, [%r31 + 0x0091] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_128)+8 , 16, 16)) -> intp(7,0,27,*,936,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_128)&0xffffffff)+8 , 16, 16)) -> intp(2,0,30,*,656,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982659 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0659, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_80_129: rdhpr %halt, %r17 .word 0x85880000 ! 148: ALLCLEAN splash_tba_80_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_80_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_131-donret_80_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d24600 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xa1f, %htstate best_set_reg(0x10fa, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) done donretarg_80_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_132) , 16, 16)) -> intp(2,0,14,*,664,*,97,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_132)&0xffffffff) , 16, 16)) -> intp(7,0,17,*,704,*,97,1) #else set 0xdfd0c845, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, memptr_80_133: set 0x60540000, %r31 .word 0x85846a32 ! 152: WRCCR_I wr %r17, 0x0a32, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0xe69fd920 ! 154: LDDA_R ldda [%r31, %r0] 0xc9, %r19 .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe1b0 ! 156: LDD_I ldd [%r31 + 0x01b0], %r19 .word 0xe0bfde00 ! 157: STDA_R stda %r16, [%r31 + %r0] 0xf0 splash_lsu_80_136: nop nop ta T_CHANGE_HPRIV set 0xad5be567, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697c280 ! 159: LDUHA_R lduha [%r31, %r0] 0x14, %r19 .word 0x91a289d1 ! 160: FDIVd fdivd %f10, %f48, %f8 dvapa_80_138: nop nop ta T_CHANGE_HPRIV mov 0x82c, %r20 mov 0xe, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x75b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2bfc3c0 ! 161: STDA_R stda %r9, [%r31 + %r0] 0x1e .word 0xd2dfd060 ! 162: LDXA_R ldxa [%r31, %r0] 0x83, %r9 intveclr_80_140: nop nop ta T_CHANGE_HPRIV setx 0x240efadb646f962a, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x45a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 163: FBPLG fblg .word 0xc1bfda00 ! 164: STDFA_R stda %f0, [%r0, %r31] brcommon3_80_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r9, [%r0] ASI_LSU_CONTROL .word 0xa9aac831 ! 165: FMOVGE fmovs %fcc1, %f17, %f20 brcommon3_80_142: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-4, %r27 .word 0xa5b7c7c0 ! 166: PDIST pdistn %d62, %d0, %d18 .word 0x9190400a ! 167: WRPR_PIL_R wrpr %r1, %r10, %pil frzptr_80_144: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800002 ! 168: BN bn splash_hpstate_80_145: ta T_CHANGE_NONHPRIV .word 0x8198365d ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x165d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_80 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_146: wrhpr %g0, 0x30a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d160 ! 170: CASA_I casa [%r31] 0x8b, %r0, %r18 splash_lsu_80_147: nop nop ta T_CHANGE_HPRIV set 0x8ba3a367, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0acc0001 ! 1: BRNZ brnz,pt %r16, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 171: FBPULE fbule .word 0x95b504c3 ! 172: FCMPNE32 fcmpne32 %d20, %d34, %r10 .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_80_149: set 0x60140000, %r31 .word 0x858364c5 ! 174: WRCCR_I wr %r13, 0x04c5, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_150), 16, 16)) -> intp(mask2tid(0x80),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,648,*,*,1) xir_80_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_150: and %g1, 2, %g1 brnz,a %g1, xirwait_80_150 ldx [%r17], %g1 xir_80_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80fcee ! 175: WR_CLEAR_SOFTINT_I wr %r3, 0x1cee, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_80_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_151)+8 , 16, 16)) -> intp(6,0,3,*,736,*,99,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_151)&0xffffffff)+8 , 16, 16)) -> intp(4,0,3,*,744,*,99,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_152) , 16, 16)) -> intp(4,0,29,*,672,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_152)&0xffffffff) , 16, 16)) -> intp(1,0,28,*,904,*,b3,1) #else set 0xfad0a56d, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803302 ! 1: SIR sir 0x1302 intvec_80_152: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80381a ! 177: SIR sir 0x181a mondo_80_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d904004 ! 178: WRPR_WSTATE_R wrpr %r1, %r4, %wstate .word 0xd427e0d8 ! 179: STW_I stw %r10, [%r31 + 0x00d8] nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_154: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_154) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,984,*,*,1)') ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_154: wrhpr %g0, 0xb98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 180: RDPC rd %pc, %r19 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_155: wrhpr %g0, 0xc90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7dd40 ! 182: CASA_I casa [%r31] 0xea, %r0, %r9 .word 0x91b34fe3 ! 183: FONES e %f8 splash_tba_80_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_80_157: rdhpr %halt, %r8 .word 0x85880000 ! 185: ALLCLEAN .word 0x87ac4ad2 ! 186: FCMPEd fcmped %fcc, %f48, %f18 frzptr_80_158: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfde20 ! 187: STDFA_R stda %f16, [%r0, %r31] nop nop set 0xb6809ad6, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8028ec ! 1: SIR sir 0x08ec intvec_80_159: .word 0x99b084cb ! 188: FCMPNE32 fcmpne32 %d2, %d42, %r12 .word 0xd437e058 ! 189: STH_I sth %r10, [%r31 + 0x0058] change_to_randtl_80_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_80_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_162), 16, 16)) -> intp(mask2tid(0x80),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,912,*,*,1) xir_80_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_162: and %g1, 2, %g1 brnz,a %g1, xirwait_80_162 ldx [%r17], %g1 xir_80_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8324d4 ! 192: WR_CLEAR_SOFTINT_I wr %r12, 0x04d4, %clear_softint .word 0x91914009 ! 193: WRPR_PIL_R wrpr %r5, %r9, %pil memptr_80_164: set 0x60540000, %r31 .word 0x858164f7 ! 194: WRCCR_I wr %r5, 0x04f7, %ccr .word 0xd4bfc180 ! 195: STDA_R stda %r10, [%r31 + %r0] 0x0c frzptr_80_166: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfde00 ! 196: STDFA_R stda %f0, [%r0, %r31] brcommon1_80_167: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-0, %r27 .word 0x99b5048c ! 197: FCMPLE32 fcmple32 %d20, %d12, %r12 dvapa_80_168: nop nop ta T_CHANGE_HPRIV mov 0xf04, %r20 mov 0x17, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xc8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7e000 ! 198: CASA_R casa [%r31] %asi, %r0, %r8 .word 0xe19fdd40 ! 199: LDDFA_R ldda [%r31, %r0], %f16 .word 0xa150c000 ! 200: RDPR_TT rdpr %tt, %r16 .word 0xf16fe130 ! 201: PREFETCH_I prefetch [%r31 + 0x0130], #24 fpinit_80_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009a4 ! 202: FDIVs fdivs %f0, %f4, %f6 .word 0xc19fdb20 ! 203: LDDFA_R ldda [%r31, %r0], %f0 cwp_80_172: set user_data_start, %o7 .word 0x93902007 ! 204: WRPR_CWP_I wrpr %r0, 0x0007, %cwp nop nop set 0xe1403261, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97b484d3 ! 1: FCMPNE32 fcmpne32 %d18, %d50, %r11 intvec_80_173: .word 0xa7b504c1 ! 205: FCMPNE32 fcmpne32 %d20, %d32, %r19 splash_lsu_80_174: nop nop ta T_CHANGE_HPRIV set 0x6340fd08, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 206: FBPULE fbule,a,pn %fcc0, ibp_80_175: nop nop .word 0xc19fde00 ! 207: LDDFA_R ldda [%r31, %r0], %f0 dvapa_80_176: nop nop ta T_CHANGE_HPRIV mov 0xc77, %r20 mov 0x11, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd9a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfda00 ! 208: STDFA_R stda %f16, [%r0, %r31] splash_lsu_80_177: nop nop ta T_CHANGE_HPRIV set 0x8480d41d, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 209: FBPULE fbule nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_178: wrhpr %g0, 0xc58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c540 ! 210: CASA_I casa [%r31] 0x2a, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_179), 16, 16)) -> intp(mask2tid(0x80),1,3,*,744,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,968,*,*,1) xir_80_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_179: and %g1, 2, %g1 brnz,a %g1, xirwait_80_179 ldx [%r17], %g1 xir_80_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81b1d6 ! 211: WR_CLEAR_SOFTINT_I wr %r6, 0x11d6, %clear_softint .word 0xa7a00553 ! 212: FSQRTd fsqrt cancelint_80_180: rdhpr %halt, %r13 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_181), 16, 16)) -> intp(mask2tid(0x80),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) xir_80_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_181: and %g1, 2, %g1 brnz,a %g1, xirwait_80_181 ldx [%r17], %g1 xir_80_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823854 ! 214: WR_CLEAR_SOFTINT_I wr %r8, 0x1854, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_182: wrhpr %g0, 0x43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7dd40 ! 215: CASA_I casa [%r31] 0xea, %r0, %r10 dvapa_80_183: nop nop ta T_CHANGE_HPRIV mov 0xe8b, %r20 mov 0x1d, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x50b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfc3e0 ! 216: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_184), 16, 16)) -> intp(mask2tid(0x80),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,952,*,*,1) xir_80_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_184: and %g1, 2, %g1 brnz,a %g1, xirwait_80_184 ldx [%r17], %g1 xir_80_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e0ac ! 217: WR_CLEAR_SOFTINT_I wr %r19, 0x00ac, %clear_softint .word 0xd43fe1f0 ! 218: STD_I std %r10, [%r31 + 0x01f0] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_186)+8 , 16, 16)) -> intp(4,0,19,*,648,*,f3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_186)&0xffffffff)+8 , 16, 16)) -> intp(3,0,6,*,984,*,f3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198389f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x189f, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_80_187: nop nop ta T_CHANGE_HPRIV mov 0xd9b, %r20 mov 0x1a, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x391, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4bfc080 ! 220: STDA_R stda %r10, [%r31 + %r0] 0x04 pmu_80_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffab, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_80_189: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x957020a0 ! 1: POPC_I popc 0x00a0, %r10 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 222: BN bn,a cancelint_80_190: rdhpr %halt, %r11 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_191: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_191) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,648,*,*,1)') ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_191: wrhpr %g0, 0x683, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 224: RDPC rd %pc, %r18 brcommon1_80_192: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0xa9b207d2 ! 225: PDIST pdistn %d8, %d18, %d20 nop nop mov 0x1, %r18 splash_cmpr_80_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_193)+8 , 16, 16)) -> intp(5,0,5,*,728,*,f8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_193)&0xffffffff)+8 , 16, 16)) -> intp(4,0,6,*,664,*,f8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_194)+8 , 16, 16)) -> intp(4,0,26,*,728,*,97,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_194)&0xffffffff)+8 , 16, 16)) -> intp(6,0,4,*,920,*,97,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983c4c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c4c, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_195: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_195) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,680,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_195: wrhpr %g0, 0xa53, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 228: RDPC rd %pc, %r9 .word 0x879021c8 ! 229: WRPR_TT_I wrpr %r0, 0x01c8, %tt nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_196: wrhpr %g0, 0x701, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d160 ! 230: CASA_I casa [%r31] 0x8b, %r0, %r18 .word 0xe49fc3c0 ! 231: LDDA_R ldda [%r31, %r0] 0x1e, %r18 .word 0x9f802160 ! 232: SIR sir 0x0160 frzptr_80_199: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fc3e0 ! 233: LDDFA_R ldda [%r31, %r0], %f16 .word 0xa57021c0 ! 1: POPC_I popc 0x01c0, %r18 .word 0x9f802c4e ! 234: SIR sir 0x0c4e mondo_80_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3d8] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d920007 ! 235: WRPR_WSTATE_R wrpr %r8, %r7, %wstate splash_tba_80_201: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_202)+8 , 16, 16)) -> intp(1,0,4,*,976,*,ec,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_202)&0xffffffff)+8 , 16, 16)) -> intp(6,0,23,*,744,*,ec,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e57 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e57, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_80_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3c0] %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d92c007 ! 238: WRPR_WSTATE_R wrpr %r11, %r7, %wstate cancelint_80_204: rdhpr %halt, %r20 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_80_205: nop nop ta T_CHANGE_HPRIV set 0xcfebee69, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 240: FBPULE fbule nop nop ta T_CHANGE_HPRIV ! macro donret_80_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_206-donret_80_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00672d00 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x4c5, %htstate wrhpr %g0, 0xe12, %hpstate ! rand=1 (80) ldx [%r12+%r0], %g1 retry donretarg_80_206: .word 0x2f400001 ! 241: FBPU fbu,a,pn %fcc0, .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x9195000c ! 243: WRPR_PIL_R wrpr %r20, %r12, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_208), 16, 16)) -> intp(mask2tid(0x80),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,896,*,*,1) xir_80_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_208: and %g1, 2, %g1 brnz,a %g1, xirwait_80_208 ldx [%r17], %g1 xir_80_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ede7 ! 244: WR_CLEAR_SOFTINT_I wr %r19, 0x0de7, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_209)+8 , 16, 16)) -> intp(7,0,8,*,976,*,90,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_209)&0xffffffff)+8 , 16, 16)) -> intp(7,0,31,*,656,*,90,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983611 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1611, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_210: wrhpr %g0, 0x450, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c280 ! 246: CASA_I casa [%r31] 0x14, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x1, %r18 splash_cmpr_80_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_211)+8 , 16, 16)) -> intp(2,0,7,*,992,*,ac,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_211)&0xffffffff)+8 , 16, 16)) -> intp(3,0,10,*,928,*,ac,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 248: SIAM siam 1 cancelint_80_212: rdhpr %halt, %r8 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_213)+8 , 16, 16)) -> intp(3,0,10,*,944,*,a4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_213)&0xffffffff)+8 , 16, 16)) -> intp(0,0,19,*,936,*,a4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983241 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1241, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d903a4d ! 251: WRPR_PSTATE_I wrpr %r0, 0x1a4d, %pstate memptr_80_215: set 0x60540000, %r31 .word 0x85853815 ! 252: WRCCR_I wr %r20, 0x1815, %ccr nop nop mov 0x1, %r18 splash_cmpr_80_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_216)+8 , 16, 16)) -> intp(3,0,19,*,680,*,fe,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_216)&0xffffffff)+8 , 16, 16)) -> intp(5,0,14,*,680,*,fe,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_80_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7dd40 ! 1: CASA_I casa [%r31] 0xea, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r20, [%r0] ASI_LSU_CONTROL .word 0x91aac831 ! 254: FMOVGE fmovs %fcc1, %f17, %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_218) , 16, 16)) -> intp(7,0,2,*,976,*,aa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_218)&0xffffffff) , 16, 16)) -> intp(6,0,13,*,1008,*,aa,1) #else set 0xea6093d0, %r28 !TTID : 3 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_218: .word 0x39400001 ! 255: FBPUGE fbuge,a,pn %fcc0, .word 0x9191800c ! 256: WRPR_PIL_R wrpr %r6, %r12, %pil ibp_80_220: nop nop .word 0x9ba449d0 ! 257: FDIVd fdivd %f48, %f16, %f44 .word 0xd71fe170 ! 258: LDDF_I ldd [%r31, 0x0170], %f11 cancelint_80_222: rdhpr %halt, %r13 .word 0x85880000 ! 259: ALLCLEAN .word 0xe1bfdb20 ! 260: STDFA_R stda %f16, [%r0, %r31] .word 0xe89fd000 ! 261: LDDA_R ldda [%r31, %r0] 0x80, %r20 cancelint_80_225: rdhpr %halt, %r13 .word 0x85880000 ! 262: ALLCLEAN brcommon3_80_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa1aac834 ! 263: FMOVGE fmovs %fcc1, %f20, %f16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_227)+8 , 16, 16)) -> intp(0,0,27,*,712,*,99,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_227)&0xffffffff)+8 , 16, 16)) -> intp(6,0,7,*,656,*,99,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982456 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0456, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_80_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe110 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0110] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x93aac82a ! 265: FMOVGE fmovs %fcc1, %f10, %f9 .word 0xd6bfd000 ! 266: STDA_R stda %r11, [%r31 + %r0] 0x80 splash_hpstate_80_230: .word 0x26cc8002 ! 1: BRLZ brlz,a,pt %r18, .word 0x8198260f ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x060f, %hpstate memptr_80_231: set user_data_start, %r31 .word 0x85823faf ! 268: WRCCR_I wr %r8, 0x1faf, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_232) , 16, 16)) -> intp(1,0,15,*,744,*,d4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_232)&0xffffffff) , 16, 16)) -> intp(5,0,22,*,928,*,d4,1) #else set 0x5d90a51c, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f802001 ! 1: SIR sir 0x0001 intvec_80_232: .word 0x9f803421 ! 269: SIR sir 0x1421 pmu_80_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb2ffffffa6, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_80_234: nop nop ta T_CHANGE_HPRIV set 0x4031c4cc, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_235), 16, 16)) -> intp(mask2tid(0x80),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,744,*,*,1) xir_80_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_235: and %g1, 2, %g1 brnz,a %g1, xirwait_80_235 ldx [%r17], %g1 xir_80_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84bbf5 ! 273: WR_CLEAR_SOFTINT_I wr %r18, 0x1bf5, %clear_softint .word 0xc32fe1b0 ! 274: STXFSR_I st-sfr %f1, [0x01b0, %r31] .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xe09fc2c0 ! 276: LDDA_R ldda [%r31, %r0] 0x16, %r16 .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_80_240: nop nop ta T_CHANGE_HPRIV set 0x39b3c109, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x1d400001 ! 1: FBPULE fbule stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0x66108d3f, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_241: .word 0x9f803260 ! 279: SIR sir 0x1260 mondo_80_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r5, [%r0+0x3d8] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d914008 ! 280: WRPR_WSTATE_R wrpr %r5, %r8, %wstate dvapa_80_243: nop nop ta T_CHANGE_HPRIV mov 0xe2f, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x611, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91b187d4 ! 281: PDIST pdistn %d6, %d20, %d8 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_244: wrhpr %g0, 0xc80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c600 ! 282: CASA_I casa [%r31] 0x30, %r0, %r20 .word 0xe91fe050 ! 283: LDDF_I ldd [%r31, 0x0050], %f20 .word 0xe897c2e0 ! 284: LDUHA_R lduha [%r31, %r0] 0x17, %r20 br_longdelay4_80_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902002 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_248: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_248) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,696,*,*,1)') ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_248: wrhpr %g0, 0xb92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 286: RDPC rd %pc, %r18 memptr_80_249: set user_data_start, %r31 .word 0x8584a90e ! 287: WRCCR_I wr %r18, 0x090e, %ccr .word 0x91920011 ! 288: WRPR_PIL_R wrpr %r8, %r17, %pil mondo_80_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e8] %asi stxa %r16, [%r0+0x3d8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d930009 ! 289: WRPR_WSTATE_R wrpr %r12, %r9, %wstate cancelint_80_252: rdhpr %halt, %r19 .word 0x85880000 ! 290: ALLCLEAN jmptr_80_253: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_80_254: rdhpr %halt, %r20 .word 0x85880000 ! 292: ALLCLEAN frzptr_80_255: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 293: BN bn,a .word 0xa97022c3 ! 294: POPC_I popc 0x02c3, %r20 frzptr_80_257: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfc3e0 ! 295: STDFA_R stda %f16, [%r0, %r31] br_badelay1_80_258: .word 0x1d400002 ! 1: FBPULE fbule .word 0xd937e0f0 ! 1: STQF_I - %f12, [0x00f0, %r31] .word 0xf16fe170 ! 1: PREFETCH_I prefetch [%r31 + 0x0170], #24 normalw .word 0x97458000 ! 296: RD_SOFTINT_REG rd %softint, %r11 ibp_80_259: nop nop .word 0xa7a249a9 ! 297: FDIVs fdivs %f9, %f9, %f19 .word 0x91940007 ! 298: WRPR_PIL_R wrpr %r16, %r7, %pil brcommon2_80_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd5150008 ! 1: LDQF_R - [%r20, %r8], %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 299: BN bn,a splash_lsu_80_262: nop nop ta T_CHANGE_HPRIV set 0x381f6dc4, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 300: FBPULE fbule,a,pn %fcc0, pmu_80_263: nop nop setx 0xffffffbeffffffa4, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_80_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_264)+8 , 16, 16)) -> intp(3,0,8,*,648,*,bf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_264)&0xffffffff)+8 , 16, 16)) -> intp(4,0,22,*,744,*,bf,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_80_265: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_266), 16, 16)) -> intp(mask2tid(0x80),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,992,*,*,1) xir_80_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_266: and %g1, 2, %g1 brnz,a %g1, xirwait_80_266 ldx [%r17], %g1 xir_80_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82e92c ! 304: WR_CLEAR_SOFTINT_I wr %r11, 0x092c, %clear_softint nop nop set 0xc7203b1d, %r28 !TTID : 3 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_267: .word 0xa1b484cd ! 305: FCMPNE32 fcmpne32 %d18, %d44, %r16 mondo_80_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d924013 ! 306: WRPR_WSTATE_R wrpr %r9, %r19, %wstate nop nop set 0x2a608a43, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_269: .word 0x9f803acf ! 307: SIR sir 0x1acf ibp_80_270: nop nop .word 0x20800001 ! 308: BN bn,a frzptr_80_271: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702050 ! 1: POPC_I popc 0x0050, %r12 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 309: BN bn,a .word 0xd927e0e4 ! 310: STF_I st %f12, [0x00e4, %r31] change_to_randtl_80_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_80_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_80_273: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fe080 ! 313: LDDFA_I ldda [%r31, 0x0080], %f0 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_274: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_274) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,896,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_274: wrhpr %g0, 0x3db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 314: RDPC rd %pc, %r8 memptr_80_275: set 0x60340000, %r31 .word 0x8580f838 ! 315: WRCCR_I wr %r3, 0x1838, %ccr cancelint_80_276: rdhpr %halt, %r17 .word 0x85880000 ! 316: ALLCLEAN frzptr_80_277: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 317: BN bn,a br_badelay1_80_278: .word 0x08800001 ! 1: BLEU bleu .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 normalw .word 0xa7458000 ! 318: RD_SOFTINT_REG rd %softint, %r19 nop nop mov 0x1, %r18 splash_cmpr_80_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_279)+8 , 16, 16)) -> intp(0,0,6,*,944,*,9c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_279)&0xffffffff)+8 , 16, 16)) -> intp(1,0,23,*,664,*,9c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 319: SIAM siam 1 mondo_80_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c8] %asi stxa %r17, [%r0+0x3c8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d934010 ! 320: WRPR_WSTATE_R wrpr %r13, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_281: wrhpr %g0, 0xb90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7dd40 ! 321: CASA_I casa [%r31] 0xea, %r0, %r19 frzptr_80_282: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa7a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f50 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fda00 ! 322: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819821df ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x01df, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_80 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_284: wrhpr %g0, 0x5d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7df00 ! 324: CASA_I casa [%r31] 0xf8, %r0, %r19 .word 0xe63fe0e0 ! 325: STD_I std %r19, [%r31 + 0x00e0] .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_80_287: set user_data_start, %o7 .word 0x93902005 ! 327: WRPR_CWP_I wrpr %r0, 0x0005, %cwp .word 0xa7a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f19 .word 0x9f802761 ! 328: SIR sir 0x0761 memptr_80_288: set user_data_start, %r31 .word 0x85837b68 ! 329: WRCCR_I wr %r13, 0x1b68, %ccr nop nop set 0xe56040a1, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97b1c4c5 ! 1: FCMPNE32 fcmpne32 %d38, %d36, %r11 intvec_80_289: .word 0x9f803f42 ! 330: SIR sir 0x1f42 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_80 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_290: wrhpr %g0, 0xbca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d040 ! 331: CASA_I casa [%r31] 0x82, %r0, %r13 brcommon1_80_291: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7d920 ! 1: CASA_I casa [%r31] 0xc9, %r0, %r13 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b107ca ! 332: PDIST pdistn %d4, %d10, %d16 dvapa_80_292: nop nop ta T_CHANGE_HPRIV mov 0xccd, %r20 mov 0x18, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x95a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdc00 ! 333: STDA_R stda %r0, [%r31 + %r0] 0xe0 .word 0xd2dfc6c0 ! 334: LDXA_R ldxa [%r31, %r0] 0x36, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_80_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_294-donret_80_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0082c500 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xfd4, %htstate best_set_reg(0x111b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) retry donretarg_80_294: .word 0x81983f57 ! 335: WRHPR_HPSTATE_I wrhpr %r0, 0x1f57, %hpstate splash_tba_80_295: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x1, %r18 splash_cmpr_80_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_296)+8 , 16, 16)) -> intp(3,0,27,*,992,*,8e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_296)&0xffffffff)+8 , 16, 16)) -> intp(2,0,1,*,744,*,8e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_80_297: nop nop ta T_CHANGE_HPRIV set 0xc3384086, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2ac84001 ! 1: BRNZ brnz,a,pt %r1, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 338: FBPULE fbule .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_80_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d903e64 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1e64, %pstate ibp_80_300: nop nop .word 0xc1bfde00 ! 341: STDFA_R stda %f0, [%r0, %r31] .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_80_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_301-donret_80_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0060dc00 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xb9d, %htstate wrhpr %g0, 0x488, %hpstate ! rand=1 (80) done donretarg_80_301: .word 0x22ca0001 ! 343: BRZ brz,a,pt %r8, .word 0xa5b244c1 ! 344: FCMPNE32 fcmpne32 %d40, %d32, %r18 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_80_303: ta T_CHANGE_NONHPRIV ! macro .word 0xda3fe040 ! 1: STD_I std %r13, [%r31 + 0x0040] .word 0x9f802625 ! 346: SIR sir 0x0625 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_304)+8 , 16, 16)) -> intp(0,0,29,*,696,*,a1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_304)&0xffffffff)+8 , 16, 16)) -> intp(5,0,15,*,728,*,a1,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982757 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0757, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_80_305: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe1d0 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x01d0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 348: BN bn,a mondo_80_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3c8] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d924014 ! 349: WRPR_WSTATE_R wrpr %r9, %r20, %wstate intveclr_80_307: nop nop ta T_CHANGE_HPRIV setx 0xc9f415ea553e97c9, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 350: FBPLG fblg .word 0x91918004 ! 351: WRPR_PIL_R wrpr %r6, %r4, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_309), 16, 16)) -> intp(mask2tid(0x80),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,760,*,*,1) xir_80_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_309: and %g1, 2, %g1 brnz,a %g1, xirwait_80_309 ldx [%r17], %g1 xir_80_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ecf0 ! 352: WR_CLEAR_SOFTINT_I wr %r19, 0x0cf0, %clear_softint splash_tba_80_310: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_80_311: rdhpr %halt, %r16 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_80_312: nop nop ta T_CHANGE_HPRIV set 0x1d89adbe, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2eccc001 ! 1: BRGEZ brgez,a,pt %r19, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_80_313: rdhpr %halt, %r19 .word 0x85880000 ! 356: ALLCLEAN jmptr_80_314: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x8790237e ! 358: WRPR_TT_I wrpr %r0, 0x037e, %tt splash_tba_80_315: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_316), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,960,*,*,1) xir_80_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_316: and %g1, 2, %g1 brnz,a %g1, xirwait_80_316 ldx [%r17], %g1 xir_80_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b29d ! 360: WR_CLEAR_SOFTINT_I wr %r2, 0x129d, %clear_softint .word 0x05400002 ! 1: FBPLG fblg .word 0x8d9021ed ! 361: WRPR_PSTATE_I wrpr %r0, 0x01ed, %pstate .word 0xc0bfda00 ! 362: STDA_R stda %r0, [%r31 + %r0] 0xd0 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 .word 0x9f802006 ! 363: SIR sir 0x0006 mondo_80_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d94c012 ! 364: WRPR_WSTATE_R wrpr %r19, %r18, %wstate .word 0xa9a00160 ! 365: FABSq dis not found ibp_80_321: nop nop wrhpr %g0, 0x981, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe83fe120 ! 366: STD_I std %r20, [%r31 + 0x0120] .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_80_322: nop nop ta T_CHANGE_HPRIV setx 0xc2174a8efab5574e, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_80_323: nop nop wrhpr %g0, 0x5c8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 370: BN bn,a memptr_80_324: set user_data_start, %r31 .word 0x8584e23d ! 371: WRCCR_I wr %r19, 0x023d, %ccr .word 0xe91fe090 ! 372: LDDF_I ldd [%r31, 0x0090], %f20 ibp_80_326: nop nop wrhpr %g0, 0x292, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe91fe180 ! 373: LDDF_I ldd [%r31, 0x0180], %f20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_327), 16, 16)) -> intp(mask2tid(0x80),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) xir_80_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_327: and %g1, 2, %g1 brnz,a %g1, xirwait_80_327 ldx [%r17], %g1 xir_80_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b37a ! 374: WR_CLEAR_SOFTINT_I wr %r2, 0x137a, %clear_softint br_badelay2_80_328: .word 0x99a449d3 ! 1: FDIVd fdivd %f48, %f50, %f12 pdist %f4, %f12, %f2 .word 0x99b10309 ! 375: ALIGNADDRESS alignaddr %r4, %r9, %r12 mondo_80_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d91400b ! 376: WRPR_WSTATE_R wrpr %r5, %r11, %wstate splash_tba_80_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_80_331: nop nop ta T_CHANGE_PRIV setx 0xffffffbdffffffab, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_80_332: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_80_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3c0] %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d944005 ! 380: WRPR_WSTATE_R wrpr %r17, %r5, %wstate nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983698 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1698, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x0, %r18 splash_cmpr_80_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 382: SIAM siam 1 frzptr_80_336: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0xdc704287, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_337: .word 0x19400001 ! 384: FBPUGE fbuge brcommon3_80_338: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7c280 ! 1: CASA_I casa [%r31] 0x14, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0xd23fe0a0 ! 385: STD_I std %r9, [%r31 + 0x00a0] demap_80_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f wrhpr %g0, 0xe01, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe010 ! 386: LDD_I ldd [%r31 + 0x0010], %r9 .word 0xd29fc380 ! 387: LDDA_R ldda [%r31, %r0] 0x1c, %r9 fpinit_80_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89b00484 ! 388: FCMPLE32 fcmple32 %d0, %d4, %r4 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_342) , 16, 16)) -> intp(0,0,19,*,1000,*,f7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_342)&0xffffffff) , 16, 16)) -> intp(2,0,20,*,720,*,f7,1) #else set 0x5790957d, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_342: .word 0x9f803787 ! 389: SIR sir 0x1787 brcommon2_80_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe5110007 ! 1: LDQF_R - [%r4, %r7], %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 390: BN bn,a .word 0xc19fde00 ! 391: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_80_344: nop nop ta T_CHANGE_HPRIV set 0xe91bc304, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_345)+8 , 16, 16)) -> intp(6,0,19,*,984,*,99,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_345)&0xffffffff)+8 , 16, 16)) -> intp(3,0,21,*,912,*,99,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e81 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e81, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xc09fdb40 ! 394: LDDA_R ldda [%r31, %r0] 0xda, %r0 cancelint_80_347: rdhpr %halt, %r11 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_348: wrhpr %g0, 0x958, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d920 ! 396: CASA_I casa [%r31] 0xc9, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_80_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_349-donret_80_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00504e00 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1597, %htstate wrhpr %g0, 0x35a, %hpstate ! rand=1 (80) .word 0x04c88001 ! 1: BRLEZ brlez,pt %r2, ldx [%r11+%r0], %g1 done donretarg_80_349: .word 0xa5a049d3 ! 397: FDIVd fdivd %f32, %f50, %f18 splash_tba_80_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_80_351: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe150 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0150] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd2800c40 ! 400: LDUWA_R lduwa [%r0, %r0] 0x62, %r9 cwp_80_352: set user_data_start, %o7 .word 0x93902004 ! 401: WRPR_CWP_I wrpr %r0, 0x0004, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_80_354: nop nop ta T_CHANGE_PRIV setx 0xffffffb4ffffffae, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_355), 16, 16)) -> intp(mask2tid(0x80),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,744,*,*,1) xir_80_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_355: and %g1, 2, %g1 brnz,a %g1, xirwait_80_355 ldx [%r17], %g1 xir_80_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8466cd ! 404: WR_CLEAR_SOFTINT_I wr %r17, 0x06cd, %clear_softint brcommon3_80_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81982ad5 ! 405: WRHPR_HPSTATE_I wrhpr %r0, 0x0ad5, %hpstate frzptr_80_357: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_358) , 16, 16)) -> intp(5,0,7,*,656,*,8a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_358)&0xffffffff) , 16, 16)) -> intp(5,0,9,*,968,*,8a,1) #else set 0x6830a092, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_358: .word 0x9f802100 ! 407: SIR sir 0x0100 .word 0xc19fdf00 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_80_359: nop nop .word 0x20800001 ! 410: BN bn,a brcommon3_80_360: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe150 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0150] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 411: BN bn,a .word 0x879020bf ! 412: WRPR_TT_I wrpr %r0, 0x00bf, %tt frzptr_80_361: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_80_362: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_80_363: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_80_364: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8198375f ! 416: WRHPR_HPSTATE_I wrhpr %r0, 0x175f, %hpstate br_badelay3_80_365: .word 0x34800001 ! 1: BG bg,a .word 0x22800001 ! 1: BE be,a .word 0xd5124014 ! 1: LDQF_R - [%r9, %r20], %f10 .word 0x93a1c826 ! 417: FADDs fadds %f7, %f6, %f9 intveclr_80_366: nop nop ta T_CHANGE_HPRIV setx 0x3fcba56fabcfee3c, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xf81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_80_367: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_80_368: nop nop ta T_CHANGE_HPRIV setx 0xcb27ab7d7e8a2cfa, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, .word 0x9190400b ! 421: WRPR_PIL_R wrpr %r1, %r11, %pil splash_hpstate_80_370: .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, .word 0x81983513 ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x1513, %hpstate cancelint_80_371: rdhpr %halt, %r9 .word 0x85880000 ! 423: ALLCLEAN mondo_80_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d950014 ! 424: WRPR_WSTATE_R wrpr %r20, %r20, %wstate .word 0xc32fc000 ! 425: STXFSR_R st-sfr %f1, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_374), 16, 16)) -> intp(mask2tid(0x80),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,920,*,*,1) xir_80_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_374: and %g1, 2, %g1 brnz,a %g1, xirwait_80_374 ldx [%r17], %g1 xir_80_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816202 ! 426: WR_CLEAR_SOFTINT_I wr %r5, 0x0202, %clear_softint ibp_80_375: nop nop .word 0x87a84a52 ! 427: FCMPd fcmpd %fcc, %f32, %f18 .word 0xe1bfe040 ! 428: STDFA_I stda %f16, [0x0040, %r31] nop nop mov 0x0, %r18 splash_cmpr_80_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_377), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,720,*,*,1) xir_80_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_377: and %g1, 2, %g1 brnz,a %g1, xirwait_80_377 ldx [%r17], %g1 xir_80_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fcd0 ! 430: WR_CLEAR_SOFTINT_I wr %r19, 0x1cd0, %clear_softint cancelint_80_378: rdhpr %halt, %r12 .word 0x85880000 ! 431: ALLCLEAN splash_tba_80_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_80_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_80_381: rdhpr %halt, %r19 .word 0x85880000 ! 434: ALLCLEAN memptr_80_382: set 0x60340000, %r31 .word 0x85847c99 ! 435: WRCCR_I wr %r17, 0x1c99, %ccr .word 0xd1e7c400 ! 1: CASA_I casa [%r31] 0x20, %r0, %r8 .word 0x9f803d3b ! 436: SIR sir 0x1d3b .word 0xd037e014 ! 437: STH_I sth %r8, [%r31 + 0x0014] .word 0xf1efe020 ! 438: PREFETCHA_I prefetcha [%r31, + 0x0020] %asi, #24 .word 0xe0bfdc00 ! 439: STDA_R stda %r16, [%r31 + %r0] 0xe0 ibp_80_385: nop nop .word 0xa7a289d0 ! 440: FDIVd fdivd %f10, %f16, %f50 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_386), 16, 16)) -> intp(mask2tid(0x80),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,696,*,*,1) xir_80_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_386: and %g1, 2, %g1 brnz,a %g1, xirwait_80_386 ldx [%r17], %g1 xir_80_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82f591 ! 441: WR_CLEAR_SOFTINT_I wr %r11, 0x1591, %clear_softint intveclr_80_387: nop nop ta T_CHANGE_HPRIV setx 0x39f24fa9384c2bba, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 442: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_80 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_388: wrhpr %g0, 0x710, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d100 ! 443: CASA_I casa [%r31] 0x88, %r0, %r13 frzptr_80_389: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdf00 ! 444: LDDFA_R ldda [%r31, %r0], %f16 intveclr_80_390: nop nop ta T_CHANGE_HPRIV setx 0x1bd5f698f607fa92, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x489, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 445: FBPLG fblg,a,pn %fcc0, .word 0xa9b50487 ! 446: FCMPLE32 fcmple32 %d20, %d38, %r20 br_badelay1_80_392: .word 0x93a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f40 .word 0xe1324005 ! 1: STQF_R - %f16, [%r5, %r9] .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, normalw .word 0xa5458000 ! 447: RD_SOFTINT_REG rd %softint, %r18 ibp_80_393: nop nop .word 0xa3a409d3 ! 448: FDIVd fdivd %f16, %f50, %f48 jmptr_80_394: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0x9f802040 ! 450: SIR sir 0x0040 memptr_80_396: set user_data_start, %r31 .word 0x8584f12b ! 451: WRCCR_I wr %r19, 0x112b, %ccr cancelint_80_397: rdhpr %halt, %r9 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_80_398: nop nop ta T_CHANGE_HPRIV set 0xeeb9e422, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 453: FBPULE fbule,a,pn %fcc0, brcommon2_80_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe911c011 ! 1: LDQF_R - [%r7, %r17], %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0xa1b7c7c0 ! 454: PDIST pdistn %d62, %d0, %d16 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_80_400: ta T_CHANGE_NONHPRIV ! macro frzptr_80_401: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fda00 ! 456: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_402), 16, 16)) -> intp(mask2tid(0x80),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1000,*,*,1) xir_80_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_402: and %g1, 2, %g1 brnz,a %g1, xirwait_80_402 ldx [%r17], %g1 xir_80_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ef82 ! 457: WR_CLEAR_SOFTINT_I wr %r19, 0x0f82, %clear_softint brcommon3_80_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e090 ! 1: STQF_I - %f10, [0x0090, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0xa3aac821 ! 458: FMOVGE fmovs %fcc1, %f1, %f17 splash_tba_80_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_80_406: .word 0x12800001 ! 1: BNE bne .word 0x9f7315b4 ! Random illegal ? .word 0x95a149d3 ! 1: FDIVd fdivd %f36, %f50, %f10 .word 0x93a1c829 ! 461: FADDs fadds %f7, %f9, %f9 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 .word 0x9f802f00 ! 462: SIR sir 0x0f00 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_407)+8 , 16, 16)) -> intp(7,0,7,*,968,*,f6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_407)&0xffffffff)+8 , 16, 16)) -> intp(0,0,3,*,920,*,f6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198258f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x058f, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_80_408: set user_data_start, %o7 .word 0x93902000 ! 464: WRPR_CWP_I wrpr %r0, 0x0000, %cwp cancelint_80_409: rdhpr %halt, %r13 .word 0x85880000 ! 465: ALLCLEAN splash_tba_80_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe8800b20 ! 467: LDUWA_R lduwa [%r0, %r0] 0x59, %r20 pmu_80_411: nop nop ta T_CHANGE_PRIV setx 0xffffffbfffffffa1, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_80_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_80_413: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe1f0 ! 1: STXFSR_I st-sfr %f1, [0x01f0, %r31] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 471: BN bn mondo_80_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3d0] %asi stxa %r20, [%r0+0x3c8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d950010 ! 472: WRPR_WSTATE_R wrpr %r20, %r16, %wstate mondo_80_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3c8] %asi stxa %r13, [%r0+0x3c0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d94c011 ! 473: WRPR_WSTATE_R wrpr %r19, %r17, %wstate .word 0x937036ea ! 474: POPC_I popc 0x16ea, %r9 mondo_80_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3c8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d920012 ! 475: WRPR_WSTATE_R wrpr %r8, %r18, %wstate cancelint_80_418: rdhpr %halt, %r17 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_419), 16, 16)) -> intp(mask2tid(0x80),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,640,*,*,1) xir_80_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_419: and %g1, 2, %g1 brnz,a %g1, xirwait_80_419 ldx [%r17], %g1 xir_80_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852649 ! 477: WR_CLEAR_SOFTINT_I wr %r20, 0x0649, %clear_softint jmptr_80_420: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_421: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_421) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,960,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_421: wrhpr %g0, 0x840, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 479: RDPC rd %pc, %r20 fpinit_80_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009c4 ! 480: FDIVd fdivd %f0, %f4, %f6 .word 0xe33fe110 ! 481: STDF_I std %f17, [0x0110, %r31] splash_tba_80_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_80_425: nop nop setx 0xffffffb3ffffffa3, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe170 ! 484: STDA_I stda %r17, [%r31 + 0x0170] %asi splash_lsu_80_426: nop nop ta T_CHANGE_HPRIV set 0xeffb35f5, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 485: FBPULE fbule .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e0e2 ! 487: STQF_I - %f17, [0x00e2, %r31] frzptr_80_428: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe26fe0e0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x00e0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 488: BN bn,a brcommon3_80_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e0d0 ! 1: STQF_I - %f17, [0x00d0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983455 ! 489: WRHPR_HPSTATE_I wrhpr %r0, 0x1455, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_430: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_430) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,928,*,*,1)') ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_430: wrhpr %g0, 0x642, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 490: RDPC rd %pc, %r9 .word 0xe8dfd140 ! 491: LDXA_R ldxa [%r31, %r0] 0x8a, %r20 .word 0xe91fe1e0 ! 492: LDDF_I ldd [%r31, 0x01e0], %f20 nop nop mov 0x1, %r18 splash_cmpr_80_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_433)+8 , 16, 16)) -> intp(4,0,5,*,912,*,c9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_433)&0xffffffff)+8 , 16, 16)) -> intp(4,0,5,*,896,*,c9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_434) , 16, 16)) -> intp(2,0,26,*,928,*,f7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_434)&0xffffffff) , 16, 16)) -> intp(4,0,11,*,896,*,f7,1) #else set 0xead09d04, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_434: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5a109d2 ! 494: FDIVd fdivd %f4, %f18, %f18 .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_80_436: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_437: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_437) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,936,*,*,1)') ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_437: wrhpr %g0, 0xc18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 497: RDPC rd %pc, %r13 splash_tba_80_438: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_80_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d950012 ! 499: WRPR_WSTATE_R wrpr %r20, %r18, %wstate brcommon2_80_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a00552 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 500: BN bn,a .word 0x91934010 ! 501: WRPR_PIL_R wrpr %r13, %r16, %pil ibp_80_442: nop nop .word 0xd7e7c280 ! 502: CASA_I casa [%r31] 0x14, %r0, %r11 cwp_80_443: set user_data_start, %o7 .word 0x93902004 ! 503: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cancelint_80_444: rdhpr %halt, %r20 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e11d ! 505: STF_I st %f9, [0x011d, %r31] brcommon3_80_445: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe030 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0030] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902527 ! 506: WRPR_PSTATE_I wrpr %r0, 0x0527, %pstate splash_tba_80_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x68c06626, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_447: .word 0x95a309c7 ! 508: FDIVd fdivd %f12, %f38, %f10 intveclr_80_448: nop nop ta T_CHANGE_HPRIV setx 0x08ed4e6341abc4bf, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 509: FBPLG fblg memptr_80_449: set 0x60540000, %r31 .word 0x8580f7c2 ! 510: WRCCR_I wr %r3, 0x17c2, %ccr nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_450: wrhpr %g0, 0x2cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c200 ! 511: CASA_I casa [%r31] 0x10, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_451: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_451) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,928,*,*,1)') ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_451: wrhpr %g0, 0xe4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 512: RDPC rd %pc, %r10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_452) , 16, 16)) -> intp(3,0,29,*,920,*,80,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_452)&0xffffffff) , 16, 16)) -> intp(2,0,2,*,1000,*,80,1) #else set 0xd7d05d19, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a2c9d3 ! 1: FDIVd fdivd %f42, %f50, %f18 intvec_80_452: .word 0x39400001 ! 513: FBPUGE fbuge,a,pn %fcc0, nop nop set 0xb200c7e3, %r28 !TTID : 7 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_453: .word 0xa3b204d3 ! 514: FCMPNE32 fcmpne32 %d8, %d50, %r17 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_454)+8 , 16, 16)) -> intp(6,0,13,*,640,*,95,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_454)&0xffffffff)+8 , 16, 16)) -> intp(3,0,10,*,952,*,95,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c17 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c17, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_80_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3c8] %asi stxa %r12, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d940002 ! 516: WRPR_WSTATE_R wrpr %r16, %r2, %wstate pmu_80_456: nop nop setx 0xffffffbaffffffa0, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_80_457: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e120 ! 1: STQF_I - %f9, [0x0120, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd297c540 ! 518: LDUHA_R lduha [%r31, %r0] 0x2a, %r9 pmu_80_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffaa, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xad00f501, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8021a0 ! 1: SIR sir 0x01a0 intvec_80_459: .word 0x9f803fd0 ! 520: SIR sir 0x1fd0 .word 0xd697d920 ! 521: LDUHA_R lduha [%r31, %r0] 0xc9, %r11 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_80_461: ta T_CHANGE_NONHPRIV ! macro .word 0xa9b50482 ! 523: FCMPLE32 fcmple32 %d20, %d2, %r20 nop nop mov 0x0, %r18 splash_cmpr_80_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 524: SIAM siam 1 .word 0xc09fdc00 ! 525: LDDA_R ldda [%r31, %r0] 0xe0, %r0 br_longdelay3_80_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f802b1e ! 526: SIR sir 0x0b1e frzptr_80_466: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfda00 ! 527: STDFA_R stda %f0, [%r0, %r31] .word 0xc32fe1a0 ! 528: STXFSR_I st-sfr %f1, [0x01a0, %r31] .word 0x9f802109 ! 529: SIR sir 0x0109 .word 0x24800001 ! 1: BLE ble,a .word 0x8d9028ed ! 530: WRPR_PSTATE_I wrpr %r0, 0x08ed, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x2ecc4001 ! 1: BRGEZ brgez,a,pt %r17, .word 0x8d9032e3 ! 532: WRPR_PSTATE_I wrpr %r0, 0x12e3, %pstate brcommon3_80_471: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e150 ! 1: STQF_I - %f8, [0x0150, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd11fe150 ! 533: LDDF_I ldd [%r31, 0x0150], %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_472) , 16, 16)) -> intp(1,0,12,*,744,*,ac,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_472)&0xffffffff) , 16, 16)) -> intp(0,0,21,*,944,*,ac,1) #else set 0x1e70f5c3, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_472: .word 0x93b044d4 ! 534: FCMPNE32 fcmpne32 %d32, %d20, %r9 .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe697d000 ! 536: LDUHA_R lduha [%r31, %r0] 0x80, %r19 jmptr_80_474: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_80_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_475-donret_80_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00e27800 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x61f, %htstate best_set_reg(0xfe2, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) done .align 2048 donretarg_80_475: .word 0x81983546 ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x1546, %hpstate trapasi_80_476: nop mov 0x3f0, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_477), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) xir_80_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_477: and %g1, 2, %g1 brnz,a %g1, xirwait_80_477 ldx [%r17], %g1 xir_80_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e593 ! 540: WR_CLEAR_SOFTINT_I wr %r3, 0x0593, %clear_softint .word 0x36800001 ! 1: BGE bge,a .word 0x8d9034a6 ! 541: WRPR_PSTATE_I wrpr %r0, 0x14a6, %pstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_80 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_479: wrhpr %g0, 0xf58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d140 ! 542: CASA_I casa [%r31] 0x8a, %r0, %r19 mondo_80_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3e0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d940005 ! 543: WRPR_WSTATE_R wrpr %r16, %r5, %wstate .word 0x95520000 ! 544: RDPR_PIL rdpr %pil, %r10 .word 0xe11fe1d0 ! 545: LDDF_I ldd [%r31, 0x01d0], %f16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_80_482: ta T_CHANGE_NONPRIV ! macro cancelint_80_483: rdhpr %halt, %r13 .word 0x85880000 ! 547: ALLCLEAN splash_tba_80_484: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_80_485: nop nop ta T_CHANGE_HPRIV mov 0x9dc, %r20 mov 0x11, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x8c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfda00 ! 549: STDFA_R stda %f16, [%r0, %r31] .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_80_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x4c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe008 ! 552: LDD_I ldd [%r31 + 0x0008], %r19 mondo_80_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d91c006 ! 553: WRPR_WSTATE_R wrpr %r7, %r6, %wstate .word 0xe73fe180 ! 1: STDF_I std %f19, [0x0180, %r31] .word 0x9f8034be ! 554: SIR sir 0x14be .word 0xc1bfc2c0 ! 555: STDFA_R stda %f0, [%r0, %r31] memptr_80_491: set 0x60140000, %r31 .word 0x8582379f ! 556: WRCCR_I wr %r8, 0x179f, %ccr nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_492: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_492) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,936,*,*,1)') ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_492: wrhpr %g0, 0x83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 557: RDPC rd %pc, %r19 ibp_80_493: nop nop wrhpr %g0, 0x60b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe897dc40 ! 558: LDUHA_R lduha [%r31, %r0] 0xe2, %r20 .word 0x28800001 ! 559: BLEU bleu,a .word 0xc1bfda00 ! 560: STDFA_R stda %f0, [%r0, %r31] ibp_80_495: nop nop wrhpr %g0, 0xac0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 561: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_496) , 16, 16)) -> intp(1,0,22,*,920,*,b7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_496)&0xffffffff) , 16, 16)) -> intp(3,0,3,*,1016,*,b7,1) #else set 0x1370468b, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_496: .word 0xa1a2c9cc ! 562: FDIVd fdivd %f42, %f12, %f16 frzptr_80_497: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 563: BN bn,a memptr_80_498: set user_data_start, %r31 .word 0x8582eab4 ! 564: WRCCR_I wr %r11, 0x0ab4, %ccr .word 0x95703510 ! 565: POPC_I popc 0x1510, %r10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_500) , 16, 16)) -> intp(0,0,19,*,648,*,d4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_500)&0xffffffff) , 16, 16)) -> intp(0,0,28,*,696,*,d4,1) #else set 0x822081ba, %r28 !TTID : 1 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_500: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8024f4 ! 566: SIR sir 0x04f4 jmptr_80_501: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_502: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_502) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,640,*,*,1)') ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_502: wrhpr %g0, 0xb82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 568: RDPC rd %pc, %r20 nop nop ta T_CHANGE_HPRIV ! macro donret_80_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_503-donret_80_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00a1fd00 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x442, %htstate best_set_reg(0x10a0, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) done donretarg_80_503: .word 0x99a489d3 ! 569: FDIVd fdivd %f18, %f50, %f12 frzptr_80_504: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0xa5a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f18 .word 0x9f8031bf ! 571: SIR sir 0x11bf #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_505), 16, 16)) -> intp(mask2tid(0x80),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,760,*,*,1) xir_80_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_505: and %g1, 2, %g1 brnz,a %g1, xirwait_80_505 ldx [%r17], %g1 xir_80_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81ae37 ! 572: WR_CLEAR_SOFTINT_I wr %r6, 0x0e37, %clear_softint frzptr_80_506: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 573: BN bn,a cancelint_80_507: rdhpr %halt, %r11 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_508) , 16, 16)) -> intp(3,0,9,*,640,*,c1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_508)&0xffffffff) , 16, 16)) -> intp(6,0,2,*,920,*,c1,1) #else set 0x5730cfac, %r28 !TTID : 7 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_508: .word 0x9f803a11 ! 575: SIR sir 0x1a11 cancelint_80_509: rdhpr %halt, %r20 .word 0x85880000 ! 576: ALLCLEAN .word 0x81983d17 ! 577: WRHPR_HPSTATE_I wrhpr %r0, 0x1d17, %hpstate .word 0x8790228f ! 578: WRPR_TT_I wrpr %r0, 0x028f, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_511), 16, 16)) -> intp(mask2tid(0x80),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,680,*,*,1) xir_80_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_511: and %g1, 2, %g1 brnz,a %g1, xirwait_80_511 ldx [%r17], %g1 xir_80_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a46e ! 579: WR_CLEAR_SOFTINT_I wr %r2, 0x046e, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_512) , 16, 16)) -> intp(1,0,20,*,760,*,8a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_512)&0xffffffff) , 16, 16)) -> intp(3,0,16,*,720,*,8a,1) #else set 0xb8004d11, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x91b4c4d1 ! 1: FCMPNE32 fcmpne32 %d50, %d48, %r8 intvec_80_512: .word 0x9f80242e ! 580: SIR sir 0x042e brcommon3_80_513: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902f5e ! 581: WRPR_PSTATE_I wrpr %r0, 0x0f5e, %pstate .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_80_514: ta T_CHANGE_NONHPRIV ! macro .word 0xa7a00160 ! 583: FABSq dis not found nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_516: wrhpr %g0, 0x9c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c600 ! 584: CASA_I casa [%r31] 0x30, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_517: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_517) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,984,*,*,1)') ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_517: wrhpr %g0, 0x411, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 585: RDPC rd %pc, %r11 cancelint_80_518: rdhpr %halt, %r16 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_519: wrhpr %g0, 0x1d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d000 ! 587: CASA_I casa [%r31] 0x80, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_520: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_520) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,936,*,*,1)') ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_520: wrhpr %g0, 0xf98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 588: RDPC rd %pc, %r16 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d9034c9 ! 590: WRPR_PSTATE_I wrpr %r0, 0x14c9, %pstate br_badelay2_80_523: .word 0x32800001 ! 1: BNE bne,a pdist %f16, %f22, %f2 .word 0x93b44314 ! 591: ALIGNADDRESS alignaddr %r17, %r20, %r9 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_524) , 16, 16)) -> intp(7,0,31,*,744,*,b4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_524)&0xffffffff) , 16, 16)) -> intp(6,0,21,*,712,*,b4,1) #else set 0x8ed0d632, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_80_524: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803284 ! 592: SIR sir 0x1284 nop nop mov 0x1, %r18 splash_cmpr_80_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_525)+8 , 16, 16)) -> intp(3,0,17,*,944,*,8c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_525)&0xffffffff)+8 , 16, 16)) -> intp(4,0,20,*,672,*,8c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 593: SIAM siam 1 memptr_80_526: set 0x60340000, %r31 .word 0x85827fe1 ! 594: WRCCR_I wr %r9, 0x1fe1, %ccr frzptr_80_527: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 595: BN bn .word 0xe43fe158 ! 596: STD_I std %r18, [%r31 + 0x0158] splash_hpstate_80_529: .word 0x1a800001 ! 1: BCC bcc .word 0x8198344c ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x144c, %hpstate .word 0xe527e189 ! 598: STF_I st %f18, [0x0189, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_530), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,936,*,*,1) xir_80_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_530: and %g1, 2, %g1 brnz,a %g1, xirwait_80_530 ldx [%r17], %g1 xir_80_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81e24d ! 599: WR_CLEAR_SOFTINT_I wr %r7, 0x024d, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_80_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_531-donret_80_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00244700 | (0x58 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x81d, %htstate best_set_reg(0xbf9, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) ldx [%r11+%r0], %g1 done donretarg_80_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983ec5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ec5, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x1e003e71, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a0c9c7 ! 1: FDIVd fdivd %f34, %f38, %f20 intvec_80_533: .word 0xa3a509cb ! 602: FDIVd fdivd %f20, %f42, %f48 splash_hpstate_80_534: .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, .word 0x81983ccc ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x1ccc, %hpstate .word 0x24c94001 ! 604: BRLEZ brlez,a,pt %r5, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_536), 16, 16)) -> intp(mask2tid(0x80),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,1008,*,*,1) xir_80_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_536: and %g1, 2, %g1 brnz,a %g1, xirwait_80_536 ldx [%r17], %g1 xir_80_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ea0c ! 605: WR_CLEAR_SOFTINT_I wr %r19, 0x0a0c, %clear_softint mondo_80_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3e0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d940011 ! 606: WRPR_WSTATE_R wrpr %r16, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_538) , 16, 16)) -> intp(2,0,7,*,904,*,d3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_538)&0xffffffff) , 16, 16)) -> intp(2,0,31,*,912,*,d3,1) #else set 0x2fd06f71, %r28 !TTID : 7 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_538: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5a489d4 ! 607: FDIVd fdivd %f18, %f20, %f18 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_539: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_539) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,968,*,*,1)') ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_539: wrhpr %g0, 0xb08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 608: RDPC rd %pc, %r8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_540) , 16, 16)) -> intp(3,0,28,*,728,*,c0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_540)&0xffffffff) , 16, 16)) -> intp(0,0,15,*,760,*,c0,1) #else set 0x254058c7, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_540: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x97a509c5 ! 609: FDIVd fdivd %f20, %f36, %f42 nop nop ta T_CHANGE_HPRIV ! macro donret_80_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_541-donret_80_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00732b00 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x12bf, %htstate best_set_reg(0x1491, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) done donretarg_80_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_542: wrhpr %g0, 0x5c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 611: CASA_I casa [%r31] 0xf8, %r0, %r8 ibp_80_543: nop nop wrhpr %g0, 0x50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fde00 ! 612: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8d903fd1 ! 613: WRPR_PSTATE_I wrpr %r0, 0x1fd1, %pstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_545: wrhpr %g0, 0xb91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d060 ! 614: CASA_I casa [%r31] 0x83, %r0, %r8 jmptr_80_546: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa7b1c7c3 ! 616: PDIST pdistn %d38, %d34, %d50 .word 0xe737e178 ! 617: STQF_I - %f19, [0x0178, %r31] .word 0x3a780001 ! 618: BPCC ibp_80_548: nop nop wrhpr %g0, 0xd01, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800001 ! 619: BN bn .word 0x9ba289d1 ! 620: FDIVd fdivd %f10, %f48, %f44 .word 0xda3fe1e0 ! 621: STD_I std %r13, [%r31 + 0x01e0] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_551: wrhpr %g0, 0xc9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d000 ! 622: CASA_I casa [%r31] 0x80, %r0, %r13 mondo_80_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3c0] %asi stxa %r3, [%r0+0x3d8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d94800a ! 623: WRPR_WSTATE_R wrpr %r18, %r10, %wstate intveclr_80_553: nop nop ta T_CHANGE_HPRIV setx 0x2231413448f7ed4a, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 624: FBPLG fblg,a,pn %fcc0, splash_tba_80_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_555: wrhpr %g0, 0xec1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d060 ! 626: CASA_I casa [%r31] 0x83, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_556) , 16, 16)) -> intp(3,0,3,*,752,*,e7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_556)&0xffffffff) , 16, 16)) -> intp(1,0,31,*,1008,*,e7,1) #else set 0xcda0a111, %r28 !TTID : 1 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3b504cb ! 627: FCMPNE32 fcmpne32 %d20, %d42, %r17 mondo_80_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d91400d ! 628: WRPR_WSTATE_R wrpr %r5, %r13, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0x2a809ab4, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802a28 ! 1: SIR sir 0x0a28 intvec_80_559: .word 0x9f802198 ! 630: SIR sir 0x0198 frzptr_80_560: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 631: BN bn,a splash_tba_80_561: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_80_562: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_563: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_563) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,896,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_563: wrhpr %g0, 0xfd9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 634: RDPC rd %pc, %r10 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_564), 16, 16)) -> intp(mask2tid(0x80),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) xir_80_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_564: and %g1, 2, %g1 brnz,a %g1, xirwait_80_564 ldx [%r17], %g1 xir_80_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80fbe9 ! 635: WR_CLEAR_SOFTINT_I wr %r3, 0x1be9, %clear_softint ibp_80_565: nop nop wrhpr %g0, 0x6c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fe1b0 ! 636: STXFSR_I st-sfr %f1, [0x01b0, %r31] .word 0x9b703837 ! 637: POPC_I popc 0x1837, %r13 splash_lsu_80_567: nop nop ta T_CHANGE_HPRIV set 0x47e5475c, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x09400001 ! 1: FBPL fbl stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_80_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a00553 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 639: BN bn,a nop nop set 0xc1b0c488, %r28 !TTID : 4 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_569: .word 0x39400001 ! 640: FBPUGE fbuge,a,pn %fcc0, .word 0x91950012 ! 641: WRPR_PIL_R wrpr %r20, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_571: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_571) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,672,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_571: wrhpr %g0, 0x649, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 642: RDPC rd %pc, %r12 .word 0xd33fe0f5 ! 643: STDF_I std %f9, [0x00f5, %r31] .word 0xc19fdb40 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_572), 16, 16)) -> intp(mask2tid(0x80),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,696,*,*,1) xir_80_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_572: and %g1, 2, %g1 brnz,a %g1, xirwait_80_572 ldx [%r17], %g1 xir_80_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a136 ! 645: WR_CLEAR_SOFTINT_I wr %r2, 0x0136, %clear_softint .word 0xc19fde20 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0xf40cd78, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8023f5 ! 1: SIR sir 0x03f5 intvec_80_573: .word 0x93a349d3 ! 647: FDIVd fdivd %f44, %f50, %f40 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_574), 16, 16)) -> intp(mask2tid(0x80),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,688,*,*,1) xir_80_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_574: and %g1, 2, %g1 brnz,a %g1, xirwait_80_574 ldx [%r17], %g1 xir_80_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab806318 ! 648: WR_CLEAR_SOFTINT_I wr %r1, 0x0318, %clear_softint ibp_80_575: nop nop wrhpr %g0, 0x5c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7dd40 ! 649: CASA_I casa [%r31] 0xea, %r0, %r13 splash_tba_80_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_80_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d94c009 ! 651: WRPR_WSTATE_R wrpr %r19, %r9, %wstate .word 0xdb3fe060 ! 652: STDF_I std %f13, [0x0060, %r31] splash_tba_80_579: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_80_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0x5db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe068 ! 654: LDD_I ldd [%r31 + 0x0068], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_80_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d91c014 ! 656: WRPR_WSTATE_R wrpr %r7, %r20, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_583), 16, 16)) -> intp(mask2tid(0x80),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,752,*,*,1) xir_80_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_583: and %g1, 2, %g1 brnz,a %g1, xirwait_80_583 ldx [%r17], %g1 xir_80_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a97b ! 657: WR_CLEAR_SOFTINT_I wr %r2, 0x097b, %clear_softint demap_80_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe028 ! 658: LDD_I ldd [%r31 + 0x0028], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] .word 0x93b40331 ! 660: BMASK bmask %r16, %r17, %r9 dvapa_80_586: nop nop ta T_CHANGE_HPRIV mov 0x99f, %r20 mov 0x4, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x159, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfde00 ! 661: STDFA_R stda %f16, [%r0, %r31] frzptr_80_587: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fde00 ! 662: LDDFA_R ldda [%r31, %r0], %f16 frzptr_80_588: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_589), 16, 16)) -> intp(mask2tid(0x80),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,680,*,*,1) xir_80_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_589: and %g1, 2, %g1 brnz,a %g1, xirwait_80_589 ldx [%r17], %g1 xir_80_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843d51 ! 664: WR_CLEAR_SOFTINT_I wr %r16, 0x1d51, %clear_softint .word 0x9370286f ! 665: POPC_I popc 0x086f, %r9 .word 0xd8bfe190 ! 666: STDA_I stda %r12, [%r31 + 0x0190] %asi frzptr_80_590: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 667: BN bn,a mondo_80_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3d8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94800c ! 668: WRPR_WSTATE_R wrpr %r18, %r12, %wstate nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_592: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_592) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,976,*,*,1)') ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_592: wrhpr %g0, 0x980, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 669: RDPC rd %pc, %r12 pmu_80_593: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffaf, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xa9a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f20 .word 0x9f80219b ! 671: SIR sir 0x019b mondo_80_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3d0] %asi stxa %r2, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d950008 ! 672: WRPR_WSTATE_R wrpr %r20, %r8, %wstate jmptr_80_595: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198354e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x154e, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_597), 16, 16)) -> intp(mask2tid(0x80),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,704,*,*,1) xir_80_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_597: and %g1, 2, %g1 brnz,a %g1, xirwait_80_597 ldx [%r17], %g1 xir_80_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823d4f ! 675: WR_CLEAR_SOFTINT_I wr %r8, 0x1d4f, %clear_softint .word 0xe927e178 ! 676: STF_I st %f20, [0x0178, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_598) , 16, 16)) -> intp(1,0,25,*,736,*,eb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_598)&0xffffffff) , 16, 16)) -> intp(2,0,15,*,920,*,eb,1) #else set 0xb0b05b89, %r28 !TTID : 3 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_598: .word 0xa3b1c4d0 ! 677: FCMPNE32 fcmpne32 %d38, %d16, %r17 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_80 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_599: wrhpr %g0, 0x710, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d920 ! 678: CASA_I casa [%r31] 0xc9, %r0, %r13 frzptr_80_600: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe190 ! 1: STXFSR_I st-sfr %f1, [0x0190, %r31] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 679: BN bn,a .word 0xa1a4c9cd ! 680: FDIVd fdivd %f50, %f44, %f16 nop nop mov 0x1, %r18 splash_cmpr_80_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_602)+8 , 16, 16)) -> intp(6,0,21,*,1016,*,a6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_602)&0xffffffff)+8 , 16, 16)) -> intp(4,0,26,*,704,*,a6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 681: SIAM siam 1 demap_80_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x499, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe1f8 ! 682: LDD_I ldd [%r31 + 0x01f8], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_80_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_604-donret_80_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d23e00 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x160d, %htstate wrhpr %g0, 0x491, %hpstate ! rand=1 (80) .word 0x1c800001 ! 1: BPOS bpos retry donretarg_80_604: .word 0xd66fe0e2 ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x00e2] .word 0x97a00160 ! 684: FABSq dis not found .word 0x91948003 ! 685: WRPR_PIL_R wrpr %r18, %r3, %pil nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_607: wrhpr %g0, 0x9da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7dc40 ! 686: CASA_I casa [%r31] 0xe2, %r0, %r11 .word 0xa3b34585 ! 687: FCMPGT32 fcmpgt32 %d44, %d36, %r17 mondo_80_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3c0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d924011 ! 688: WRPR_WSTATE_R wrpr %r9, %r17, %wstate cwp_80_609: set user_data_start, %o7 .word 0x93902007 ! 689: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d903273 ! 691: WRPR_PSTATE_I wrpr %r0, 0x1273, %pstate .word 0xe1bfe060 ! 692: STDFA_I stda %f16, [0x0060, %r31] .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, .word 0x8d9036a1 ! 693: WRPR_PSTATE_I wrpr %r0, 0x16a1, %pstate nop nop mov 0x1, %r18 splash_cmpr_80_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_612)+8 , 16, 16)) -> intp(3,0,20,*,736,*,b6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_612)&0xffffffff)+8 , 16, 16)) -> intp(7,0,0,*,688,*,b6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_80_613: .word 0x81982fd5 ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x0fd5, %hpstate .word 0x99b507cd ! 696: PDIST pdistn %d20, %d44, %d12 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_615: wrhpr %g0, 0xd3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d920 ! 697: CASA_I casa [%r31] 0xc9, %r0, %r16 brcommon2_80_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa1a00542 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0xc19fdb40 ! 698: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9b520000 ! 700: RDPR_PIL rdpr %pil, %r13 mondo_80_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3c0] %asi stxa %r1, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94400b ! 701: WRPR_WSTATE_R wrpr %r17, %r11, %wstate .word 0xd51fe0c0 ! 702: LDDF_I ldd [%r31, 0x00c0], %f10 .word 0xd48008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 splash_lsu_80_619: nop nop ta T_CHANGE_HPRIV set 0xfd3d4b89, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x1d400001 ! 1: FBPULE fbule stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 704: FBPULE fbule,a,pn %fcc0, intveclr_80_620: nop nop ta T_CHANGE_HPRIV setx 0xd908bb8376a3e676, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 705: FBPLG fblg nop nop ta T_CHANGE_HPRIV ! macro donret_80_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_621-donret_80_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000a9000 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x405, %htstate wrhpr %g0, 0x20b, %hpstate ! rand=1 (80) .word 0x25400002 ! 1: FBPLG fblg,a,pn %fcc0, done donretarg_80_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_80_622: set user_data_start, %o7 .word 0x93902007 ! 707: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xc1bfda00 ! 708: STDFA_R stda %f0, [%r0, %r31] frzptr_80_623: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 709: BN bn,a intveclr_80_624: nop nop ta T_CHANGE_HPRIV setx 0x9edc8de47013f868, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x619, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 710: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_625: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_625) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,664,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_625: wrhpr %g0, 0xfd8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 711: RDPC rd %pc, %r8 .word 0xe09fc080 ! 712: LDDA_R ldda [%r31, %r0] 0x04, %r16 splash_lsu_80_627: nop nop ta T_CHANGE_HPRIV set 0x26d42cac, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x04800002 ! 1: BLE ble stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 713: FBPULE fbule,a,pn %fcc0, mondo_80_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c8] %asi stxa %r3, [%r0+0x3d8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d91c006 ! 714: WRPR_WSTATE_R wrpr %r7, %r6, %wstate .word 0x8d903f66 ! 715: WRPR_PSTATE_I wrpr %r0, 0x1f66, %pstate .word 0xa1b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r16 .word 0x9f802861 ! 716: SIR sir 0x0861 .word 0xe11fe140 ! 717: LDDF_I ldd [%r31, 0x0140], %f16 nop nop set 0x5690493f, %r28 !TTID : 1 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803fa1 ! 1: SIR sir 0x1fa1 intvec_80_631: .word 0x9f8030c8 ! 718: SIR sir 0x10c8 .word 0xd63fe180 ! 719: STD_I std %r11, [%r31 + 0x0180] nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_633: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_633) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,720,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_633: wrhpr %g0, 0x390, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 720: RDPC rd %pc, %r18 mondo_80_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r7, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d934004 ! 721: WRPR_WSTATE_R wrpr %r13, %r4, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_635), 16, 16)) -> intp(mask2tid(0x80),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,744,*,*,1) xir_80_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_635: and %g1, 2, %g1 brnz,a %g1, xirwait_80_635 ldx [%r17], %g1 xir_80_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a8f2 ! 722: WR_CLEAR_SOFTINT_I wr %r18, 0x08f2, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_80 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_636: wrhpr %g0, 0xbc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c3c0 ! 723: CASA_I casa [%r31] 0x1e, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_637: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_637) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1000,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_637: wrhpr %g0, 18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 724: RDPC rd %pc, %r12 jmptr_80_638: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xc1bfc3e0 ! 726: STDFA_R stda %f0, [%r0, %r31] .word 0xd88008a0 ! 727: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 nop nop mov 0x1, %r18 splash_cmpr_80_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_640)+8 , 16, 16)) -> intp(3,0,10,*,1008,*,88,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_640)&0xffffffff)+8 , 16, 16)) -> intp(6,0,9,*,896,*,88,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x0, %r18 splash_cmpr_80_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 730: SIAM siam 1 cancelint_80_643: rdhpr %halt, %r11 .word 0x85880000 ! 731: ALLCLEAN .word 0xc32fc000 ! 732: STXFSR_R st-sfr %f1, [%r0, %r31] splash_hpstate_80_645: .word 0x819822e7 ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x02e7, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_646) , 16, 16)) -> intp(6,0,16,*,720,*,d2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_646)&0xffffffff) , 16, 16)) -> intp(6,0,28,*,696,*,d2,1) #else set 0x8540e96a, %r28 !TTID : 1 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_646: .word 0x9bb444cc ! 734: FCMPNE32 fcmpne32 %d48, %d12, %r13 .word 0x91948009 ! 735: WRPR_PIL_R wrpr %r18, %r9, %pil br_longdelay1_80_648: .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, .word 0x9d97c000 ! 736: WRPR_WSTATE_R wrpr %r31, %r0, %wstate splash_lsu_80_649: nop nop ta T_CHANGE_HPRIV set 0x6fdc502b, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 737: FBPULE fbule,a,pn %fcc0, splash_tba_80_650: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fde00 ! 739: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc19fda60 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_80_651: nop nop ta T_CHANGE_HPRIV setx 0x0ac44bbe207784a3, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xc1bfc3e0 ! 742: STDFA_R stda %f0, [%r0, %r31] .word 0x8d90321b ! 743: WRPR_PSTATE_I wrpr %r0, 0x121b, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_653), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,992,*,*,1) xir_80_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_653: and %g1, 2, %g1 brnz,a %g1, xirwait_80_653 ldx [%r17], %g1 xir_80_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab806a32 ! 744: WR_CLEAR_SOFTINT_I wr %r1, 0x0a32, %clear_softint .word 0x87ac0a51 ! 745: FCMPd fcmpd %fcc, %f16, %f48 .word 0xe9e7c380 ! 746: CASA_I casa [%r31] 0x1c, %r0, %r20 nop nop mov 0x1, %r18 splash_cmpr_80_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_656)+8 , 16, 16)) -> intp(5,0,4,*,1000,*,a6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_656)&0xffffffff)+8 , 16, 16)) -> intp(2,0,30,*,1000,*,a6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x9190a1dd ! 748: WRPR_PIL_I wrpr %r2, 0x01dd, %pil mondo_80_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3d0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d944013 ! 749: WRPR_WSTATE_R wrpr %r17, %r19, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_659)+8 , 16, 16)) -> intp(5,0,15,*,936,*,90,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_659)&0xffffffff)+8 , 16, 16)) -> intp(7,0,19,*,640,*,90,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982dcc ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0dcc, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_80_660: rdhpr %halt, %r9 .word 0x85880000 ! 752: ALLCLEAN .word 0x0a780001 ! 753: BPCS .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_80_661: ta T_CHANGE_NONPRIV ! macro frzptr_80_662: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_80_663: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_664)+8 , 16, 16)) -> intp(1,0,26,*,752,*,db,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_664)&0xffffffff)+8 , 16, 16)) -> intp(0,0,17,*,904,*,db,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819833d5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x13d5, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_80_665: rdhpr %halt, %r20 .word 0x85880000 ! 758: ALLCLEAN intveclr_80_666: nop nop ta T_CHANGE_HPRIV setx 0x1df24bb5e2d46a4c, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_80_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3e0] %asi stxa %r12, [%r0+0x3c8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d930012 ! 760: WRPR_WSTATE_R wrpr %r12, %r18, %wstate nop nop mov 0x1, %r18 splash_cmpr_80_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_668)+8 , 16, 16)) -> intp(1,0,21,*,664,*,86,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_668)&0xffffffff)+8 , 16, 16)) -> intp(7,0,3,*,1008,*,86,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 761: SIAM siam 1 .word 0xc32fe030 ! 762: STXFSR_I st-sfr %f1, [0x0030, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_80 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_670: wrhpr %g0, 0x709, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 763: CASA_I casa [%r31] 0xf8, %r0, %r8 ibp_80_671: nop nop .word 0xf1efe1d0 ! 764: PREFETCHA_I prefetcha [%r31, + 0x01d0] %asi, #24 mondo_80_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d8] %asi stxa %r2, [%r0+0x3c0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d944007 ! 765: WRPR_WSTATE_R wrpr %r17, %r7, %wstate .word 0xd097d100 ! 766: LDUHA_R lduha [%r31, %r0] 0x88, %r8 splash_tba_80_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fdf00 ! 768: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8d90395e ! 769: WRPR_PSTATE_I wrpr %r0, 0x195e, %pstate .word 0xd0bfe1e0 ! 770: STDA_I stda %r8, [%r31 + 0x01e0] %asi .word 0xe1bfe1a0 ! 771: STDFA_I stda %f16, [0x01a0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_677: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_677) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,736,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_677: wrhpr %g0, 0x593, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 772: RDPC rd %pc, %r16 br_badelay2_80_678: .word 0xa5a449d4 ! 1: FDIVd fdivd %f48, %f20, %f18 allclean .word 0x93b48302 ! 773: ALIGNADDRESS alignaddr %r18, %r2, %r9 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_679: wrhpr %g0, 0xc09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c400 ! 774: CASA_I casa [%r31] 0x20, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_680), 16, 16)) -> intp(mask2tid(0x80),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,648,*,*,1) xir_80_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_680: and %g1, 2, %g1 brnz,a %g1, xirwait_80_680 ldx [%r17], %g1 xir_80_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8371f6 ! 775: WR_CLEAR_SOFTINT_I wr %r13, 0x11f6, %clear_softint splash_lsu_80_681: nop nop ta T_CHANGE_HPRIV set 0x772ba00e, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_682), 16, 16)) -> intp(mask2tid(0x80),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,664,*,*,1) xir_80_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_682: and %g1, 2, %g1 brnz,a %g1, xirwait_80_682 ldx [%r17], %g1 xir_80_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab812aae ! 777: WR_CLEAR_SOFTINT_I wr %r4, 0x0aae, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_683)+8 , 16, 16)) -> intp(2,0,2,*,688,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_683)&0xffffffff)+8 , 16, 16)) -> intp(4,0,20,*,752,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983dd8 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1dd8, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_80_684: nop nop .word 0xe21fe0b0 ! 779: LDD_I ldd [%r31 + 0x00b0], %r17 .word 0xe2dfc200 ! 1: LDXA_R ldxa [%r31, %r0] 0x10, %r17 .word 0x9f803af8 ! 780: SIR sir 0x1af8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_685), 16, 16)) -> intp(mask2tid(0x80),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,904,*,*,1) xir_80_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_685: and %g1, 2, %g1 brnz,a %g1, xirwait_80_685 ldx [%r17], %g1 xir_80_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b003 ! 781: WR_CLEAR_SOFTINT_I wr %r2, 0x1003, %clear_softint .word 0xe19fdd40 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_686) , 16, 16)) -> intp(3,0,26,*,936,*,d3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_686)&0xffffffff) , 16, 16)) -> intp(3,0,19,*,952,*,d3,1) #else set 0x41f0207c, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7a449d1 ! 1: FDIVd fdivd %f48, %f48, %f50 intvec_80_686: .word 0xa1a489c5 ! 783: FDIVd fdivd %f18, %f36, %f16 .word 0xc1bfde20 ! 784: STDFA_R stda %f0, [%r0, %r31] brcommon3_80_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e040 ! 1: STQF_I - %f11, [0x0040, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r7, [%r0] ASI_LSU_CONTROL .word 0xa1aac82a ! 785: FMOVGE fmovs %fcc1, %f10, %f16 nop nop mov 0x1, %r18 splash_cmpr_80_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_688)+8 , 16, 16)) -> intp(2,0,14,*,984,*,86,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_688)&0xffffffff)+8 , 16, 16)) -> intp(5,0,17,*,952,*,86,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_80_689: nop nop .word 0xe19fdf20 ! 787: LDDFA_R ldda [%r31, %r0], %f16 .word 0xe027e046 ! 788: STW_I stw %r16, [%r31 + 0x0046] splash_tba_80_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_691: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_691) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,728,*,*,1)') ifelse(0,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_691: wrhpr %g0, 0xc5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 790: RDPC rd %pc, %r17 .word 0xa5b047d0 ! 791: PDIST pdistn %d32, %d16, %d18 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_80_693: nop nop ta T_CHANGE_HPRIV setx 0x0ca6cd259165aa96, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_80_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_694-donret_80_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00a32a00 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x170c, %htstate best_set_reg(0x2da, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (80) retry .align 2048 donretarg_80_694: .word 0x91a509c2 ! 794: FDIVd fdivd %f20, %f2, %f8 nop nop set 0x15c00871, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97a509c7 ! 1: FDIVd fdivd %f20, %f38, %f42 intvec_80_695: .word 0x39400001 ! 795: FBPUGE fbuge,a,pn %fcc0, .word 0xda2fe120 ! 796: STB_I stb %r13, [%r31 + 0x0120] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_696) , 16, 16)) -> intp(0,0,17,*,696,*,eb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_696)&0xffffffff) , 16, 16)) -> intp(3,0,21,*,936,*,eb,1) #else set 0xf710daa5, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_696: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8023d0 ! 797: SIR sir 0x03d0 .word 0xa1a4c9ca ! 798: FDIVd fdivd %f50, %f10, %f16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_80_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983585 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1585, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0x1660a3a9, %r28 !TTID : 3 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802905 ! 1: SIR sir 0x0905 intvec_80_699: .word 0xa7b4c4ca ! 800: FCMPNE32 fcmpne32 %d50, %d10, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_700), 16, 16)) -> intp(mask2tid(0x80),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,920,*,*,1) xir_80_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_700: and %g1, 2, %g1 brnz,a %g1, xirwait_80_700 ldx [%r17], %g1 xir_80_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82eddb ! 801: WR_CLEAR_SOFTINT_I wr %r11, 0x0ddb, %clear_softint .word 0xc1bfde20 ! 802: STDFA_R stda %f0, [%r0, %r31] cancelint_80_701: rdhpr %halt, %r12 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_80_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_702)+8 , 16, 16)) -> intp(2,0,23,*,752,*,84,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_702)&0xffffffff)+8 , 16, 16)) -> intp(7,0,2,*,752,*,84,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_80_703: ta T_CHANGE_NONHPRIV .word 0x81982684 ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x0684, %hpstate .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 .word 0x9f8027fe ! 806: SIR sir 0x07fe nop nop mov 0x1, %r18 splash_cmpr_80_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_704)+8 , 16, 16)) -> intp(6,0,22,*,744,*,b0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_704)&0xffffffff)+8 , 16, 16)) -> intp(2,0,6,*,912,*,b0,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_80 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_705: wrhpr %g0, 0x109, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d000 ! 808: CASA_I casa [%r31] 0x80, %r0, %r18 pmu_80_706: nop nop setx 0xffffffb4ffffffae, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_80_707: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_80_708: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_709: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_709) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,672,*,*,1)') ifelse(3,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_709: wrhpr %g0, 0xcc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 812: RDPC rd %pc, %r16 pmu_80_710: nop nop setx 0xffffffb7ffffffa9, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xded0978f, %r28 !TTID : 7 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x99b084cc ! 1: FCMPNE32 fcmpne32 %d2, %d12, %r12 intvec_80_711: .word 0x39400001 ! 814: FBPUGE fbuge,a,pn %fcc0, splash_hpstate_80_712: .word 0x81983c9c ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x1c9c, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_80 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_713: wrhpr %g0, 0x39b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c280 ! 816: CASA_I casa [%r31] 0x14, %r0, %r12 brcommon3_80_714: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7c3c0 ! 1: CASA_I casa [%r31] 0x1e, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902b5e ! 817: WRPR_PSTATE_I wrpr %r0, 0x0b5e, %pstate .word 0x91918014 ! 818: WRPR_PIL_R wrpr %r6, %r20, %pil mondo_80_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e8] %asi stxa %r1, [%r0+0x3c0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d930002 ! 819: WRPR_WSTATE_R wrpr %r12, %r2, %wstate nop nop mov 0x1, %r18 splash_cmpr_80_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_717)+8 , 16, 16)) -> intp(0,0,31,*,656,*,d5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_717)&0xffffffff)+8 , 16, 16)) -> intp(2,0,24,*,1000,*,d5,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_718: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_718) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,696,*,*,1)') ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_718: wrhpr %g0, 8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 821: RDPC rd %pc, %r11 nop nop set 0xfee0ccda, %r28 !TTID : 4 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_719: .word 0x39400001 ! 822: FBPUGE fbuge,a,pn %fcc0, splash_lsu_80_720: nop nop ta T_CHANGE_HPRIV set 0xab04898f, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 823: FBPULE fbule,a,pn %fcc0, .word 0xf16fe000 ! 1: PREFETCH_I prefetch [%r31 + 0x0000], #24 .word 0x9f802d57 ! 824: SIR sir 0x0d57 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_721: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_721) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,752,*,*,1)') ifelse(2,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_721: wrhpr %g0, 0x4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 825: RDPC rd %pc, %r20 .word 0xe8bfc3c0 ! 826: STDA_R stda %r20, [%r31 + %r0] 0x1e br_badelay3_80_723: .word 0x14800001 ! 1: BG bg .word 0x22800001 ! 1: BE be,a .word 0xe114800b ! 1: LDQF_R - [%r18, %r11], %f16 .word 0xa5a48830 ! 827: FADDs fadds %f18, %f16, %f18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_724) , 16, 16)) -> intp(3,0,5,*,752,*,9a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_724)&0xffffffff) , 16, 16)) -> intp(2,0,7,*,728,*,9a,1) #else set 0xbca01055, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f80318e ! 1: SIR sir 0x118e intvec_80_724: .word 0x9f803d3e ! 828: SIR sir 0x1d3e nop nop set 0x9dc0da39, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_80_725: .word 0x99b184d0 ! 829: FCMPNE32 fcmpne32 %d6, %d16, %r12 .word 0x91910012 ! 830: WRPR_PIL_R wrpr %r4, %r18, %pil jmptr_80_727: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x12800002 ! 1: BNE bne .word 0x8d9035c5 ! 832: WRPR_PSTATE_I wrpr %r0, 0x15c5, %pstate mondo_80_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d944013 ! 833: WRPR_WSTATE_R wrpr %r17, %r19, %wstate ibp_80_730: nop nop .word 0xa5b4c7ca ! 834: PDIST pdistn %d50, %d10, %d18 cwp_80_731: set user_data_start, %o7 .word 0x93902001 ! 835: WRPR_CWP_I wrpr %r0, 0x0001, %cwp jmptr_80_732: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_80_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3c0] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944010 ! 837: WRPR_WSTATE_R wrpr %r17, %r16, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_734) , 16, 16)) -> intp(5,0,10,*,960,*,f4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_734)&0xffffffff) , 16, 16)) -> intp(2,0,30,*,976,*,f4,1) #else set 0x562040e9, %r28 !TTID : 0 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_734: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa9b444c8 ! 838: FCMPNE32 fcmpne32 %d48, %d8, %r20 brcommon3_80_735: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x819825cd ! 839: WRHPR_HPSTATE_I wrhpr %r0, 0x05cd, %hpstate mondo_80_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c0] %asi stxa %r18, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d908012 ! 840: WRPR_WSTATE_R wrpr %r2, %r18, %wstate nop nop set 0x265066bc, %r28 !TTID : 6 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_737: .word 0x95a489d3 ! 841: FDIVd fdivd %f18, %f50, %f10 splash_lsu_80_738: nop nop ta T_CHANGE_HPRIV set 0x0ba50a79, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 842: FBPULE fbule mondo_80_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d91800d ! 843: WRPR_WSTATE_R wrpr %r6, %r13, %wstate .word 0x04800001 ! 1: BLE ble .word 0x8d903577 ! 844: WRPR_PSTATE_I wrpr %r0, 0x1577, %pstate nop nop set 0x1050b9f8, %r28 !TTID : 1 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93b504d2 ! 1: FCMPNE32 fcmpne32 %d20, %d18, %r9 intvec_80_741: .word 0xa7a149c8 ! 845: FDIVd fdivd %f36, %f8, %f50 mondo_80_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d8] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d940011 ! 846: WRPR_WSTATE_R wrpr %r16, %r17, %wstate trapasi_80_743: nop mov 0x8, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_744: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_744) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,640,*,*,1)') ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_744: wrhpr %g0, 0x941, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 849: RDPC rd %pc, %r18 mondo_80_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c8] %asi stxa %r17, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94c011 ! 850: WRPR_WSTATE_R wrpr %r19, %r17, %wstate .word 0xc19fdb20 ! 851: LDDFA_R ldda [%r31, %r0], %f0 nop nop mov 0x1, %r18 splash_cmpr_80_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_747)+8 , 16, 16)) -> intp(1,0,0,*,712,*,8e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_747)&0xffffffff)+8 , 16, 16)) -> intp(6,0,27,*,656,*,8e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_80_748: set 0x60540000, %r31 .word 0x8584369b ! 853: WRCCR_I wr %r16, 0x169b, %ccr nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_80 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_749: wrhpr %g0, 0xf89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c3c0 ! 854: CASA_I casa [%r31] 0x1e, %r0, %r18 .word 0x9194bbe7 ! 855: WRPR_PIL_I wrpr %r18, 0x1be7, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_750) , 16, 16)) -> intp(1,0,19,*,744,*,b7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_750)&0xffffffff) , 16, 16)) -> intp(3,0,25,*,1000,*,b7,1) #else set 0xd460c47c, %r28 !TTID : 4 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x93b0c4d1 ! 1: FCMPNE32 fcmpne32 %d34, %d48, %r9 intvec_80_750: .word 0x93a249d3 ! 856: FDIVd fdivd %f40, %f50, %f40 nop nop set 0x7e20ddc0, %r28 !TTID : 5 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_751: .word 0x9f80305f ! 857: SIR sir 0x105f cancelint_80_752: rdhpr %halt, %r16 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_753: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_753) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') ifelse(7,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_753: wrhpr %g0, 0xd93, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 859: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_754) , 16, 16)) -> intp(0,0,15,*,960,*,9f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_754)&0xffffffff) , 16, 16)) -> intp(3,0,27,*,688,*,9f,1) #else set 0xf6f04211, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_80_754: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 860: FBPUGE fbuge brcommon3_80_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe090 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0090] ba,a .+8 jmpl %r27+0, %r27 .word 0x819830f5 ! 861: WRHPR_HPSTATE_I wrhpr %r0, 0x10f5, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_756)+8 , 16, 16)) -> intp(3,0,6,*,992,*,da,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_756)&0xffffffff)+8 , 16, 16)) -> intp(4,0,3,*,656,*,da,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983457 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1457, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_80 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_757: wrhpr %g0, 0x580, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d100 ! 863: CASA_I casa [%r31] 0x88, %r0, %r18 .word 0x87902309 ! 864: WRPR_TT_I wrpr %r0, 0x0309, %tt trapasi_80_758: nop mov 0x20, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_80_759: nop nop ta T_CHANGE_HPRIV set 0xf291cb41, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 866: FBPULE fbule,a,pn %fcc0, .word 0xe477e05c ! 867: STX_I stx %r18, [%r31 + 0x005c] br_badelay2_80_760: .word 0x97a509d2 ! 1: FDIVd fdivd %f20, %f18, %f42 pdist %f16, %f6, %f14 .word 0x99b40301 ! 868: ALIGNADDRESS alignaddr %r16, %r1, %r12 intveclr_80_761: nop nop ta T_CHANGE_HPRIV setx 0xe12e1371d4483304, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 869: FBPLG fblg,a,pn %fcc0, .word 0xf1efe1b0 ! 870: PREFETCHA_I prefetcha [%r31, + 0x01b0] %asi, #24 .word 0xe09fde20 ! 871: LDDA_R ldda [%r31, %r0] 0xf1, %r16 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_764: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_764) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') ifelse(6,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_764: wrhpr %g0, 0xd1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 872: RDPC rd %pc, %r10 .word 0xd83fe030 ! 873: STD_I std %r12, [%r31 + 0x0030] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_766: wrhpr %g0, 0x7d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c240 ! 874: CASA_I casa [%r31] 0x12, %r0, %r12 nop nop set 0x1a20d30c, %r28 !TTID : 3 (mask2tid(0x80)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x80),`.align 16') stxa %r28, [%g0] 0x73 intvec_80_767: .word 0x99b0c4cc ! 875: FCMPNE32 fcmpne32 %d34, %d12, %r12 brcommon1_80_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe040 ! 1: STXFSR_I st-sfr %f1, [0x0040, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xa7b487d2 ! 876: PDIST pdistn %d18, %d18, %d50 frzptr_80_769: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_80_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe5148013 ! 1: LDQF_R - [%r18, %r19], %f18 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800002 ! 878: BN bn,a .word 0xa5a309c5 ! 879: FDIVd fdivd %f12, %f36, %f18 brcommon1_80_772: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0xa9b28483 ! 880: FCMPLE32 fcmple32 %d10, %d34, %r20 .word 0xe19fc2c0 ! 881: LDDFA_R ldda [%r31, %r0], %f16 splash_tba_80_774: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_80_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffaa, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x04cc4001 ! 1: BRLEZ brlez,pt %r17, .word 0x8d9030cf ! 884: WRPR_PSTATE_I wrpr %r0, 0x10cf, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_777), 16, 16)) -> intp(mask2tid(0x80),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,976,*,*,1) xir_80_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_777: and %g1, 2, %g1 brnz,a %g1, xirwait_80_777 ldx [%r17], %g1 xir_80_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80bcb2 ! 885: WR_CLEAR_SOFTINT_I wr %r2, 0x1cb2, %clear_softint .word 0xd037e08e ! 886: STH_I sth %r8, [%r31 + 0x008e] .word 0xe19fe0c0 ! 887: LDDFA_I ldda [%r31, 0x00c0], %f16 splash_lsu_80_778: nop nop ta T_CHANGE_HPRIV set 0xbec78072, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x18800002 ! 1: BGU bgu stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 888: FBPULE fbule,a,pn %fcc0, brcommon2_80_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa7a00547 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fda60 ! 889: LDDFA_R ldda [%r31, %r0], %f0 mondo_80_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3d0] %asi stxa %r4, [%r0+0x3d8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948012 ! 890: WRPR_WSTATE_R wrpr %r18, %r18, %wstate nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_781: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_781) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,680,*,*,1)') ifelse(1,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_781: wrhpr %g0, 0x681, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 891: RDPC rd %pc, %r8 .word 0xc30fc000 ! 892: LDXFSR_R ld-fsr [%r31, %r0], %f1 intveclr_80_783: nop nop ta T_CHANGE_HPRIV setx 0x22a94bcffa88b696, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 893: FBPLG fblg,a,pn %fcc0, jmptr_80_784: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_80_785: set user_data_start, %o7 .word 0x93902007 ! 895: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xd2bfd040 ! 896: STDA_R stda %r9, [%r31 + %r0] 0x82 pmu_80_787: nop nop setx 0xffffffbaffffffac, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe1bfdb20 ! 898: STDFA_R stda %f16, [%r0, %r31] mondo_80_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d904001 ! 899: WRPR_WSTATE_R wrpr %r1, %r1, %wstate mondo_80_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r2, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d924013 ! 900: WRPR_WSTATE_R wrpr %r9, %r19, %wstate mondo_80_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d910001 ! 901: WRPR_WSTATE_R wrpr %r4, %r1, %wstate nop nop mov 0x0, %r18 splash_cmpr_80_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_793)+8 , 16, 16)) -> intp(5,0,25,*,960,*,9a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_793)&0xffffffff)+8 , 16, 16)) -> intp(7,0,12,*,912,*,9a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982f91 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f91, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_80_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0a0 ! 1: STQF_I - %f9, [0x00a0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r11, [%r0] ASI_LSU_CONTROL .word 0xa9aac82b ! 904: FMOVGE fmovs %fcc1, %f11, %f20 cancelint_80_795: rdhpr %halt, %r13 .word 0x85880000 ! 905: ALLCLEAN pmu_80_796: nop nop setx 0xffffffb0ffffffa4, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_80_797: nop nop ta T_CHANGE_HPRIV setx 0x4acad7208f27b70a, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_798: wrhpr %g0, 0xd53, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7d920 ! 908: CASA_I casa [%r31] 0xc9, %r0, %r12 ibp_80_799: nop nop .word 0xa3b047c3 ! 909: PDIST pdistn %d32, %d34, %d48 ibp_80_800: nop nop .word 0xe897df00 ! 910: LDUHA_R lduha [%r31, %r0] 0xf8, %r20 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xc1bfdf00 ! 912: STDFA_R stda %f0, [%r0, %r31] brcommon3_80_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe0c0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x00c0] ba,a .+8 jmpl %r27+0, %r27 stxa %r15, [%r0] ASI_LSU_CONTROL .word 0xa1aac824 ! 913: FMOVGE fmovs %fcc1, %f4, %f16 cancelint_80_803: rdhpr %halt, %r20 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_80_804: .word 0x24ca8001 ! 1: BRLEZ brlez,a,pt %r10, .word 0x819839c6 ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x19c6, %hpstate jmptr_80_805: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_80_806: nop nop .word 0x957036e8 ! 917: POPC_I popc 0x16e8, %r10 .word 0xd11fe0a0 ! 918: LDDF_I ldd [%r31, 0x00a0], %f8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_808), 16, 16)) -> intp(mask2tid(0x80),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,704,*,*,1) xir_80_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_808: and %g1, 2, %g1 brnz,a %g1, xirwait_80_808 ldx [%r17], %g1 xir_80_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833e28 ! 919: WR_CLEAR_SOFTINT_I wr %r12, 0x1e28, %clear_softint .word 0xd03fe090 ! 1: STD_I std %r8, [%r31 + 0x0090] .word 0x9f803cca ! 920: SIR sir 0x1cca jmptr_80_809: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_80_810: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_80_811: .word 0x819837d8 ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x17d8, %hpstate ibp_80_812: nop nop .word 0xe1bfdc40 ! 924: STDFA_R stda %f16, [%r0, %r31] frzptr_80_813: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xf16fe1e0 ! 1: PREFETCH_I prefetch [%r31 + 0x01e0], #24 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_80_814: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_80_815: .word 0x1f400001 ! 1: FBPO fbo .word 0x8198250e ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x050e, %hpstate memptr_80_816: set user_data_start, %r31 .word 0x85846062 ! 928: WRCCR_I wr %r17, 0x0062, %ccr nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_817: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_817) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,760,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_817: wrhpr %g0, 0x5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 929: RDPC rd %pc, %r9 .word 0xe09fde20 ! 930: LDDA_R ldda [%r31, %r0] 0xf1, %r16 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_819: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_819) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,976,*,*,1)') ifelse(4,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_819: wrhpr %g0, 0x53, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 931: RDPC rd %pc, %r11 br_badelay1_80_820: .word 0x9ba7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f44 .word 0xe134fc80 ! 1: STQF_I - %f16, [0x1c80, %r19] .word 0xf16fe0e0 ! 1: PREFETCH_I prefetch [%r31 + 0x00e0], #24 normalw .word 0x95458000 ! 932: RD_SOFTINT_REG rd %softint, %r10 fpinit_80_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009c4 ! 933: FDIVd fdivd %f0, %f4, %f6 .word 0x8d903c6f ! 934: WRPR_PSTATE_I wrpr %r0, 0x1c6f, %pstate mondo_80_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r5, [%r0+0x3e0] %asi stxa %r13, [%r0+0x3d0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d92c009 ! 935: WRPR_WSTATE_R wrpr %r11, %r9, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_80_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_80_824: .word 0x8f902001 ! 937: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tba_80_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_80_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_826)+8 , 16, 16)) -> intp(1,0,25,*,752,*,e6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_826)&0xffffffff)+8 , 16, 16)) -> intp(4,0,19,*,688,*,e6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d8f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d8f, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_80_827: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e1ae ! 941: STX_I stx %r16, [%r31 + 0x01ae] br_badelay1_80_828: .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0xa1a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f16 .word 0xe03fe1b0 ! 1: STD_I std %r16, [%r31 + 0x01b0] normalw .word 0x95458000 ! 942: RD_SOFTINT_REG rd %softint, %r10 nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_80 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_829: wrhpr %g0, 0xeca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d040 ! 943: CASA_I casa [%r31] 0x82, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_80_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc32fe120 ! 946: STXFSR_I st-sfr %f1, [0x0120, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_80_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_80 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_80_832: wrhpr %g0, 0xf49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d060 ! 947: CASA_I casa [%r31] 0x83, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_833: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_833) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,696,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_833: wrhpr %g0, 0x319, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 948: RDPC rd %pc, %r19 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_834) , 16, 16)) -> intp(6,0,11,*,896,*,c0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_834)&0xffffffff) , 16, 16)) -> intp(7,0,14,*,640,*,c0,1) #else set 0x1cf0c2e7, %r28 !TTID : 2 (mask2tid(0x80)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_80_834: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400002 ! 951: FBPUGE fbuge splash_tba_80_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_836), 16, 16)) -> intp(mask2tid(0x80),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,680,*,*,1) xir_80_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_836: and %g1, 2, %g1 brnz,a %g1, xirwait_80_836 ldx [%r17], %g1 xir_80_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82ef81 ! 953: WR_CLEAR_SOFTINT_I wr %r11, 0x0f81, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_837), 16, 16)) -> intp(mask2tid(0x80),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x80),1,3,*,720,*,*,1) xir_80_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_80_837: and %g1, 2, %g1 brnz,a %g1, xirwait_80_837 ldx [%r17], %g1 xir_80_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bfb7 ! 954: WR_CLEAR_SOFTINT_I wr %r6, 0x1fb7, %clear_softint mondo_80_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3e8] %asi stxa %r2, [%r0+0x3d8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d930012 ! 955: WRPR_WSTATE_R wrpr %r12, %r18, %wstate pmu_80_839: nop nop setx 0xffffffb4ffffffa3, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xd21fe110 ! 1: LDD_I ldd [%r31 + 0x0110], %r9 .word 0x9f803b82 ! 957: SIR sir 0x1b82 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_840: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_840) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_840: wrhpr %g0, 0x50b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 958: RDPC rd %pc, %r13 cancelint_80_841: rdhpr %halt, %r19 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe120 ! 960: LDDFA_I ldda [%r31, 0x0120], %f0 nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_842: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_842) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,752,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_842: wrhpr %g0, 0x441, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 961: RDPC rd %pc, %r8 intveclr_80_843: nop nop ta T_CHANGE_HPRIV setx 0x5a9c34294aa96066, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 962: FBPLG fblg,a,pn %fcc0, nop nop mov 0x0, %r18 splash_cmpr_80_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 963: SIAM siam 1 ibp_80_845: nop nop wrhpr %g0, 0x783, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93a4c9b2 ! 964: FDIVs fdivs %f19, %f18, %f9 frzptr_80_846: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_80_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_80_847)+8 , 16, 16)) -> intp(0,0,31,*,688,*,bf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_80_847)&0xffffffff)+8 , 16, 16)) -> intp(2,0,22,*,968,*,bf,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_80_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd897c240 ! 968: LDUHA_R lduha [%r31, %r0] 0x12, %r12 cancelint_80_850: rdhpr %halt, %r10 .word 0x85880000 ! 969: ALLCLEAN .word 0x91940014 ! 970: WRPR_PIL_R wrpr %r16, %r20, %pil .word 0xe19fe140 ! 971: LDDFA_I ldda [%r31, 0x0140], %f16 .word 0xe277e1ec ! 972: STX_I stx %r17, [%r31 + 0x01ec] .word 0x91908005 ! 973: WRPR_PIL_R wrpr %r2, %r5, %pil splash_lsu_80_853: nop nop ta T_CHANGE_HPRIV set 0x20804104, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x38800001 ! 1: BGU bgu,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 974: FBPULE fbule frzptr_80_854: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_80_855: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_80_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_80_856-donret_80_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00158700 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1497, %htstate wrhpr %g0, 0xd52, %hpstate ! rand=1 (80) ldx [%r12+%r0], %g1 retry donretarg_80_856: .word 0x8198246d ! 977: WRHPR_HPSTATE_I wrhpr %r0, 0x046d, %hpstate .word 0xe19fe0c0 ! 978: LDDFA_I ldda [%r31, 0x00c0], %f16 .word 0x00800001 ! 1: BN bn .word 0x8d903764 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1764, %pstate .word 0xe28008a0 ! 980: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x80+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_80_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_80_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 80 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_80_858: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x80),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_80_858) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,920,*,*,1)') ifelse(5,mask2tid(0x80),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_80_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x80),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_80_858: wrhpr %g0, 0x619, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 982: RDPC rd %pc, %r18 .word 0xe0bfc3c0 ! 983: STDA_R stda %r16, [%r31 + %r0] 0x1e jmptr_80_860: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa5b487c4 ! 985: PDIST pdistn %d18, %d4, %d18 .word 0xe897c380 ! 986: LDUHA_R lduha [%r31, %r0] 0x1c, %r20 .word 0xe9e7c600 ! 987: CASA_I casa [%r31] 0x30, %r0, %r20 .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 .word 0x9f80250a ! 988: SIR sir 0x050a splash_lsu_80_864: nop nop ta T_CHANGE_HPRIV set 0xd89ec759, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x02ca8001 ! 1: BRZ brz,pt %r10, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 989: FBPULE fbule,a,pn %fcc0, brcommon2_80_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a00543 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0xe1bfda60 ! 990: STDFA_R stda %f16, [%r0, %r31] ibp_80_866: nop nop wrhpr %g0, 0xc48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f802120 ! 991: SIR sir 0x0120 memptr_80_867: set user_data_start, %r31 .word 0x8584f355 ! 992: WRCCR_I wr %r19, 0x1355, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9f803923 ! 994: SIR sir 0x1923 .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xf16fe0f0 ! 1: PREFETCH_I prefetch [%r31 + 0x00f0], #24 mov 0x34, %r30 .word 0x91d0001e ! 995: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe21fe080 ! 996: LDD_I ldd [%r31 + 0x0080], %r17 .word 0xe227e166 ! 997: STW_I stw %r17, [%r31 + 0x0166] .word 0x9f8020b0 ! 998: SIR sir 0x00b0 .word 0xe297c2c0 ! 999: LDUHA_R lduha [%r31, %r0] 0x16, %r17 splash_tba_80_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_7: wrhpr %g0, 0x892, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_40_0: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e105 ! 2: STF_I st %f8, [0x0105, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_1: wrhpr %g0, 0x291, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 3: CASA_I casa [%r31] 0xc9, %r0, %r8 dvapa_40_2: nop nop ta T_CHANGE_HPRIV mov 0xcf8, %r20 mov 0x10, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5b44494 ! 4: FCMPLE32 fcmple32 %d48, %d20, %r18 nop nop set 0xbda0a451, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_3: .word 0x19400001 ! 5: FBPUGE fbuge br_longdelay3_40_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x81983607 ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x1607, %hpstate mondo_40_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d944014 ! 7: WRPR_WSTATE_R wrpr %r17, %r20, %wstate .word 0xc19fc3e0 ! 8: LDDFA_R ldda [%r31, %r0], %f0 br_badelay3_40_7: .word 0x32800001 ! 1: BNE bne,a .word 0x12800001 ! 1: BNE bne .word 0xe3144014 ! 1: LDQF_R - [%r17, %r20], %f17 .word 0x97a4c82b ! 9: FADDs fadds %f19, %f11, %f11 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_8), 16, 16)) -> intp(mask2tid(0x40),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,992,*,*,1) xir_40_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_8: and %g1, 2, %g1 brnz,a %g1, xirwait_40_8 ldx [%r17], %g1 xir_40_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822525 ! 10: WR_CLEAR_SOFTINT_I wr %r8, 0x0525, %clear_softint .word 0x0acb4002 ! 1: BRNZ brnz,pt %r13, .word 0x8d9038d5 ! 11: WRPR_PSTATE_I wrpr %r0, 0x18d5, %pstate .word 0x9f802110 ! 12: SIR sir 0x0110 nop nop set 0xff10d0d4, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_11: .word 0xa7a149d0 ! 13: FDIVd fdivd %f36, %f16, %f50 .word 0xc1bfde20 ! 14: STDFA_R stda %f0, [%r0, %r31] ibp_40_13: nop nop .word 0xa1a209c6 ! 15: FDIVd fdivd %f8, %f6, %f16 nop nop ta T_CHANGE_HPRIV ! macro donret_40_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_14-donret_40_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x004c2500 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x15db, %htstate best_set_reg(0x1b0b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) ldx [%r12+%r0], %g1 retry donretarg_40_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_40_15: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_16: wrhpr %g0, 0xf80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c540 ! 18: CASA_I casa [%r31] 0x2a, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_17: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_17) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,664,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_17: wrhpr %g0, 0x918, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 19: RDPC rd %pc, %r8 .word 0x9f803809 ! 20: SIR sir 0x1809 brcommon3_40_18: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd31fe140 ! 21: LDDF_I ldd [%r31, 0x0140], %f9 .word 0x9f802674 ! 22: SIR sir 0x0674 .word 0x91d020b3 ! 23: Tcc_I ta icc_or_xcc, %r0 + 179 br_badelay2_40_19: .word 0x32800001 ! 1: BNE bne,a pdist %f18, %f30, %f24 .word 0xa9b08302 ! 24: ALIGNADDRESS alignaddr %r2, %r2, %r20 ibp_40_20: nop nop wrhpr %g0, 0x488, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fde00 ! 25: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_21)+8 , 16, 16)) -> intp(3,0,31,*,1008,*,f8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_21)&0xffffffff)+8 , 16, 16)) -> intp(3,0,8,*,1000,*,f8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983195 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1195, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_40_22: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 27: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_23: wrhpr %g0, 0x50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7dc40 ! 28: CASA_I casa [%r31] 0xe2, %r0, %r17 mondo_40_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3c8] %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d944013 ! 29: WRPR_WSTATE_R wrpr %r17, %r19, %wstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_25: wrhpr %g0, 0x711, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d000 ! 30: CASA_I casa [%r31] 0x80, %r0, %r17 .word 0xe22fe1ea ! 31: STB_I stb %r17, [%r31 + 0x01ea] brcommon3_40_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c2e0 ! 1: CASA_I casa [%r31] 0x17, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe2dfc600 ! 32: LDXA_R ldxa [%r31, %r0] 0x30, %r17 .word 0xe297c200 ! 1: LDUHA_R lduha [%r31, %r0] 0x10, %r17 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 mov 0x34, %r30 .word 0x91d0001e ! 33: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe19fe100 ! 34: LDDFA_I ldda [%r31, 0x0100], %f16 brcommon3_40_27: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xc32fe070 ! 35: STXFSR_I st-sfr %f1, [0x0070, %r31] nop nop mov 0x1, %r18 splash_cmpr_40_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_28)+8 , 16, 16)) -> intp(0,0,11,*,984,*,c2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_28)&0xffffffff)+8 , 16, 16)) -> intp(0,0,16,*,920,*,c2,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 36: SIAM siam 1 jmptr_40_29: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_30: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_30) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1016,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_30: wrhpr %g0, 0xcd1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 38: RDPC rd %pc, %r9 cancelint_40_31: rdhpr %halt, %r20 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_33), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,640,*,*,1) xir_40_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_33: and %g1, 2, %g1 brnz,a %g1, xirwait_40_33 ldx [%r17], %g1 xir_40_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80fa2a ! 41: WR_CLEAR_SOFTINT_I wr %r3, 0x1a2a, %clear_softint frzptr_40_34: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 42: BN bn,a brcommon3_40_35: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe1b0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x01b0] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902f47 ! 43: WRPR_PSTATE_I wrpr %r0, 0x0f47, %pstate frzptr_40_36: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdb40 ! 44: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0x1500985a, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8029a9 ! 1: SIR sir 0x09a9 intvec_40_37: .word 0x19400001 ! 45: FBPUGE fbuge frzptr_40_38: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe1b0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01b0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_39: wrhpr %g0, 0xb5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d040 ! 47: CASA_I casa [%r31] 0x82, %r0, %r16 .word 0xe1bfdc00 ! 48: STDFA_R stda %f16, [%r0, %r31] .word 0xa1a00160 ! 49: FABSq dis not found nop nop mov 0x1, %r18 splash_cmpr_40_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_42)+8 , 16, 16)) -> intp(6,0,2,*,656,*,e0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_42)&0xffffffff)+8 , 16, 16)) -> intp(2,0,6,*,896,*,e0,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 50: SIAM siam 1 mondo_40_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3c0] %asi stxa %r2, [%r0+0x3e8] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d948009 ! 51: WRPR_WSTATE_R wrpr %r18, %r9, %wstate .word 0xe09fe020 ! 52: LDDA_I ldda [%r31, + 0x0020] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_44) , 16, 16)) -> intp(0,0,1,*,936,*,f9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_44)&0xffffffff) , 16, 16)) -> intp(5,0,29,*,704,*,f9,1) #else set 0x7007d9b, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_44: .word 0x9f8020ba ! 53: SIR sir 0x00ba .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_40_46: rdhpr %halt, %r10 .word 0x85880000 ! 55: ALLCLEAN brcommon3_40_47: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe140 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0140] ba,a .+8 jmpl %r27-4, %r27 .word 0xd1e7d040 ! 56: CASA_I casa [%r31] 0x82, %r0, %r8 dvapa_40_48: nop nop ta T_CHANGE_HPRIV mov 0xcd6, %r20 mov 0x13, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xa43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd03fe130 ! 57: STD_I std %r8, [%r31 + 0x0130] cancelint_40_49: rdhpr %halt, %r16 .word 0x85880000 ! 58: ALLCLEAN intveclr_40_50: nop nop ta T_CHANGE_HPRIV setx 0xd3ecddf4d151ab07, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xadb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_40_51: nop nop setx 0xffffffbaffffffa3, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_40_52: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e060 ! 1: STQF_I - %f10, [0x0060, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0x95b7c7c0 ! 61: PDIST pdistn %d62, %d0, %d10 mondo_40_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3c0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d910012 ! 62: WRPR_WSTATE_R wrpr %r4, %r18, %wstate intveclr_40_54: nop nop ta T_CHANGE_HPRIV setx 0x9dbd68a0cde5bfbb, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xa10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 63: FBPLG fblg,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_55), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1000,*,*,1) xir_40_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_55: and %g1, 2, %g1 brnz,a %g1, xirwait_40_55 ldx [%r17], %g1 xir_40_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82faeb ! 64: WR_CLEAR_SOFTINT_I wr %r11, 0x1aeb, %clear_softint ibp_40_56: nop nop .word 0xa5a109ca ! 65: FDIVd fdivd %f4, %f10, %f18 ibp_40_57: nop nop wrhpr %g0, 0x619, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87acca52 ! 66: FCMPd fcmpd %fcc, %f50, %f18 .word 0xc09fde00 ! 67: LDDA_R ldda [%r31, %r0] 0xf0, %r0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_59), 16, 16)) -> intp(mask2tid(0x40),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) xir_40_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_59: and %g1, 2, %g1 brnz,a %g1, xirwait_40_59 ldx [%r17], %g1 xir_40_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a343 ! 68: WR_CLEAR_SOFTINT_I wr %r2, 0x0343, %clear_softint br_longdelay4_40_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902005 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate .word 0xe69fc600 ! 70: LDDA_R ldda [%r31, %r0] 0x30, %r19 .word 0xe1bfdc00 ! 71: STDFA_R stda %f16, [%r0, %r31] splash_tba_40_62: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_40_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c8] %asi stxa %r18, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d910011 ! 73: WRPR_WSTATE_R wrpr %r4, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_64) , 16, 16)) -> intp(4,0,30,*,664,*,f6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_64)&0xffffffff) , 16, 16)) -> intp(2,0,11,*,920,*,f6,1) #else set 0x5c50e2aa, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5b2c4d2 ! 1: FCMPNE32 fcmpne32 %d42, %d18, %r18 intvec_40_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8028b4 ! 74: SIR sir 0x08b4 mondo_40_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d928004 ! 75: WRPR_WSTATE_R wrpr %r10, %r4, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_66), 16, 16)) -> intp(mask2tid(0x40),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1008,*,*,1) xir_40_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_66: and %g1, 2, %g1 brnz,a %g1, xirwait_40_66 ldx [%r17], %g1 xir_40_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b6c9 ! 76: WR_CLEAR_SOFTINT_I wr %r2, 0x16c9, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_67), 16, 16)) -> intp(mask2tid(0x40),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,896,*,*,1) xir_40_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_67: and %g1, 2, %g1 brnz,a %g1, xirwait_40_67 ldx [%r17], %g1 xir_40_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81ea71 ! 77: WR_CLEAR_SOFTINT_I wr %r7, 0x0a71, %clear_softint splash_hpstate_40_68: ta T_CHANGE_NONHPRIV .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, .word 0x81982d46 ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x0d46, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_40 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_69: wrhpr %g0, 0x898, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c2c0 ! 79: CASA_I casa [%r31] 0x16, %r0, %r19 .word 0xe7e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r19 .word 0xe71fe080 ! 1: LDDF_I ldd [%r31, 0x0080], %f19 mov 0xb0, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_40_70: nop nop ta T_CHANGE_HPRIV set 0x01a3673d, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0d400001 ! 1: FBPG fbg stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x0, %r18 splash_cmpr_40_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_72), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,696,*,*,1) xir_40_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_72: and %g1, 2, %g1 brnz,a %g1, xirwait_40_72 ldx [%r17], %g1 xir_40_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852567 ! 83: WR_CLEAR_SOFTINT_I wr %r20, 0x0567, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_73: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_73) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,744,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_73: wrhpr %g0, 0xc51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 84: RDPC rd %pc, %r19 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_74)+8 , 16, 16)) -> intp(0,0,2,*,1008,*,4f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_74)&0xffffffff)+8 , 16, 16)) -> intp(1,0,0,*,728,*,4f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d0d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d0d, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_40_75: set user_data_start, %o7 .word 0x93902004 ! 86: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cwp_40_76: set user_data_start, %o7 .word 0x93902002 ! 87: WRPR_CWP_I wrpr %r0, 0x0002, %cwp brcommon1_40_77: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1a449d3 ! 88: FDIVd fdivd %f48, %f50, %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_78), 16, 16)) -> intp(mask2tid(0x40),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,912,*,*,1) xir_40_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_78: and %g1, 2, %g1 brnz,a %g1, xirwait_40_78 ldx [%r17], %g1 xir_40_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8328f7 ! 89: WR_CLEAR_SOFTINT_I wr %r12, 0x08f7, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_40_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_79-donret_40_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000a0500 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x7ce, %htstate best_set_reg(0x175a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) done donretarg_40_79: .word 0x81983e4f ! 90: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4f, %hpstate .word 0xe19fe0c0 ! 91: LDDFA_I ldda [%r31, 0x00c0], %f16 ibp_40_80: nop nop .word 0xd53fe0d0 ! 92: STDF_I std %f10, [0x00d0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_81: wrhpr %g0, 0x2c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7d100 ! 93: CASA_I casa [%r31] 0x88, %r0, %r10 trapasi_40_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_40_83: nop nop ta T_CHANGE_HPRIV setx 0x4c29681b703fcc0b, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 95: FBPLG fblg,a,pn %fcc0, intveclr_40_84: nop nop ta T_CHANGE_HPRIV setx 0x5896ae312fa4442e, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_40_85: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 97: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_86: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_86) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,928,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,664,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_86: wrhpr %g0, 0x690, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 98: RDPC rd %pc, %r9 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_87: wrhpr %g0, 0x98b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c240 ! 99: CASA_I casa [%r31] 0x12, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_40_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_88-donret_40_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d97900 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1e4e, %htstate best_set_reg(0xa99, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) ldx [%r12+%r0], %g1 retry donretarg_40_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_40_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x19400001 ! 102: FBPUGE fbuge .word 0x87ab4a41 ! 103: FCMPd fcmpd %fcc, %f44, %f32 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_92), 16, 16)) -> intp(mask2tid(0x40),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) xir_40_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_92: and %g1, 2, %g1 brnz,a %g1, xirwait_40_92 ldx [%r17], %g1 xir_40_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bc37 ! 104: WR_CLEAR_SOFTINT_I wr %r6, 0x1c37, %clear_softint ibp_40_93: nop nop .word 0x20800001 ! 105: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_40_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_94)+8 , 16, 16)) -> intp(0,0,23,*,976,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_94)&0xffffffff)+8 , 16, 16)) -> intp(5,0,19,*,704,*,53,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_40_95: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fda00 ! 107: LDDFA_R ldda [%r31, %r0], %f16 .word 0x9f802d40 ! 108: SIR sir 0x0d40 nop nop ta T_CHANGE_HPRIV ! macro donret_40_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_96-donret_40_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f35200 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x114f, %htstate wrhpr %g0, 0x811, %hpstate ! rand=1 (40) ldx [%r12+%r0], %g1 retry donretarg_40_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x3c780001 ! 110: BPPOS .word 0xe29fc540 ! 111: LDDA_R ldda [%r31, %r0] 0x2a, %r17 splash_tba_40_98: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0xc1d04de6, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_99: .word 0x9f8023ca ! 113: SIR sir 0x03ca memptr_40_100: set 0x60340000, %r31 .word 0x8580ef26 ! 114: WRCCR_I wr %r3, 0x0f26, %ccr nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_101: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_101) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1016,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_101: wrhpr %g0, 0x2d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 115: RDPC rd %pc, %r16 splash_tba_40_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_103)+8 , 16, 16)) -> intp(7,0,30,*,912,*,7c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_103)&0xffffffff)+8 , 16, 16)) -> intp(5,0,25,*,744,*,7c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982fc3 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0fc3, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_104: wrhpr %g0, 0xb12, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d140 ! 118: CASA_I casa [%r31] 0x8a, %r0, %r13 ibp_40_105: nop nop .word 0xa7b107c5 ! 119: PDIST pdistn %d4, %d36, %d50 ibp_40_106: nop nop .word 0xda3fe010 ! 120: STD_I std %r13, [%r31 + 0x0010] mondo_40_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d91c006 ! 121: WRPR_WSTATE_R wrpr %r7, %r6, %wstate .word 0xe19fda60 ! 122: LDDFA_R ldda [%r31, %r0], %f16 .word 0xda9fe130 ! 123: LDDA_I ldda [%r31, + 0x0130] %asi, %r13 brcommon3_40_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0xa5aac823 ! 124: FMOVGE fmovs %fcc1, %f3, %f18 .word 0xe037e0aa ! 125: STH_I sth %r16, [%r31 + 0x00aa] frzptr_40_109: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702180 ! 1: POPC_I popc 0x0180, %r16 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc40 ! 126: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_110: wrhpr %g0, 0xb92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dd40 ! 127: CASA_I casa [%r31] 0xea, %r0, %r16 nop nop set 0xab10d36f, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803760 ! 1: SIR sir 0x1760 intvec_40_111: .word 0x9f8022d2 ! 128: SIR sir 0x02d2 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_112) , 16, 16)) -> intp(3,0,5,*,960,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_112)&0xffffffff) , 16, 16)) -> intp(6,0,4,*,744,*,5d,1) #else set 0x241072b4, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_112: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803f9f ! 129: SIR sir 0x1f9f .word 0xe0bfdd40 ! 130: STDA_R stda %r16, [%r31 + %r0] 0xea .word 0x95a00160 ! 131: FABSq dis not found .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_40_116: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe140 ! 134: LDDA_I ldda [%r31, + 0x0140] %asi, %r10 intveclr_40_117: nop nop ta T_CHANGE_HPRIV setx 0xab9475c144a835dc, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xd81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x2cc84002 ! 1: BRGZ brgz,a,pt %r1, .word 0x8d9036c1 ! 136: WRPR_PSTATE_I wrpr %r0, 0x16c1, %pstate .word 0xd49fc540 ! 137: LDDA_R ldda [%r31, %r0] 0x2a, %r10 ibp_40_120: nop nop wrhpr %g0, 0xe9a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd49fc240 ! 138: LDDA_R ldda [%r31, %r0] 0x12, %r10 .word 0x8d90330b ! 139: WRPR_PSTATE_I wrpr %r0, 0x130b, %pstate frzptr_40_122: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 140: BN bn,a nop nop set 0x1fe0e59a, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_123: .word 0x39400001 ! 141: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_40_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983ccd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ccd, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_40_126: ta T_CHANGE_NONHPRIV .word 0x37400002 ! 1: FBPGE fbge,a,pn %fcc0, .word 0x81982704 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x0704, %hpstate demap_40_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20, stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0x112, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe050 ! 145: LDD_I ldd [%r31 + 0x0050], %r19 .word 0xe63fe0a0 ! 146: STD_I std %r19, [%r31 + 0x00a0] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_128)+8 , 16, 16)) -> intp(7,0,20,*,896,*,76,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_128)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,760,*,76,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819826dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x06dd, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_40_129: rdhpr %halt, %r9 .word 0x85880000 ! 148: ALLCLEAN splash_tba_40_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_40_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_131-donret_40_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d91f00 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x517, %htstate best_set_reg(0x35b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) done donretarg_40_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_132) , 16, 16)) -> intp(3,0,13,*,992,*,e7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_132)&0xffffffff) , 16, 16)) -> intp(3,0,18,*,1008,*,e7,1) #else set 0x6fc06071, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_40_132: .word 0x19400001 ! 151: FBPUGE fbuge memptr_40_133: set 0x60140000, %r31 .word 0x8580acf3 ! 152: WRCCR_I wr %r2, 0x0cf3, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0xe69fc540 ! 154: LDDA_R ldda [%r31, %r0] 0x2a, %r19 .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe0d0 ! 156: LDD_I ldd [%r31 + 0x00d0], %r19 .word 0xc19fdb20 ! 157: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_40_136: nop nop ta T_CHANGE_HPRIV set 0x3b647549, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0b400001 ! 1: FBPUG fbug stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697c400 ! 159: LDUHA_R lduha [%r31, %r0] 0x20, %r19 .word 0x39400001 ! 160: FBPUGE fbuge,a,pn %fcc0, dvapa_40_138: nop nop ta T_CHANGE_HPRIV mov 0x9dc, %r20 mov 0x1, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x518, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2bfd140 ! 161: STDA_R stda %r9, [%r31 + %r0] 0x8a .word 0xd3e7c180 ! 162: CASA_I casa [%r31] 0x c, %r0, %r9 intveclr_40_140: nop nop ta T_CHANGE_HPRIV setx 0xf3929c766256cc7d, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xdda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 163: FBPLG fblg,a,pn %fcc0, .word 0xe1bfdd40 ! 164: STDFA_R stda %f16, [%r0, %r31] brcommon3_40_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0x95aac831 ! 165: FMOVGE fmovs %fcc1, %f17, %f10 brcommon3_40_142: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-4, %r27 .word 0xe51fe110 ! 166: LDDF_I ldd [%r31, 0x0110], %f18 .word 0x9193400c ! 167: WRPR_PIL_R wrpr %r13, %r12, %pil frzptr_40_144: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 168: BN bn splash_hpstate_40_145: ta T_CHANGE_NONHPRIV .word 0x819839d7 ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x19d7, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_40 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_146: wrhpr %g0, 0x44b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d920 ! 170: CASA_I casa [%r31] 0xc9, %r0, %r18 splash_lsu_40_147: nop nop ta T_CHANGE_HPRIV set 0x6d677313, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2c800001 ! 1: BNEG bneg,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 171: FBPULE fbule,a,pn %fcc0, .word 0x87ac0a45 ! 172: FCMPd fcmpd %fcc, %f16, %f36 .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_40_149: set 0x60740000, %r31 .word 0x8580efd4 ! 174: WRCCR_I wr %r3, 0x0fd4, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_150), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1000,*,*,1) xir_40_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_150: and %g1, 2, %g1 brnz,a %g1, xirwait_40_150 ldx [%r17], %g1 xir_40_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84376d ! 175: WR_CLEAR_SOFTINT_I wr %r16, 0x176d, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_40_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_151)+8 , 16, 16)) -> intp(5,0,8,*,920,*,65,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_151)&0xffffffff)+8 , 16, 16)) -> intp(1,0,1,*,1000,*,65,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_152) , 16, 16)) -> intp(7,0,19,*,912,*,f6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_152)&0xffffffff) , 16, 16)) -> intp(4,0,3,*,648,*,f6,1) #else set 0xde20724e, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa9b504d3 ! 1: FCMPNE32 fcmpne32 %d20, %d50, %r20 intvec_40_152: .word 0x39400002 ! 177: FBPUGE fbuge,a,pn %fcc0, mondo_40_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d950009 ! 178: WRPR_WSTATE_R wrpr %r20, %r9, %wstate .word 0xd427e0fe ! 179: STW_I stw %r10, [%r31 + 0x00fe] nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_154: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_154) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,960,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_154: wrhpr %g0, 0x548, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 180: RDPC rd %pc, %r20 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_155: wrhpr %g0, 0xac2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7dc40 ! 182: CASA_I casa [%r31] 0xe2, %r0, %r9 .word 0x97b04fe5 ! 183: FONES e %f11 splash_tba_40_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_40_157: rdhpr %halt, %r18 .word 0x85880000 ! 185: ALLCLEAN .word 0x87ac8acc ! 186: FCMPEd fcmped %fcc, %f18, %f12 frzptr_40_158: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0xb30034fb, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_159: .word 0x39400001 ! 188: FBPUGE fbuge,a,pn %fcc0, .word 0xd437e156 ! 189: STH_I sth %r10, [%r31 + 0x0156] change_to_randtl_40_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_40_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_162), 16, 16)) -> intp(mask2tid(0x40),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) xir_40_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_162: and %g1, 2, %g1 brnz,a %g1, xirwait_40_162 ldx [%r17], %g1 xir_40_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822666 ! 192: WR_CLEAR_SOFTINT_I wr %r8, 0x0666, %clear_softint .word 0x91948005 ! 193: WRPR_PIL_R wrpr %r18, %r5, %pil memptr_40_164: set 0x60140000, %r31 .word 0x8585359a ! 194: WRCCR_I wr %r20, 0x159a, %ccr .word 0xd49fc6c0 ! 195: LDDA_R ldda [%r31, %r0] 0x36, %r10 frzptr_40_166: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 196: BN bn brcommon1_40_167: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 197: BN bn,a dvapa_40_168: nop nop ta T_CHANGE_HPRIV mov 0xa9d, %r20 mov 0x10, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xc80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd09fc720 ! 198: LDDA_R ldda [%r31, %r0] 0x39, %r8 .word 0xe0bfda00 ! 199: STDA_R stda %r16, [%r31 + %r0] 0xd0 .word 0xa350c000 ! 200: RDPR_TT rdpr %tt, %r17 .word 0xf16fe150 ! 201: PREFETCH_I prefetch [%r31 + 0x0150], #24 fpinit_40_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 202: FCMPd fcmpd %fcc, %f0, %f4 .word 0xe0bfda00 ! 203: STDA_R stda %r16, [%r31 + %r0] 0xd0 cwp_40_172: set user_data_start, %o7 .word 0x93902000 ! 204: WRPR_CWP_I wrpr %r0, 0x0000, %cwp nop nop set 0x62105d2e, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_173: .word 0x19400001 ! 205: FBPUGE fbuge splash_lsu_40_174: nop nop ta T_CHANGE_HPRIV set 0xdf7119e9, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 206: FBPULE fbule ibp_40_175: nop nop .word 0xe19fdf00 ! 207: LDDFA_R ldda [%r31, %r0], %f16 dvapa_40_176: nop nop ta T_CHANGE_HPRIV mov 0xf19, %r20 mov 0xd, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x380, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdc40 ! 208: STDFA_R stda %f0, [%r0, %r31] splash_lsu_40_177: nop nop ta T_CHANGE_HPRIV set 0x2c1324ba, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 209: FBPULE fbule nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_40 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_178: wrhpr %g0, 0x388, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d920 ! 210: CASA_I casa [%r31] 0xc9, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_179), 16, 16)) -> intp(mask2tid(0x40),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,904,*,*,1) xir_40_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_179: and %g1, 2, %g1 brnz,a %g1, xirwait_40_179 ldx [%r17], %g1 xir_40_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8067c3 ! 211: WR_CLEAR_SOFTINT_I wr %r1, 0x07c3, %clear_softint .word 0xa3a00552 ! 212: FSQRTd fsqrt cancelint_40_180: rdhpr %halt, %r10 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_181), 16, 16)) -> intp(mask2tid(0x40),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,968,*,*,1) xir_40_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_181: and %g1, 2, %g1 brnz,a %g1, xirwait_40_181 ldx [%r17], %g1 xir_40_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81e765 ! 214: WR_CLEAR_SOFTINT_I wr %r7, 0x0765, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_40 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_182: wrhpr %g0, 0x888, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7d040 ! 215: CASA_I casa [%r31] 0x82, %r0, %r10 dvapa_40_183: nop nop ta T_CHANGE_HPRIV mov 0xc4c, %r20 mov 0x11, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdf20 ! 216: STDFA_R stda %f16, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_184), 16, 16)) -> intp(mask2tid(0x40),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1008,*,*,1) xir_40_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_184: and %g1, 2, %g1 brnz,a %g1, xirwait_40_184 ldx [%r17], %g1 xir_40_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab826fff ! 217: WR_CLEAR_SOFTINT_I wr %r9, 0x0fff, %clear_softint .word 0xd497c3c0 ! 218: LDUHA_R lduha [%r31, %r0] 0x1e, %r10 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_186)+8 , 16, 16)) -> intp(0,0,28,*,680,*,f7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_186)&0xffffffff)+8 , 16, 16)) -> intp(6,0,0,*,656,*,f7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819827c7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07c7, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_40_187: nop nop ta T_CHANGE_HPRIV mov 0xe69, %r20 mov 0xf, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xcdb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd41fe040 ! 220: LDD_I ldd [%r31 + 0x0040], %r10 pmu_40_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffa3, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_40_189: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x95702110 ! 1: POPC_I popc 0x0110, %r10 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 222: BN bn,a cancelint_40_190: rdhpr %halt, %r12 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_191: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_191) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1000,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_191: wrhpr %g0, 0x893, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 224: RDPC rd %pc, %r13 brcommon1_40_192: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x9f802182 ! 225: SIR sir 0x0182 nop nop mov 0x1, %r18 splash_cmpr_40_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_193)+8 , 16, 16)) -> intp(5,0,11,*,976,*,55,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_193)&0xffffffff)+8 , 16, 16)) -> intp(6,0,30,*,928,*,55,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_194)+8 , 16, 16)) -> intp(1,0,21,*,672,*,60,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_194)&0xffffffff)+8 , 16, 16)) -> intp(0,0,25,*,720,*,60,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819827dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07dd, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_195: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_195) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_195: wrhpr %g0, 0x1ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 228: RDPC rd %pc, %r18 .word 0x879023ec ! 229: WRPR_TT_I wrpr %r0, 0x03ec, %tt nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_40 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_196: wrhpr %g0, 0x21a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d000 ! 230: CASA_I casa [%r31] 0x80, %r0, %r18 .word 0xc32fc000 ! 231: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xe5e7d920 ! 232: CASA_I casa [%r31] 0xc9, %r0, %r18 frzptr_40_199: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 233: BN bn,a .word 0x9f80231c ! 234: SIR sir 0x031c mondo_40_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3e0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d918014 ! 235: WRPR_WSTATE_R wrpr %r6, %r20, %wstate splash_tba_40_201: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_202)+8 , 16, 16)) -> intp(5,0,21,*,936,*,60,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_202)&0xffffffff)+8 , 16, 16)) -> intp(1,0,29,*,968,*,60,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982ca5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0ca5, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_40_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d0] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d950006 ! 238: WRPR_WSTATE_R wrpr %r20, %r6, %wstate cancelint_40_204: rdhpr %halt, %r19 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_40_205: nop nop ta T_CHANGE_HPRIV set 0x1158e41d, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 240: FBPULE fbule nop nop ta T_CHANGE_HPRIV ! macro donret_40_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_206-donret_40_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00aac300 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1e8f, %htstate wrhpr %g0, 0x49a, %hpstate ! rand=1 (40) ldx [%r12+%r0], %g1 retry donretarg_40_206: .word 0x0f400001 ! 241: FBPU fbu .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x9194c013 ! 243: WRPR_PIL_R wrpr %r19, %r19, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_208), 16, 16)) -> intp(mask2tid(0x40),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,928,*,*,1) xir_40_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_208: and %g1, 2, %g1 brnz,a %g1, xirwait_40_208 ldx [%r17], %g1 xir_40_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81acdc ! 244: WR_CLEAR_SOFTINT_I wr %r6, 0x0cdc, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_40_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198318d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x118d, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_40 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_210: wrhpr %g0, 0x38a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c180 ! 246: CASA_I casa [%r31] 0x c, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x0, %r18 splash_cmpr_40_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 248: SIAM siam 1 cancelint_40_212: rdhpr %halt, %r8 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_213)+8 , 16, 16)) -> intp(3,0,17,*,656,*,59,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_213)&0xffffffff)+8 , 16, 16)) -> intp(6,0,18,*,640,*,59,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f6c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f6c, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d9038fd ! 251: WRPR_PSTATE_I wrpr %r0, 0x18fd, %pstate memptr_40_215: set 0x60540000, %r31 .word 0x8583225a ! 252: WRCCR_I wr %r12, 0x025a, %ccr nop nop mov 0x0, %r18 splash_cmpr_40_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_40_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7d000 ! 1: CASA_I casa [%r31] 0x80, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x91aac82b ! 254: FMOVGE fmovs %fcc1, %f11, %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_218) , 16, 16)) -> intp(7,0,2,*,984,*,56,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_218)&0xffffffff) , 16, 16)) -> intp(3,0,2,*,744,*,56,1) #else set 0xbe000125, %r28 !TTID : 1 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_218: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5a509d1 ! 255: FDIVd fdivd %f20, %f48, %f18 .word 0x91928013 ! 256: WRPR_PIL_R wrpr %r10, %r19, %pil ibp_40_220: nop nop .word 0x97a509a8 ! 257: FDIVs fdivs %f20, %f8, %f11 .word 0xd7e7c280 ! 258: CASA_I casa [%r31] 0x14, %r0, %r11 cancelint_40_222: rdhpr %halt, %r17 .word 0x85880000 ! 259: ALLCLEAN .word 0xe0bfdc40 ! 260: STDA_R stda %r16, [%r31 + %r0] 0xe2 .word 0xe8bfc380 ! 261: STDA_R stda %r20, [%r31 + %r0] 0x1c cancelint_40_225: rdhpr %halt, %r12 .word 0x85880000 ! 262: ALLCLEAN brcommon3_40_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r20, [%r0] ASI_LSU_CONTROL .word 0xa3aac828 ! 263: FMOVGE fmovs %fcc1, %f8, %f17 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_227)+8 , 16, 16)) -> intp(6,0,0,*,672,*,55,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_227)&0xffffffff)+8 , 16, 16)) -> intp(7,0,13,*,920,*,55,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982715 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0715, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_40_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe170 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0170] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0x93aac82d ! 265: FMOVGE fmovs %fcc1, %f13, %f9 .word 0xd63fe160 ! 266: STD_I std %r11, [%r31 + 0x0160] splash_hpstate_40_230: .word 0x16800001 ! 1: BGE bge .word 0x81983d4f ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x1d4f, %hpstate memptr_40_231: set user_data_start, %r31 .word 0x858431ac ! 268: WRCCR_I wr %r16, 0x11ac, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_232) , 16, 16)) -> intp(2,0,18,*,912,*,55,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_232)&0xffffffff) , 16, 16)) -> intp(5,0,31,*,912,*,55,1) #else set 0xf570ad31, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_40_232: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802246 ! 269: SIR sir 0x0246 pmu_40_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffac, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_40_234: nop nop ta T_CHANGE_HPRIV set 0x6cc3c4aa, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_235), 16, 16)) -> intp(mask2tid(0x40),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1008,*,*,1) xir_40_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_235: and %g1, 2, %g1 brnz,a %g1, xirwait_40_235 ldx [%r17], %g1 xir_40_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84eebf ! 273: WR_CLEAR_SOFTINT_I wr %r19, 0x0ebf, %clear_softint .word 0xe31fe060 ! 274: LDDF_I ldd [%r31, 0x0060], %f17 .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xc19fdc40 ! 276: LDDFA_R ldda [%r31, %r0], %f0 .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_40_240: nop nop ta T_CHANGE_HPRIV set 0x1f8d5dad, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0xd905f8e, %r28 !TTID : 7 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_241: .word 0xa9b304d0 ! 279: FCMPNE32 fcmpne32 %d12, %d16, %r20 mondo_40_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r2, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d930012 ! 280: WRPR_WSTATE_R wrpr %r12, %r18, %wstate dvapa_40_243: nop nop ta T_CHANGE_HPRIV mov 0xc5d, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9702c2b ! 281: POPC_I popc 0x0c2b, %r20 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_40 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_244: wrhpr %g0, 10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c2c0 ! 282: CASA_I casa [%r31] 0x16, %r0, %r20 .word 0xe81fe180 ! 283: LDD_I ldd [%r31 + 0x0180], %r20 .word 0xe8bfd100 ! 284: STDA_R stda %r20, [%r31 + %r0] 0x88 br_longdelay4_40_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902005 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_248: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_248) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,648,*,*,1)') ifelse(1,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_248: wrhpr %g0, 0x502, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 286: RDPC rd %pc, %r8 memptr_40_249: set user_data_start, %r31 .word 0x858068d8 ! 287: WRCCR_I wr %r1, 0x08d8, %ccr .word 0x91950012 ! 288: WRPR_PIL_R wrpr %r20, %r18, %pil mondo_40_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d948014 ! 289: WRPR_WSTATE_R wrpr %r18, %r20, %wstate cancelint_40_252: rdhpr %halt, %r16 .word 0x85880000 ! 290: ALLCLEAN jmptr_40_253: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_40_254: rdhpr %halt, %r18 .word 0x85880000 ! 292: ALLCLEAN frzptr_40_255: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 293: BN bn,a .word 0x91a289a8 ! 294: FDIVs fdivs %f10, %f8, %f8 frzptr_40_257: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 295: BN bn,a br_badelay1_40_258: .word 0x2aca4001 ! 1: BRNZ brnz,a,pt %r9, .word 0xd937e190 ! 1: STQF_I - %f12, [0x0190, %r31] .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, normalw .word 0xa5458000 ! 296: RD_SOFTINT_REG rd %softint, %r18 ibp_40_259: nop nop .word 0x91703659 ! 297: POPC_I popc 0x1659, %r8 .word 0x91948011 ! 298: WRPR_PIL_R wrpr %r18, %r17, %pil brcommon2_40_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe1c0 ! 1: PREFETCH_I prefetch [%r31 + 0x01c0], #24 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 299: BN bn,a splash_lsu_40_262: nop nop ta T_CHANGE_HPRIV set 0x1e6c8ea1, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x26800001 ! 1: BL bl,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 300: FBPULE fbule pmu_40_263: nop nop setx 0xffffffbbffffffad, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_40_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_264)+8 , 16, 16)) -> intp(0,0,18,*,960,*,73,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_264)&0xffffffff)+8 , 16, 16)) -> intp(7,0,13,*,952,*,73,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_40_265: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_266), 16, 16)) -> intp(mask2tid(0x40),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,712,*,*,1) xir_40_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_266: and %g1, 2, %g1 brnz,a %g1, xirwait_40_266 ldx [%r17], %g1 xir_40_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853cce ! 304: WR_CLEAR_SOFTINT_I wr %r20, 0x1cce, %clear_softint nop nop set 0x11a05bb6, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_267: .word 0x95a289d4 ! 305: FDIVd fdivd %f10, %f20, %f10 mondo_40_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r7, [%r0+0x3d0] %asi stxa %r2, [%r0+0x3d0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d928012 ! 306: WRPR_WSTATE_R wrpr %r10, %r18, %wstate nop nop set 0x9ec01cf5, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_269: .word 0x9f802c6c ! 307: SIR sir 0x0c6c ibp_40_270: nop nop .word 0xc19fdb20 ! 308: LDDFA_R ldda [%r31, %r0], %f0 frzptr_40_271: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702070 ! 1: POPC_I popc 0x0070, %r12 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 309: BN bn,a .word 0xd927e154 ! 310: STF_I st %f12, [0x0154, %r31] change_to_randtl_40_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_40_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_40_273: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fe180 ! 313: LDDFA_I ldda [%r31, 0x0180], %f16 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_274: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_274) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') ifelse(2,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_274: wrhpr %g0, 0x652, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 314: RDPC rd %pc, %r16 memptr_40_275: set 0x60740000, %r31 .word 0x8584ab7b ! 315: WRCCR_I wr %r18, 0x0b7b, %ccr cancelint_40_276: rdhpr %halt, %r8 .word 0x85880000 ! 316: ALLCLEAN frzptr_40_277: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdb40 ! 317: STDFA_R stda %f0, [%r0, %r31] br_badelay1_40_278: .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 normalw .word 0xa3458000 ! 318: RD_SOFTINT_REG rd %softint, %r17 nop nop mov 0x1, %r18 splash_cmpr_40_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_279)+8 , 16, 16)) -> intp(5,0,1,*,1000,*,e8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_279)&0xffffffff)+8 , 16, 16)) -> intp(3,0,0,*,688,*,e8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 319: SIAM siam 1 mondo_40_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94400a ! 320: WRPR_WSTATE_R wrpr %r17, %r10, %wstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_40 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_281: wrhpr %g0, 0x451, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7dc40 ! 321: CASA_I casa [%r31] 0xe2, %r0, %r19 frzptr_40_282: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa7a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f50 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800002 ! 322: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_283)+8 , 16, 16)) -> intp(6,0,21,*,720,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_283)&0xffffffff)+8 , 16, 16)) -> intp(4,0,15,*,760,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f17 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f17, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_284: wrhpr %g0, 0x61b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c180 ! 324: CASA_I casa [%r31] 0x c, %r0, %r19 .word 0xe6bfd000 ! 325: STDA_R stda %r19, [%r31 + %r0] 0x80 .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_40_287: set user_data_start, %o7 .word 0x93902002 ! 327: WRPR_CWP_I wrpr %r0, 0x0002, %cwp .word 0x9f802bdc ! 328: SIR sir 0x0bdc memptr_40_288: set user_data_start, %r31 .word 0x8581378c ! 329: WRCCR_I wr %r4, 0x178c, %ccr nop nop set 0x347072e8, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_289: .word 0x91a109d1 ! 330: FDIVd fdivd %f4, %f48, %f8 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_40 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_290: wrhpr %g0, 0x451, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d140 ! 331: CASA_I casa [%r31] 0x8a, %r0, %r13 brcommon1_40_291: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c720 ! 1: CASA_I casa [%r31] 0x39, %r0, %r13 ba,a .+8 jmpl %r27-4, %r27 .word 0x95b447c8 ! 332: PDIST pdistn %d48, %d8, %d10 dvapa_40_292: nop nop ta T_CHANGE_HPRIV mov 0xf86, %r20 mov 0xb, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xa0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fda60 ! 333: LDDA_R ldda [%r31, %r0] 0xd3, %r0 .word 0xd2bfd140 ! 334: STDA_R stda %r9, [%r31 + %r0] 0x8a nop nop ta T_CHANGE_HPRIV ! macro donret_40_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_294-donret_40_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00488600 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xad5, %htstate best_set_reg(0x671, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) retry donretarg_40_294: .word 0x81983cd7 ! 335: WRHPR_HPSTATE_I wrhpr %r0, 0x1cd7, %hpstate splash_tba_40_295: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x1, %r18 splash_cmpr_40_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_296)+8 , 16, 16)) -> intp(7,0,24,*,968,*,41,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_296)&0xffffffff)+8 , 16, 16)) -> intp(2,0,14,*,672,*,41,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_40_297: nop nop ta T_CHANGE_HPRIV set 0x51567adf, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x05400001 ! 1: FBPLG fblg stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 338: FBPULE fbule,a,pn %fcc0, .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_40_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d902e33 ! 340: WRPR_PSTATE_I wrpr %r0, 0x0e33, %pstate ibp_40_300: nop nop .word 0x20800001 ! 341: BN bn,a .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_40_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_301-donret_40_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00a0b100 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x6ef, %htstate wrhpr %g0, 0x4c8, %hpstate ! rand=1 (40) done donretarg_40_301: .word 0x1d400002 ! 343: FBPULE fbule .word 0x9f803094 ! 344: SIR sir 0x1094 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_40_303: ta T_CHANGE_NONHPRIV ! macro .word 0x9f80297d ! 346: SIR sir 0x097d nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_304)+8 , 16, 16)) -> intp(2,0,11,*,680,*,44,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_304)&0xffffffff)+8 , 16, 16)) -> intp(4,0,13,*,664,*,44,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198289b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x089b, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_40_305: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe1f0 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x01f0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 348: BN bn,a mondo_40_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3d8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d940002 ! 349: WRPR_WSTATE_R wrpr %r16, %r2, %wstate intveclr_40_307: nop nop ta T_CHANGE_HPRIV setx 0x31888a34199c4474, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x1c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 350: FBPLG fblg .word 0x91930013 ! 351: WRPR_PIL_R wrpr %r12, %r19, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_309), 16, 16)) -> intp(mask2tid(0x40),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,664,*,*,1) xir_40_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_309: and %g1, 2, %g1 brnz,a %g1, xirwait_40_309 ldx [%r17], %g1 xir_40_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e107 ! 352: WR_CLEAR_SOFTINT_I wr %r3, 0x0107, %clear_softint splash_tba_40_310: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_40_311: rdhpr %halt, %r16 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_40_312: nop nop ta T_CHANGE_HPRIV set 0x0c8bb6fe, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2ec88001 ! 1: BRGEZ brgez,a,pt %r2, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_40_313: rdhpr %halt, %r16 .word 0x85880000 ! 356: ALLCLEAN jmptr_40_314: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x87902263 ! 358: WRPR_TT_I wrpr %r0, 0x0263, %tt splash_tba_40_315: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_316), 16, 16)) -> intp(mask2tid(0x40),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,720,*,*,1) xir_40_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_316: and %g1, 2, %g1 brnz,a %g1, xirwait_40_316 ldx [%r17], %g1 xir_40_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab85307b ! 360: WR_CLEAR_SOFTINT_I wr %r20, 0x107b, %clear_softint .word 0x28800001 ! 1: BLEU bleu,a .word 0x8d9029d7 ! 361: WRPR_PSTATE_I wrpr %r0, 0x09d7, %pstate .word 0xc0bfda00 ! 362: STDA_R stda %r0, [%r31 + %r0] 0xd0 .word 0x9f802018 ! 363: SIR sir 0x0018 mondo_40_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3d8] %asi stxa %r19, [%r0+0x3d8] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d90c010 ! 364: WRPR_WSTATE_R wrpr %r3, %r16, %wstate .word 0xe83fe0c0 ! 365: STD_I std %r20, [%r31 + 0x00c0] ibp_40_321: nop nop wrhpr %g0, 0x393, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe1c0 ! 366: PREFETCHA_I prefetcha [%r31, + 0x01c0] %asi, #24 .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_40_322: nop nop ta T_CHANGE_HPRIV setx 0xd54c2ea001504354, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_40_323: nop nop wrhpr %g0, 0xa10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 370: BN bn,a memptr_40_324: set user_data_start, %r31 .word 0x8582efcf ! 371: WRCCR_I wr %r11, 0x0fcf, %ccr .word 0xe8bfc540 ! 372: STDA_R stda %r20, [%r31 + %r0] 0x2a ibp_40_326: nop nop wrhpr %g0, 0x7da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe897d000 ! 373: LDUHA_R lduha [%r31, %r0] 0x80, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_327), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) xir_40_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_327: and %g1, 2, %g1 brnz,a %g1, xirwait_40_327 ldx [%r17], %g1 xir_40_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a325 ! 374: WR_CLEAR_SOFTINT_I wr %r18, 0x0325, %clear_softint br_badelay2_40_328: .word 0xa1a2c9cd ! 1: FDIVd fdivd %f42, %f44, %f16 pdist %f8, %f8, %f2 .word 0xa5b18314 ! 375: ALIGNADDRESS alignaddr %r6, %r20, %r18 mondo_40_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3d8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c00a ! 376: WRPR_WSTATE_R wrpr %r19, %r10, %wstate splash_tba_40_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_40_331: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffa8, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_40_332: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_40_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d950001 ! 380: WRPR_WSTATE_R wrpr %r20, %r1, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_334)+8 , 16, 16)) -> intp(1,0,4,*,736,*,ef,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_334)&0xffffffff)+8 , 16, 16)) -> intp(7,0,0,*,1016,*,ef,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982f1f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f1f, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_40_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_335)+8 , 16, 16)) -> intp(7,0,27,*,912,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_335)&0xffffffff)+8 , 16, 16)) -> intp(7,0,5,*,952,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_40_336: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0x7a3088ae, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_337: .word 0x19400001 ! 384: FBPUGE fbuge brcommon3_40_338: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7d000 ! 1: CASA_I casa [%r31] 0x80, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0xd23fe100 ! 385: STD_I std %r9, [%r31 + 0x0100] demap_40_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 wrhpr %g0, 0x8c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe1c0 ! 386: LDD_I ldd [%r31 + 0x01c0], %r9 .word 0xd21fe1e0 ! 387: LDD_I ldd [%r31 + 0x01e0], %r9 fpinit_40_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009c4 ! 388: FDIVd fdivd %f0, %f4, %f6 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_342) , 16, 16)) -> intp(5,0,30,*,656,*,45,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_342)&0xffffffff) , 16, 16)) -> intp(5,0,7,*,992,*,45,1) #else set 0x6c30224d, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_342: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa9a109d0 ! 389: FDIVd fdivd %f4, %f16, %f20 brcommon2_40_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfc2c0 ! 390: STDFA_R stda %f16, [%r0, %r31] .word 0xe19fdb40 ! 391: LDDFA_R ldda [%r31, %r0], %f16 splash_lsu_40_344: nop nop ta T_CHANGE_HPRIV set 0xa1bfe66d, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_345)+8 , 16, 16)) -> intp(4,0,6,*,944,*,cb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_345)&0xffffffff)+8 , 16, 16)) -> intp(4,0,11,*,896,*,cb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819825d5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x05d5, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xc1bfda00 ! 394: STDFA_R stda %f0, [%r0, %r31] cancelint_40_347: rdhpr %halt, %r18 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_40 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_348: wrhpr %g0, 0x483, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c280 ! 396: CASA_I casa [%r31] 0x14, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_40_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_349-donret_40_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d24100 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 31, %htstate wrhpr %g0, 0xd82, %hpstate ! rand=1 (40) .word 0x13400001 ! 1: FBPE fbe ldx [%r11+%r0], %g1 done donretarg_40_349: .word 0xa1a209d4 ! 397: FDIVd fdivd %f8, %f20, %f16 splash_tba_40_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_40_351: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe0b0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00b0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdb20 ! 399: LDDFA_R ldda [%r31, %r0], %f16 .word 0xd28008a0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 cwp_40_352: set user_data_start, %o7 .word 0x93902007 ! 401: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_40_354: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffa7, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_355), 16, 16)) -> intp(mask2tid(0x40),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,720,*,*,1) xir_40_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_355: and %g1, 2, %g1 brnz,a %g1, xirwait_40_355 ldx [%r17], %g1 xir_40_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8528ce ! 404: WR_CLEAR_SOFTINT_I wr %r20, 0x08ce, %clear_softint brcommon3_40_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 405: BN bn,a frzptr_40_357: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_358) , 16, 16)) -> intp(4,0,22,*,912,*,e2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_358)&0xffffffff) , 16, 16)) -> intp(4,0,29,*,704,*,e2,1) #else set 0x7f302052, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x93b204d4 ! 1: FCMPNE32 fcmpne32 %d8, %d20, %r9 intvec_40_358: .word 0x19400001 ! 407: FBPUGE fbuge .word 0xe19fda00 ! 408: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_40_359: nop nop .word 0x20800001 ! 410: BN bn,a brcommon3_40_360: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe1d0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01d0] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983591 ! 411: WRHPR_HPSTATE_I wrhpr %r0, 0x1591, %hpstate .word 0x87902226 ! 412: WRPR_TT_I wrpr %r0, 0x0226, %tt frzptr_40_361: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 413: BN bn,a splash_tba_40_362: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_40_363: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_40_364: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983105 ! 416: WRHPR_HPSTATE_I wrhpr %r0, 0x1105, %hpstate br_badelay3_40_365: .word 0x34800002 ! 1: BG bg,a .word 0x22800001 ! 1: BE be,a .word 0xd5110003 ! 1: LDQF_R - [%r4, %r3], %f10 .word 0x97a4c830 ! 417: FADDs fadds %f19, %f16, %f11 intveclr_40_366: nop nop ta T_CHANGE_HPRIV setx 0x56cc60a0a8752e97, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_40_367: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_40_368: nop nop ta T_CHANGE_HPRIV setx 0x3c2de943632cbd8e, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 420: FBPLG fblg .word 0x91940010 ! 421: WRPR_PIL_R wrpr %r16, %r16, %pil splash_hpstate_40_370: .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, .word 0x81983ed5 ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x1ed5, %hpstate cancelint_40_371: rdhpr %halt, %r11 .word 0x85880000 ! 423: ALLCLEAN mondo_40_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c8] %asi stxa %r20, [%r0+0x3d8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d90c013 ! 424: WRPR_WSTATE_R wrpr %r3, %r19, %wstate .word 0xe6bfdf00 ! 425: STDA_R stda %r19, [%r31 + %r0] 0xf8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_374), 16, 16)) -> intp(mask2tid(0x40),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) xir_40_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_374: and %g1, 2, %g1 brnz,a %g1, xirwait_40_374 ldx [%r17], %g1 xir_40_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81e44f ! 426: WR_CLEAR_SOFTINT_I wr %r7, 0x044f, %clear_softint ibp_40_375: nop nop .word 0xa1b44488 ! 427: FCMPLE32 fcmple32 %d48, %d8, %r16 .word 0xe1bfe040 ! 428: STDFA_I stda %f16, [0x0040, %r31] nop nop mov 0x1, %r18 splash_cmpr_40_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_376)+8 , 16, 16)) -> intp(1,0,0,*,968,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_376)&0xffffffff)+8 , 16, 16)) -> intp(5,0,7,*,952,*,5d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_377), 16, 16)) -> intp(mask2tid(0x40),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,696,*,*,1) xir_40_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_377: and %g1, 2, %g1 brnz,a %g1, xirwait_40_377 ldx [%r17], %g1 xir_40_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833527 ! 430: WR_CLEAR_SOFTINT_I wr %r12, 0x1527, %clear_softint cancelint_40_378: rdhpr %halt, %r16 .word 0x85880000 ! 431: ALLCLEAN splash_tba_40_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_40_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_40_381: rdhpr %halt, %r18 .word 0x85880000 ! 434: ALLCLEAN memptr_40_382: set 0x60340000, %r31 .word 0x858537f4 ! 435: WRCCR_I wr %r20, 0x17f4, %ccr .word 0x9f802f71 ! 436: SIR sir 0x0f71 .word 0xd037e1e7 ! 437: STH_I sth %r8, [%r31 + 0x01e7] .word 0xd11fe170 ! 438: LDDF_I ldd [%r31, 0x0170], %f8 .word 0xc1bfda00 ! 439: STDFA_R stda %f0, [%r0, %r31] ibp_40_385: nop nop .word 0x99a189aa ! 440: FDIVs fdivs %f6, %f10, %f12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_386), 16, 16)) -> intp(mask2tid(0x40),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) xir_40_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_386: and %g1, 2, %g1 brnz,a %g1, xirwait_40_386 ldx [%r17], %g1 xir_40_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8165f7 ! 441: WR_CLEAR_SOFTINT_I wr %r5, 0x05f7, %clear_softint intveclr_40_387: nop nop ta T_CHANGE_HPRIV setx 0x919f922f3395718e, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 442: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_388: wrhpr %g0, 0xed1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c400 ! 443: CASA_I casa [%r31] 0x20, %r0, %r13 frzptr_40_389: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdd40 ! 444: STDFA_R stda %f16, [%r0, %r31] intveclr_40_390: nop nop ta T_CHANGE_HPRIV setx 0xb5bb0a16f377ebce, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xb19, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 445: FBPLG fblg,a,pn %fcc0, .word 0x95a449b1 ! 446: FDIVs fdivs %f17, %f17, %f10 br_badelay1_40_392: .word 0x93b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r9 .word 0xd734000c ! 1: STQF_R - %f11, [%r12, %r16] .word 0x17400001 ! 1: FBPGE fbge normalw .word 0x91458000 ! 447: RD_SOFTINT_REG rd %softint, %r8 ibp_40_393: nop nop .word 0x87ad0a46 ! 448: FCMPd fcmpd %fcc, %f20, %f6 jmptr_40_394: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe11fe0a0 ! 450: LDDF_I ldd [%r31, 0x00a0], %f16 memptr_40_396: set user_data_start, %r31 .word 0x8584684b ! 451: WRCCR_I wr %r17, 0x084b, %ccr cancelint_40_397: rdhpr %halt, %r13 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_40_398: nop nop ta T_CHANGE_HPRIV set 0x10f52326, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 453: FBPULE fbule,a,pn %fcc0, brcommon2_40_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f802070 ! 1: SIR sir 0x0070 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 454: BN bn,a .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_40_400: ta T_CHANGE_NONHPRIV ! macro frzptr_40_401: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 456: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_402), 16, 16)) -> intp(mask2tid(0x40),1,3,*,736,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,704,*,*,1) xir_40_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_402: and %g1, 2, %g1 brnz,a %g1, xirwait_40_402 ldx [%r17], %g1 xir_40_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82e0dd ! 457: WR_CLEAR_SOFTINT_I wr %r11, 0x00dd, %clear_softint brcommon3_40_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e070 ! 1: STQF_I - %f10, [0x0070, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0xa1aac831 ! 458: FMOVGE fmovs %fcc1, %f17, %f16 splash_tba_40_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_40_406: .word 0x12800001 ! 1: BNE bne .word 0xfd4f8dc5 ! Random illegal ? .word 0xa3a509d2 ! 1: FDIVd fdivd %f20, %f18, %f48 .word 0x91a4c82b ! 461: FADDs fadds %f19, %f11, %f8 .word 0x9f803934 ! 462: SIR sir 0x1934 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_407)+8 , 16, 16)) -> intp(3,0,18,*,896,*,73,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_407)&0xffffffff)+8 , 16, 16)) -> intp(3,0,22,*,752,*,73,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e4c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4c, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_40_408: set user_data_start, %o7 .word 0x93902006 ! 464: WRPR_CWP_I wrpr %r0, 0x0006, %cwp cancelint_40_409: rdhpr %halt, %r18 .word 0x85880000 ! 465: ALLCLEAN splash_tba_40_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe88008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 pmu_40_411: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffae, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_40_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_40_413: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe0c0 ! 1: STXFSR_I st-sfr %f1, [0x00c0, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fda60 ! 471: LDDFA_R ldda [%r31, %r0], %f0 mondo_40_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3d8] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d90c012 ! 472: WRPR_WSTATE_R wrpr %r3, %r18, %wstate mondo_40_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d90400a ! 473: WRPR_WSTATE_R wrpr %r1, %r10, %wstate .word 0x9ba449d0 ! 474: FDIVd fdivd %f48, %f16, %f44 mondo_40_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3d0] %asi stxa %r8, [%r0+0x3c8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d91c009 ! 475: WRPR_WSTATE_R wrpr %r7, %r9, %wstate cancelint_40_418: rdhpr %halt, %r13 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_419), 16, 16)) -> intp(mask2tid(0x40),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,736,*,*,1) xir_40_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_419: and %g1, 2, %g1 brnz,a %g1, xirwait_40_419 ldx [%r17], %g1 xir_40_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8375dd ! 477: WR_CLEAR_SOFTINT_I wr %r13, 0x15dd, %clear_softint jmptr_40_420: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_421: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_421) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,968,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_421: wrhpr %g0, 0xb43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 479: RDPC rd %pc, %r20 fpinit_40_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91b00484 ! 480: FCMPLE32 fcmple32 %d0, %d4, %r8 .word 0xf1efe1c0 ! 481: PREFETCHA_I prefetcha [%r31, + 0x01c0] %asi, #24 splash_tba_40_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_40_425: nop nop setx 0xffffffbcffffffac, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe1b8 ! 484: STDA_I stda %r17, [%r31 + 0x01b8] %asi splash_lsu_40_426: nop nop ta T_CHANGE_HPRIV set 0x0ac29aaf, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 485: FBPULE fbule .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e120 ! 487: STQF_I - %f17, [0x0120, %r31] frzptr_40_428: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe26fe1d0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x01d0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdf20 ! 488: LDDFA_R ldda [%r31, %r0], %f16 brcommon3_40_429: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e000 ! 1: STQF_I - %f17, [0x0000, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 489: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_430: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_430) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,928,*,*,1)') ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_430: wrhpr %g0, 0xe11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 490: RDPC rd %pc, %r20 .word 0xa9a00160 ! 491: FABSq dis not found .word 0x9f8021c0 ! 492: SIR sir 0x01c0 nop nop mov 0x1, %r18 splash_cmpr_40_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_433)+8 , 16, 16)) -> intp(7,0,3,*,728,*,73,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_433)&0xffffffff)+8 , 16, 16)) -> intp(3,0,20,*,640,*,73,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_434) , 16, 16)) -> intp(2,0,14,*,904,*,6a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_434)&0xffffffff) , 16, 16)) -> intp(3,0,29,*,688,*,6a,1) #else set 0x1970e35a, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_434: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8027db ! 494: SIR sir 0x07db .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_40_436: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_437: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_437) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,720,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_437: wrhpr %g0, 0xb0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 497: RDPC rd %pc, %r9 splash_tba_40_438: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_40_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d948010 ! 499: WRPR_WSTATE_R wrpr %r18, %r16, %wstate brcommon2_40_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f802060 ! 1: SIR sir 0x0060 ba,a .+8 jmpl %r27-0, %r27 .word 0xc1bfdc40 ! 500: STDFA_R stda %f0, [%r0, %r31] .word 0x9190c006 ! 501: WRPR_PIL_R wrpr %r3, %r6, %pil ibp_40_442: nop nop .word 0x9f802060 ! 502: SIR sir 0x0060 cwp_40_443: set user_data_start, %o7 .word 0x93902007 ! 503: WRPR_CWP_I wrpr %r0, 0x0007, %cwp cancelint_40_444: rdhpr %halt, %r20 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e14c ! 505: STF_I st %f9, [0x014c, %r31] brcommon3_40_445: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe0e0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00e0] ba,a .+8 jmpl %r27+0, %r27 .word 0x81982edd ! 506: WRHPR_HPSTATE_I wrhpr %r0, 0x0edd, %hpstate splash_tba_40_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x6e60a802, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_447: .word 0x19400001 ! 508: FBPUGE fbuge intveclr_40_448: nop nop ta T_CHANGE_HPRIV setx 0xce4f79c9ad8aed05, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x20b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 509: FBPLG fblg,a,pn %fcc0, memptr_40_449: set 0x60740000, %r31 .word 0x8584e213 ! 510: WRCCR_I wr %r19, 0x0213, %ccr nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_40 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_450: wrhpr %g0, 0x41a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c380 ! 511: CASA_I casa [%r31] 0x1c, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_451: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_451) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,736,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_451: wrhpr %g0, 0x610, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 512: RDPC rd %pc, %r18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_452) , 16, 16)) -> intp(0,0,5,*,760,*,df,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_452)&0xffffffff) , 16, 16)) -> intp(7,0,18,*,1016,*,df,1) #else set 0x6fa0f1b7, %r28 !TTID : 1 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_452: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 513: FBPUGE fbuge,a,pn %fcc0, nop nop set 0x15206852, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93b4c4c8 ! 1: FCMPNE32 fcmpne32 %d50, %d8, %r9 intvec_40_453: .word 0x9f802042 ! 514: SIR sir 0x0042 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_454)+8 , 16, 16)) -> intp(7,0,12,*,1008,*,47,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_454)&0xffffffff)+8 , 16, 16)) -> intp(4,0,29,*,656,*,47,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982fcf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0fcf, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_40_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e8] %asi stxa %r18, [%r0+0x3e0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d908010 ! 516: WRPR_WSTATE_R wrpr %r2, %r16, %wstate pmu_40_456: nop nop setx 0xffffffbbffffffab, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_40_457: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e140 ! 1: STQF_I - %f9, [0x0140, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd29fc2e0 ! 518: LDDA_R ldda [%r31, %r0] 0x17, %r9 pmu_40_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb2ffffffae, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xfaa012dd, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_459: .word 0xa9a509d4 ! 520: FDIVd fdivd %f20, %f20, %f20 .word 0xd63fe120 ! 521: STD_I std %r11, [%r31 + 0x0120] .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_40_461: ta T_CHANGE_NONHPRIV ! macro .word 0xa1b0c482 ! 523: FCMPLE32 fcmple32 %d34, %d2, %r16 nop nop mov 0x1, %r18 splash_cmpr_40_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_463)+8 , 16, 16)) -> intp(7,0,17,*,1016,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_463)&0xffffffff)+8 , 16, 16)) -> intp(6,0,21,*,720,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 .word 0xe09fc2c0 ! 525: LDDA_R ldda [%r31, %r0] 0x16, %r16 br_longdelay3_40_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x81982342 ! 526: WRHPR_HPSTATE_I wrhpr %r0, 0x0342, %hpstate frzptr_40_466: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 527: BN bn,a .word 0xd11fe0f0 ! 528: LDDF_I ldd [%r31, 0x00f0], %f8 .word 0x8d90249d ! 529: WRPR_PSTATE_I wrpr %r0, 0x049d, %pstate .word 0x2c800001 ! 1: BNEG bneg,a .word 0x8d902355 ! 530: WRPR_PSTATE_I wrpr %r0, 0x0355, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x3a800001 ! 1: BCC bcc,a .word 0x8d902e51 ! 532: WRPR_PSTATE_I wrpr %r0, 0x0e51, %pstate brcommon3_40_471: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e130 ! 1: STQF_I - %f8, [0x0130, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd09fc400 ! 533: LDDA_R ldda [%r31, %r0] 0x20, %r8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_472) , 16, 16)) -> intp(6,0,23,*,640,*,55,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_472)&0xffffffff) , 16, 16)) -> intp(4,0,20,*,752,*,55,1) #else set 0x7ec02340, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_472: .word 0x99b0c4c9 ! 534: FCMPNE32 fcmpne32 %d34, %d40, %r12 .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe6dfd060 ! 536: LDXA_R ldxa [%r31, %r0] 0x83, %r19 jmptr_40_474: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_40_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_475-donret_40_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00a00b00 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x12f2, %htstate best_set_reg(0x11a8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) done .align 2048 donretarg_40_475: .word 0x8d90248f ! 538: WRPR_PSTATE_I wrpr %r0, 0x048f, %pstate trapasi_40_476: nop mov 0x3f8, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_477), 16, 16)) -> intp(mask2tid(0x40),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,912,*,*,1) xir_40_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_477: and %g1, 2, %g1 brnz,a %g1, xirwait_40_477 ldx [%r17], %g1 xir_40_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab85330b ! 540: WR_CLEAR_SOFTINT_I wr %r20, 0x130b, %clear_softint .word 0x0e800001 ! 1: BVS bvs .word 0x8d9038b4 ! 541: WRPR_PSTATE_I wrpr %r0, 0x18b4, %pstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_479: wrhpr %g0, 0x718, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d000 ! 542: CASA_I casa [%r31] 0x80, %r0, %r19 mondo_40_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3e0] %asi stxa %r1, [%r0+0x3c8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d940011 ! 543: WRPR_WSTATE_R wrpr %r16, %r17, %wstate .word 0xa1520000 ! 544: RDPR_PIL rdpr %pil, %r16 .word 0xe13fe1d0 ! 545: STDF_I std %f16, [0x01d0, %r31] .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_40_482: ta T_CHANGE_NONPRIV ! macro cancelint_40_483: rdhpr %halt, %r9 .word 0x85880000 ! 547: ALLCLEAN splash_tba_40_484: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_40_485: nop nop ta T_CHANGE_HPRIV mov 0x98b, %r20 mov 0x19, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xb89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdf00 ! 549: LDDA_R ldda [%r31, %r0] 0xf8, %r16 .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_40_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0x4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe1e8 ! 552: LDD_I ldd [%r31 + 0x01e8], %r19 mondo_40_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3c8] %asi stxa %r18, [%r0+0x3c8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d92c014 ! 553: WRPR_WSTATE_R wrpr %r11, %r20, %wstate .word 0x9f8026d4 ! 554: SIR sir 0x06d4 .word 0xe0bfdf20 ! 555: STDA_R stda %r16, [%r31 + %r0] 0xf9 memptr_40_491: set 0x60340000, %r31 .word 0x8580b997 ! 556: WRCCR_I wr %r2, 0x1997, %ccr nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_492: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_492) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,752,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_492: wrhpr %g0, 0xb58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 557: RDPC rd %pc, %r18 ibp_40_493: nop nop wrhpr %g0, 0xed9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe93fe030 ! 558: STDF_I std %f20, [0x0030, %r31] .word 0x28800001 ! 559: BLEU bleu,a .word 0xe19fdb40 ! 560: LDDFA_R ldda [%r31, %r0], %f16 ibp_40_495: nop nop wrhpr %g0, 0xda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfda60 ! 561: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_496) , 16, 16)) -> intp(1,0,7,*,992,*,e7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_496)&0xffffffff) , 16, 16)) -> intp(3,0,28,*,704,*,e7,1) #else set 0x6d602589, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_496: .word 0x39400001 ! 562: FBPUGE fbuge,a,pn %fcc0, frzptr_40_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x95b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r10 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdf00 ! 563: LDDFA_R ldda [%r31, %r0], %f0 memptr_40_498: set user_data_start, %r31 .word 0x8581b5fc ! 564: WRCCR_I wr %r6, 0x15fc, %ccr .word 0x87a90a44 ! 565: FCMPd fcmpd %fcc, %f4, %f4 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_500) , 16, 16)) -> intp(4,0,16,*,648,*,e4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_500)&0xffffffff) , 16, 16)) -> intp(0,0,5,*,744,*,e4,1) #else set 0x33a05bfb, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a4c9cd ! 1: FDIVd fdivd %f50, %f44, %f16 intvec_40_500: .word 0x19400002 ! 566: FBPUGE fbuge jmptr_40_501: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_502: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_502) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,904,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_502: wrhpr %g0, 0xcb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 568: RDPC rd %pc, %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_40_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_503-donret_40_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x004d3200 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xce, %htstate best_set_reg(0x1442, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) done donretarg_40_503: .word 0xa3a209d2 ! 569: FDIVd fdivd %f8, %f18, %f48 frzptr_40_504: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0x9f802726 ! 571: SIR sir 0x0726 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_505), 16, 16)) -> intp(mask2tid(0x40),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,920,*,*,1) xir_40_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_505: and %g1, 2, %g1 brnz,a %g1, xirwait_40_505 ldx [%r17], %g1 xir_40_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81e3c4 ! 572: WR_CLEAR_SOFTINT_I wr %r7, 0x03c4, %clear_softint frzptr_40_506: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fda00 ! 573: LDDFA_R ldda [%r31, %r0], %f16 cancelint_40_507: rdhpr %halt, %r18 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_508) , 16, 16)) -> intp(1,0,11,*,760,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_508)&0xffffffff) , 16, 16)) -> intp(1,0,12,*,696,*,53,1) #else set 0x78f0810f, %r28 !TTID : 1 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_508: .word 0xa5a0c9c2 ! 575: FDIVd fdivd %f34, %f2, %f18 cancelint_40_509: rdhpr %halt, %r17 .word 0x85880000 ! 576: ALLCLEAN .word 0x8d9026de ! 577: WRPR_PSTATE_I wrpr %r0, 0x06de, %pstate .word 0x879023c0 ! 578: WRPR_TT_I wrpr %r0, 0x03c0, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_511), 16, 16)) -> intp(mask2tid(0x40),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,640,*,*,1) xir_40_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_511: and %g1, 2, %g1 brnz,a %g1, xirwait_40_511 ldx [%r17], %g1 xir_40_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82308e ! 579: WR_CLEAR_SOFTINT_I wr %r8, 0x108e, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_512) , 16, 16)) -> intp(3,0,2,*,1000,*,ce,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_512)&0xffffffff) , 16, 16)) -> intp(6,0,7,*,912,*,ce,1) #else set 0x25b04685, %r28 !TTID : 6 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f802b95 ! 1: SIR sir 0x0b95 intvec_40_512: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 580: FBPUGE fbuge,a,pn %fcc0, brcommon3_40_513: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 581: BN bn,a .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_40_514: ta T_CHANGE_NONHPRIV ! macro .word 0xe69fc540 ! 583: LDDA_R ldda [%r31, %r0] 0x2a, %r19 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_40 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_516: wrhpr %g0, 0x211, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d100 ! 584: CASA_I casa [%r31] 0x88, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_517: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_517) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,648,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_517: wrhpr %g0, 0xa0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 585: RDPC rd %pc, %r11 cancelint_40_518: rdhpr %halt, %r13 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_519: wrhpr %g0, 0xb0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c3c0 ! 587: CASA_I casa [%r31] 0x1e, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_520: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_520) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,928,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_520: wrhpr %g0, 0xd2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 588: RDPC rd %pc, %r8 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d902562 ! 590: WRPR_PSTATE_I wrpr %r0, 0x0562, %pstate br_badelay2_40_523: .word 0x32800001 ! 1: BNE bne,a pdist %f20, %f10, %f0 .word 0xa7b0c311 ! 591: ALIGNADDRESS alignaddr %r3, %r17, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_524) , 16, 16)) -> intp(1,0,0,*,896,*,ed,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_524)&0xffffffff) , 16, 16)) -> intp(6,0,11,*,928,*,ed,1) #else set 0x82408b2c, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_524: .word 0x9f803722 ! 592: SIR sir 0x1722 nop nop mov 0x0, %r18 splash_cmpr_40_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 593: SIAM siam 1 memptr_40_526: set 0x60140000, %r31 .word 0x858437b4 ! 594: WRCCR_I wr %r16, 0x17b4, %ccr frzptr_40_527: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdc00 ! 595: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc30fc000 ! 596: LDXFSR_R ld-fsr [%r31, %r0], %f1 splash_hpstate_40_529: .word 0x06ca0001 ! 1: BRLZ brlz,pt %r8, .word 0x81982b15 ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x0b15, %hpstate .word 0xe527e17c ! 598: STF_I st %f18, [0x017c, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_530), 16, 16)) -> intp(mask2tid(0x40),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,728,*,*,1) xir_40_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_530: and %g1, 2, %g1 brnz,a %g1, xirwait_40_530 ldx [%r17], %g1 xir_40_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84aa3d ! 599: WR_CLEAR_SOFTINT_I wr %r18, 0x0a3d, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_40_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_531-donret_40_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b6a700 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x5c5, %htstate best_set_reg(0x12a3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) ldx [%r11+%r0], %g1 done donretarg_40_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_40_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983d8f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1d8f, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x2ba02810, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_533: .word 0x9f802734 ! 602: SIR sir 0x0734 splash_hpstate_40_534: .word 0x1e800001 ! 1: BVC bvc .word 0x819820d5 ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x00d5, %hpstate .word 0xa7a489c5 ! 604: FDIVd fdivd %f18, %f36, %f50 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_536), 16, 16)) -> intp(mask2tid(0x40),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,944,*,*,1) xir_40_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_536: and %g1, 2, %g1 brnz,a %g1, xirwait_40_536 ldx [%r17], %g1 xir_40_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84730f ! 605: WR_CLEAR_SOFTINT_I wr %r17, 0x130f, %clear_softint mondo_40_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3c8] %asi stxa %r18, [%r0+0x3c8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d914012 ! 606: WRPR_WSTATE_R wrpr %r5, %r18, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_538) , 16, 16)) -> intp(7,0,1,*,920,*,e5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_538)&0xffffffff) , 16, 16)) -> intp(6,0,6,*,760,*,e5,1) #else set 0xe3f0d709, %r28 !TTID : 7 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_538: .word 0x91a0c9c2 ! 607: FDIVd fdivd %f34, %f2, %f8 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_539: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_539) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,760,*,*,1)') ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_539: wrhpr %g0, 0x6d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 608: RDPC rd %pc, %r20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_540) , 16, 16)) -> intp(7,0,7,*,680,*,c0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_540)&0xffffffff) , 16, 16)) -> intp(4,0,19,*,752,*,c0,1) #else set 0x4c7061f0, %r28 !TTID : 1 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_540: .word 0x99a409c8 ! 609: FDIVd fdivd %f16, %f8, %f12 nop nop ta T_CHANGE_HPRIV ! macro donret_40_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_541-donret_40_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f0b600 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x161f, %htstate best_set_reg(0x16f1, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) done donretarg_40_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_40 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_542: wrhpr %g0, 0x65b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 611: CASA_I casa [%r31] 0xf8, %r0, %r8 ibp_40_543: nop nop wrhpr %g0, 0x300, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfde00 ! 612: STDFA_R stda %f16, [%r0, %r31] .word 0x8d9030bd ! 613: WRPR_PSTATE_I wrpr %r0, 0x10bd, %pstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_545: wrhpr %g0, 0x150, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 614: CASA_I casa [%r31] 0x8a, %r0, %r8 jmptr_40_546: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0x91703c60 ! 616: POPC_I popc 0x1c60, %r8 .word 0xe737e171 ! 617: STQF_I - %f19, [0x0171, %r31] .word 0x1a780001 ! 618: BPCC ibp_40_548: nop nop wrhpr %g0, 0xbca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800002 ! 619: BN bn .word 0x91a149b3 ! 620: FDIVs fdivs %f5, %f19, %f8 .word 0xdadfd060 ! 621: LDXA_R ldxa [%r31, %r0] 0x83, %r13 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_40 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_551: wrhpr %g0, 0x412, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c180 ! 622: CASA_I casa [%r31] 0x c, %r0, %r13 mondo_40_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3d8] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d948013 ! 623: WRPR_WSTATE_R wrpr %r18, %r19, %wstate intveclr_40_553: nop nop ta T_CHANGE_HPRIV setx 0xe1b623ad5edbb431, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 624: FBPLG fblg,a,pn %fcc0, splash_tba_40_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_40 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_555: wrhpr %g0, 0x858, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c720 ! 626: CASA_I casa [%r31] 0x39, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_556) , 16, 16)) -> intp(7,0,15,*,704,*,df,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_556)&0xffffffff) , 16, 16)) -> intp(4,0,30,*,752,*,df,1) #else set 0xf180eccb, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x95b104d3 ! 1: FCMPNE32 fcmpne32 %d4, %d50, %r10 intvec_40_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x99a4c9c9 ! 627: FDIVd fdivd %f50, %f40, %f12 mondo_40_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi stxa %r3, [%r0+0x3c0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d920003 ! 628: WRPR_WSTATE_R wrpr %r8, %r3, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0x9370b968, %r28 !TTID : 1 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_559: .word 0x9f802ce3 ! 630: SIR sir 0x0ce3 frzptr_40_560: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 631: BN bn,a splash_tba_40_561: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_40_562: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_563: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_563) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,752,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_563: wrhpr %g0, 0xed0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 634: RDPC rd %pc, %r8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_564), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,896,*,*,1) xir_40_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_564: and %g1, 2, %g1 brnz,a %g1, xirwait_40_564 ldx [%r17], %g1 xir_40_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82e981 ! 635: WR_CLEAR_SOFTINT_I wr %r11, 0x0981, %clear_softint ibp_40_565: nop nop wrhpr %g0, 0x8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe190 ! 636: LDD_I ldd [%r31 + 0x0190], %r19 .word 0x93b107d3 ! 637: PDIST pdistn %d4, %d50, %d40 splash_lsu_40_567: nop nop ta T_CHANGE_HPRIV set 0xe9a4900b, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_40_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfde20 ! 639: STDFA_R stda %f16, [%r0, %r31] nop nop set 0x5bd08880, %r28 !TTID : 0 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_569: .word 0x9f8030d5 ! 640: SIR sir 0x10d5 .word 0x91948012 ! 641: WRPR_PIL_R wrpr %r18, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_571: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_571) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,952,*,*,1)') ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_571: wrhpr %g0, 0x9d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 642: RDPC rd %pc, %r13 .word 0xd33fe0ab ! 643: STDF_I std %f9, [0x00ab, %r31] .word 0xc19fde20 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_572), 16, 16)) -> intp(mask2tid(0x40),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,904,*,*,1) xir_40_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_572: and %g1, 2, %g1 brnz,a %g1, xirwait_40_572 ldx [%r17], %g1 xir_40_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822fd8 ! 645: WR_CLEAR_SOFTINT_I wr %r8, 0x0fd8, %clear_softint .word 0xc19fde20 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x6a3005fb, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93a089d3 ! 1: FDIVd fdivd %f2, %f50, %f40 intvec_40_573: .word 0x9f802d10 ! 647: SIR sir 0x0d10 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_574), 16, 16)) -> intp(mask2tid(0x40),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,984,*,*,1) xir_40_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_574: and %g1, 2, %g1 brnz,a %g1, xirwait_40_574 ldx [%r17], %g1 xir_40_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8138f8 ! 648: WR_CLEAR_SOFTINT_I wr %r4, 0x18f8, %clear_softint ibp_40_575: nop nop wrhpr %g0, 0xc1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda3fe010 ! 649: STD_I std %r13, [%r31 + 0x0010] splash_tba_40_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_40_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi stxa %r6, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c002 ! 651: WRPR_WSTATE_R wrpr %r19, %r2, %wstate .word 0xdbe7c540 ! 652: CASA_I casa [%r31] 0x2a, %r0, %r13 splash_tba_40_579: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_40_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0x4d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe1f9 ! 654: LDD_I ldd [%r31 + 0x01f9], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_40_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d904006 ! 656: WRPR_WSTATE_R wrpr %r1, %r6, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_583), 16, 16)) -> intp(mask2tid(0x40),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,936,*,*,1) xir_40_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_583: and %g1, 2, %g1 brnz,a %g1, xirwait_40_583 ldx [%r17], %g1 xir_40_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a337 ! 657: WR_CLEAR_SOFTINT_I wr %r10, 0x0337, %clear_softint demap_40_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0x7c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe0b9 ! 658: LDD_I ldd [%r31 + 0x00b9], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] .word 0xa7b48323 ! 660: BMASK bmask %r18, %r3, %r19 dvapa_40_586: nop nop ta T_CHANGE_HPRIV mov 0xc36, %r20 mov 0xf, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x350, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdf20 ! 661: STDA_R stda %r16, [%r31 + %r0] 0xf9 frzptr_40_587: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 662: BN bn,a frzptr_40_588: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdc00 ! 663: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_589), 16, 16)) -> intp(mask2tid(0x40),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) xir_40_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_589: and %g1, 2, %g1 brnz,a %g1, xirwait_40_589 ldx [%r17], %g1 xir_40_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82ffa5 ! 664: WR_CLEAR_SOFTINT_I wr %r11, 0x1fa5, %clear_softint .word 0x91703a09 ! 665: POPC_I popc 0x1a09, %r8 .word 0xd8bfe0da ! 666: STDA_I stda %r12, [%r31 + 0x00da] %asi frzptr_40_590: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 667: BN bn,a mondo_40_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3c8] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d950014 ! 668: WRPR_WSTATE_R wrpr %r20, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_592: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_592) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,920,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_592: wrhpr %g0, 0x551, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 669: RDPC rd %pc, %r12 pmu_40_593: nop nop ta T_CHANGE_PRIV setx 0xffffffbaffffffad, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f803227 ! 671: SIR sir 0x1227 mondo_40_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3c8] %asi stxa %r12, [%r0+0x3d8] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d930006 ! 672: WRPR_WSTATE_R wrpr %r12, %r6, %wstate jmptr_40_595: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_40_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983ed7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ed7, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_597), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) xir_40_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_597: and %g1, 2, %g1 brnz,a %g1, xirwait_40_597 ldx [%r17], %g1 xir_40_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8476f0 ! 675: WR_CLEAR_SOFTINT_I wr %r17, 0x16f0, %clear_softint .word 0xe927e0c9 ! 676: STF_I st %f20, [0x00c9, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_598) , 16, 16)) -> intp(6,0,19,*,744,*,6e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_598)&0xffffffff) , 16, 16)) -> intp(5,0,12,*,944,*,6e,1) #else set 0xdde0ac17, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f80287e ! 1: SIR sir 0x087e intvec_40_598: .word 0x39400001 ! 677: FBPUGE fbuge,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_40 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_599: wrhpr %g0, 0x191, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c280 ! 678: CASA_I casa [%r31] 0x14, %r0, %r13 frzptr_40_600: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe070 ! 1: STXFSR_I st-sfr %f1, [0x0070, %r31] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 679: BN bn,a .word 0xa9b507c6 ! 680: PDIST pdistn %d20, %d6, %d20 nop nop mov 0x0, %r18 splash_cmpr_40_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 681: SIAM siam 1 demap_40_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0xac9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe1fa ! 682: LDD_I ldd [%r31 + 0x01fa], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_40_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_604-donret_40_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00303400 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x140e, %htstate wrhpr %g0, 0x3, %hpstate ! rand=1 (40) .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, retry donretarg_40_604: .word 0xd66fe12e ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x012e] .word 0xd6bfc240 ! 684: STDA_R stda %r11, [%r31 + %r0] 0x12 .word 0x9192400c ! 685: WRPR_PIL_R wrpr %r9, %r12, %pil nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_607: wrhpr %g0, 0x50b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7d140 ! 686: CASA_I casa [%r31] 0x8a, %r0, %r11 .word 0xa9b40581 ! 687: FCMPGT32 fcmpgt32 %d16, %d32, %r20 mondo_40_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d8] %asi stxa %r18, [%r0+0x3d8] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d92000a ! 688: WRPR_WSTATE_R wrpr %r8, %r10, %wstate cwp_40_609: set user_data_start, %o7 .word 0x93902001 ! 689: WRPR_CWP_I wrpr %r0, 0x0001, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d903623 ! 691: WRPR_PSTATE_I wrpr %r0, 0x1623, %pstate .word 0xc1bfe100 ! 692: STDFA_I stda %f0, [0x0100, %r31] .word 0x22cc0001 ! 1: BRZ brz,a,pt %r16, .word 0x8d902851 ! 693: WRPR_PSTATE_I wrpr %r0, 0x0851, %pstate nop nop mov 0x1, %r18 splash_cmpr_40_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_612)+8 , 16, 16)) -> intp(1,0,30,*,664,*,e1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_612)&0xffffffff)+8 , 16, 16)) -> intp(0,0,6,*,936,*,e1,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_40_613: .word 0x81982557 ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x0557, %hpstate .word 0x97703922 ! 696: POPC_I popc 0x1922, %r11 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_40 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_615: wrhpr %g0, 0x79b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c720 ! 697: CASA_I casa [%r31] 0x39, %r0, %r16 brcommon2_40_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe0b0 ! 1: PREFETCH_I prefetch [%r31 + 0x00b0], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0x00800001 ! 698: BN bn .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9b520000 ! 700: RDPR_PIL rdpr %pil, %r13 mondo_40_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d904014 ! 701: WRPR_WSTATE_R wrpr %r1, %r20, %wstate .word 0xd5e7c6c0 ! 702: CASA_I casa [%r31] 0x36, %r0, %r10 .word 0xd48008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 splash_lsu_40_619: nop nop ta T_CHANGE_HPRIV set 0x9d2d64ab, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0d400002 ! 1: FBPG fbg stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 704: FBPULE fbule intveclr_40_620: nop nop ta T_CHANGE_HPRIV setx 0xe4a5ead8a4db7b97, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_40_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_621-donret_40_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b08b00 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x705, %htstate wrhpr %g0, 0xf92, %hpstate ! rand=1 (40) .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, done donretarg_40_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_40_622: set user_data_start, %o7 .word 0x93902005 ! 707: WRPR_CWP_I wrpr %r0, 0x0005, %cwp .word 0xc1bfda00 ! 708: STDFA_R stda %f0, [%r0, %r31] frzptr_40_623: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 709: LDDFA_R ldda [%r31, %r0], %f16 intveclr_40_624: nop nop ta T_CHANGE_HPRIV setx 0x485aadeba919ace8, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x382, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 710: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_625: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_625) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,920,*,*,1)') ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_625: wrhpr %g0, 0xc4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 711: RDPC rd %pc, %r9 .word 0xe01fe0c0 ! 712: LDD_I ldd [%r31 + 0x00c0], %r16 splash_lsu_40_627: nop nop ta T_CHANGE_HPRIV set 0x76712cfe, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x1b400002 ! 1: FBPLE fble stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 713: FBPULE fbule mondo_40_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3c8] %asi stxa %r3, [%r0+0x3d0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d950003 ! 714: WRPR_WSTATE_R wrpr %r20, %r3, %wstate .word 0x8d903421 ! 715: WRPR_PSTATE_I wrpr %r0, 0x1421, %pstate .word 0x9f803bf0 ! 716: SIR sir 0x1bf0 .word 0xe11fe150 ! 717: LDDF_I ldd [%r31, 0x0150], %f16 nop nop set 0xd3e0bb44, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_40_631: .word 0x39400001 ! 718: FBPUGE fbuge,a,pn %fcc0, .word 0xd73fe080 ! 719: STDF_I std %f11, [0x0080, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_633: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_633) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,696,*,*,1)') ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_633: wrhpr %g0, 0x59b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 720: RDPC rd %pc, %r20 mondo_40_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d91c011 ! 721: WRPR_WSTATE_R wrpr %r7, %r17, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_635), 16, 16)) -> intp(mask2tid(0x40),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,968,*,*,1) xir_40_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_635: and %g1, 2, %g1 brnz,a %g1, xirwait_40_635 ldx [%r17], %g1 xir_40_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8373a2 ! 722: WR_CLEAR_SOFTINT_I wr %r13, 0x13a2, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_40 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_636: wrhpr %g0, 0xf09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7df00 ! 723: CASA_I casa [%r31] 0xf8, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_637: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_637) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,656,*,*,1)') ifelse(2,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_637: wrhpr %g0, 0x702, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 724: RDPC rd %pc, %r18 jmptr_40_638: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe1bfdf00 ! 726: STDFA_R stda %f16, [%r0, %r31] .word 0xd88008a0 ! 727: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 nop nop mov 0x1, %r18 splash_cmpr_40_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_640)+8 , 16, 16)) -> intp(7,0,31,*,960,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_640)&0xffffffff)+8 , 16, 16)) -> intp(6,0,25,*,896,*,53,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x1, %r18 splash_cmpr_40_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_642)+8 , 16, 16)) -> intp(0,0,0,*,968,*,c8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_642)&0xffffffff)+8 , 16, 16)) -> intp(7,0,22,*,912,*,c8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 730: SIAM siam 1 cancelint_40_643: rdhpr %halt, %r18 .word 0x85880000 ! 731: ALLCLEAN .word 0xe89fd140 ! 732: LDDA_R ldda [%r31, %r0] 0x8a, %r20 splash_hpstate_40_645: .word 0x819834e7 ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x14e7, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_646) , 16, 16)) -> intp(7,0,3,*,688,*,fe,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_646)&0xffffffff) , 16, 16)) -> intp(7,0,15,*,672,*,fe,1) #else set 0x5e104f9d, %r28 !TTID : 7 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_646: .word 0xa5a189d3 ! 734: FDIVd fdivd %f6, %f50, %f18 .word 0x91950006 ! 735: WRPR_PIL_R wrpr %r20, %r6, %pil br_longdelay1_40_648: .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, .word 0xbfe7c000 ! 736: SAVE_R save %r31, %r0, %r31 splash_lsu_40_649: nop nop ta T_CHANGE_HPRIV set 0xf131033c, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 737: FBPULE fbule splash_tba_40_650: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fdc40 ! 739: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc19fdf20 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_40_651: nop nop ta T_CHANGE_HPRIV setx 0x3a821b37b01db0b5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xe1bfda00 ! 742: STDFA_R stda %f16, [%r0, %r31] .word 0x8d9030e3 ! 743: WRPR_PSTATE_I wrpr %r0, 0x10e3, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_653), 16, 16)) -> intp(mask2tid(0x40),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) xir_40_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_653: and %g1, 2, %g1 brnz,a %g1, xirwait_40_653 ldx [%r17], %g1 xir_40_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8529a1 ! 744: WR_CLEAR_SOFTINT_I wr %r20, 0x09a1, %clear_softint .word 0x917026e9 ! 745: POPC_I popc 0x06e9, %r8 .word 0xe8dfc720 ! 746: LDXA_R ldxa [%r31, %r0] 0x39, %r20 nop nop mov 0x1, %r18 splash_cmpr_40_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_656)+8 , 16, 16)) -> intp(0,0,6,*,688,*,6e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_656)&0xffffffff)+8 , 16, 16)) -> intp(1,0,21,*,720,*,6e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x9190629c ! 748: WRPR_PIL_I wrpr %r1, 0x029c, %pil mondo_40_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d914008 ! 749: WRPR_WSTATE_R wrpr %r5, %r8, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_659)+8 , 16, 16)) -> intp(3,0,11,*,640,*,c1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_659)&0xffffffff)+8 , 16, 16)) -> intp(4,0,2,*,992,*,c1,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983bbc ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1bbc, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_40_660: rdhpr %halt, %r18 .word 0x85880000 ! 752: ALLCLEAN .word 0x2a780001 ! 753: BPCS .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_40_661: ta T_CHANGE_NONPRIV ! macro frzptr_40_662: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_40_663: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_40_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198320b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x120b, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_40_665: rdhpr %halt, %r8 .word 0x85880000 ! 758: ALLCLEAN intveclr_40_666: nop nop ta T_CHANGE_HPRIV setx 0xff9ccb429e651559, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xcc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_40_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94c014 ! 760: WRPR_WSTATE_R wrpr %r19, %r20, %wstate nop nop mov 0x1, %r18 splash_cmpr_40_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_668)+8 , 16, 16)) -> intp(0,0,29,*,920,*,d6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_668)&0xffffffff)+8 , 16, 16)) -> intp(2,0,2,*,1000,*,d6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 761: SIAM siam 1 .word 0xc32fe080 ! 762: STXFSR_I st-sfr %f1, [0x0080, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_40 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_670: wrhpr %g0, 0x80a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 763: CASA_I casa [%r31] 0xf8, %r0, %r8 ibp_40_671: nop nop .word 0xd13fe180 ! 764: STDF_I std %f8, [0x0180, %r31] mondo_40_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi stxa %r4, [%r0+0x3c8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d94c011 ! 765: WRPR_WSTATE_R wrpr %r19, %r17, %wstate .word 0xd097c400 ! 766: LDUHA_R lduha [%r31, %r0] 0x20, %r8 splash_tba_40_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fda60 ! 768: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8d903847 ! 769: WRPR_PSTATE_I wrpr %r0, 0x1847, %pstate .word 0xd0bfe066 ! 770: STDA_I stda %r8, [%r31 + 0x0066] %asi .word 0xe1bfe160 ! 771: STDFA_I stda %f16, [0x0160, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_677: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_677) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_677: wrhpr %g0, 0x348, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 772: RDPC rd %pc, %r13 br_badelay2_40_678: .word 0x95a409c7 ! 1: FDIVd fdivd %f16, %f38, %f10 allclean .word 0xa5b4830c ! 773: ALIGNADDRESS alignaddr %r18, %r12, %r18 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_40 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_679: wrhpr %g0, 0x202, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c200 ! 774: CASA_I casa [%r31] 0x10, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_680), 16, 16)) -> intp(mask2tid(0x40),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,648,*,*,1) xir_40_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_680: and %g1, 2, %g1 brnz,a %g1, xirwait_40_680 ldx [%r17], %g1 xir_40_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f56c ! 775: WR_CLEAR_SOFTINT_I wr %r7, 0x156c, %clear_softint splash_lsu_40_681: nop nop ta T_CHANGE_HPRIV set 0xbf9d3197, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x36800001 ! 1: BGE bge,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 776: FBPULE fbule #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_682), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,720,*,*,1) xir_40_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_682: and %g1, 2, %g1 brnz,a %g1, xirwait_40_682 ldx [%r17], %g1 xir_40_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab827c04 ! 777: WR_CLEAR_SOFTINT_I wr %r9, 0x1c04, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_683)+8 , 16, 16)) -> intp(6,0,24,*,984,*,fa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_683)&0xffffffff)+8 , 16, 16)) -> intp(5,0,13,*,936,*,fa,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982f4f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f4f, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_40_684: nop nop .word 0xe23fe0a0 ! 779: STD_I std %r17, [%r31 + 0x00a0] .word 0x9f802f7c ! 780: SIR sir 0x0f7c #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_685), 16, 16)) -> intp(mask2tid(0x40),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,688,*,*,1) xir_40_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_685: and %g1, 2, %g1 brnz,a %g1, xirwait_40_685 ldx [%r17], %g1 xir_40_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8120e9 ! 781: WR_CLEAR_SOFTINT_I wr %r4, 0x00e9, %clear_softint .word 0xe19fdb40 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_686) , 16, 16)) -> intp(1,0,15,*,1008,*,d9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_686)&0xffffffff) , 16, 16)) -> intp(2,0,10,*,992,*,d9,1) #else set 0x1620cd17, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_686: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9ba489c8 ! 783: FDIVd fdivd %f18, %f8, %f44 .word 0xe1bfdb20 ! 784: STDFA_R stda %f16, [%r0, %r31] brcommon3_40_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e090 ! 1: STQF_I - %f11, [0x0090, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x91aac825 ! 785: FMOVGE fmovs %fcc1, %f5, %f8 nop nop mov 0x1, %r18 splash_cmpr_40_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_688)+8 , 16, 16)) -> intp(3,0,25,*,904,*,ed,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_688)&0xffffffff)+8 , 16, 16)) -> intp(5,0,17,*,760,*,ed,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_40_689: nop nop .word 0xe1bfdb40 ! 787: STDFA_R stda %f16, [%r0, %r31] .word 0xe027e0b0 ! 788: STW_I stw %r16, [%r31 + 0x00b0] splash_tba_40_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_691: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_691) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_691: wrhpr %g0, 0xf5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 790: RDPC rd %pc, %r17 .word 0xa1a449a4 ! 791: FDIVs fdivs %f17, %f4, %f16 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_40_693: nop nop ta T_CHANGE_HPRIV setx 0xeb1252dd88edab27, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_40_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_694-donret_40_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00bd8d00 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f4d, %htstate best_set_reg(0x8d8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (40) retry .align 2048 donretarg_40_694: .word 0x97a409d2 ! 794: FDIVd fdivd %f16, %f18, %f42 nop nop set 0x7340424e, %r28 !TTID : 2 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_695: .word 0xa7a249d3 ! 795: FDIVd fdivd %f40, %f50, %f50 .word 0xda2fe0f8 ! 796: STB_I stb %r13, [%r31 + 0x00f8] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_696) , 16, 16)) -> intp(2,0,19,*,1008,*,6f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_696)&0xffffffff) , 16, 16)) -> intp(2,0,24,*,688,*,6f,1) #else set 0x7102f59, %r28 !TTID : 7 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_696: .word 0xa7a049c5 ! 797: FDIVd fdivd %f32, %f36, %f50 .word 0x99a289c6 ! 798: FDIVd fdivd %f10, %f6, %f12 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_698)+8 , 16, 16)) -> intp(5,0,8,*,744,*,4a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_698)&0xffffffff)+8 , 16, 16)) -> intp(3,0,16,*,968,*,4a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982615 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0615, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0x3390b593, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97a249ca ! 1: FDIVd fdivd %f40, %f10, %f42 intvec_40_699: .word 0xa5b244cd ! 800: FCMPNE32 fcmpne32 %d40, %d44, %r18 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_700), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,936,*,*,1) xir_40_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_700: and %g1, 2, %g1 brnz,a %g1, xirwait_40_700 ldx [%r17], %g1 xir_40_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833054 ! 801: WR_CLEAR_SOFTINT_I wr %r12, 0x1054, %clear_softint .word 0xe1bfc2c0 ! 802: STDFA_R stda %f16, [%r0, %r31] cancelint_40_701: rdhpr %halt, %r10 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_40_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_702)+8 , 16, 16)) -> intp(5,0,13,*,952,*,d8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_702)&0xffffffff)+8 , 16, 16)) -> intp(5,0,13,*,712,*,d8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_40_703: ta T_CHANGE_NONHPRIV .word 0x8198379a ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x179a, %hpstate .word 0x9f802a6e ! 806: SIR sir 0x0a6e nop nop mov 0x1, %r18 splash_cmpr_40_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_704)+8 , 16, 16)) -> intp(7,0,25,*,720,*,7b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_704)&0xffffffff)+8 , 16, 16)) -> intp(7,0,28,*,920,*,7b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_705: wrhpr %g0, 0xc99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7dd40 ! 808: CASA_I casa [%r31] 0xea, %r0, %r18 pmu_40_706: nop nop setx 0xffffffb5ffffffad, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_40_707: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdc40 ! 810: LDDFA_R ldda [%r31, %r0], %f16 frzptr_40_708: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_709: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_709) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,984,*,*,1)') ifelse(1,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_709: wrhpr %g0, 0x948, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 812: RDPC rd %pc, %r10 pmu_40_710: nop nop setx 0xffffffb2ffffffaf, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xd7903c34, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803874 ! 1: SIR sir 0x1874 intvec_40_711: .word 0x9f803b4d ! 814: SIR sir 0x1b4d splash_hpstate_40_712: .word 0x819832df ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x12df, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_713: wrhpr %g0, 0x852, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c2c0 ! 816: CASA_I casa [%r31] 0x16, %r0, %r12 brcommon3_40_714: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7d140 ! 1: CASA_I casa [%r31] 0x8a, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9030d7 ! 817: WRPR_PSTATE_I wrpr %r0, 0x10d7, %pstate .word 0x9191000c ! 818: WRPR_PIL_R wrpr %r4, %r12, %pil mondo_40_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3d8] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d91400b ! 819: WRPR_WSTATE_R wrpr %r5, %r11, %wstate nop nop mov 0x1, %r18 splash_cmpr_40_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_717)+8 , 16, 16)) -> intp(3,0,14,*,760,*,c6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_717)&0xffffffff)+8 , 16, 16)) -> intp(2,0,30,*,944,*,c6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_718: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_718) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,648,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_718: wrhpr %g0, 0x2da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 821: RDPC rd %pc, %r10 nop nop set 0xba108d59, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 intvec_40_719: .word 0x39400001 ! 822: FBPUGE fbuge,a,pn %fcc0, splash_lsu_40_720: nop nop ta T_CHANGE_HPRIV set 0x6287bb80, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 823: FBPULE fbule,a,pn %fcc0, .word 0x9f802ad4 ! 824: SIR sir 0x0ad4 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_721: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_721) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,984,*,*,1)') ifelse(3,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_721: wrhpr %g0, 0xe0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 825: RDPC rd %pc, %r19 .word 0xe897c2c0 ! 826: LDUHA_R lduha [%r31, %r0] 0x16, %r20 br_badelay3_40_723: .word 0x34800001 ! 1: BG bg,a .word 0x22800001 ! 1: BE be,a .word 0xe1150009 ! 1: LDQF_R - [%r20, %r9], %f16 .word 0x93a40833 ! 827: FADDs fadds %f16, %f19, %f9 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_724) , 16, 16)) -> intp(4,0,23,*,680,*,5c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_724)&0xffffffff) , 16, 16)) -> intp(3,0,23,*,968,*,5c,1) #else set 0xb5a03bfd, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_724: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x95b244c5 ! 828: FCMPNE32 fcmpne32 %d40, %d36, %r10 nop nop set 0x5ea0c7f6, %r28 !TTID : 7 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97b284d2 ! 1: FCMPNE32 fcmpne32 %d10, %d18, %r11 intvec_40_725: .word 0x97b1c4c1 ! 829: FCMPNE32 fcmpne32 %d38, %d32, %r11 .word 0x91930001 ! 830: WRPR_PIL_R wrpr %r12, %r1, %pil jmptr_40_727: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x26800001 ! 1: BL bl,a .word 0x8d902d67 ! 832: WRPR_PSTATE_I wrpr %r0, 0x0d67, %pstate mondo_40_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c8] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d91000d ! 833: WRPR_WSTATE_R wrpr %r4, %r13, %wstate ibp_40_730: nop nop .word 0xa7a4c9ca ! 834: FDIVd fdivd %f50, %f10, %f50 cwp_40_731: set user_data_start, %o7 .word 0x93902001 ! 835: WRPR_CWP_I wrpr %r0, 0x0001, %cwp jmptr_40_732: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_40_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d950005 ! 837: WRPR_WSTATE_R wrpr %r20, %r5, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_734) , 16, 16)) -> intp(1,0,8,*,920,*,7c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_734)&0xffffffff) , 16, 16)) -> intp(5,0,14,*,1000,*,7c,1) #else set 0x4c30162f, %r28 !TTID : 6 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa9b484c7 ! 1: FCMPNE32 fcmpne32 %d18, %d38, %r20 intvec_40_734: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 838: FBPUGE fbuge,a,pn %fcc0, brcommon3_40_735: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81982d87 ! 839: WRHPR_HPSTATE_I wrhpr %r0, 0x0d87, %hpstate mondo_40_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d908009 ! 840: WRPR_WSTATE_R wrpr %r2, %r9, %wstate nop nop set 0x17f0fcfc, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9ba409cc ! 1: FDIVd fdivd %f16, %f12, %f44 intvec_40_737: .word 0xa1a1c9d2 ! 841: FDIVd fdivd %f38, %f18, %f16 splash_lsu_40_738: nop nop ta T_CHANGE_HPRIV set 0x028f2f1a, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400002 ! 842: FBPULE fbule mondo_40_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3c8] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d92c00a ! 843: WRPR_WSTATE_R wrpr %r11, %r10, %wstate .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, .word 0x8d90360d ! 844: WRPR_PSTATE_I wrpr %r0, 0x160d, %pstate nop nop set 0xfbd08dbd, %r28 !TTID : 5 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803073 ! 1: SIR sir 0x1073 intvec_40_741: .word 0x9f803fc0 ! 845: SIR sir 0x1fc0 mondo_40_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e8] %asi stxa %r17, [%r0+0x3d8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d940011 ! 846: WRPR_WSTATE_R wrpr %r16, %r17, %wstate trapasi_40_743: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_744: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_744) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_744: wrhpr %g0, 0x248, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 849: RDPC rd %pc, %r18 mondo_40_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d8] %asi stxa %r2, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d910013 ! 850: WRPR_WSTATE_R wrpr %r4, %r19, %wstate .word 0xc0bfde20 ! 851: STDA_R stda %r0, [%r31 + %r0] 0xf1 nop nop mov 0x1, %r18 splash_cmpr_40_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_747)+8 , 16, 16)) -> intp(6,0,1,*,960,*,7f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_747)&0xffffffff)+8 , 16, 16)) -> intp(2,0,21,*,744,*,7f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_40_748: set 0x60340000, %r31 .word 0x858137b7 ! 853: WRCCR_I wr %r4, 0x17b7, %ccr nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_749: wrhpr %g0, 0xb50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c380 ! 854: CASA_I casa [%r31] 0x1c, %r0, %r18 .word 0x9192b1f8 ! 855: WRPR_PIL_I wrpr %r10, 0x11f8, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_750) , 16, 16)) -> intp(4,0,14,*,960,*,50,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_750)&0xffffffff) , 16, 16)) -> intp(7,0,9,*,712,*,50,1) #else set 0x3006466, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9ba1c9d4 ! 856: FDIVd fdivd %f38, %f20, %f44 nop nop set 0x8850445a, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7b104d2 ! 1: FCMPNE32 fcmpne32 %d4, %d18, %r19 intvec_40_751: .word 0x9f803bb2 ! 857: SIR sir 0x1bb2 cancelint_40_752: rdhpr %halt, %r16 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_753: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_753) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(6,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_753: wrhpr %g0, 0x688, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 859: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_754) , 16, 16)) -> intp(5,0,0,*,720,*,70,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_754)&0xffffffff) , 16, 16)) -> intp(5,0,23,*,640,*,70,1) #else set 0xcc105343, %r28 !TTID : 3 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_754: .word 0xa9b284d1 ! 860: FCMPNE32 fcmpne32 %d10, %d48, %r20 brcommon3_40_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe190 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0190] ba,a .+8 jmpl %r27+0, %r27 .word 0x00800001 ! 861: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_756)+8 , 16, 16)) -> intp(5,0,11,*,752,*,c4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_756)&0xffffffff)+8 , 16, 16)) -> intp(5,0,22,*,904,*,c4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982f5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f5f, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_40 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_757: wrhpr %g0, 0xe59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d160 ! 863: CASA_I casa [%r31] 0x8b, %r0, %r18 .word 0x87902012 ! 864: WRPR_TT_I wrpr %r0, 0x0012, %tt trapasi_40_758: nop mov 0x20, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_40_759: nop nop ta T_CHANGE_HPRIV set 0x146e66dc, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 866: FBPULE fbule,a,pn %fcc0, .word 0xe477e0d8 ! 867: STX_I stx %r18, [%r31 + 0x00d8] br_badelay2_40_760: .word 0x95a449d4 ! 1: FDIVd fdivd %f48, %f20, %f10 pdist %f12, %f22, %f20 .word 0xa9b30310 ! 868: ALIGNADDRESS alignaddr %r12, %r16, %r20 intveclr_40_761: nop nop ta T_CHANGE_HPRIV setx 0x9b85546f452862d0, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 869: FBPLG fblg .word 0xd53fe1c0 ! 870: STDF_I std %f10, [0x01c0, %r31] .word 0xc19fdf20 ! 871: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_764: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_764) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,992,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_764: wrhpr %g0, 0x912, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 872: RDPC rd %pc, %r12 .word 0xd81fe110 ! 873: LDD_I ldd [%r31 + 0x0110], %r12 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_40 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_766: wrhpr %g0, 0x453, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c400 ! 874: CASA_I casa [%r31] 0x20, %r0, %r12 nop nop set 0x850084f2, %r28 !TTID : 4 (mask2tid(0x40)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x40),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa5b104cd ! 1: FCMPNE32 fcmpne32 %d4, %d44, %r18 intvec_40_767: .word 0x99a149c7 ! 875: FDIVd fdivd %f36, %f38, %f12 brcommon1_40_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe090 ! 1: STXFSR_I st-sfr %f1, [0x0090, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xa9a489d1 ! 876: FDIVd fdivd %f18, %f48, %f20 frzptr_40_769: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_40_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe0d0 ! 1: PREFETCH_I prefetch [%r31 + 0x00d0], #24 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 878: BN bn,a .word 0x9770385f ! 879: POPC_I popc 0x185f, %r11 brcommon1_40_772: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-4, %r27 .word 0x87ad0a52 ! 880: FCMPd fcmpd %fcc, %f20, %f18 .word 0xc09fde00 ! 881: LDDA_R ldda [%r31, %r0] 0xf0, %r0 splash_tba_40_774: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_40_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb2ffffffae, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, .word 0x8d902a31 ! 884: WRPR_PSTATE_I wrpr %r0, 0x0a31, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_777), 16, 16)) -> intp(mask2tid(0x40),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,696,*,*,1) xir_40_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_777: and %g1, 2, %g1 brnz,a %g1, xirwait_40_777 ldx [%r17], %g1 xir_40_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a774 ! 885: WR_CLEAR_SOFTINT_I wr %r2, 0x0774, %clear_softint .word 0xd037e0af ! 886: STH_I sth %r8, [%r31 + 0x00af] .word 0xe19fe0c0 ! 887: LDDFA_I ldda [%r31, 0x00c0], %f16 splash_lsu_40_778: nop nop ta T_CHANGE_HPRIV set 0x59ed4cac, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 888: FBPULE fbule brcommon2_40_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fc2c0 ! 889: LDDFA_R ldda [%r31, %r0], %f0 mondo_40_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e8] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d920004 ! 890: WRPR_WSTATE_R wrpr %r8, %r4, %wstate nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_781: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_781) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,688,*,*,1)') ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_781: wrhpr %g0, 0xc8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 891: RDPC rd %pc, %r17 .word 0xd3e7dd40 ! 892: CASA_I casa [%r31] 0xea, %r0, %r9 intveclr_40_783: nop nop ta T_CHANGE_HPRIV setx 0x6d44215147773f86, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 893: FBPLG fblg jmptr_40_784: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_40_785: set user_data_start, %o7 .word 0x93902006 ! 895: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xd31fe0c0 ! 896: LDDF_I ldd [%r31, 0x00c0], %f9 pmu_40_787: nop nop setx 0xffffffbbffffffa1, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc1bfc3e0 ! 898: STDFA_R stda %f0, [%r0, %r31] mondo_40_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3e8] %asi stxa %r12, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d944011 ! 899: WRPR_WSTATE_R wrpr %r17, %r17, %wstate mondo_40_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d90c010 ! 900: WRPR_WSTATE_R wrpr %r3, %r16, %wstate mondo_40_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3e0] %asi stxa %r7, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d920011 ! 901: WRPR_WSTATE_R wrpr %r8, %r17, %wstate nop nop mov 0x1, %r18 splash_cmpr_40_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_792)+8 , 16, 16)) -> intp(3,0,30,*,704,*,ee,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_792)&0xffffffff)+8 , 16, 16)) -> intp(5,0,25,*,1016,*,ee,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_793)+8 , 16, 16)) -> intp(0,0,18,*,720,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_793)&0xffffffff)+8 , 16, 16)) -> intp(5,0,19,*,760,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819836c7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x16c7, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_40_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0e0 ! 1: STQF_I - %f9, [0x00e0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r7, [%r0] ASI_LSU_CONTROL .word 0x97aac833 ! 904: FMOVGE fmovs %fcc1, %f19, %f11 cancelint_40_795: rdhpr %halt, %r16 .word 0x85880000 ! 905: ALLCLEAN pmu_40_796: nop nop setx 0xffffffb7ffffffaa, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_40_797: nop nop ta T_CHANGE_HPRIV setx 0x8336fd3e0dc58465, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_40 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_798: wrhpr %g0, 0x401, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7d060 ! 908: CASA_I casa [%r31] 0x83, %r0, %r12 ibp_40_799: nop nop .word 0xa5a209c4 ! 909: FDIVd fdivd %f8, %f4, %f18 ibp_40_800: nop nop .word 0xe91fe190 ! 910: LDDF_I ldd [%r31, 0x0190], %f20 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xe1bfde00 ! 912: STDFA_R stda %f16, [%r0, %r31] brcommon3_40_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe040 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0040] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0x99aac823 ! 913: FMOVGE fmovs %fcc1, %f3, %f12 cancelint_40_803: rdhpr %halt, %r19 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_40_804: .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, .word 0x8198254d ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x054d, %hpstate jmptr_40_805: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_40_806: nop nop .word 0x87a90a49 ! 917: FCMPd fcmpd %fcc, %f4, %f40 .word 0xd09fd160 ! 918: LDDA_R ldda [%r31, %r0] 0x8b, %r8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_808), 16, 16)) -> intp(mask2tid(0x40),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,656,*,*,1) xir_40_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_808: and %g1, 2, %g1 brnz,a %g1, xirwait_40_808 ldx [%r17], %g1 xir_40_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f6fe ! 919: WR_CLEAR_SOFTINT_I wr %r7, 0x16fe, %clear_softint .word 0x9f8030e1 ! 920: SIR sir 0x10e1 jmptr_40_809: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_40_810: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_40_811: .word 0x8198308f ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x108f, %hpstate ibp_40_812: nop nop .word 0x20800002 ! 924: BN bn,a frzptr_40_813: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd1e7c080 ! 1: CASA_I casa [%r31] 0x 4, %r0, %r8 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_40_814: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_40_815: .word 0x16800001 ! 1: BGE bge .word 0x81983773 ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x1773, %hpstate memptr_40_816: set user_data_start, %r31 .word 0x8582381f ! 928: WRCCR_I wr %r8, 0x181f, %ccr nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_817: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_817) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,640,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_817: wrhpr %g0, 0x98a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 929: RDPC rd %pc, %r11 .word 0xe0bfde20 ! 930: STDA_R stda %r16, [%r31 + %r0] 0xf1 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_819: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_819) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,992,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_819: wrhpr %g0, 0x2d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 931: RDPC rd %pc, %r9 br_badelay1_40_820: .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 .word 0xd3342461 ! 1: STQF_I - %f9, [0x0461, %r16] .word 0xf16fe0c0 ! 1: PREFETCH_I prefetch [%r31 + 0x00c0], #24 normalw .word 0x9b458000 ! 932: RD_SOFTINT_REG rd %softint, %r13 fpinit_40_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009c4 ! 933: FDIVd fdivd %f0, %f4, %f8 .word 0x8d9033a9 ! 934: WRPR_PSTATE_I wrpr %r0, 0x13a9, %pstate mondo_40_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d90c012 ! 935: WRPR_WSTATE_R wrpr %r3, %r18, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_40_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_40_824: .word 0x8f902001 ! 937: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tba_40_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_40_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_826)+8 , 16, 16)) -> intp(7,0,0,*,744,*,ec,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_826)&0xffffffff)+8 , 16, 16)) -> intp(6,0,7,*,648,*,ec,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983ccf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ccf, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_40_827: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e079 ! 941: STX_I stx %r16, [%r31 + 0x0079] br_badelay1_40_828: .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, .word 0xa1b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r16 .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, normalw .word 0x9b458000 ! 942: RD_SOFTINT_REG rd %softint, %r13 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_40 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_829: wrhpr %g0, 0x358, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dc40 ! 943: CASA_I casa [%r31] 0xe2, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_40_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe1e7c380 ! 946: CASA_I casa [%r31] 0x1c, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x40, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_40_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_40 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_40_832: wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7df00 ! 947: CASA_I casa [%r31] 0xf8, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_833: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_833) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,976,*,*,1)') ifelse(5,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_833: wrhpr %g0, 0x658, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 948: RDPC rd %pc, %r11 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_834) , 16, 16)) -> intp(1,0,4,*,920,*,7a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_834)&0xffffffff) , 16, 16)) -> intp(5,0,9,*,992,*,7a,1) #else set 0xc50016f4, %r28 !TTID : 6 (mask2tid(0x40)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_40_834: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803669 ! 951: SIR sir 0x1669 splash_tba_40_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_836), 16, 16)) -> intp(mask2tid(0x40),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,752,*,*,1) xir_40_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_836: and %g1, 2, %g1 brnz,a %g1, xirwait_40_836 ldx [%r17], %g1 xir_40_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bbd2 ! 953: WR_CLEAR_SOFTINT_I wr %r6, 0x1bd2, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_837), 16, 16)) -> intp(mask2tid(0x40),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x40),1,3,*,760,*,*,1) xir_40_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_40_837: and %g1, 2, %g1 brnz,a %g1, xirwait_40_837 ldx [%r17], %g1 xir_40_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847625 ! 954: WR_CLEAR_SOFTINT_I wr %r17, 0x1625, %clear_softint mondo_40_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r8, [%r0+0x3d0] %asi stxa %r4, [%r0+0x3e8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d90c003 ! 955: WRPR_WSTATE_R wrpr %r3, %r3, %wstate pmu_40_839: nop nop setx 0xffffffb0ffffffa3, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f803bed ! 957: SIR sir 0x1bed nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_840: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_840) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,640,*,*,1)') ifelse(4,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_840: wrhpr %g0, 0x7d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 958: RDPC rd %pc, %r9 cancelint_40_841: rdhpr %halt, %r10 .word 0x85880000 ! 959: ALLCLEAN .word 0xe19fe100 ! 960: LDDFA_I ldda [%r31, 0x0100], %f16 nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_842: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_842) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,1016,*,*,1)') ifelse(0,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_842: wrhpr %g0, 0x9c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 961: RDPC rd %pc, %r18 intveclr_40_843: nop nop ta T_CHANGE_HPRIV setx 0x4cdd5c50ba254956, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 962: FBPLG fblg nop nop mov 0x1, %r18 splash_cmpr_40_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_40_844)+8 , 16, 16)) -> intp(1,0,9,*,664,*,fb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_40_844)&0xffffffff)+8 , 16, 16)) -> intp(3,0,10,*,992,*,fb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_40_845: nop nop wrhpr %g0, 0x1d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87ac4a4d ! 964: FCMPd fcmpd %fcc, %f48, %f44 frzptr_40_846: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd83fe010 ! 1: STD_I std %r12, [%r31 + 0x0010] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 965: LDDFA_R ldda [%r31, %r0], %f16 nop nop mov 0x0, %r18 splash_cmpr_40_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_40_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd91fe140 ! 968: LDDF_I ldd [%r31, 0x0140], %f12 cancelint_40_850: rdhpr %halt, %r19 .word 0x85880000 ! 969: ALLCLEAN .word 0x91950014 ! 970: WRPR_PIL_R wrpr %r20, %r20, %pil .word 0xe19fe180 ! 971: LDDFA_I ldda [%r31, 0x0180], %f16 .word 0xe277e083 ! 972: STX_I stx %r17, [%r31 + 0x0083] .word 0x9191800a ! 973: WRPR_PIL_R wrpr %r6, %r10, %pil splash_lsu_40_853: nop nop ta T_CHANGE_HPRIV set 0x451cd685, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 974: FBPULE fbule,a,pn %fcc0, frzptr_40_854: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800002 ! 975: BN bn jmptr_40_855: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_40_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_40_856-donret_40_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001bb100 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xf4d, %htstate wrhpr %g0, 0x159, %hpstate ! rand=1 (40) ldx [%r12+%r0], %g1 retry donretarg_40_856: .word 0x81982d16 ! 977: WRHPR_HPSTATE_I wrhpr %r0, 0x0d16, %hpstate .word 0xc19fe020 ! 978: LDDFA_I ldda [%r31, 0x0020], %f0 .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, .word 0x8d903e04 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1e04, %pstate .word 0xe2800b80 ! 980: LDUWA_R lduwa [%r0, %r0] 0x5c, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x40+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_40_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_40_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 40 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_40_858: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x40),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_40_858) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,896,*,*,1)') ifelse(7,mask2tid(0x40),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_40_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x40),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_40_858: wrhpr %g0, 0xc11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 982: RDPC rd %pc, %r13 .word 0xc32fc000 ! 983: STXFSR_R st-sfr %f1, [%r0, %r31] jmptr_40_860: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa5702e26 ! 985: POPC_I popc 0x0e26, %r18 .word 0x9f8020b0 ! 986: SIR sir 0x00b0 .word 0xe89fc2c0 ! 987: LDDA_R ldda [%r31, %r0] 0x16, %r20 .word 0x9f80296e ! 988: SIR sir 0x096e splash_lsu_40_864: nop nop ta T_CHANGE_HPRIV set 0x6d91f8d1, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3d400002 ! 1: FBPULE fbule,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 989: FBPULE fbule,a,pn %fcc0, brcommon2_40_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a7c960 ! 1: FMULq dis not found ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 990: BN bn,a ibp_40_866: nop nop wrhpr %g0, 0xe13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fe180 ! 991: STXFSR_I st-sfr %f1, [0x0180, %r31] memptr_40_867: set user_data_start, %r31 .word 0x8584e230 ! 992: WRCCR_I wr %r19, 0x0230, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0x9f803b4b ! 994: SIR sir 0x1b4b .word 0xe23fe0c0 ! 1: STD_I std %r17, [%r31 + 0x00c0] .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] mov 0xb1, %r30 .word 0x91d0001e ! 995: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe31fe1b0 ! 996: LDDF_I ldd [%r31, 0x01b0], %f17 .word 0xe227e0fc ! 997: STW_I stw %r17, [%r31 + 0x00fc] .word 0xa3a00160 ! 998: FABSq dis not found .word 0xe297dd40 ! 999: LDUHA_R lduha [%r31, %r0] 0xea, %r17 splash_tba_40_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_6: wrhpr %g0, 0x6d2, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_20_0: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e057 ! 2: STF_I st %f8, [0x0057, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_1: wrhpr %g0, 0x141, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7dc40 ! 3: CASA_I casa [%r31] 0xe2, %r0, %r8 dvapa_20_2: nop nop ta T_CHANGE_HPRIV mov 0xa57, %r20 mov 0x3, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xcb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f80382e ! 4: SIR sir 0x182e nop nop set 0x96408f51, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_20_3: .word 0x97b2c4cd ! 5: FCMPNE32 fcmpne32 %d42, %d44, %r11 br_longdelay3_20_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8d90268f ! 6: WRPR_PSTATE_I wrpr %r0, 0x068f, %pstate mondo_20_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3d0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d908009 ! 7: WRPR_WSTATE_R wrpr %r2, %r9, %wstate iaw_20_6: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_6: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_6 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_6: brnz %r16, iaw_wait20_6 ld [%r23], %r16 ba iaw_startwait20_6 mov 0x20, %r16 continue_iaw_20_6: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_6: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_6 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_6: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_6 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_6: mov 0x38, %r18 iaw4_20_6: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x801, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdb40 ! 8: STDFA_R stda %f16, [%r0, %r31] br_badelay3_20_7: .word 0x32800001 ! 1: BNE bne,a .word 0x12800001 ! 1: BNE bne .word 0xd7114014 ! 1: LDQF_R - [%r5, %r20], %f11 .word 0xa3a14834 ! 9: FADDs fadds %f5, %f20, %f17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_8), 16, 16)) -> intp(mask2tid(0x20),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,680,*,*,1) xir_20_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_8: and %g1, 2, %g1 brnz,a %g1, xirwait_20_8 ldx [%r17], %g1 xir_20_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82fbd5 ! 10: WR_CLEAR_SOFTINT_I wr %r11, 0x1bd5, %clear_softint .word 0x08800001 ! 1: BLEU bleu .word 0x8d9035a1 ! 11: WRPR_PSTATE_I wrpr %r0, 0x15a1, %pstate .word 0xc32fe1b0 ! 12: STXFSR_I st-sfr %f1, [0x01b0, %r31] nop nop set 0x7ef02b56, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_11: .word 0x9f8030ee ! 13: SIR sir 0x10ee .word 0xc19fdc40 ! 14: LDDFA_R ldda [%r31, %r0], %f0 ibp_20_13: nop nop .word 0x9ba449b1 ! 15: FDIVs fdivs %f17, %f17, %f13 nop nop ta T_CHANGE_HPRIV ! macro donret_20_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_14-donret_20_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x003ba200 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xd07, %htstate best_set_reg(0x196a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) ldx [%r12+%r0], %g1 retry donretarg_20_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_20_15: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_20 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_16: wrhpr %g0, 0x6c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c6c0 ! 18: CASA_I casa [%r31] 0x36, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_17: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_17) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1016,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_17: wrhpr %g0, 0xd51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 19: RDPC rd %pc, %r11 .word 0x9f803c4d ! 20: SIR sir 0x1c4d brcommon3_20_18: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 21: BN bn,a .word 0x9f802bd4 ! 22: SIR sir 0x0bd4 .word 0x91d020b4 ! 23: Tcc_I ta icc_or_xcc, %r0 + 180 br_badelay2_20_19: .word 0x32800001 ! 1: BNE bne,a pdist %f10, %f4, %f24 .word 0xa5b50314 ! 24: ALIGNADDRESS alignaddr %r20, %r20, %r18 ibp_20_20: nop nop wrhpr %g0, 0xe13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdc00 ! 25: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_21)+8 , 16, 16)) -> intp(4,0,1,*,896,*,60,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_21)&0xffffffff)+8 , 16, 16)) -> intp(3,0,12,*,664,*,60,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198375f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x175f, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_20_22: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xf16fe170 ! 1: PREFETCH_I prefetch [%r31 + 0x0170], #24 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfde20 ! 27: STDFA_R stda %f0, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_23: wrhpr %g0, 0xd1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c3c0 ! 28: CASA_I casa [%r31] 0x1e, %r0, %r17 mondo_20_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d92c010 ! 29: WRPR_WSTATE_R wrpr %r11, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_20 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_25: wrhpr %g0, 0x1db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d060 ! 30: CASA_I casa [%r31] 0x83, %r0, %r17 .word 0xe22fe1fa ! 31: STB_I stb %r17, [%r31 + 0x01fa] brcommon3_20_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c200 ! 1: CASA_I casa [%r31] 0x10, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe23fe0f0 ! 32: STD_I std %r17, [%r31 + 0x00f0] .word 0xe31fe1b0 ! 1: LDDF_I ldd [%r31, 0x01b0], %f17 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 mov 0xb1, %r30 .word 0x83d0001e ! 33: Tcc_R te icc_or_xcc, %r0 + %r30 .word 0xc19fe1a0 ! 34: LDDFA_I ldda [%r31, 0x01a0], %f0 brcommon3_20_27: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xa3b7c7c0 ! 35: PDIST pdistn %d62, %d0, %d48 nop nop mov 0x0, %r18 splash_cmpr_20_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 36: SIAM siam 1 jmptr_20_29: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_30: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_30) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,936,*,*,1)') ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_30: wrhpr %g0, 0x4d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 38: RDPC rd %pc, %r12 cancelint_20_31: rdhpr %halt, %r10 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_33), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) xir_20_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_33: and %g1, 2, %g1 brnz,a %g1, xirwait_20_33 ldx [%r17], %g1 xir_20_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e3fd ! 41: WR_CLEAR_SOFTINT_I wr %r3, 0x03fd, %clear_softint frzptr_20_34: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xe1bfdc40 ! 42: STDFA_R stda %f16, [%r0, %r31] brcommon3_20_35: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe0f0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00f0] ba,a .+8 jmpl %r27+0, %r27 .word 0x81982f27 ! 43: WRHPR_HPSTATE_I wrhpr %r0, 0x0f27, %hpstate frzptr_20_36: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 44: BN bn,a nop nop set 0x6006217, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_37: .word 0x9bb2c4cd ! 45: FCMPNE32 fcmpne32 %d42, %d44, %r13 frzptr_20_38: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe0f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00f0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_39: wrhpr %g0, 0x25a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d920 ! 47: CASA_I casa [%r31] 0xc9, %r0, %r16 .word 0xe1bfde20 ! 48: STDFA_R stda %f16, [%r0, %r31] .word 0xa1a00160 ! 49: FABSq dis not found nop nop mov 0x0, %r18 splash_cmpr_20_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 50: SIAM siam 1 mondo_20_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3d8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d940009 ! 51: WRPR_WSTATE_R wrpr %r16, %r9, %wstate .word 0xe09fe040 ! 52: LDDA_I ldda [%r31, + 0x0040] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_44) , 16, 16)) -> intp(6,0,28,*,912,*,af,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_44)&0xffffffff) , 16, 16)) -> intp(4,0,24,*,1008,*,af,1) #else set 0x38201817, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_44: .word 0x39400001 ! 53: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_20_46: rdhpr %halt, %r18 .word 0x85880000 ! 55: ALLCLEAN brcommon3_20_47: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe180 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0180] ba,a .+8 jmpl %r27-0, %r27 .word 0xd0dfd100 ! 56: LDXA_R ldxa [%r31, %r0] 0x88, %r8 dvapa_20_48: nop nop ta T_CHANGE_HPRIV mov 0xf19, %r20 mov 0x18, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x449, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd0dfc380 ! 57: LDXA_R ldxa [%r31, %r0] 0x1c, %r8 cancelint_20_49: rdhpr %halt, %r13 .word 0x85880000 ! 58: ALLCLEAN intveclr_20_50: nop nop ta T_CHANGE_HPRIV setx 0x6f71fa59cf4c4ccb, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_20_51: nop nop setx 0xffffffb4ffffffad, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_20_52: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e0d0 ! 1: STQF_I - %f10, [0x00d0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd49fc400 ! 61: LDDA_R ldda [%r31, %r0] 0x20, %r10 mondo_20_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d944004 ! 62: WRPR_WSTATE_R wrpr %r17, %r4, %wstate intveclr_20_54: nop nop ta T_CHANGE_HPRIV setx 0x1f433c047cee8703, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xa08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 63: FBPLG fblg #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_55), 16, 16)) -> intp(mask2tid(0x20),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,736,*,*,1) xir_20_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_55: and %g1, 2, %g1 brnz,a %g1, xirwait_20_55 ldx [%r17], %g1 xir_20_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84249e ! 64: WR_CLEAR_SOFTINT_I wr %r16, 0x049e, %clear_softint ibp_20_56: nop nop .word 0x95702d0c ! 65: POPC_I popc 0x0d0c, %r10 ibp_20_57: nop nop wrhpr %g0, 0x353, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9703a71 ! 66: POPC_I popc 0x1a71, %r20 iaw_20_58: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_58: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_58 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_58: brnz %r16, iaw_wait20_58 ld [%r23], %r16 ba iaw_startwait20_58 mov 0x20, %r16 continue_iaw_20_58: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_58: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_58 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_58: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_58 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_58: mov 0x38, %r18 iaw1_20_58: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdb40 ! 67: LDDA_R ldda [%r31, %r0] 0xda, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_59), 16, 16)) -> intp(mask2tid(0x20),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,968,*,*,1) xir_20_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_59: and %g1, 2, %g1 brnz,a %g1, xirwait_20_59 ldx [%r17], %g1 xir_20_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84398c ! 68: WR_CLEAR_SOFTINT_I wr %r16, 0x198c, %clear_softint br_longdelay4_20_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902002 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate .word 0xe69fc3c0 ! 70: LDDA_R ldda [%r31, %r0] 0x1e, %r19 iaw_20_61: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_61: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_61 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_61: brnz %r16, iaw_wait20_61 ld [%r23], %r16 ba iaw_startwait20_61 mov 0x20, %r16 continue_iaw_20_61: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_61: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_61 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_61: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_61 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_61: mov 0x38, %r18 iaw3_20_61: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x11b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdd40 ! 71: STDA_R stda %r16, [%r31 + %r0] 0xea splash_tba_20_62: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_20_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d940014 ! 73: WRPR_WSTATE_R wrpr %r16, %r20, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_64) , 16, 16)) -> intp(3,0,14,*,928,*,7a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_64)&0xffffffff) , 16, 16)) -> intp(0,0,24,*,992,*,7a,1) #else set 0x7db0b840, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_20_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80255b ! 74: SIR sir 0x055b mondo_20_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d944011 ! 75: WRPR_WSTATE_R wrpr %r17, %r17, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_66), 16, 16)) -> intp(mask2tid(0x20),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) xir_20_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_66: and %g1, 2, %g1 brnz,a %g1, xirwait_20_66 ldx [%r17], %g1 xir_20_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a0dd ! 76: WR_CLEAR_SOFTINT_I wr %r10, 0x00dd, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_67), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,920,*,*,1) xir_20_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_67: and %g1, 2, %g1 brnz,a %g1, xirwait_20_67 ldx [%r17], %g1 xir_20_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a1c0 ! 77: WR_CLEAR_SOFTINT_I wr %r10, 0x01c0, %clear_softint splash_hpstate_20_68: ta T_CHANGE_NONHPRIV .word 0x25400002 ! 1: FBPLG fblg,a,pn %fcc0, .word 0x81983552 ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x1552, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_69: wrhpr %g0, 0x609, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c280 ! 79: CASA_I casa [%r31] 0x14, %r0, %r19 .word 0xe63fe020 ! 1: STD_I std %r19, [%r31 + 0x0020] .word 0xe63fe110 ! 1: STD_I std %r19, [%r31 + 0x0110] mov 0xb0, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_20_70: nop nop ta T_CHANGE_HPRIV set 0xddda5bf4, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2c800002 ! 1: BNEG bneg,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400002 ! 81: FBPULE fbule nop nop mov 0x1, %r18 splash_cmpr_20_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_71)+8 , 16, 16)) -> intp(2,0,14,*,968,*,78,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_71)&0xffffffff)+8 , 16, 16)) -> intp(7,0,28,*,952,*,78,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_72), 16, 16)) -> intp(mask2tid(0x20),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) xir_20_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_72: and %g1, 2, %g1 brnz,a %g1, xirwait_20_72 ldx [%r17], %g1 xir_20_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823ce6 ! 83: WR_CLEAR_SOFTINT_I wr %r8, 0x1ce6, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_73: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_73) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,944,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_73: wrhpr %g0, 0x952, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 84: RDPC rd %pc, %r8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_74)+8 , 16, 16)) -> intp(4,0,26,*,992,*,62,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_74)&0xffffffff)+8 , 16, 16)) -> intp(2,0,21,*,728,*,62,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819826cd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x06cd, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_20_75: set user_data_start, %o7 .word 0x93902004 ! 86: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cwp_20_76: set user_data_start, %o7 .word 0x93902000 ! 87: WRPR_CWP_I wrpr %r0, 0x0000, %cwp brcommon1_20_77: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800002 ! 88: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_78), 16, 16)) -> intp(mask2tid(0x20),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,648,*,*,1) xir_20_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_78: and %g1, 2, %g1 brnz,a %g1, xirwait_20_78 ldx [%r17], %g1 xir_20_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab836da1 ! 89: WR_CLEAR_SOFTINT_I wr %r13, 0x0da1, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_20_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_79-donret_20_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00ab4200 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1485, %htstate best_set_reg(0x13fb, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) done donretarg_20_79: .word 0x8d90318e ! 90: WRPR_PSTATE_I wrpr %r0, 0x118e, %pstate .word 0xe19fe140 ! 91: LDDFA_I ldda [%r31, 0x0140], %f16 ibp_20_80: nop nop .word 0xc32fe1f0 ! 92: STXFSR_I st-sfr %f1, [0x01f0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_81: wrhpr %g0, 0x881, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c240 ! 93: CASA_I casa [%r31] 0x12, %r0, %r10 trapasi_20_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_20_83: nop nop ta T_CHANGE_HPRIV setx 0xe151f0e0fb21e31a, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 95: FBPLG fblg,a,pn %fcc0, intveclr_20_84: nop nop ta T_CHANGE_HPRIV setx 0x3a9438c46e412a18, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 96: FBPLG fblg frzptr_20_85: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xe19fc2c0 ! 97: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_86: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_86) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,944,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_86: wrhpr %g0, 0x912, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 98: RDPC rd %pc, %r19 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_87: wrhpr %g0, 0x691, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7dd40 ! 99: CASA_I casa [%r31] 0xea, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_20_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_88-donret_20_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001b4c00 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x16df, %htstate best_set_reg(0x1653, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) ldx [%r12+%r0], %g1 retry donretarg_20_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_20_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x39400001 ! 102: FBPUGE fbuge,a,pn %fcc0, iaw_20_91: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_91: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_91 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_91: brnz %r16, iaw_wait20_91 ld [%r23], %r16 ba iaw_startwait20_91 mov 0x20, %r16 continue_iaw_20_91: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_91: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_91 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_91: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_91 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_91: mov 0x38, %r18 iaw1_20_91: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x55b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87aa8a54 ! 103: FCMPd fcmpd %fcc, %f10, %f20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_92), 16, 16)) -> intp(mask2tid(0x20),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,752,*,*,1) xir_20_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_92: and %g1, 2, %g1 brnz,a %g1, xirwait_20_92 ldx [%r17], %g1 xir_20_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823626 ! 104: WR_CLEAR_SOFTINT_I wr %r8, 0x1626, %clear_softint ibp_20_93: nop nop .word 0x20800001 ! 105: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_20_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_94)+8 , 16, 16)) -> intp(7,0,3,*,936,*,61,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_94)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,672,*,61,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_20_95: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfdc40 ! 107: STDFA_R stda %f16, [%r0, %r31] .word 0x9f802273 ! 108: SIR sir 0x0273 nop nop ta T_CHANGE_HPRIV ! macro donret_20_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_96-donret_20_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00043500 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x66f, %htstate wrhpr %g0, 0xe91, %hpstate ! rand=1 (20) ldx [%r12+%r0], %g1 retry donretarg_20_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x3c780002 ! 110: BPPOS .word 0xe21fe0b0 ! 111: LDD_I ldd [%r31 + 0x00b0], %r17 splash_tba_20_98: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0xe8801ab8, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_99: .word 0x99a4c9cc ! 113: FDIVd fdivd %f50, %f12, %f12 memptr_20_100: set 0x60140000, %r31 .word 0x8580ad3d ! 114: WRCCR_I wr %r2, 0x0d3d, %ccr nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_101: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_101) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,736,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_101: wrhpr %g0, 0x3d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 115: RDPC rd %pc, %r16 splash_tba_20_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_103)+8 , 16, 16)) -> intp(5,0,26,*,968,*,a7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_103)&0xffffffff)+8 , 16, 16)) -> intp(0,0,12,*,968,*,a7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819835df ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x15df, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_104: wrhpr %g0, 0x5db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c400 ! 118: CASA_I casa [%r31] 0x20, %r0, %r13 ibp_20_105: nop nop .word 0x87acca42 ! 119: FCMPd fcmpd %fcc, %f50, %f2 ibp_20_106: nop nop .word 0xdadfc2c0 ! 120: LDXA_R ldxa [%r31, %r0] 0x16, %r13 mondo_20_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3e0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d944012 ! 121: WRPR_WSTATE_R wrpr %r17, %r18, %wstate .word 0xc19fde20 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe190 ! 123: LDDA_I ldda [%r31, + 0x0190] %asi, %r13 brcommon3_20_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r10, [%r0] ASI_LSU_CONTROL .word 0xa7aac828 ! 124: FMOVGE fmovs %fcc1, %f8, %f19 .word 0xe037e0ba ! 125: STH_I sth %r16, [%r31 + 0x00ba] frzptr_20_109: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702030 ! 1: POPC_I popc 0x0030, %r16 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfc2c0 ! 126: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_110: wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dc40 ! 127: CASA_I casa [%r31] 0xe2, %r0, %r16 nop nop set 0xca309a9e, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x95a309d4 ! 1: FDIVd fdivd %f12, %f20, %f10 intvec_20_111: .word 0x9f80339a ! 128: SIR sir 0x139a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_112) , 16, 16)) -> intp(7,0,1,*,936,*,68,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_112)&0xffffffff) , 16, 16)) -> intp(7,0,29,*,656,*,68,1) #else set 0x8bb09907, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_112: .word 0x19400001 ! 129: FBPUGE fbuge iaw_20_113: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_113: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_113 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_113: brnz %r16, iaw_wait20_113 ld [%r23], %r16 ba iaw_startwait20_113 mov 0x20, %r16 continue_iaw_20_113: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_113: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_113 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_113: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_113 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_113: mov 0x38, %r18 iaw1_20_113: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdf20 ! 130: STDFA_R stda %f0, [%r0, %r31] .word 0x95a00160 ! 131: FABSq dis not found .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_20_116: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe0f0 ! 134: LDDA_I ldda [%r31, + 0x00f0] %asi, %r10 intveclr_20_117: nop nop ta T_CHANGE_HPRIV setx 0x8ed1d8afd19d5014, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xada, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x29400002 ! 1: FBPL fbl,a,pn %fcc0, .word 0x8d902a1d ! 136: WRPR_PSTATE_I wrpr %r0, 0x0a1d, %pstate iaw_20_119: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_119: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_119 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_119: brnz %r16, iaw_wait20_119 ld [%r23], %r16 ba iaw_startwait20_119 mov 0x20, %r16 continue_iaw_20_119: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_119: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_119 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_119: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_119 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_119: mov 0x38, %r18 iaw4_20_119: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4bfc180 ! 137: STDA_R stda %r10, [%r31 + %r0] 0x0c ibp_20_120: nop nop wrhpr %g0, 0xcd3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe000 ! 138: PREFETCHA_I prefetcha [%r31, + 0x0000] %asi, #24 .word 0x8d902b32 ! 139: WRPR_PSTATE_I wrpr %r0, 0x0b32, %pstate frzptr_20_122: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fda60 ! 140: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0xca404a2b, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802c68 ! 1: SIR sir 0x0c68 intvec_20_123: .word 0xa7a509d3 ! 141: FDIVd fdivd %f20, %f50, %f50 .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_125)+8 , 16, 16)) -> intp(6,0,11,*,1008,*,a2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_125)&0xffffffff)+8 , 16, 16)) -> intp(4,0,29,*,912,*,a2,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198234e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x034e, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_20_126: ta T_CHANGE_NONHPRIV .word 0x10800001 ! 1: BA ba .word 0x819837d5 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x17d5, %hpstate demap_20_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x0a800001 ! 1: BCS bcs stxa %g3, [%g3] 0x57 wrhpr %g0, 0xbd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe0e8 ! 145: LDD_I ldd [%r31 + 0x00e8], %r19 .word 0xe63fe010 ! 146: STD_I std %r19, [%r31 + 0x0010] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_128)+8 , 16, 16)) -> intp(0,0,10,*,976,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_128)&0xffffffff)+8 , 16, 16)) -> intp(4,0,23,*,904,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c5b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c5b, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_20_129: rdhpr %halt, %r16 .word 0x85880000 ! 148: ALLCLEAN splash_tba_20_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_20_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_131-donret_20_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0045ae00 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x158d, %htstate best_set_reg(0x931, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) done donretarg_20_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_132) , 16, 16)) -> intp(7,0,17,*,744,*,e8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_132)&0xffffffff) , 16, 16)) -> intp(6,0,8,*,912,*,e8,1) #else set 0xeac0838f, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a409c3 ! 1: FDIVd fdivd %f16, %f34, %f18 intvec_20_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x99a449cd ! 151: FDIVd fdivd %f48, %f44, %f12 memptr_20_133: set 0x60140000, %r31 .word 0x85842996 ! 152: WRCCR_I wr %r16, 0x0996, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0xe73fe040 ! 154: STDF_I std %f19, [0x0040, %r31] .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe1a0 ! 156: LDD_I ldd [%r31 + 0x01a0], %r19 iaw_20_135: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_135: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_135 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_135: brnz %r16, iaw_wait20_135 ld [%r23], %r16 ba iaw_startwait20_135 mov 0x20, %r16 continue_iaw_20_135: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_135: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_135 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_135: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_135 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_135: mov 0x38, %r18 iaw4_20_135: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x38a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fc3e0 ! 157: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_20_136: nop nop ta T_CHANGE_HPRIV set 0x492b3437, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697dc40 ! 159: LDUHA_R lduha [%r31, %r0] 0xe2, %r19 .word 0x19400001 ! 160: FBPUGE fbuge dvapa_20_138: nop nop ta T_CHANGE_HPRIV mov 0xb97, %r20 mov 0x1b, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xdc8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2bfd060 ! 161: STDA_R stda %r9, [%r31 + %r0] 0x83 iaw_20_139: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_139: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_139 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_139: brnz %r16, iaw_wait20_139 ld [%r23], %r16 ba iaw_startwait20_139 mov 0x20, %r16 continue_iaw_20_139: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_139: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_139 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_139: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_139 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_139: mov 0x38, %r18 iaw1_20_139: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xfcb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd33fe070 ! 162: STDF_I std %f9, [0x0070, %r31] intveclr_20_140: nop nop ta T_CHANGE_HPRIV setx 0x6e20649d8d067b0e, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 163: FBPLG fblg,a,pn %fcc0, .word 0xc1bfdb40 ! 164: STDFA_R stda %f0, [%r0, %r31] brcommon3_20_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r16, [%r0] ASI_LSU_CONTROL .word 0x97aac834 ! 165: FMOVGE fmovs %fcc1, %f20, %f11 brcommon3_20_142: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-4, %r27 .word 0xc32fe010 ! 166: STXFSR_I st-sfr %f1, [0x0010, %r31] .word 0x91934001 ! 167: WRPR_PIL_R wrpr %r13, %r1, %pil frzptr_20_144: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfdc40 ! 168: STDFA_R stda %f16, [%r0, %r31] splash_hpstate_20_145: ta T_CHANGE_NONHPRIV .word 0x81982017 ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x0017, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_20 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_146: wrhpr %g0, 0x8d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c080 ! 170: CASA_I casa [%r31] 0x 4, %r0, %r18 splash_lsu_20_147: nop nop ta T_CHANGE_HPRIV set 0x3b9c0b83, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x22800001 ! 1: BE be,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 171: FBPULE fbule,a,pn %fcc0, .word 0x39400001 ! 172: FBPUGE fbuge,a,pn %fcc0, .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_20_149: set 0x60340000, %r31 .word 0x8584273a ! 174: WRCCR_I wr %r16, 0x073a, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_150), 16, 16)) -> intp(mask2tid(0x20),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,736,*,*,1) xir_20_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_150: and %g1, 2, %g1 brnz,a %g1, xirwait_20_150 ldx [%r17], %g1 xir_20_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab85392e ! 175: WR_CLEAR_SOFTINT_I wr %r20, 0x192e, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_20_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_151)+8 , 16, 16)) -> intp(5,0,23,*,1008,*,fa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_151)&0xffffffff)+8 , 16, 16)) -> intp(3,0,12,*,688,*,fa,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_152) , 16, 16)) -> intp(2,0,24,*,688,*,21,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_152)&0xffffffff) , 16, 16)) -> intp(7,0,4,*,728,*,21,1) #else set 0xa980f3e5, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_152: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9bb184d1 ! 177: FCMPNE32 fcmpne32 %d6, %d48, %r13 mondo_20_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d8] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d950010 ! 178: WRPR_WSTATE_R wrpr %r20, %r16, %wstate .word 0xd427e1bc ! 179: STW_I stw %r10, [%r31 + 0x01bc] nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_154: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_154) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,952,*,*,1)') ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_154: wrhpr %g0, 0xfda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 180: RDPC rd %pc, %r16 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_20 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_155: wrhpr %g0, 0x399, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c2e0 ! 182: CASA_I casa [%r31] 0x17, %r0, %r9 .word 0xa3b4cff4 ! 183: FONES e %f17 splash_tba_20_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_20_157: rdhpr %halt, %r8 .word 0x85880000 ! 185: ALLCLEAN .word 0x87a94ac7 ! 186: FCMPEd fcmped %fcc, %f36, %f38 frzptr_20_158: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0x33206de5, %r28 !TTID : 5 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97b1c4d2 ! 1: FCMPNE32 fcmpne32 %d38, %d18, %r11 intvec_20_159: .word 0xa7a149d4 ! 188: FDIVd fdivd %f36, %f20, %f50 .word 0xd437e1e2 ! 189: STH_I sth %r10, [%r31 + 0x01e2] change_to_randtl_20_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_20_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_162), 16, 16)) -> intp(mask2tid(0x20),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,936,*,*,1) xir_20_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_162: and %g1, 2, %g1 brnz,a %g1, xirwait_20_162 ldx [%r17], %g1 xir_20_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e0ef ! 192: WR_CLEAR_SOFTINT_I wr %r19, 0x00ef, %clear_softint .word 0x91918011 ! 193: WRPR_PIL_R wrpr %r6, %r17, %pil memptr_20_164: set 0x60340000, %r31 .word 0x8584e983 ! 194: WRCCR_I wr %r19, 0x0983, %ccr iaw_20_165: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_165: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_165 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_165: brnz %r16, iaw_wait20_165 ld [%r23], %r16 ba iaw_startwait20_165 mov 0x20, %r16 continue_iaw_20_165: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_165: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_165 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_165: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_165 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_165: mov 0x38, %r18 iaw3_20_165: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xb92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd43fe080 ! 195: STD_I std %r10, [%r31 + 0x0080] frzptr_20_166: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 196: BN bn brcommon1_20_167: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 197: BN bn,a dvapa_20_168: nop nop ta T_CHANGE_HPRIV mov 0x86d, %r20 mov 0x19, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x21a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd09fc3c0 ! 198: LDDA_R ldda [%r31, %r0] 0x1e, %r8 iaw_20_169: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_169: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_169 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_169: brnz %r16, iaw_wait20_169 ld [%r23], %r16 ba iaw_startwait20_169 mov 0x20, %r16 continue_iaw_20_169: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_169: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_169 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_169: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_169 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_169: mov 0x38, %r18 iaw1_20_169: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x880, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfda00 ! 199: STDFA_R stda %f0, [%r0, %r31] .word 0xa150c000 ! 200: RDPR_TT .word 0xf16fe120 ! 201: PREFETCH_I prefetch [%r31 + 0x0120], #24 fpinit_20_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89a009c4 ! 202: FDIVd fdivd %f0, %f4, %f4 iaw_20_171: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_171: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_171 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_171: brnz %r16, iaw_wait20_171 ld [%r23], %r16 ba iaw_startwait20_171 mov 0x20, %r16 continue_iaw_20_171: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_171: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_171 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_171: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_171 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_171: mov 0x38, %r18 iaw1_20_171: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x818, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdf00 ! 203: LDDA_R ldda [%r31, %r0] 0xf8, %r0 cwp_20_172: set user_data_start, %o7 .word 0x93902006 ! 204: WRPR_CWP_I wrpr %r0, 0x0006, %cwp nop nop set 0x79608297, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa1a449d3 ! 1: FDIVd fdivd %f48, %f50, %f16 intvec_20_173: .word 0xa9a449d0 ! 205: FDIVd fdivd %f48, %f16, %f20 splash_lsu_20_174: nop nop ta T_CHANGE_HPRIV set 0xf1024a90, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 206: FBPULE fbule,a,pn %fcc0, ibp_20_175: nop nop .word 0x00800002 ! 207: BN bn dvapa_20_176: nop nop ta T_CHANGE_HPRIV mov 0x92d, %r20 mov 0x7, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x9c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdd40 ! 208: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_20_177: nop nop ta T_CHANGE_HPRIV set 0x277a00c7, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 209: FBPULE fbule nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_20 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_178: wrhpr %g0, 0x709, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c6c0 ! 210: CASA_I casa [%r31] 0x36, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_179), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,744,*,*,1) xir_20_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_179: and %g1, 2, %g1 brnz,a %g1, xirwait_20_179 ldx [%r17], %g1 xir_20_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab83257d ! 211: WR_CLEAR_SOFTINT_I wr %r12, 0x057d, %clear_softint .word 0xa3a00554 ! 212: FSQRTd fsqrt cancelint_20_180: rdhpr %halt, %r19 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_181), 16, 16)) -> intp(mask2tid(0x20),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,744,*,*,1) xir_20_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_181: and %g1, 2, %g1 brnz,a %g1, xirwait_20_181 ldx [%r17], %g1 xir_20_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847e66 ! 214: WR_CLEAR_SOFTINT_I wr %r17, 0x1e66, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_182: wrhpr %g0, 0x9d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c6c0 ! 215: CASA_I casa [%r31] 0x36, %r0, %r10 dvapa_20_183: nop nop ta T_CHANGE_HPRIV mov 0xcfb, %r20 mov 0x1e, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x510, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdf00 ! 216: LDDA_R ldda [%r31, %r0] 0xf8, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_184), 16, 16)) -> intp(mask2tid(0x20),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,752,*,*,1) xir_20_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_184: and %g1, 2, %g1 brnz,a %g1, xirwait_20_184 ldx [%r17], %g1 xir_20_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e68e ! 217: WR_CLEAR_SOFTINT_I wr %r19, 0x068e, %clear_softint .word 0xd4dfd140 ! 218: LDXA_R ldxa [%r31, %r0] 0x8a, %r10 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_186)+8 , 16, 16)) -> intp(2,0,21,*,704,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_186)&0xffffffff)+8 , 16, 16)) -> intp(7,0,21,*,712,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983180 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1180, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_20_187: nop nop ta T_CHANGE_HPRIV mov 0x848, %r20 mov 0x1f, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4dfc400 ! 220: LDXA_R ldxa [%r31, %r0] 0x20, %r10 pmu_20_188: nop nop ta T_CHANGE_PRIV setx 0xffffffbdffffffa2, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_20_189: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x95702060 ! 1: POPC_I popc 0x0060, %r10 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 222: BN bn,a cancelint_20_190: rdhpr %halt, %r13 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_191: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_191) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,648,*,*,1)') ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_191: wrhpr %g0, 0x603, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 224: RDPC rd %pc, %r16 brcommon1_20_192: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1a189a6 ! 225: FDIVs fdivs %f6, %f6, %f16 nop nop mov 0x1, %r18 splash_cmpr_20_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_193)+8 , 16, 16)) -> intp(6,0,6,*,992,*,67,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_193)&0xffffffff)+8 , 16, 16)) -> intp(6,0,18,*,712,*,67,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_194)+8 , 16, 16)) -> intp(2,0,28,*,712,*,bf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_194)&0xffffffff)+8 , 16, 16)) -> intp(7,0,7,*,648,*,bf,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982997 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0997, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_195: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_195) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,752,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_195: wrhpr %g0, 0x38b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 228: RDPC rd %pc, %r13 .word 0x8790221c ! 229: WRPR_TT_I wrpr %r0, 0x021c, %tt nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_20 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_196: wrhpr %g0, 0x441, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c2e0 ! 230: CASA_I casa [%r31] 0x17, %r0, %r18 iaw_20_197: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_197: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_197 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_197: brnz %r16, iaw_wait20_197 ld [%r23], %r16 ba iaw_startwait20_197 mov 0x20, %r16 continue_iaw_20_197: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_197: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_197 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_197: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_197 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_197: mov 0x38, %r18 iaw3_20_197: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x1c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe000 ! 231: PREFETCHA_I prefetcha [%r31, + 0x0000] %asi, #24 .word 0xe41fe160 ! 232: LDD_I ldd [%r31 + 0x0160], %r18 frzptr_20_199: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 233: BN bn,a .word 0x9f802715 ! 234: SIR sir 0x0715 mondo_20_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d94000d ! 235: WRPR_WSTATE_R wrpr %r16, %r13, %wstate splash_tba_20_201: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_202)+8 , 16, 16)) -> intp(7,0,30,*,672,*,a8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_202)&0xffffffff)+8 , 16, 16)) -> intp(2,0,17,*,1000,*,a8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198391d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x191d, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_20_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d92800c ! 238: WRPR_WSTATE_R wrpr %r10, %r12, %wstate cancelint_20_204: rdhpr %halt, %r9 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_20_205: nop nop ta T_CHANGE_HPRIV set 0x2400655e, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 240: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_20_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_206-donret_20_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x004a7e00 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xc2e, %htstate wrhpr %g0, 0x4d9, %hpstate ! rand=1 (20) ldx [%r12+%r0], %g1 retry donretarg_20_206: .word 0x30800001 ! 241: BA ba,a .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x91950012 ! 243: WRPR_PIL_R wrpr %r20, %r18, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_208), 16, 16)) -> intp(mask2tid(0x20),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) xir_20_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_208: and %g1, 2, %g1 brnz,a %g1, xirwait_20_208 ldx [%r17], %g1 xir_20_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8526f9 ! 244: WR_CLEAR_SOFTINT_I wr %r20, 0x06f9, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_209)+8 , 16, 16)) -> intp(2,0,3,*,976,*,61,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_209)&0xffffffff)+8 , 16, 16)) -> intp(1,0,3,*,648,*,61,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983617 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1617, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_210: wrhpr %g0, 0x151, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d000 ! 246: CASA_I casa [%r31] 0x80, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x0, %r18 splash_cmpr_20_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 248: SIAM siam 1 cancelint_20_212: rdhpr %halt, %r9 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_20_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198331d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x131d, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d902b1d ! 251: WRPR_PSTATE_I wrpr %r0, 0x0b1d, %pstate memptr_20_215: set 0x60140000, %r31 .word 0x8584fc5c ! 252: WRCCR_I wr %r19, 0x1c5c, %ccr nop nop mov 0x1, %r18 splash_cmpr_20_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_216)+8 , 16, 16)) -> intp(1,0,6,*,744,*,af,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_216)&0xffffffff)+8 , 16, 16)) -> intp(0,0,29,*,1008,*,af,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_20_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7d060 ! 1: CASA_I casa [%r31] 0x83, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0x97aac827 ! 254: FMOVGE fmovs %fcc1, %f7, %f11 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_218) , 16, 16)) -> intp(0,0,23,*,968,*,a6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_218)&0xffffffff) , 16, 16)) -> intp(3,0,29,*,720,*,a6,1) #else set 0xc8c0cef3, %r28 !TTID : 6 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_218: .word 0x99a409d4 ! 255: FDIVd fdivd %f16, %f20, %f12 .word 0x9194c011 ! 256: WRPR_PIL_R wrpr %r19, %r17, %pil ibp_20_220: nop nop .word 0x9ba409ad ! 257: FDIVs fdivs %f16, %f13, %f13 .word 0xd63fe190 ! 258: STD_I std %r11, [%r31 + 0x0190] cancelint_20_222: rdhpr %halt, %r8 .word 0x85880000 ! 259: ALLCLEAN iaw_20_223: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_223: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_223 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_223: brnz %r16, iaw_wait20_223 ld [%r23], %r16 ba iaw_startwait20_223 mov 0x20, %r16 continue_iaw_20_223: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_223: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_223 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_223: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_223 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_223: mov 0x38, %r18 iaw4_20_223: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x501, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fda60 ! 260: LDDA_R ldda [%r31, %r0] 0xd3, %r0 .word 0xe897df00 ! 261: LDUHA_R lduha [%r31, %r0] 0xf8, %r20 cancelint_20_225: rdhpr %halt, %r12 .word 0x85880000 ! 262: ALLCLEAN brcommon3_20_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r7, [%r0] ASI_LSU_CONTROL .word 0xa1aac833 ! 263: FMOVGE fmovs %fcc1, %f19, %f16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_20_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198278c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x078c, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_20_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe040 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0040] ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0x97aac827 ! 265: FMOVGE fmovs %fcc1, %f7, %f11 .word 0xd69fc380 ! 266: LDDA_R ldda [%r31, %r0] 0x1c, %r11 splash_hpstate_20_230: .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0x819820fd ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x00fd, %hpstate memptr_20_231: set user_data_start, %r31 .word 0x85842522 ! 268: WRCCR_I wr %r16, 0x0522, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_232) , 16, 16)) -> intp(3,0,31,*,904,*,69,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_232)&0xffffffff) , 16, 16)) -> intp(5,0,28,*,712,*,69,1) #else set 0x6da0034b, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_20_232: .word 0x39400001 ! 269: FBPUGE fbuge,a,pn %fcc0, pmu_20_233: nop nop ta T_CHANGE_PRIV setx 0xffffffbeffffffad, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_20_234: nop nop ta T_CHANGE_HPRIV set 0x0670c46f, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_235), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,984,*,*,1) xir_20_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_235: and %g1, 2, %g1 brnz,a %g1, xirwait_20_235 ldx [%r17], %g1 xir_20_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f3b5 ! 273: WR_CLEAR_SOFTINT_I wr %r19, 0x13b5, %clear_softint .word 0xe23fe150 ! 274: STD_I std %r17, [%r31 + 0x0150] .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick iaw_20_238: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_238: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_238 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_238: brnz %r16, iaw_wait20_238 ld [%r23], %r16 ba iaw_startwait20_238 mov 0x20, %r16 continue_iaw_20_238: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_238: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_238 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_238: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_238 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_238: mov 0x38, %r18 iaw4_20_238: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdc00 ! 276: LDDFA_R ldda [%r31, %r0], %f16 .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_20_240: nop nop ta T_CHANGE_HPRIV set 0x6b507fd5, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3a800001 ! 1: BCC bcc,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0x5830f7a7, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_241: .word 0x39400001 ! 279: FBPUGE fbuge,a,pn %fcc0, mondo_20_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d94c00a ! 280: WRPR_WSTATE_R wrpr %r19, %r10, %wstate dvapa_20_243: nop nop ta T_CHANGE_HPRIV mov 0xfe6, %r20 mov 0x13, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x55a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99a409d3 ! 281: FDIVd fdivd %f16, %f50, %f12 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_244: wrhpr %g0, 0x8c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c200 ! 282: CASA_I casa [%r31] 0x10, %r0, %r20 .word 0xe91fe000 ! 283: LDDF_I ldd [%r31, 0x0000], %f20 .word 0xe9e7e000 ! 284: CASA_R casa [%r31] %asi, %r0, %r20 br_longdelay4_20_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902000 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_248: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_248) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,952,*,*,1)') ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_248: wrhpr %g0, 0xeca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 286: RDPC rd %pc, %r16 memptr_20_249: set user_data_start, %r31 .word 0x8581f589 ! 287: WRCCR_I wr %r7, 0x1589, %ccr .word 0x91924012 ! 288: WRPR_PIL_R wrpr %r9, %r18, %pil mondo_20_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94800b ! 289: WRPR_WSTATE_R wrpr %r18, %r11, %wstate cancelint_20_252: rdhpr %halt, %r19 .word 0x85880000 ! 290: ALLCLEAN jmptr_20_253: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_20_254: rdhpr %halt, %r16 .word 0x85880000 ! 292: ALLCLEAN frzptr_20_255: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda3fe180 ! 1: STD_I std %r13, [%r31 + 0x0180] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdb40 ! 293: LDDFA_R ldda [%r31, %r0], %f16 iaw_20_256: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_256: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_256 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_256: brnz %r16, iaw_wait20_256 ld [%r23], %r16 ba iaw_startwait20_256 mov 0x20, %r16 continue_iaw_20_256: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_256: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_256 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_256: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_256 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_256: mov 0x38, %r18 iaw0_20_256: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x203, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x997039c1 ! 294: POPC_I popc 0x19c1, %r12 frzptr_20_257: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xe19fdd40 ! 295: LDDFA_R ldda [%r31, %r0], %f16 br_badelay1_20_258: .word 0x0cc94001 ! 1: BRGZ brgz,pt %r5, .word 0xd937e160 ! 1: STQF_I - %f12, [0x0160, %r31] .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, normalw .word 0x97458000 ! 296: RD_SOFTINT_REG rd %softint, %r11 ibp_20_259: nop nop .word 0x87ac8a52 ! 297: FCMPd fcmpd %fcc, %f18, %f18 .word 0x91920011 ! 298: WRPR_PIL_R wrpr %r8, %r17, %pil brcommon2_20_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe5108002 ! 1: LDQF_R - [%r2, %r2], %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0x81b7c7c0 ! 299: PDIST pdistn %d62, %d0, %d0 splash_lsu_20_262: nop nop ta T_CHANGE_HPRIV set 0x2a5c238b, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x03400001 ! 1: FBPNE fbne stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 300: FBPULE fbule,a,pn %fcc0, pmu_20_263: nop nop setx 0xffffffbfffffffa2, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_20_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_264)+8 , 16, 16)) -> intp(1,0,9,*,944,*,3e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_264)&0xffffffff)+8 , 16, 16)) -> intp(4,0,19,*,992,*,3e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_20_265: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_266), 16, 16)) -> intp(mask2tid(0x20),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,656,*,*,1) xir_20_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_266: and %g1, 2, %g1 brnz,a %g1, xirwait_20_266 ldx [%r17], %g1 xir_20_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84337b ! 304: WR_CLEAR_SOFTINT_I wr %r16, 0x137b, %clear_softint nop nop set 0xd3d07eec, %r28 !TTID : 6 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_267: .word 0x9bb504c2 ! 305: FCMPNE32 fcmpne32 %d20, %d2, %r13 mondo_20_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3d8] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d950012 ! 306: WRPR_WSTATE_R wrpr %r20, %r18, %wstate nop nop set 0xa320822a, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_269: .word 0x93b404d4 ! 307: FCMPNE32 fcmpne32 %d16, %d20, %r9 ibp_20_270: nop nop .word 0x20800001 ! 308: BN bn,a frzptr_20_271: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702110 ! 1: POPC_I popc 0x0110, %r12 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 309: BN bn,a .word 0xd927e0e4 ! 310: STF_I st %f12, [0x00e4, %r31] change_to_randtl_20_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_20_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_20_273: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fe040 ! 313: LDDFA_I ldda [%r31, 0x0040], %f16 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_274: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_274) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,656,*,*,1)') ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_274: wrhpr %g0, 0xa8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 314: RDPC rd %pc, %r16 memptr_20_275: set 0x60340000, %r31 .word 0x858231da ! 315: WRCCR_I wr %r8, 0x11da, %ccr cancelint_20_276: rdhpr %halt, %r17 .word 0x85880000 ! 316: ALLCLEAN frzptr_20_277: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800002 ! 317: BN bn,a br_badelay1_20_278: .word 0x05400001 ! 1: FBPLG fblg .word 0xe23fe160 ! 1: STD_I std %r17, [%r31 + 0x0160] .word 0xe3e7d920 ! 1: CASA_I casa [%r31] 0xc9, %r0, %r17 normalw .word 0xa1458000 ! 318: RD_SOFTINT_REG rd %softint, %r16 nop nop mov 0x0, %r18 splash_cmpr_20_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 319: SIAM siam 1 mondo_20_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d944008 ! 320: WRPR_WSTATE_R wrpr %r17, %r8, %wstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_281: wrhpr %g0, 0xa8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d000 ! 321: CASA_I casa [%r31] 0x80, %r0, %r19 frzptr_20_282: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 322: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_283)+8 , 16, 16)) -> intp(4,0,3,*,920,*,e7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_283)&0xffffffff)+8 , 16, 16)) -> intp(5,0,31,*,760,*,e7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982383 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0383, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_284: wrhpr %g0, 0xb00, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c3c0 ! 324: CASA_I casa [%r31] 0x1e, %r0, %r19 .word 0xe6bfc540 ! 325: STDA_R stda %r19, [%r31 + %r0] 0x2a .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_20_287: set user_data_start, %o7 .word 0x93902007 ! 327: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0x9f803404 ! 328: SIR sir 0x1404 memptr_20_288: set user_data_start, %r31 .word 0x858068bd ! 329: WRCCR_I wr %r1, 0x08bd, %ccr nop nop set 0x12b03a86, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x99a349cd ! 1: FDIVd fdivd %f44, %f44, %f12 intvec_20_289: .word 0xa5a509d2 ! 330: FDIVd fdivd %f20, %f18, %f18 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_290: wrhpr %g0, 0x18a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d140 ! 331: CASA_I casa [%r31] 0x8a, %r0, %r13 brcommon1_20_291: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c2c0 ! 1: CASA_I casa [%r31] 0x16, %r0, %r13 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1a449b0 ! 332: FDIVs fdivs %f17, %f16, %f16 dvapa_20_292: nop nop ta T_CHANGE_HPRIV mov 0xf75, %r20 mov 0x17, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x411, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdf20 ! 333: STDA_R stda %r0, [%r31 + %r0] 0xf9 iaw_20_293: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_293: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_293 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_293: brnz %r16, iaw_wait20_293 ld [%r23], %r16 ba iaw_startwait20_293 mov 0x20, %r16 continue_iaw_20_293: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_293: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_293 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_293: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_293 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_293: mov 0x38, %r18 iaw3_20_293: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x448, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd31fe0d0 ! 334: LDDF_I ldd [%r31, 0x00d0], %f9 nop nop ta T_CHANGE_HPRIV ! macro donret_20_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_294-donret_20_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b87b00 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x16cd, %htstate best_set_reg(0x1039, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) retry donretarg_20_294: .word 0x81983d8b ! 335: WRHPR_HPSTATE_I wrhpr %r0, 0x1d8b, %hpstate splash_tba_20_295: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x1, %r18 splash_cmpr_20_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_296)+8 , 16, 16)) -> intp(0,0,5,*,960,*,72,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_296)&0xffffffff)+8 , 16, 16)) -> intp(7,0,18,*,760,*,72,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_20_297: nop nop ta T_CHANGE_HPRIV set 0x28cb116d, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 338: FBPULE fbule,a,pn %fcc0, .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_20_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d903df1 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1df1, %pstate ibp_20_300: nop nop .word 0xc1bfda60 ! 341: STDFA_R stda %f0, [%r0, %r31] .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_20_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_301-donret_20_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00a54d00 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1e5c, %htstate wrhpr %g0, 0x183, %hpstate ! rand=1 (20) done donretarg_20_301: .word 0x2d400001 ! 343: FBPG fbg,a,pn %fcc0, .word 0x19400001 ! 344: FBPUGE fbuge .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_20_303: ta T_CHANGE_NONHPRIV ! macro .word 0x9f802938 ! 346: SIR sir 0x0938 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_304)+8 , 16, 16)) -> intp(4,0,3,*,944,*,a0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_304)&0xffffffff)+8 , 16, 16)) -> intp(4,0,18,*,1000,*,a0,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c95 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c95, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_20_305: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe0a0 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x00a0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 348: BN bn,a mondo_20_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d94400a ! 349: WRPR_WSTATE_R wrpr %r17, %r10, %wstate intveclr_20_307: nop nop ta T_CHANGE_HPRIV setx 0x5d6e776fcd82ee77, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x992, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 350: FBPLG fblg .word 0x9194000d ! 351: WRPR_PIL_R wrpr %r16, %r13, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_309), 16, 16)) -> intp(mask2tid(0x20),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,896,*,*,1) xir_20_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_309: and %g1, 2, %g1 brnz,a %g1, xirwait_20_309 ldx [%r17], %g1 xir_20_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84736a ! 352: WR_CLEAR_SOFTINT_I wr %r17, 0x136a, %clear_softint splash_tba_20_310: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_20_311: rdhpr %halt, %r9 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_20_312: nop nop ta T_CHANGE_HPRIV set 0xf7f4e71f, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_20_313: rdhpr %halt, %r13 .word 0x85880000 ! 356: ALLCLEAN jmptr_20_314: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x8790235b ! 358: WRPR_TT_I wrpr %r0, 0x035b, %tt splash_tba_20_315: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_316), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,952,*,*,1) xir_20_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_316: and %g1, 2, %g1 brnz,a %g1, xirwait_20_316 ldx [%r17], %g1 xir_20_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84aac5 ! 360: WR_CLEAR_SOFTINT_I wr %r18, 0x0ac5, %clear_softint .word 0x14800001 ! 1: BG bg .word 0x8d903766 ! 361: WRPR_PSTATE_I wrpr %r0, 0x1766, %pstate iaw_20_318: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_318: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_318 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_318: brnz %r16, iaw_wait20_318 ld [%r23], %r16 ba iaw_startwait20_318 mov 0x20, %r16 continue_iaw_20_318: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_318: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_318 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_318: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_318 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_318: mov 0x38, %r18 iaw4_20_318: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xa89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdd40 ! 362: LDDFA_R ldda [%r31, %r0], %f0 .word 0x9f802841 ! 363: SIR sir 0x0841 mondo_20_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c00a ! 364: WRPR_WSTATE_R wrpr %r19, %r10, %wstate .word 0xe93fe1f0 ! 365: STDF_I std %f20, [0x01f0, %r31] ibp_20_321: nop nop wrhpr %g0, 0x9d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe89fd000 ! 366: LDDA_R ldda [%r31, %r0] 0x80, %r20 .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_20_322: nop nop ta T_CHANGE_HPRIV setx 0xf2726c682c7350a1, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 369: FBPLG fblg,a,pn %fcc0, ibp_20_323: nop nop wrhpr %g0, 0x588, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdf20 ! 370: LDDFA_R ldda [%r31, %r0], %f16 memptr_20_324: set user_data_start, %r31 .word 0x8581a6ad ! 371: WRCCR_I wr %r6, 0x06ad, %ccr .word 0xe83fe170 ! 372: STD_I std %r20, [%r31 + 0x0170] ibp_20_326: nop nop wrhpr %g0, 0xc43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c2c0 ! 373: CASA_I casa [%r31] 0x16, %r0, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_327), 16, 16)) -> intp(mask2tid(0x20),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,704,*,*,1) xir_20_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_327: and %g1, 2, %g1 brnz,a %g1, xirwait_20_327 ldx [%r17], %g1 xir_20_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8424e7 ! 374: WR_CLEAR_SOFTINT_I wr %r16, 0x04e7, %clear_softint br_badelay2_20_328: .word 0x91a409c7 ! 1: FDIVd fdivd %f16, %f38, %f8 pdist %f16, %f28, %f28 .word 0xa5b44312 ! 375: ALIGNADDRESS alignaddr %r17, %r18, %r18 mondo_20_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d924014 ! 376: WRPR_WSTATE_R wrpr %r9, %r20, %wstate splash_tba_20_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_20_331: nop nop ta T_CHANGE_PRIV setx 0xffffffb4ffffffae, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_20_332: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_20_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d950002 ! 380: WRPR_WSTATE_R wrpr %r20, %r2, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_334)+8 , 16, 16)) -> intp(7,0,23,*,960,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_334)&0xffffffff)+8 , 16, 16)) -> intp(6,0,14,*,712,*,b3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198301d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x101d, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_20_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_335)+8 , 16, 16)) -> intp(3,0,22,*,688,*,6a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_335)&0xffffffff)+8 , 16, 16)) -> intp(0,0,13,*,752,*,6a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_20_336: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0xf41012c4, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_337: .word 0x19400001 ! 384: FBPUGE fbuge brcommon3_20_338: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7c3c0 ! 1: CASA_I casa [%r31] 0x1e, %r0, %r9 ba,a .+8 jmpl %r27-0, %r27 .word 0xc32fe040 ! 385: STXFSR_I st-sfr %f1, [0x0040, %r31] demap_20_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 wrhpr %g0, 0x289, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe1dc ! 386: LDD_I ldd [%r31 + 0x01dc], %r9 iaw_20_340: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_340: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_340 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_340: brnz %r16, iaw_wait20_340 ld [%r23], %r16 ba iaw_startwait20_340 mov 0x20, %r16 continue_iaw_20_340: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_340: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_340 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_340: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_340 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_340: mov 0x38, %r18 iaw2_20_340: rdpr %tba, %r19 mov 0x11, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x503, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd29fdf00 ! 387: LDDA_R ldda [%r31, %r0] 0xf8, %r9 fpinit_20_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009c4 ! 388: FDIVd fdivd %f0, %f4, %f6 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_342) , 16, 16)) -> intp(3,0,31,*,656,*,6b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_342)&0xffffffff) , 16, 16)) -> intp(3,0,11,*,720,*,6b,1) #else set 0x53205874, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803804 ! 1: SIR sir 0x1804 intvec_20_342: .word 0xa9b304d2 ! 389: FCMPNE32 fcmpne32 %d12, %d18, %r20 brcommon2_20_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe7124004 ! 1: LDQF_R - [%r9, %r4], %f19 ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fc3e0 ! 390: LDDFA_R ldda [%r31, %r0], %f0 .word 0xe19fdf20 ! 391: LDDFA_R ldda [%r31, %r0], %f16 splash_lsu_20_344: nop nop ta T_CHANGE_HPRIV set 0xf7344bd4, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_345)+8 , 16, 16)) -> intp(0,0,17,*,1016,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_345)&0xffffffff)+8 , 16, 16)) -> intp(0,0,10,*,760,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983104 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1104, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 iaw_20_346: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_346: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_346 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_346: brnz %r16, iaw_wait20_346 ld [%r23], %r16 ba iaw_startwait20_346 mov 0x20, %r16 continue_iaw_20_346: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_346: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_346 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_346: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_346 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_346: mov 0x38, %r18 iaw1_20_346: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x209, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fc3e0 ! 394: LDDA_R ldda [%r31, %r0] 0x1f, %r16 cancelint_20_347: rdhpr %halt, %r12 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_348: wrhpr %g0, 0xa4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d100 ! 396: CASA_I casa [%r31] 0x88, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_20_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_349-donret_20_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x003fc900 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1d84, %htstate wrhpr %g0, 0x190, %hpstate ! rand=1 (20) .word 0x04cc4001 ! 1: BRLEZ brlez,pt %r17, ldx [%r11+%r0], %g1 done donretarg_20_349: .word 0xa5a2c9ca ! 397: FDIVd fdivd %f42, %f10, %f18 splash_tba_20_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_20_351: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe020 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0020] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde00 ! 399: LDDFA_R ldda [%r31, %r0], %f16 .word 0xd2800b80 ! 400: LDUWA_R lduwa [%r0, %r0] 0x5c, %r9 cwp_20_352: set user_data_start, %o7 .word 0x93902003 ! 401: WRPR_CWP_I wrpr %r0, 0x0003, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_20_354: nop nop ta T_CHANGE_PRIV setx 0xffffffbbffffffac, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_355), 16, 16)) -> intp(mask2tid(0x20),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) xir_20_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_355: and %g1, 2, %g1 brnz,a %g1, xirwait_20_355 ldx [%r17], %g1 xir_20_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84af06 ! 404: WR_CLEAR_SOFTINT_I wr %r18, 0x0f06, %clear_softint brcommon3_20_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 405: BN bn,a frzptr_20_357: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_358) , 16, 16)) -> intp(3,0,8,*,920,*,66,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_358)&0xffffffff) , 16, 16)) -> intp(0,0,14,*,752,*,66,1) #else set 0x5e5051ce, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa9b344c7 ! 1: FCMPNE32 fcmpne32 %d44, %d38, %r20 intvec_20_358: .word 0x9f8028a6 ! 407: SIR sir 0x08a6 .word 0xc19fdc00 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_20_359: nop nop .word 0xc19fdc00 ! 410: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_20_360: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe080 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0080] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9027de ! 411: WRPR_PSTATE_I wrpr %r0, 0x07de, %pstate .word 0x87902331 ! 412: WRPR_TT_I wrpr %r0, 0x0331, %tt frzptr_20_361: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdf20 ! 413: STDFA_R stda %f0, [%r0, %r31] splash_tba_20_362: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_20_363: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_20_364: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d903f85 ! 416: WRPR_PSTATE_I wrpr %r0, 0x1f85, %pstate br_badelay3_20_365: .word 0x34800002 ! 1: BG bg,a .word 0x02800002 ! 1: BE be .word 0xe7140010 ! 1: LDQF_R - [%r16, %r16], %f19 .word 0xa3a08832 ! 417: FADDs fadds %f2, %f18, %f17 intveclr_20_366: nop nop ta T_CHANGE_HPRIV setx 0x4b0037906632a471, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xe88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_20_367: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_20_368: nop nop ta T_CHANGE_HPRIV setx 0x7a0c7ab161b2b4c5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, .word 0x91914008 ! 421: WRPR_PIL_R wrpr %r5, %r8, %pil splash_hpstate_20_370: .word 0x24cc0001 ! 1: BRLEZ brlez,a,pt %r16, .word 0x81983437 ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x1437, %hpstate cancelint_20_371: rdhpr %halt, %r10 .word 0x85880000 ! 423: ALLCLEAN mondo_20_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d94800b ! 424: WRPR_WSTATE_R wrpr %r18, %r11, %wstate .word 0xe6bfc2c0 ! 425: STDA_R stda %r19, [%r31 + %r0] 0x16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_374), 16, 16)) -> intp(mask2tid(0x20),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,920,*,*,1) xir_20_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_374: and %g1, 2, %g1 brnz,a %g1, xirwait_20_374 ldx [%r17], %g1 xir_20_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e7ae ! 426: WR_CLEAR_SOFTINT_I wr %r3, 0x07ae, %clear_softint ibp_20_375: nop nop .word 0x87ac4a48 ! 427: FCMPd fcmpd %fcc, %f48, %f8 .word 0xc1bfe100 ! 428: STDFA_I stda %f0, [0x0100, %r31] nop nop mov 0x1, %r18 splash_cmpr_20_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_376)+8 , 16, 16)) -> intp(2,0,4,*,936,*,6b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_376)&0xffffffff)+8 , 16, 16)) -> intp(6,0,27,*,1008,*,6b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_377), 16, 16)) -> intp(mask2tid(0x20),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,904,*,*,1) xir_20_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_377: and %g1, 2, %g1 brnz,a %g1, xirwait_20_377 ldx [%r17], %g1 xir_20_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab836a27 ! 430: WR_CLEAR_SOFTINT_I wr %r13, 0x0a27, %clear_softint cancelint_20_378: rdhpr %halt, %r19 .word 0x85880000 ! 431: ALLCLEAN splash_tba_20_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_20_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_20_381: rdhpr %halt, %r16 .word 0x85880000 ! 434: ALLCLEAN memptr_20_382: set 0x60340000, %r31 .word 0x8581b3ba ! 435: WRCCR_I wr %r6, 0x13ba, %ccr .word 0x9f80380e ! 436: SIR sir 0x180e .word 0xd037e156 ! 437: STH_I sth %r8, [%r31 + 0x0156] iaw_20_383: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_383: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_383 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_383: brnz %r16, iaw_wait20_383 ld [%r23], %r16 ba iaw_startwait20_383 mov 0x20, %r16 continue_iaw_20_383: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_383: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_383 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_383: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_383 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_383: mov 0x38, %r18 iaw4_20_383: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x359, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe0b0 ! 438: PREFETCHA_I prefetcha [%r31, + 0x00b0] %asi, #24 iaw_20_384: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_384: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_384 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_384: brnz %r16, iaw_wait20_384 ld [%r23], %r16 ba iaw_startwait20_384 mov 0x20, %r16 continue_iaw_20_384: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_384: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_384 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_384: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_384 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_384: mov 0x38, %r18 iaw0_20_384: rd %pc, %r19 add %r19, (16+9), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x198, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdd40 ! 439: LDDA_R ldda [%r31, %r0] 0xea, %r0 ibp_20_385: nop nop .word 0x87a9ca4c ! 440: FCMPd fcmpd %fcc, %f38, %f12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_386), 16, 16)) -> intp(mask2tid(0x20),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,696,*,*,1) xir_20_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_386: and %g1, 2, %g1 brnz,a %g1, xirwait_20_386 ldx [%r17], %g1 xir_20_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab806925 ! 441: WR_CLEAR_SOFTINT_I wr %r1, 0x0925, %clear_softint intveclr_20_387: nop nop ta T_CHANGE_HPRIV setx 0xa842867870af4823, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 442: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_20 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_388: wrhpr %g0, 0x30b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c380 ! 443: CASA_I casa [%r31] 0x1c, %r0, %r13 frzptr_20_389: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc40 ! 444: STDFA_R stda %f16, [%r0, %r31] intveclr_20_390: nop nop ta T_CHANGE_HPRIV setx 0x5159b3146c06d2e8, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x2d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 445: FBPLG fblg,a,pn %fcc0, iaw_20_391: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_391: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_391 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_391: brnz %r16, iaw_wait20_391 ld [%r23], %r16 ba iaw_startwait20_391 mov 0x20, %r16 continue_iaw_20_391: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_391: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_391 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_391: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_391 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_391: mov 0x38, %r18 iaw4_20_391: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7a509c9 ! 446: FDIVd fdivd %f20, %f40, %f50 br_badelay1_20_392: .word 0xd3e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r9 .word 0xd734000b ! 1: STQF_R - %f11, [%r11, %r16] .word 0x3c800001 ! 1: BPOS bpos,a normalw .word 0xa5458000 ! 447: RD_SOFTINT_REG rd %softint, %r18 ibp_20_393: nop nop .word 0xa7a049d0 ! 448: FDIVd fdivd %f32, %f16, %f50 jmptr_20_394: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe1e7d100 ! 450: CASA_I casa [%r31] 0x88, %r0, %r16 memptr_20_396: set user_data_start, %r31 .word 0x85813134 ! 451: WRCCR_I wr %r4, 0x1134, %ccr cancelint_20_397: rdhpr %halt, %r13 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_20_398: nop nop ta T_CHANGE_HPRIV set 0x0195151c, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 453: FBPULE fbule,a,pn %fcc0, brcommon2_20_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe114c013 ! 1: LDQF_R - [%r19, %r19], %f16 ba,a .+8 jmpl %r27-0, %r27 .word 0xc19fde20 ! 454: LDDFA_R ldda [%r31, %r0], %f0 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_20_400: ta T_CHANGE_NONHPRIV ! macro frzptr_20_401: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfda60 ! 456: STDFA_R stda %f16, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_402), 16, 16)) -> intp(mask2tid(0x20),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1008,*,*,1) xir_20_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_402: and %g1, 2, %g1 brnz,a %g1, xirwait_20_402 ldx [%r17], %g1 xir_20_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84aaa9 ! 457: WR_CLEAR_SOFTINT_I wr %r18, 0x0aa9, %clear_softint brcommon3_20_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e0d0 ! 1: STQF_I - %f10, [0x00d0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa7aac834 ! 458: FMOVGE fmovs %fcc1, %f20, %f19 splash_tba_20_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_20_406: .word 0x12800001 ! 1: BNE bne .word 0x97613785 ! Random illegal ? .word 0xa5a489c6 ! 1: FDIVd fdivd %f18, %f6, %f18 .word 0x91a2082b ! 461: FADDs fadds %f8, %f11, %f8 .word 0x9f802c4a ! 462: SIR sir 0x0c4a nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_407)+8 , 16, 16)) -> intp(0,0,17,*,680,*,31,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_407)&0xffffffff)+8 , 16, 16)) -> intp(1,0,1,*,984,*,31,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983440 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1440, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_20_408: set user_data_start, %o7 .word 0x93902005 ! 464: WRPR_CWP_I wrpr %r0, 0x0005, %cwp cancelint_20_409: rdhpr %halt, %r18 .word 0x85880000 ! 465: ALLCLEAN splash_tba_20_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe8800ba0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x5d, %r20 pmu_20_411: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffaf, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_20_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_20_413: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xc32fe180 ! 1: STXFSR_I st-sfr %f1, [0x0180, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 471: BN bn mondo_20_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3c8] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d948013 ! 472: WRPR_WSTATE_R wrpr %r18, %r19, %wstate mondo_20_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3d8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d928014 ! 473: WRPR_WSTATE_R wrpr %r10, %r20, %wstate iaw_20_416: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_416: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_416 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_416: brnz %r16, iaw_wait20_416 ld [%r23], %r16 ba iaw_startwait20_416 mov 0x20, %r16 continue_iaw_20_416: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_416: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_416 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_416: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_416 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_416: mov 0x38, %r18 iaw0_20_416: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x6d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87ac4a42 ! 474: FCMPd fcmpd %fcc, %f48, %f2 mondo_20_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d948008 ! 475: WRPR_WSTATE_R wrpr %r18, %r8, %wstate cancelint_20_418: rdhpr %halt, %r13 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_419), 16, 16)) -> intp(mask2tid(0x20),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,656,*,*,1) xir_20_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_419: and %g1, 2, %g1 brnz,a %g1, xirwait_20_419 ldx [%r17], %g1 xir_20_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843c63 ! 477: WR_CLEAR_SOFTINT_I wr %r16, 0x1c63, %clear_softint jmptr_20_420: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_421: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_421) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,736,*,*,1)') ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_421: wrhpr %g0, 0xb89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 479: RDPC rd %pc, %r16 fpinit_20_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91b00484 ! 480: FCMPLE32 fcmple32 %d0, %d4, %r8 iaw_20_423: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_423: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_423 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_423: brnz %r16, iaw_wait20_423 ld [%r23], %r16 ba iaw_startwait20_423 mov 0x20, %r16 continue_iaw_20_423: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_423: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_423 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_423: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_423 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_423: mov 0x38, %r18 iaw4_20_423: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe9a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe31fe030 ! 481: LDDF_I ldd [%r31, 0x0030], %f17 splash_tba_20_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_20_425: nop nop setx 0xffffffb6ffffffac, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe01c ! 484: STDA_I stda %r17, [%r31 + 0x001c] %asi splash_lsu_20_426: nop nop ta T_CHANGE_HPRIV set 0x60b61934, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 485: FBPULE fbule .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e0ad ! 487: STQF_I - %f17, [0x00ad, %r31] frzptr_20_428: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xe26fe0f0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x00f0] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 488: BN bn,a brcommon3_20_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e0a0 ! 1: STQF_I - %f17, [0x00a0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d90278d ! 489: WRPR_PSTATE_I wrpr %r0, 0x078d, %pstate nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_430: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_430) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,984,*,*,1)') ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_430: wrhpr %g0, 0x590, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 490: RDPC rd %pc, %r18 .word 0xe83fe0f0 ! 491: STD_I std %r20, [%r31 + 0x00f0] .word 0xe81fe120 ! 492: LDD_I ldd [%r31 + 0x0120], %r20 nop nop mov 0x0, %r18 splash_cmpr_20_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_434) , 16, 16)) -> intp(3,0,5,*,904,*,35,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_434)&0xffffffff) , 16, 16)) -> intp(6,0,19,*,720,*,35,1) #else set 0x1a70f9c6, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_434: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5b4c4d3 ! 494: FCMPNE32 fcmpne32 %d50, %d50, %r18 .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_20_436: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_437: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_437) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,760,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_437: wrhpr %g0, 0x802, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 497: RDPC rd %pc, %r13 splash_tba_20_438: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_20_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d91400d ! 499: WRPR_WSTATE_R wrpr %r5, %r13, %wstate brcommon2_20_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x99a00552 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0x81b7c7c0 ! 500: PDIST pdistn %d62, %d0, %d0 .word 0x91908012 ! 501: WRPR_PIL_R wrpr %r2, %r18, %pil ibp_20_442: nop nop .word 0xd73fe040 ! 502: STDF_I std %f11, [0x0040, %r31] cwp_20_443: set user_data_start, %o7 .word 0x93902002 ! 503: WRPR_CWP_I wrpr %r0, 0x0002, %cwp cancelint_20_444: rdhpr %halt, %r16 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e09b ! 505: STF_I st %f9, [0x009b, %r31] brcommon3_20_445: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe0c0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00c0] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902409 ! 506: WRPR_PSTATE_I wrpr %r0, 0x0409, %pstate splash_tba_20_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x6700150, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_447: .word 0x9f80325c ! 508: SIR sir 0x125c intveclr_20_448: nop nop ta T_CHANGE_HPRIV setx 0xdd90dcbadb854970, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x3d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 509: FBPLG fblg memptr_20_449: set 0x60340000, %r31 .word 0x85847864 ! 510: WRCCR_I wr %r17, 0x1864, %ccr nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_450: wrhpr %g0, 0xa9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d920 ! 511: CASA_I casa [%r31] 0xc9, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_451: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_451) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,912,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_451: wrhpr %g0, 0x3c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 512: RDPC rd %pc, %r10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_452) , 16, 16)) -> intp(6,0,2,*,976,*,68,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_452)&0xffffffff) , 16, 16)) -> intp(1,0,24,*,648,*,68,1) #else set 0xbcf00f5b, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x93b444cb ! 1: FCMPNE32 fcmpne32 %d48, %d42, %r9 intvec_20_452: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93b504cd ! 513: FCMPNE32 fcmpne32 %d20, %d44, %r9 nop nop set 0xd0c08285, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93b484d1 ! 1: FCMPNE32 fcmpne32 %d18, %d48, %r9 intvec_20_453: .word 0x91a209cb ! 514: FDIVd fdivd %f8, %f42, %f8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_454)+8 , 16, 16)) -> intp(1,0,15,*,656,*,f9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_454)&0xffffffff)+8 , 16, 16)) -> intp(1,0,31,*,688,*,f9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819822b6 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x02b6, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_20_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d91c00b ! 516: WRPR_WSTATE_R wrpr %r7, %r11, %wstate pmu_20_456: nop nop setx 0xffffffb0ffffffa0, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_20_457: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e120 ! 1: STQF_I - %f9, [0x0120, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd29fd160 ! 518: LDDA_R ldda [%r31, %r0] 0x8b, %r9 pmu_20_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffab, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xcd20282d, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_459: .word 0x97a4c9d3 ! 520: FDIVd fdivd %f50, %f50, %f42 .word 0xd6dfd040 ! 521: LDXA_R ldxa [%r31, %r0] 0x82, %r11 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_20_461: ta T_CHANGE_NONHPRIV ! macro iaw_20_462: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_462: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_462 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_462: brnz %r16, iaw_wait20_462 ld [%r23], %r16 ba iaw_startwait20_462 mov 0x20, %r16 continue_iaw_20_462: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_462: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_462 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_462: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_462 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_462: mov 0x38, %r18 iaw4_20_462: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x799, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91b447d3 ! 523: PDIST pdistn %d48, %d50, %d8 nop nop mov 0x1, %r18 splash_cmpr_20_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_463)+8 , 16, 16)) -> intp(1,0,8,*,896,*,f4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_463)&0xffffffff)+8 , 16, 16)) -> intp(3,0,29,*,712,*,f4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 iaw_20_464: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_464: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_464 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_464: brnz %r16, iaw_wait20_464 ld [%r23], %r16 ba iaw_startwait20_464 mov 0x20, %r16 continue_iaw_20_464: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_464: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_464 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_464: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_464 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_464: mov 0x38, %r18 iaw0_20_464: rd %pc, %r19 add %r19, (16+9), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x502, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fda60 ! 525: LDDA_R ldda [%r31, %r0] 0xd3, %r0 br_longdelay3_20_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f802d69 ! 526: SIR sir 0x0d69 frzptr_20_466: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 527: BN bn,a .word 0xd03fe160 ! 528: STD_I std %r8, [%r31 + 0x0160] .word 0x81983b6c ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x1b6c, %hpstate .word 0x01400001 ! 1: FBPN fbn .word 0x8d902c81 ! 530: WRPR_PSTATE_I wrpr %r0, 0x0c81, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, .word 0x8d903e57 ! 532: WRPR_PSTATE_I wrpr %r0, 0x1e57, %pstate brcommon3_20_471: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e1d0 ! 1: STQF_I - %f8, [0x01d0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd11fe110 ! 533: LDDF_I ldd [%r31, 0x0110], %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_472) , 16, 16)) -> intp(7,0,28,*,952,*,78,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_472)&0xffffffff) , 16, 16)) -> intp(0,0,28,*,1008,*,78,1) #else set 0x793090b6, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99a4c9d4 ! 1: FDIVd fdivd %f50, %f20, %f12 intvec_20_472: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3b4c4d3 ! 534: FCMPNE32 fcmpne32 %d50, %d50, %r17 .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe697c3c0 ! 536: LDUHA_R lduha [%r31, %r0] 0x1e, %r19 jmptr_20_474: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_20_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_475-donret_20_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b27600 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1ec7, %htstate best_set_reg(0xa93, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) done .align 2048 donretarg_20_475: .word 0x81983dcd ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x1dcd, %hpstate trapasi_20_476: nop mov 0x3d8, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_477), 16, 16)) -> intp(mask2tid(0x20),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) xir_20_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_477: and %g1, 2, %g1 brnz,a %g1, xirwait_20_477 ldx [%r17], %g1 xir_20_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82fb52 ! 540: WR_CLEAR_SOFTINT_I wr %r11, 0x1b52, %clear_softint .word 0x3c800001 ! 1: BPOS bpos,a .word 0x8d9038a4 ! 541: WRPR_PSTATE_I wrpr %r0, 0x18a4, %pstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_20 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_479: wrhpr %g0, 0x89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c400 ! 542: CASA_I casa [%r31] 0x20, %r0, %r19 mondo_20_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3d8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d934007 ! 543: WRPR_WSTATE_R wrpr %r13, %r7, %wstate .word 0xa3520000 ! 544: RDPR_PIL rdpr %pil, %r17 iaw_20_481: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_481: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_481 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_481: brnz %r16, iaw_wait20_481 ld [%r23], %r16 ba iaw_startwait20_481 mov 0x20, %r16 continue_iaw_20_481: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_481: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_481 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_481: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_481 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_481: mov 0x38, %r18 iaw1_20_481: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x40, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe13fe0c0 ! 545: STDF_I std %f16, [0x00c0, %r31] .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_20_482: ta T_CHANGE_NONPRIV ! macro cancelint_20_483: rdhpr %halt, %r18 .word 0x85880000 ! 547: ALLCLEAN splash_tba_20_484: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_20_485: nop nop ta T_CHANGE_HPRIV mov 0xb9d, %r20 mov 0x1a, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x498, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdb20 ! 549: LDDA_R ldda [%r31, %r0] 0xd9, %r0 .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_20_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f wrhpr %g0, 0xa99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe08a ! 552: LDD_I ldd [%r31 + 0x008a], %r19 mondo_20_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d904012 ! 553: WRPR_WSTATE_R wrpr %r1, %r18, %wstate .word 0x9f802814 ! 554: SIR sir 0x0814 iaw_20_490: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_490: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_490 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_490: brnz %r16, iaw_wait20_490 ld [%r23], %r16 ba iaw_startwait20_490 mov 0x20, %r16 continue_iaw_20_490: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_490: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_490 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_490: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_490 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_490: mov 0x38, %r18 iaw1_20_490: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdd40 ! 555: LDDFA_R ldda [%r31, %r0], %f16 memptr_20_491: set 0x60140000, %r31 .word 0x85836cbc ! 556: WRCCR_I wr %r13, 0x0cbc, %ccr nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_492: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_492) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,744,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_492: wrhpr %g0, 0x340, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 557: RDPC rd %pc, %r13 ibp_20_493: nop nop wrhpr %g0, 0x9cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c2c0 ! 558: CASA_I casa [%r31] 0x16, %r0, %r20 .word 0x08800001 ! 559: BLEU bleu .word 0xc1bfdf20 ! 560: STDFA_R stda %f0, [%r0, %r31] ibp_20_495: nop nop wrhpr %g0, 0x1c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdc40 ! 561: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_496) , 16, 16)) -> intp(1,0,15,*,728,*,78,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_496)&0xffffffff) , 16, 16)) -> intp(6,0,10,*,744,*,78,1) #else set 0x2c0938e, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_496: .word 0x91b284d0 ! 562: FCMPNE32 fcmpne32 %d10, %d16, %r8 frzptr_20_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 563: BN bn,a memptr_20_498: set user_data_start, %r31 .word 0x85826487 ! 564: WRCCR_I wr %r9, 0x0487, %ccr iaw_20_499: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_499: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_499 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_499: brnz %r16, iaw_wait20_499 ld [%r23], %r16 ba iaw_startwait20_499 mov 0x20, %r16 continue_iaw_20_499: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_499: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_499 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_499: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_499 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_499: mov 0x38, %r18 iaw1_20_499: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9702101 ! 565: POPC_I popc 0x0101, %r20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_500) , 16, 16)) -> intp(2,0,28,*,936,*,f5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_500)&0xffffffff) , 16, 16)) -> intp(2,0,13,*,976,*,f5,1) #else set 0xe530afc2, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_500: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 566: FBPUGE fbuge,a,pn %fcc0, jmptr_20_501: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_502: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_502) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,968,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_502: wrhpr %g0, 0xad9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 568: RDPC rd %pc, %r13 nop nop ta T_CHANGE_HPRIV ! macro donret_20_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_503-donret_20_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f29d00 | (32 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xd4b, %htstate best_set_reg(0x593, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) done donretarg_20_503: .word 0xa9a189cc ! 569: FDIVd fdivd %f6, %f12, %f20 frzptr_20_504: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0x9f80374a ! 571: SIR sir 0x174a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_505), 16, 16)) -> intp(mask2tid(0x20),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) xir_20_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_505: and %g1, 2, %g1 brnz,a %g1, xirwait_20_505 ldx [%r17], %g1 xir_20_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab827521 ! 572: WR_CLEAR_SOFTINT_I wr %r9, 0x1521, %clear_softint frzptr_20_506: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdc00 ! 573: LDDFA_R ldda [%r31, %r0], %f16 cancelint_20_507: rdhpr %halt, %r20 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_508) , 16, 16)) -> intp(5,0,28,*,936,*,a9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_508)&0xffffffff) , 16, 16)) -> intp(7,0,27,*,696,*,a9,1) #else set 0xdd03513, %r28 !TTID : 5 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a409d2 ! 1: FDIVd fdivd %f16, %f18, %f16 intvec_20_508: .word 0x91b2c4d2 ! 575: FCMPNE32 fcmpne32 %d42, %d18, %r8 cancelint_20_509: rdhpr %halt, %r18 .word 0x85880000 ! 576: ALLCLEAN .word 0x81982d17 ! 577: WRHPR_HPSTATE_I wrhpr %r0, 0x0d17, %hpstate .word 0x87902096 ! 578: WRPR_TT_I wrpr %r0, 0x0096, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_511), 16, 16)) -> intp(mask2tid(0x20),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,984,*,*,1) xir_20_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_511: and %g1, 2, %g1 brnz,a %g1, xirwait_20_511 ldx [%r17], %g1 xir_20_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80be76 ! 579: WR_CLEAR_SOFTINT_I wr %r2, 0x1e76, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_512) , 16, 16)) -> intp(4,0,30,*,960,*,36,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_512)&0xffffffff) , 16, 16)) -> intp(1,0,1,*,752,*,36,1) #else set 0xbcc09570, %r28 !TTID : 5 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_512: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x91a249c2 ! 580: FDIVd fdivd %f40, %f2, %f8 brcommon3_20_513: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902ed3 ! 581: WRPR_PSTATE_I wrpr %r0, 0x0ed3, %pstate .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_20_514: ta T_CHANGE_NONHPRIV ! macro .word 0xe697c180 ! 583: LDUHA_R lduha [%r31, %r0] 0x0c, %r19 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_20 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_516: wrhpr %g0, 0xc1b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c180 ! 584: CASA_I casa [%r31] 0x c, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_517: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_517) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,976,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_517: wrhpr %g0, 0x2c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 585: RDPC rd %pc, %r20 cancelint_20_518: rdhpr %halt, %r16 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_519: wrhpr %g0, 0xbcb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7dc40 ! 587: CASA_I casa [%r31] 0xe2, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_520: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_520) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,672,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_520: wrhpr %g0, 0xc10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 588: RDPC rd %pc, %r12 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d9039dd ! 590: WRPR_PSTATE_I wrpr %r0, 0x19dd, %pstate br_badelay2_20_523: .word 0x32800001 ! 1: BNE bne,a pdist %f10, %f28, %f18 .word 0x97b4c303 ! 591: ALIGNADDRESS alignaddr %r19, %r3, %r11 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_524) , 16, 16)) -> intp(1,0,19,*,984,*,fb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_524)&0xffffffff) , 16, 16)) -> intp(2,0,12,*,744,*,fb,1) #else set 0x816071c8, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_524: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802bfc ! 592: SIR sir 0x0bfc nop nop mov 0x0, %r18 splash_cmpr_20_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 593: SIAM siam 1 memptr_20_526: set 0x60540000, %r31 .word 0x85807bfb ! 594: WRCCR_I wr %r1, 0x1bfb, %ccr frzptr_20_527: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfdb20 ! 595: STDFA_R stda %f16, [%r0, %r31] .word 0xc30fc000 ! 596: LDXFSR_R ld-fsr [%r31, %r0], %f1 splash_hpstate_20_529: .word 0x34800002 ! 1: BG bg,a .word 0x81983f9d ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x1f9d, %hpstate .word 0xe527e0fa ! 598: STF_I st %f18, [0x00fa, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_530), 16, 16)) -> intp(mask2tid(0x20),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,688,*,*,1) xir_20_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_530: and %g1, 2, %g1 brnz,a %g1, xirwait_20_530 ldx [%r17], %g1 xir_20_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a93a ! 599: WR_CLEAR_SOFTINT_I wr %r2, 0x093a, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_20_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_531-donret_20_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00df6000 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1889, %htstate best_set_reg(0x3f9, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) ldx [%r11+%r0], %g1 done donretarg_20_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_532)+8 , 16, 16)) -> intp(7,0,1,*,976,*,76,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_532)&0xffffffff)+8 , 16, 16)) -> intp(4,0,30,*,952,*,76,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f1d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f1d, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x7bf0d952, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_533: .word 0x9f8025fb ! 602: SIR sir 0x05fb splash_hpstate_20_534: .word 0x02ccc001 ! 1: BRZ brz,pt %r19, .word 0x81983b8f ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x1b8f, %hpstate .word 0x99a449c2 ! 604: FDIVd fdivd %f48, %f2, %f12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_536), 16, 16)) -> intp(mask2tid(0x20),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) xir_20_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_536: and %g1, 2, %g1 brnz,a %g1, xirwait_20_536 ldx [%r17], %g1 xir_20_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84624f ! 605: WR_CLEAR_SOFTINT_I wr %r17, 0x024f, %clear_softint mondo_20_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d940006 ! 606: WRPR_WSTATE_R wrpr %r16, %r6, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_538) , 16, 16)) -> intp(5,0,28,*,920,*,e9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_538)&0xffffffff) , 16, 16)) -> intp(1,0,17,*,1008,*,e9,1) #else set 0xf8006045, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_538: .word 0xa9a489d0 ! 607: FDIVd fdivd %f18, %f16, %f20 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_539: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_539) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,648,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_539: wrhpr %g0, 0xf88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 608: RDPC rd %pc, %r8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_540) , 16, 16)) -> intp(2,0,16,*,920,*,31,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_540)&0xffffffff) , 16, 16)) -> intp(4,0,18,*,1016,*,31,1) #else set 0xda504376, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa3b084c5 ! 1: FCMPNE32 fcmpne32 %d2, %d36, %r17 intvec_20_540: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa1a449c6 ! 609: FDIVd fdivd %f48, %f6, %f16 nop nop ta T_CHANGE_HPRIV ! macro donret_20_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_541-donret_20_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x005ea200 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xe05, %htstate best_set_reg(0x1ef9, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) done donretarg_20_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_542: wrhpr %g0, 0x218, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 611: CASA_I casa [%r31] 0xc9, %r0, %r8 ibp_20_543: nop nop wrhpr %g0, 0x8d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fc2c0 ! 612: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8d903131 ! 613: WRPR_PSTATE_I wrpr %r0, 0x1131, %pstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_20 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_545: wrhpr %g0, 0x2d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c2c0 ! 614: CASA_I casa [%r31] 0x16, %r0, %r8 jmptr_20_546: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 iaw_20_547: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_547: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_547 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_547: brnz %r16, iaw_wait20_547 ld [%r23], %r16 ba iaw_startwait20_547 mov 0x20, %r16 continue_iaw_20_547: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_547: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_547 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_547: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_547 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_547: mov 0x38, %r18 iaw1_20_547: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x582, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3b2c484 ! 616: FCMPLE32 fcmple32 %d42, %d4, %r17 .word 0xe737e130 ! 617: STQF_I - %f19, [0x0130, %r31] .word 0x3a780001 ! 618: BPCC ibp_20_548: nop nop wrhpr %g0, 0xc8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800002 ! 619: BN bn iaw_20_549: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_549: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_549 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_549: brnz %r16, iaw_wait20_549 ld [%r23], %r16 ba iaw_startwait20_549 mov 0x20, %r16 continue_iaw_20_549: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_549: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_549 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_549: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_549 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_549: mov 0x38, %r18 iaw3_20_549: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x680, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91b507c4 ! 620: PDIST pdistn %d20, %d4, %d8 .word 0xda1fe020 ! 621: LDD_I ldd [%r31 + 0x0020], %r13 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_551: wrhpr %g0, 0xc0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d160 ! 622: CASA_I casa [%r31] 0x8b, %r0, %r13 mondo_20_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948005 ! 623: WRPR_WSTATE_R wrpr %r18, %r5, %wstate intveclr_20_553: nop nop ta T_CHANGE_HPRIV setx 0xe66b5aab8fdffaf4, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 624: FBPLG fblg splash_tba_20_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_555: wrhpr %g0, 0x681, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c280 ! 626: CASA_I casa [%r31] 0x14, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_556) , 16, 16)) -> intp(5,0,29,*,952,*,f2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_556)&0xffffffff) , 16, 16)) -> intp(0,0,26,*,992,*,f2,1) #else set 0xc400eab9, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803688 ! 627: SIR sir 0x1688 mondo_20_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d91400d ! 628: WRPR_WSTATE_R wrpr %r5, %r13, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0xf9f0b346, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa1b4c4cb ! 1: FCMPNE32 fcmpne32 %d50, %d42, %r16 intvec_20_559: .word 0x9f803de2 ! 630: SIR sir 0x1de2 frzptr_20_560: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 631: BN bn,a splash_tba_20_561: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_20_562: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_563: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_563) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,656,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_563: wrhpr %g0, 0x108, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 634: RDPC rd %pc, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_564), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,648,*,*,1) xir_20_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_564: and %g1, 2, %g1 brnz,a %g1, xirwait_20_564 ldx [%r17], %g1 xir_20_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a13f ! 635: WR_CLEAR_SOFTINT_I wr %r10, 0x013f, %clear_softint ibp_20_565: nop nop wrhpr %g0, 0x85a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fe0e0 ! 636: STXFSR_I st-sfr %f1, [0x00e0, %r31] iaw_20_566: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_566: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_566 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_566: brnz %r16, iaw_wait20_566 ld [%r23], %r16 ba iaw_startwait20_566 mov 0x20, %r16 continue_iaw_20_566: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_566: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_566 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_566: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_566 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_566: mov 0x38, %r18 iaw4_20_566: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87ac0a4c ! 637: FCMPd fcmpd %fcc, %f16, %f12 splash_lsu_20_567: nop nop ta T_CHANGE_HPRIV set 0xbb91ce7f, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x26c98002 ! 1: BRLZ brlz,a,pt %r6, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_20_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x97a00553 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xe19fda00 ! 639: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0x9170a972, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_569: .word 0x9ba289d2 ! 640: FDIVd fdivd %f10, %f18, %f44 .word 0x91924011 ! 641: WRPR_PIL_R wrpr %r9, %r17, %pil nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_571: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_571) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,736,*,*,1)') ifelse(4,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_571: wrhpr %g0, 0x903, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 642: RDPC rd %pc, %r16 .word 0xd33fe1c9 ! 643: STDF_I std %f9, [0x01c9, %r31] .word 0xc19fdf20 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_572), 16, 16)) -> intp(mask2tid(0x20),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,920,*,*,1) xir_20_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_572: and %g1, 2, %g1 brnz,a %g1, xirwait_20_572 ldx [%r17], %g1 xir_20_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852154 ! 645: WR_CLEAR_SOFTINT_I wr %r20, 0x0154, %clear_softint .word 0xe19fda00 ! 646: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0x3be0f895, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_573: .word 0x99b504c1 ! 647: FCMPNE32 fcmpne32 %d20, %d32, %r12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_574), 16, 16)) -> intp(mask2tid(0x20),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,896,*,*,1) xir_20_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_574: and %g1, 2, %g1 brnz,a %g1, xirwait_20_574 ldx [%r17], %g1 xir_20_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fc99 ! 648: WR_CLEAR_SOFTINT_I wr %r19, 0x1c99, %clear_softint ibp_20_575: nop nop wrhpr %g0, 0xf81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdadfc3c0 ! 649: LDXA_R ldxa [%r31, %r0] 0x1e, %r13 splash_tba_20_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_20_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d950010 ! 651: WRPR_WSTATE_R wrpr %r20, %r16, %wstate .word 0xdadfc200 ! 652: LDXA_R ldxa [%r31, %r0] 0x10, %r13 splash_tba_20_579: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_20_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 wrhpr %g0, 0x443, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe08c ! 654: LDD_I ldd [%r31 + 0x008c], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_20_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d918004 ! 656: WRPR_WSTATE_R wrpr %r6, %r4, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_583), 16, 16)) -> intp(mask2tid(0x20),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,664,*,*,1) xir_20_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_583: and %g1, 2, %g1 brnz,a %g1, xirwait_20_583 ldx [%r17], %g1 xir_20_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a2ba ! 657: WR_CLEAR_SOFTINT_I wr %r18, 0x02ba, %clear_softint demap_20_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 wrhpr %g0, 0x792, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe090 ! 658: LDD_I ldd [%r31 + 0x0090], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] .word 0xa7b28330 ! 660: BMASK bmask %r10, %r16, %r19 dvapa_20_586: nop nop ta T_CHANGE_HPRIV mov 0x8e8, %r20 mov 0x1b, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x850, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfda60 ! 661: STDA_R stda %r0, [%r31 + %r0] 0xd3 frzptr_20_587: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 662: BN bn,a frzptr_20_588: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_589), 16, 16)) -> intp(mask2tid(0x20),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) xir_20_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_589: and %g1, 2, %g1 brnz,a %g1, xirwait_20_589 ldx [%r17], %g1 xir_20_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81edea ! 664: WR_CLEAR_SOFTINT_I wr %r7, 0x0dea, %clear_softint .word 0xa97026b9 ! 665: POPC_I popc 0x06b9, %r20 .word 0xd8bfe0bc ! 666: STDA_I stda %r12, [%r31 + 0x00bc] %asi frzptr_20_590: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800002 ! 667: BN bn,a mondo_20_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3d8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d914006 ! 668: WRPR_WSTATE_R wrpr %r5, %r6, %wstate nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_592: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_592) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,648,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_592: wrhpr %g0, 0x911, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 669: RDPC rd %pc, %r18 pmu_20_593: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffad, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f8022a6 ! 671: SIR sir 0x02a6 mondo_20_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3d8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d924003 ! 672: WRPR_WSTATE_R wrpr %r9, %r3, %wstate jmptr_20_595: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_596)+8 , 16, 16)) -> intp(7,0,11,*,760,*,a8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_596)&0xffffffff)+8 , 16, 16)) -> intp(5,0,16,*,688,*,a8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982304 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0304, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_597), 16, 16)) -> intp(mask2tid(0x20),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1008,*,*,1) xir_20_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_597: and %g1, 2, %g1 brnz,a %g1, xirwait_20_597 ldx [%r17], %g1 xir_20_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8167fc ! 675: WR_CLEAR_SOFTINT_I wr %r5, 0x07fc, %clear_softint .word 0xe927e0e5 ! 676: STF_I st %f20, [0x00e5, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_598) , 16, 16)) -> intp(7,0,0,*,1008,*,6e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_598)&0xffffffff) , 16, 16)) -> intp(6,0,12,*,1016,*,6e,1) #else set 0xb1c0542b, %r28 !TTID : 4 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_598: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80318e ! 677: SIR sir 0x118e nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_20 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_599: wrhpr %g0, 0x20b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d060 ! 678: CASA_I casa [%r31] 0x83, %r0, %r13 frzptr_20_600: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe130 ! 1: STXFSR_I st-sfr %f1, [0x0130, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 679: BN bn,a iaw_20_601: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_601: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_601 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_601: brnz %r16, iaw_wait20_601 ld [%r23], %r16 ba iaw_startwait20_601 mov 0x20, %r16 continue_iaw_20_601: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_601: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_601 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_601: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_601 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_601: mov 0x38, %r18 iaw1_20_601: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x582, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1702896 ! 680: POPC_I popc 0x0896, %r16 nop nop mov 0x1, %r18 splash_cmpr_20_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_602)+8 , 16, 16)) -> intp(1,0,30,*,992,*,e6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_602)&0xffffffff)+8 , 16, 16)) -> intp(6,0,11,*,992,*,e6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 681: SIAM siam 1 demap_20_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f wrhpr %g0, 0x1d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe18c ! 682: LDD_I ldd [%r31 + 0x018c], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_20_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_604-donret_20_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x004f8f00 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1787, %htstate wrhpr %g0, 0x202, %hpstate ! rand=1 (20) .word 0x03400001 ! 1: FBPNE fbne retry donretarg_20_604: .word 0xd66fe1c2 ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x01c2] .word 0xd7e7d000 ! 684: CASA_I casa [%r31] 0x80, %r0, %r11 .word 0x91910005 ! 685: WRPR_PIL_R wrpr %r4, %r5, %pil nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_607: wrhpr %g0, 0xe0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7dd40 ! 686: CASA_I casa [%r31] 0xea, %r0, %r11 .word 0x99b48585 ! 687: FCMPGT32 fcmpgt32 %d18, %d36, %r12 mondo_20_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c011 ! 688: WRPR_WSTATE_R wrpr %r19, %r17, %wstate cwp_20_609: set user_data_start, %o7 .word 0x93902002 ! 689: WRPR_CWP_I wrpr %r0, 0x0002, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d9037c7 ! 691: WRPR_PSTATE_I wrpr %r0, 0x17c7, %pstate .word 0xc1bfe100 ! 692: STDFA_I stda %f0, [0x0100, %r31] .word 0x22c84001 ! 1: BRZ brz,a,pt %r1, .word 0x8d903465 ! 693: WRPR_PSTATE_I wrpr %r0, 0x1465, %pstate nop nop mov 0x1, %r18 splash_cmpr_20_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_612)+8 , 16, 16)) -> intp(6,0,17,*,912,*,79,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_612)&0xffffffff)+8 , 16, 16)) -> intp(2,0,22,*,968,*,79,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_20_613: .word 0x8198265a ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x065a, %hpstate iaw_20_614: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_614: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_614 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_614: brnz %r16, iaw_wait20_614 ld [%r23], %r16 ba iaw_startwait20_614 mov 0x20, %r16 continue_iaw_20_614: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_614: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_614 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_614: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_614 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_614: mov 0x38, %r18 iaw4_20_614: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x188, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87aa8a4b ! 696: FCMPd fcmpd %fcc, %f10, %f42 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_20 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_615: wrhpr %g0, 0xf10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d000 ! 697: CASA_I casa [%r31] 0x80, %r0, %r16 brcommon2_20_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa5a00554 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 698: PDIST pdistn %d62, %d0, %d16 .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xa9520000 ! 700: RDPR_PIL rdpr %pil, %r20 mondo_20_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d94000b ! 701: WRPR_WSTATE_R wrpr %r16, %r11, %wstate iaw_20_618: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_618: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_618 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_618: brnz %r16, iaw_wait20_618 ld [%r23], %r16 ba iaw_startwait20_618 mov 0x20, %r16 continue_iaw_20_618: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_618: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_618 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_618: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_618 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_618: mov 0x38, %r18 iaw1_20_618: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x501, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd497df00 ! 702: LDUHA_R lduha [%r31, %r0] 0xf8, %r10 .word 0xd4800ae0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x57, %r10 splash_lsu_20_619: nop nop ta T_CHANGE_HPRIV set 0x7c733ba8, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x02cc4001 ! 1: BRZ brz,pt %r17, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 704: FBPULE fbule intveclr_20_620: nop nop ta T_CHANGE_HPRIV setx 0x8507db2ca87377bb, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_20_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_621-donret_20_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00452900 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x140e, %htstate wrhpr %g0, 0xb18, %hpstate ! rand=1 (20) .word 0x22c98001 ! 1: BRZ brz,a,pt %r6, done donretarg_20_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_20_622: set user_data_start, %o7 .word 0x93902007 ! 707: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xe1bfdf00 ! 708: STDFA_R stda %f16, [%r0, %r31] frzptr_20_623: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xc19fdc00 ! 709: LDDFA_R ldda [%r31, %r0], %f0 intveclr_20_624: nop nop ta T_CHANGE_HPRIV setx 0x3a7b0a05b491d15f, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x192, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 710: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_625: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_625) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,664,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_625: wrhpr %g0, 0x288, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 711: RDPC rd %pc, %r8 iaw_20_626: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_626: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_626 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_626: brnz %r16, iaw_wait20_626 ld [%r23], %r16 ba iaw_startwait20_626 mov 0x20, %r16 continue_iaw_20_626: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_626: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_626 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_626: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_626 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_626: mov 0x38, %r18 iaw1_20_626: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfc3c0 ! 712: STDA_R stda %r16, [%r31 + %r0] 0x1e splash_lsu_20_627: nop nop ta T_CHANGE_HPRIV set 0x4e49616d, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x04800001 ! 1: BLE ble stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 713: FBPULE fbule,a,pn %fcc0, mondo_20_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d914010 ! 714: WRPR_WSTATE_R wrpr %r5, %r16, %wstate .word 0x8d903e2d ! 715: WRPR_PSTATE_I wrpr %r0, 0x1e2d, %pstate .word 0x9f8024b7 ! 716: SIR sir 0x04b7 iaw_20_630: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_630: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_630 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_630: brnz %r16, iaw_wait20_630 ld [%r23], %r16 ba iaw_startwait20_630 mov 0x20, %r16 continue_iaw_20_630: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_630: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_630 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_630: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_630 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_630: mov 0x38, %r18 iaw4_20_630: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x499, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe01fe070 ! 717: LDD_I ldd [%r31 + 0x0070], %r16 nop nop set 0x37203fe8, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803c8a ! 1: SIR sir 0x1c8a intvec_20_631: .word 0xa3a509d1 ! 718: FDIVd fdivd %f20, %f48, %f48 iaw_20_632: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_632: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_632 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_632: brnz %r16, iaw_wait20_632 ld [%r23], %r16 ba iaw_startwait20_632 mov 0x20, %r16 continue_iaw_20_632: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_632: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_632 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_632: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_632 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_632: mov 0x38, %r18 iaw0_20_632: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x5c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd6dfc080 ! 719: LDXA_R ldxa [%r31, %r0] 0x04, %r11 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_633: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_633) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,744,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,664,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_633: wrhpr %g0, 0x611, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 720: RDPC rd %pc, %r17 mondo_20_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d924013 ! 721: WRPR_WSTATE_R wrpr %r9, %r19, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_635), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) xir_20_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_635: and %g1, 2, %g1 brnz,a %g1, xirwait_20_635 ldx [%r17], %g1 xir_20_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f588 ! 722: WR_CLEAR_SOFTINT_I wr %r7, 0x1588, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_636: wrhpr %g0, 0x109, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c6c0 ! 723: CASA_I casa [%r31] 0x36, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_637: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_637) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,936,*,*,1)') ifelse(0,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_637: wrhpr %g0, 0x342, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 724: RDPC rd %pc, %r17 jmptr_20_638: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 iaw_20_639: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_639: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_639 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_639: brnz %r16, iaw_wait20_639 ld [%r23], %r16 ba iaw_startwait20_639 mov 0x20, %r16 continue_iaw_20_639: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_639: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_639 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_639: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_639 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_639: mov 0x38, %r18 iaw4_20_639: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe01, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfda60 ! 726: STDA_R stda %r0, [%r31 + %r0] 0xd3 .word 0xd8800c00 ! 727: LDUWA_R lduwa [%r0, %r0] 0x60, %r12 nop nop mov 0x1, %r18 splash_cmpr_20_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_640)+8 , 16, 16)) -> intp(7,0,17,*,648,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_640)&0xffffffff)+8 , 16, 16)) -> intp(4,0,21,*,944,*,b3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x1, %r18 splash_cmpr_20_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_642)+8 , 16, 16)) -> intp(3,0,28,*,696,*,72,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_642)&0xffffffff)+8 , 16, 16)) -> intp(3,0,27,*,696,*,72,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 730: SIAM siam 1 cancelint_20_643: rdhpr %halt, %r20 .word 0x85880000 ! 731: ALLCLEAN iaw_20_644: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_644: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_644 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_644: brnz %r16, iaw_wait20_644 ld [%r23], %r16 ba iaw_startwait20_644 mov 0x20, %r16 continue_iaw_20_644: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_644: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_644 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_644: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_644 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_644: mov 0x38, %r18 iaw2_20_644: rdpr %tba, %r19 mov 0x211, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x511, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe89fd920 ! 732: LDDA_R ldda [%r31, %r0] 0xc9, %r20 splash_hpstate_20_645: .word 0x8198265d ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x065d, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_646) , 16, 16)) -> intp(7,0,29,*,944,*,62,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_646)&0xffffffff) , 16, 16)) -> intp(6,0,20,*,912,*,62,1) #else set 0x76b07740, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a049d1 ! 1: FDIVd fdivd %f32, %f48, %f18 intvec_20_646: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80224f ! 734: SIR sir 0x024f .word 0x91920005 ! 735: WRPR_PIL_R wrpr %r8, %r5, %pil br_longdelay1_20_648: .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, .word 0xbfe7c000 ! 736: SAVE_R save %r31, %r0, %r31 splash_lsu_20_649: nop nop ta T_CHANGE_HPRIV set 0x79e20f48, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 737: FBPULE fbule,a,pn %fcc0, splash_tba_20_650: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fdd40 ! 739: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc19fdf00 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_20_651: nop nop ta T_CHANGE_HPRIV setx 0x889fb2e1643697b4, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 741: FBPLG fblg .word 0xc1bfdd40 ! 742: STDFA_R stda %f0, [%r0, %r31] .word 0x8d903aff ! 743: WRPR_PSTATE_I wrpr %r0, 0x1aff, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_653), 16, 16)) -> intp(mask2tid(0x20),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1008,*,*,1) xir_20_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_653: and %g1, 2, %g1 brnz,a %g1, xirwait_20_653 ldx [%r17], %g1 xir_20_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e32e ! 744: WR_CLEAR_SOFTINT_I wr %r19, 0x032e, %clear_softint iaw_20_654: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_654: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_654 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_654: brnz %r16, iaw_wait20_654 ld [%r23], %r16 ba iaw_startwait20_654 mov 0x20, %r16 continue_iaw_20_654: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_654: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_654 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_654: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_654 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_654: mov 0x38, %r18 iaw4_20_654: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x102, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1b447d0 ! 745: PDIST pdistn %d48, %d16, %d16 iaw_20_655: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_655: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_655 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_655: brnz %r16, iaw_wait20_655 ld [%r23], %r16 ba iaw_startwait20_655 mov 0x20, %r16 continue_iaw_20_655: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_655: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_655 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_655: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_655 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_655: mov 0x38, %r18 iaw4_20_655: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x4c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe8bfd140 ! 746: STDA_R stda %r20, [%r31 + %r0] 0x8a nop nop mov 0x0, %r18 splash_cmpr_20_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 747: SIAM siam 1 .word 0x91947ba1 ! 748: WRPR_PIL_I wrpr %r17, 0x1ba1, %pil mondo_20_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d944014 ! 749: WRPR_WSTATE_R wrpr %r17, %r20, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_659)+8 , 16, 16)) -> intp(5,0,4,*,1000,*,f3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_659)&0xffffffff)+8 , 16, 16)) -> intp(4,0,22,*,952,*,f3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198394f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x194f, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_20_660: rdhpr %halt, %r16 .word 0x85880000 ! 752: ALLCLEAN .word 0x2a780001 ! 753: BPCS .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_20_661: ta T_CHANGE_NONPRIV ! macro frzptr_20_662: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fda00 ! 755: LDDFA_R ldda [%r31, %r0], %f0 jmptr_20_663: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_664)+8 , 16, 16)) -> intp(7,0,12,*,720,*,2b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_664)&0xffffffff)+8 , 16, 16)) -> intp(2,0,19,*,656,*,2b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982fed ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0fed, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_20_665: rdhpr %halt, %r17 .word 0x85880000 ! 758: ALLCLEAN intveclr_20_666: nop nop ta T_CHANGE_HPRIV setx 0xc9ced179143e96cd, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x310, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_20_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d940011 ! 760: WRPR_WSTATE_R wrpr %r16, %r17, %wstate nop nop mov 0x0, %r18 splash_cmpr_20_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 761: SIAM siam 1 .word 0xd09fc280 ! 762: LDDA_R ldda [%r31, %r0] 0x14, %r8 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_20 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_670: wrhpr %g0, 0x389, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c080 ! 763: CASA_I casa [%r31] 0x 4, %r0, %r8 ibp_20_671: nop nop .word 0xd11fe0f0 ! 764: LDDF_I ldd [%r31, 0x00f0], %f8 mondo_20_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d93000d ! 765: WRPR_WSTATE_R wrpr %r12, %r13, %wstate .word 0xd1e7c280 ! 766: CASA_I casa [%r31] 0x14, %r0, %r8 splash_tba_20_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba iaw_20_675: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_675: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_675 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_675: brnz %r16, iaw_wait20_675 ld [%r23], %r16 ba iaw_startwait20_675 mov 0x20, %r16 continue_iaw_20_675: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_675: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_675 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_675: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_675 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_675: mov 0x38, %r18 iaw1_20_675: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x4d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfc3e0 ! 768: STDA_R stda %r16, [%r31 + %r0] 0x1f .word 0x8d902541 ! 769: WRPR_PSTATE_I wrpr %r0, 0x0541, %pstate .word 0xd0bfe0ec ! 770: STDA_I stda %r8, [%r31 + 0x00ec] %asi .word 0xc1bfe1a0 ! 771: STDFA_I stda %f0, [0x01a0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_677: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_677) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,640,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_677: wrhpr %g0, 0xc0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 772: RDPC rd %pc, %r11 br_badelay2_20_678: .word 0x9ba409c4 ! 1: FDIVd fdivd %f16, %f4, %f44 allclean .word 0xa9b40303 ! 773: ALIGNADDRESS alignaddr %r16, %r3, %r20 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_679: wrhpr %g0, 0x6d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d140 ! 774: CASA_I casa [%r31] 0x8a, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_680), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,704,*,*,1) xir_20_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_680: and %g1, 2, %g1 brnz,a %g1, xirwait_20_680 ldx [%r17], %g1 xir_20_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fdff ! 775: WR_CLEAR_SOFTINT_I wr %r19, 0x1dff, %clear_softint splash_lsu_20_681: nop nop ta T_CHANGE_HPRIV set 0x55bcc303, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x04800001 ! 1: BLE ble stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_682), 16, 16)) -> intp(mask2tid(0x20),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) xir_20_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_682: and %g1, 2, %g1 brnz,a %g1, xirwait_20_682 ldx [%r17], %g1 xir_20_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab806012 ! 777: WR_CLEAR_SOFTINT_I wr %r1, 0x0012, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_683)+8 , 16, 16)) -> intp(3,0,22,*,920,*,31,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_683)&0xffffffff)+8 , 16, 16)) -> intp(4,0,19,*,992,*,31,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198340d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x140d, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_20_684: nop nop .word 0xe21fe040 ! 779: LDD_I ldd [%r31 + 0x0040], %r17 .word 0x9f803109 ! 780: SIR sir 0x1109 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_685), 16, 16)) -> intp(mask2tid(0x20),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1008,*,*,1) xir_20_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_685: and %g1, 2, %g1 brnz,a %g1, xirwait_20_685 ldx [%r17], %g1 xir_20_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852557 ! 781: WR_CLEAR_SOFTINT_I wr %r20, 0x0557, %clear_softint .word 0xe19fde00 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_686) , 16, 16)) -> intp(7,0,29,*,688,*,ac,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_686)&0xffffffff) , 16, 16)) -> intp(7,0,6,*,968,*,ac,1) #else set 0xe4d0db15, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_686: .word 0xa3b0c4c7 ! 783: FCMPNE32 fcmpne32 %d34, %d38, %r17 .word 0xe1bfdb40 ! 784: STDFA_R stda %f16, [%r0, %r31] brcommon3_20_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e1c0 ! 1: STQF_I - %f11, [0x01c0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0x95aac824 ! 785: FMOVGE fmovs %fcc1, %f4, %f10 nop nop mov 0x0, %r18 splash_cmpr_20_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 786: SIAM siam 1 ibp_20_689: nop nop .word 0x00800001 ! 787: BN bn .word 0xe027e15c ! 788: STW_I stw %r16, [%r31 + 0x015c] splash_tba_20_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_691: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_691) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,664,*,*,1)') ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_691: wrhpr %g0, 0x74a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 790: RDPC rd %pc, %r19 iaw_20_692: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_692: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_692 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_692: brnz %r16, iaw_wait20_692 ld [%r23], %r16 ba iaw_startwait20_692 mov 0x20, %r16 continue_iaw_20_692: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_692: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_692 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_692: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_692 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_692: mov 0x38, %r18 iaw2_20_692: rdpr %tba, %r19 mov 0x211, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99b087d2 ! 791: PDIST pdistn %d2, %d18, %d12 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_20_693: nop nop ta T_CHANGE_HPRIV setx 0x6e5148b59d47fce8, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 793: FBPLG fblg nop nop ta T_CHANGE_HPRIV ! macro donret_20_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_694-donret_20_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00de9700 | (16 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x15cd, %htstate best_set_reg(0x17e2, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (20) retry .align 2048 donretarg_20_694: .word 0xa3a0c9d2 ! 794: FDIVd fdivd %f34, %f18, %f48 nop nop set 0x6d501bda, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_695: .word 0x9f802db0 ! 795: SIR sir 0x0db0 .word 0xda2fe1ad ! 796: STB_I stb %r13, [%r31 + 0x01ad] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_696) , 16, 16)) -> intp(1,0,19,*,904,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_696)&0xffffffff) , 16, 16)) -> intp(7,0,0,*,664,*,77,1) #else set 0xfa90d2bf, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_696: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8025e6 ! 797: SIR sir 0x05e6 iaw_20_697: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_697: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_697 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_697: brnz %r16, iaw_wait20_697 ld [%r23], %r16 ba iaw_startwait20_697 mov 0x20, %r16 continue_iaw_20_697: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_697: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_697 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_697: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_697 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_697: mov 0x38, %r18 iaw1_20_697: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xed3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a4c9d0 ! 798: FDIVd fdivd %f50, %f16, %f20 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_698)+8 , 16, 16)) -> intp(3,0,9,*,896,*,f3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_698)&0xffffffff)+8 , 16, 16)) -> intp(5,0,23,*,1008,*,f3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819824c3 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x04c3, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0xc4c02dd2, %r28 !TTID : 5 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803831 ! 1: SIR sir 0x1831 intvec_20_699: .word 0x9f8034b7 ! 800: SIR sir 0x14b7 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_700), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,744,*,*,1) xir_20_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_700: and %g1, 2, %g1 brnz,a %g1, xirwait_20_700 ldx [%r17], %g1 xir_20_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab83228d ! 801: WR_CLEAR_SOFTINT_I wr %r12, 0x028d, %clear_softint .word 0xe1bfde00 ! 802: STDFA_R stda %f16, [%r0, %r31] cancelint_20_701: rdhpr %halt, %r8 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_20_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_702)+8 , 16, 16)) -> intp(5,0,2,*,904,*,ee,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_702)&0xffffffff)+8 , 16, 16)) -> intp(1,0,2,*,928,*,ee,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_20_703: ta T_CHANGE_NONHPRIV .word 0x81983f1d ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x1f1d, %hpstate .word 0x9f802380 ! 806: SIR sir 0x0380 nop nop mov 0x1, %r18 splash_cmpr_20_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_704)+8 , 16, 16)) -> intp(4,0,24,*,720,*,b8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_704)&0xffffffff)+8 , 16, 16)) -> intp(3,0,11,*,648,*,b8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_705: wrhpr %g0, 0xd1b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d140 ! 808: CASA_I casa [%r31] 0x8a, %r0, %r18 pmu_20_706: nop nop setx 0xffffffb5ffffffa5, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_20_707: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_20_708: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_709: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_709) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1008,*,*,1)') ifelse(3,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_709: wrhpr %g0, 0xf02, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 812: RDPC rd %pc, %r19 pmu_20_710: nop nop setx 0xffffffbfffffffa3, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0x7a30610d, %r28 !TTID : 1 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_711: .word 0x39400002 ! 814: FBPUGE fbuge,a,pn %fcc0, splash_hpstate_20_712: .word 0x8198365d ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x165d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_20 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_713: wrhpr %g0, 0x392, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c6c0 ! 816: CASA_I casa [%r31] 0x36, %r0, %r12 brcommon3_20_714: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x20800002 ! 817: BN bn,a .word 0x91948002 ! 818: WRPR_PIL_R wrpr %r18, %r2, %pil mondo_20_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d950004 ! 819: WRPR_WSTATE_R wrpr %r20, %r4, %wstate nop nop mov 0x1, %r18 splash_cmpr_20_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_717)+8 , 16, 16)) -> intp(0,0,7,*,976,*,67,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_717)&0xffffffff)+8 , 16, 16)) -> intp(1,0,23,*,712,*,67,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_718: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_718) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,960,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_718: wrhpr %g0, 0x413, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 821: RDPC rd %pc, %r12 nop nop set 0xc0802a67, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_719: .word 0x19400001 ! 822: FBPUGE fbuge splash_lsu_20_720: nop nop ta T_CHANGE_HPRIV set 0xd865a283, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 823: FBPULE fbule,a,pn %fcc0, .word 0x9f803827 ! 824: SIR sir 0x1827 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_721: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_721) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1000,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_721: wrhpr %g0, 0x79b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 825: RDPC rd %pc, %r16 iaw_20_722: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_722: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_722 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_722: brnz %r16, iaw_wait20_722 ld [%r23], %r16 ba iaw_startwait20_722 mov 0x20, %r16 continue_iaw_20_722: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_722: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_722 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_722: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_722 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_722: mov 0x38, %r18 iaw1_20_722: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xb51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe8bfc240 ! 826: STDA_R stda %r20, [%r31 + %r0] 0x12 br_badelay3_20_723: .word 0x34800001 ! 1: BG bg,a .word 0x02800001 ! 1: BE be .word 0xe714c010 ! 1: LDQF_R - [%r19, %r16], %f19 .word 0x95a14831 ! 827: FADDs fadds %f5, %f17, %f10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_724) , 16, 16)) -> intp(1,0,31,*,664,*,78,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_724)&0xffffffff) , 16, 16)) -> intp(7,0,19,*,744,*,78,1) #else set 0x26903ab9, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_724: .word 0x19400001 ! 828: FBPUGE fbuge nop nop set 0xa670c780, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_725: .word 0x97b444d4 ! 829: FCMPNE32 fcmpne32 %d48, %d20, %r11 .word 0x91940005 ! 830: WRPR_PIL_R wrpr %r16, %r5, %pil jmptr_20_727: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x2ecc0001 ! 1: BRGEZ brgez,a,pt %r16, .word 0x8d902095 ! 832: WRPR_PSTATE_I wrpr %r0, 0x0095, %pstate mondo_20_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d94c014 ! 833: WRPR_WSTATE_R wrpr %r19, %r20, %wstate ibp_20_730: nop nop .word 0xa5b48482 ! 834: FCMPLE32 fcmple32 %d18, %d2, %r18 cwp_20_731: set user_data_start, %o7 .word 0x93902007 ! 835: WRPR_CWP_I wrpr %r0, 0x0007, %cwp jmptr_20_732: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_20_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d904002 ! 837: WRPR_WSTATE_R wrpr %r1, %r2, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_734) , 16, 16)) -> intp(5,0,16,*,952,*,74,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_734)&0xffffffff) , 16, 16)) -> intp(6,0,8,*,672,*,74,1) #else set 0x3a908f7e, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_734: .word 0x19400001 ! 838: FBPUGE fbuge brcommon3_20_735: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902b05 ! 839: WRPR_PSTATE_I wrpr %r0, 0x0b05, %pstate mondo_20_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c8] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d914004 ! 840: WRPR_WSTATE_R wrpr %r5, %r4, %wstate nop nop set 0x8ff0b578, %r28 !TTID : 5 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 intvec_20_737: .word 0x19400001 ! 841: FBPUGE fbuge splash_lsu_20_738: nop nop ta T_CHANGE_HPRIV set 0x92734a44, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 842: FBPULE fbule,a,pn %fcc0, mondo_20_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d94c014 ! 843: WRPR_WSTATE_R wrpr %r19, %r20, %wstate .word 0x3e800001 ! 1: BVC bvc,a .word 0x8d90395c ! 844: WRPR_PSTATE_I wrpr %r0, 0x195c, %pstate nop nop set 0xe7d02726, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9b4c4c7 ! 1: FCMPNE32 fcmpne32 %d50, %d38, %r20 intvec_20_741: .word 0x93a209d2 ! 845: FDIVd fdivd %f8, %f18, %f40 mondo_20_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d91c010 ! 846: WRPR_WSTATE_R wrpr %r7, %r16, %wstate trapasi_20_743: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_744: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_744) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,728,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_744: wrhpr %g0, 0x500, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 849: RDPC rd %pc, %r16 mondo_20_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3d8] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d944008 ! 850: WRPR_WSTATE_R wrpr %r17, %r8, %wstate iaw_20_746: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_746: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_746 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_746: brnz %r16, iaw_wait20_746 ld [%r23], %r16 ba iaw_startwait20_746 mov 0x20, %r16 continue_iaw_20_746: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_746: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_746 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_746: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_746 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_746: mov 0x38, %r18 iaw1_20_746: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x3c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdb20 ! 851: STDFA_R stda %f16, [%r0, %r31] nop nop mov 0x0, %r18 splash_cmpr_20_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 852: SIAM siam 1 memptr_20_748: set 0x60540000, %r31 .word 0x8581e1ba ! 853: WRCCR_I wr %r7, 0x01ba, %ccr nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_20 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_749: wrhpr %g0, 0x211, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c240 ! 854: CASA_I casa [%r31] 0x12, %r0, %r18 .word 0x919225d2 ! 855: WRPR_PIL_I wrpr %r8, 0x05d2, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_750) , 16, 16)) -> intp(7,0,9,*,1016,*,2a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_750)&0xffffffff) , 16, 16)) -> intp(6,0,2,*,696,*,2a,1) #else set 0x7950aa03, %r28 !TTID : 2 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_20_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93b484cc ! 856: FCMPNE32 fcmpne32 %d18, %d12, %r9 nop nop set 0x7a90ff21, %r28 !TTID : 7 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a249d3 ! 1: FDIVd fdivd %f40, %f50, %f20 intvec_20_751: .word 0x19400001 ! 857: FBPUGE fbuge cancelint_20_752: rdhpr %halt, %r18 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_753: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_753) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,944,*,*,1)') ifelse(7,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_753: wrhpr %g0, 0xa99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 859: RDPC rd %pc, %r17 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_754) , 16, 16)) -> intp(7,0,13,*,736,*,2f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_754)&0xffffffff) , 16, 16)) -> intp(0,0,27,*,1016,*,2f,1) #else set 0x43d0ebd1, %r28 !TTID : 3 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f80335f ! 1: SIR sir 0x135f intvec_20_754: .word 0xa1b404c6 ! 860: FCMPNE32 fcmpne32 %d16, %d6, %r16 brcommon3_20_755: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe0a0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00a0] ba,a .+8 jmpl %r27+0, %r27 .word 0x00800001 ! 861: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_756)+8 , 16, 16)) -> intp(5,0,5,*,904,*,7e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_756)&0xffffffff)+8 , 16, 16)) -> intp(7,0,30,*,680,*,7e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983c8f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c8f, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_20 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_757: wrhpr %g0, 0xc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d000 ! 863: CASA_I casa [%r31] 0x80, %r0, %r18 .word 0x879021d4 ! 864: WRPR_TT_I wrpr %r0, 0x01d4, %tt trapasi_20_758: nop mov 0x8, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_20_759: nop nop ta T_CHANGE_HPRIV set 0xf40d9e2a, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 866: FBPULE fbule .word 0xe477e000 ! 867: STX_I stx %r18, [%r31 + 0x0000] br_badelay2_20_760: .word 0xa1a309c4 ! 1: FDIVd fdivd %f12, %f4, %f16 pdist %f2, %f8, %f0 .word 0x91b50310 ! 868: ALIGNADDRESS alignaddr %r20, %r16, %r8 intveclr_20_761: nop nop ta T_CHANGE_HPRIV setx 0x09388ae299c5549d, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 869: FBPLG fblg,a,pn %fcc0, iaw_20_762: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_762: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_762 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_762: brnz %r16, iaw_wait20_762 ld [%r23], %r16 ba iaw_startwait20_762 mov 0x20, %r16 continue_iaw_20_762: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_762: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_762 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_762: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_762 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_762: mov 0x38, %r18 iaw1_20_762: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x3da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe0d0 ! 870: PREFETCHA_I prefetcha [%r31, + 0x00d0] %asi, #24 iaw_20_763: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_763: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_763 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_763: brnz %r16, iaw_wait20_763 ld [%r23], %r16 ba iaw_startwait20_763 mov 0x20, %r16 continue_iaw_20_763: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_763: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_763 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_763: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_763 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_763: mov 0x38, %r18 iaw1_20_763: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x653, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdf00 ! 871: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_764: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_764) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,696,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_764: wrhpr %g0, 0x4cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 872: RDPC rd %pc, %r20 .word 0x99a00160 ! 873: FABSq dis not found nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_20 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_766: wrhpr %g0, 0x3ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c400 ! 874: CASA_I casa [%r31] 0x20, %r0, %r12 nop nop set 0xd320489f, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x20),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803d04 ! 1: SIR sir 0x1d04 intvec_20_767: .word 0x99a509d3 ! 875: FDIVd fdivd %f20, %f50, %f12 brcommon1_20_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe000 ! 1: STXFSR_I st-sfr %f1, [0x0000, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xa5a149b3 ! 876: FDIVs fdivs %f5, %f19, %f18 frzptr_20_769: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdc40 ! 877: LDDFA_R ldda [%r31, %r0], %f16 brcommon2_20_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd1140010 ! 1: LDQF_R - [%r16, %r16], %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 878: BN bn,a iaw_20_771: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_771: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_771 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_771: brnz %r16, iaw_wait20_771 ld [%r23], %r16 ba iaw_startwait20_771 mov 0x20, %r16 continue_iaw_20_771: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_771: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_771 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_771: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_771 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_771: mov 0x38, %r18 iaw1_20_771: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x9d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a449d1 ! 879: FDIVd fdivd %f48, %f48, %f20 brcommon1_20_772: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0x87ac0a4d ! 880: FCMPd fcmpd %fcc, %f16, %f44 iaw_20_773: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_773: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_773 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_773: brnz %r16, iaw_wait20_773 ld [%r23], %r16 ba iaw_startwait20_773 mov 0x20, %r16 continue_iaw_20_773: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_773: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_773 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_773: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_773 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_773: mov 0x38, %r18 iaw3_20_773: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x788, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fda00 ! 881: LDDFA_R ldda [%r31, %r0], %f16 splash_tba_20_774: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_20_775: nop nop ta T_CHANGE_PRIV setx 0xffffffbbffffffaa, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x1a800002 ! 1: BCC bcc .word 0x8d9030a1 ! 884: WRPR_PSTATE_I wrpr %r0, 0x10a1, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_777), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,672,*,*,1) xir_20_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_777: and %g1, 2, %g1 brnz,a %g1, xirwait_20_777 ldx [%r17], %g1 xir_20_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b869 ! 885: WR_CLEAR_SOFTINT_I wr %r2, 0x1869, %clear_softint .word 0xd037e170 ! 886: STH_I sth %r8, [%r31 + 0x0170] .word 0xc19fe1a0 ! 887: LDDFA_I ldda [%r31, 0x01a0], %f0 splash_lsu_20_778: nop nop ta T_CHANGE_HPRIV set 0xe52ce2bf, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x04800001 ! 1: BLE ble stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 888: FBPULE fbule,a,pn %fcc0, brcommon2_20_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9ba00551 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fdf20 ! 889: LDDFA_R ldda [%r31, %r0], %f0 mondo_20_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d93400a ! 890: WRPR_WSTATE_R wrpr %r13, %r10, %wstate nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_781: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_781) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,984,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_781: wrhpr %g0, 0x909, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 891: RDPC rd %pc, %r16 .word 0xd23fe134 ! 892: STD_I std %r9, [%r31 + 0x0134] intveclr_20_783: nop nop ta T_CHANGE_HPRIV setx 0x7c1ad5468a13a4e9, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 893: FBPLG fblg,a,pn %fcc0, jmptr_20_784: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_20_785: set user_data_start, %o7 .word 0x93902003 ! 895: WRPR_CWP_I wrpr %r0, 0x0003, %cwp .word 0xc32fe150 ! 896: STXFSR_I st-sfr %f1, [0x0150, %r31] pmu_20_787: nop nop setx 0xffffffb7ffffffab, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe1bfc3e0 ! 898: STDFA_R stda %f16, [%r0, %r31] mondo_20_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3d0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d910011 ! 899: WRPR_WSTATE_R wrpr %r4, %r17, %wstate mondo_20_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d910009 ! 900: WRPR_WSTATE_R wrpr %r4, %r9, %wstate mondo_20_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d94c012 ! 901: WRPR_WSTATE_R wrpr %r19, %r18, %wstate nop nop mov 0x0, %r18 splash_cmpr_20_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_793)+8 , 16, 16)) -> intp(6,0,1,*,648,*,a8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_793)&0xffffffff)+8 , 16, 16)) -> intp(2,0,14,*,896,*,a8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d84 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d84, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_20_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0c0 ! 1: STQF_I - %f9, [0x00c0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x93aac830 ! 904: FMOVGE fmovs %fcc1, %f16, %f9 cancelint_20_795: rdhpr %halt, %r13 .word 0x85880000 ! 905: ALLCLEAN pmu_20_796: nop nop setx 0xffffffbaffffffa8, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_20_797: nop nop ta T_CHANGE_HPRIV setx 0x7c52ad936d6c55f4, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 907: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_798: wrhpr %g0, 0x8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c6c0 ! 908: CASA_I casa [%r31] 0x36, %r0, %r12 ibp_20_799: nop nop .word 0x87aa4a52 ! 909: FCMPd fcmpd %fcc, %f40, %f18 ibp_20_800: nop nop .word 0xf1efe0a0 ! 910: PREFETCHA_I prefetcha [%r31, + 0x00a0] %asi, #24 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] iaw_20_801: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_801: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_801 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_801: brnz %r16, iaw_wait20_801 ld [%r23], %r16 ba iaw_startwait20_801 mov 0x20, %r16 continue_iaw_20_801: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_801: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_801 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_801: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_801 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_801: mov 0x38, %r18 iaw1_20_801: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc1a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdb40 ! 912: STDFA_R stda %f16, [%r0, %r31] brcommon3_20_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe090 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0090] ba,a .+8 jmpl %r27+0, %r27 stxa %r13, [%r0] ASI_LSU_CONTROL .word 0xa3aac830 ! 913: FMOVGE fmovs %fcc1, %f16, %f17 cancelint_20_803: rdhpr %halt, %r17 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_20_804: .word 0x20800001 ! 1: BN bn,a .word 0x81983480 ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x1480, %hpstate jmptr_20_805: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_20_806: nop nop .word 0xa3b4c487 ! 917: FCMPLE32 fcmple32 %d50, %d38, %r17 iaw_20_807: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_807: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_807 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_807: brnz %r16, iaw_wait20_807 ld [%r23], %r16 ba iaw_startwait20_807 mov 0x20, %r16 continue_iaw_20_807: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_807: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_807 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_807: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_807 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_807: mov 0x38, %r18 iaw4_20_807: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x899, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe1e0 ! 918: PREFETCHA_I prefetcha [%r31, + 0x01e0] %asi, #24 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_808), 16, 16)) -> intp(mask2tid(0x20),1,3,*,736,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,688,*,*,1) xir_20_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_808: and %g1, 2, %g1 brnz,a %g1, xirwait_20_808 ldx [%r17], %g1 xir_20_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82f71a ! 919: WR_CLEAR_SOFTINT_I wr %r11, 0x171a, %clear_softint .word 0x9f802a51 ! 920: SIR sir 0x0a51 jmptr_20_809: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_20_810: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_20_811: .word 0x81982f45 ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x0f45, %hpstate ibp_20_812: nop nop .word 0x20800001 ! 924: BN bn,a frzptr_20_813: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd03fe000 ! 1: STD_I std %r8, [%r31 + 0x0000] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_20_814: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_20_815: .word 0x2ccac001 ! 1: BRGZ brgz,a,pt %r11, .word 0x8198361f ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x161f, %hpstate memptr_20_816: set user_data_start, %r31 .word 0x85823ca2 ! 928: WRCCR_I wr %r8, 0x1ca2, %ccr nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_817: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_817) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,920,*,*,1)') ifelse(1,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_817: wrhpr %g0, 0x401, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 929: RDPC rd %pc, %r20 iaw_20_818: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_818: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_818 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_818: brnz %r16, iaw_wait20_818 ld [%r23], %r16 ba iaw_startwait20_818 mov 0x20, %r16 continue_iaw_20_818: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_818: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_818 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_818: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_818 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_818: mov 0x38, %r18 iaw1_20_818: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdd40 ! 930: LDDA_R ldda [%r31, %r0] 0xea, %r0 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_819: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_819) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,928,*,*,1)') ifelse(6,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_819: wrhpr %g0, 0xf8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 931: RDPC rd %pc, %r20 br_badelay1_20_820: .word 0xda3fe130 ! 1: STD_I std %r13, [%r31 + 0x0130] .word 0xe930b4d1 ! 1: STQF_I - %f20, [0x14d1, %r2] .word 0xe23fe040 ! 1: STD_I std %r17, [%r31 + 0x0040] normalw .word 0x99458000 ! 932: RD_SOFTINT_REG rd %softint, %r12 fpinit_20_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009a4 ! 933: FDIVs fdivs %f0, %f4, %f8 .word 0x8d9034f6 ! 934: WRPR_PSTATE_I wrpr %r0, 0x14f6, %pstate mondo_20_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d948011 ! 935: WRPR_WSTATE_R wrpr %r18, %r17, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_20_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_20_824: .word 0x8f902002 ! 937: WRPR_TL_I wrpr %r0, 0x0002, %tl splash_tba_20_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_20_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_826)+8 , 16, 16)) -> intp(7,0,9,*,936,*,fa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_826)&0xffffffff)+8 , 16, 16)) -> intp(3,0,16,*,912,*,fa,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198259f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x059f, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_20_827: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e0b8 ! 941: STX_I stx %r16, [%r31 + 0x00b8] br_badelay1_20_828: .word 0x24c9c001 ! 1: BRLEZ brlez,a,pt %r7, .word 0xe03fe1c0 ! 1: STD_I std %r16, [%r31 + 0x01c0] .word 0x04cfc002 ! 1: BRLEZ brlez,pt %r31, normalw .word 0x97458000 ! 942: RD_SOFTINT_REG rd %softint, %r11 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_20 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_829: wrhpr %g0, 0x9da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c400 ! 943: CASA_I casa [%r31] 0x20, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_20_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x9f802170 ! 946: SIR sir 0x0170 nop nop ta T_CHANGE_HPRIV mov 0x20, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_20_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_20 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_20_832: wrhpr %g0, 0x8db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dd40 ! 947: CASA_I casa [%r31] 0xea, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_833: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_833) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,920,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_833: wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 948: RDPC rd %pc, %r11 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_834) , 16, 16)) -> intp(7,0,31,*,912,*,f0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_834)&0xffffffff) , 16, 16)) -> intp(4,0,23,*,912,*,f0,1) #else set 0xc02008a0, %r28 !TTID : 0 (mask2tid(0x20)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x95b1c4d3 ! 1: FCMPNE32 fcmpne32 %d38, %d50, %r10 intvec_20_834: .word 0x97a449d4 ! 951: FDIVd fdivd %f48, %f20, %f42 splash_tba_20_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_836), 16, 16)) -> intp(mask2tid(0x20),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,928,*,*,1) xir_20_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_836: and %g1, 2, %g1 brnz,a %g1, xirwait_20_836 ldx [%r17], %g1 xir_20_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab807733 ! 953: WR_CLEAR_SOFTINT_I wr %r1, 0x1733, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_837), 16, 16)) -> intp(mask2tid(0x20),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x20),1,3,*,1016,*,*,1) xir_20_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_20_837: and %g1, 2, %g1 brnz,a %g1, xirwait_20_837 ldx [%r17], %g1 xir_20_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81ea7f ! 954: WR_CLEAR_SOFTINT_I wr %r7, 0x0a7f, %clear_softint mondo_20_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d944006 ! 955: WRPR_WSTATE_R wrpr %r17, %r6, %wstate pmu_20_839: nop nop setx 0xffffffbeffffffa3, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f8023ea ! 957: SIR sir 0x03ea nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_840: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_840) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,752,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,680,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_840: wrhpr %g0, 0xfdb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 958: RDPC rd %pc, %r17 cancelint_20_841: rdhpr %halt, %r10 .word 0x85880000 ! 959: ALLCLEAN .word 0xe19fe1a0 ! 960: LDDFA_I ldda [%r31, 0x01a0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_842: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_842) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,928,*,*,1)') ifelse(5,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_842: wrhpr %g0, 0x790, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 961: RDPC rd %pc, %r20 intveclr_20_843: nop nop ta T_CHANGE_HPRIV setx 0xca3abc69f1175db5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 962: FBPLG fblg,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_20_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_844)+8 , 16, 16)) -> intp(3,0,31,*,736,*,62,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_844)&0xffffffff)+8 , 16, 16)) -> intp(6,0,4,*,696,*,62,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_20_845: nop nop wrhpr %g0, 0xd9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87acca49 ! 964: FCMPd fcmpd %fcc, %f50, %f40 frzptr_20_846: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_20_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_20_847)+8 , 16, 16)) -> intp(0,0,11,*,744,*,bb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_20_847)&0xffffffff)+8 , 16, 16)) -> intp(1,0,11,*,680,*,bb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_20_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba iaw_20_849: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_849: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_849 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_849: brnz %r16, iaw_wait20_849 ld [%r23], %r16 ba iaw_startwait20_849 mov 0x20, %r16 continue_iaw_20_849: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_849: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_849 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_849: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_849 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_849: mov 0x38, %r18 iaw1_20_849: best_set_reg(0x00000000e1a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xed8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd897c380 ! 968: LDUHA_R lduha [%r31, %r0] 0x1c, %r12 cancelint_20_850: rdhpr %halt, %r10 .word 0x85880000 ! 969: ALLCLEAN .word 0x91918010 ! 970: WRPR_PIL_R wrpr %r6, %r16, %pil .word 0xe19fe140 ! 971: LDDFA_I ldda [%r31, 0x0140], %f16 .word 0xe277e098 ! 972: STX_I stx %r17, [%r31 + 0x0098] .word 0x91944011 ! 973: WRPR_PIL_R wrpr %r17, %r17, %pil splash_lsu_20_853: nop nop ta T_CHANGE_HPRIV set 0x5711fa7c, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x10800001 ! 1: BA ba stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 974: FBPULE fbule frzptr_20_854: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_20_855: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_20_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_20_856-donret_20_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x008d6400 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xcd6, %htstate wrhpr %g0, 0xb91, %hpstate ! rand=1 (20) ldx [%r12+%r0], %g1 retry donretarg_20_856: .word 0x8d90303f ! 977: WRPR_PSTATE_I wrpr %r0, 0x103f, %pstate .word 0xc19fe140 ! 978: LDDFA_I ldda [%r31, 0x0140], %f0 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, .word 0x8d903200 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1200, %pstate .word 0xe2800c40 ! 980: LDUWA_R lduwa [%r0, %r0] 0x62, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x20+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_20_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_20_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 20 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_20_858: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x20),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_20_858) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,968,*,*,1)') ifelse(2,mask2tid(0x20),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_20_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x20),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_20_858: wrhpr %g0, 0x9ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 982: RDPC rd %pc, %r18 iaw_20_859: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_859: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_859 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_859: brnz %r16, iaw_wait20_859 ld [%r23], %r16 ba iaw_startwait20_859 mov 0x20, %r16 continue_iaw_20_859: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_859: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_859 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_859: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_859 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_859: mov 0x38, %r18 iaw1_20_859: best_set_reg(0x00000000e0a00000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x10a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfc080 ! 983: STDA_R stda %r16, [%r31 + %r0] 0x04 jmptr_20_860: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 iaw_20_861: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x20, %r16 iaw_startwait20_861: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_20_861 mov (~0x20&0xf0), %r16 ld [%r23], %r16 iaw_wait20_861: brnz %r16, iaw_wait20_861 ld [%r23], %r16 ba iaw_startwait20_861 mov 0x20, %r16 continue_iaw_20_861: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_20_861: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_20_861 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_20_861: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_20_861 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit20_861: mov 0x38, %r18 iaw3_20_861: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x2d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99a449d2 ! 985: FDIVd fdivd %f48, %f18, %f12 .word 0xe8bfc720 ! 986: STDA_R stda %r20, [%r31 + %r0] 0x39 .word 0xe91fe030 ! 987: LDDF_I ldd [%r31, 0x0030], %f20 .word 0x9f8033af ! 988: SIR sir 0x13af splash_lsu_20_864: nop nop ta T_CHANGE_HPRIV set 0x4937a92f, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 989: FBPULE fbule brcommon2_20_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a00545 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 990: PDIST pdistn %d62, %d0, %d16 ibp_20_866: nop nop wrhpr %g0, 0x959, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe21fe1f0 ! 991: LDD_I ldd [%r31 + 0x01f0], %r17 memptr_20_867: set user_data_start, %r31 .word 0x85846d0e ! 992: WRCCR_I wr %r17, 0x0d0e, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0x9f8039bd ! 994: SIR sir 0x19bd .word 0xf16fe010 ! 1: PREFETCH_I prefetch [%r31 + 0x0010], #24 .word 0xe3e7c2e0 ! 1: CASA_I casa [%r31] 0x17, %r0, %r17 mov 0xb5, %r30 .word 0x93d0001e ! 995: Tcc_R tne icc_or_xcc, %r0 + %r30 .word 0xe297c240 ! 996: LDUHA_R lduha [%r31, %r0] 0x12, %r17 .word 0xe227e0e8 ! 997: STW_I stw %r17, [%r31 + 0x00e8] .word 0x9f802010 ! 998: SIR sir 0x0010 .word 0xc32fe060 ! 999: STXFSR_I st-sfr %f1, [0x0060, %r31] splash_tba_20_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_5: wrhpr %g0, 0x89b, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_10_0: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e1ef ! 2: STF_I st %f8, [0x01ef, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_1: wrhpr %g0, 0x2d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 3: CASA_I casa [%r31] 0xc9, %r0, %r8 dvapa_10_2: nop nop ta T_CHANGE_HPRIV mov 0xa00, %r20 mov 0x14, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x2d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7a489b1 ! 4: FDIVs fdivs %f18, %f17, %f19 nop nop set 0xc0a0a0f2, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93a049c4 ! 1: FDIVd fdivd %f32, %f4, %f40 intvec_10_3: .word 0x9f803c48 ! 5: SIR sir 0x1c48 br_longdelay3_10_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8d9024cd ! 6: WRPR_PSTATE_I wrpr %r0, 0x04cd, %pstate mondo_10_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3e0] %asi stxa %r3, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d95000d ! 7: WRPR_WSTATE_R wrpr %r20, %r13, %wstate .word 0xc19fdb40 ! 8: LDDFA_R ldda [%r31, %r0], %f0 br_badelay3_10_7: .word 0x32800001 ! 1: BNE bne,a .word 0x32800001 ! 1: BNE bne,a .word 0xd7140009 ! 1: LDQF_R - [%r16, %r9], %f11 .word 0xa3a34821 ! 9: FADDs fadds %f13, %f1, %f17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_8), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,976,*,*,1) xir_10_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_8: and %g1, 2, %g1 brnz,a %g1, xirwait_10_8 ldx [%r17], %g1 xir_10_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81a77a ! 10: WR_CLEAR_SOFTINT_I wr %r6, 0x077a, %clear_softint .word 0x0ccc0001 ! 1: BRGZ brgz,pt %r16, .word 0x8d903563 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1563, %pstate .word 0xe3e7c080 ! 12: CASA_I casa [%r31] 0x 4, %r0, %r17 nop nop set 0x88907f75, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_11: .word 0x39400001 ! 13: FBPUGE fbuge,a,pn %fcc0, vahole2_10_12: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfdf00 ! 14: STDFA_R stda %f16, [%r0, %r31] ibp_10_13: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_13: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_13 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_13: brnz %r16, ibp_wait10_13 ld [%r23], %r16 ba ibp_startwait10_13 mov 0x10, %r16 continue_ibp_10_13: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_13: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_13 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_13: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_13 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_13: best_set_reg(0x00000050b8c000c8,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa1a209d2 ! 15: FDIVd fdivd %f8, %f18, %f16 nop nop ta T_CHANGE_HPRIV ! macro donret_10_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_14-donret_10_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00c88500 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x747, %htstate best_set_reg(0x2f2, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) ldx [%r12+%r0], %g1 retry donretarg_10_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_10_15: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_10 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_16: wrhpr %g0, 0xb88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d140 ! 18: CASA_I casa [%r31] 0x8a, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_17: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_17) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,936,*,*,1)') ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_17: wrhpr %g0, 0xbc8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 19: RDPC rd %pc, %r18 .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 .word 0x9f8025f8 ! 20: SIR sir 0x05f8 brcommon3_10_18: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd31fe0f0 ! 21: LDDF_I ldd [%r31, 0x00f0], %f9 .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9f802aec ! 22: SIR sir 0x0aec .word 0x91d020b5 ! 23: Tcc_I ta icc_or_xcc, %r0 + 181 br_badelay2_10_19: .word 0x12800001 ! 1: BNE bne pdist %f4, %f30, %f10 .word 0xa5b4c302 ! 24: ALIGNADDRESS alignaddr %r19, %r2, %r18 ibp_10_20: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_20: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_20 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_20: brnz %r16, ibp_wait10_20 ld [%r23], %r16 ba ibp_startwait10_20 mov 0x10, %r16 continue_ibp_10_20: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_20: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_20 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_20: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_20 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_20: best_set_reg(0x000000502dc0c856,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x608, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 25: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_21)+8 , 16, 16)) -> intp(0,0,20,*,688,*,d4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_21)&0xffffffff)+8 , 16, 16)) -> intp(6,0,8,*,648,*,d4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e4f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4f, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_10_22: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe23fe010 ! 1: STD_I std %r17, [%r31 + 0x0010] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fc3e0 ! 27: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_23: wrhpr %g0, 0x958, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c600 ! 28: CASA_I casa [%r31] 0x30, %r0, %r17 mondo_10_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3c8] %asi stxa %r6, [%r0+0x3c0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d934010 ! 29: WRPR_WSTATE_R wrpr %r13, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_25: wrhpr %g0, 0x4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c3c0 ! 30: CASA_I casa [%r31] 0x1e, %r0, %r17 .word 0xe22fe012 ! 31: STB_I stb %r17, [%r31 + 0x0012] brcommon3_10_26: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c720 ! 1: CASA_I casa [%r31] 0x39, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe33fe030 ! 32: STDF_I std %f17, [0x0030, %r31] .word 0xe297c280 ! 1: LDUHA_R lduha [%r31, %r0] 0x14, %r17 .word 0xa3a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f17 mov 0x35, %r30 .word 0x91d0001e ! 33: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe19fe020 ! 34: LDDFA_I ldda [%r31, 0x0020], %f16 brcommon3_10_27: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe31fe0c0 ! 35: LDDF_I ldd [%r31, 0x00c0], %f17 nop nop mov 0x0, %r18 splash_cmpr_10_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 36: SIAM siam 1 jmptr_10_29: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_30: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_30) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,976,*,*,1)') ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_30: wrhpr %g0, 0xdd1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 38: RDPC rd %pc, %r10 cancelint_10_31: rdhpr %halt, %r10 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_33), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,752,*,*,1) xir_10_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_33: and %g1, 2, %g1 brnz,a %g1, xirwait_10_33 ldx [%r17], %g1 xir_10_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8269bf ! 41: WR_CLEAR_SOFTINT_I wr %r9, 0x09bf, %clear_softint frzptr_10_34: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdf20 ! 42: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_10_35: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe1f0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x01f0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 43: BN bn,a frzptr_10_36: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe43fe070 ! 1: STD_I std %r18, [%r31 + 0x0070] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 44: BN bn,a nop nop set 0xd0f052eb, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_37: .word 0x91a2c9d3 ! 45: FDIVd fdivd %f42, %f50, %f8 frzptr_10_38: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe0f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00f0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_39: wrhpr %g0, 0x7db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c720 ! 47: CASA_I casa [%r31] 0x39, %r0, %r16 vahole2_10_40: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe19fc2c0 ! 48: LDDFA_R ldda [%r31, %r0], %f16 .word 0xe11fe010 ! 49: LDDF_I ldd [%r31, 0x0010], %f16 nop nop mov 0x1, %r18 splash_cmpr_10_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_42)+8 , 16, 16)) -> intp(5,0,28,*,664,*,50,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_42)&0xffffffff)+8 , 16, 16)) -> intp(4,0,4,*,1000,*,50,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 50: SIAM siam 1 mondo_10_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r8, [%r0+0x3c0] %asi stxa %r9, [%r0+0x3e8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d92c008 ! 51: WRPR_WSTATE_R wrpr %r11, %r8, %wstate .word 0xe09fe1e0 ! 52: LDDA_I ldda [%r31, + 0x01e0] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_44) , 16, 16)) -> intp(7,0,14,*,976,*,95,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_44)&0xffffffff) , 16, 16)) -> intp(1,0,20,*,712,*,95,1) #else set 0x90d0b5cb, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_44: .word 0xa1b484c9 ! 53: FCMPNE32 fcmpne32 %d18, %d40, %r16 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_10_46: rdhpr %halt, %r18 .word 0x85880000 ! 55: ALLCLEAN brcommon3_10_47: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe0f0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x00f0] ba,a .+8 jmpl %r27-4, %r27 .word 0xd09fd160 ! 56: LDDA_R ldda [%r31, %r0] 0x8b, %r8 dvapa_10_48: nop nop ta T_CHANGE_HPRIV mov 0x90b, %r20 mov 0x1d, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd01fe160 ! 57: LDD_I ldd [%r31 + 0x0160], %r8 cancelint_10_49: rdhpr %halt, %r19 .word 0x85880000 ! 58: ALLCLEAN intveclr_10_50: nop nop ta T_CHANGE_HPRIV setx 0xbf71999d1fb98925, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x20a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_10_51: nop nop setx 0xffffffbcffffffa4, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_10_52: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e150 ! 1: STQF_I - %f10, [0x0150, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0x95b7c7c0 ! 61: PDIST pdistn %d62, %d0, %d10 mondo_10_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948002 ! 62: WRPR_WSTATE_R wrpr %r18, %r2, %wstate intveclr_10_54: nop nop ta T_CHANGE_HPRIV setx 0x7c0d979d80f19a05, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xed8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 63: FBPLG fblg #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_55), 16, 16)) -> intp(mask2tid(0x10),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,992,*,*,1) xir_10_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_55: and %g1, 2, %g1 brnz,a %g1, xirwait_10_55 ldx [%r17], %g1 xir_10_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84b060 ! 64: WR_CLEAR_SOFTINT_I wr %r18, 0x1060, %clear_softint ibp_10_56: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_56: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_56 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_56: brnz %r16, ibp_wait10_56 ld [%r23], %r16 ba ibp_startwait10_56 mov 0x10, %r16 continue_ibp_10_56: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_56: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_56 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_56: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_56 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_56: best_set_reg(0x00000050c4c85625,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa7b1c486 ! 65: FCMPLE32 fcmple32 %d38, %d6, %r19 ibp_10_57: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_57: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_57 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_57: brnz %r16, ibp_wait10_57 ld [%r23], %r16 ba ibp_startwait10_57 mov 0x10, %r16 continue_ibp_10_57: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_57: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_57 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_57: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_57 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_57: best_set_reg(0x00000040c2d625dd,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xf58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3b28483 ! 66: FCMPLE32 fcmple32 %d10, %d34, %r17 .word 0xc09fdf20 ! 67: LDDA_R ldda [%r31, %r0] 0xf9, %r0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_59), 16, 16)) -> intp(mask2tid(0x10),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,744,*,*,1) xir_10_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_59: and %g1, 2, %g1 brnz,a %g1, xirwait_10_59 ldx [%r17], %g1 xir_10_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84757e ! 68: WR_CLEAR_SOFTINT_I wr %r17, 0x157e, %clear_softint br_longdelay4_10_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902005 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate .word 0xe69fdf00 ! 70: LDDA_R ldda [%r31, %r0] 0xf8, %r19 .word 0xe19fdc00 ! 71: LDDFA_R ldda [%r31, %r0], %f16 splash_tba_10_62: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_10_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d918002 ! 73: WRPR_WSTATE_R wrpr %r6, %r2, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_64) , 16, 16)) -> intp(7,0,25,*,712,*,fd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_64)&0xffffffff) , 16, 16)) -> intp(5,0,19,*,904,*,fd,1) #else set 0x21f0f2f8, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x95b044cc ! 74: FCMPNE32 fcmpne32 %d32, %d12, %r10 mondo_10_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d908010 ! 75: WRPR_WSTATE_R wrpr %r2, %r16, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_66), 16, 16)) -> intp(mask2tid(0x10),1,3,*,744,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) xir_10_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_66: and %g1, 2, %g1 brnz,a %g1, xirwait_10_66 ldx [%r17], %g1 xir_10_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bd8a ! 76: WR_CLEAR_SOFTINT_I wr %r6, 0x1d8a, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_67), 16, 16)) -> intp(mask2tid(0x10),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,944,*,*,1) xir_10_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_67: and %g1, 2, %g1 brnz,a %g1, xirwait_10_67 ldx [%r17], %g1 xir_10_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84b59f ! 77: WR_CLEAR_SOFTINT_I wr %r18, 0x159f, %clear_softint splash_hpstate_10_68: ta T_CHANGE_NONHPRIV .word 0x38800001 ! 1: BGU bgu,a .word 0x8198348d ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x148d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_69: wrhpr %g0, 0x288, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c2c0 ! 79: CASA_I casa [%r31] 0x16, %r0, %r19 .word 0xe7e7c280 ! 1: CASA_I casa [%r31] 0x14, %r0, %r19 .word 0xe6dfc200 ! 1: LDXA_R ldxa [%r31, %r0] 0x10, %r19 mov 0x31, %r30 .word 0x93d0001e ! 80: Tcc_R tne icc_or_xcc, %r0 + %r30 splash_lsu_10_70: nop nop ta T_CHANGE_HPRIV set 0x91e41520, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x16800002 ! 1: BGE bge stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_10_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_71)+8 , 16, 16)) -> intp(2,0,4,*,1016,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_71)&0xffffffff)+8 , 16, 16)) -> intp(5,0,4,*,984,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_72), 16, 16)) -> intp(mask2tid(0x10),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,752,*,*,1) xir_10_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_72: and %g1, 2, %g1 brnz,a %g1, xirwait_10_72 ldx [%r17], %g1 xir_10_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8234fa ! 83: WR_CLEAR_SOFTINT_I wr %r8, 0x14fa, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_73: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_73) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,928,*,*,1)') ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_73: wrhpr %g0, 0xc89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 84: RDPC rd %pc, %r20 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_74)+8 , 16, 16)) -> intp(3,0,5,*,664,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_74)&0xffffffff)+8 , 16, 16)) -> intp(0,0,22,*,736,*,b3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198270f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x070f, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_10_75: set user_data_start, %o7 .word 0x93902005 ! 86: WRPR_CWP_I wrpr %r0, 0x0005, %cwp cwp_10_76: set user_data_start, %o7 .word 0x93902005 ! 87: WRPR_CWP_I wrpr %r0, 0x0005, %cwp brcommon1_10_77: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-0, %r27 .word 0xa9a049a3 ! 88: FDIVs fdivs %f1, %f3, %f20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_78), 16, 16)) -> intp(mask2tid(0x10),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) xir_10_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_78: and %g1, 2, %g1 brnz,a %g1, xirwait_10_78 ldx [%r17], %g1 xir_10_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8270ba ! 89: WR_CLEAR_SOFTINT_I wr %r9, 0x10ba, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_10_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_79-donret_10_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00cee200 | (16 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1997, %htstate best_set_reg(0x116b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) done donretarg_10_79: .word 0x8d902559 ! 90: WRPR_PSTATE_I wrpr %r0, 0x0559, %pstate .word 0xe19fe000 ! 91: LDDFA_I ldda [%r31, 0x0000], %f16 ibp_10_80: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_80: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_80 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_80: brnz %r16, ibp_wait10_80 ld [%r23], %r16 ba ibp_startwait10_80 mov 0x10, %r16 continue_ibp_10_80: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_80: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_80 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_80: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_80 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_80: best_set_reg(0x00000040e1e5dd0f,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xd41fe070 ! 92: LDD_I ldd [%r31 + 0x0070], %r10 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_81: wrhpr %g0, 0x9d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c540 ! 93: CASA_I casa [%r31] 0x2a, %r0, %r10 trapasi_10_82: nop mov 0x8, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_10_83: nop nop ta T_CHANGE_HPRIV setx 0x5dbbce9586d1520e, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 95: FBPLG fblg,a,pn %fcc0, intveclr_10_84: nop nop ta T_CHANGE_HPRIV setx 0xf11c260e51c279dc, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x91a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_10_85: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdd40 ! 97: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_86: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_86) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,728,*,*,1)') ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_86: wrhpr %g0, 0xa0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 98: RDPC rd %pc, %r20 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_87: wrhpr %g0, 0xd09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7dc40 ! 99: CASA_I casa [%r31] 0xe2, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_10_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_88-donret_10_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001a9400 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f0f, %htstate best_set_reg(0x1502, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) ldx [%r12+%r0], %g1 retry donretarg_10_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_10_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba brz,pt %r16, skip_10_90 fbuge,a,pn %fcc0, skip_10_90 .align 4096 skip_10_90: .word 0x24cc8001 ! 102: BRLEZ brlez,a,pt %r18, .word 0x91a049d4 ! 103: FDIVd fdivd %f32, %f20, %f8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_92), 16, 16)) -> intp(mask2tid(0x10),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,912,*,*,1) xir_10_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_92: and %g1, 2, %g1 brnz,a %g1, xirwait_10_92 ldx [%r17], %g1 xir_10_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81abf2 ! 104: WR_CLEAR_SOFTINT_I wr %r6, 0x0bf2, %clear_softint ibp_10_93: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_93: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_93 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_93: brnz %r16, ibp_wait10_93 ld [%r23], %r16 ba ibp_startwait10_93 mov 0x10, %r16 continue_ibp_10_93: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_93: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_93 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_93: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_93 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_93: best_set_reg(0x0000004035dd0f5a,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe1bfde00 ! 105: STDFA_R stda %f16, [%r0, %r31] nop nop mov 0x1, %r18 splash_cmpr_10_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_94)+8 , 16, 16)) -> intp(5,0,1,*,896,*,54,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_94)&0xffffffff)+8 , 16, 16)) -> intp(1,0,20,*,664,*,54,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_10_95: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 107: BN bn,a .word 0xe23fe020 ! 1: STD_I std %r17, [%r31 + 0x0020] .word 0x9f80356b ! 108: SIR sir 0x156b nop nop ta T_CHANGE_HPRIV ! macro donret_10_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_96-donret_10_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00238200 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x21e, %htstate wrhpr %g0, 0x301, %hpstate ! rand=1 (10) ldx [%r12+%r0], %g1 retry donretarg_10_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x3c780001 ! 110: BPPOS .word 0xe2bfc400 ! 111: STDA_R stda %r17, [%r31 + %r0] 0x20 splash_tba_10_98: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x64e09c34, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_99: .word 0xa3b4c4c6 ! 113: FCMPNE32 fcmpne32 %d50, %d6, %r17 memptr_10_100: set 0x60740000, %r31 .word 0x858467cf ! 114: WRCCR_I wr %r17, 0x07cf, %ccr nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_101: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_101) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1008,*,*,1)') ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_101: wrhpr %g0, 0x153, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 115: RDPC rd %pc, %r8 splash_tba_10_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_103)+8 , 16, 16)) -> intp(3,0,16,*,648,*,15,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_103)&0xffffffff)+8 , 16, 16)) -> intp(7,0,8,*,928,*,15,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983efd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1efd, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_104: wrhpr %g0, 0xd59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c180 ! 118: CASA_I casa [%r31] 0x c, %r0, %r13 ibp_10_105: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_105: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_105 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_105: brnz %r16, ibp_wait10_105 ld [%r23], %r16 ba ibp_startwait10_105 mov 0x10, %r16 continue_ibp_10_105: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_105: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_105 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_105: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_105 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_105: best_set_reg(0x0000005085cf5ab3,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x91b187c1 ! 119: PDIST pdistn %d6, %d32, %d8 ibp_10_106: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_106: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_106 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_106: brnz %r16, ibp_wait10_106 ld [%r23], %r16 ba ibp_startwait10_106 mov 0x10, %r16 continue_ibp_10_106: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_106: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_106 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_106: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_106 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_106: best_set_reg(0x00000050bddab369,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xda1fe090 ! 120: LDD_I ldd [%r31 + 0x0090], %r13 mondo_10_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3c8] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d948013 ! 121: WRPR_WSTATE_R wrpr %r18, %r19, %wstate .word 0xc19fda60 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe180 ! 123: LDDA_I ldda [%r31, + 0x0180] %asi, %r13 brcommon3_10_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r16, [%r0] ASI_LSU_CONTROL .word 0xa9aac830 ! 124: FMOVGE fmovs %fcc1, %f16, %f20 .word 0xe037e184 ! 125: STH_I sth %r16, [%r31 + 0x0184] frzptr_10_109: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702170 ! 1: POPC_I popc 0x0170, %r16 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fc2c0 ! 126: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_110: wrhpr %g0, 0x140, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c400 ! 127: CASA_I casa [%r31] 0x20, %r0, %r16 nop nop set 0xad10b15b, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9ba109cb ! 1: FDIVd fdivd %f4, %f42, %f44 intvec_10_111: .word 0x19400001 ! 128: FBPUGE fbuge #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_112) , 16, 16)) -> intp(3,0,24,*,936,*,73,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_112)&0xffffffff) , 16, 16)) -> intp(6,0,20,*,704,*,73,1) #else set 0x4a306c25, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_112: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 129: FBPUGE fbuge .word 0xe19fc2c0 ! 130: LDDFA_R ldda [%r31, %r0], %f16 .word 0x95a00160 ! 131: FABSq dis not found .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_10_116: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe070 ! 134: LDDA_I ldda [%r31, + 0x0070] %asi, %r10 intveclr_10_117: nop nop ta T_CHANGE_HPRIV setx 0x513a7254605c8f5c, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xe88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x18800001 ! 1: BGU bgu .word 0x8d903ad3 ! 136: WRPR_PSTATE_I wrpr %r0, 0x1ad3, %pstate .word 0xd41fe010 ! 137: LDD_I ldd [%r31 + 0x0010], %r10 ibp_10_120: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_120: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_120 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_120: brnz %r16, ibp_wait10_120 ld [%r23], %r16 ba ibp_startwait10_120 mov 0x10, %r16 continue_ibp_10_120: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_120: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_120 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_120: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_120 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_120: best_set_reg(0x000000403af3698d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x643, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe0d0 ! 138: PREFETCHA_I prefetcha [%r31, + 0x00d0] %asi, #24 .word 0x8d9028df ! 139: WRPR_PSTATE_I wrpr %r0, 0x08df, %pstate frzptr_10_122: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x95b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r10 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 140: BN bn,a nop nop set 0xe000b2f3, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_123: .word 0x39400001 ! 141: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_125)+8 , 16, 16)) -> intp(6,0,18,*,752,*,fa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_125)&0xffffffff)+8 , 16, 16)) -> intp(1,0,2,*,984,*,fa,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819820c3 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x00c3, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_10_126: ta T_CHANGE_NONHPRIV .word 0x02800001 ! 1: BE be .word 0x81983455 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x1455, %hpstate demap_10_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x1a800001 ! 1: BCC bcc stxa %g3, [%g3] 0x57 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0xccb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe132 ! 145: LDD_I ldd [%r31 + 0x0132], %r19 .word 0xe63fe130 ! 146: STD_I std %r19, [%r31 + 0x0130] nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982c16 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c16, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_10_129: rdhpr %halt, %r17 .word 0x85880000 ! 148: ALLCLEAN splash_tba_10_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_10_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_131-donret_10_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d8dd00 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x80f, %htstate best_set_reg(0xd20, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) done donretarg_10_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_132) , 16, 16)) -> intp(5,0,7,*,696,*,97,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_132)&0xffffffff) , 16, 16)) -> intp(1,0,7,*,656,*,97,1) #else set 0x33702234, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_132: .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, memptr_10_133: set 0x60140000, %r31 .word 0x8584ad21 ! 152: WRCCR_I wr %r18, 0x0d21, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0xa7a00160 ! 154: FABSq dis not found .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe190 ! 156: LDD_I ldd [%r31 + 0x0190], %r19 .word 0xc09fde20 ! 157: LDDA_R ldda [%r31, %r0] 0xf1, %r0 splash_lsu_10_136: nop nop ta T_CHANGE_HPRIV set 0x7841add4, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x24c90001 ! 1: BRLEZ brlez,a,pt %r4, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697c400 ! 159: LDUHA_R lduha [%r31, %r0] 0x20, %r19 brlez,a,pt %r16, skip_10_137 .word 0x9f80252c ! 1: SIR sir 0x052c .align 2048 skip_10_137: .word 0x95b484c2 ! 160: FCMPNE32 fcmpne32 %d18, %d2, %r10 dvapa_10_138: nop nop ta T_CHANGE_HPRIV mov 0x80e, %r20 mov 0xa, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x248, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd31fe060 ! 161: LDDF_I ldd [%r31, 0x0060], %f9 .word 0xd29fc720 ! 162: LDDA_R ldda [%r31, %r0] 0x39, %r9 intveclr_10_140: nop nop ta T_CHANGE_HPRIV setx 0xd193be5407580de4, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xccb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 163: FBPLG fblg .word 0xe1bfde00 ! 164: STDFA_R stda %f16, [%r0, %r31] brcommon3_10_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0x97aac823 ! 165: FMOVGE fmovs %fcc1, %f3, %f11 brcommon3_10_142: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-4, %r27 .word 0xe51fe0a0 ! 166: LDDF_I ldd [%r31, 0x00a0], %f18 .word 0x91944009 ! 167: WRPR_PIL_R wrpr %r17, %r9, %pil frzptr_10_144: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 168: BN bn splash_hpstate_10_145: ta T_CHANGE_NONHPRIV .word 0x8198358d ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x158d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_146: wrhpr %g0, 0x641, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d040 ! 170: CASA_I casa [%r31] 0x82, %r0, %r18 splash_lsu_10_147: nop nop ta T_CHANGE_HPRIV set 0x647d3c7b, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x20800001 ! 1: BN bn,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 171: FBPULE fbule,a,pn %fcc0, ble skip_10_148 brnz,pt %r19, skip_10_148 .align 2048 skip_10_148: .word 0x87a88a43 ! 172: FCMPd fcmpd %fcc, %f2, %f34 .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_10_149: set 0x60740000, %r31 .word 0x8580a18a ! 174: WRCCR_I wr %r2, 0x018a, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_150), 16, 16)) -> intp(mask2tid(0x10),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,640,*,*,1) xir_10_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_150: and %g1, 2, %g1 brnz,a %g1, xirwait_10_150 ldx [%r17], %g1 xir_10_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82b03e ! 175: WR_CLEAR_SOFTINT_I wr %r10, 0x103e, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_10_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_151)+8 , 16, 16)) -> intp(1,0,27,*,704,*,bc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_151)&0xffffffff)+8 , 16, 16)) -> intp(5,0,5,*,688,*,bc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_152) , 16, 16)) -> intp(5,0,26,*,704,*,7f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_152)&0xffffffff) , 16, 16)) -> intp(5,0,11,*,672,*,7f,1) #else set 0xf3d028a9, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7b244c3 ! 1: FCMPNE32 fcmpne32 %d40, %d34, %r19 intvec_10_152: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x97b4c4d1 ! 177: FCMPNE32 fcmpne32 %d50, %d48, %r11 mondo_10_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3d0] %asi stxa %r1, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944009 ! 178: WRPR_WSTATE_R wrpr %r17, %r9, %wstate .word 0xd427e08e ! 179: STW_I stw %r10, [%r31 + 0x008e] nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_154: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_154) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,928,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_154: wrhpr %g0, 0x99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 180: RDPC rd %pc, %r19 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_155: wrhpr %g0, 0xbc1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7dc40 ! 182: CASA_I casa [%r31] 0xe2, %r0, %r9 .word 0xa5b40ff0 ! 183: FONES e %f18 splash_tba_10_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_10_157: rdhpr %halt, %r11 .word 0x85880000 ! 185: ALLCLEAN .word 0x87aacaca ! 186: FCMPEd fcmped %fcc, %f42, %f10 frzptr_10_158: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0xcdb0cf8e, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_159: .word 0xa1a089c3 ! 188: FDIVd fdivd %f2, %f34, %f16 .word 0xd437e108 ! 189: STH_I sth %r10, [%r31 + 0x0108] change_to_randtl_10_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_10_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_162), 16, 16)) -> intp(mask2tid(0x10),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,952,*,*,1) xir_10_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_162: and %g1, 2, %g1 brnz,a %g1, xirwait_10_162 ldx [%r17], %g1 xir_10_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e593 ! 192: WR_CLEAR_SOFTINT_I wr %r19, 0x0593, %clear_softint .word 0x91934013 ! 193: WRPR_PIL_R wrpr %r13, %r19, %pil memptr_10_164: set 0x60340000, %r31 .word 0x8584be5d ! 194: WRCCR_I wr %r18, 0x1e5d, %ccr .word 0xd41fe000 ! 195: LDD_I ldd [%r31 + 0x0000], %r10 frzptr_10_166: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdd40 ! 196: LDDFA_R ldda [%r31, %r0], %f0 brcommon1_10_167: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-0, %r27 .word 0x9f802ead ! 197: SIR sir 0x0ead dvapa_10_168: nop nop ta T_CHANGE_HPRIV mov 0xf60, %r20 mov 0x10, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x912, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd01fe030 ! 198: LDD_I ldd [%r31 + 0x0030], %r8 .word 0xc0bfc3e0 ! 199: STDA_R stda %r0, [%r31 + %r0] 0x1f .word 0x9350c000 ! 200: RDPR_TT .word 0xf16fe1b0 ! 201: PREFETCH_I prefetch [%r31 + 0x01b0], #24 fpinit_10_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8da009a4 ! 202: FDIVs fdivs %f0, %f4, %f6 .word 0xe1bfdc40 ! 203: STDFA_R stda %f16, [%r0, %r31] cwp_10_172: set user_data_start, %o7 .word 0x93902007 ! 204: WRPR_CWP_I wrpr %r0, 0x0007, %cwp nop nop set 0xf330a4d9, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x99b484d2 ! 1: FCMPNE32 fcmpne32 %d18, %d18, %r12 intvec_10_173: .word 0x39400001 ! 205: FBPUGE fbuge,a,pn %fcc0, splash_lsu_10_174: nop nop ta T_CHANGE_HPRIV set 0x53af0e86, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 206: FBPULE fbule,a,pn %fcc0, ibp_10_175: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_175: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_175 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_175: brnz %r16, ibp_wait10_175 ld [%r23], %r16 ba ibp_startwait10_175 mov 0x10, %r16 continue_ibp_10_175: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_175: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_175 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_175: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_175 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_175: best_set_reg(0x00000040e6e98de5,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe19fdc40 ! 207: LDDFA_R ldda [%r31, %r0], %f16 dvapa_10_176: nop nop ta T_CHANGE_HPRIV mov 0xc4c, %r20 mov 0x11, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xad3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdd40 ! 208: LDDA_R ldda [%r31, %r0] 0xea, %r16 splash_lsu_10_177: nop nop ta T_CHANGE_HPRIV set 0x71c8f311, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 209: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_10 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_178: wrhpr %g0, 0x318, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d100 ! 210: CASA_I casa [%r31] 0x88, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_179), 16, 16)) -> intp(mask2tid(0x10),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,976,*,*,1) xir_10_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_179: and %g1, 2, %g1 brnz,a %g1, xirwait_10_179 ldx [%r17], %g1 xir_10_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8260f4 ! 211: WR_CLEAR_SOFTINT_I wr %r9, 0x00f4, %clear_softint .word 0xa5a00550 ! 212: FSQRTd fsqrt cancelint_10_180: rdhpr %halt, %r11 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_181), 16, 16)) -> intp(mask2tid(0x10),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,672,*,*,1) xir_10_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_181: and %g1, 2, %g1 brnz,a %g1, xirwait_10_181 ldx [%r17], %g1 xir_10_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80bd68 ! 214: WR_CLEAR_SOFTINT_I wr %r2, 0x1d68, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_182: wrhpr %g0, 0x91b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c080 ! 215: CASA_I casa [%r31] 0x 4, %r0, %r10 dvapa_10_183: nop nop ta T_CHANGE_HPRIV mov 0x8c8, %r20 mov 0x0, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xe08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdc40 ! 216: LDDA_R ldda [%r31, %r0] 0xe2, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_184), 16, 16)) -> intp(mask2tid(0x10),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1016,*,*,1) xir_10_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_184: and %g1, 2, %g1 brnz,a %g1, xirwait_10_184 ldx [%r17], %g1 xir_10_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80f745 ! 217: WR_CLEAR_SOFTINT_I wr %r3, 0x1745, %clear_softint vahole3_10_185: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xd53fe180 ! 218: STDF_I std %f10, [0x0180, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_186)+8 , 16, 16)) -> intp(3,0,13,*,672,*,1a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_186)&0xffffffff)+8 , 16, 16)) -> intp(0,0,23,*,920,*,1a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982604 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0604, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_10_187: nop nop ta T_CHANGE_HPRIV mov 0xf39, %r20 mov 0x19, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4dfc600 ! 220: LDXA_R ldxa [%r31, %r0] 0x30, %r10 pmu_10_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffab, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_10_189: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x957021c0 ! 1: POPC_I popc 0x01c0, %r10 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 222: BN bn,a cancelint_10_190: rdhpr %halt, %r12 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_191: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_191) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1000,*,*,1)') ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_191: wrhpr %g0, 0x6c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 224: RDPC rd %pc, %r12 brcommon1_10_192: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-0, %r27 .word 0xa7a349d3 ! 225: FDIVd fdivd %f44, %f50, %f50 nop nop mov 0x1, %r18 splash_cmpr_10_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_193)+8 , 16, 16)) -> intp(1,0,4,*,960,*,fb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_193)&0xffffffff)+8 , 16, 16)) -> intp(7,0,18,*,712,*,fb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_194)+8 , 16, 16)) -> intp(3,0,6,*,664,*,de,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_194)&0xffffffff)+8 , 16, 16)) -> intp(3,0,1,*,696,*,de,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198215d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x015d, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_195: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_195) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,736,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_195: wrhpr %g0, 0xacb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 228: RDPC rd %pc, %r17 .word 0x87902367 ! 229: WRPR_TT_I wrpr %r0, 0x0367, %tt nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_196: wrhpr %g0, 0x53, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c600 ! 230: CASA_I casa [%r31] 0x30, %r0, %r18 .word 0xe43fe040 ! 231: STD_I std %r18, [%r31 + 0x0040] .word 0xe41fe080 ! 232: LDD_I ldd [%r31 + 0x0080], %r18 frzptr_10_199: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 233: BN bn,a .word 0xa5b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r18 .word 0x9f80292e ! 234: SIR sir 0x092e mondo_10_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r6, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d92c010 ! 235: WRPR_WSTATE_R wrpr %r11, %r16, %wstate splash_tba_10_201: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_202)+8 , 16, 16)) -> intp(7,0,29,*,744,*,b0,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_202)&0xffffffff)+8 , 16, 16)) -> intp(7,0,20,*,704,*,b0,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198370e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x170e, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_10_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3c0] %asi stxa %r5, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94c00c ! 238: WRPR_WSTATE_R wrpr %r19, %r12, %wstate cancelint_10_204: rdhpr %halt, %r10 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_10_205: nop nop ta T_CHANGE_HPRIV set 0x8990a14c, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400002 ! 240: FBPULE fbule nop nop ta T_CHANGE_HPRIV ! macro donret_10_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_206-donret_10_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0070d700 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xdcf, %htstate wrhpr %g0, 0xd8b, %hpstate ! rand=1 (10) ldx [%r12+%r0], %g1 retry donretarg_10_206: .word 0x1f400001 ! 241: FBPO fbo .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x91940013 ! 243: WRPR_PIL_R wrpr %r16, %r19, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_208), 16, 16)) -> intp(mask2tid(0x10),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) xir_10_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_208: and %g1, 2, %g1 brnz,a %g1, xirwait_10_208 ldx [%r17], %g1 xir_10_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852238 ! 244: WR_CLEAR_SOFTINT_I wr %r20, 0x0238, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_209)+8 , 16, 16)) -> intp(4,0,23,*,744,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_209)&0xffffffff)+8 , 16, 16)) -> intp(1,0,20,*,640,*,b3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982597 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0597, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_210: wrhpr %g0, 0x690, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 246: CASA_I casa [%r31] 0x8a, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x0, %r18 splash_cmpr_10_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 248: SIAM siam 1 cancelint_10_212: rdhpr %halt, %r10 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_213)+8 , 16, 16)) -> intp(6,0,30,*,696,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_213)&0xffffffff)+8 , 16, 16)) -> intp(7,0,22,*,688,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d0d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d0d, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d903853 ! 251: WRPR_PSTATE_I wrpr %r0, 0x1853, %pstate memptr_10_215: set 0x60740000, %r31 .word 0x85847c32 ! 252: WRCCR_I wr %r17, 0x1c32, %ccr nop nop mov 0x1, %r18 splash_cmpr_10_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_216)+8 , 16, 16)) -> intp(7,0,30,*,1016,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_216)&0xffffffff)+8 , 16, 16)) -> intp(3,0,5,*,976,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_10_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7d160 ! 1: CASA_I casa [%r31] 0x8b, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa3aac82d ! 254: FMOVGE fmovs %fcc1, %f13, %f17 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_218) , 16, 16)) -> intp(0,0,27,*,952,*,da,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_218)&0xffffffff) , 16, 16)) -> intp(0,0,7,*,744,*,da,1) #else set 0x18044d6, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x91b4c4c4 ! 1: FCMPNE32 fcmpne32 %d50, %d4, %r8 intvec_10_218: .word 0xa7b404ca ! 255: FCMPNE32 fcmpne32 %d16, %d10, %r19 .word 0x91944010 ! 256: WRPR_PIL_R wrpr %r17, %r16, %pil ibp_10_220: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_220: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_220 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_220: brnz %r16, ibp_wait10_220 ld [%r23], %r16 ba ibp_startwait10_220 mov 0x10, %r16 continue_ibp_10_220: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_220: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_220 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_220: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_220 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_220: best_set_reg(0x00000040b4cde54e,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x95a449d4 ! 257: FDIVd fdivd %f48, %f20, %f10 .word 0xd61fe070 ! 258: LDD_I ldd [%r31 + 0x0070], %r11 cancelint_10_222: rdhpr %halt, %r19 .word 0x85880000 ! 259: ALLCLEAN .word 0xc09fde00 ! 260: LDDA_R ldda [%r31, %r0] 0xf0, %r0 .word 0xe8dfc2e0 ! 261: LDXA_R ldxa [%r31, %r0] 0x17, %r20 cancelint_10_225: rdhpr %halt, %r16 .word 0x85880000 ! 262: ALLCLEAN brcommon3_10_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r9, [%r0] ASI_LSU_CONTROL .word 0x97aac833 ! 263: FMOVGE fmovs %fcc1, %f19, %f11 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819836cc ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x16cc, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_10_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe1e0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x01e0] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0x95aac830 ! 265: FMOVGE fmovs %fcc1, %f16, %f10 vahole3_10_229: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd61fe1e0 ! 266: LDD_I ldd [%r31 + 0x01e0], %r11 splash_hpstate_10_230: .word 0x26800001 ! 1: BL bl,a .word 0x8198340e ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x140e, %hpstate memptr_10_231: set user_data_start, %r31 .word 0x8582ede3 ! 268: WRCCR_I wr %r11, 0x0de3, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_232) , 16, 16)) -> intp(3,0,21,*,688,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_232)&0xffffffff) , 16, 16)) -> intp(3,0,28,*,672,*,77,1) #else set 0x5b90e5b5, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_232: .word 0xa3a249d2 ! 269: FDIVd fdivd %f40, %f18, %f48 pmu_10_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffa0, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_10_234: nop nop ta T_CHANGE_HPRIV set 0x0a826fca, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 272: FBPULE fbule #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_235), 16, 16)) -> intp(mask2tid(0x10),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,728,*,*,1) xir_10_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_235: and %g1, 2, %g1 brnz,a %g1, xirwait_10_235 ldx [%r17], %g1 xir_10_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84674e ! 273: WR_CLEAR_SOFTINT_I wr %r17, 0x074e, %clear_softint .word 0x9f802030 ! 274: SIR sir 0x0030 .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xc1bfde00 ! 276: STDFA_R stda %f0, [%r0, %r31] .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_10_240: nop nop ta T_CHANGE_HPRIV set 0xa7f57696, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2acc4001 ! 1: BRNZ brnz,a,pt %r17, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0xbd308070, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_241: .word 0x99b444d3 ! 279: FCMPNE32 fcmpne32 %d48, %d50, %r12 mondo_10_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948006 ! 280: WRPR_WSTATE_R wrpr %r18, %r6, %wstate dvapa_10_243: nop nop ta T_CHANGE_HPRIV mov 0x997, %r20 mov 0x1d, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x653, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f80247b ! 281: SIR sir 0x047b nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_244: wrhpr %g0, 0x691, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c180 ! 282: CASA_I casa [%r31] 0x c, %r0, %r20 .word 0xe81fe170 ! 283: LDD_I ldd [%r31 + 0x0170], %r20 vahole3_10_246: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe89fd060 ! 284: LDDA_R ldda [%r31, %r0] 0x83, %r20 br_longdelay4_10_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902002 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_248: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_248) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,904,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_248: wrhpr %g0, 0x893, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 286: RDPC rd %pc, %r12 memptr_10_249: set user_data_start, %r31 .word 0x8581e515 ! 287: WRCCR_I wr %r7, 0x0515, %ccr .word 0x91924010 ! 288: WRPR_PIL_R wrpr %r9, %r16, %pil mondo_10_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d94c006 ! 289: WRPR_WSTATE_R wrpr %r19, %r6, %wstate cancelint_10_252: rdhpr %halt, %r11 .word 0x85880000 ! 290: ALLCLEAN jmptr_10_253: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_10_254: rdhpr %halt, %r11 .word 0x85880000 ! 292: ALLCLEAN frzptr_10_255: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x9bb7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r13 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdd40 ! 293: LDDFA_R ldda [%r31, %r0], %f16 .word 0x9ba089ab ! 294: FDIVs fdivs %f2, %f11, %f13 frzptr_10_257: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 295: LDDFA_R ldda [%r31, %r0], %f16 br_badelay1_10_258: .word 0x2cccc002 ! 1: BRGZ brgz,a,pt %r19, .word 0xd937e120 ! 1: STQF_I - %f12, [0x0120, %r31] .word 0xd83fe1a0 ! 1: STD_I std %r12, [%r31 + 0x01a0] normalw .word 0xa7458000 ! 296: RD_SOFTINT_REG rd %softint, %r19 ibp_10_259: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_259: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_259 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_259: brnz %r16, ibp_wait10_259 ld [%r23], %r16 ba ibp_startwait10_259 mov 0x10, %r16 continue_ibp_10_259: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_259: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_259 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_259: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_259 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_259: best_set_reg(0x000000500be54ee5,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa17021a0 ! 297: POPC_I popc 0x01a0, %r16 .word 0x91948009 ! 298: WRPR_PIL_R wrpr %r18, %r9, %pil brcommon2_10_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe090 ! 1: PREFETCH_I prefetch [%r31 + 0x0090], #24 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfc3e0 ! 299: STDFA_R stda %f16, [%r0, %r31] splash_lsu_10_262: nop nop ta T_CHANGE_HPRIV set 0x00d1169b, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 300: FBPULE fbule pmu_10_263: nop nop setx 0xffffffb9ffffffae, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_10_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_264)+8 , 16, 16)) -> intp(0,0,19,*,680,*,37,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_264)&0xffffffff)+8 , 16, 16)) -> intp(3,0,13,*,680,*,37,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_10_265: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_266), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,904,*,*,1) xir_10_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_266: and %g1, 2, %g1 brnz,a %g1, xirwait_10_266 ldx [%r17], %g1 xir_10_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846d0c ! 304: WR_CLEAR_SOFTINT_I wr %r17, 0x0d0c, %clear_softint nop nop set 0x32104d82, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9ba409c8 ! 1: FDIVd fdivd %f16, %f8, %f44 intvec_10_267: .word 0xa7b404d1 ! 305: FCMPNE32 fcmpne32 %d16, %d48, %r19 mondo_10_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d8] %asi stxa %r18, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d950007 ! 306: WRPR_WSTATE_R wrpr %r20, %r7, %wstate nop nop set 0x3730241f, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_10_269: .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, ibp_10_270: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_270: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_270 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_270: brnz %r16, ibp_wait10_270 ld [%r23], %r16 ba ibp_startwait10_270 mov 0x10, %r16 continue_ibp_10_270: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_270: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_270 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_270: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_270 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_270: best_set_reg(0x00000050e7cee575,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x20800001 ! 308: BN bn,a frzptr_10_271: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x997020a0 ! 1: POPC_I popc 0x00a0, %r12 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfde20 ! 309: STDFA_R stda %f0, [%r0, %r31] .word 0xd927e190 ! 310: STF_I st %f12, [0x0190, %r31] change_to_randtl_10_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_10_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_10_273: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fe1e0 ! 313: LDDFA_I ldda [%r31, 0x01e0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_274: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_274) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,944,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_274: wrhpr %g0, 0xbd8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 314: RDPC rd %pc, %r19 memptr_10_275: set 0x60340000, %r31 .word 0x85846dbb ! 315: WRCCR_I wr %r17, 0x0dbb, %ccr cancelint_10_276: rdhpr %halt, %r9 .word 0x85880000 ! 316: ALLCLEAN frzptr_10_277: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 317: BN bn,a br_badelay1_10_278: .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 normalw .word 0x91458000 ! 318: RD_SOFTINT_REG rd %softint, %r8 nop nop mov 0x0, %r18 splash_cmpr_10_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 319: SIAM siam 1 mondo_10_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d94800c ! 320: WRPR_WSTATE_R wrpr %r18, %r12, %wstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_281: wrhpr %g0, 0xf10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d160 ! 321: CASA_I casa [%r31] 0x8b, %r0, %r19 frzptr_10_282: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe63fe0d0 ! 1: STD_I std %r19, [%r31 + 0x00d0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 322: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_283)+8 , 16, 16)) -> intp(7,0,17,*,728,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_283)&0xffffffff)+8 , 16, 16)) -> intp(6,0,7,*,936,*,5d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f53 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f53, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_10 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_284: wrhpr %g0, 0xc18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d000 ! 324: CASA_I casa [%r31] 0x80, %r0, %r19 vahole3_10_285: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe6bfd920 ! 325: STDA_R stda %r19, [%r31 + %r0] 0xc9 .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_10_287: set user_data_start, %o7 .word 0x93902006 ! 327: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 .word 0x9f8023b0 ! 328: SIR sir 0x03b0 memptr_10_288: set user_data_start, %r31 .word 0x8583364b ! 329: WRCCR_I wr %r12, 0x164b, %ccr nop nop set 0x2ba0e6e4, %r28 !TTID : 6 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_289: .word 0x9bb084d2 ! 330: FCMPNE32 fcmpne32 %d2, %d18, %r13 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_290: wrhpr %g0, 0xb9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c6c0 ! 331: CASA_I casa [%r31] 0x36, %r0, %r13 brcommon1_10_291: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c2c0 ! 1: CASA_I casa [%r31] 0x16, %r0, %r13 ba,a .+8 jmpl %r27-0, %r27 .word 0x93b447d0 ! 332: PDIST pdistn %d48, %d16, %d40 dvapa_10_292: nop nop ta T_CHANGE_HPRIV mov 0xd8f, %r20 mov 0xa, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd40, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdc40 ! 333: STDA_R stda %r0, [%r31 + %r0] 0xe2 .word 0xd2bfd920 ! 334: STDA_R stda %r9, [%r31 + %r0] 0xc9 nop nop ta T_CHANGE_HPRIV ! macro donret_10_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_294-donret_10_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0077a100 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xec4, %htstate best_set_reg(0x140a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) retry donretarg_10_294: .word 0x8d902781 ! 335: WRPR_PSTATE_I wrpr %r0, 0x0781, %pstate splash_tba_10_295: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x0, %r18 splash_cmpr_10_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_10_297: nop nop ta T_CHANGE_HPRIV set 0x71b8eace, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x24800001 ! 1: BLE ble,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 338: FBPULE fbule .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_10_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d903ca1 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1ca1, %pstate ibp_10_300: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_300: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_300 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_300: brnz %r16, ibp_wait10_300 ld [%r23], %r16 ba ibp_startwait10_300 mov 0x10, %r16 continue_ibp_10_300: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_300: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_300 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_300: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_300 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_300: best_set_reg(0x000000408ae575d3,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x20800001 ! 341: BN bn,a .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_10_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_301-donret_10_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0066f900 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1fce, %htstate wrhpr %g0, 0x5d8, %hpstate ! rand=1 (10) done donretarg_10_301: .word 0x28800001 ! 343: BLEU bleu,a fbuge skip_10_302 fbl,a,pn %fcc0, skip_10_302 .align 512 skip_10_302: .word 0x19400001 ! 344: FBPUGE fbuge .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_10_303: ta T_CHANGE_NONHPRIV ! macro .word 0xda1fe1e0 ! 1: LDD_I ldd [%r31 + 0x01e0], %r13 .word 0x9f802fed ! 346: SIR sir 0x0fed nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198250b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x050b, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_10_305: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe0d0 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x00d0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfda60 ! 348: STDFA_R stda %f0, [%r0, %r31] mondo_10_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94800b ! 349: WRPR_WSTATE_R wrpr %r18, %r11, %wstate intveclr_10_307: nop nop ta T_CHANGE_HPRIV setx 0x50fd825c7974442c, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x6c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 350: FBPLG fblg,a,pn %fcc0, .word 0x9194c013 ! 351: WRPR_PIL_R wrpr %r19, %r19, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_309), 16, 16)) -> intp(mask2tid(0x10),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,944,*,*,1) xir_10_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_309: and %g1, 2, %g1 brnz,a %g1, xirwait_10_309 ldx [%r17], %g1 xir_10_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842ef8 ! 352: WR_CLEAR_SOFTINT_I wr %r16, 0x0ef8, %clear_softint splash_tba_10_310: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_10_311: rdhpr %halt, %r17 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_10_312: nop nop ta T_CHANGE_HPRIV set 0x8b709a14, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_10_313: rdhpr %halt, %r17 .word 0x85880000 ! 356: ALLCLEAN jmptr_10_314: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x87902183 ! 358: WRPR_TT_I wrpr %r0, 0x0183, %tt splash_tba_10_315: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_316), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,760,*,*,1) xir_10_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_316: and %g1, 2, %g1 brnz,a %g1, xirwait_10_316 ldx [%r17], %g1 xir_10_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ff1b ! 360: WR_CLEAR_SOFTINT_I wr %r19, 0x1f1b, %clear_softint .word 0x24800001 ! 1: BLE ble,a .word 0x8d90347b ! 361: WRPR_PSTATE_I wrpr %r0, 0x147b, %pstate .word 0xe19fdd40 ! 362: LDDFA_R ldda [%r31, %r0], %f16 .word 0xa9702150 ! 1: POPC_I popc 0x0150, %r20 .word 0x9f8031bf ! 363: SIR sir 0x11bf mondo_10_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d950013 ! 364: WRPR_WSTATE_R wrpr %r20, %r19, %wstate .word 0xe89fdc40 ! 365: LDDA_R ldda [%r31, %r0] 0xe2, %r20 ibp_10_321: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_321: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_321 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_321: brnz %r16, ibp_wait10_321 ld [%r23], %r16 ba ibp_startwait10_321 mov 0x10, %r16 continue_ibp_10_321: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_321: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_321 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_321: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_321 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_321: best_set_reg(0x00000050c2f5d36c,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x858, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fe080 ! 366: STXFSR_I st-sfr %f1, [0x0080, %r31] .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_10_322: nop nop ta T_CHANGE_HPRIV setx 0x4ad61bb002752414, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_10_323: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_323: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_323 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_323: brnz %r16, ibp_wait10_323 ld [%r23], %r16 ba ibp_startwait10_323 mov 0x10, %r16 continue_ibp_10_323: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_323: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_323 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_323: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_323 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_323: best_set_reg(0x00000040b6d36cb8,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xd12, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdd40 ! 370: STDFA_R stda %f0, [%r0, %r31] memptr_10_324: set user_data_start, %r31 .word 0x85852982 ! 371: WRCCR_I wr %r20, 0x0982, %ccr .word 0xe9e7c6c0 ! 372: CASA_I casa [%r31] 0x36, %r0, %r20 ibp_10_326: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_326: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_326 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_326: brnz %r16, ibp_wait10_326 ld [%r23], %r16 ba ibp_startwait10_326 mov 0x10, %r16 continue_ibp_10_326: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_326: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_326 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_326: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_326 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_326: best_set_reg(0x00000050b2ecb8bb,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x3d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe100 ! 373: PREFETCHA_I prefetcha [%r31, + 0x0100] %asi, #24 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_327), 16, 16)) -> intp(mask2tid(0x10),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,680,*,*,1) xir_10_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_327: and %g1, 2, %g1 brnz,a %g1, xirwait_10_327 ldx [%r17], %g1 xir_10_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab837d71 ! 374: WR_CLEAR_SOFTINT_I wr %r13, 0x1d71, %clear_softint br_badelay2_10_328: .word 0xa3a249cb ! 1: FDIVd fdivd %f40, %f42, %f48 pdist %f12, %f4, %f26 .word 0x97b40305 ! 375: ALIGNADDRESS alignaddr %r16, %r5, %r11 mondo_10_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d0] %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d924011 ! 376: WRPR_WSTATE_R wrpr %r9, %r17, %wstate splash_tba_10_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_10_331: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffac, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_10_332: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_10_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r5, [%r0+0x3d0] %asi stxa %r1, [%r0+0x3c0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d91c012 ! 380: WRPR_WSTATE_R wrpr %r7, %r18, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_334)+8 , 16, 16)) -> intp(7,0,18,*,656,*,de,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_334)&0xffffffff)+8 , 16, 16)) -> intp(1,0,5,*,704,*,de,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198345f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x145f, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_10_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_335)+8 , 16, 16)) -> intp(4,0,14,*,728,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_335)&0xffffffff)+8 , 16, 16)) -> intp(2,0,22,*,928,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_10_336: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fde20 ! 383: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x9f600390, %r28 !TTID : 3 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_337: .word 0x9f80343b ! 384: SIR sir 0x143b brcommon3_10_338: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7c2c0 ! 1: CASA_I casa [%r31] 0x16, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0xd297c280 ! 385: LDUHA_R lduha [%r31, %r0] 0x14, %r9 demap_10_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r11, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0x95a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe1b4 ! 386: LDD_I ldd [%r31 + 0x01b4], %r9 .word 0xd2bfc3c0 ! 387: STDA_R stda %r9, [%r31 + %r0] 0x1e fpinit_10_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89b00484 ! 388: FCMPLE32 fcmple32 %d0, %d4, %r4 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_342) , 16, 16)) -> intp(3,0,9,*,944,*,9d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_342)&0xffffffff) , 16, 16)) -> intp(7,0,10,*,712,*,9d,1) #else set 0x3fe07900, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_342: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802db6 ! 389: SIR sir 0x0db6 brcommon2_10_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfde00 ! 390: STDFA_R stda %f16, [%r0, %r31] .word 0xe19fc3e0 ! 391: LDDFA_R ldda [%r31, %r0], %f16 splash_lsu_10_344: nop nop ta T_CHANGE_HPRIV set 0xcd058f18, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982c5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c5f, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xe1bfdc00 ! 394: STDFA_R stda %f16, [%r0, %r31] cancelint_10_347: rdhpr %halt, %r12 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_10 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_348: wrhpr %g0, 0x80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c2e0 ! 396: CASA_I casa [%r31] 0x17, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_10_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_349-donret_10_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00369400 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1707, %htstate wrhpr %g0, 0xb5a, %hpstate ! rand=1 (10) .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, ldx [%r11+%r0], %g1 done donretarg_10_349: .word 0xa3a509d0 ! 397: FDIVd fdivd %f20, %f16, %f48 splash_tba_10_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_10_351: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe110 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0110] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd28008a0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 cwp_10_352: set user_data_start, %o7 .word 0x93902002 ! 401: WRPR_CWP_I wrpr %r0, 0x0002, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_10_354: nop nop ta T_CHANGE_PRIV setx 0xffffffb2ffffffa4, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_355), 16, 16)) -> intp(mask2tid(0x10),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) xir_10_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_355: and %g1, 2, %g1 brnz,a %g1, xirwait_10_355 ldx [%r17], %g1 xir_10_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843158 ! 404: WR_CLEAR_SOFTINT_I wr %r16, 0x1158, %clear_softint brcommon3_10_356: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 405: BN bn,a frzptr_10_357: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdf00 ! 406: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_358) , 16, 16)) -> intp(5,0,9,*,936,*,35,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_358)&0xffffffff) , 16, 16)) -> intp(1,0,2,*,656,*,35,1) #else set 0x240087a0, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_358: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a349d0 ! 407: FDIVd fdivd %f44, %f16, %f40 .word 0xc19fdc40 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_10_359: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_359: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_359 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_359: brnz %r16, ibp_wait10_359 ld [%r23], %r16 ba ibp_startwait10_359 mov 0x10, %r16 continue_ibp_10_359: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_359: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_359 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_359: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_359 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_359: best_set_reg(0x00000040cff8bb0d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x20800001 ! 410: BN bn,a brcommon3_10_360: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe0c0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00c0] ba,a .+8 jmpl %r27+0, %r27 .word 0x81982547 ! 411: WRHPR_HPSTATE_I wrhpr %r0, 0x0547, %hpstate .word 0x879023b0 ! 412: WRPR_TT_I wrpr %r0, 0x03b0, %tt frzptr_10_361: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_10_362: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_10_363: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_10_364: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9027dc ! 416: WRPR_PSTATE_I wrpr %r0, 0x07dc, %pstate br_badelay3_10_365: .word 0x14800002 ! 1: BG bg .word 0x02800001 ! 1: BE be .word 0xe110c011 ! 1: LDQF_R - [%r3, %r17], %f16 .word 0x93a4482d ! 417: FADDs fadds %f17, %f13, %f9 intveclr_10_366: nop nop ta T_CHANGE_HPRIV setx 0xbab7e05845d324b1, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x712, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_10_367: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_10_368: nop nop ta T_CHANGE_HPRIV setx 0xca7745a8f1ceaedc, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, .word 0x91920014 ! 421: WRPR_PIL_R wrpr %r8, %r20, %pil splash_hpstate_10_370: .word 0x30800001 ! 1: BA ba,a .word 0x81983481 ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x1481, %hpstate cancelint_10_371: rdhpr %halt, %r19 .word 0x85880000 ! 423: ALLCLEAN mondo_10_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c0] %asi stxa %r3, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d914010 ! 424: WRPR_WSTATE_R wrpr %r5, %r16, %wstate vahole3_10_373: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0xc32fc000 ! 425: STXFSR_R st-sfr %f1, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_374), 16, 16)) -> intp(mask2tid(0x10),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,760,*,*,1) xir_10_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_374: and %g1, 2, %g1 brnz,a %g1, xirwait_10_374 ldx [%r17], %g1 xir_10_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843920 ! 426: WR_CLEAR_SOFTINT_I wr %r16, 0x1920, %clear_softint ibp_10_375: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_375: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_375 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_375: brnz %r16, ibp_wait10_375 ld [%r23], %r16 ba ibp_startwait10_375 mov 0x10, %r16 continue_ibp_10_375: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_375: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_375 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_375: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_375 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_375: best_set_reg(0x00000040bffb0dc2,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x9bb4c490 ! 427: FCMPLE32 fcmple32 %d50, %d16, %r13 .word 0xc1bfe120 ! 428: STDFA_I stda %f0, [0x0120, %r31] nop nop mov 0x1, %r18 splash_cmpr_10_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_376)+8 , 16, 16)) -> intp(0,0,7,*,960,*,1c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_376)&0xffffffff)+8 , 16, 16)) -> intp(3,0,6,*,976,*,1c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_377), 16, 16)) -> intp(mask2tid(0x10),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,752,*,*,1) xir_10_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_377: and %g1, 2, %g1 brnz,a %g1, xirwait_10_377 ldx [%r17], %g1 xir_10_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8431f7 ! 430: WR_CLEAR_SOFTINT_I wr %r16, 0x11f7, %clear_softint cancelint_10_378: rdhpr %halt, %r8 .word 0x85880000 ! 431: ALLCLEAN splash_tba_10_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_10_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_10_381: rdhpr %halt, %r20 .word 0x85880000 ! 434: ALLCLEAN memptr_10_382: set 0x60540000, %r31 .word 0x85812b69 ! 435: WRCCR_I wr %r4, 0x0b69, %ccr .word 0xd03fe120 ! 1: STD_I std %r8, [%r31 + 0x0120] .word 0x9f803114 ! 436: SIR sir 0x1114 .word 0xd037e0e6 ! 437: STH_I sth %r8, [%r31 + 0x00e6] .word 0xd01fe1f0 ! 438: LDD_I ldd [%r31 + 0x01f0], %r8 .word 0xe19fdb20 ! 439: LDDFA_R ldda [%r31, %r0], %f16 ibp_10_385: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_385: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_385 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_385: brnz %r16, ibp_wait10_385 ld [%r23], %r16 ba ibp_startwait10_385 mov 0x10, %r16 continue_ibp_10_385: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_385: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_385 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_385: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_385 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_385: best_set_reg(0x000000408bcdc256,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x93b047c6 ! 440: PDIST pdistn %d32, %d6, %d40 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_386), 16, 16)) -> intp(mask2tid(0x10),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,648,*,*,1) xir_10_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_386: and %g1, 2, %g1 brnz,a %g1, xirwait_10_386 ldx [%r17], %g1 xir_10_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852a8e ! 441: WR_CLEAR_SOFTINT_I wr %r20, 0x0a8e, %clear_softint intveclr_10_387: nop nop ta T_CHANGE_HPRIV setx 0xdb77e12e0e10597a, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 442: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_10 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_388: wrhpr %g0, 0xc1b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7df00 ! 443: CASA_I casa [%r31] 0xf8, %r0, %r13 frzptr_10_389: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 444: BN bn intveclr_10_390: nop nop ta T_CHANGE_HPRIV setx 0xbd46ecc39f610a29, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x21b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 445: FBPLG fblg,a,pn %fcc0, .word 0xa1b40493 ! 446: FCMPLE32 fcmple32 %d16, %d50, %r16 br_badelay1_10_392: .word 0xf16fe0f0 ! 1: PREFETCH_I prefetch [%r31 + 0x00f0], #24 .word 0xd1318010 ! 1: STQF_R - %f8, [%r16, %r6] .word 0x1b400001 ! 1: FBPLE fble normalw .word 0xa7458000 ! 447: RD_SOFTINT_REG rd %softint, %r19 ibp_10_393: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_393: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_393 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_393: brnz %r16, ibp_wait10_393 ld [%r23], %r16 ba ibp_startwait10_393 mov 0x10, %r16 continue_ibp_10_393: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_393: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_393 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_393: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_393 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_393: best_set_reg(0x00000050a4c2562e,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x9b702eaf ! 448: POPC_I popc 0x0eaf, %r13 jmptr_10_394: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe11fe1e0 ! 450: LDDF_I ldd [%r31, 0x01e0], %f16 memptr_10_396: set user_data_start, %r31 .word 0x85836b0f ! 451: WRCCR_I wr %r13, 0x0b0f, %ccr cancelint_10_397: rdhpr %halt, %r19 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_10_398: nop nop ta T_CHANGE_HPRIV set 0xd06335bc, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 453: FBPULE fbule brcommon2_10_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f802040 ! 1: SIR sir 0x0040 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 454: BN bn,a .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_10_400: ta T_CHANGE_NONHPRIV ! macro frzptr_10_401: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdc40 ! 456: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_402), 16, 16)) -> intp(mask2tid(0x10),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,968,*,*,1) xir_10_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_402: and %g1, 2, %g1 brnz,a %g1, xirwait_10_402 ldx [%r17], %g1 xir_10_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab813e2b ! 457: WR_CLEAR_SOFTINT_I wr %r4, 0x1e2b, %clear_softint brcommon3_10_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e000 ! 1: STQF_I - %f10, [0x0000, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0xa1aac830 ! 458: FMOVGE fmovs %fcc1, %f16, %f16 splash_tba_10_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_10_406: .word 0x12800001 ! 1: BNE bne .word 0xab60ff4b ! Random illegal ? .word 0x99a449c4 ! 1: FDIVd fdivd %f48, %f4, %f12 .word 0xa7a40833 ! 461: FADDs fadds %f16, %f19, %f19 .word 0x93b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d40 .word 0x9f803380 ! 462: SIR sir 0x1380 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_407)+8 , 16, 16)) -> intp(6,0,21,*,1016,*,fc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_407)&0xffffffff)+8 , 16, 16)) -> intp(7,0,21,*,680,*,fc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c67 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c67, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_10_408: set user_data_start, %o7 .word 0x93902006 ! 464: WRPR_CWP_I wrpr %r0, 0x0006, %cwp cancelint_10_409: rdhpr %halt, %r20 .word 0x85880000 ! 465: ALLCLEAN splash_tba_10_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe88008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 pmu_10_411: nop nop ta T_CHANGE_PRIV setx 0xffffffbfffffffad, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_10_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_10_413: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe0c0 ! 1: STXFSR_I st-sfr %f1, [0x00c0, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 471: BN bn mondo_10_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3c0] %asi stxa %r2, [%r0+0x3e0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d91800a ! 472: WRPR_WSTATE_R wrpr %r6, %r10, %wstate mondo_10_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3e0] %asi stxa %r2, [%r0+0x3d0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d940003 ! 473: WRPR_WSTATE_R wrpr %r16, %r3, %wstate .word 0x87ac4a48 ! 474: FCMPd fcmpd %fcc, %f48, %f8 mondo_10_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d940011 ! 475: WRPR_WSTATE_R wrpr %r16, %r17, %wstate cancelint_10_418: rdhpr %halt, %r12 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_419), 16, 16)) -> intp(mask2tid(0x10),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,984,*,*,1) xir_10_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_419: and %g1, 2, %g1 brnz,a %g1, xirwait_10_419 ldx [%r17], %g1 xir_10_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80be43 ! 477: WR_CLEAR_SOFTINT_I wr %r2, 0x1e43, %clear_softint jmptr_10_420: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_421: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_421) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_421: wrhpr %g0, 0x793, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 479: RDPC rd %pc, %r11 fpinit_10_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 480: FCMPd fcmpd %fcc, %f0, %f4 .word 0xc32fc000 ! 481: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_10_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_10_425: nop nop setx 0xffffffb0ffffffa0, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe070 ! 484: STDA_I stda %r17, [%r31 + 0x0070] %asi splash_lsu_10_426: nop nop ta T_CHANGE_HPRIV set 0x0514a7ac, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 485: FBPULE fbule,a,pn %fcc0, .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e0f8 ! 487: STQF_I - %f17, [0x00f8, %r31] frzptr_10_428: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe26fe140 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0140] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 488: BN bn,a brcommon3_10_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e020 ! 1: STQF_I - %f17, [0x0020, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983a00 ! 489: WRHPR_HPSTATE_I wrhpr %r0, 0x1a00, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_430: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_430) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,912,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_430: wrhpr %g0, 0xa89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 490: RDPC rd %pc, %r11 .word 0x9f802000 ! 491: SIR sir 0x0000 .word 0xe81fe100 ! 492: LDD_I ldd [%r31 + 0x0100], %r20 nop nop mov 0x0, %r18 splash_cmpr_10_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_434) , 16, 16)) -> intp(7,0,23,*,912,*,db,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_434)&0xffffffff) , 16, 16)) -> intp(3,0,29,*,976,*,db,1) #else set 0xe490948b, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa3b404d0 ! 1: FCMPNE32 fcmpne32 %d16, %d16, %r17 intvec_10_434: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x97a4c9d4 ! 494: FDIVd fdivd %f50, %f20, %f42 .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_10_436: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_437: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_437) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,936,*,*,1)') ifelse(7,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_437: wrhpr %g0, 0x949, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 497: RDPC rd %pc, %r12 splash_tba_10_438: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_10_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d924011 ! 499: WRPR_WSTATE_R wrpr %r9, %r17, %wstate brcommon2_10_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f802030 ! 1: SIR sir 0x0030 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 500: BN bn,a .word 0x9190c004 ! 501: WRPR_PIL_R wrpr %r3, %r4, %pil ibp_10_442: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_442: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_442 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_442: brnz %r16, ibp_wait10_442 ld [%r23], %r16 ba ibp_startwait10_442 mov 0x10, %r16 continue_ibp_10_442: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_442: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_442 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_442: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_442 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_442: best_set_reg(0x0000004031d62e92,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xd61fe0f0 ! 502: LDD_I ldd [%r31 + 0x00f0], %r11 cwp_10_443: set user_data_start, %o7 .word 0x93902001 ! 503: WRPR_CWP_I wrpr %r0, 0x0001, %cwp cancelint_10_444: rdhpr %halt, %r16 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e04c ! 505: STF_I st %f9, [0x004c, %r31] brcommon3_10_445: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe1d0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x01d0] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983edf ! 506: WRHPR_HPSTATE_I wrhpr %r0, 0x1edf, %hpstate splash_tba_10_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0xeeb025ac, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_447: .word 0xa1b444d2 ! 508: FCMPNE32 fcmpne32 %d48, %d18, %r16 intveclr_10_448: nop nop ta T_CHANGE_HPRIV setx 0x6438c2f9dae73134, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x689, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 509: FBPLG fblg memptr_10_449: set 0x60740000, %r31 .word 0x85813967 ! 510: WRCCR_I wr %r4, 0x1967, %ccr nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_450: wrhpr %g0, 0x34a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d060 ! 511: CASA_I casa [%r31] 0x83, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_451: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_451) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,920,*,*,1)') ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_451: wrhpr %g0, 0x909, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 512: RDPC rd %pc, %r11 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_452) , 16, 16)) -> intp(4,0,0,*,760,*,15,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_452)&0xffffffff) , 16, 16)) -> intp(5,0,7,*,944,*,15,1) #else set 0xd5103fd0, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_452: .word 0x19400001 ! 513: FBPUGE fbuge nop nop set 0x3e4084e6, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80330d ! 1: SIR sir 0x130d intvec_10_453: .word 0xa3a049cd ! 514: FDIVd fdivd %f32, %f44, %f48 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982f7c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f7c, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_10_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e8] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d92c00a ! 516: WRPR_WSTATE_R wrpr %r11, %r10, %wstate pmu_10_456: nop nop setx 0xffffffbaffffffa1, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_10_457: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0f0 ! 1: STQF_I - %f9, [0x00f0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x93b7c7c0 ! 518: PDIST pdistn %d62, %d0, %d40 pmu_10_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb7ffffffa3, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xd8e0655c, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_459: .word 0x19400002 ! 520: FBPUGE fbuge vahole3_10_460: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd69fc720 ! 521: LDDA_R ldda [%r31, %r0] 0x39, %r11 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_10_461: ta T_CHANGE_NONHPRIV ! macro .word 0x91a409c6 ! 523: FDIVd fdivd %f16, %f6, %f8 nop nop mov 0x1, %r18 splash_cmpr_10_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_463)+8 , 16, 16)) -> intp(7,0,14,*,1008,*,3b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_463)&0xffffffff)+8 , 16, 16)) -> intp(7,0,20,*,760,*,3b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 .word 0xe0bfde20 ! 525: STDA_R stda %r16, [%r31 + %r0] 0xf1 br_longdelay3_10_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f80308d ! 526: SIR sir 0x108d frzptr_10_466: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 527: BN bn,a .word 0xd1e7d140 ! 528: CASA_I casa [%r31] 0x8a, %r0, %r8 vahole4_10_468: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0x8198262f ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x062f, %hpstate .word 0x0cc98001 ! 1: BRGZ brgz,pt %r6, .word 0x8d9036cc ! 530: WRPR_PSTATE_I wrpr %r0, 0x16cc, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x26c8c001 ! 1: BRLZ brlz,a,pt %r3, .word 0x8d902cd3 ! 532: WRPR_PSTATE_I wrpr %r0, 0x0cd3, %pstate brcommon3_10_471: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e0f0 ! 1: STQF_I - %f8, [0x00f0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 533: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_472) , 16, 16)) -> intp(4,0,28,*,936,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_472)&0xffffffff) , 16, 16)) -> intp(6,0,2,*,960,*,53,1) #else set 0x60d09773, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a4c9d0 ! 1: FDIVd fdivd %f50, %f16, %f16 intvec_10_472: .word 0x39400001 ! 534: FBPUGE fbuge,a,pn %fcc0, .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xa7a00160 ! 536: FABSq dis not found jmptr_10_474: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_10_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_475-donret_10_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00983800 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1c9f, %htstate best_set_reg(0x268, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) done .align 2048 donretarg_10_475: .word 0x81983d56 ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x1d56, %hpstate trapasi_10_476: nop mov 0x3e0, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_477), 16, 16)) -> intp(mask2tid(0x10),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,912,*,*,1) xir_10_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_477: and %g1, 2, %g1 brnz,a %g1, xirwait_10_477 ldx [%r17], %g1 xir_10_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852699 ! 540: WR_CLEAR_SOFTINT_I wr %r20, 0x0699, %clear_softint .word 0x15400001 ! 1: FBPUE fbue .word 0x8d9036a5 ! 541: WRPR_PSTATE_I wrpr %r0, 0x16a5, %pstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_479: wrhpr %g0, 0x882, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d060 ! 542: CASA_I casa [%r31] 0x83, %r0, %r19 mondo_10_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r7, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d908001 ! 543: WRPR_WSTATE_R wrpr %r2, %r1, %wstate .word 0x97520000 ! 544: RDPR_PIL .word 0xc32fc000 ! 545: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_10_482: ta T_CHANGE_NONPRIV ! macro cancelint_10_483: rdhpr %halt, %r10 .word 0x85880000 ! 547: ALLCLEAN splash_tba_10_484: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_10_485: nop nop ta T_CHANGE_HPRIV mov 0x862, %r20 mov 0x8, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x2cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdc40 ! 549: STDFA_R stda %f0, [%r0, %r31] .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_10_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r13, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x990, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe091 ! 552: LDD_I ldd [%r31 + 0x0091], %r19 mondo_10_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d928013 ! 553: WRPR_WSTATE_R wrpr %r10, %r19, %wstate .word 0xe7e7d140 ! 1: CASA_I casa [%r31] 0x8a, %r0, %r19 .word 0x9f80315b ! 554: SIR sir 0x115b .word 0xe09fdc40 ! 555: LDDA_R ldda [%r31, %r0] 0xe2, %r16 memptr_10_491: set 0x60740000, %r31 .word 0x858529cc ! 556: WRCCR_I wr %r20, 0x09cc, %ccr nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_492: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_492) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,760,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_492: wrhpr %g0, 0xfc1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 557: RDPC rd %pc, %r12 ibp_10_493: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_493: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_493 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_493: brnz %r16, ibp_wait10_493 ld [%r23], %r16 ba ibp_startwait10_493 mov 0x10, %r16 continue_ibp_10_493: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_493: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_493 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_493: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_493 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_493: best_set_reg(0x0000004016ee927f,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xf19, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe81fe070 ! 558: LDD_I ldd [%r31 + 0x0070], %r20 .word 0x08800001 ! 559: BLEU bleu vahole2_10_494: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xc19fde20 ! 560: LDDFA_R ldda [%r31, %r0], %f0 ibp_10_495: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_495: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_495 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_495: brnz %r16, ibp_wait10_495 ld [%r23], %r16 ba ibp_startwait10_495 mov 0x10, %r16 continue_ibp_10_495: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_495: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_495 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_495: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_495 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_495: best_set_reg(0x00000040e0d27f57,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x51a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdf20 ! 561: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_496) , 16, 16)) -> intp(7,0,27,*,664,*,11,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_496)&0xffffffff) , 16, 16)) -> intp(5,0,6,*,912,*,11,1) #else set 0xff90ddc1, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_496: .word 0x9f802435 ! 562: SIR sir 0x0435 frzptr_10_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdc00 ! 563: LDDFA_R ldda [%r31, %r0], %f0 memptr_10_498: set user_data_start, %r31 .word 0x85833b29 ! 564: WRCCR_I wr %r12, 0x1b29, %ccr .word 0x99a349d2 ! 565: FDIVd fdivd %f44, %f18, %f12 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_500) , 16, 16)) -> intp(1,0,13,*,952,*,7d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_500)&0xffffffff) , 16, 16)) -> intp(5,0,24,*,896,*,7d,1) #else set 0xc4202590, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x97a489c1 ! 1: FDIVd fdivd %f18, %f32, %f42 intvec_10_500: .word 0x19400001 ! 566: FBPUGE fbuge jmptr_10_501: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_502: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_502) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,936,*,*,1)') ifelse(1,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_502: wrhpr %g0, 0x893, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 568: RDPC rd %pc, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_10_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_503-donret_10_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b8c400 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x135b, %htstate best_set_reg(0xab8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) done donretarg_10_503: .word 0xa3a4c9c9 ! 569: FDIVd fdivd %f50, %f40, %f48 frzptr_10_504: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0xa5702080 ! 1: POPC_I popc 0x0080, %r18 .word 0x9f8033ca ! 571: SIR sir 0x13ca #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_505), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) xir_10_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_505: and %g1, 2, %g1 brnz,a %g1, xirwait_10_505 ldx [%r17], %g1 xir_10_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852f67 ! 572: WR_CLEAR_SOFTINT_I wr %r20, 0x0f67, %clear_softint frzptr_10_506: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 573: BN bn,a cancelint_10_507: rdhpr %halt, %r9 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_508) , 16, 16)) -> intp(5,0,24,*,936,*,7e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_508)&0xffffffff) , 16, 16)) -> intp(0,0,8,*,912,*,7e,1) #else set 0x6ff03b7c, %r28 !TTID : 3 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_508: .word 0xa3b144d2 ! 575: FCMPNE32 fcmpne32 %d36, %d18, %r17 cancelint_10_509: rdhpr %halt, %r17 .word 0x85880000 ! 576: ALLCLEAN vahole4_10_510: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0x9f803d17 ! 577: SIR sir 0x1d17 .word 0x87902012 ! 578: WRPR_TT_I wrpr %r0, 0x0012, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_511), 16, 16)) -> intp(mask2tid(0x10),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,680,*,*,1) xir_10_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_511: and %g1, 2, %g1 brnz,a %g1, xirwait_10_511 ldx [%r17], %g1 xir_10_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843efa ! 579: WR_CLEAR_SOFTINT_I wr %r16, 0x1efa, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_512) , 16, 16)) -> intp(6,0,24,*,1008,*,38,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_512)&0xffffffff) , 16, 16)) -> intp(5,0,29,*,952,*,38,1) #else set 0xd1806434, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_512: .word 0xa9a1c9cb ! 580: FDIVd fdivd %f38, %f42, %f20 brcommon3_10_513: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983c16 ! 581: WRHPR_HPSTATE_I wrhpr %r0, 0x1c16, %hpstate .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_10_514: ta T_CHANGE_NONHPRIV ! macro .word 0xc32fe0b0 ! 583: STXFSR_I st-sfr %f1, [0x00b0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_10 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_516: wrhpr %g0, 0xe51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c6c0 ! 584: CASA_I casa [%r31] 0x36, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_517: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_517) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,672,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_517: wrhpr %g0, 0x943, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 585: RDPC rd %pc, %r18 cancelint_10_518: rdhpr %halt, %r18 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_519: wrhpr %g0, 0x9d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d160 ! 587: CASA_I casa [%r31] 0x8b, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_520: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_520) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,912,*,*,1)') ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_520: wrhpr %g0, 0xf08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 588: RDPC rd %pc, %r16 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d903ee0 ! 590: WRPR_PSTATE_I wrpr %r0, 0x1ee0, %pstate br_badelay2_10_523: .word 0x12800001 ! 1: BNE bne pdist %f10, %f16, %f4 .word 0xa5b4c309 ! 591: ALIGNADDRESS alignaddr %r19, %r9, %r18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_524) , 16, 16)) -> intp(3,0,3,*,944,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_524)&0xffffffff) , 16, 16)) -> intp(3,0,8,*,744,*,b3,1) #else set 0x3ff025d1, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_524: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 592: FBPUGE fbuge,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_10_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_525)+8 , 16, 16)) -> intp(4,0,9,*,936,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_525)&0xffffffff)+8 , 16, 16)) -> intp(6,0,6,*,728,*,33,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 593: SIAM siam 1 memptr_10_526: set 0x60740000, %r31 .word 0x85842fd5 ! 594: WRCCR_I wr %r16, 0x0fd5, %ccr frzptr_10_527: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 595: BN bn bcc,a skip_10_528 stxa %r14, [%r0] ASI_LSU_CONTROL brlez,a,pn %r20, skip_10_528 stxa %r11, [%r0] ASI_LSU_CONTROL .align 2048 skip_10_528: .word 0xe43fe1c0 ! 596: STD_I std %r18, [%r31 + 0x01c0] splash_hpstate_10_529: .word 0x3a800001 ! 1: BCC bcc,a .word 0x819824c6 ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x04c6, %hpstate .word 0xe527e0b4 ! 598: STF_I st %f18, [0x00b4, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_530), 16, 16)) -> intp(mask2tid(0x10),1,3,*,736,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,672,*,*,1) xir_10_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_530: and %g1, 2, %g1 brnz,a %g1, xirwait_10_530 ldx [%r17], %g1 xir_10_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e3bc ! 599: WR_CLEAR_SOFTINT_I wr %r19, 0x03bc, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_10_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_531-donret_10_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00097400 | (16 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xc0d, %htstate best_set_reg(0x12d3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) ldx [%r11+%r0], %g1 done donretarg_10_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_532)+8 , 16, 16)) -> intp(2,0,30,*,648,*,1a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_532)&0xffffffff)+8 , 16, 16)) -> intp(4,0,22,*,752,*,1a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198369d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x169d, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x418057eb, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_533: .word 0x93a249c2 ! 602: FDIVd fdivd %f40, %f2, %f40 splash_hpstate_10_534: .word 0x16800001 ! 1: BGE bge .word 0x8198258d ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x058d, %hpstate fbo,a,pn %fcc0, skip_10_535 bpos skip_10_535 .align 1024 skip_10_535: .word 0xa5b504c8 ! 604: FCMPNE32 fcmpne32 %d20, %d8, %r18 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_536), 16, 16)) -> intp(mask2tid(0x10),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,976,*,*,1) xir_10_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_536: and %g1, 2, %g1 brnz,a %g1, xirwait_10_536 ldx [%r17], %g1 xir_10_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846129 ! 605: WR_CLEAR_SOFTINT_I wr %r17, 0x0129, %clear_softint mondo_10_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3d0] %asi stxa %r6, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d920001 ! 606: WRPR_WSTATE_R wrpr %r8, %r1, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_538) , 16, 16)) -> intp(1,0,26,*,720,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_538)&0xffffffff) , 16, 16)) -> intp(2,0,20,*,952,*,33,1) #else set 0x2a10983e, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_538: .word 0x93b504d4 ! 607: FCMPNE32 fcmpne32 %d20, %d20, %r9 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_539: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_539) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,728,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_539: wrhpr %g0, 0x9c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 608: RDPC rd %pc, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_540) , 16, 16)) -> intp(6,0,28,*,720,*,d6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_540)&0xffffffff) , 16, 16)) -> intp(4,0,22,*,752,*,d6,1) #else set 0x55602f14, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_540: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5b204d0 ! 609: FCMPNE32 fcmpne32 %d8, %d16, %r18 nop nop ta T_CHANGE_HPRIV ! macro donret_10_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_541-donret_10_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00df9100 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1499, %htstate best_set_reg(0x1e59, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) done donretarg_10_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_542: wrhpr %g0, 0xcc1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d160 ! 611: CASA_I casa [%r31] 0x8b, %r0, %r8 ibp_10_543: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_543: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_543 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_543: brnz %r16, ibp_wait10_543 ld [%r23], %r16 ba ibp_startwait10_543 mov 0x10, %r16 continue_ibp_10_543: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_543: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_543 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_543: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_543 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_543: best_set_reg(0x00000040ffff57d1,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x901, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdc00 ! 612: LDDFA_R ldda [%r31, %r0], %f0 .word 0x8d9039c7 ! 613: WRPR_PSTATE_I wrpr %r0, 0x19c7, %pstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_545: wrhpr %g0, 0x1c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c380 ! 614: CASA_I casa [%r31] 0x1c, %r0, %r8 jmptr_10_546: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0x93b2c481 ! 616: FCMPLE32 fcmple32 %d42, %d32, %r9 .word 0xe737e176 ! 617: STQF_I - %f19, [0x0176, %r31] .word 0x3a780001 ! 618: BPCC ibp_10_548: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_548: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_548 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_548: brnz %r16, ibp_wait10_548 ld [%r23], %r16 ba ibp_startwait10_548 mov 0x10, %r16 continue_ibp_10_548: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_548: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_548 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_548: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_548 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_548: best_set_reg(0x00000040a1d7d18d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800001 ! 619: BN bn .word 0x95a4c9b1 ! 620: FDIVs fdivs %f19, %f17, %f10 .word 0xdb1fe1f0 ! 621: LDDF_I ldd [%r31, 0x01f0], %f13 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_10 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_551: wrhpr %g0, 0x40b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c180 ! 622: CASA_I casa [%r31] 0x c, %r0, %r13 mondo_10_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d8] %asi stxa %r7, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d948005 ! 623: WRPR_WSTATE_R wrpr %r18, %r5, %wstate intveclr_10_553: nop nop ta T_CHANGE_HPRIV setx 0x98b0789b17d48d90, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 624: FBPLG fblg splash_tba_10_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_555: wrhpr %g0, 0x5cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d000 ! 626: CASA_I casa [%r31] 0x80, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_556) , 16, 16)) -> intp(6,0,16,*,672,*,3d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_556)&0xffffffff) , 16, 16)) -> intp(0,0,14,*,936,*,3d,1) #else set 0xda0e17b, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 627: FBPUGE fbuge,a,pn %fcc0, mondo_10_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c8] %asi stxa %r10, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d90c007 ! 628: WRPR_WSTATE_R wrpr %r3, %r7, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0xbf502237, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_559: .word 0xa1a449c5 ! 630: FDIVd fdivd %f48, %f36, %f16 frzptr_10_560: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdb40 ! 631: LDDFA_R ldda [%r31, %r0], %f16 splash_tba_10_561: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_10_562: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_563: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_563) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1016,*,*,1)') ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_563: wrhpr %g0, 0xc11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 634: RDPC rd %pc, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_564), 16, 16)) -> intp(mask2tid(0x10),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,728,*,*,1) xir_10_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_564: and %g1, 2, %g1 brnz,a %g1, xirwait_10_564 ldx [%r17], %g1 xir_10_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84307d ! 635: WR_CLEAR_SOFTINT_I wr %r16, 0x107d, %clear_softint ibp_10_565: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_565: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_565 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_565: brnz %r16, ibp_wait10_565 ld [%r23], %r16 ba ibp_startwait10_565 mov 0x10, %r16 continue_ibp_10_565: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_565: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_565 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_565: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_565 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_565: best_set_reg(0x00000040ead18d46,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x893, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe69fd060 ! 636: LDDA_R ldda [%r31, %r0] 0x83, %r19 .word 0x9bb307d2 ! 637: PDIST pdistn %d12, %d18, %d44 splash_lsu_10_567: nop nop ta T_CHANGE_HPRIV set 0xf19d4e01, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x38800002 ! 1: BGU bgu,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_10_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-4, %r27 .word 0xc1bfc3e0 ! 639: STDFA_R stda %f0, [%r0, %r31] nop nop set 0x4dc0993b, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_569: .word 0x19400002 ! 640: FBPUGE fbuge .word 0x91948012 ! 641: WRPR_PIL_R wrpr %r18, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_571: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_571) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,656,*,*,1)') ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_571: wrhpr %g0, 0xcd8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 642: RDPC rd %pc, %r17 .word 0xd33fe1a4 ! 643: STDF_I std %f9, [0x01a4, %r31] .word 0xe19fdb20 ! 644: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_572), 16, 16)) -> intp(mask2tid(0x10),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,672,*,*,1) xir_10_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_572: and %g1, 2, %g1 brnz,a %g1, xirwait_10_572 ldx [%r17], %g1 xir_10_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816536 ! 645: WR_CLEAR_SOFTINT_I wr %r5, 0x0536, %clear_softint .word 0xc19fde00 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x7070e060, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_573: .word 0x39400001 ! 647: FBPUGE fbuge,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_574), 16, 16)) -> intp(mask2tid(0x10),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,728,*,*,1) xir_10_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_574: and %g1, 2, %g1 brnz,a %g1, xirwait_10_574 ldx [%r17], %g1 xir_10_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8520d7 ! 648: WR_CLEAR_SOFTINT_I wr %r20, 0x00d7, %clear_softint ibp_10_575: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_575: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_575 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_575: brnz %r16, ibp_wait10_575 ld [%r23], %r16 ba ibp_startwait10_575 mov 0x10, %r16 continue_ibp_10_575: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_575: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_575 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_575: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_575 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_575: best_set_reg(0x000000502dcd4699,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x24a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdadfd060 ! 649: LDXA_R ldxa [%r31, %r0] 0x83, %r13 splash_tba_10_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_10_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94c010 ! 651: WRPR_WSTATE_R wrpr %r19, %r16, %wstate .word 0xda9fd000 ! 652: LDDA_R ldda [%r31, %r0] 0x80, %r13 splash_tba_10_579: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_10_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r16, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x800, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe143 ! 654: LDD_I ldd [%r31 + 0x0143], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_10_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d930005 ! 656: WRPR_WSTATE_R wrpr %r12, %r5, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_583), 16, 16)) -> intp(mask2tid(0x10),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,688,*,*,1) xir_10_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_583: and %g1, 2, %g1 brnz,a %g1, xirwait_10_583 ldx [%r17], %g1 xir_10_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8273be ! 657: WR_CLEAR_SOFTINT_I wr %r9, 0x13be, %clear_softint demap_10_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r14, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0xb4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe11d ! 658: LDD_I ldd [%r31 + 0x011d], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] vahole5_10_585: nop nop setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 ta T_CHANGE_NONPRIV .word 0x95b28322 ! 660: BMASK bmask %r10, %r2, %r10 dvapa_10_586: nop nop ta T_CHANGE_HPRIV mov 0xab3, %r20 mov 0x1f, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x3da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdf00 ! 661: LDDA_R ldda [%r31, %r0] 0xf8, %r16 frzptr_10_587: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 662: BN bn,a frzptr_10_588: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_589), 16, 16)) -> intp(mask2tid(0x10),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,736,*,*,1) xir_10_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_589: and %g1, 2, %g1 brnz,a %g1, xirwait_10_589 ldx [%r17], %g1 xir_10_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ef3c ! 664: WR_CLEAR_SOFTINT_I wr %r19, 0x0f3c, %clear_softint .word 0x97703c1c ! 665: POPC_I popc 0x1c1c, %r11 .word 0xd8bfe0d0 ! 666: STDA_I stda %r12, [%r31 + 0x00d0] %asi frzptr_10_590: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 667: BN bn,a mondo_10_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3c0] %asi stxa %r8, [%r0+0x3c8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944002 ! 668: WRPR_WSTATE_R wrpr %r17, %r2, %wstate nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_592: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_592) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,992,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_592: wrhpr %g0, 0xcda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 669: RDPC rd %pc, %r20 pmu_10_593: nop nop ta T_CHANGE_PRIV setx 0xffffffb0ffffffa8, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xa9a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f20 .word 0x9f802281 ! 671: SIR sir 0x0281 mondo_10_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3e0] %asi stxa %r11, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d914010 ! 672: WRPR_WSTATE_R wrpr %r5, %r16, %wstate jmptr_10_595: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_596)+8 , 16, 16)) -> intp(1,0,18,*,752,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_596)&0xffffffff)+8 , 16, 16)) -> intp(7,0,9,*,744,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198271d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x071d, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_597), 16, 16)) -> intp(mask2tid(0x10),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,984,*,*,1) xir_10_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_597: and %g1, 2, %g1 brnz,a %g1, xirwait_10_597 ldx [%r17], %g1 xir_10_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833e79 ! 675: WR_CLEAR_SOFTINT_I wr %r12, 0x1e79, %clear_softint .word 0xe927e184 ! 676: STF_I st %f20, [0x0184, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_598) , 16, 16)) -> intp(3,0,9,*,984,*,71,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_598)&0xffffffff) , 16, 16)) -> intp(7,0,11,*,744,*,71,1) #else set 0x8ec07917, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99a109d0 ! 1: FDIVd fdivd %f4, %f16, %f12 intvec_10_598: .word 0xa9a449d3 ! 677: FDIVd fdivd %f48, %f50, %f20 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_10 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_599: wrhpr %g0, 0x392, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7dc40 ! 678: CASA_I casa [%r31] 0xe2, %r0, %r13 frzptr_10_600: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe050 ! 1: STXFSR_I st-sfr %f1, [0x0050, %r31] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc00 ! 679: STDFA_R stda %f16, [%r0, %r31] .word 0x95a309b0 ! 680: FDIVs fdivs %f12, %f16, %f10 nop nop mov 0x1, %r18 splash_cmpr_10_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_602)+8 , 16, 16)) -> intp(7,0,7,*,968,*,7a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_602)&0xffffffff)+8 , 16, 16)) -> intp(2,0,14,*,912,*,7a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 681: SIAM siam 1 demap_10_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r15, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0xa5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe1e0 ! 682: LDD_I ldd [%r31 + 0x01e0], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_10_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_604-donret_10_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d52400 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x179d, %htstate wrhpr %g0, 0x593, %hpstate ! rand=1 (10) .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, retry donretarg_10_604: .word 0xd66fe0c9 ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x00c9] .word 0xd6dfc400 ! 684: LDXA_R ldxa [%r31, %r0] 0x20, %r11 .word 0x9190c00a ! 685: WRPR_PIL_R wrpr %r3, %r10, %pil nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_10 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_607: wrhpr %g0, 0x5d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7d100 ! 686: CASA_I casa [%r31] 0x88, %r0, %r11 .word 0x97b24589 ! 687: FCMPGT32 fcmpgt32 %d40, %d40, %r11 mondo_10_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3e0] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d944014 ! 688: WRPR_WSTATE_R wrpr %r17, %r20, %wstate cwp_10_609: set user_data_start, %o7 .word 0x93902007 ! 689: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d9039c3 ! 691: WRPR_PSTATE_I wrpr %r0, 0x19c3, %pstate .word 0xe1bfe100 ! 692: STDFA_I stda %f16, [0x0100, %r31] .word 0x0ecb4001 ! 1: BRGEZ brgez,pt %r13, .word 0x8d9022f0 ! 693: WRPR_PSTATE_I wrpr %r0, 0x02f0, %pstate nop nop mov 0x1, %r18 splash_cmpr_10_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_612)+8 , 16, 16)) -> intp(2,0,19,*,672,*,52,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_612)&0xffffffff)+8 , 16, 16)) -> intp(7,0,30,*,648,*,52,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_10_613: .word 0x81983cdd ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x1cdd, %hpstate .word 0xa5b447d1 ! 696: PDIST pdistn %d48, %d48, %d18 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_615: wrhpr %g0, 0x213, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c2c0 ! 697: CASA_I casa [%r31] 0x16, %r0, %r16 brcommon2_10_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe1b0 ! 1: PREFETCH_I prefetch [%r31 + 0x01b0], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0xe19fdd40 ! 698: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xa9520000 ! 700: RDPR_PIL mondo_10_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3d8] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d930002 ! 701: WRPR_WSTATE_R wrpr %r12, %r2, %wstate .word 0xd4bfd920 ! 702: STDA_R stda %r10, [%r31 + %r0] 0xc9 .word 0xd4800a80 ! 703: LDUWA_R lduwa [%r0, %r0] 0x54, %r10 splash_lsu_10_619: nop nop ta T_CHANGE_HPRIV set 0xb5bc2610, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0a800001 ! 1: BCS bcs stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 704: FBPULE fbule,a,pn %fcc0, intveclr_10_620: nop nop ta T_CHANGE_HPRIV setx 0x7e63e18d5555582f, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_10_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_621-donret_10_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b39300 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x55d, %htstate wrhpr %g0, 0x719, %hpstate ! rand=1 (10) .word 0x2c800001 ! 1: BNEG bneg,a done donretarg_10_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_10_622: set user_data_start, %o7 .word 0x93902006 ! 707: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xe1bfdd40 ! 708: STDFA_R stda %f16, [%r0, %r31] frzptr_10_623: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 709: LDDFA_R ldda [%r31, %r0], %f16 intveclr_10_624: nop nop ta T_CHANGE_HPRIV setx 0xef7da4d4b3070340, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xb91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 710: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_625: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_625) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1000,*,*,1)') ifelse(3,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_625: wrhpr %g0, 0xd83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 711: RDPC rd %pc, %r12 .word 0xe097dc40 ! 712: LDUHA_R lduha [%r31, %r0] 0xe2, %r16 splash_lsu_10_627: nop nop ta T_CHANGE_HPRIV set 0xab9fe4f2, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x38800001 ! 1: BGU bgu,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 713: FBPULE fbule,a,pn %fcc0, mondo_10_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3e8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d944001 ! 714: WRPR_WSTATE_R wrpr %r17, %r1, %wstate .word 0x8d9034f6 ! 715: WRPR_PSTATE_I wrpr %r0, 0x14f6, %pstate .word 0xa17021a0 ! 1: POPC_I popc 0x01a0, %r16 .word 0x9f803fe4 ! 716: SIR sir 0x1fe4 .word 0xc32fc000 ! 717: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop set 0x3a00db67, %r28 !TTID : 3 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_631: .word 0x19400001 ! 718: FBPUGE fbuge .word 0xd71fe120 ! 719: LDDF_I ldd [%r31, 0x0120], %f11 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_633: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_633) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,688,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_633: wrhpr %g0, 0x558, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 720: RDPC rd %pc, %r17 mondo_10_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3e0] %asi stxa %r11, [%r0+0x3d8] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d928012 ! 721: WRPR_WSTATE_R wrpr %r10, %r18, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_635), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) xir_10_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_635: and %g1, 2, %g1 brnz,a %g1, xirwait_10_635 ldx [%r17], %g1 xir_10_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82abbd ! 722: WR_CLEAR_SOFTINT_I wr %r10, 0x0bbd, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_636: wrhpr %g0, 0xac3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7dc40 ! 723: CASA_I casa [%r31] 0xe2, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_637: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_637) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,960,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_637: wrhpr %g0, 0x7c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 724: RDPC rd %pc, %r11 jmptr_10_638: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xc1bfdc00 ! 726: STDFA_R stda %f0, [%r0, %r31] .word 0xd88008a0 ! 727: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 nop nop mov 0x0, %r18 splash_cmpr_10_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x0, %r18 splash_cmpr_10_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 730: SIAM siam 1 cancelint_10_643: rdhpr %halt, %r17 .word 0x85880000 ! 731: ALLCLEAN .word 0xe8dfc200 ! 732: LDXA_R ldxa [%r31, %r0] 0x10, %r20 splash_hpstate_10_645: .word 0x8198360a ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x160a, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_646) , 16, 16)) -> intp(0,0,7,*,1008,*,1b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_646)&0xffffffff) , 16, 16)) -> intp(0,0,10,*,944,*,1b,1) #else set 0xbbf06d22, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_646: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x91a409d2 ! 734: FDIVd fdivd %f16, %f18, %f8 .word 0x91928013 ! 735: WRPR_PIL_R wrpr %r10, %r19, %pil br_longdelay1_10_648: .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0x9d97c000 ! 736: WRPR_WSTATE_R wrpr %r31, %r0, %wstate splash_lsu_10_649: nop nop ta T_CHANGE_HPRIV set 0xc2001e27, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 737: FBPULE fbule,a,pn %fcc0, splash_tba_10_650: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fc2c0 ! 739: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc19fde20 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_10_651: nop nop ta T_CHANGE_HPRIV setx 0x86cb1b0d39a07109, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xc1bfde20 ! 742: STDFA_R stda %f0, [%r0, %r31] .word 0x8d9032d3 ! 743: WRPR_PSTATE_I wrpr %r0, 0x12d3, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_653), 16, 16)) -> intp(mask2tid(0x10),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,704,*,*,1) xir_10_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_653: and %g1, 2, %g1 brnz,a %g1, xirwait_10_653 ldx [%r17], %g1 xir_10_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e6ca ! 744: WR_CLEAR_SOFTINT_I wr %r3, 0x06ca, %clear_softint .word 0xa7b24494 ! 745: FCMPLE32 fcmple32 %d40, %d20, %r19 .word 0xe8dfd000 ! 746: LDXA_R ldxa [%r31, %r0] 0x80, %r20 nop nop mov 0x0, %r18 splash_cmpr_10_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 747: SIAM siam 1 .word 0x9194afc0 ! 748: WRPR_PIL_I wrpr %r18, 0x0fc0, %pil mondo_10_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3c0] %asi stxa %r8, [%r0+0x3e0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d928010 ! 749: WRPR_WSTATE_R wrpr %r10, %r16, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_659)+8 , 16, 16)) -> intp(6,0,28,*,944,*,fc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_659)&0xffffffff)+8 , 16, 16)) -> intp(1,0,2,*,760,*,fc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d9e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d9e, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_10_660: rdhpr %halt, %r19 .word 0x85880000 ! 752: ALLCLEAN .word 0x0a780001 ! 753: BPCS .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_10_661: ta T_CHANGE_NONPRIV ! macro frzptr_10_662: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_10_663: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_664)+8 , 16, 16)) -> intp(1,0,0,*,896,*,f9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_664)&0xffffffff)+8 , 16, 16)) -> intp(1,0,16,*,920,*,f9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983475 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1475, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_10_665: rdhpr %halt, %r18 .word 0x85880000 ! 758: ALLCLEAN intveclr_10_666: nop nop ta T_CHANGE_HPRIV setx 0x3de3e0de2fed4bb3, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x480, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 759: FBPLG fblg mondo_10_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d90c003 ! 760: WRPR_WSTATE_R wrpr %r3, %r3, %wstate nop nop mov 0x0, %r18 splash_cmpr_10_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 761: SIAM siam 1 vahole6_10_669: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd13fe1d0 ! 762: STDF_I std %f8, [0x01d0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_670: wrhpr %g0, 24, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d000 ! 763: CASA_I casa [%r31] 0x80, %r0, %r8 ibp_10_671: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_671: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_671 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_671: brnz %r16, ibp_wait10_671 ld [%r23], %r16 ba ibp_startwait10_671 mov 0x10, %r16 continue_ibp_10_671: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_671: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_671 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_671: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_671 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_671: best_set_reg(0x00000040f4c69990,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xf1efe100 ! 764: PREFETCHA_I prefetcha [%r31, + 0x0100] %asi, #24 mondo_10_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d944008 ! 765: WRPR_WSTATE_R wrpr %r17, %r8, %wstate .word 0xd1e7c280 ! 766: CASA_I casa [%r31] 0x14, %r0, %r8 splash_tba_10_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe0bfda60 ! 768: STDA_R stda %r16, [%r31 + %r0] 0xd3 .word 0x8d903f07 ! 769: WRPR_PSTATE_I wrpr %r0, 0x1f07, %pstate .word 0xd0bfe0d0 ! 770: STDA_I stda %r8, [%r31 + 0x00d0] %asi .word 0xe1bfe120 ! 771: STDFA_I stda %f16, [0x0120, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_677: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_677) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,712,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_677: wrhpr %g0, 0x2d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 772: RDPC rd %pc, %r10 br_badelay2_10_678: .word 0x99a349d2 ! 1: FDIVd fdivd %f44, %f18, %f12 allclean .word 0xa5b30306 ! 773: ALIGNADDRESS alignaddr %r12, %r6, %r18 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_679: wrhpr %g0, 0xf90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c400 ! 774: CASA_I casa [%r31] 0x20, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_680), 16, 16)) -> intp(mask2tid(0x10),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,968,*,*,1) xir_10_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_680: and %g1, 2, %g1 brnz,a %g1, xirwait_10_680 ldx [%r17], %g1 xir_10_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84739a ! 775: WR_CLEAR_SOFTINT_I wr %r17, 0x139a, %clear_softint splash_lsu_10_681: nop nop ta T_CHANGE_HPRIV set 0xc3b8b261, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3c800001 ! 1: BPOS bpos,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_682), 16, 16)) -> intp(mask2tid(0x10),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,920,*,*,1) xir_10_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_682: and %g1, 2, %g1 brnz,a %g1, xirwait_10_682 ldx [%r17], %g1 xir_10_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84719b ! 777: WR_CLEAR_SOFTINT_I wr %r17, 0x119b, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_683)+8 , 16, 16)) -> intp(3,0,6,*,896,*,db,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_683)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,760,*,db,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198252d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x052d, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_10_684: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_684: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_684 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_684: brnz %r16, ibp_wait10_684 ld [%r23], %r16 ba ibp_startwait10_684 mov 0x10, %r16 continue_ibp_10_684: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_684: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_684 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_684: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_684 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_684: best_set_reg(0x00000040dfd99010,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe23fe1e0 ! 779: STD_I std %r17, [%r31 + 0x01e0] .word 0xe2dfd920 ! 1: LDXA_R ldxa [%r31, %r0] 0xc9, %r17 .word 0x9f803ae5 ! 780: SIR sir 0x1ae5 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_685), 16, 16)) -> intp(mask2tid(0x10),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,984,*,*,1) xir_10_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_685: and %g1, 2, %g1 brnz,a %g1, xirwait_10_685 ldx [%r17], %g1 xir_10_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab83724a ! 781: WR_CLEAR_SOFTINT_I wr %r13, 0x124a, %clear_softint .word 0xe19fdd40 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_686) , 16, 16)) -> intp(6,0,12,*,736,*,31,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_686)&0xffffffff) , 16, 16)) -> intp(4,0,25,*,672,*,31,1) #else set 0xfae0a737, %r28 !TTID : 7 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a149c4 ! 1: FDIVd fdivd %f36, %f4, %f16 intvec_10_686: .word 0xa1b444d2 ! 783: FCMPNE32 fcmpne32 %d48, %d18, %r16 .word 0xe1bfdc00 ! 784: STDFA_R stda %f16, [%r0, %r31] brcommon3_10_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e0f0 ! 1: STQF_I - %f11, [0x00f0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x91aac833 ! 785: FMOVGE fmovs %fcc1, %f19, %f8 nop nop mov 0x1, %r18 splash_cmpr_10_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_688)+8 , 16, 16)) -> intp(3,0,24,*,1000,*,de,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_688)&0xffffffff)+8 , 16, 16)) -> intp(2,0,0,*,688,*,de,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_10_689: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_689: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_689 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_689: brnz %r16, ibp_wait10_689 ld [%r23], %r16 ba ibp_startwait10_689 mov 0x10, %r16 continue_ibp_10_689: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_689: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_689 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_689: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_689 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_689: best_set_reg(0x0000004033d01018,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe19fdf00 ! 787: LDDFA_R ldda [%r31, %r0], %f16 .word 0xe027e1f4 ! 788: STW_I stw %r16, [%r31 + 0x01f4] splash_tba_10_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_691: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_691) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,744,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_691: wrhpr %g0, 0x9cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 790: RDPC rd %pc, %r8 .word 0x87ab4a4a ! 791: FCMPd fcmpd %fcc, %f44, %f10 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_10_693: nop nop ta T_CHANGE_HPRIV setx 0xaf4b9a58d3d2c2d6, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_10_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_694-donret_10_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00829700 | (0x89 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x12e2, %htstate best_set_reg(0x14ba, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (10) retry .align 2048 donretarg_10_694: .word 0xa3a489d3 ! 794: FDIVd fdivd %f18, %f50, %f48 nop nop set 0xc660a12f, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_695: .word 0x39400001 ! 795: FBPUGE fbuge,a,pn %fcc0, .word 0xda2fe08b ! 796: STB_I stb %r13, [%r31 + 0x008b] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_696) , 16, 16)) -> intp(2,0,9,*,952,*,16,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_696)&0xffffffff) , 16, 16)) -> intp(0,0,17,*,912,*,16,1) #else set 0xe070ee36, %r28 !TTID : 6 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_696: .word 0x19400001 ! 797: FBPUGE fbuge .word 0x87ad0a44 ! 798: FCMPd fcmpd %fcc, %f20, %f4 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_698)+8 , 16, 16)) -> intp(4,0,25,*,992,*,b4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_698)&0xffffffff)+8 , 16, 16)) -> intp(6,0,10,*,992,*,b4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198221c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x021c, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0x5bc0c8c5, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_10_699: .word 0x39400001 ! 800: FBPUGE fbuge,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_700), 16, 16)) -> intp(mask2tid(0x10),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,736,*,*,1) xir_10_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_700: and %g1, 2, %g1 brnz,a %g1, xirwait_10_700 ldx [%r17], %g1 xir_10_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843d45 ! 801: WR_CLEAR_SOFTINT_I wr %r16, 0x1d45, %clear_softint .word 0xe1bfdd40 ! 802: STDFA_R stda %f16, [%r0, %r31] cancelint_10_701: rdhpr %halt, %r17 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_10_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_702)+8 , 16, 16)) -> intp(1,0,19,*,944,*,19,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_702)&0xffffffff)+8 , 16, 16)) -> intp(2,0,4,*,936,*,19,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_10_703: ta T_CHANGE_NONHPRIV .word 0x819825cd ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x05cd, %hpstate .word 0xe43fe170 ! 1: STD_I std %r18, [%r31 + 0x0170] .word 0x9f80219a ! 806: SIR sir 0x019a nop nop mov 0x0, %r18 splash_cmpr_10_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_10 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_705: wrhpr %g0, 0x999, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d920 ! 808: CASA_I casa [%r31] 0xc9, %r0, %r18 pmu_10_706: nop nop setx 0xffffffbeffffffa0, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_10_707: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_10_708: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_709: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_709) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,744,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_709: wrhpr %g0, 0x88a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 812: RDPC rd %pc, %r17 pmu_10_710: nop nop setx 0xffffffb7ffffffa7, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xe930c428, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_10_711: .word 0x9ba2c9c2 ! 814: FDIVd fdivd %f42, %f2, %f44 splash_hpstate_10_712: .word 0x8198360b ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x160b, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_10 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_713: wrhpr %g0, 0x18b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c200 ! 816: CASA_I casa [%r31] 0x10, %r0, %r12 brcommon3_10_714: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7c080 ! 1: CASA_I casa [%r31] 0x 4, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x8d90391b ! 817: WRPR_PSTATE_I wrpr %r0, 0x191b, %pstate .word 0x91904012 ! 818: WRPR_PIL_R wrpr %r1, %r18, %pil mondo_10_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3d8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d934010 ! 819: WRPR_WSTATE_R wrpr %r13, %r16, %wstate nop nop mov 0x1, %r18 splash_cmpr_10_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_717)+8 , 16, 16)) -> intp(4,0,19,*,648,*,96,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_717)&0xffffffff)+8 , 16, 16)) -> intp(0,0,26,*,728,*,96,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_718: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_718) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,664,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_718: wrhpr %g0, 0xb10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 821: RDPC rd %pc, %r9 nop nop set 0xbf0857e, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_719: .word 0x9bb184ca ! 822: FCMPNE32 fcmpne32 %d6, %d10, %r13 splash_lsu_10_720: nop nop ta T_CHANGE_HPRIV set 0x702351bd, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 823: FBPULE fbule,a,pn %fcc0, .word 0xf16fe090 ! 1: PREFETCH_I prefetch [%r31 + 0x0090], #24 .word 0x9f803f3a ! 824: SIR sir 0x1f3a nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_721: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_721) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,696,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_721: wrhpr %g0, 0x9cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 825: RDPC rd %pc, %r16 .word 0xe91fe030 ! 826: LDDF_I ldd [%r31, 0x0030], %f20 br_badelay3_10_723: .word 0x14800001 ! 1: BG bg .word 0x22800001 ! 1: BE be,a .word 0xe7140007 ! 1: LDQF_R - [%r16, %r7], %f19 .word 0x99a44823 ! 827: FADDs fadds %f17, %f3, %f12 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_724) , 16, 16)) -> intp(2,0,9,*,960,*,39,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_724)&0xffffffff) , 16, 16)) -> intp(4,0,30,*,696,*,39,1) #else set 0x49f0e56e, %r28 !TTID : 5 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_724: .word 0x39400001 ! 828: FBPUGE fbuge,a,pn %fcc0, nop nop set 0xd8d0f261, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803571 ! 1: SIR sir 0x1571 intvec_10_725: .word 0x19400001 ! 829: FBPUGE fbuge .word 0x91940010 ! 830: WRPR_PIL_R wrpr %r16, %r16, %pil jmptr_10_727: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x3e800002 ! 1: BVC bvc,a .word 0x8d903f32 ! 832: WRPR_PSTATE_I wrpr %r0, 0x1f32, %pstate mondo_10_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3d0] %asi stxa %r9, [%r0+0x3c8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d918003 ! 833: WRPR_WSTATE_R wrpr %r6, %r3, %wstate ibp_10_730: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_730: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_730 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_730: brnz %r16, ibp_wait10_730 ld [%r23], %r16 ba ibp_startwait10_730 mov 0x10, %r16 continue_ibp_10_730: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_730: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_730 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_730: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_730 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_730: best_set_reg(0x00000040fad018a3,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa1703386 ! 834: POPC_I popc 0x1386, %r16 cwp_10_731: set user_data_start, %o7 .word 0x93902004 ! 835: WRPR_CWP_I wrpr %r0, 0x0004, %cwp jmptr_10_732: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_10_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi stxa %r9, [%r0+0x3d0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d948013 ! 837: WRPR_WSTATE_R wrpr %r18, %r19, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_734) , 16, 16)) -> intp(4,0,5,*,744,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_734)&0xffffffff) , 16, 16)) -> intp(4,0,12,*,648,*,be,1) #else set 0x560cade, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_734: .word 0x19400001 ! 838: FBPUGE fbuge brcommon3_10_735: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d903f5f ! 839: WRPR_PSTATE_I wrpr %r0, 0x1f5f, %pstate mondo_10_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3e8] %asi stxa %r4, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d944011 ! 840: WRPR_WSTATE_R wrpr %r17, %r17, %wstate nop nop set 0x5350da41, %r28 !TTID : 2 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_737: .word 0x19400002 ! 841: FBPUGE fbuge splash_lsu_10_738: nop nop ta T_CHANGE_HPRIV set 0x37810b5d, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 842: FBPULE fbule,a,pn %fcc0, mondo_10_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi stxa %r10, [%r0+0x3c0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d91000d ! 843: WRPR_WSTATE_R wrpr %r4, %r13, %wstate .word 0x32800001 ! 1: BNE bne,a .word 0x8d903d03 ! 844: WRPR_PSTATE_I wrpr %r0, 0x1d03, %pstate nop nop set 0x95c0bc3b, %r28 !TTID : 4 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_741: .word 0x9f802912 ! 845: SIR sir 0x0912 mondo_10_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3c8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948003 ! 846: WRPR_WSTATE_R wrpr %r18, %r3, %wstate trapasi_10_743: nop mov 0x8, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_744: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_744) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,688,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_744: wrhpr %g0, 0x9d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 849: RDPC rd %pc, %r20 mondo_10_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d930010 ! 850: WRPR_WSTATE_R wrpr %r12, %r16, %wstate .word 0xe19fdc40 ! 851: LDDFA_R ldda [%r31, %r0], %f16 nop nop mov 0x1, %r18 splash_cmpr_10_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_747)+8 , 16, 16)) -> intp(2,0,28,*,960,*,38,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_747)&0xffffffff)+8 , 16, 16)) -> intp(2,0,9,*,984,*,38,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_10_748: set 0x60740000, %r31 .word 0x8584e774 ! 853: WRCCR_I wr %r19, 0x0774, %ccr nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_10 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_749: wrhpr %g0, 0x52, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c400 ! 854: CASA_I casa [%r31] 0x20, %r0, %r18 .word 0x91927c3a ! 855: WRPR_PIL_I wrpr %r9, 0x1c3a, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_750) , 16, 16)) -> intp(2,0,6,*,760,*,9a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_750)&0xffffffff) , 16, 16)) -> intp(3,0,7,*,680,*,9a,1) #else set 0x762073ef, %r28 !TTID : 3 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_750: .word 0x91a1c9cc ! 856: FDIVd fdivd %f38, %f12, %f8 nop nop set 0xed802940, %r28 !TTID : 1 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 intvec_10_751: .word 0x19400001 ! 857: FBPUGE fbuge cancelint_10_752: rdhpr %halt, %r12 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_753: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_753) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,912,*,*,1)') ifelse(6,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_753: wrhpr %g0, 0x792, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 859: RDPC rd %pc, %r18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_754) , 16, 16)) -> intp(5,0,2,*,664,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_754)&0xffffffff) , 16, 16)) -> intp(6,0,22,*,944,*,be,1) #else set 0xec608013, %r28 !TTID : 0 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_10_754: .word 0xa7a109d2 ! 860: FDIVd fdivd %f4, %f18, %f50 brcommon3_10_755: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe140 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0140] ba,a .+8 jmpl %r27+0, %r27 .word 0x00800001 ! 861: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_756)+8 , 16, 16)) -> intp(5,0,16,*,744,*,52,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_756)&0xffffffff)+8 , 16, 16)) -> intp(7,0,29,*,712,*,52,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982ad5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0ad5, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_10 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_757: wrhpr %g0, 0x980, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d140 ! 863: CASA_I casa [%r31] 0x8a, %r0, %r18 .word 0x879023d7 ! 864: WRPR_TT_I wrpr %r0, 0x03d7, %tt trapasi_10_758: nop mov 0x0, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_10_759: nop nop ta T_CHANGE_HPRIV set 0xe26f3d1b, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 866: FBPULE fbule .word 0xe477e120 ! 867: STX_I stx %r18, [%r31 + 0x0120] br_badelay2_10_760: .word 0x99a449d0 ! 1: FDIVd fdivd %f48, %f16, %f12 pdist %f28, %f26, %f30 .word 0xa9b0c314 ! 868: ALIGNADDRESS alignaddr %r3, %r20, %r20 intveclr_10_761: nop nop ta T_CHANGE_HPRIV setx 0xad2d212f9d7aeb84, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 869: FBPLG fblg .word 0xd4bfdf00 ! 870: STDA_R stda %r10, [%r31 + %r0] 0xf8 .word 0xe19fc2c0 ! 871: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_764: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_764) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_764: wrhpr %g0, 0xfc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 872: RDPC rd %pc, %r8 .word 0x9f802010 ! 873: SIR sir 0x0010 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_10 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_766: wrhpr %g0, 0x40a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7d060 ! 874: CASA_I casa [%r31] 0x83, %r0, %r12 nop nop set 0x6fc0de0b, %r28 !TTID : 6 (mask2tid(0x10)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x10),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80390b ! 1: SIR sir 0x190b intvec_10_767: .word 0x39400001 ! 875: FBPUGE fbuge,a,pn %fcc0, brcommon1_10_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe010 ! 1: STXFSR_I st-sfr %f1, [0x0010, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0x93a449b4 ! 876: FDIVs fdivs %f17, %f20, %f9 frzptr_10_769: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_10_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe0e0 ! 1: PREFETCH_I prefetch [%r31 + 0x00e0], #24 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 878: BN bn,a .word 0xa7a089c9 ! 879: FDIVd fdivd %f2, %f40, %f50 brcommon1_10_772: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0x99b24490 ! 880: FCMPLE32 fcmple32 %d40, %d16, %r12 .word 0xc09fde00 ! 881: LDDA_R ldda [%r31, %r0] 0xf0, %r0 splash_tba_10_774: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_10_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffa1, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x14800001 ! 1: BG bg .word 0x8d903635 ! 884: WRPR_PSTATE_I wrpr %r0, 0x1635, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_777), 16, 16)) -> intp(mask2tid(0x10),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,712,*,*,1) xir_10_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_777: and %g1, 2, %g1 brnz,a %g1, xirwait_10_777 ldx [%r17], %g1 xir_10_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82237f ! 885: WR_CLEAR_SOFTINT_I wr %r8, 0x037f, %clear_softint .word 0xd037e066 ! 886: STH_I sth %r8, [%r31 + 0x0066] .word 0xe19fe0c0 ! 887: LDDFA_I ldda [%r31, 0x00c0], %f16 splash_lsu_10_778: nop nop ta T_CHANGE_HPRIV set 0x26d3fb74, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3a800001 ! 1: BCC bcc,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 888: FBPULE fbule,a,pn %fcc0, brcommon2_10_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfdc00 ! 889: STDFA_R stda %f16, [%r0, %r31] mondo_10_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3e8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d924013 ! 890: WRPR_WSTATE_R wrpr %r9, %r19, %wstate nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_781: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_781) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,896,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_781: wrhpr %g0, 0x218, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 891: RDPC rd %pc, %r9 brlez,a,pn %r12, skip_10_782 stxa %r13, [%r0] ASI_LSU_CONTROL brlez,pt %r19, skip_10_782 stxa %r9, [%r0] ASI_LSU_CONTROL .align 128 skip_10_782: .word 0xc30fc000 ! 892: LDXFSR_R ld-fsr [%r31, %r0], %f1 intveclr_10_783: nop nop ta T_CHANGE_HPRIV setx 0xb009aa37afdeaf74, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 893: FBPLG fblg,a,pn %fcc0, jmptr_10_784: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_10_785: set user_data_start, %o7 .word 0x93902003 ! 895: WRPR_CWP_I wrpr %r0, 0x0003, %cwp vahole6_10_786: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd2dfd060 ! 896: LDXA_R ldxa [%r31, %r0] 0x83, %r9 pmu_10_787: nop nop setx 0xffffffb2ffffffa3, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- vahole2_10_788: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe19fc2c0 ! 898: LDDFA_R ldda [%r31, %r0], %f16 mondo_10_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d91c005 ! 899: WRPR_WSTATE_R wrpr %r7, %r5, %wstate mondo_10_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c0] %asi stxa %r8, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d944012 ! 900: WRPR_WSTATE_R wrpr %r17, %r18, %wstate mondo_10_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d8] %asi stxa %r13, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d950010 ! 901: WRPR_WSTATE_R wrpr %r20, %r16, %wstate nop nop mov 0x1, %r18 splash_cmpr_10_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_792)+8 , 16, 16)) -> intp(3,0,30,*,968,*,f1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_792)&0xffffffff)+8 , 16, 16)) -> intp(5,0,16,*,928,*,f1,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_10_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_793)+8 , 16, 16)) -> intp(7,0,25,*,720,*,9e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_793)&0xffffffff)+8 , 16, 16)) -> intp(4,0,16,*,912,*,9e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198264f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x064f, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_10_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e000 ! 1: STQF_I - %f9, [0x0000, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r10, [%r0] ASI_LSU_CONTROL .word 0xa9aac830 ! 904: FMOVGE fmovs %fcc1, %f16, %f20 cancelint_10_795: rdhpr %halt, %r8 .word 0x85880000 ! 905: ALLCLEAN pmu_10_796: nop nop setx 0xffffffb0ffffffa0, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_10_797: nop nop ta T_CHANGE_HPRIV setx 0x8eb6532fe1bf99bf, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_10 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_798: wrhpr %g0, 0x81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7dd40 ! 908: CASA_I casa [%r31] 0xea, %r0, %r12 ibp_10_799: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_799: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_799 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_799: brnz %r16, ibp_wait10_799 ld [%r23], %r16 ba ibp_startwait10_799 mov 0x10, %r16 continue_ibp_10_799: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_799: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_799 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_799: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_799 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_799: best_set_reg(0x00000040d1d8a31b,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa1a409a8 ! 909: FDIVs fdivs %f16, %f8, %f16 ibp_10_800: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_800: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_800 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_800: brnz %r16, ibp_wait10_800 ld [%r23], %r16 ba ibp_startwait10_800 mov 0x10, %r16 continue_ibp_10_800: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_800: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_800 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_800: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_800 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_800: best_set_reg(0x00000050c6e31b6a,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe81fe0d0 ! 910: LDD_I ldd [%r31 + 0x00d0], %r20 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xc09fdb40 ! 912: LDDA_R ldda [%r31, %r0] 0xda, %r0 brcommon3_10_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe1d0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x01d0] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0xa7aac834 ! 913: FMOVGE fmovs %fcc1, %f20, %f19 cancelint_10_803: rdhpr %halt, %r10 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_10_804: .word 0x20800001 ! 1: BN bn,a .word 0x8198241d ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x041d, %hpstate jmptr_10_805: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_10_806: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_806: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_806 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_806: brnz %r16, ibp_wait10_806 ld [%r23], %r16 ba ibp_startwait10_806 mov 0x10, %r16 continue_ibp_10_806: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_806: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_806 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_806: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_806 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_806: best_set_reg(0x00000040e9db6a40,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa3703324 ! 917: POPC_I popc 0x1324, %r17 .word 0xc32fc000 ! 918: STXFSR_R st-sfr %f1, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_808), 16, 16)) -> intp(mask2tid(0x10),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,704,*,*,1) xir_10_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_808: and %g1, 2, %g1 brnz,a %g1, xirwait_10_808 ldx [%r17], %g1 xir_10_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847c84 ! 919: WR_CLEAR_SOFTINT_I wr %r17, 0x1c84, %clear_softint .word 0xd0bfc6c0 ! 1: STDA_R stda %r8, [%r31 + %r0] 0x36 .word 0x9f8033df ! 920: SIR sir 0x13df jmptr_10_809: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_10_810: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_10_811: .word 0x819826df ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x06df, %hpstate ibp_10_812: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_812: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_812 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_812: brnz %r16, ibp_wait10_812 ld [%r23], %r16 ba ibp_startwait10_812 mov 0x10, %r16 continue_ibp_10_812: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_812: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_812 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_812: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_812 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_812: best_set_reg(0x00000050a9ea40ef,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xc19fda00 ! 924: LDDFA_R ldda [%r31, %r0], %f0 frzptr_10_813: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x91b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r8 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_10_814: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_10_815: .word 0x32800001 ! 1: BNE bne,a .word 0x81982cf7 ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x0cf7, %hpstate memptr_10_816: set user_data_start, %r31 .word 0x85846a4c ! 928: WRCCR_I wr %r17, 0x0a4c, %ccr nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_817: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_817) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,704,*,*,1)') ifelse(2,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_817: wrhpr %g0, 0x919, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 929: RDPC rd %pc, %r16 .word 0xc19fdf00 ! 930: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_819: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_819) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,960,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_819: wrhpr %g0, 0x48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 931: RDPC rd %pc, %r9 br_badelay1_10_820: .word 0xda3fe0d0 ! 1: STD_I std %r13, [%r31 + 0x00d0] .word 0xe731e404 ! 1: STQF_I - %f19, [0x0404, %r7] .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 normalw .word 0x91458000 ! 932: RD_SOFTINT_REG rd %softint, %r8 fpinit_10_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89b00484 ! 933: FCMPLE32 fcmple32 %d0, %d4, %r4 .word 0x8d902cf0 ! 934: WRPR_PSTATE_I wrpr %r0, 0x0cf0, %pstate mondo_10_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3c8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944012 ! 935: WRPR_WSTATE_R wrpr %r17, %r18, %wstate .word 0x28780001 ! 936: BPLEU change_to_randtl_10_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_10_824: .word 0x8f902001 ! 937: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tba_10_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_10_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819825cf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x05cf, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_10_827: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e068 ! 941: STX_I stx %r16, [%r31 + 0x0068] br_badelay1_10_828: .word 0x0a800001 ! 1: BCS bcs .word 0xa1a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f16 .word 0xe1e7d140 ! 1: CASA_I casa [%r31] 0x8a, %r0, %r16 normalw .word 0x9b458000 ! 942: RD_SOFTINT_REG rd %softint, %r13 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_10 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_829: wrhpr %g0, 0xf92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dc40 ! 943: CASA_I casa [%r31] 0xe2, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_10_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x9f802190 ! 946: SIR sir 0x0190 nop nop ta T_CHANGE_HPRIV mov 0x10, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_10_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_10 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_10_832: wrhpr %g0, 0xbd9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d140 ! 947: CASA_I casa [%r31] 0x8a, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_833: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_833) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,936,*,*,1)') ifelse(7,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_833: wrhpr %g0, 0x819, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 948: RDPC rd %pc, %r19 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_834) , 16, 16)) -> intp(7,0,18,*,760,*,5b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_834)&0xffffffff) , 16, 16)) -> intp(7,0,13,*,896,*,5b,1) #else set 0x449053b9, %r28 !TTID : 3 (mask2tid(0x10)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803ad1 ! 1: SIR sir 0x1ad1 intvec_10_834: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3b404c3 ! 951: FCMPNE32 fcmpne32 %d16, %d34, %r17 splash_tba_10_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_836), 16, 16)) -> intp(mask2tid(0x10),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,712,*,*,1) xir_10_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_836: and %g1, 2, %g1 brnz,a %g1, xirwait_10_836 ldx [%r17], %g1 xir_10_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab826029 ! 953: WR_CLEAR_SOFTINT_I wr %r9, 0x0029, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_837), 16, 16)) -> intp(mask2tid(0x10),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x10),1,3,*,896,*,*,1) xir_10_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_10_837: and %g1, 2, %g1 brnz,a %g1, xirwait_10_837 ldx [%r17], %g1 xir_10_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fd92 ! 954: WR_CLEAR_SOFTINT_I wr %r19, 0x1d92, %clear_softint mondo_10_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r5, [%r0+0x3e0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d950013 ! 955: WRPR_WSTATE_R wrpr %r20, %r19, %wstate pmu_10_839: nop nop setx 0xffffffb7ffffffaf, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xd3e7d060 ! 1: CASA_I casa [%r31] 0x83, %r0, %r9 .word 0x9f802c83 ! 957: SIR sir 0x0c83 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_840: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_840) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,688,*,*,1)') ifelse(4,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_840: wrhpr %g0, 0xd42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 958: RDPC rd %pc, %r11 cancelint_10_841: rdhpr %halt, %r17 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe0c0 ! 960: LDDFA_I ldda [%r31, 0x00c0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_842: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_842) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,672,*,*,1)') ifelse(0,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_842: wrhpr %g0, 0x34a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 961: RDPC rd %pc, %r20 intveclr_10_843: nop nop ta T_CHANGE_HPRIV setx 0x854fc02e5e14fc43, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 962: FBPLG fblg,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_10_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_10_844)+8 , 16, 16)) -> intp(6,0,9,*,1000,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_10_844)&0xffffffff)+8 , 16, 16)) -> intp(4,0,22,*,664,*,5d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_10_845: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_845: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_845 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_845: brnz %r16, ibp_wait10_845 ld [%r23], %r16 ba ibp_startwait10_845 mov 0x10, %r16 continue_ibp_10_845: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_845: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_845 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_845: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_845 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_845: best_set_reg(0x00000050b9c0effd,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xe93, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87aaca4c ! 964: FCMPd fcmpd %fcc, %f42, %f12 frzptr_10_846: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x0, %r18 splash_cmpr_10_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_10_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd9e7d160 ! 968: CASA_I casa [%r31] 0x8b, %r0, %r12 cancelint_10_850: rdhpr %halt, %r9 .word 0x85880000 ! 969: ALLCLEAN .word 0x91948014 ! 970: WRPR_PIL_R wrpr %r18, %r20, %pil .word 0xe19fe120 ! 971: LDDFA_I ldda [%r31, 0x0120], %f16 .word 0xe277e044 ! 972: STX_I stx %r17, [%r31 + 0x0044] .word 0x91950001 ! 973: WRPR_PIL_R wrpr %r20, %r1, %pil splash_lsu_10_853: nop nop ta T_CHANGE_HPRIV set 0x6f6316a6, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2a800001 ! 1: BCS bcs,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 974: FBPULE fbule frzptr_10_854: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_10_855: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_10_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_10_856-donret_10_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00c3f200 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xf4d, %htstate wrhpr %g0, 0x891, %hpstate ! rand=1 (10) ldx [%r12+%r0], %g1 retry donretarg_10_856: .word 0x8198208f ! 977: WRHPR_HPSTATE_I wrhpr %r0, 0x008f, %hpstate .word 0xc19fe160 ! 978: LDDFA_I ldda [%r31, 0x0160], %f0 .word 0x0acc4001 ! 1: BRNZ brnz,pt %r17, .word 0x8d902721 ! 979: WRPR_PSTATE_I wrpr %r0, 0x0721, %pstate .word 0xe2800ae0 ! 980: LDUWA_R lduwa [%r0, %r0] 0x57, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x10+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_10_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_10_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 10 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_10_858: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x10),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_10_858) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,648,*,*,1)') ifelse(5,mask2tid(0x10),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_10_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x10),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_10_858: wrhpr %g0, 8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 982: RDPC rd %pc, %r17 .word 0xe09fc080 ! 983: LDDA_R ldda [%r31, %r0] 0x04, %r16 jmptr_10_860: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa7a149ad ! 985: FDIVs fdivs %f5, %f13, %f19 .word 0xe9e7d920 ! 986: CASA_I casa [%r31] 0xc9, %r0, %r20 vahole3_10_863: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe8bfc720 ! 987: STDA_R stda %r20, [%r31 + %r0] 0x39 .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 .word 0x9f803033 ! 988: SIR sir 0x1033 splash_lsu_10_864: nop nop ta T_CHANGE_HPRIV set 0xd251ea7f, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x01400002 ! 1: FBPN fbn stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 989: FBPULE fbule brcommon2_10_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a7c960 ! 1: FMULq dis not found ba,a .+8 jmpl %r27-4, %r27 .word 0xe19fde00 ! 990: LDDFA_R ldda [%r31, %r0], %f16 ibp_10_866: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x10, %r16 ibp_startwait10_866: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_10_866 mov (~0x10&0xf0), %r16 ld [%r23], %r16 ibp_wait10_866: brnz %r16, ibp_wait10_866 ld [%r23], %r16 ba ibp_startwait10_866 mov 0x10, %r16 continue_ibp_10_866: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_10_866: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_10_866 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_10_866: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_10_866 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit10_866: best_set_reg(0x000000500aeffd37,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x1c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe0c0 ! 991: PREFETCHA_I prefetcha [%r31, + 0x00c0] %asi, #24 memptr_10_867: set user_data_start, %r31 .word 0x8584beaf ! 992: WRCCR_I wr %r18, 0x1eaf, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0xe29fdf00 ! 1: LDDA_R ldda [%r31, %r0] 0xf8, %r17 .word 0x9f8039e9 ! 994: SIR sir 0x19e9 .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xf16fe110 ! 1: PREFETCH_I prefetch [%r31 + 0x0110], #24 mov 0xb2, %r30 .word 0x83d0001e ! 995: Tcc_R te icc_or_xcc, %r0 + %r30 .word 0xe21fe140 ! 996: LDD_I ldd [%r31 + 0x0140], %r17 .word 0xe227e0bb ! 997: STW_I stw %r17, [%r31 + 0x00bb] .word 0xe3e7c180 ! 998: CASA_I casa [%r31] 0x c, %r0, %r17 vahole6_10_871: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xe3e7e000 ! 999: CASA_R casa [%r31] %asi, %r0, %r17 splash_tba_10_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_4: master_thread_stuff: setup_tick: setx 0xd8447a2341daf53f, %r1, %r17 wrpr %g0, %r17, %tick rd %asi, %r12 #ifdef XIR_RND_CORES setup_xir_8: setx 0x04ffe357e5b1307e, %r1, %r28 mov 0x30, %r17 stxa %r28, [%r17] 0x41 #endif #ifdef SPLASH_HIDECR mov 8, %r1 set SPLASH_HIDECR, %r2 sllx %r2, 32, %r2 stxa %r2, [%r1] 0x45 #endif #if (MULTIPASS > 0) mov 0x38, %g1 ldxa [%g1]ASI_SCRATCHPAD, %r10 brnz %g1, unlock_sync_thds_8 wrpr %g0, %g0, %pstate #endif #ifndef NO_INTERNAL_SPU setup_spu_8: wr %g0, 0x40, %asi !# allocate control word queue (e.g., setup head/tail/first/last registers) set CWQ_BASE, %l6 #ifndef SPC ldxa [%g0]0x63, %o2 and %o2, 0x38, %o2 sllx %o2, 5, %o2 !(CID*256) add %l6, %o2, %l6 #endif !# write base addr to first, head, and tail ptr !# first store to first stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST #ifndef SPC add %l5, %o2, %l5 #endif stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi !# set CWQ control word ([39:37] is strand ID ..) best_set_reg(0x206100f0, %l1, %l2) !# Control Word sllx %l2, 32, %l2 !# write CWQ entry (%l6 points to CWQ) stx %l2, [%l6 + 0x0] setx msg, %g1, %l2 stx %l2, [%l6 + 0x8] !# source address stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) setx results, %g1, %o3 stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) membar #Sync ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 add %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# Kick off the CWQ operation by writing to the CWQ_CSR !# Set the enabled bit and reset the other bits or %g0, 0x1, %g1 stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi #endif unlock_sync_thds_8: set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o2 and %o2, 0x38, %o2 add %o2, %r23, %r23 #endif st %r0, [%r23] !unlock sync_thr_counter6 sub %r23, 64, %r23 st %r0, [%r23] !unlock sync_thr_counter5 sub %r23, 64, %r23 st %r0, [%r23] !unlock sync_thr_counter4 wr %r0, %r12, %asi wrhpr %g0, 0x481, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_8_0: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e0e0 ! 2: STF_I st %f8, [0x00e0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_1: wrhpr %g0, 0x58a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 3: CASA_I casa [%r31] 0xf8, %r0, %r8 dvapa_8_2: nop nop ta T_CHANGE_HPRIV mov 0x960, %r20 mov 0x0, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f802acb ! 4: SIR sir 0x0acb nop nop set 0xfa50a903, %r28 !TTID : 1 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_8_3: .word 0xa7b444d1 ! 5: FCMPNE32 fcmpne32 %d48, %d48, %r19 br_longdelay3_8_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f803b0f ! 6: SIR sir 0x1b0f mondo_8_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d0] %asi stxa %r11, [%r0+0x3c0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d924011 ! 7: WRPR_WSTATE_R wrpr %r9, %r17, %wstate .word 0xe1bfda60 ! 8: STDFA_R stda %f16, [%r0, %r31] br_badelay3_8_7: .word 0x32800001 ! 1: BNE bne,a .word 0x12800001 ! 1: BNE bne .word 0xe5150011 ! 1: LDQF_R - [%r20, %r17], %f18 .word 0x93a2882b ! 9: FADDs fadds %f10, %f11, %f9 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_8), 16, 16)) -> intp(mask2tid(0x8),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,992,*,*,1) xir_8_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_8: and %g1, 2, %g1 brnz,a %g1, xirwait_8_8 ldx [%r17], %g1 xir_8_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816d95 ! 10: WR_CLEAR_SOFTINT_I wr %r5, 0x0d95, %clear_softint .word 0x35400002 ! 1: FBPUE fbue,a,pn %fcc0, .word 0x8d903869 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1869, %pstate cmp_8_10: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_10: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_10 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_10: brnz,a %r10, cmp_wait8_10 ld [%r23], %r10 ba cmp_startwait8_10 mov 0x8, %r10 continue_cmp_8_10: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_10 mov 56, %r17 best_set_reg(0x8bb46de26fd337c9, %r16, %r17) cmp_multi_core_8_10: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe31fe1f0 ! 12: LDDF_I ldd [%r31, 0x01f0], %f17 nop nop set 0xa810d390, %r28 !TTID : 3 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_11: .word 0x91a049c8 ! 13: FDIVd fdivd %f32, %f8, %f8 .word 0xc19fdf00 ! 14: LDDFA_R ldda [%r31, %r0], %f0 ibp_8_13: nop nop .word 0x99a149ad ! 15: FDIVs fdivs %f5, %f13, %f12 nop nop ta T_CHANGE_HPRIV ! macro donret_8_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_14-donret_8_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f3a400 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xdcd, %htstate best_set_reg(0x12e1, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) ldx [%r12+%r0], %g1 retry donretarg_8_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_8_15: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_16: wrhpr %g0, 0x849, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c200 ! 18: CASA_I casa [%r31] 0x10, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_17: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_17) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,976,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_17: wrhpr %g0, 0xed8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 19: RDPC rd %pc, %r11 .word 0x9f802ca1 ! 20: SIR sir 0x0ca1 brcommon3_8_18: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd31fe070 ! 21: LDDF_I ldd [%r31, 0x0070], %f9 .word 0x9f803931 ! 22: SIR sir 0x1931 .word 0x93d020b2 ! 23: Tcc_I tne icc_or_xcc, %r0 + 178 br_badelay2_8_19: .word 0x32800001 ! 1: BNE bne,a pdist %f30, %f6, %f20 .word 0xa5b44306 ! 24: ALIGNADDRESS alignaddr %r17, %r6, %r18 ibp_8_20: nop nop wrhpr %g0, 0x6d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfc2c0 ! 25: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_21)+8 , 16, 16)) -> intp(5,0,26,*,688,*,5a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_21)&0xffffffff)+8 , 16, 16)) -> intp(4,0,31,*,904,*,5a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983709 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1709, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_8_22: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xf16fe0f0 ! 1: PREFETCH_I prefetch [%r31 + 0x00f0], #24 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 27: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_23: wrhpr %g0, 0xa88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c180 ! 28: CASA_I casa [%r31] 0x c, %r0, %r17 mondo_8_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d924010 ! 29: WRPR_WSTATE_R wrpr %r9, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_25: wrhpr %g0, 0x8c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d040 ! 30: CASA_I casa [%r31] 0x82, %r0, %r17 .word 0xe22fe0ed ! 31: STB_I stb %r17, [%r31 + 0x00ed] brcommon3_8_26: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c400 ! 1: CASA_I casa [%r31] 0x20, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe297d040 ! 32: LDUHA_R lduha [%r31, %r0] 0x82, %r17 .word 0xe2bfc2e0 ! 1: STDA_R stda %r17, [%r31 + %r0] 0x17 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 mov 0xb0, %r30 .word 0x83d0001e ! 33: Tcc_R te icc_or_xcc, %r0 + %r30 .word 0xe19fe0a0 ! 34: LDDFA_I ldda [%r31, 0x00a0], %f16 brcommon3_8_27: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe29fc2e0 ! 35: LDDA_R ldda [%r31, %r0] 0x17, %r17 nop nop mov 0x1, %r18 splash_cmpr_8_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_28)+8 , 16, 16)) -> intp(5,0,0,*,648,*,d8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_28)&0xffffffff)+8 , 16, 16)) -> intp(6,0,11,*,1008,*,d8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 36: SIAM siam 1 jmptr_8_29: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_30: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_30) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,720,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_30: wrhpr %g0, 0x40, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 38: RDPC rd %pc, %r13 cancelint_8_31: rdhpr %halt, %r16 .word 0x85880000 ! 39: ALLCLEAN splash_tick_8_32: nop nop ta T_CHANGE_HPRIV best_set_reg(0x26e94616a4c203fd, %r16, %r17) .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_33), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1016,*,*,1) xir_8_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_33: and %g1, 2, %g1 brnz,a %g1, xirwait_8_33 ldx [%r17], %g1 xir_8_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e71d ! 41: WR_CLEAR_SOFTINT_I wr %r3, 0x071d, %clear_softint frzptr_8_34: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fde20 ! 42: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_8_35: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe160 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0160] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 43: BN bn,a frzptr_8_36: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe5e7df00 ! 1: CASA_I casa [%r31] 0xf8, %r0, %r18 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde00 ! 44: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0x5a60c6f4, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_37: .word 0x9f802948 ! 45: SIR sir 0x0948 frzptr_8_38: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe1d0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01d0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800002 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_39: wrhpr %g0, 0x459, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d920 ! 47: CASA_I casa [%r31] 0xc9, %r0, %r16 .word 0xc1bfda00 ! 48: STDFA_R stda %f0, [%r0, %r31] cmp_8_41: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_41: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_41 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_41: brnz,a %r10, cmp_wait8_41 ld [%r23], %r10 ba cmp_startwait8_41 mov 0x8, %r10 continue_cmp_8_41: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_41 mov 45, %r17 best_set_reg(0x70e57e7862e7b8ce, %r16, %r17) cmp_multi_core_8_41: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xc50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe03fe090 ! 49: STD_I std %r16, [%r31 + 0x0090] nop nop mov 0x1, %r18 splash_cmpr_8_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_42)+8 , 16, 16)) -> intp(1,0,3,*,920,*,b8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_42)&0xffffffff)+8 , 16, 16)) -> intp(2,0,3,*,656,*,b8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 50: SIAM siam 1 mondo_8_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r5, [%r0+0x3c8] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d930013 ! 51: WRPR_WSTATE_R wrpr %r12, %r19, %wstate .word 0xe09fe120 ! 52: LDDA_I ldda [%r31, + 0x0120] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_44) , 16, 16)) -> intp(2,0,24,*,648,*,38,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_44)&0xffffffff) , 16, 16)) -> intp(6,0,26,*,696,*,38,1) #else set 0xe0909f06, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x97a449d1 ! 1: FDIVd fdivd %f48, %f48, %f42 intvec_8_44: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a049d4 ! 53: FDIVd fdivd %f32, %f20, %f40 splash_tick_8_45: nop nop ta T_CHANGE_HPRIV best_set_reg(0xd40568c5b375211d, %r16, %r17) .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_8_46: rdhpr %halt, %r12 .word 0x85880000 ! 55: ALLCLEAN brcommon3_8_47: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] ba,a .+8 jmpl %r27-4, %r27 .word 0xd11fe050 ! 56: LDDF_I ldd [%r31, 0x0050], %f8 dvapa_8_48: nop nop ta T_CHANGE_HPRIV mov 0xd06, %r20 mov 0xd, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x9d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd01fe160 ! 57: LDD_I ldd [%r31 + 0x0160], %r8 cancelint_8_49: rdhpr %halt, %r12 .word 0x85880000 ! 58: ALLCLEAN intveclr_8_50: nop nop ta T_CHANGE_HPRIV setx 0xf155963e24875fed, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x641, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_8_51: nop nop setx 0xffffffb2ffffffa6, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_8_52: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e1c0 ! 1: STQF_I - %f10, [0x01c0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd51fe140 ! 61: LDDF_I ldd [%r31, 0x0140], %f10 mondo_8_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d94400d ! 62: WRPR_WSTATE_R wrpr %r17, %r13, %wstate intveclr_8_54: nop nop ta T_CHANGE_HPRIV setx 0x5b6bfa95e86a5983, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xadb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 63: FBPLG fblg,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_55), 16, 16)) -> intp(mask2tid(0x8),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,736,*,*,1) xir_8_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_55: and %g1, 2, %g1 brnz,a %g1, xirwait_8_55 ldx [%r17], %g1 xir_8_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852e6c ! 64: WR_CLEAR_SOFTINT_I wr %r20, 0x0e6c, %clear_softint ibp_8_56: nop nop .word 0xa3b4c7d3 ! 65: PDIST pdistn %d50, %d50, %d48 ibp_8_57: nop nop wrhpr %g0, 0xc5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87acca46 ! 66: FCMPd fcmpd %fcc, %f50, %f6 .word 0xc1bfda00 ! 67: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_59), 16, 16)) -> intp(mask2tid(0x8),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,992,*,*,1) xir_8_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_59: and %g1, 2, %g1 brnz,a %g1, xirwait_8_59 ldx [%r17], %g1 xir_8_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8463d9 ! 68: WR_CLEAR_SOFTINT_I wr %r17, 0x03d9, %clear_softint br_longdelay4_8_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902003 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate .word 0xe69fc6c0 ! 70: LDDA_R ldda [%r31, %r0] 0x36, %r19 .word 0xe0bfda60 ! 71: STDA_R stda %r16, [%r31 + %r0] 0xd3 splash_tba_8_62: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_8_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3d0] %asi stxa %r5, [%r0+0x3e0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d90c003 ! 73: WRPR_WSTATE_R wrpr %r3, %r3, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_64) , 16, 16)) -> intp(7,0,28,*,976,*,db,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_64)&0xffffffff) , 16, 16)) -> intp(1,0,4,*,680,*,db,1) #else set 0xfb806c6e, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a1c9d3 ! 1: FDIVd fdivd %f38, %f50, %f18 intvec_8_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a4c9d2 ! 74: FDIVd fdivd %f50, %f18, %f40 mondo_8_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d8] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94000a ! 75: WRPR_WSTATE_R wrpr %r16, %r10, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_66), 16, 16)) -> intp(mask2tid(0x8),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,640,*,*,1) xir_8_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_66: and %g1, 2, %g1 brnz,a %g1, xirwait_8_66 ldx [%r17], %g1 xir_8_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84bf6f ! 76: WR_CLEAR_SOFTINT_I wr %r18, 0x1f6f, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_67), 16, 16)) -> intp(mask2tid(0x8),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) xir_8_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_67: and %g1, 2, %g1 brnz,a %g1, xirwait_8_67 ldx [%r17], %g1 xir_8_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817cd0 ! 77: WR_CLEAR_SOFTINT_I wr %r5, 0x1cd0, %clear_softint splash_hpstate_8_68: ta T_CHANGE_NONHPRIV .word 0x2acc0001 ! 1: BRNZ brnz,a,pt %r16, .word 0x81983707 ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x1707, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_69: wrhpr %g0, 0x24a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c6c0 ! 79: CASA_I casa [%r31] 0x36, %r0, %r19 .word 0xe69fd160 ! 1: LDDA_R ldda [%r31, %r0] 0x8b, %r19 .word 0xe6bfc080 ! 1: STDA_R stda %r19, [%r31 + %r0] 0x04 mov 0xb1, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_8_70: nop nop ta T_CHANGE_HPRIV set 0xc5bf1fcd, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x24cd0001 ! 1: BRLEZ brlez,a,pt %r20, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_8_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_71)+8 , 16, 16)) -> intp(6,0,5,*,760,*,5b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_71)&0xffffffff)+8 , 16, 16)) -> intp(6,0,22,*,1016,*,5b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_72), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1000,*,*,1) xir_8_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_72: and %g1, 2, %g1 brnz,a %g1, xirwait_8_72 ldx [%r17], %g1 xir_8_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a3e6 ! 83: WR_CLEAR_SOFTINT_I wr %r18, 0x03e6, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_73: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_73) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,896,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_73: wrhpr %g0, 0x482, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 84: RDPC rd %pc, %r8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_74)+8 , 16, 16)) -> intp(6,0,3,*,1008,*,b9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_74)&0xffffffff)+8 , 16, 16)) -> intp(2,0,22,*,968,*,b9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e4e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4e, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_8_75: set user_data_start, %o7 .word 0x93902005 ! 86: WRPR_CWP_I wrpr %r0, 0x0005, %cwp cwp_8_76: set user_data_start, %o7 .word 0x93902005 ! 87: WRPR_CWP_I wrpr %r0, 0x0005, %cwp brcommon1_8_77: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-0, %r27 .word 0x93b44484 ! 88: FCMPLE32 fcmple32 %d48, %d4, %r9 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_78), 16, 16)) -> intp(mask2tid(0x8),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) xir_8_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_78: and %g1, 2, %g1 brnz,a %g1, xirwait_8_78 ldx [%r17], %g1 xir_8_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81faf6 ! 89: WR_CLEAR_SOFTINT_I wr %r7, 0x1af6, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_8_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_79-donret_8_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000cdb00 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x159b, %htstate best_set_reg(0x760, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) done donretarg_8_79: .word 0x81983488 ! 90: WRHPR_HPSTATE_I wrhpr %r0, 0x1488, %hpstate .word 0xe19fe100 ! 91: LDDFA_I ldda [%r31, 0x0100], %f16 ibp_8_80: nop nop .word 0xd49fc6c0 ! 92: LDDA_R ldda [%r31, %r0] 0x36, %r10 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_81: wrhpr %g0, 0xe43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c600 ! 93: CASA_I casa [%r31] 0x30, %r0, %r10 trapasi_8_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_8_83: nop nop ta T_CHANGE_HPRIV setx 0xaf306436a01c3397, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 95: FBPLG fblg intveclr_8_84: nop nop ta T_CHANGE_HPRIV setx 0xb11f64657f2d3ed9, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x3d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_8_85: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 97: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_86: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_86) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,912,*,*,1)') ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_86: wrhpr %g0, 0x283, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 98: RDPC rd %pc, %r16 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_87: wrhpr %g0, 0xd92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 99: CASA_I casa [%r31] 0x8a, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_8_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_88-donret_8_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00645100 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x689, %htstate best_set_reg(0x1f4b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) ldx [%r12+%r0], %g1 retry donretarg_8_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_8_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x87ac4a52 ! 102: FCMPd fcmpd %fcc, %f48, %f18 .word 0x97b307d4 ! 103: PDIST pdistn %d12, %d20, %d42 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_92), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) xir_8_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_92: and %g1, 2, %g1 brnz,a %g1, xirwait_8_92 ldx [%r17], %g1 xir_8_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846d0f ! 104: WR_CLEAR_SOFTINT_I wr %r17, 0x0d0f, %clear_softint ibp_8_93: nop nop .word 0xe19fde00 ! 105: LDDFA_R ldda [%r31, %r0], %f16 nop nop mov 0x1, %r18 splash_cmpr_8_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_94)+8 , 16, 16)) -> intp(6,0,28,*,672,*,3e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_94)&0xffffffff)+8 , 16, 16)) -> intp(1,0,10,*,656,*,3e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_8_95: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfc2c0 ! 107: STDFA_R stda %f16, [%r0, %r31] .word 0x9f803d76 ! 108: SIR sir 0x1d76 nop nop ta T_CHANGE_HPRIV ! macro donret_8_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_96-donret_8_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00165100 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x16d0, %htstate wrhpr %g0, 0xbdb, %hpstate ! rand=1 (8) ldx [%r12+%r0], %g1 retry donretarg_8_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x1c780001 ! 110: BPPOS cmp_8_97: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_97: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_97 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_97: brnz,a %r10, cmp_wait8_97 ld [%r23], %r10 ba cmp_startwait8_97 mov 0x8, %r10 continue_cmp_8_97: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_97 mov 0xe9, %r17 best_set_reg(0xb15517a7f671d5f0, %r16, %r17) cmp_multi_core_8_97: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x611, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f8020e0 ! 111: SIR sir 0x00e0 splash_tba_8_98: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x77b064e1, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_99: .word 0x39400001 ! 113: FBPUGE fbuge,a,pn %fcc0, memptr_8_100: set 0x60540000, %r31 .word 0x8584fcdd ! 114: WRCCR_I wr %r19, 0x1cdd, %ccr nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_101: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_101) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,696,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_101: wrhpr %g0, 0x788, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 115: RDPC rd %pc, %r13 splash_tba_8_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819839dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x19dd, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_104: wrhpr %g0, 0xe82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c080 ! 118: CASA_I casa [%r31] 0x 4, %r0, %r13 ibp_8_105: nop nop .word 0xa3703723 ! 119: POPC_I popc 0x1723, %r17 ibp_8_106: nop nop .word 0xda97c280 ! 120: LDUHA_R lduha [%r31, %r0] 0x14, %r13 mondo_8_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d92400c ! 121: WRPR_WSTATE_R wrpr %r9, %r12, %wstate .word 0xc19fdb40 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe020 ! 123: LDDA_I ldda [%r31, + 0x0020] %asi, %r13 brcommon3_8_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r20, [%r0] ASI_LSU_CONTROL .word 0xa5aac830 ! 124: FMOVGE fmovs %fcc1, %f16, %f18 .word 0xe037e074 ! 125: STH_I sth %r16, [%r31 + 0x0074] frzptr_8_109: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702020 ! 1: POPC_I popc 0x0020, %r16 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdf00 ! 126: STDFA_R stda %f0, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_8 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_110: wrhpr %g0, 0x250, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dd40 ! 127: CASA_I casa [%r31] 0xea, %r0, %r16 nop nop set 0xd7101b23, %r28 !TTID : 3 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97a4c9c4 ! 1: FDIVd fdivd %f50, %f4, %f42 intvec_8_111: .word 0xa9b144c7 ! 128: FCMPNE32 fcmpne32 %d36, %d38, %r20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_112) , 16, 16)) -> intp(4,0,24,*,680,*,69,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_112)&0xffffffff) , 16, 16)) -> intp(4,0,9,*,952,*,69,1) #else set 0xb7c07c76, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x95a449c8 ! 1: FDIVd fdivd %f48, %f8, %f10 intvec_8_112: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9bb104d2 ! 129: FCMPNE32 fcmpne32 %d4, %d18, %r13 .word 0xc1bfda60 ! 130: STDFA_R stda %f0, [%r0, %r31] cmp_8_114: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_114: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_114 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_114: brnz,a %r10, cmp_wait8_114 ld [%r23], %r10 ba cmp_startwait8_114 mov 0x8, %r10 continue_cmp_8_114: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_114 mov 0xdd, %r17 best_set_reg(0x2f9c5dc031c7ad26, %r16, %r17) cmp_multi_core_8_114: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x9f8020b0 ! 131: SIR sir 0x00b0 splash_tick_8_115: nop nop ta T_CHANGE_HPRIV best_set_reg(0xe1600f39c48eb743, %r16, %r17) .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_8_116: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe1a0 ! 134: LDDA_I ldda [%r31, + 0x01a0] %asi, %r10 intveclr_8_117: nop nop ta T_CHANGE_HPRIV setx 0xcd8a6caa8287e361, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x85a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, .word 0x8d903ec7 ! 136: WRPR_PSTATE_I wrpr %r0, 0x1ec7, %pstate .word 0xd4bfd140 ! 137: STDA_R stda %r10, [%r31 + %r0] 0x8a ibp_8_120: nop nop wrhpr %g0, 0x619, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c3c0 ! 138: CASA_I casa [%r31] 0x1e, %r0, %r10 .word 0x8d903bb3 ! 139: WRPR_PSTATE_I wrpr %r0, 0x1bb3, %pstate frzptr_8_122: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 140: BN bn,a nop nop set 0x7e0d45a, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9ba089cd ! 1: FDIVd fdivd %f2, %f44, %f44 intvec_8_123: .word 0x9f803e62 ! 141: SIR sir 0x1e62 splash_tick_8_124: nop nop ta T_CHANGE_HPRIV best_set_reg(0x1090c4a467fb6b1a, %r16, %r17) .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_125)+8 , 16, 16)) -> intp(2,0,8,*,760,*,cc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_125)&0xffffffff)+8 , 16, 16)) -> intp(7,0,31,*,680,*,cc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c4d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c4d, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_8_126: ta T_CHANGE_NONHPRIV .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, .word 0x8198298f ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x098f, %hpstate demap_8_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0xb51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe129 ! 145: LDD_I ldd [%r31 + 0x0129], %r19 .word 0xe63fe1f8 ! 146: STD_I std %r19, [%r31 + 0x01f8] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_128)+8 , 16, 16)) -> intp(0,0,22,*,960,*,ac,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_128)&0xffffffff)+8 , 16, 16)) -> intp(0,0,13,*,936,*,ac,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f46 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f46, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_8_129: rdhpr %halt, %r18 .word 0x85880000 ! 148: ALLCLEAN splash_tba_8_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_8_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_131-donret_8_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0058cc00 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x7dd, %htstate best_set_reg(0x1cf3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) done donretarg_8_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_132) , 16, 16)) -> intp(2,0,14,*,920,*,ed,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_132)&0xffffffff) , 16, 16)) -> intp(2,0,15,*,984,*,ed,1) #else set 0x6aa0854d, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a249cd ! 1: FDIVd fdivd %f40, %f44, %f16 intvec_8_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3a449c6 ! 151: FDIVd fdivd %f48, %f6, %f48 memptr_8_133: set 0x60540000, %r31 .word 0x858325e3 ! 152: WRCCR_I wr %r12, 0x05e3, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 cmp_8_134: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_134: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_134 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_134: brnz,a %r10, cmp_wait8_134 ld [%r23], %r10 ba cmp_startwait8_134 mov 0x8, %r10 continue_cmp_8_134: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_134 mov 32, %r17 best_set_reg(0x728639f8063abb7a, %r16, %r17) cmp_multi_core_8_134: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe7e7c3c0 ! 154: CASA_I casa [%r31] 0x1e, %r0, %r19 .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe070 ! 156: LDD_I ldd [%r31 + 0x0070], %r19 .word 0xc1bfdb20 ! 157: STDFA_R stda %f0, [%r0, %r31] splash_lsu_8_136: nop nop ta T_CHANGE_HPRIV set 0x82ed135d, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697c240 ! 159: LDUHA_R lduha [%r31, %r0] 0x12, %r19 .word 0x95b304d2 ! 160: FCMPNE32 fcmpne32 %d12, %d18, %r10 dvapa_8_138: nop nop ta T_CHANGE_HPRIV mov 0xeef, %r20 mov 0x6, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xe52, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2bfd000 ! 161: STDA_R stda %r9, [%r31 + %r0] 0x80 .word 0xd31fe060 ! 162: LDDF_I ldd [%r31, 0x0060], %f9 intveclr_8_140: nop nop ta T_CHANGE_HPRIV setx 0x2370c0af68a7d7f7, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 163: FBPLG fblg,a,pn %fcc0, .word 0xe1bfde20 ! 164: STDFA_R stda %f16, [%r0, %r31] brcommon3_8_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0xa7aac833 ! 165: FMOVGE fmovs %fcc1, %f19, %f19 brcommon3_8_142: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-0, %r27 .word 0xa5b7c7c0 ! 166: PDIST pdistn %d62, %d0, %d18 cmp_8_143: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_143: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_143 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_143: brnz,a %r10, cmp_wait8_143 ld [%r23], %r10 ba cmp_startwait8_143 mov 0x8, %r10 continue_cmp_8_143: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_143 mov 0xe8, %r17 best_set_reg(0x9645dd18217ae20c, %r16, %r17) cmp_multi_core_8_143: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91904013 ! 167: WRPR_PIL_R wrpr %r1, %r19, %pil frzptr_8_144: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 168: BN bn splash_hpstate_8_145: ta T_CHANGE_NONHPRIV .word 0x8198224d ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x024d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_146: wrhpr %g0, 0x208, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c380 ! 170: CASA_I casa [%r31] 0x1c, %r0, %r18 splash_lsu_8_147: nop nop ta T_CHANGE_HPRIV set 0x93000d44, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2b400002 ! 1: FBPUG fbug,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 171: FBPULE fbule .word 0x24c9c001 ! 172: BRLEZ brlez,a,pt %r7, .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_8_149: set 0x60340000, %r31 .word 0x85843280 ! 174: WRCCR_I wr %r16, 0x1280, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_150), 16, 16)) -> intp(mask2tid(0x8),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,640,*,*,1) xir_8_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_150: and %g1, 2, %g1 brnz,a %g1, xirwait_8_150 ldx [%r17], %g1 xir_8_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853da5 ! 175: WR_CLEAR_SOFTINT_I wr %r20, 0x1da5, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_8_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_151)+8 , 16, 16)) -> intp(4,0,21,*,968,*,e9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_151)&0xffffffff)+8 , 16, 16)) -> intp(4,0,4,*,904,*,e9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_152) , 16, 16)) -> intp(1,0,30,*,728,*,f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_152)&0xffffffff) , 16, 16)) -> intp(4,0,21,*,728,*,f,1) #else set 0xe0d0b8cb, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_152: .word 0xa5b504d4 ! 177: FCMPNE32 fcmpne32 %d20, %d20, %r18 mondo_8_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94c00a ! 178: WRPR_WSTATE_R wrpr %r19, %r10, %wstate .word 0xd427e1bc ! 179: STW_I stw %r10, [%r31 + 0x01bc] nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_154: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_154) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,936,*,*,1)') ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_154: wrhpr %g0, 0xe82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 180: RDPC rd %pc, %r17 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_155: wrhpr %g0, 0x9c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d040 ! 182: CASA_I casa [%r31] 0x82, %r0, %r9 .word 0xa5b18fe3 ! 183: FONES e %f18 splash_tba_8_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_8_157: rdhpr %halt, %r10 .word 0x85880000 ! 185: ALLCLEAN .word 0x87ac0ad0 ! 186: FCMPEd fcmped %fcc, %f16, %f16 frzptr_8_158: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0xaf004a80, %r28 !TTID : 2 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x97b444c6 ! 1: FCMPNE32 fcmpne32 %d48, %d6, %r11 intvec_8_159: .word 0x9f8024b6 ! 188: SIR sir 0x04b6 .word 0xd437e1aa ! 189: STH_I sth %r10, [%r31 + 0x01aa] change_to_randtl_8_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_8_160: .word 0x8f902001 ! 190: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tick_8_161: nop nop ta T_CHANGE_HPRIV best_set_reg(0x20e4e2a9a4c84d76, %r16, %r17) .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_162), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,944,*,*,1) xir_8_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_162: and %g1, 2, %g1 brnz,a %g1, xirwait_8_162 ldx [%r17], %g1 xir_8_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8161ce ! 192: WR_CLEAR_SOFTINT_I wr %r5, 0x01ce, %clear_softint cmp_8_163: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_163: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_163 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_163: brnz,a %r10, cmp_wait8_163 ld [%r23], %r10 ba cmp_startwait8_163 mov 0x8, %r10 continue_cmp_8_163: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_163 mov 21, %r17 best_set_reg(0x0569fa1c9cfc3738, %r16, %r17) cmp_multi_core_8_163: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x319, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91940009 ! 193: WRPR_PIL_R wrpr %r16, %r9, %pil memptr_8_164: set 0x60340000, %r31 .word 0x85843a82 ! 194: WRCCR_I wr %r16, 0x1a82, %ccr .word 0xd49fc3c0 ! 195: LDDA_R ldda [%r31, %r0] 0x1e, %r10 frzptr_8_166: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 196: BN bn brcommon1_8_167: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-0, %r27 .word 0x91b087cd ! 197: PDIST pdistn %d2, %d44, %d8 dvapa_8_168: nop nop ta T_CHANGE_HPRIV mov 0xdbb, %r20 mov 0x1e, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xf41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd11fe150 ! 198: LDDF_I ldd [%r31, 0x0150], %f8 .word 0xc19fdf20 ! 199: LDDFA_R ldda [%r31, %r0], %f0 .word 0x9750c000 ! 200: RDPR_TT .word 0xf16fe0c0 ! 201: PREFETCH_I prefetch [%r31 + 0x00c0], #24 fpinit_8_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 202: FCMPd fcmpd %fcc, %f0, %f4 .word 0xc1bfde20 ! 203: STDFA_R stda %f0, [%r0, %r31] cwp_8_172: set user_data_start, %o7 .word 0x93902006 ! 204: WRPR_CWP_I wrpr %r0, 0x0006, %cwp nop nop set 0x15a08eec, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_8_173: .word 0x39400001 ! 205: FBPUGE fbuge,a,pn %fcc0, splash_lsu_8_174: nop nop ta T_CHANGE_HPRIV set 0xb184ee69, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 206: FBPULE fbule,a,pn %fcc0, ibp_8_175: nop nop .word 0xe1bfdc00 ! 207: STDFA_R stda %f16, [%r0, %r31] dvapa_8_176: nop nop ta T_CHANGE_HPRIV mov 0xb1b, %r20 mov 0xb, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x9ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdd40 ! 208: STDA_R stda %r16, [%r31 + %r0] 0xea splash_lsu_8_177: nop nop ta T_CHANGE_HPRIV set 0x66b70665, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 209: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_8 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_178: wrhpr %g0, 0xc5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7dd40 ! 210: CASA_I casa [%r31] 0xea, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_179), 16, 16)) -> intp(mask2tid(0x8),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,640,*,*,1) xir_8_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_179: and %g1, 2, %g1 brnz,a %g1, xirwait_8_179 ldx [%r17], %g1 xir_8_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a657 ! 211: WR_CLEAR_SOFTINT_I wr %r10, 0x0657, %clear_softint .word 0xa9a00552 ! 212: FSQRTd fsqrt cancelint_8_180: rdhpr %halt, %r12 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_181), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,952,*,*,1) xir_8_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_181: and %g1, 2, %g1 brnz,a %g1, xirwait_8_181 ldx [%r17], %g1 xir_8_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab813c15 ! 214: WR_CLEAR_SOFTINT_I wr %r4, 0x1c15, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_182: wrhpr %g0, 0xf80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c400 ! 215: CASA_I casa [%r31] 0x20, %r0, %r10 dvapa_8_183: nop nop ta T_CHANGE_HPRIV mov 0xd2f, %r20 mov 0x5, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xe49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdc40 ! 216: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_184), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) xir_8_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_184: and %g1, 2, %g1 brnz,a %g1, xirwait_8_184 ldx [%r17], %g1 xir_8_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817cea ! 217: WR_CLEAR_SOFTINT_I wr %r5, 0x1cea, %clear_softint .word 0xd53fe040 ! 218: STDF_I std %f10, [0x0040, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_186)+8 , 16, 16)) -> intp(7,0,20,*,1000,*,79,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_186)&0xffffffff)+8 , 16, 16)) -> intp(6,0,29,*,736,*,79,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819836a9 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x16a9, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_8_187: nop nop ta T_CHANGE_HPRIV mov 0xfe8, %r20 mov 0xe, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x883, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4bfc3c0 ! 220: STDA_R stda %r10, [%r31 + %r0] 0x1e pmu_8_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb8ffffffaf, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_8_189: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x95702060 ! 1: POPC_I popc 0x0060, %r10 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 222: BN bn,a cancelint_8_190: rdhpr %halt, %r17 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_191: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_191) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,976,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_191: wrhpr %g0, 0x95a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 224: RDPC rd %pc, %r18 brcommon1_8_192: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x87ac4a51 ! 225: FCMPd fcmpd %fcc, %f48, %f48 nop nop mov 0x1, %r18 splash_cmpr_8_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_193)+8 , 16, 16)) -> intp(7,0,15,*,1008,*,28,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_193)&0xffffffff)+8 , 16, 16)) -> intp(7,0,10,*,696,*,28,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983856 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1856, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_195: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_195) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,712,*,*,1)') ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_195: wrhpr %g0, 0x813, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 228: RDPC rd %pc, %r12 .word 0x8790213a ! 229: WRPR_TT_I wrpr %r0, 0x013a, %tt nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_8 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_196: wrhpr %g0, 0x910, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d000 ! 230: CASA_I casa [%r31] 0x80, %r0, %r18 .word 0xe53fe130 ! 231: STDF_I std %f18, [0x0130, %r31] cmp_8_198: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_198: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_198 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_198: brnz,a %r10, cmp_wait8_198 ld [%r23], %r10 ba cmp_startwait8_198 mov 0x8, %r10 continue_cmp_8_198: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_198 mov 0xc6, %r17 best_set_reg(0xf2670ed7ac88b321, %r16, %r17) cmp_multi_core_8_198: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xd59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe43fe190 ! 232: STD_I std %r18, [%r31 + 0x0190] frzptr_8_199: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 233: BN bn,a .word 0x9f8035d5 ! 234: SIR sir 0x15d5 mondo_8_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3d0] %asi stxa %r20, [%r0+0x3d0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d918006 ! 235: WRPR_WSTATE_R wrpr %r6, %r6, %wstate splash_tba_8_201: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_202)+8 , 16, 16)) -> intp(6,0,19,*,976,*,7f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_202)&0xffffffff)+8 , 16, 16)) -> intp(6,0,8,*,712,*,7f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982a9d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0a9d, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_8_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3d0] %asi stxa %r20, [%r0+0x3d8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d90c013 ! 238: WRPR_WSTATE_R wrpr %r3, %r19, %wstate cancelint_8_204: rdhpr %halt, %r19 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_8_205: nop nop ta T_CHANGE_HPRIV set 0x2eaab77d, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 240: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_8_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_206-donret_8_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00210500 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x997, %htstate wrhpr %g0, 0xbd3, %hpstate ! rand=1 (8) ldx [%r12+%r0], %g1 retry donretarg_8_206: .word 0x30800001 ! 241: BA ba,a .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 cmp_8_207: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_207: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_207 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_207: brnz,a %r10, cmp_wait8_207 ld [%r23], %r10 ba cmp_startwait8_207 mov 0x8, %r10 continue_cmp_8_207: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_207 mov 0x9f, %r17 best_set_reg(0x9ee861947cf7a221, %r16, %r17) cmp_multi_core_8_207: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xec9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91944012 ! 243: WRPR_PIL_R wrpr %r17, %r18, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_208), 16, 16)) -> intp(mask2tid(0x8),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,752,*,*,1) xir_8_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_208: and %g1, 2, %g1 brnz,a %g1, xirwait_8_208 ldx [%r17], %g1 xir_8_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846756 ! 244: WR_CLEAR_SOFTINT_I wr %r17, 0x0756, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983667 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1667, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_210: wrhpr %g0, 0xf41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 246: CASA_I casa [%r31] 0x8a, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x1, %r18 splash_cmpr_8_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_211)+8 , 16, 16)) -> intp(4,0,6,*,928,*,ce,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_211)&0xffffffff)+8 , 16, 16)) -> intp(4,0,18,*,968,*,ce,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 248: SIAM siam 1 cancelint_8_212: rdhpr %halt, %r8 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982f5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f5f, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d903645 ! 251: WRPR_PSTATE_I wrpr %r0, 0x1645, %pstate memptr_8_215: set 0x60340000, %r31 .word 0x858334a5 ! 252: WRCCR_I wr %r12, 0x14a5, %ccr nop nop mov 0x1, %r18 splash_cmpr_8_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_216)+8 , 16, 16)) -> intp(4,0,14,*,752,*,69,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_216)&0xffffffff)+8 , 16, 16)) -> intp(5,0,28,*,1008,*,69,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_8_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7dd40 ! 1: CASA_I casa [%r31] 0xea, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0xa9aac832 ! 254: FMOVGE fmovs %fcc1, %f18, %f20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_218) , 16, 16)) -> intp(1,0,28,*,928,*,6a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_218)&0xffffffff) , 16, 16)) -> intp(2,0,26,*,1000,*,6a,1) #else set 0xba101f44, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_218: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3b444c4 ! 255: FCMPNE32 fcmpne32 %d48, %d4, %r17 cmp_8_219: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_219: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_219 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_219: brnz,a %r10, cmp_wait8_219 ld [%r23], %r10 ba cmp_startwait8_219 mov 0x8, %r10 continue_cmp_8_219: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_219 mov 0x7b, %r17 best_set_reg(0x92643abb3c013fd5, %r16, %r17) cmp_multi_core_8_219: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91904001 ! 256: WRPR_PIL_R wrpr %r1, %r1, %pil ibp_8_220: nop nop .word 0x97a449cc ! 257: FDIVd fdivd %f48, %f12, %f42 cmp_8_221: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_221: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_221 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_221: brnz,a %r10, cmp_wait8_221 ld [%r23], %r10 ba cmp_startwait8_221 mov 0x8, %r10 continue_cmp_8_221: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_221 mov 18, %r17 best_set_reg(0xe719b7f0550203bd, %r16, %r17) cmp_multi_core_8_221: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xa82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd69fdd40 ! 258: LDDA_R ldda [%r31, %r0] 0xea, %r11 cancelint_8_222: rdhpr %halt, %r19 .word 0x85880000 ! 259: ALLCLEAN .word 0xe1bfdf20 ! 260: STDFA_R stda %f16, [%r0, %r31] cmp_8_224: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_224: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_224 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_224: brnz,a %r10, cmp_wait8_224 ld [%r23], %r10 ba cmp_startwait8_224 mov 0x8, %r10 continue_cmp_8_224: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_224 mov 58, %r17 best_set_reg(0x23fb4f5c5b595991, %r16, %r17) cmp_multi_core_8_224: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xdc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe93fe100 ! 261: STDF_I std %f20, [0x0100, %r31] cancelint_8_225: rdhpr %halt, %r19 .word 0x85880000 ! 262: ALLCLEAN brcommon3_8_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0x99aac831 ! 263: FMOVGE fmovs %fcc1, %f17, %f12 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982cc5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0cc5, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_8_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe1f0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x01f0] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0xa5aac823 ! 265: FMOVGE fmovs %fcc1, %f3, %f18 .word 0xd63fe140 ! 266: STD_I std %r11, [%r31 + 0x0140] splash_hpstate_8_230: .word 0x0ccd0002 ! 1: BRGZ brgz,pt %r20, .word 0x81983557 ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x1557, %hpstate memptr_8_231: set user_data_start, %r31 .word 0x8580e7ef ! 268: WRCCR_I wr %r3, 0x07ef, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_232) , 16, 16)) -> intp(1,0,19,*,904,*,eb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_232)&0xffffffff) , 16, 16)) -> intp(0,0,2,*,960,*,eb,1) #else set 0x6f502858, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a409c7 ! 1: FDIVd fdivd %f16, %f38, %f16 intvec_8_232: .word 0x19400001 ! 269: FBPUGE fbuge pmu_8_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffa8, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_8_234: nop nop ta T_CHANGE_HPRIV set 0x13470db6, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_235), 16, 16)) -> intp(mask2tid(0x8),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1016,*,*,1) xir_8_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_235: and %g1, 2, %g1 brnz,a %g1, xirwait_8_235 ldx [%r17], %g1 xir_8_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f5fb ! 273: WR_CLEAR_SOFTINT_I wr %r7, 0x15fb, %clear_softint cmp_8_236: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_236: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_236 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_236: brnz,a %r10, cmp_wait8_236 ld [%r23], %r10 ba cmp_startwait8_236 mov 0x8, %r10 continue_cmp_8_236: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_236 mov 0xe3, %r17 best_set_reg(0x12a82620c7c5f16e, %r16, %r17) cmp_multi_core_8_236: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe21fe000 ! 274: LDD_I ldd [%r31 + 0x0000], %r17 splash_tick_8_237: nop nop ta T_CHANGE_HPRIV best_set_reg(0xfbe167e7cce5996e, %r16, %r17) .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xe1bfdb20 ! 276: STDFA_R stda %f16, [%r0, %r31] splash_tick_8_239: nop nop ta T_CHANGE_HPRIV best_set_reg(0xacadc0c71e2b5bc5, %r16, %r17) .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_8_240: nop nop ta T_CHANGE_HPRIV set 0x561e767e, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0f400001 ! 1: FBPU fbu stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0xa6408920, %r28 !TTID : 1 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_241: .word 0x9f8039f7 ! 279: SIR sir 0x19f7 mondo_8_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3e8] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d934013 ! 280: WRPR_WSTATE_R wrpr %r13, %r19, %wstate dvapa_8_243: nop nop ta T_CHANGE_HPRIV mov 0x980, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x582, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f80331d ! 281: SIR sir 0x131d nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_244: wrhpr %g0, 0x101, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c380 ! 282: CASA_I casa [%r31] 0x1c, %r0, %r20 cmp_8_245: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_245: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_245 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_245: brnz,a %r10, cmp_wait8_245 ld [%r23], %r10 ba cmp_startwait8_245 mov 0x8, %r10 continue_cmp_8_245: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_245 mov 0x5a, %r17 best_set_reg(0xe6d73396315e31bf, %r16, %r17) cmp_multi_core_8_245: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xb81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe91fe140 ! 283: LDDF_I ldd [%r31, 0x0140], %f20 .word 0xe93fe010 ! 284: STDF_I std %f20, [0x0010, %r31] br_longdelay4_8_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902000 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_248: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_248) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,688,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_248: wrhpr %g0, 0x4d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 286: RDPC rd %pc, %r20 memptr_8_249: set user_data_start, %r31 .word 0x8580bf93 ! 287: WRCCR_I wr %r2, 0x1f93, %ccr cmp_8_250: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_250: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_250 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_250: brnz,a %r10, cmp_wait8_250 ld [%r23], %r10 ba cmp_startwait8_250 mov 0x8, %r10 continue_cmp_8_250: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_250 mov 0xce, %r17 best_set_reg(0x6e68c26dd899d01c, %r16, %r17) cmp_multi_core_8_250: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x959, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9191c013 ! 288: WRPR_PIL_R wrpr %r7, %r19, %pil mondo_8_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c8] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d948011 ! 289: WRPR_WSTATE_R wrpr %r18, %r17, %wstate cancelint_8_252: rdhpr %halt, %r19 .word 0x85880000 ! 290: ALLCLEAN jmptr_8_253: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_8_254: rdhpr %halt, %r18 .word 0x85880000 ! 292: ALLCLEAN frzptr_8_255: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xdbe7c2e0 ! 1: CASA_I casa [%r31] 0x17, %r0, %r13 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 293: BN bn,a .word 0xa5b107d2 ! 294: PDIST pdistn %d4, %d18, %d18 frzptr_8_257: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdf20 ! 295: STDFA_R stda %f0, [%r0, %r31] br_badelay1_8_258: .word 0x06800001 ! 1: BL bl .word 0xd937e120 ! 1: STQF_I - %f12, [0x0120, %r31] .word 0x99b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r12 normalw .word 0x91458000 ! 296: RD_SOFTINT_REG rd %softint, %r8 ibp_8_259: nop nop .word 0x9bb44492 ! 297: FCMPLE32 fcmple32 %d48, %d18, %r13 cmp_8_260: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_260: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_260 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_260: brnz,a %r10, cmp_wait8_260 ld [%r23], %r10 ba cmp_startwait8_260 mov 0x8, %r10 continue_cmp_8_260: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_260 mov 0xb3, %r17 best_set_reg(0x95fd4ba795332d48, %r16, %r17) cmp_multi_core_8_260: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91940014 ! 298: WRPR_PIL_R wrpr %r16, %r20, %pil brcommon2_8_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd1114011 ! 1: LDQF_R - [%r5, %r17], %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 299: BN bn,a splash_lsu_8_262: nop nop ta T_CHANGE_HPRIV set 0x7adf633c, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0a800001 ! 1: BCS bcs stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 300: FBPULE fbule,a,pn %fcc0, pmu_8_263: nop nop setx 0xffffffbaffffffa7, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_8_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_264)+8 , 16, 16)) -> intp(6,0,26,*,1000,*,59,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_264)&0xffffffff)+8 , 16, 16)) -> intp(3,0,29,*,688,*,59,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_8_265: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_266), 16, 16)) -> intp(mask2tid(0x8),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,664,*,*,1) xir_8_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_266: and %g1, 2, %g1 brnz,a %g1, xirwait_8_266 ldx [%r17], %g1 xir_8_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852ad2 ! 304: WR_CLEAR_SOFTINT_I wr %r20, 0x0ad2, %clear_softint nop nop set 0xf1d057a9, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_267: .word 0xa7b1c4d4 ! 305: FCMPNE32 fcmpne32 %d38, %d20, %r19 mondo_8_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d904012 ! 306: WRPR_WSTATE_R wrpr %r1, %r18, %wstate nop nop set 0x9870865d, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_269: .word 0x9f803a8f ! 307: SIR sir 0x1a8f ibp_8_270: nop nop .word 0xe19fda60 ! 308: LDDFA_R ldda [%r31, %r0], %f16 frzptr_8_271: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x997021b0 ! 1: POPC_I popc 0x01b0, %r12 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfda60 ! 309: STDFA_R stda %f16, [%r0, %r31] .word 0xd927e1bc ! 310: STF_I st %f12, [0x01bc, %r31] change_to_randtl_8_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_8_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_8_273: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fe1a0 ! 313: LDDFA_I ldda [%r31, 0x01a0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_274: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_274) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,688,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_274: wrhpr %g0, 0xdd2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 314: RDPC rd %pc, %r9 memptr_8_275: set 0x60340000, %r31 .word 0x8581bfd0 ! 315: WRCCR_I wr %r6, 0x1fd0, %ccr cancelint_8_276: rdhpr %halt, %r19 .word 0x85880000 ! 316: ALLCLEAN frzptr_8_277: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 317: BN bn,a br_badelay1_8_278: .word 0x2c800001 ! 1: BNEG bneg,a .word 0xa3b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r17 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 normalw .word 0x97458000 ! 318: RD_SOFTINT_REG rd %softint, %r11 nop nop mov 0x1, %r18 splash_cmpr_8_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_279)+8 , 16, 16)) -> intp(4,0,22,*,640,*,cf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_279)&0xffffffff)+8 , 16, 16)) -> intp(6,0,8,*,688,*,cf,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 319: SIAM siam 1 mondo_8_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d940014 ! 320: WRPR_WSTATE_R wrpr %r16, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_8 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_281: wrhpr %g0, 0x602, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d160 ! 321: CASA_I casa [%r31] 0x8b, %r0, %r19 frzptr_8_282: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 322: BN bn nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819824cf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x04cf, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_8 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_284: wrhpr %g0, 0x48a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c200 ! 324: CASA_I casa [%r31] 0x10, %r0, %r19 .word 0xf1efe000 ! 325: PREFETCHA_I prefetcha [%r31, + 0x0000] %asi, #24 splash_tick_8_286: nop nop ta T_CHANGE_HPRIV best_set_reg(0xf52cd8a806377a96, %r16, %r17) .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_8_287: set user_data_start, %o7 .word 0x93902004 ! 327: WRPR_CWP_I wrpr %r0, 0x0004, %cwp .word 0x9f803289 ! 328: SIR sir 0x1289 memptr_8_288: set user_data_start, %r31 .word 0x8581ae44 ! 329: WRCCR_I wr %r6, 0x0e44, %ccr nop nop set 0x8d03cbc, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a2c9c7 ! 1: FDIVd fdivd %f42, %f38, %f20 intvec_8_289: .word 0x19400001 ! 330: FBPUGE fbuge nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_8 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_290: wrhpr %g0, 0x2d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c280 ! 331: CASA_I casa [%r31] 0x14, %r0, %r13 brcommon1_8_291: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7d000 ! 1: CASA_I casa [%r31] 0x80, %r0, %r13 ba,a .+8 jmpl %r27-0, %r27 .word 0xa570373d ! 332: POPC_I popc 0x173d, %r18 dvapa_8_292: nop nop ta T_CHANGE_HPRIV mov 0x9c7, %r20 mov 0x16, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xb88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdf20 ! 333: STDFA_R stda %f0, [%r0, %r31] .word 0xd21fe0f0 ! 334: LDD_I ldd [%r31 + 0x00f0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_8_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_294-donret_8_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0063fe00 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x190a, %htstate best_set_reg(0x1b82, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) retry donretarg_8_294: .word 0x8d90258d ! 335: WRPR_PSTATE_I wrpr %r0, 0x058d, %pstate splash_tba_8_295: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x1, %r18 splash_cmpr_8_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_296)+8 , 16, 16)) -> intp(1,0,24,*,696,*,d8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_296)&0xffffffff)+8 , 16, 16)) -> intp(6,0,6,*,648,*,d8,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_8_297: nop nop ta T_CHANGE_HPRIV set 0xa39c476b, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0f400001 ! 1: FBPU fbu stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 338: FBPULE fbule,a,pn %fcc0, .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d902456 ! 340: WRPR_PSTATE_I wrpr %r0, 0x0456, %pstate ibp_8_300: nop nop .word 0xe1bfdd40 ! 341: STDFA_R stda %f16, [%r0, %r31] .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_8_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_301-donret_8_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00c3de00 | (0x83 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x6d5, %htstate wrhpr %g0, 0x2d1, %hpstate ! rand=1 (8) done donretarg_8_301: .word 0x2cccc001 ! 343: BRGZ brgz,a,pt %r19, .word 0x9f802ceb ! 344: SIR sir 0x0ceb .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_303: ta T_CHANGE_NONHPRIV ! macro .word 0x9f803f33 ! 346: SIR sir 0x1f33 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983b9d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1b9d, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_8_305: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe0e0 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x00e0] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 348: BN bn,a mondo_8_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d924014 ! 349: WRPR_WSTATE_R wrpr %r9, %r20, %wstate intveclr_8_307: nop nop ta T_CHANGE_HPRIV setx 0xf33957c76b4607e4, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xa42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 350: FBPLG fblg,a,pn %fcc0, cmp_8_308: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_308: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_308 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_308: brnz,a %r10, cmp_wait8_308 ld [%r23], %r10 ba cmp_startwait8_308 mov 0x8, %r10 continue_cmp_8_308: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_308 mov 0x45, %r17 best_set_reg(0x90152fde2cd87651, %r16, %r17) cmp_multi_core_8_308: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91924013 ! 351: WRPR_PIL_R wrpr %r9, %r19, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_309), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,680,*,*,1) xir_8_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_309: and %g1, 2, %g1 brnz,a %g1, xirwait_8_309 ldx [%r17], %g1 xir_8_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab813b2c ! 352: WR_CLEAR_SOFTINT_I wr %r4, 0x1b2c, %clear_softint splash_tba_8_310: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_8_311: rdhpr %halt, %r12 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_8_312: nop nop ta T_CHANGE_HPRIV set 0xf922831a, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3f400002 ! 1: FBPO fbo,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_8_313: rdhpr %halt, %r16 .word 0x85880000 ! 356: ALLCLEAN jmptr_8_314: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x8790212c ! 358: WRPR_TT_I wrpr %r0, 0x012c, %tt splash_tba_8_315: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_316), 16, 16)) -> intp(mask2tid(0x8),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,896,*,*,1) xir_8_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_316: and %g1, 2, %g1 brnz,a %g1, xirwait_8_316 ldx [%r17], %g1 xir_8_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ee2a ! 360: WR_CLEAR_SOFTINT_I wr %r19, 0x0e2a, %clear_softint .word 0x28800002 ! 1: BLEU bleu,a .word 0x8d903bb1 ! 361: WRPR_PSTATE_I wrpr %r0, 0x1bb1, %pstate .word 0xc09fdc00 ! 362: LDDA_R ldda [%r31, %r0] 0xe0, %r0 .word 0x9f802e85 ! 363: SIR sir 0x0e85 mondo_8_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d948010 ! 364: WRPR_WSTATE_R wrpr %r18, %r16, %wstate cmp_8_320: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_320: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_320 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_320: brnz,a %r10, cmp_wait8_320 ld [%r23], %r10 ba cmp_startwait8_320 mov 0x8, %r10 continue_cmp_8_320: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_320 mov 13, %r17 best_set_reg(0xdecbf39ac1697e45, %r16, %r17) cmp_multi_core_8_320: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe9e7c080 ! 365: CASA_I casa [%r31] 0x 4, %r0, %r20 ibp_8_321: nop nop wrhpr %g0, 0xd5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe897c240 ! 366: LDUHA_R lduha [%r31, %r0] 0x12, %r20 .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_8_322: nop nop ta T_CHANGE_HPRIV setx 0x9782bd2d490105c4, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 369: FBPLG fblg ibp_8_323: nop nop wrhpr %g0, 0x58b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 370: BN bn,a memptr_8_324: set user_data_start, %r31 .word 0x8581bdb9 ! 371: WRCCR_I wr %r6, 0x1db9, %ccr cmp_8_325: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_325: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_325 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_325: brnz,a %r10, cmp_wait8_325 ld [%r23], %r10 ba cmp_startwait8_325 mov 0x8, %r10 continue_cmp_8_325: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_325 mov 0xb3, %r17 best_set_reg(0x910f3f0ab762854b, %r16, %r17) cmp_multi_core_8_325: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe8dfd100 ! 372: LDXA_R ldxa [%r31, %r0] 0x88, %r20 ibp_8_326: nop nop wrhpr %g0, 0xd13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe8dfdc40 ! 373: LDXA_R ldxa [%r31, %r0] 0xe2, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_327), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,976,*,*,1) xir_8_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_327: and %g1, 2, %g1 brnz,a %g1, xirwait_8_327 ldx [%r17], %g1 xir_8_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846560 ! 374: WR_CLEAR_SOFTINT_I wr %r17, 0x0560, %clear_softint br_badelay2_8_328: .word 0x95a4c9cd ! 1: FDIVd fdivd %f50, %f44, %f10 pdist %f14, %f26, %f22 .word 0x95b1c307 ! 375: ALIGNADDRESS alignaddr %r7, %r7, %r10 mondo_8_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3d0] %asi stxa %r12, [%r0+0x3c0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d940005 ! 376: WRPR_WSTATE_R wrpr %r16, %r5, %wstate splash_tba_8_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_8_331: nop nop ta T_CHANGE_PRIV setx 0xffffffb0ffffffa8, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_8_332: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_8_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e8] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d950013 ! 380: WRPR_WSTATE_R wrpr %r20, %r19, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_334)+8 , 16, 16)) -> intp(6,0,30,*,664,*,2c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_334)&0xffffffff)+8 , 16, 16)) -> intp(7,0,1,*,744,*,2c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198288f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x088f, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_8_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_335)+8 , 16, 16)) -> intp(0,0,14,*,712,*,bc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_335)&0xffffffff)+8 , 16, 16)) -> intp(0,0,5,*,704,*,bc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_8_336: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fde20 ! 383: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0xb6a0c598, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_337: .word 0x39400001 ! 384: FBPUGE fbuge,a,pn %fcc0, brcommon3_8_338: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7c080 ! 1: CASA_I casa [%r31] 0x 4, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0x93b7c7c0 ! 385: PDIST pdistn %d62, %d0, %d40 demap_8_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 wrhpr %g0, 0x6d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe0cd ! 386: LDD_I ldd [%r31 + 0x00cd], %r9 .word 0xd21fe040 ! 387: LDD_I ldd [%r31 + 0x0040], %r9 fpinit_8_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009c4 ! 388: FDIVd fdivd %f0, %f4, %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_342) , 16, 16)) -> intp(6,0,15,*,736,*,89,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_342)&0xffffffff) , 16, 16)) -> intp(0,0,19,*,736,*,89,1) #else set 0x2f50c381, %r28 !TTID : 3 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_342: .word 0x9f802dd1 ! 389: SIR sir 0x0dd1 brcommon2_8_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe112000c ! 1: LDQF_R - [%r8, %r12], %f16 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 390: BN bn,a .word 0xc19fdb20 ! 391: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_8_344: nop nop ta T_CHANGE_HPRIV set 0x69a4412d, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 392: FBPULE fbule nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_345)+8 , 16, 16)) -> intp(4,0,16,*,984,*,bc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_345)&0xffffffff)+8 , 16, 16)) -> intp(1,0,25,*,688,*,bc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f0f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f0f, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xe0bfdc40 ! 394: STDA_R stda %r16, [%r31 + %r0] 0xe2 cancelint_8_347: rdhpr %halt, %r13 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_348: wrhpr %g0, 0xd4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c180 ! 396: CASA_I casa [%r31] 0x c, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_8_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_349-donret_8_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00cd8d00 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x40f, %htstate wrhpr %g0, 0xc9a, %hpstate ! rand=1 (8) .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, ldx [%r11+%r0], %g1 done donretarg_8_349: .word 0xa5a189d4 ! 397: FDIVd fdivd %f6, %f20, %f18 splash_tba_8_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_8_351: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe120 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0120] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd2800be0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x5f, %r9 cwp_8_352: set user_data_start, %o7 .word 0x93902003 ! 401: WRPR_CWP_I wrpr %r0, 0x0003, %cwp splash_tick_8_353: nop nop ta T_CHANGE_HPRIV best_set_reg(0xf8b09b1715e2ae1d, %r16, %r17) .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_8_354: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffad, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_355), 16, 16)) -> intp(mask2tid(0x8),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,752,*,*,1) xir_8_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_355: and %g1, 2, %g1 brnz,a %g1, xirwait_8_355 ldx [%r17], %g1 xir_8_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833c85 ! 404: WR_CLEAR_SOFTINT_I wr %r12, 0x1c85, %clear_softint brcommon3_8_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 405: BN bn,a frzptr_8_357: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_358) , 16, 16)) -> intp(2,0,17,*,936,*,3d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_358)&0xffffffff) , 16, 16)) -> intp(3,0,7,*,688,*,3d,1) #else set 0xc9908830, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_358: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803155 ! 407: SIR sir 0x1155 .word 0xc19fde00 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_8_359: nop nop .word 0xc19fc3e0 ! 410: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_8_360: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe1c0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01c0] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902745 ! 411: WRPR_PSTATE_I wrpr %r0, 0x0745, %pstate .word 0x87902156 ! 412: WRPR_TT_I wrpr %r0, 0x0156, %tt frzptr_8_361: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_8_362: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_8_363: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_8_364: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 416: BN bn,a br_badelay3_8_365: .word 0x34800001 ! 1: BG bg,a .word 0x22800001 ! 1: BE be,a .word 0xe9148009 ! 1: LDQF_R - [%r18, %r9], %f20 .word 0xa7a5082d ! 417: FADDs fadds %f20, %f13, %f19 intveclr_8_366: nop nop ta T_CHANGE_HPRIV setx 0xf219f4d88638bdaa, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xcda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_8_367: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_8_368: nop nop ta T_CHANGE_HPRIV setx 0x70351fd81cbd2e82, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, cmp_8_369: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_369: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_369 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_369: brnz,a %r10, cmp_wait8_369 ld [%r23], %r10 ba cmp_startwait8_369 mov 0x8, %r10 continue_cmp_8_369: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_369 mov 0xc7, %r17 best_set_reg(0xefb9c43c5d2f45db, %r16, %r17) cmp_multi_core_8_369: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91944013 ! 421: WRPR_PIL_R wrpr %r17, %r19, %pil splash_hpstate_8_370: .word 0x08800001 ! 1: BLEU bleu .word 0x81982497 ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x0497, %hpstate cancelint_8_371: rdhpr %halt, %r16 .word 0x85880000 ! 423: ALLCLEAN mondo_8_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d94c006 ! 424: WRPR_WSTATE_R wrpr %r19, %r6, %wstate .word 0xc32fc000 ! 425: STXFSR_R st-sfr %f1, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_374), 16, 16)) -> intp(mask2tid(0x8),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) xir_8_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_374: and %g1, 2, %g1 brnz,a %g1, xirwait_8_374 ldx [%r17], %g1 xir_8_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a4a2 ! 426: WR_CLEAR_SOFTINT_I wr %r18, 0x04a2, %clear_softint ibp_8_375: nop nop .word 0xa5a0c9d0 ! 427: FDIVd fdivd %f34, %f16, %f18 .word 0xe1bfe080 ! 428: STDFA_I stda %f16, [0x0080, %r31] nop nop mov 0x1, %r18 splash_cmpr_8_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_376)+8 , 16, 16)) -> intp(4,0,12,*,688,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_376)&0xffffffff)+8 , 16, 16)) -> intp(0,0,14,*,728,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_377), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,752,*,*,1) xir_8_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_377: and %g1, 2, %g1 brnz,a %g1, xirwait_8_377 ldx [%r17], %g1 xir_8_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84bda6 ! 430: WR_CLEAR_SOFTINT_I wr %r18, 0x1da6, %clear_softint cancelint_8_378: rdhpr %halt, %r10 .word 0x85880000 ! 431: ALLCLEAN splash_tba_8_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_8_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_8_381: rdhpr %halt, %r9 .word 0x85880000 ! 434: ALLCLEAN memptr_8_382: set 0x60340000, %r31 .word 0x8581bab9 ! 435: WRCCR_I wr %r6, 0x1ab9, %ccr .word 0x9f802bcf ! 436: SIR sir 0x0bcf .word 0xd037e058 ! 437: STH_I sth %r8, [%r31 + 0x0058] .word 0xd0dfc720 ! 438: LDXA_R ldxa [%r31, %r0] 0x39, %r8 .word 0xc1bfda60 ! 439: STDFA_R stda %f0, [%r0, %r31] ibp_8_385: nop nop .word 0x99703177 ! 440: POPC_I popc 0x1177, %r12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_386), 16, 16)) -> intp(mask2tid(0x8),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) xir_8_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_386: and %g1, 2, %g1 brnz,a %g1, xirwait_8_386 ldx [%r17], %g1 xir_8_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8064a5 ! 441: WR_CLEAR_SOFTINT_I wr %r1, 0x04a5, %clear_softint intveclr_8_387: nop nop ta T_CHANGE_HPRIV setx 0xe3197874aa725a11, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 442: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_8 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_388: wrhpr %g0, 0xf82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7df00 ! 443: CASA_I casa [%r31] 0xf8, %r0, %r13 frzptr_8_389: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 444: BN bn intveclr_8_390: nop nop ta T_CHANGE_HPRIV setx 0xbb5d79302f610582, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xf82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 445: FBPLG fblg .word 0xa970338d ! 446: POPC_I popc 0x138d, %r20 br_badelay1_8_392: .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 .word 0xe3314010 ! 1: STQF_R - %f17, [%r16, %r5] .word 0x07400002 ! 1: FBPUL fbul normalw .word 0x99458000 ! 447: RD_SOFTINT_REG rd %softint, %r12 ibp_8_393: nop nop .word 0x99b4c7d2 ! 448: PDIST pdistn %d50, %d18, %d12 jmptr_8_394: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 cmp_8_395: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_395: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_395 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_395: brnz,a %r10, cmp_wait8_395 ld [%r23], %r10 ba cmp_startwait8_395 mov 0x8, %r10 continue_cmp_8_395: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_395 mov 0x75, %r17 best_set_reg(0x570b3198dabf2b8a, %r16, %r17) cmp_multi_core_8_395: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe11fe0e0 ! 450: LDDF_I ldd [%r31, 0x00e0], %f16 memptr_8_396: set user_data_start, %r31 .word 0x8582bde9 ! 451: WRCCR_I wr %r10, 0x1de9, %ccr cancelint_8_397: rdhpr %halt, %r8 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_8_398: nop nop ta T_CHANGE_HPRIV set 0x73372cdc, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 453: FBPULE fbule brcommon2_8_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd7150010 ! 1: LDQF_R - [%r20, %r16], %f11 ba,a .+8 jmpl %r27-0, %r27 .word 0xe19fde00 ! 454: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_400: ta T_CHANGE_NONHPRIV ! macro frzptr_8_401: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdb40 ! 456: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_402), 16, 16)) -> intp(mask2tid(0x8),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,664,*,*,1) xir_8_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_402: and %g1, 2, %g1 brnz,a %g1, xirwait_8_402 ldx [%r17], %g1 xir_8_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8470ce ! 457: WR_CLEAR_SOFTINT_I wr %r17, 0x10ce, %clear_softint brcommon3_8_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e060 ! 1: STQF_I - %f10, [0x0060, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r12, [%r0] ASI_LSU_CONTROL .word 0x93aac82a ! 458: FMOVGE fmovs %fcc1, %f10, %f9 splash_tba_8_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tick_8_405: nop nop ta T_CHANGE_HPRIV best_set_reg(0x5cf9adfcf2c2a92f, %r16, %r17) .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_8_406: .word 0x32800001 ! 1: BNE bne,a .word 0xa77ca5bc ! Random illegal ? .word 0xa1a409c8 ! 1: FDIVd fdivd %f16, %f8, %f16 .word 0x9ba44830 ! 461: FADDs fadds %f17, %f16, %f13 .word 0x9f803b39 ! 462: SIR sir 0x1b39 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_407)+8 , 16, 16)) -> intp(7,0,23,*,920,*,ff,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_407)&0xffffffff)+8 , 16, 16)) -> intp(1,0,12,*,680,*,ff,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983c57 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c57, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_8_408: set user_data_start, %o7 .word 0x93902002 ! 464: WRPR_CWP_I wrpr %r0, 0x0002, %cwp cancelint_8_409: rdhpr %halt, %r20 .word 0x85880000 ! 465: ALLCLEAN splash_tba_8_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe88008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 pmu_8_411: nop nop ta T_CHANGE_PRIV setx 0xffffffb5ffffffa4, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_8_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_8_413: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe1b0 ! 1: STXFSR_I st-sfr %f1, [0x01b0, %r31] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdb40 ! 471: LDDFA_R ldda [%r31, %r0], %f16 mondo_8_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3c0] %asi stxa %r12, [%r0+0x3e0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d92800a ! 472: WRPR_WSTATE_R wrpr %r10, %r10, %wstate mondo_8_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3e8] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d944012 ! 473: WRPR_WSTATE_R wrpr %r17, %r18, %wstate .word 0xa9b1c492 ! 474: FCMPLE32 fcmple32 %d38, %d18, %r20 mondo_8_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d94c004 ! 475: WRPR_WSTATE_R wrpr %r19, %r4, %wstate cancelint_8_418: rdhpr %halt, %r19 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_419), 16, 16)) -> intp(mask2tid(0x8),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,712,*,*,1) xir_8_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_419: and %g1, 2, %g1 brnz,a %g1, xirwait_8_419 ldx [%r17], %g1 xir_8_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81ec86 ! 477: WR_CLEAR_SOFTINT_I wr %r7, 0x0c86, %clear_softint jmptr_8_420: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_421: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_421) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1016,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_421: wrhpr %g0, 0x4c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 479: RDPC rd %pc, %r18 fpinit_8_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 480: FCMPd fcmpd %fcc, %f0, %f4 .word 0xe33fe020 ! 481: STDF_I std %f17, [0x0020, %r31] splash_tba_8_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_8_425: nop nop setx 0xffffffb4ffffffa1, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe0b5 ! 484: STDA_I stda %r17, [%r31 + 0x00b5] %asi splash_lsu_8_426: nop nop ta T_CHANGE_HPRIV set 0xa9a7001b, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 485: FBPULE fbule splash_tick_8_427: nop nop ta T_CHANGE_HPRIV best_set_reg(0xcf229201f1cade07, %r16, %r17) .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e150 ! 487: STQF_I - %f17, [0x0150, %r31] frzptr_8_428: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe26fe150 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0150] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdd40 ! 488: STDFA_R stda %f0, [%r0, %r31] brcommon3_8_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e1e0 ! 1: STQF_I - %f17, [0x01e0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 489: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_430: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_430) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,944,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_430: wrhpr %g0, 0xdb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 490: RDPC rd %pc, %r20 cmp_8_431: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_431: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_431 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_431: brnz,a %r10, cmp_wait8_431 ld [%r23], %r10 ba cmp_startwait8_431 mov 0x8, %r10 continue_cmp_8_431: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_431 mov 0x7c, %r17 best_set_reg(0xe401139d6b21d4dc, %r16, %r17) cmp_multi_core_8_431: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x7c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe91fe050 ! 491: LDDF_I ldd [%r31, 0x0050], %f20 cmp_8_432: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_432: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_432 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_432: brnz,a %r10, cmp_wait8_432 ld [%r23], %r10 ba cmp_startwait8_432 mov 0x8, %r10 continue_cmp_8_432: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_432 mov 54, %r17 best_set_reg(0xb076db0f0e0fa508, %r16, %r17) cmp_multi_core_8_432: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x880, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe93fe0c0 ! 492: STDF_I std %f20, [0x00c0, %r31] nop nop mov 0x0, %r18 splash_cmpr_8_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_434) , 16, 16)) -> intp(2,0,10,*,912,*,f8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_434)&0xffffffff) , 16, 16)) -> intp(7,0,10,*,976,*,f8,1) #else set 0x38804bc2, %r28 !TTID : 3 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_434: .word 0x9f8023df ! 494: SIR sir 0x03df splash_tick_8_435: nop nop ta T_CHANGE_HPRIV best_set_reg(0xa10e487c23cf1389, %r16, %r17) .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_8_436: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fde20 ! 496: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_437: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_437) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,936,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_437: wrhpr %g0, 0x69a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 497: RDPC rd %pc, %r11 splash_tba_8_438: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_8_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3e0] %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948005 ! 499: WRPR_WSTATE_R wrpr %r18, %r5, %wstate brcommon2_8_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x97a00554 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 500: BN bn,a cmp_8_441: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_441: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_441 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_441: brnz,a %r10, cmp_wait8_441 ld [%r23], %r10 ba cmp_startwait8_441 mov 0x8, %r10 continue_cmp_8_441: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_441 mov 0xac, %r17 best_set_reg(0x5f35c0a7bbd295a3, %r16, %r17) cmp_multi_core_8_441: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91910009 ! 501: WRPR_PIL_R wrpr %r4, %r9, %pil ibp_8_442: nop nop .word 0xd7e7c080 ! 502: CASA_I casa [%r31] 0x 4, %r0, %r11 cwp_8_443: set user_data_start, %o7 .word 0x93902001 ! 503: WRPR_CWP_I wrpr %r0, 0x0001, %cwp cancelint_8_444: rdhpr %halt, %r12 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e025 ! 505: STF_I st %f9, [0x0025, %r31] brcommon3_8_445: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe0e0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00e0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800002 ! 506: BN bn,a splash_tba_8_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x5c20887f, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8036f5 ! 1: SIR sir 0x16f5 intvec_8_447: .word 0xa1b0c4d2 ! 508: FCMPNE32 fcmpne32 %d34, %d18, %r16 intveclr_8_448: nop nop ta T_CHANGE_HPRIV setx 0x7985107809185102, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x7db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 509: FBPLG fblg memptr_8_449: set 0x60140000, %r31 .word 0x858130fe ! 510: WRCCR_I wr %r4, 0x10fe, %ccr nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_8 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_450: wrhpr %g0, 0x61b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c400 ! 511: CASA_I casa [%r31] 0x20, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_451: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_451) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,704,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_451: wrhpr %g0, 0x10a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 512: RDPC rd %pc, %r20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_452) , 16, 16)) -> intp(6,0,21,*,720,*,cb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_452)&0xffffffff) , 16, 16)) -> intp(4,0,13,*,712,*,cb,1) #else set 0xc2f0b6a9, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9ba109c3 ! 1: FDIVd fdivd %f4, %f34, %f44 intvec_8_452: .word 0x99a449c3 ! 513: FDIVd fdivd %f48, %f34, %f12 nop nop set 0x6e10f5d3, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_453: .word 0x9f80294b ! 514: SIR sir 0x094b nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_454)+8 , 16, 16)) -> intp(6,0,19,*,936,*,fa,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_454)&0xffffffff)+8 , 16, 16)) -> intp(7,0,19,*,984,*,fa,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983d05 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1d05, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_8_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e8] %asi stxa %r9, [%r0+0x3d8] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d94c008 ! 516: WRPR_WSTATE_R wrpr %r19, %r8, %wstate pmu_8_456: nop nop setx 0xffffffb4ffffffa5, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_8_457: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e020 ! 1: STQF_I - %f9, [0x0020, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd3e7d920 ! 518: CASA_I casa [%r31] 0xc9, %r0, %r9 pmu_8_458: nop nop ta T_CHANGE_PRIV setx 0xffffffbeffffffa0, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xe89024fd, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa5b0c4c6 ! 1: FCMPNE32 fcmpne32 %d34, %d6, %r18 intvec_8_459: .word 0x39400001 ! 520: FBPUGE fbuge,a,pn %fcc0, .word 0xd6dfc2e0 ! 521: LDXA_R ldxa [%r31, %r0] 0x17, %r11 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_461: ta T_CHANGE_NONHPRIV ! macro .word 0xa7a4c9c5 ! 523: FDIVd fdivd %f50, %f36, %f50 nop nop mov 0x1, %r18 splash_cmpr_8_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_463)+8 , 16, 16)) -> intp(4,0,3,*,928,*,9b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_463)&0xffffffff)+8 , 16, 16)) -> intp(0,0,5,*,960,*,9b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 .word 0xe1bfdb40 ! 525: STDFA_R stda %f16, [%r0, %r31] br_longdelay3_8_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8d90291d ! 526: WRPR_PSTATE_I wrpr %r0, 0x091d, %pstate frzptr_8_466: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfde00 ! 527: STDFA_R stda %f16, [%r0, %r31] cmp_8_467: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_467: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_467 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_467: brnz,a %r10, cmp_wait8_467 ld [%r23], %r10 ba cmp_startwait8_467 mov 0x8, %r10 continue_cmp_8_467: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_467 mov 0x4e, %r17 best_set_reg(0x61016b4aed60ae97, %r16, %r17) cmp_multi_core_8_467: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91a00160 ! 528: FABSq dis not found .word 0x81982197 ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x0197, %hpstate .word 0x26800001 ! 1: BL bl,a .word 0x8d9027c2 ! 530: WRPR_PSTATE_I wrpr %r0, 0x07c2, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x2ccc0001 ! 1: BRGZ brgz,a,pt %r16, .word 0x8d903473 ! 532: WRPR_PSTATE_I wrpr %r0, 0x1473, %pstate brcommon3_8_471: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e1c0 ! 1: STQF_I - %f8, [0x01c0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd11fe140 ! 533: LDDF_I ldd [%r31, 0x0140], %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_472) , 16, 16)) -> intp(0,0,18,*,960,*,8a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_472)&0xffffffff) , 16, 16)) -> intp(0,0,0,*,936,*,8a,1) #else set 0x7e10d4f3, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_472: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 534: FBPUGE fbuge .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] cmp_8_473: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_473: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_473 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_473: brnz,a %r10, cmp_wait8_473 ld [%r23], %r10 ba cmp_startwait8_473 mov 0x8, %r10 continue_cmp_8_473: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_473 mov 0x73, %r17 best_set_reg(0x2c6604aa1f4d7dc9, %r16, %r17) cmp_multi_core_8_473: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x3d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe71fe190 ! 536: LDDF_I ldd [%r31, 0x0190], %f19 jmptr_8_474: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_8_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_475-donret_8_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0037c700 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x179e, %htstate best_set_reg(0x171, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) done .align 2048 donretarg_8_475: .word 0x8d903405 ! 538: WRPR_PSTATE_I wrpr %r0, 0x1405, %pstate trapasi_8_476: nop mov 0x3d0, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_477), 16, 16)) -> intp(mask2tid(0x8),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,952,*,*,1) xir_8_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_477: and %g1, 2, %g1 brnz,a %g1, xirwait_8_477 ldx [%r17], %g1 xir_8_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80f01f ! 540: WR_CLEAR_SOFTINT_I wr %r3, 0x101f, %clear_softint .word 0x3e800001 ! 1: BVC bvc,a .word 0x8d903235 ! 541: WRPR_PSTATE_I wrpr %r0, 0x1235, %pstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_479: wrhpr %g0, 0x488, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c720 ! 542: CASA_I casa [%r31] 0x39, %r0, %r19 mondo_8_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d91c012 ! 543: WRPR_WSTATE_R wrpr %r7, %r18, %wstate .word 0xa7520000 ! 544: RDPR_PIL .word 0xe11fe050 ! 545: LDDF_I ldd [%r31, 0x0050], %f16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_482: ta T_CHANGE_NONPRIV ! macro cancelint_8_483: rdhpr %halt, %r19 .word 0x85880000 ! 547: ALLCLEAN splash_tba_8_484: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_8_485: nop nop ta T_CHANGE_HPRIV mov 0xb2a, %r20 mov 0xc, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xa51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fda60 ! 549: LDDA_R ldda [%r31, %r0] 0xd3, %r16 splash_tick_8_486: nop nop ta T_CHANGE_HPRIV best_set_reg(0x040dcbac71fff961, %r16, %r17) .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick splash_tick_8_487: nop nop ta T_CHANGE_HPRIV best_set_reg(0xd77175d214a7bc36, %r16, %r17) .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_8_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x6d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe1c8 ! 552: LDD_I ldd [%r31 + 0x01c8], %r19 mondo_8_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d92c014 ! 553: WRPR_WSTATE_R wrpr %r11, %r20, %wstate .word 0x9f8031fd ! 554: SIR sir 0x11fd .word 0xc19fde00 ! 555: LDDFA_R ldda [%r31, %r0], %f0 memptr_8_491: set 0x60540000, %r31 .word 0x8584b0f1 ! 556: WRCCR_I wr %r18, 0x10f1, %ccr nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_492: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_492) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,752,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_492: wrhpr %g0, 0x58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 557: RDPC rd %pc, %r8 ibp_8_493: nop nop wrhpr %g0, 0xed1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fe130 ! 558: STXFSR_I st-sfr %f1, [0x0130, %r31] .word 0x08800001 ! 559: BLEU bleu .word 0xe19fdf20 ! 560: LDDFA_R ldda [%r31, %r0], %f16 ibp_8_495: nop nop wrhpr %g0, 0x2c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800002 ! 561: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_496) , 16, 16)) -> intp(4,0,24,*,752,*,bb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_496)&0xffffffff) , 16, 16)) -> intp(1,0,20,*,984,*,bb,1) #else set 0xcb603fdf, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_496: .word 0x9f802fbe ! 562: SIR sir 0x0fbe frzptr_8_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 563: BN bn,a memptr_8_498: set user_data_start, %r31 .word 0x8582abf2 ! 564: WRCCR_I wr %r10, 0x0bf2, %ccr .word 0xa5a489cb ! 565: FDIVd fdivd %f18, %f42, %f18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_500) , 16, 16)) -> intp(1,0,26,*,744,*,ba,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_500)&0xffffffff) , 16, 16)) -> intp(4,0,29,*,728,*,ba,1) #else set 0xccb0ae45, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_500: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8025d6 ! 566: SIR sir 0x05d6 jmptr_8_501: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_502: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_502) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,744,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_502: wrhpr %g0, 0x65a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 568: RDPC rd %pc, %r20 nop nop ta T_CHANGE_HPRIV ! macro donret_8_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_503-donret_8_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00117c00 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1ede, %htstate best_set_reg(0x979, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) done donretarg_8_503: .word 0xa9a409c2 ! 569: FDIVd fdivd %f16, %f2, %f20 frzptr_8_504: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0x9f802d13 ! 571: SIR sir 0x0d13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_505), 16, 16)) -> intp(mask2tid(0x8),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,672,*,*,1) xir_8_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_505: and %g1, 2, %g1 brnz,a %g1, xirwait_8_505 ldx [%r17], %g1 xir_8_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8463c2 ! 572: WR_CLEAR_SOFTINT_I wr %r17, 0x03c2, %clear_softint frzptr_8_506: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 573: BN bn,a cancelint_8_507: rdhpr %halt, %r18 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_508) , 16, 16)) -> intp(0,0,11,*,896,*,4e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_508)&0xffffffff) , 16, 16)) -> intp(4,0,2,*,896,*,4e,1) #else set 0xd9a0bcbf, %r28 !TTID : 4 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_508: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x91b2c4d4 ! 575: FCMPNE32 fcmpne32 %d42, %d20, %r8 cancelint_8_509: rdhpr %halt, %r12 .word 0x85880000 ! 576: ALLCLEAN .word 0x9f80358f ! 577: SIR sir 0x158f .word 0x8790215e ! 578: WRPR_TT_I wrpr %r0, 0x015e, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_511), 16, 16)) -> intp(mask2tid(0x8),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1016,*,*,1) xir_8_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_511: and %g1, 2, %g1 brnz,a %g1, xirwait_8_511 ldx [%r17], %g1 xir_8_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab827214 ! 579: WR_CLEAR_SOFTINT_I wr %r9, 0x1214, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_512) , 16, 16)) -> intp(5,0,17,*,720,*,48,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_512)&0xffffffff) , 16, 16)) -> intp(6,0,12,*,912,*,48,1) #else set 0x4ea08262, %r28 !TTID : 2 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_512: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x91a509d0 ! 580: FDIVd fdivd %f20, %f16, %f8 brcommon3_8_513: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9037dd ! 581: WRPR_PSTATE_I wrpr %r0, 0x17dd, %pstate .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_8_514: ta T_CHANGE_NONHPRIV ! macro cmp_8_515: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_515: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_515 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_515: brnz,a %r10, cmp_wait8_515 ld [%r23], %r10 ba cmp_startwait8_515 mov 0x8, %r10 continue_cmp_8_515: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_515 mov 0x46, %r17 best_set_reg(0x0184af9a3a73d374, %r16, %r17) cmp_multi_core_8_515: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x150, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe697c400 ! 583: LDUHA_R lduha [%r31, %r0] 0x20, %r19 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_516: wrhpr %g0, 0x810, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c240 ! 584: CASA_I casa [%r31] 0x12, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_517: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_517) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,928,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_517: wrhpr %g0, 0x42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 585: RDPC rd %pc, %r8 cancelint_8_518: rdhpr %halt, %r11 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_519: wrhpr %g0, 0xbc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d140 ! 587: CASA_I casa [%r31] 0x8a, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_520: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_520) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,736,*,*,1)') ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_520: wrhpr %g0, 0x6c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 588: RDPC rd %pc, %r20 splash_tick_8_521: nop nop ta T_CHANGE_HPRIV best_set_reg(0x5e967bc76fe18179, %r16, %r17) .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d903b34 ! 590: WRPR_PSTATE_I wrpr %r0, 0x1b34, %pstate br_badelay2_8_523: .word 0x32800001 ! 1: BNE bne,a pdist %f26, %f4, %f12 .word 0x9bb5030d ! 591: ALIGNADDRESS alignaddr %r20, %r13, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_524) , 16, 16)) -> intp(4,0,22,*,1000,*,ad,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_524)&0xffffffff) , 16, 16)) -> intp(5,0,18,*,760,*,ad,1) #else set 0x690804f, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa3b184d1 ! 1: FCMPNE32 fcmpne32 %d6, %d48, %r17 intvec_8_524: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa5b504cb ! 592: FCMPNE32 fcmpne32 %d20, %d42, %r18 nop nop mov 0x1, %r18 splash_cmpr_8_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_525)+8 , 16, 16)) -> intp(3,0,7,*,912,*,7d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_525)&0xffffffff)+8 , 16, 16)) -> intp(5,0,7,*,904,*,7d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 593: SIAM siam 1 memptr_8_526: set 0x60340000, %r31 .word 0x858378cb ! 594: WRCCR_I wr %r13, 0x18cb, %ccr frzptr_8_527: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 595: BN bn .word 0xe5e7dd40 ! 596: CASA_I casa [%r31] 0xea, %r0, %r18 splash_hpstate_8_529: .word 0x1c800001 ! 1: BPOS bpos .word 0x8198274c ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x074c, %hpstate .word 0xe527e1e5 ! 598: STF_I st %f18, [0x01e5, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_530), 16, 16)) -> intp(mask2tid(0x8),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) xir_8_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_530: and %g1, 2, %g1 brnz,a %g1, xirwait_8_530 ldx [%r17], %g1 xir_8_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84aee0 ! 599: WR_CLEAR_SOFTINT_I wr %r18, 0x0ee0, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_8_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_531-donret_8_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00bc0f00 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x455, %htstate best_set_reg(0x540, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) ldx [%r11+%r0], %g1 done donretarg_8_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819823d6 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x03d6, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x1ba035a2, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_533: .word 0x39400001 ! 602: FBPUGE fbuge,a,pn %fcc0, splash_hpstate_8_534: .word 0x0e800001 ! 1: BVS bvs .word 0x81982c84 ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x0c84, %hpstate .word 0x87aa8a52 ! 604: FCMPd fcmpd %fcc, %f10, %f18 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_536), 16, 16)) -> intp(mask2tid(0x8),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,680,*,*,1) xir_8_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_536: and %g1, 2, %g1 brnz,a %g1, xirwait_8_536 ldx [%r17], %g1 xir_8_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a984 ! 605: WR_CLEAR_SOFTINT_I wr %r2, 0x0984, %clear_softint mondo_8_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3d0] %asi stxa %r3, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d92c00b ! 606: WRPR_WSTATE_R wrpr %r11, %r11, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_538) , 16, 16)) -> intp(3,0,25,*,928,*,8c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_538)&0xffffffff) , 16, 16)) -> intp(3,0,25,*,672,*,8c,1) #else set 0x37906f05, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_538: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8022cd ! 607: SIR sir 0x02cd nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_539: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_539) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,760,*,*,1)') ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_539: wrhpr %g0, 0xb0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 608: RDPC rd %pc, %r11 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_540) , 16, 16)) -> intp(5,0,26,*,744,*,e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_540)&0xffffffff) , 16, 16)) -> intp(1,0,7,*,1000,*,e,1) #else set 0xc8400e8d, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_540: .word 0x91a249c1 ! 609: FDIVd fdivd %f40, %f32, %f8 nop nop ta T_CHANGE_HPRIV ! macro donret_8_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_541-donret_8_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00ac3400 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f5, %htstate best_set_reg(0xd8b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) done donretarg_8_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_8 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_542: wrhpr %g0, 0x85a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c180 ! 611: CASA_I casa [%r31] 0x c, %r0, %r8 ibp_8_543: nop nop wrhpr %g0, 0x553, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800001 ! 612: BN bn .word 0x8d9039ed ! 613: WRPR_PSTATE_I wrpr %r0, 0x19ed, %pstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_8 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_545: wrhpr %g0, 0x512, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 614: CASA_I casa [%r31] 0x8a, %r0, %r8 jmptr_8_546: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0x93b40492 ! 616: FCMPLE32 fcmple32 %d16, %d18, %r9 .word 0xe737e0e0 ! 617: STQF_I - %f19, [0x00e0, %r31] .word 0x3a780001 ! 618: BPCC ibp_8_548: nop nop wrhpr %g0, 0x9c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdb20 ! 619: LDDFA_R ldda [%r31, %r0], %f0 .word 0x93b2c7c9 ! 620: PDIST pdistn %d42, %d40, %d40 cmp_8_550: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_550: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_550 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_550: brnz,a %r10, cmp_wait8_550 ld [%r23], %r10 ba cmp_startwait8_550 mov 0x8, %r10 continue_cmp_8_550: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_550 mov 14, %r17 best_set_reg(0x9008e7a9d707b5e0, %r16, %r17) cmp_multi_core_8_550: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xda9fc540 ! 621: LDDA_R ldda [%r31, %r0] 0x2a, %r13 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_551: wrhpr %g0, 0xb13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7dc40 ! 622: CASA_I casa [%r31] 0xe2, %r0, %r13 mondo_8_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d94c010 ! 623: WRPR_WSTATE_R wrpr %r19, %r16, %wstate intveclr_8_553: nop nop ta T_CHANGE_HPRIV setx 0xab654a8c2fca8d21, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400002 ! 624: FBPLG fblg splash_tba_8_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_555: wrhpr %g0, 0x642, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d000 ! 626: CASA_I casa [%r31] 0x80, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_556) , 16, 16)) -> intp(2,0,16,*,1008,*,f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_556)&0xffffffff) , 16, 16)) -> intp(6,0,27,*,944,*,f,1) #else set 0x79c05f42, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_556: .word 0x9f802ee6 ! 627: SIR sir 0x0ee6 mondo_8_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r1, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d924008 ! 628: WRPR_WSTATE_R wrpr %r9, %r8, %wstate splash_tick_8_558: nop nop ta T_CHANGE_HPRIV best_set_reg(0x3e18fcfd82247f68, %r16, %r17) .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0x7d50edf4, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_559: .word 0x9f8022d8 ! 630: SIR sir 0x02d8 frzptr_8_560: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 631: BN bn,a splash_tba_8_561: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_8_562: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_563: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_563) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,936,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_563: wrhpr %g0, 0x790, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 634: RDPC rd %pc, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_564), 16, 16)) -> intp(mask2tid(0x8),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,704,*,*,1) xir_8_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_564: and %g1, 2, %g1 brnz,a %g1, xirwait_8_564 ldx [%r17], %g1 xir_8_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a474 ! 635: WR_CLEAR_SOFTINT_I wr %r2, 0x0474, %clear_softint ibp_8_565: nop nop wrhpr %g0, 0xc81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe71fe190 ! 636: LDDF_I ldd [%r31, 0x0190], %f19 .word 0x91a489a1 ! 637: FDIVs fdivs %f18, %f1, %f8 splash_lsu_8_567: nop nop ta T_CHANGE_HPRIV set 0xc1f35e6d, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_8_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa7a00544 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0x81b7c7c0 ! 639: PDIST pdistn %d62, %d0, %d0 nop nop set 0xb1a0c095, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803625 ! 1: SIR sir 0x1625 intvec_8_569: .word 0x39400001 ! 640: FBPUGE fbuge,a,pn %fcc0, cmp_8_570: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_570: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_570 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_570: brnz,a %r10, cmp_wait8_570 ld [%r23], %r10 ba cmp_startwait8_570 mov 0x8, %r10 continue_cmp_8_570: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_570 mov 0xc7, %r17 best_set_reg(0x7b5facf60ac608e7, %r16, %r17) cmp_multi_core_8_570: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x742, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91910012 ! 641: WRPR_PIL_R wrpr %r4, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_571: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_571) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,728,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_571: wrhpr %g0, 0xcd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 642: RDPC rd %pc, %r12 .word 0xd33fe11e ! 643: STDF_I std %f9, [0x011e, %r31] .word 0xc19fdc00 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_572), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,656,*,*,1) xir_8_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_572: and %g1, 2, %g1 brnz,a %g1, xirwait_8_572 ldx [%r17], %g1 xir_8_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81fa6d ! 645: WR_CLEAR_SOFTINT_I wr %r7, 0x1a6d, %clear_softint .word 0xc19fdb40 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x7b507510, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa1b104d4 ! 1: FCMPNE32 fcmpne32 %d4, %d20, %r16 intvec_8_573: .word 0xa9b404cd ! 647: FCMPNE32 fcmpne32 %d16, %d44, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_574), 16, 16)) -> intp(mask2tid(0x8),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,976,*,*,1) xir_8_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_574: and %g1, 2, %g1 brnz,a %g1, xirwait_8_574 ldx [%r17], %g1 xir_8_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84adeb ! 648: WR_CLEAR_SOFTINT_I wr %r18, 0x0deb, %clear_softint ibp_8_575: nop nop wrhpr %g0, 0x293, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdadfc180 ! 649: LDXA_R ldxa [%r31, %r0] 0x0c, %r13 splash_tba_8_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_8_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3c0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d91c00c ! 651: WRPR_WSTATE_R wrpr %r7, %r12, %wstate cmp_8_578: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_578: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_578 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_578: brnz,a %r10, cmp_wait8_578 ld [%r23], %r10 ba cmp_startwait8_578 mov 0x8, %r10 continue_cmp_8_578: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_578 mov 20, %r17 best_set_reg(0xffd8711dbae87f09, %r16, %r17) cmp_multi_core_8_578: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xda3fe1e0 ! 652: STD_I std %r13, [%r31 + 0x01e0] splash_tba_8_579: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_8_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0x311, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe1bd ! 654: LDD_I ldd [%r31 + 0x01bd], %r13 splash_tick_8_581: nop nop ta T_CHANGE_HPRIV best_set_reg(0x1777d37498125cb3, %r16, %r17) .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_8_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3d0] %asi stxa %r11, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d944004 ! 656: WRPR_WSTATE_R wrpr %r17, %r4, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_583), 16, 16)) -> intp(mask2tid(0x8),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,680,*,*,1) xir_8_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_583: and %g1, 2, %g1 brnz,a %g1, xirwait_8_583 ldx [%r17], %g1 xir_8_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81eb3a ! 657: WR_CLEAR_SOFTINT_I wr %r7, 0x0b3a, %clear_softint demap_8_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x5f .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0xe10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe169 ! 658: LDD_I ldd [%r31 + 0x0169], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] .word 0xa5b24332 ! 660: BMASK bmask %r9, %r18, %r18 dvapa_8_586: nop nop ta T_CHANGE_HPRIV mov 0x92b, %r20 mov 0x14, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fc2c0 ! 661: LDDA_R ldda [%r31, %r0] 0x16, %r0 frzptr_8_587: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 662: BN bn,a frzptr_8_588: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_589), 16, 16)) -> intp(mask2tid(0x8),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,648,*,*,1) xir_8_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_589: and %g1, 2, %g1 brnz,a %g1, xirwait_8_589 ldx [%r17], %g1 xir_8_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e30b ! 664: WR_CLEAR_SOFTINT_I wr %r19, 0x030b, %clear_softint .word 0x977023a8 ! 665: POPC_I popc 0x03a8, %r11 .word 0xd8bfe071 ! 666: STDA_I stda %r12, [%r31 + 0x0071] %asi frzptr_8_590: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdb20 ! 667: STDFA_R stda %f16, [%r0, %r31] mondo_8_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3d0] %asi stxa %r7, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d90c014 ! 668: WRPR_WSTATE_R wrpr %r3, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_592: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_592) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,968,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_592: wrhpr %g0, 0xe89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 669: RDPC rd %pc, %r11 pmu_8_593: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffa6, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f803f90 ! 671: SIR sir 0x1f90 mondo_8_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi stxa %r3, [%r0+0x3e0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d908010 ! 672: WRPR_WSTATE_R wrpr %r2, %r16, %wstate jmptr_8_595: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_596)+8 , 16, 16)) -> intp(7,0,10,*,944,*,dc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_596)&0xffffffff)+8 , 16, 16)) -> intp(0,0,7,*,640,*,dc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982cc5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0cc5, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_597), 16, 16)) -> intp(mask2tid(0x8),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,992,*,*,1) xir_8_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_597: and %g1, 2, %g1 brnz,a %g1, xirwait_8_597 ldx [%r17], %g1 xir_8_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817b59 ! 675: WR_CLEAR_SOFTINT_I wr %r5, 0x1b59, %clear_softint .word 0xe927e176 ! 676: STF_I st %f20, [0x0176, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_598) , 16, 16)) -> intp(4,0,1,*,736,*,2c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_598)&0xffffffff) , 16, 16)) -> intp(0,0,7,*,992,*,2c,1) #else set 0xb900deae, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_8_598: .word 0x95b144d4 ! 677: FCMPNE32 fcmpne32 %d36, %d20, %r10 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_8 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_599: wrhpr %g0, 0x30a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d160 ! 678: CASA_I casa [%r31] 0x8b, %r0, %r13 frzptr_8_600: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe080 ! 1: STXFSR_I st-sfr %f1, [0x0080, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdc00 ! 679: LDDFA_R ldda [%r31, %r0], %f16 .word 0x87ac0a4b ! 680: FCMPd fcmpd %fcc, %f16, %f42 nop nop mov 0x1, %r18 splash_cmpr_8_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_602)+8 , 16, 16)) -> intp(7,0,3,*,696,*,9d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_602)&0xffffffff)+8 , 16, 16)) -> intp(6,0,16,*,912,*,9d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 681: SIAM siam 1 demap_8_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x500, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe102 ! 682: LDD_I ldd [%r31 + 0x0102], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_8_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_604-donret_8_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x009d0b00 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x94f, %htstate wrhpr %g0, 0xf08, %hpstate ! rand=1 (8) .word 0x1f400001 ! 1: FBPO fbo retry donretarg_8_604: .word 0xd66fe141 ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x0141] cmp_8_605: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_605: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_605 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_605: brnz,a %r10, cmp_wait8_605 ld [%r23], %r10 ba cmp_startwait8_605 mov 0x8, %r10 continue_cmp_8_605: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_605 mov 0x56, %r17 best_set_reg(0x2aec9bf943e772b8, %r16, %r17) cmp_multi_core_8_605: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x97a00160 ! 684: FABSq dis not found cmp_8_606: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_606: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_606 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_606: brnz,a %r10, cmp_wait8_606 ld [%r23], %r10 ba cmp_startwait8_606 mov 0x8, %r10 continue_cmp_8_606: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_606 mov 40, %r17 best_set_reg(0xa46698c2904d9b9f, %r16, %r17) cmp_multi_core_8_606: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91940010 ! 685: WRPR_PIL_R wrpr %r16, %r16, %pil nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_8 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_607: wrhpr %g0, 0x700, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7d160 ! 686: CASA_I casa [%r31] 0x8b, %r0, %r11 .word 0xa3b40593 ! 687: FCMPGT32 fcmpgt32 %d16, %d50, %r17 mondo_8_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d940004 ! 688: WRPR_WSTATE_R wrpr %r16, %r4, %wstate cwp_8_609: set user_data_start, %o7 .word 0x93902006 ! 689: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d90353f ! 691: WRPR_PSTATE_I wrpr %r0, 0x153f, %pstate .word 0xe1bfe0a0 ! 692: STDFA_I stda %f16, [0x00a0, %r31] .word 0x0a800002 ! 1: BCS bcs .word 0x8d903a0f ! 693: WRPR_PSTATE_I wrpr %r0, 0x1a0f, %pstate nop nop mov 0x1, %r18 splash_cmpr_8_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_612)+8 , 16, 16)) -> intp(5,0,9,*,896,*,cd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_612)&0xffffffff)+8 , 16, 16)) -> intp(1,0,26,*,904,*,cd,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_8_613: .word 0x81983fcd ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x1fcd, %hpstate .word 0xa7b047d0 ! 696: PDIST pdistn %d32, %d16, %d50 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_615: wrhpr %g0, 0x31a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d100 ! 697: CASA_I casa [%r31] 0x88, %r0, %r16 brcommon2_8_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa7a00554 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0x00800001 ! 698: BN bn .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9b520000 ! 700: RDPR_PIL mondo_8_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3e8] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d920007 ! 701: WRPR_WSTATE_R wrpr %r8, %r7, %wstate .word 0xd49fdd40 ! 702: LDDA_R ldda [%r31, %r0] 0xea, %r10 .word 0xd4800ba0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x5d, %r10 splash_lsu_8_619: nop nop ta T_CHANGE_HPRIV set 0x8f079430, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 704: FBPULE fbule intveclr_8_620: nop nop ta T_CHANGE_HPRIV setx 0x14c4f3be80961015, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_8_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_621-donret_8_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00e32300 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x14eb, %htstate wrhpr %g0, 0x808, %hpstate ! rand=1 (8) .word 0x01400001 ! 1: FBPN fbn done donretarg_8_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_8_622: set user_data_start, %o7 .word 0x93902006 ! 707: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xe1bfdf00 ! 708: STDFA_R stda %f16, [%r0, %r31] frzptr_8_623: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 709: BN bn,a intveclr_8_624: nop nop ta T_CHANGE_HPRIV setx 0x4f61091618920ffc, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x3c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 710: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_625: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_625) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,704,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_625: wrhpr %g0, 0xb10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 711: RDPC rd %pc, %r13 .word 0xe01fe0e0 ! 712: LDD_I ldd [%r31 + 0x00e0], %r16 splash_lsu_8_627: nop nop ta T_CHANGE_HPRIV set 0x78a62dcf, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 713: FBPULE fbule mondo_8_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e0] %asi stxa %r18, [%r0+0x3d8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d94c00d ! 714: WRPR_WSTATE_R wrpr %r19, %r13, %wstate .word 0x8d9020a5 ! 715: WRPR_PSTATE_I wrpr %r0, 0x00a5, %pstate .word 0x9f803b0d ! 716: SIR sir 0x1b0d .word 0xe1e7c2e0 ! 717: CASA_I casa [%r31] 0x17, %r0, %r16 nop nop set 0x5550ed59, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_631: .word 0x9f802972 ! 718: SIR sir 0x0972 .word 0xd71fe190 ! 719: LDDF_I ldd [%r31, 0x0190], %f11 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_633: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_633) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,896,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_633: wrhpr %g0, 0xc91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 720: RDPC rd %pc, %r11 mondo_8_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c0] %asi stxa %r20, [%r0+0x3c8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c009 ! 721: WRPR_WSTATE_R wrpr %r19, %r9, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_635), 16, 16)) -> intp(mask2tid(0x8),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,720,*,*,1) xir_8_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_635: and %g1, 2, %g1 brnz,a %g1, xirwait_8_635 ldx [%r17], %g1 xir_8_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8122a0 ! 722: WR_CLEAR_SOFTINT_I wr %r4, 0x02a0, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_8 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_636: wrhpr %g0, 0xa41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7d060 ! 723: CASA_I casa [%r31] 0x83, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_637: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_637) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,928,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_637: wrhpr %g0, 0x502, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 724: RDPC rd %pc, %r17 jmptr_8_638: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe1bfdb20 ! 726: STDFA_R stda %f16, [%r0, %r31] .word 0xd8800a80 ! 727: LDUWA_R lduwa [%r0, %r0] 0x54, %r12 nop nop mov 0x0, %r18 splash_cmpr_8_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 728: SIAM siam 1 splash_tick_8_641: nop nop ta T_CHANGE_HPRIV best_set_reg(0x616247a3528f1c6e, %r16, %r17) .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x0, %r18 splash_cmpr_8_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 730: SIAM siam 1 cancelint_8_643: rdhpr %halt, %r11 .word 0x85880000 ! 731: ALLCLEAN .word 0xe8bfd000 ! 732: STDA_R stda %r20, [%r31 + %r0] 0x80 splash_hpstate_8_645: .word 0x81983b92 ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x1b92, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_646) , 16, 16)) -> intp(4,0,11,*,896,*,3e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_646)&0xffffffff) , 16, 16)) -> intp(4,0,22,*,672,*,3e,1) #else set 0xff30200e, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_8_646: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7a4c9d4 ! 734: FDIVd fdivd %f50, %f20, %f50 cmp_8_647: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_647: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_647 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_647: brnz,a %r10, cmp_wait8_647 ld [%r23], %r10 ba cmp_startwait8_647 mov 0x8, %r10 continue_cmp_8_647: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_647 mov 0xc2, %r17 best_set_reg(0x302ac15bb4bc3402, %r16, %r17) cmp_multi_core_8_647: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x9194800b ! 735: WRPR_PIL_R wrpr %r18, %r11, %pil br_longdelay1_8_648: .word 0x12800001 ! 1: BNE bne .word 0xbfe7c000 ! 736: SAVE_R save %r31, %r0, %r31 splash_lsu_8_649: nop nop ta T_CHANGE_HPRIV set 0x4aa160d1, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 737: FBPULE fbule,a,pn %fcc0, splash_tba_8_650: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fda60 ! 739: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc19fda00 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_8_651: nop nop ta T_CHANGE_HPRIV setx 0x345b4c16c2baa1ec, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xe1bfc2c0 ! 742: STDFA_R stda %f16, [%r0, %r31] .word 0x8d902635 ! 743: WRPR_PSTATE_I wrpr %r0, 0x0635, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_653), 16, 16)) -> intp(mask2tid(0x8),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,760,*,*,1) xir_8_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_653: and %g1, 2, %g1 brnz,a %g1, xirwait_8_653 ldx [%r17], %g1 xir_8_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8133b6 ! 744: WR_CLEAR_SOFTINT_I wr %r4, 0x13b6, %clear_softint .word 0x87ac0a44 ! 745: FCMPd fcmpd %fcc, %f16, %f4 .word 0xe83fe110 ! 746: STD_I std %r20, [%r31 + 0x0110] nop nop mov 0x1, %r18 splash_cmpr_8_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_656)+8 , 16, 16)) -> intp(3,0,7,*,744,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_656)&0xffffffff)+8 , 16, 16)) -> intp(3,0,29,*,936,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x9191fadd ! 748: WRPR_PIL_I wrpr %r7, 0x1add, %pil mondo_8_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3e0] %asi stxa %r6, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d91c013 ! 749: WRPR_WSTATE_R wrpr %r7, %r19, %wstate splash_tick_8_658: nop nop ta T_CHANGE_HPRIV best_set_reg(0x4eb51ce7515ddba1, %r16, %r17) .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819835c1 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x15c1, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_8_660: rdhpr %halt, %r8 .word 0x85880000 ! 752: ALLCLEAN .word 0x0a780001 ! 753: BPCS .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_8_661: ta T_CHANGE_NONPRIV ! macro frzptr_8_662: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_8_663: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_664)+8 , 16, 16)) -> intp(5,0,0,*,1008,*,9c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_664)&0xffffffff)+8 , 16, 16)) -> intp(7,0,20,*,936,*,9c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982587 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0587, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_8_665: rdhpr %halt, %r20 .word 0x85880000 ! 758: ALLCLEAN intveclr_8_666: nop nop ta T_CHANGE_HPRIV setx 0x7bcd11d9e1e67412, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_8_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d948002 ! 760: WRPR_WSTATE_R wrpr %r18, %r2, %wstate nop nop mov 0x1, %r18 splash_cmpr_8_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_668)+8 , 16, 16)) -> intp(6,0,21,*,648,*,29,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_668)&0xffffffff)+8 , 16, 16)) -> intp(0,0,4,*,936,*,29,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 761: SIAM siam 1 .word 0xd1e7e000 ! 762: CASA_R casa [%r31] %asi, %r0, %r8 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_8 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_670: wrhpr %g0, 0xb52, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c180 ! 763: CASA_I casa [%r31] 0x c, %r0, %r8 ibp_8_671: nop nop .word 0xc32fe090 ! 764: STXFSR_I st-sfr %f1, [0x0090, %r31] mondo_8_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3d0] %asi stxa %r16, [%r0+0x3e8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d94800c ! 765: WRPR_WSTATE_R wrpr %r18, %r12, %wstate cmp_8_673: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_673: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_673 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_673: brnz,a %r10, cmp_wait8_673 ld [%r23], %r10 ba cmp_startwait8_673 mov 0x8, %r10 continue_cmp_8_673: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_673 mov 0xec, %r17 best_set_reg(0x8f92c7ff269f9f4e, %r16, %r17) cmp_multi_core_8_673: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xd03fe020 ! 766: STD_I std %r8, [%r31 + 0x0020] splash_tba_8_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc0bfdb40 ! 768: STDA_R stda %r0, [%r31 + %r0] 0xda .word 0x8d903a42 ! 769: WRPR_PSTATE_I wrpr %r0, 0x1a42, %pstate .word 0xd0bfe0dd ! 770: STDA_I stda %r8, [%r31 + 0x00dd] %asi .word 0xc1bfe060 ! 771: STDFA_I stda %f0, [0x0060, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_677: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_677) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,992,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_677: wrhpr %g0, 0xc11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 772: RDPC rd %pc, %r8 br_badelay2_8_678: .word 0xa1a409c9 ! 1: FDIVd fdivd %f16, %f40, %f16 allclean .word 0xa1b34312 ! 773: ALIGNADDRESS alignaddr %r13, %r18, %r16 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_679: wrhpr %g0, 26, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c280 ! 774: CASA_I casa [%r31] 0x14, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_680), 16, 16)) -> intp(mask2tid(0x8),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,920,*,*,1) xir_8_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_680: and %g1, 2, %g1 brnz,a %g1, xirwait_8_680 ldx [%r17], %g1 xir_8_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab837aef ! 775: WR_CLEAR_SOFTINT_I wr %r13, 0x1aef, %clear_softint splash_lsu_8_681: nop nop ta T_CHANGE_HPRIV set 0x6bc8cf3e, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x24ca4001 ! 1: BRLEZ brlez,a,pt %r9, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 776: FBPULE fbule #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_682), 16, 16)) -> intp(mask2tid(0x8),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,664,*,*,1) xir_8_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_682: and %g1, 2, %g1 brnz,a %g1, xirwait_8_682 ldx [%r17], %g1 xir_8_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab827c00 ! 777: WR_CLEAR_SOFTINT_I wr %r9, 0x1c00, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_683)+8 , 16, 16)) -> intp(0,0,23,*,960,*,fd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_683)&0xffffffff)+8 , 16, 16)) -> intp(5,0,14,*,1008,*,fd,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983e97 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e97, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_8_684: nop nop .word 0xe2dfd100 ! 779: LDXA_R ldxa [%r31, %r0] 0x88, %r17 .word 0x9f803728 ! 780: SIR sir 0x1728 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_685), 16, 16)) -> intp(mask2tid(0x8),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) xir_8_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_685: and %g1, 2, %g1 brnz,a %g1, xirwait_8_685 ldx [%r17], %g1 xir_8_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8378d2 ! 781: WR_CLEAR_SOFTINT_I wr %r13, 0x18d2, %clear_softint .word 0xe19fc2c0 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_686) , 16, 16)) -> intp(2,0,12,*,744,*,ba,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_686)&0xffffffff) , 16, 16)) -> intp(3,0,18,*,936,*,ba,1) #else set 0x43401871, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_686: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803c15 ! 783: SIR sir 0x1c15 .word 0xc1bfdc40 ! 784: STDFA_R stda %f0, [%r0, %r31] brcommon3_8_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e120 ! 1: STQF_I - %f11, [0x0120, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r10, [%r0] ASI_LSU_CONTROL .word 0x93aac82b ! 785: FMOVGE fmovs %fcc1, %f11, %f9 nop nop mov 0x1, %r18 splash_cmpr_8_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_688)+8 , 16, 16)) -> intp(0,0,24,*,992,*,cb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_688)&0xffffffff)+8 , 16, 16)) -> intp(7,0,3,*,952,*,cb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_8_689: nop nop .word 0x00800001 ! 787: BN bn .word 0xe027e11c ! 788: STW_I stw %r16, [%r31 + 0x011c] splash_tba_8_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_691: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_691) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,736,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_691: wrhpr %g0, 0x6d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 790: RDPC rd %pc, %r16 .word 0x87ad0a43 ! 791: FCMPd fcmpd %fcc, %f20, %f34 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_8_693: nop nop ta T_CHANGE_HPRIV setx 0x5c7b36e2cee6cfc5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 793: FBPLG fblg nop nop ta T_CHANGE_HPRIV ! macro donret_8_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_694-donret_8_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x003df100 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1787, %htstate best_set_reg(0x1829, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (8) retry .align 2048 donretarg_8_694: .word 0xa1a109d0 ! 794: FDIVd fdivd %f4, %f16, %f16 nop nop set 0x2570239c, %r28 !TTID : 3 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_695: .word 0x97b4c4d3 ! 795: FCMPNE32 fcmpne32 %d50, %d50, %r11 .word 0xda2fe110 ! 796: STB_I stb %r13, [%r31 + 0x0110] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_696) , 16, 16)) -> intp(3,0,8,*,664,*,af,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_696)&0xffffffff) , 16, 16)) -> intp(1,0,13,*,704,*,af,1) #else set 0x8a9072fa, %r28 !TTID : 2 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_696: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 797: FBPUGE fbuge,a,pn %fcc0, .word 0xa1b2c481 ! 798: FCMPLE32 fcmple32 %d42, %d32, %r16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819827dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07dd, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0xb1a0e781, %r28 !TTID : 7 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_699: .word 0x99b304d4 ! 800: FCMPNE32 fcmpne32 %d12, %d20, %r12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_700), 16, 16)) -> intp(mask2tid(0x8),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,952,*,*,1) xir_8_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_700: and %g1, 2, %g1 brnz,a %g1, xirwait_8_700 ldx [%r17], %g1 xir_8_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80b502 ! 801: WR_CLEAR_SOFTINT_I wr %r2, 0x1502, %clear_softint .word 0xc1bfda60 ! 802: STDFA_R stda %f0, [%r0, %r31] cancelint_8_701: rdhpr %halt, %r9 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x0, %r18 splash_cmpr_8_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_8_703: ta T_CHANGE_NONHPRIV .word 0x81982a4e ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x0a4e, %hpstate .word 0x9f803fce ! 806: SIR sir 0x1fce nop nop mov 0x0, %r18 splash_cmpr_8_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_8 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_705: wrhpr %g0, 0x6c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d000 ! 808: CASA_I casa [%r31] 0x80, %r0, %r18 pmu_8_706: nop nop setx 0xffffffb6ffffffa7, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_8_707: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_8_708: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_709: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_709) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,952,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_709: wrhpr %g0, 0xd83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 812: RDPC rd %pc, %r19 pmu_8_710: nop nop setx 0xffffffb9ffffffae, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xaff01dca, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_711: .word 0x39400002 ! 814: FBPUGE fbuge,a,pn %fcc0, splash_hpstate_8_712: .word 0x81983f4f ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x1f4f, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_8 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_713: wrhpr %g0, 0xe8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c720 ! 816: CASA_I casa [%r31] 0x39, %r0, %r12 brcommon3_8_714: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7c400 ! 1: CASA_I casa [%r31] 0x20, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x81983ecd ! 817: WRHPR_HPSTATE_I wrhpr %r0, 0x1ecd, %hpstate cmp_8_715: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_715: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_715 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_715: brnz,a %r10, cmp_wait8_715 ld [%r23], %r10 ba cmp_startwait8_715 mov 0x8, %r10 continue_cmp_8_715: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_715 mov 0xda, %r17 best_set_reg(0xd219f1b4967509ec, %r16, %r17) cmp_multi_core_8_715: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91944008 ! 818: WRPR_PIL_R wrpr %r17, %r8, %pil mondo_8_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi stxa %r9, [%r0+0x3d8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d924005 ! 819: WRPR_WSTATE_R wrpr %r9, %r5, %wstate nop nop mov 0x0, %r18 splash_cmpr_8_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_718: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_718) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1000,*,*,1)') ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_718: wrhpr %g0, 0x1d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 821: RDPC rd %pc, %r18 nop nop set 0x7ad0cefb, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_8_719: .word 0x39400001 ! 822: FBPUGE fbuge,a,pn %fcc0, splash_lsu_8_720: nop nop ta T_CHANGE_HPRIV set 0xeb9d5b9a, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 823: FBPULE fbule,a,pn %fcc0, .word 0x9f802328 ! 824: SIR sir 0x0328 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_721: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_721) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,904,*,*,1)') ifelse(3,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_721: wrhpr %g0, 0x151, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 825: RDPC rd %pc, %r19 .word 0xe91fe110 ! 826: LDDF_I ldd [%r31, 0x0110], %f20 br_badelay3_8_723: .word 0x14800002 ! 1: BG bg .word 0x22800001 ! 1: BE be,a .word 0xd514c006 ! 1: LDQF_R - [%r19, %r6], %f10 .word 0x91a14822 ! 827: FADDs fadds %f5, %f2, %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_724) , 16, 16)) -> intp(0,0,25,*,656,*,e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_724)&0xffffffff) , 16, 16)) -> intp(6,0,19,*,992,*,e,1) #else set 0x61c0161d, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_724: .word 0x9bb504c5 ! 828: FCMPNE32 fcmpne32 %d20, %d36, %r13 nop nop set 0x1bc05968, %r28 !TTID : 1 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8024bc ! 1: SIR sir 0x04bc intvec_8_725: .word 0x9f802a42 ! 829: SIR sir 0x0a42 cmp_8_726: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_726: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_726 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_726: brnz,a %r10, cmp_wait8_726 ld [%r23], %r10 ba cmp_startwait8_726 mov 0x8, %r10 continue_cmp_8_726: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_726 mov 0xa2, %r17 best_set_reg(0xdd1f2cf04394df1b, %r16, %r17) cmp_multi_core_8_726: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x9191c014 ! 830: WRPR_PIL_R wrpr %r7, %r20, %pil jmptr_8_727: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0x8d903e55 ! 832: WRPR_PSTATE_I wrpr %r0, 0x1e55, %pstate mondo_8_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d928011 ! 833: WRPR_WSTATE_R wrpr %r10, %r17, %wstate ibp_8_730: nop nop .word 0xa3702cc1 ! 834: POPC_I popc 0x0cc1, %r17 cwp_8_731: set user_data_start, %o7 .word 0x93902000 ! 835: WRPR_CWP_I wrpr %r0, 0x0000, %cwp jmptr_8_732: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_8_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3c0] %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948014 ! 837: WRPR_WSTATE_R wrpr %r18, %r20, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_734) , 16, 16)) -> intp(7,0,4,*,648,*,2a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_734)&0xffffffff) , 16, 16)) -> intp(2,0,25,*,704,*,2a,1) #else set 0x1930367c, %r28 !TTID : 6 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_734: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 838: FBPUGE fbuge brcommon3_8_735: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8198265d ! 839: WRHPR_HPSTATE_I wrhpr %r0, 0x065d, %hpstate mondo_8_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d920012 ! 840: WRPR_WSTATE_R wrpr %r8, %r18, %wstate nop nop set 0x420fa8f, %r28 !TTID : 2 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_737: .word 0xa7b0c4d0 ! 841: FCMPNE32 fcmpne32 %d34, %d16, %r19 splash_lsu_8_738: nop nop ta T_CHANGE_HPRIV set 0x5ec2560d, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 842: FBPULE fbule,a,pn %fcc0, mondo_8_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3d8] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d950011 ! 843: WRPR_WSTATE_R wrpr %r20, %r17, %wstate .word 0x2acc4002 ! 1: BRNZ brnz,a,pt %r17, .word 0x8d903715 ! 844: WRPR_PSTATE_I wrpr %r0, 0x1715, %pstate nop nop set 0xa3f0e538, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_741: .word 0x9f802c61 ! 845: SIR sir 0x0c61 mondo_8_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3c0] %asi stxa %r6, [%r0+0x3c0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d948014 ! 846: WRPR_WSTATE_R wrpr %r18, %r20, %wstate trapasi_8_743: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_744: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_744) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,968,*,*,1)') ifelse(6,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_744: wrhpr %g0, 0x111, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 849: RDPC rd %pc, %r16 mondo_8_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi stxa %r2, [%r0+0x3d8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d90c00a ! 850: WRPR_WSTATE_R wrpr %r3, %r10, %wstate .word 0xe19fc3e0 ! 851: LDDFA_R ldda [%r31, %r0], %f16 nop nop mov 0x1, %r18 splash_cmpr_8_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_747)+8 , 16, 16)) -> intp(7,0,6,*,728,*,89,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_747)&0xffffffff)+8 , 16, 16)) -> intp(1,0,23,*,952,*,89,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_8_748: set 0x60540000, %r31 .word 0x85842cfb ! 853: WRCCR_I wr %r16, 0x0cfb, %ccr nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_749: wrhpr %g0, 0xc1b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c3c0 ! 854: CASA_I casa [%r31] 0x1e, %r0, %r18 .word 0x91943dae ! 855: WRPR_PIL_I wrpr %r16, 0x1dae, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_750) , 16, 16)) -> intp(3,0,15,*,952,*,f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_750)&0xffffffff) , 16, 16)) -> intp(1,0,25,*,968,*,f,1) #else set 0x7f60f2e1, %r28 !TTID : 2 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8030ee ! 856: SIR sir 0x10ee nop nop set 0x8780953e, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_751: .word 0xa5b444c1 ! 857: FCMPNE32 fcmpne32 %d48, %d32, %r18 cancelint_8_752: rdhpr %halt, %r13 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_753: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_753) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,952,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_753: wrhpr %g0, 0x9da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 859: RDPC rd %pc, %r20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_754) , 16, 16)) -> intp(4,0,7,*,688,*,b8,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_754)&0xffffffff) , 16, 16)) -> intp(4,0,16,*,992,*,b8,1) #else set 0x74c0801a, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_754: .word 0xa5b1c4c1 ! 860: FCMPNE32 fcmpne32 %d38, %d32, %r18 brcommon3_8_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe1d0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x01d0] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902e8f ! 861: WRPR_PSTATE_I wrpr %r0, 0x0e8f, %pstate nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982db8 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0db8, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_8 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_757: wrhpr %g0, 0xa12, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c2c0 ! 863: CASA_I casa [%r31] 0x16, %r0, %r18 .word 0x879020c5 ! 864: WRPR_TT_I wrpr %r0, 0x00c5, %tt trapasi_8_758: nop mov 0x8, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_8_759: nop nop ta T_CHANGE_HPRIV set 0x09b01e1c, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 866: FBPULE fbule,a,pn %fcc0, .word 0xe477e068 ! 867: STX_I stx %r18, [%r31 + 0x0068] br_badelay2_8_760: .word 0xa3a089d0 ! 1: FDIVd fdivd %f2, %f16, %f48 pdist %f8, %f18, %f8 .word 0x91b2030c ! 868: ALIGNADDRESS alignaddr %r8, %r12, %r8 intveclr_8_761: nop nop ta T_CHANGE_HPRIV setx 0xd38e944284986094, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 869: FBPLG fblg,a,pn %fcc0, .word 0xd4dfc600 ! 870: LDXA_R ldxa [%r31, %r0] 0x30, %r10 .word 0xc19fdd40 ! 871: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_764: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_764) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,760,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_764: wrhpr %g0, 0x5c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 872: RDPC rd %pc, %r16 cmp_8_765: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_765: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_765 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_765: brnz,a %r10, cmp_wait8_765 ld [%r23], %r10 ba cmp_startwait8_765 mov 0x8, %r10 continue_cmp_8_765: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_765 mov 0x4a, %r17 best_set_reg(0x41f9d48508dbe881, %r16, %r17) cmp_multi_core_8_765: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xd83fe0b0 ! 873: STD_I std %r12, [%r31 + 0x00b0] nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_8 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_766: wrhpr %g0, 0x200, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c540 ! 874: CASA_I casa [%r31] 0x2a, %r0, %r12 nop nop set 0x8b006583, %r28 !TTID : 5 (mask2tid(0x8)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x8),`.align 16') stxa %r28, [%g0] 0x73 intvec_8_767: .word 0xa3b144d0 ! 875: FCMPNE32 fcmpne32 %d36, %d16, %r17 brcommon1_8_768: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe1f0 ! 1: STXFSR_I st-sfr %f1, [0x01f0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x87a90a53 ! 876: FCMPd fcmpd %fcc, %f4, %f50 frzptr_8_769: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_8_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd9108003 ! 1: LDQF_R - [%r2, %r3], %f12 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 878: BN bn,a .word 0x93b487c2 ! 879: PDIST pdistn %d18, %d2, %d40 brcommon1_8_772: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0x99702acf ! 880: POPC_I popc 0x0acf, %r12 .word 0xc09fde20 ! 881: LDDA_R ldda [%r31, %r0] 0xf1, %r0 splash_tba_8_774: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_8_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffab, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x2c800001 ! 1: BNEG bneg,a .word 0x8d903ce7 ! 884: WRPR_PSTATE_I wrpr %r0, 0x1ce7, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_777), 16, 16)) -> intp(mask2tid(0x8),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,896,*,*,1) xir_8_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_777: and %g1, 2, %g1 brnz,a %g1, xirwait_8_777 ldx [%r17], %g1 xir_8_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82fbb8 ! 885: WR_CLEAR_SOFTINT_I wr %r11, 0x1bb8, %clear_softint .word 0xd037e04c ! 886: STH_I sth %r8, [%r31 + 0x004c] .word 0xc19fe180 ! 887: LDDFA_I ldda [%r31, 0x0180], %f0 splash_lsu_8_778: nop nop ta T_CHANGE_HPRIV set 0xd3159b99, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2ecc8001 ! 1: BRGEZ brgez,a,pt %r18, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 888: FBPULE fbule brcommon2_8_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa7a0054a ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fc3e0 ! 889: LDDFA_R ldda [%r31, %r0], %f0 mondo_8_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3d8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d914009 ! 890: WRPR_WSTATE_R wrpr %r5, %r9, %wstate nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_781: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_781) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1008,*,*,1)') ifelse(4,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_781: wrhpr %g0, 0xd3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 891: RDPC rd %pc, %r9 .word 0xf16fe021 ! 892: PREFETCH_I prefetch [%r31 + 0x0021], #24 intveclr_8_783: nop nop ta T_CHANGE_HPRIV setx 0x7bd6e37cb2452b2d, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 893: FBPLG fblg jmptr_8_784: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_8_785: set user_data_start, %o7 .word 0x93902007 ! 895: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xd2dfdc40 ! 896: LDXA_R ldxa [%r31, %r0] 0xe2, %r9 pmu_8_787: nop nop setx 0xffffffbdffffffa7, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc1bfda60 ! 898: STDFA_R stda %f0, [%r0, %r31] mondo_8_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3c8] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d948014 ! 899: WRPR_WSTATE_R wrpr %r18, %r20, %wstate mondo_8_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3e8] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d91c013 ! 900: WRPR_WSTATE_R wrpr %r7, %r19, %wstate mondo_8_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3d8] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d92c007 ! 901: WRPR_WSTATE_R wrpr %r11, %r7, %wstate nop nop mov 0x1, %r18 splash_cmpr_8_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_792)+8 , 16, 16)) -> intp(5,0,4,*,680,*,38,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_792)&0xffffffff)+8 , 16, 16)) -> intp(1,0,7,*,696,*,38,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_8_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198261f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x061f, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_8_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e070 ! 1: STQF_I - %f9, [0x0070, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0x93aac832 ! 904: FMOVGE fmovs %fcc1, %f18, %f9 cancelint_8_795: rdhpr %halt, %r19 .word 0x85880000 ! 905: ALLCLEAN pmu_8_796: nop nop setx 0xffffffb0ffffffa6, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_8_797: nop nop ta T_CHANGE_HPRIV setx 0x8fdb832ccae51515, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 907: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_8 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_798: wrhpr %g0, 0xa42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c400 ! 908: CASA_I casa [%r31] 0x20, %r0, %r12 ibp_8_799: nop nop .word 0xa5b34490 ! 909: FCMPLE32 fcmple32 %d44, %d16, %r18 ibp_8_800: nop nop .word 0xe93fe170 ! 910: STDF_I std %f20, [0x0170, %r31] .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xe0bfdd40 ! 912: STDA_R stda %r16, [%r31 + %r0] 0xea brcommon3_8_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe180 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0180] ba,a .+8 jmpl %r27+0, %r27 stxa %r15, [%r0] ASI_LSU_CONTROL .word 0xa9aac830 ! 913: FMOVGE fmovs %fcc1, %f16, %f20 cancelint_8_803: rdhpr %halt, %r20 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_8_804: .word 0x22ca4001 ! 1: BRZ brz,a,pt %r9, .word 0x8198214d ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x014d, %hpstate jmptr_8_805: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_8_806: nop nop .word 0x99702cd3 ! 917: POPC_I popc 0x0cd3, %r12 .word 0xd13fe120 ! 918: STDF_I std %f8, [0x0120, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_808), 16, 16)) -> intp(mask2tid(0x8),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,920,*,*,1) xir_8_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_808: and %g1, 2, %g1 brnz,a %g1, xirwait_8_808 ldx [%r17], %g1 xir_8_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80f2de ! 919: WR_CLEAR_SOFTINT_I wr %r3, 0x12de, %clear_softint .word 0x9f802a67 ! 920: SIR sir 0x0a67 jmptr_8_809: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_8_810: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_8_811: .word 0x81983583 ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x1583, %hpstate ibp_8_812: nop nop .word 0xe19fdd40 ! 924: LDDFA_R ldda [%r31, %r0], %f16 frzptr_8_813: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_8_814: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_8_815: .word 0x2e800001 ! 1: BVS bvs,a .word 0x81983d1f ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x1d1f, %hpstate memptr_8_816: set user_data_start, %r31 .word 0x85852fb1 ! 928: WRCCR_I wr %r20, 0x0fb1, %ccr nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_817: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_817) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,736,*,*,1)') ifelse(5,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_817: wrhpr %g0, 0xe52, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 929: RDPC rd %pc, %r20 .word 0xe1bfdb40 ! 930: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_819: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_819) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,896,*,*,1)') ifelse(1,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_819: wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 931: RDPC rd %pc, %r12 br_badelay1_8_820: .word 0x9bb7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r13 .word 0xd731f97e ! 1: STQF_I - %f11, [0x197e, %r7] .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 normalw .word 0x91458000 ! 932: RD_SOFTINT_REG rd %softint, %r8 fpinit_8_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009c4 ! 933: FDIVd fdivd %f0, %f4, %f8 .word 0x8d90383b ! 934: WRPR_PSTATE_I wrpr %r0, 0x183b, %pstate mondo_8_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c0] %asi stxa %r2, [%r0+0x3d8] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d920006 ! 935: WRPR_WSTATE_R wrpr %r8, %r6, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_8_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_8_824: .word 0x8f902002 ! 937: WRPR_TL_I wrpr %r0, 0x0002, %tl splash_tba_8_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_8_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_826)+8 , 16, 16)) -> intp(6,0,15,*,896,*,b9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_826)&0xffffffff)+8 , 16, 16)) -> intp(6,0,22,*,984,*,b9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819835db ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x15db, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_8_827: nop ta T_CHANGE_PRIV setx 0x00000000003a0000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e118 ! 941: STX_I stx %r16, [%r31 + 0x0118] br_badelay1_8_828: .word 0x07400001 ! 1: FBPUL fbul .word 0x19400001 ! 1: FBPUGE fbuge .word 0xe1e7d100 ! 1: CASA_I casa [%r31] 0x88, %r0, %r16 normalw .word 0x99458000 ! 942: RD_SOFTINT_REG rd %softint, %r12 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_8 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_829: wrhpr %g0, 0x7c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c540 ! 943: CASA_I casa [%r31] 0x2a, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_8_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba cmp_8_831: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_831: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_831 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_831: brnz,a %r10, cmp_wait8_831 ld [%r23], %r10 ba cmp_startwait8_831 mov 0x8, %r10 continue_cmp_8_831: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_831 mov 0xb3, %r17 best_set_reg(0x21102464f457cc2f, %r16, %r17) cmp_multi_core_8_831: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0xe0bfc720 ! 946: STDA_R stda %r16, [%r31 + %r0] 0x39 nop nop ta T_CHANGE_HPRIV mov 0x8, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_8_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_8 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_8_832: wrhpr %g0, 0x7d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c180 ! 947: CASA_I casa [%r31] 0x c, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_833: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_833) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1016,*,*,1)') ifelse(2,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_833: wrhpr %g0, 0xad3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 948: RDPC rd %pc, %r13 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_834) , 16, 16)) -> intp(6,0,31,*,984,*,cc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_834)&0xffffffff) , 16, 16)) -> intp(4,0,31,*,664,*,cc,1) #else set 0xfd306077, %r28 !TTID : 0 (mask2tid(0x8)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_8_834: .word 0x39400001 ! 951: FBPUGE fbuge,a,pn %fcc0, splash_tba_8_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_836), 16, 16)) -> intp(mask2tid(0x8),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,712,*,*,1) xir_8_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_836: and %g1, 2, %g1 brnz,a %g1, xirwait_8_836 ldx [%r17], %g1 xir_8_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816c11 ! 953: WR_CLEAR_SOFTINT_I wr %r5, 0x0c11, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_837), 16, 16)) -> intp(mask2tid(0x8),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x8),1,3,*,936,*,*,1) xir_8_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_8_837: and %g1, 2, %g1 brnz,a %g1, xirwait_8_837 ldx [%r17], %g1 xir_8_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8138dc ! 954: WR_CLEAR_SOFTINT_I wr %r4, 0x18dc, %clear_softint mondo_8_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3e0] %asi stxa %r13, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d92000b ! 955: WRPR_WSTATE_R wrpr %r8, %r11, %wstate pmu_8_839: nop nop setx 0xffffffbbffffffa1, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f80235c ! 957: SIR sir 0x035c nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_840: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_840) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,696,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_840: wrhpr %g0, 0xb90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 958: RDPC rd %pc, %r8 cancelint_8_841: rdhpr %halt, %r12 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe160 ! 960: LDDFA_I ldda [%r31, 0x0160], %f0 nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_842: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_842) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,760,*,*,1)') ifelse(0,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_842: wrhpr %g0, 0xbc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 961: RDPC rd %pc, %r19 intveclr_8_843: nop nop ta T_CHANGE_HPRIV setx 0x2beee8f02ca43826, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 962: FBPLG fblg nop nop mov 0x1, %r18 splash_cmpr_8_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_844)+8 , 16, 16)) -> intp(3,0,27,*,728,*,4d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_844)&0xffffffff)+8 , 16, 16)) -> intp(5,0,19,*,648,*,4d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_8_845: nop nop wrhpr %g0, 0x902, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1b447d3 ! 964: PDIST pdistn %d48, %d50, %d16 frzptr_8_846: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd9e7c2e0 ! 1: CASA_I casa [%r31] 0x17, %r0, %r12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_8_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_8_847)+8 , 16, 16)) -> intp(1,0,20,*,984,*,4f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_8_847)&0xffffffff)+8 , 16, 16)) -> intp(0,0,3,*,912,*,4f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_8_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd8bfd140 ! 968: STDA_R stda %r12, [%r31 + %r0] 0x8a cancelint_8_850: rdhpr %halt, %r17 .word 0x85880000 ! 969: ALLCLEAN cmp_8_851: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_851: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_851 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_851: brnz,a %r10, cmp_wait8_851 ld [%r23], %r10 ba cmp_startwait8_851 mov 0x8, %r10 continue_cmp_8_851: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_851 mov 0x73, %r17 best_set_reg(0x254458495814cf96, %r16, %r17) cmp_multi_core_8_851: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x480, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9191c013 ! 970: WRPR_PIL_R wrpr %r7, %r19, %pil .word 0xc19fe0a0 ! 971: LDDFA_I ldda [%r31, 0x00a0], %f0 .word 0xe277e178 ! 972: STX_I stx %r17, [%r31 + 0x0178] cmp_8_852: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_852: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_852 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_852: brnz,a %r10, cmp_wait8_852 ld [%r23], %r10 ba cmp_startwait8_852 mov 0x8, %r10 continue_cmp_8_852: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_852 mov 0xa4, %r17 best_set_reg(0xe0f381e48db095e1, %r16, %r17) cmp_multi_core_8_852: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x91928003 ! 973: WRPR_PIL_R wrpr %r10, %r3, %pil splash_lsu_8_853: nop nop ta T_CHANGE_HPRIV set 0xac971adc, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x02800001 ! 1: BE be stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 974: FBPULE fbule,a,pn %fcc0, frzptr_8_854: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_8_855: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_8_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_8_856-donret_8_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b82a00 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1d4b, %htstate wrhpr %g0, 0xd59, %hpstate ! rand=1 (8) ldx [%r12+%r0], %g1 retry donretarg_8_856: .word 0x81982f87 ! 977: WRHPR_HPSTATE_I wrhpr %r0, 0x0f87, %hpstate .word 0xe19fe140 ! 978: LDDFA_I ldda [%r31, 0x0140], %f16 .word 0x2eca8001 ! 1: BRGEZ brgez,a,pt %r10, .word 0x8d903aa4 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1aa4, %pstate .word 0xe2800c60 ! 980: LDUWA_R lduwa [%r0, %r0] 0x63, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x8+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_8_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_8_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 8 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_8_858: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x8),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_8_858) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,944,*,*,1)') ifelse(7,mask2tid(0x8),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_8_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x8),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_8_858: wrhpr %g0, 0xb0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 982: RDPC rd %pc, %r20 .word 0xe0bfc180 ! 983: STDA_R stda %r16, [%r31 + %r0] 0x0c jmptr_8_860: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa7b48493 ! 985: FCMPLE32 fcmple32 %d18, %d50, %r19 cmp_8_862: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_862: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_862 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_862: brnz,a %r10, cmp_wait8_862 ld [%r23], %r10 ba cmp_startwait8_862 mov 0x8, %r10 continue_cmp_8_862: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_862 mov 41, %r17 best_set_reg(0x58739d993287bd40, %r16, %r17) cmp_multi_core_8_862: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi .word 0x9f802040 ! 986: SIR sir 0x0040 .word 0xe89fd060 ! 987: LDDA_R ldda [%r31, %r0] 0x83, %r20 .word 0x9f802fa4 ! 988: SIR sir 0x0fa4 splash_lsu_8_864: nop nop ta T_CHANGE_HPRIV set 0x39036837, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0c800001 ! 1: BNEG bneg stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 989: FBPULE fbule brcommon2_8_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa7a00553 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 990: BN bn,a ibp_8_866: nop nop wrhpr %g0, 0x853, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe29fd920 ! 991: LDDA_R ldda [%r31, %r0] 0xc9, %r17 memptr_8_867: set user_data_start, %r31 .word 0x8584a82d ! 992: WRCCR_I wr %r18, 0x082d, %ccr splash_tick_8_868: nop nop ta T_CHANGE_HPRIV best_set_reg(0xdc2d5bb522da2d20, %r16, %r17) .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0x9f803bec ! 994: SIR sir 0x1bec .word 0xe23fe010 ! 1: STD_I std %r17, [%r31 + 0x0010] .word 0xf16fe070 ! 1: PREFETCH_I prefetch [%r31 + 0x0070], #24 mov 0xb2, %r30 .word 0x93d0001e ! 995: Tcc_R tne icc_or_xcc, %r0 + %r30 cmp_8_869: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_869: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_869 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_869: brnz,a %r10, cmp_wait8_869 ld [%r23], %r10 ba cmp_startwait8_869 mov 0x8, %r10 continue_cmp_8_869: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_869 mov 36, %r17 best_set_reg(0x30826a29eb14fd94, %r16, %r17) cmp_multi_core_8_869: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x68]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0xc03, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe297c200 ! 996: LDUHA_R lduha [%r31, %r0] 0x10, %r17 .word 0xe227e060 ! 997: STW_I stw %r17, [%r31 + 0x0060] cmp_8_870: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 xor %r9, 0x8, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0, %r8 mov 0xff, %r9 xor %r9, 0x8, %r9 ! My core mask #endif mov 0x8, %r10 cmp_startwait8_870: cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmp_8_870 ldxa [0x50]%asi, %r13 !Running_rw ld [%r23], %r10 cmp_wait8_870: brnz,a %r10, cmp_wait8_870 ld [%r23], %r10 ba cmp_startwait8_870 mov 0x8, %r10 continue_cmp_8_870: ldxa [0x58]%asi, %r14 !Running_status xnor %r14, %r13, %r14 !Bits equal brz,a %r8, cmp_multi_core_8_870 mov 0xd2, %r17 best_set_reg(0xccd1252fe3d263d4, %r16, %r17) cmp_multi_core_8_870: and %r14, %r17, %r14 !Apply set/clear mask to bits equal and %r14, %r9, %r14 !Apply core-mask stxa %r14, [0x60]%asi st %g0, [%r23] !clear lock wr %g0, %r12, %asi wrhpr %g0, 0x59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe33fe070 ! 998: STDF_I std %f17, [0x0070, %r31] .word 0xa3b7c7c0 ! 999: PDIST pdistn %d62, %d0, %d48 splash_tba_8_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba cmpenall_8_873: nop nop ta T_CHANGE_HPRIV rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 mov 0xff, %r9 sllx %r9, %r8, %r9 ! My core mask #else mov 0xff, %r9 ! My core mask #endif cmpenall_startwait8_873: mov 0x8, %r10 cas [%r23],%g0,%r10 !lock brz,a %r10, continue_cmpenall_8_873 nop cmpenall_wait8_873: ld [%r23], %r10 brnz %r10, cmpenall_wait8_873 nop ba,a cmpenall_startwait8_873 continue_cmpenall_8_873: ldxa [0x58]%asi, %r14 !Running_status wait_for_cmpstat_8_873: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r14 bne,a %xcc, wait_for_cmpstat_8_873 ldxa [0x58]%asi, %r14 !Running_status ldxa [0x10]%asi, %r14 !Get enabled threads and %r14, %r9, %r14 !My core mask stxa %r14, [0x60]%asi !W1S ldxa [0x58]%asi, %r16 !Running_status wait_for_cmpstat2_8_873: and %r16, %r9, %r16 !My core mask cmp %r14, %r16 bne,a %xcc, wait_for_cmpstat2_8_873 ldxa [0x58]%asi, %r16 !Running_status st %g0, [%r23] !clear lock #if (MULTIPASS > 0) multipass_check_mt: rd %asi, %r12 wr %g0, ASI_SCRATCHPAD, %asi ldxa [0x38]%asi, %r10 cmp %r10, MULTIPASS inc %r10 stxa %r10, [0x38]%asi be finish_diag wr %g0, %r12, %asi lock_sync_thds_again: mov 0xff, %r10 set sync_thr_counter4, %r23 #ifndef SPC add %r23,%r8,%r23 !Core's sync counter #endif st %r10, [%r23] !lock sync_thr_counter4 add %r23, 64, %r23 st %r10, [%r23] !lock sync_thr_counter5 add %r23, 64, %r23 st %r10, [%r23] !lock sync_thr_counter6 ba fork_threads wrpr %g0, %g0, %gl #endif nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_3: wrhpr %g0, 0x100, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_4_0: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e114 ! 2: STF_I st %f8, [0x0114, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_4 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_1: wrhpr %g0, 0x701, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c180 ! 3: CASA_I casa [%r31] 0x c, %r0, %r8 dvapa_4_2: nop nop ta T_CHANGE_HPRIV mov 0xe09, %r20 mov 0x3, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x440, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7a1c9aa ! 4: FDIVs fdivs %f7, %f10, %f19 nop nop set 0x9ec0a4da, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_3: .word 0xa1a109c1 ! 5: FDIVd fdivd %f4, %f32, %f16 br_longdelay3_4_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8d903952 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1952, %pstate mondo_4_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d914009 ! 7: WRPR_WSTATE_R wrpr %r5, %r9, %wstate .word 0xe0bfda00 ! 8: STDA_R stda %r16, [%r31 + %r0] 0xd0 br_badelay3_4_7: .word 0x12800001 ! 1: BNE bne .word 0x32800001 ! 1: BNE bne,a .word 0xd3110014 ! 1: LDQF_R - [%r4, %r20], %f9 .word 0xa7a4c825 ! 9: FADDs fadds %f19, %f5, %f19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_8), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,976,*,*,1) xir_4_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_8: and %g1, 2, %g1 brnz,a %g1, xirwait_4_8 ldx [%r17], %g1 xir_4_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab837891 ! 10: WR_CLEAR_SOFTINT_I wr %r13, 0x1891, %clear_softint .word 0x02cb0001 ! 1: BRZ brz,pt %r12, .word 0x8d903626 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1626, %pstate .word 0xe29fc240 ! 12: LDDA_R ldda [%r31, %r0] 0x12, %r17 nop nop set 0x26c018b8, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_11: .word 0x39400001 ! 13: FBPUGE fbuge,a,pn %fcc0, vahole2_4_12: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xc1bfdf00 ! 14: STDFA_R stda %f0, [%r0, %r31] ibp_4_13: nop nop .word 0xa9a349c8 ! 15: FDIVd fdivd %f44, %f8, %f20 nop nop ta T_CHANGE_HPRIV ! macro donret_4_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_14-donret_4_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0032bd00 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xf9c, %htstate best_set_reg(0x600, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) ldx [%r12+%r0], %g1 retry donretarg_4_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_4_15: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_4 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_16: wrhpr %g0, 0xc98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c3c0 ! 18: CASA_I casa [%r31] 0x1e, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_17: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_17) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,752,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_17: wrhpr %g0, 0xd48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 19: RDPC rd %pc, %r10 .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9f80318b ! 20: SIR sir 0x118b brcommon3_4_18: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd33fe1c0 ! 21: STDF_I std %f9, [0x01c0, %r31] .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 .word 0x9f803c66 ! 22: SIR sir 0x1c66 .word 0x91d02033 ! 23: Tcc_I ta icc_or_xcc, %r0 + 51 br_badelay2_4_19: .word 0x12800001 ! 1: BNE bne pdist %f2, %f18, %f6 .word 0xa1b10302 ! 24: ALIGNADDRESS alignaddr %r4, %r2, %r16 ibp_4_20: nop nop wrhpr %g0, 0x99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fda00 ! 25: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_21)+8 , 16, 16)) -> intp(1,0,10,*,752,*,97,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_21)&0xffffffff)+8 , 16, 16)) -> intp(0,0,29,*,904,*,97,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983b47 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1b47, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_4_22: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fc3e0 ! 27: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_23: wrhpr %g0, 0xdda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d160 ! 28: CASA_I casa [%r31] 0x8b, %r0, %r17 mondo_4_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d940002 ! 29: WRPR_WSTATE_R wrpr %r16, %r2, %wstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_25: wrhpr %g0, 0xb83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c080 ! 30: CASA_I casa [%r31] 0x 4, %r0, %r17 .word 0xe22fe1ce ! 31: STB_I stb %r17, [%r31 + 0x01ce] brcommon3_4_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c3c0 ! 1: CASA_I casa [%r31] 0x1e, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe3e7dd40 ! 32: CASA_I casa [%r31] 0xea, %r0, %r17 .word 0xe3e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r17 .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 mov 0xb3, %r30 .word 0x91d0001e ! 33: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe19fe180 ! 34: LDDFA_I ldda [%r31, 0x0180], %f16 brcommon3_4_27: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xa3b7c7c0 ! 35: PDIST pdistn %d62, %d0, %d48 nop nop mov 0x1, %r18 splash_cmpr_4_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_28)+8 , 16, 16)) -> intp(2,0,22,*,936,*,b4,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_28)&0xffffffff)+8 , 16, 16)) -> intp(3,0,2,*,904,*,b4,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 36: SIAM siam 1 jmptr_4_29: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_30: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_30) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,728,*,*,1)') ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_30: wrhpr %g0, 0xad9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 38: RDPC rd %pc, %r12 cancelint_4_31: rdhpr %halt, %r13 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_33), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,720,*,*,1) xir_4_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_33: and %g1, 2, %g1 brnz,a %g1, xirwait_4_33 ldx [%r17], %g1 xir_4_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846c03 ! 41: WR_CLEAR_SOFTINT_I wr %r17, 0x0c03, %clear_softint frzptr_4_34: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xc1bfdf00 ! 42: STDFA_R stda %f0, [%r0, %r31] brcommon3_4_35: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe0a0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00a0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 43: BN bn,a frzptr_4_36: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xe43fe170 ! 1: STD_I std %r18, [%r31 + 0x0170] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 44: BN bn,a nop nop set 0xd6102739, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_4_37: .word 0x93a489c4 ! 45: FDIVd fdivd %f18, %f4, %f40 frzptr_4_38: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe0f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00f0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_4 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_39: wrhpr %g0, 0x8d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7df00 ! 47: CASA_I casa [%r31] 0xf8, %r0, %r16 vahole2_4_40: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfdc40 ! 48: STDFA_R stda %f16, [%r0, %r31] .word 0xe0bfc380 ! 49: STDA_R stda %r16, [%r31 + %r0] 0x1c nop nop mov 0x0, %r18 splash_cmpr_4_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 50: SIAM siam 1 mondo_4_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c8] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d940003 ! 51: WRPR_WSTATE_R wrpr %r16, %r3, %wstate .word 0xe09fe030 ! 52: LDDA_I ldda [%r31, + 0x0030] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_44) , 16, 16)) -> intp(7,0,16,*,664,*,3c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_44)&0xffffffff) , 16, 16)) -> intp(0,0,3,*,712,*,3c,1) #else set 0x4c40ff89, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_44: .word 0x9f803813 ! 53: SIR sir 0x1813 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_4_46: rdhpr %halt, %r17 .word 0x85880000 ! 55: ALLCLEAN brcommon3_4_47: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] ba,a .+8 jmpl %r27-4, %r27 .word 0xd03fe0a0 ! 56: STD_I std %r8, [%r31 + 0x00a0] dvapa_4_48: nop nop ta T_CHANGE_HPRIV mov 0x83d, %r20 mov 0x3, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x69a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd0dfc180 ! 57: LDXA_R ldxa [%r31, %r0] 0x0c, %r8 cancelint_4_49: rdhpr %halt, %r20 .word 0x85880000 ! 58: ALLCLEAN intveclr_4_50: nop nop ta T_CHANGE_HPRIV setx 0x8285ab00eb8d66c8, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x1d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_4_51: nop nop setx 0xffffffbbffffffa7, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_4_52: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e1e0 ! 1: STQF_I - %f10, [0x01e0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x00800001 ! 61: BN bn mondo_4_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d94c002 ! 62: WRPR_WSTATE_R wrpr %r19, %r2, %wstate intveclr_4_54: nop nop ta T_CHANGE_HPRIV setx 0x82ef55123d23d967, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x311, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 63: FBPLG fblg #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_55), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,736,*,*,1) xir_4_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_55: and %g1, 2, %g1 brnz,a %g1, xirwait_4_55 ldx [%r17], %g1 xir_4_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80e934 ! 64: WR_CLEAR_SOFTINT_I wr %r3, 0x0934, %clear_softint ibp_4_56: nop nop .word 0xa9a209d4 ! 65: FDIVd fdivd %f8, %f20, %f20 ibp_4_57: nop nop wrhpr %g0, 0xdb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95a289c2 ! 66: FDIVd fdivd %f10, %f2, %f10 .word 0xe09fdc00 ! 67: LDDA_R ldda [%r31, %r0] 0xe0, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_59), 16, 16)) -> intp(mask2tid(0x4),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,736,*,*,1) xir_4_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_59: and %g1, 2, %g1 brnz,a %g1, xirwait_4_59 ldx [%r17], %g1 xir_4_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8172d0 ! 68: WR_CLEAR_SOFTINT_I wr %r5, 0x12d0, %clear_softint br_longdelay4_4_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902005 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate .word 0xe69fd040 ! 70: LDDA_R ldda [%r31, %r0] 0x82, %r19 .word 0xe0bfdd40 ! 71: STDA_R stda %r16, [%r31 + %r0] 0xea splash_tba_4_62: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_4_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d920011 ! 73: WRPR_WSTATE_R wrpr %r8, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_64) , 16, 16)) -> intp(2,0,1,*,992,*,4d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_64)&0xffffffff) , 16, 16)) -> intp(5,0,22,*,728,*,4d,1) #else set 0xc0b00d1b, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_64: .word 0xa7a509ca ! 74: FDIVd fdivd %f20, %f10, %f50 mondo_4_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3c8] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d914012 ! 75: WRPR_WSTATE_R wrpr %r5, %r18, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_66), 16, 16)) -> intp(mask2tid(0x4),1,3,*,712,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,760,*,*,1) xir_4_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_66: and %g1, 2, %g1 brnz,a %g1, xirwait_4_66 ldx [%r17], %g1 xir_4_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817d3a ! 76: WR_CLEAR_SOFTINT_I wr %r5, 0x1d3a, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_67), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) xir_4_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_67: and %g1, 2, %g1 brnz,a %g1, xirwait_4_67 ldx [%r17], %g1 xir_4_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ed28 ! 77: WR_CLEAR_SOFTINT_I wr %r19, 0x0d28, %clear_softint splash_hpstate_4_68: ta T_CHANGE_NONHPRIV .word 0x22800001 ! 1: BE be,a .word 0x8198335d ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x135d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_4 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_69: wrhpr %g0, 0x513, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c080 ! 79: CASA_I casa [%r31] 0x 4, %r0, %r19 .word 0xe7e7c280 ! 1: CASA_I casa [%r31] 0x14, %r0, %r19 .word 0xe6bfc720 ! 1: STDA_R stda %r19, [%r31 + %r0] 0x39 mov 0xb5, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_4_70: nop nop ta T_CHANGE_HPRIV set 0x4beb1b1c, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x10800002 ! 1: BA ba stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 81: FBPULE fbule nop nop mov 0x0, %r18 splash_cmpr_4_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_72), 16, 16)) -> intp(mask2tid(0x4),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,1008,*,*,1) xir_4_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_72: and %g1, 2, %g1 brnz,a %g1, xirwait_4_72 ldx [%r17], %g1 xir_4_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842d2a ! 83: WR_CLEAR_SOFTINT_I wr %r16, 0x0d2a, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_73: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_73) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,944,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_73: wrhpr %g0, 0x211, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 84: RDPC rd %pc, %r19 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_74)+8 , 16, 16)) -> intp(2,0,24,*,912,*,95,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_74)&0xffffffff)+8 , 16, 16)) -> intp(5,0,23,*,968,*,95,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819834dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x14dd, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_4_75: set user_data_start, %o7 .word 0x93902003 ! 86: WRPR_CWP_I wrpr %r0, 0x0003, %cwp cwp_4_76: set user_data_start, %o7 .word 0x93902000 ! 87: WRPR_CWP_I wrpr %r0, 0x0000, %cwp brcommon1_4_77: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0x9f802c7b ! 88: SIR sir 0x0c7b #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_78), 16, 16)) -> intp(mask2tid(0x4),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,984,*,*,1) xir_4_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_78: and %g1, 2, %g1 brnz,a %g1, xirwait_4_78 ldx [%r17], %g1 xir_4_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84be36 ! 89: WR_CLEAR_SOFTINT_I wr %r18, 0x1e36, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_4_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_79-donret_4_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0052ae00 | (32 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1cd7, %htstate best_set_reg(0x1a4b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) done donretarg_4_79: .word 0x81982f07 ! 90: WRHPR_HPSTATE_I wrhpr %r0, 0x0f07, %hpstate .word 0xe19fe160 ! 91: LDDFA_I ldda [%r31, 0x0160], %f16 ibp_4_80: nop nop .word 0xd51fe1b0 ! 92: LDDF_I ldd [%r31, 0x01b0], %f10 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_81: wrhpr %g0, 0xe83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7d100 ! 93: CASA_I casa [%r31] 0x88, %r0, %r10 trapasi_4_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_4_83: nop nop ta T_CHANGE_HPRIV setx 0x6c894533c389a98e, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 95: FBPLG fblg,a,pn %fcc0, intveclr_4_84: nop nop ta T_CHANGE_HPRIV setx 0xc60629b705d026c5, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x3d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_4_85: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xe1bfdf00 ! 97: STDFA_R stda %f16, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_86: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_86) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,968,*,*,1)') ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_86: wrhpr %g0, 0xdc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 98: RDPC rd %pc, %r18 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_87: wrhpr %g0, 0x201, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d160 ! 99: CASA_I casa [%r31] 0x8b, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_4_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_88-donret_4_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000f8400 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xde9, %htstate best_set_reg(0x561, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) ldx [%r12+%r0], %g1 retry donretarg_4_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_4_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba fbe skip_4_90 fbule skip_4_90 .align 4096 skip_4_90: .word 0x9ba449d3 ! 102: FDIVd fdivd %f48, %f50, %f44 .word 0x99b4048b ! 103: FCMPLE32 fcmple32 %d16, %d42, %r12 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_92), 16, 16)) -> intp(mask2tid(0x4),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,664,*,*,1) xir_4_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_92: and %g1, 2, %g1 brnz,a %g1, xirwait_4_92 ldx [%r17], %g1 xir_4_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8363cb ! 104: WR_CLEAR_SOFTINT_I wr %r13, 0x03cb, %clear_softint ibp_4_93: nop nop .word 0x20800001 ! 105: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_4_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_94)+8 , 16, 16)) -> intp(2,0,5,*,712,*,e6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_94)&0xffffffff)+8 , 16, 16)) -> intp(2,0,23,*,904,*,e6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_4_95: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfdf20 ! 107: STDFA_R stda %f0, [%r0, %r31] .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9f8029e2 ! 108: SIR sir 0x09e2 nop nop ta T_CHANGE_HPRIV ! macro donret_4_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_96-donret_4_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d7bf00 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xd5e, %htstate wrhpr %g0, 0x701, %hpstate ! rand=1 (4) ldx [%r12+%r0], %g1 retry donretarg_4_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x3c780001 ! 110: BPPOS .word 0xe2bfc600 ! 111: STDA_R stda %r17, [%r31 + %r0] 0x30 splash_tba_4_98: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x4020d529, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_99: .word 0x9f802a84 ! 113: SIR sir 0x0a84 memptr_4_100: set 0x60140000, %r31 .word 0x85852eab ! 114: WRCCR_I wr %r20, 0x0eab, %ccr nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_101: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_101) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,656,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_101: wrhpr %g0, 0xbc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 115: RDPC rd %pc, %r16 splash_tba_4_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983e9b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e9b, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_104: wrhpr %g0, 0xed8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d140 ! 118: CASA_I casa [%r31] 0x8a, %r0, %r13 ibp_4_105: nop nop .word 0xa5703a6f ! 119: POPC_I popc 0x1a6f, %r18 ibp_4_106: nop nop .word 0xda97d100 ! 120: LDUHA_R lduha [%r31, %r0] 0x88, %r13 mondo_4_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r8, [%r0+0x3e8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d910010 ! 121: WRPR_WSTATE_R wrpr %r4, %r16, %wstate .word 0xc19fdc00 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe140 ! 123: LDDA_I ldda [%r31, + 0x0140] %asi, %r13 brcommon3_4_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r16, [%r0] ASI_LSU_CONTROL .word 0x97aac828 ! 124: FMOVGE fmovs %fcc1, %f8, %f11 .word 0xe037e1c4 ! 125: STH_I sth %r16, [%r31 + 0x01c4] frzptr_4_109: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702070 ! 1: POPC_I popc 0x0070, %r16 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 126: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_110: wrhpr %g0, 0xe0b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c3c0 ! 127: CASA_I casa [%r31] 0x1e, %r0, %r16 nop nop set 0xc3507a15, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_111: .word 0x9f803458 ! 128: SIR sir 0x1458 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_112) , 16, 16)) -> intp(5,0,18,*,736,*,ff,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_112)&0xffffffff) , 16, 16)) -> intp(1,0,16,*,680,*,ff,1) #else set 0xa2509b72, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_112: .word 0xa9b1c4d0 ! 129: FCMPNE32 fcmpne32 %d38, %d16, %r20 .word 0xc0bfde00 ! 130: STDA_R stda %r0, [%r31 + %r0] 0xf0 .word 0xd49fc280 ! 131: LDDA_R ldda [%r31, %r0] 0x14, %r10 .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_4_116: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe0d0 ! 134: LDDA_I ldda [%r31, + 0x00d0] %asi, %r10 intveclr_4_117: nop nop ta T_CHANGE_HPRIV setx 0xc7a6eee2b2dafcc0, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, .word 0x8d902894 ! 136: WRPR_PSTATE_I wrpr %r0, 0x0894, %pstate .word 0xd53fe110 ! 137: STDF_I std %f10, [0x0110, %r31] ibp_4_120: nop nop wrhpr %g0, 0x1d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd43fe150 ! 138: STD_I std %r10, [%r31 + 0x0150] .word 0x8d9038e5 ! 139: WRPR_PSTATE_I wrpr %r0, 0x18e5, %pstate frzptr_4_122: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x95b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r10 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc40 ! 140: STDFA_R stda %f16, [%r0, %r31] nop nop set 0xf2b08a67, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_123: .word 0x39400001 ! 141: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982e8c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0e8c, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_4_126: ta T_CHANGE_NONHPRIV .word 0x1a800002 ! 1: BCC bcc .word 0x81982693 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x0693, %hpstate demap_4_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x04cc8001 ! 1: BRLEZ brlez,pt %r18, stxa %g3, [%g3] 0x5f wrhpr %g0, 0x4d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe174 ! 145: LDD_I ldd [%r31 + 0x0174], %r19 .word 0xe63fe0b1 ! 146: STD_I std %r19, [%r31 + 0x00b1] nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819830d2 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x10d2, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_4_129: rdhpr %halt, %r11 .word 0x85880000 ! 148: ALLCLEAN splash_tba_4_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_4_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_131-donret_4_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00490800 | (0x58 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xb90, %htstate best_set_reg(0x11e9, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) done donretarg_4_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_132) , 16, 16)) -> intp(4,0,31,*,728,*,cf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_132)&0xffffffff) , 16, 16)) -> intp(4,0,20,*,656,*,cf,1) #else set 0x10500f3a, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f8034fb ! 1: SIR sir 0x14fb intvec_4_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8031a0 ! 151: SIR sir 0x11a0 memptr_4_133: set 0x60140000, %r31 .word 0x8584bcc1 ! 152: WRCCR_I wr %r18, 0x1cc1, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0x9f8020d0 ! 154: SIR sir 0x00d0 .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe0f0 ! 156: LDD_I ldd [%r31 + 0x00f0], %r19 .word 0xe19fdf00 ! 157: LDDFA_R ldda [%r31, %r0], %f16 splash_lsu_4_136: nop nop ta T_CHANGE_HPRIV set 0x77d47019, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697d920 ! 159: LDUHA_R lduha [%r31, %r0] 0xc9, %r19 fbl,a,pn %fcc0, skip_4_137 .word 0x87aa8a4b ! 1: FCMPd fcmpd %fcc, %f10, %f42 .align 2048 skip_4_137: .word 0x93a109d0 ! 160: FDIVd fdivd %f4, %f16, %f40 dvapa_4_138: nop nop ta T_CHANGE_HPRIV mov 0xf5a, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x610, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe190 ! 161: LDD_I ldd [%r31 + 0x0190], %r9 .word 0xd2dfdd40 ! 162: LDXA_R ldxa [%r31, %r0] 0xea, %r9 intveclr_4_140: nop nop ta T_CHANGE_HPRIV setx 0xd156a6d1df6e367d, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x890, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 163: FBPLG fblg,a,pn %fcc0, .word 0xe1bfdf20 ! 164: STDFA_R stda %f16, [%r0, %r31] brcommon3_4_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0x91aac830 ! 165: FMOVGE fmovs %fcc1, %f16, %f8 brcommon3_4_142: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-4, %r27 .word 0xe49fc600 ! 166: LDDA_R ldda [%r31, %r0] 0x30, %r18 .word 0x91924012 ! 167: WRPR_PIL_R wrpr %r9, %r18, %pil frzptr_4_144: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 168: BN bn splash_hpstate_4_145: ta T_CHANGE_NONHPRIV .word 0x8198374d ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x174d, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_146: wrhpr %g0, 0x503, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c200 ! 170: CASA_I casa [%r31] 0x10, %r0, %r18 splash_lsu_4_147: nop nop ta T_CHANGE_HPRIV set 0x600b7936, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x13400001 ! 1: FBPE fbe stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 171: FBPULE fbule,a,pn %fcc0, brz,a,pn %r10, skip_4_148 bvs skip_4_148 .align 2048 skip_4_148: .word 0x39400001 ! 172: FBPUGE fbuge,a,pn %fcc0, .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_4_149: set 0x60540000, %r31 .word 0x85853860 ! 174: WRCCR_I wr %r20, 0x1860, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_150), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,928,*,*,1) xir_4_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_150: and %g1, 2, %g1 brnz,a %g1, xirwait_4_150 ldx [%r17], %g1 xir_4_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fe75 ! 175: WR_CLEAR_SOFTINT_I wr %r19, 0x1e75, %clear_softint nop nop mov 0x0, %r18 splash_cmpr_4_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_152) , 16, 16)) -> intp(2,0,18,*,720,*,ee,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_152)&0xffffffff) , 16, 16)) -> intp(2,0,24,*,712,*,ee,1) #else set 0x5ad07f2e, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a109cb ! 1: FDIVd fdivd %f4, %f42, %f18 intvec_4_152: .word 0x95a449d4 ! 177: FDIVd fdivd %f48, %f20, %f10 mondo_4_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d948004 ! 178: WRPR_WSTATE_R wrpr %r18, %r4, %wstate .word 0xd427e0ce ! 179: STW_I stw %r10, [%r31 + 0x00ce] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_154: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_154) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,720,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_154: wrhpr %g0, 0x44b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 180: RDPC rd %pc, %r16 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_155: wrhpr %g0, 0xa12, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7df00 ! 182: CASA_I casa [%r31] 0xf8, %r0, %r9 .word 0xa5b44fe5 ! 183: FONES e %f18 splash_tba_4_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_4_157: rdhpr %halt, %r9 .word 0x85880000 ! 185: ALLCLEAN .word 0x87aa4ad4 ! 186: FCMPEd fcmped %fcc, %f40, %f20 frzptr_4_158: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0x303049da, %r28 !TTID : 1 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802ee7 ! 1: SIR sir 0x0ee7 intvec_4_159: .word 0x9f8036d2 ! 188: SIR sir 0x16d2 .word 0xd437e1ab ! 189: STH_I sth %r10, [%r31 + 0x01ab] change_to_randtl_4_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_4_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_162), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,640,*,*,1) xir_4_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_162: and %g1, 2, %g1 brnz,a %g1, xirwait_4_162 ldx [%r17], %g1 xir_4_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8120a1 ! 192: WR_CLEAR_SOFTINT_I wr %r4, 0x00a1, %clear_softint .word 0x91944012 ! 193: WRPR_PIL_R wrpr %r17, %r18, %pil memptr_4_164: set 0x60740000, %r31 .word 0x85847574 ! 194: WRCCR_I wr %r17, 0x1574, %ccr .word 0xd49fc180 ! 195: LDDA_R ldda [%r31, %r0] 0x0c, %r10 frzptr_4_166: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 196: BN bn brcommon1_4_167: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0xa7b50485 ! 197: FCMPLE32 fcmple32 %d20, %d36, %r19 dvapa_4_168: nop nop ta T_CHANGE_HPRIV mov 0xf60, %r20 mov 0x18, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xecb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd13fe0a0 ! 198: STDF_I std %f8, [0x00a0, %r31] .word 0xc1bfdb40 ! 199: STDFA_R stda %f0, [%r0, %r31] .word 0xa550c000 ! 200: RDPR_TT .word 0xf16fe0f0 ! 201: PREFETCH_I prefetch [%r31 + 0x00f0], #24 fpinit_4_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 202: FCMPd fcmpd %fcc, %f0, %f4 .word 0xe1bfde00 ! 203: STDFA_R stda %f16, [%r0, %r31] cwp_4_172: set user_data_start, %o7 .word 0x93902001 ! 204: WRPR_CWP_I wrpr %r0, 0x0001, %cwp nop nop set 0xbf309ea4, %r28 !TTID : 6 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a289d2 ! 1: FDIVd fdivd %f10, %f18, %f20 intvec_4_173: .word 0x39400001 ! 205: FBPUGE fbuge,a,pn %fcc0, splash_lsu_4_174: nop nop ta T_CHANGE_HPRIV set 0xa06da8ad, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 206: FBPULE fbule,a,pn %fcc0, ibp_4_175: nop nop .word 0xe19fdc00 ! 207: LDDFA_R ldda [%r31, %r0], %f16 dvapa_4_176: nop nop ta T_CHANGE_HPRIV mov 0xe74, %r20 mov 0x1e, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xc5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fda00 ! 208: LDDA_R ldda [%r31, %r0] 0xd0, %r16 splash_lsu_4_177: nop nop ta T_CHANGE_HPRIV set 0xcb94c3ab, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 209: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_4 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_178: wrhpr %g0, 0xd98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c380 ! 210: CASA_I casa [%r31] 0x1c, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_179), 16, 16)) -> intp(mask2tid(0x4),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,912,*,*,1) xir_4_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_179: and %g1, 2, %g1 brnz,a %g1, xirwait_4_179 ldx [%r17], %g1 xir_4_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81ac4d ! 211: WR_CLEAR_SOFTINT_I wr %r6, 0x0c4d, %clear_softint .word 0x91a00553 ! 212: FSQRTd fsqrt cancelint_4_180: rdhpr %halt, %r20 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_181), 16, 16)) -> intp(mask2tid(0x4),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,696,*,*,1) xir_4_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_181: and %g1, 2, %g1 brnz,a %g1, xirwait_4_181 ldx [%r17], %g1 xir_4_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8375ec ! 214: WR_CLEAR_SOFTINT_I wr %r13, 0x15ec, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_182: wrhpr %g0, 0xcd8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c380 ! 215: CASA_I casa [%r31] 0x1c, %r0, %r10 dvapa_4_183: nop nop ta T_CHANGE_HPRIV mov 0xa86, %r20 mov 0x5, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x19a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdd40 ! 216: STDA_R stda %r16, [%r31 + %r0] 0xea #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_184), 16, 16)) -> intp(mask2tid(0x4),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,760,*,*,1) xir_4_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_184: and %g1, 2, %g1 brnz,a %g1, xirwait_4_184 ldx [%r17], %g1 xir_4_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816bfb ! 217: WR_CLEAR_SOFTINT_I wr %r5, 0x0bfb, %clear_softint vahole3_4_185: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xd43fe070 ! 218: STD_I std %r10, [%r31 + 0x0070] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_186)+8 , 16, 16)) -> intp(1,0,20,*,712,*,ef,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_186)&0xffffffff)+8 , 16, 16)) -> intp(5,0,20,*,696,*,ef,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983385 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1385, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_4_187: nop nop ta T_CHANGE_HPRIV mov 0x870, %r20 mov 0x12, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x4d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7dd40 ! 220: CASA_I casa [%r31] 0xea, %r0, %r10 pmu_4_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffaa, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_4_189: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x95702190 ! 1: POPC_I popc 0x0190, %r10 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 222: BN bn,a cancelint_4_190: rdhpr %halt, %r19 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_191: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_191) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,992,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_191: wrhpr %g0, 0x190, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 224: RDPC rd %pc, %r16 brcommon1_4_192: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 225: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_4_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_193)+8 , 16, 16)) -> intp(6,0,17,*,744,*,55,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_193)&0xffffffff)+8 , 16, 16)) -> intp(3,0,14,*,936,*,55,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982917 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0917, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_195: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_195) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,648,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_195: wrhpr %g0, 0xb92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 228: RDPC rd %pc, %r20 .word 0x87902203 ! 229: WRPR_TT_I wrpr %r0, 0x0203, %tt nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_4 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_196: wrhpr %g0, 0x183, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c200 ! 230: CASA_I casa [%r31] 0x10, %r0, %r18 .word 0xe43fe040 ! 231: STD_I std %r18, [%r31 + 0x0040] .word 0xe497c3c0 ! 232: LDUHA_R lduha [%r31, %r0] 0x1e, %r18 frzptr_4_199: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdc00 ! 233: LDDFA_R ldda [%r31, %r0], %f16 .word 0xa5702070 ! 1: POPC_I popc 0x0070, %r18 .word 0x9f802c1e ! 234: SIR sir 0x0c1e mondo_4_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3e0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d93400a ! 235: WRPR_WSTATE_R wrpr %r13, %r10, %wstate splash_tba_4_201: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982f4b ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0f4b, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_4_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d914013 ! 238: WRPR_WSTATE_R wrpr %r5, %r19, %wstate cancelint_4_204: rdhpr %halt, %r13 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_4_205: nop nop ta T_CHANGE_HPRIV set 0xdbf6124f, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 240: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_4_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_206-donret_4_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0041dc00 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x158b, %htstate wrhpr %g0, 0x8d1, %hpstate ! rand=1 (4) ldx [%r12+%r0], %g1 retry donretarg_4_206: .word 0x26cb0001 ! 241: BRLZ brlz,a,pt %r12, .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x9192800d ! 243: WRPR_PIL_R wrpr %r10, %r13, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_208), 16, 16)) -> intp(mask2tid(0x4),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,912,*,*,1) xir_4_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_208: and %g1, 2, %g1 brnz,a %g1, xirwait_4_208 ldx [%r17], %g1 xir_4_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a217 ! 244: WR_CLEAR_SOFTINT_I wr %r18, 0x0217, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_209)+8 , 16, 16)) -> intp(1,0,12,*,944,*,1d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_209)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,728,*,1d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983ccc ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ccc, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_210: wrhpr %g0, 0xb09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 246: CASA_I casa [%r31] 0xc9, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x1, %r18 splash_cmpr_4_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_211)+8 , 16, 16)) -> intp(6,0,5,*,1016,*,a7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_211)&0xffffffff)+8 , 16, 16)) -> intp(6,0,23,*,992,*,a7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 248: SIAM siam 1 cancelint_4_212: rdhpr %halt, %r11 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_213)+8 , 16, 16)) -> intp(6,0,14,*,736,*,a6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_213)&0xffffffff)+8 , 16, 16)) -> intp(4,0,18,*,952,*,a6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819836cf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x16cf, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d903350 ! 251: WRPR_PSTATE_I wrpr %r0, 0x1350, %pstate memptr_4_215: set 0x60740000, %r31 .word 0x85842ef2 ! 252: WRCCR_I wr %r16, 0x0ef2, %ccr nop nop mov 0x0, %r18 splash_cmpr_4_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_4_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7df00 ! 1: CASA_I casa [%r31] 0xf8, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0xa7aac834 ! 254: FMOVGE fmovs %fcc1, %f20, %f19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_218) , 16, 16)) -> intp(5,0,8,*,952,*,d6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_218)&0xffffffff) , 16, 16)) -> intp(6,0,17,*,984,*,d6,1) #else set 0xba10777e, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x93a309cc ! 1: FDIVd fdivd %f12, %f12, %f40 intvec_4_218: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 255: FBPUGE fbuge,a,pn %fcc0, .word 0x91918011 ! 256: WRPR_PIL_R wrpr %r6, %r17, %pil ibp_4_220: nop nop .word 0x99a4c9b2 ! 257: FDIVs fdivs %f19, %f18, %f12 .word 0xd69fc400 ! 258: LDDA_R ldda [%r31, %r0] 0x20, %r11 cancelint_4_222: rdhpr %halt, %r9 .word 0x85880000 ! 259: ALLCLEAN .word 0xe19fda00 ! 260: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc32fe060 ! 261: STXFSR_I st-sfr %f1, [0x0060, %r31] cancelint_4_225: rdhpr %halt, %r18 .word 0x85880000 ! 262: ALLCLEAN brcommon3_4_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0xa9aac832 ! 263: FMOVGE fmovs %fcc1, %f18, %f20 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198251e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x051e, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_4_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe040 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0040] ba,a .+8 jmpl %r27+0, %r27 stxa %r7, [%r0] ASI_LSU_CONTROL .word 0x91aac823 ! 265: FMOVGE fmovs %fcc1, %f3, %f8 vahole3_4_229: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd69fdf00 ! 266: LDDA_R ldda [%r31, %r0] 0xf8, %r11 splash_hpstate_4_230: .word 0x0d400001 ! 1: FBPG fbg .word 0x8198215f ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x015f, %hpstate memptr_4_231: set user_data_start, %r31 .word 0x85807008 ! 268: WRCCR_I wr %r1, 0x1008, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_232) , 16, 16)) -> intp(1,0,9,*,728,*,2d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_232)&0xffffffff) , 16, 16)) -> intp(1,0,24,*,664,*,2d,1) #else set 0x40e7e0, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_232: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803aec ! 269: SIR sir 0x1aec pmu_4_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb0ffffffa5, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_4_234: nop nop ta T_CHANGE_HPRIV set 0xc3782e11, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_235), 16, 16)) -> intp(mask2tid(0x4),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,664,*,*,1) xir_4_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_235: and %g1, 2, %g1 brnz,a %g1, xirwait_4_235 ldx [%r17], %g1 xir_4_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a519 ! 273: WR_CLEAR_SOFTINT_I wr %r18, 0x0519, %clear_softint .word 0x9f8021c0 ! 274: SIR sir 0x01c0 .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xe0bfdc00 ! 276: STDA_R stda %r16, [%r31 + %r0] 0xe0 .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_4_240: nop nop ta T_CHANGE_HPRIV set 0x4985011c, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x15400001 ! 1: FBPUE fbue stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0x1280d4e0, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_241: .word 0x39400001 ! 279: FBPUGE fbuge,a,pn %fcc0, mondo_4_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e8] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d918014 ! 280: WRPR_WSTATE_R wrpr %r6, %r20, %wstate dvapa_4_243: nop nop ta T_CHANGE_HPRIV mov 0xb13, %r20 mov 0x14, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xbd3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9b307d4 ! 281: PDIST pdistn %d12, %d20, %d20 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_244: wrhpr %g0, 0x25b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c2e0 ! 282: CASA_I casa [%r31] 0x17, %r0, %r20 .word 0x9f802180 ! 283: SIR sir 0x0180 vahole3_4_246: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe9e7e000 ! 284: CASA_R casa [%r31] %asi, %r0, %r20 br_longdelay4_4_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902001 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_248: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_248) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,720,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,984,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_248: wrhpr %g0, 0xa00, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 286: RDPC rd %pc, %r20 memptr_4_249: set user_data_start, %r31 .word 0x8580b68c ! 287: WRCCR_I wr %r2, 0x168c, %ccr .word 0x91908012 ! 288: WRPR_PIL_R wrpr %r2, %r18, %pil mondo_4_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d918006 ! 289: WRPR_WSTATE_R wrpr %r6, %r6, %wstate cancelint_4_252: rdhpr %halt, %r11 .word 0x85880000 ! 290: ALLCLEAN jmptr_4_253: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_4_254: rdhpr %halt, %r19 .word 0x85880000 ! 292: ALLCLEAN frzptr_4_255: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x9bb7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r13 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 293: BN bn,a .word 0x95b307d0 ! 294: PDIST pdistn %d12, %d16, %d10 frzptr_4_257: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 295: BN bn,a br_badelay1_4_258: .word 0x2c800001 ! 1: BNEG bneg,a .word 0xd937e0c0 ! 1: STQF_I - %f12, [0x00c0, %r31] .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, normalw .word 0xa7458000 ! 296: RD_SOFTINT_REG rd %softint, %r19 ibp_4_259: nop nop .word 0x9ba2c9b3 ! 297: FDIVs fdivs %f11, %f19, %f13 .word 0x9192c012 ! 298: WRPR_PIL_R wrpr %r11, %r18, %pil brcommon2_4_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe010 ! 1: PREFETCH_I prefetch [%r31 + 0x0010], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0xc1bfda00 ! 299: STDFA_R stda %f0, [%r0, %r31] splash_lsu_4_262: nop nop ta T_CHANGE_HPRIV set 0x765b2122, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 300: FBPULE fbule,a,pn %fcc0, pmu_4_263: nop nop setx 0xffffffb3ffffffa4, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_4_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_264)+8 , 16, 16)) -> intp(2,0,11,*,944,*,5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_264)&0xffffffff)+8 , 16, 16)) -> intp(0,0,8,*,904,*,5,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_4_265: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_266), 16, 16)) -> intp(mask2tid(0x4),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) xir_4_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_266: and %g1, 2, %g1 brnz,a %g1, xirwait_4_266 ldx [%r17], %g1 xir_4_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bcab ! 304: WR_CLEAR_SOFTINT_I wr %r6, 0x1cab, %clear_softint nop nop set 0xd7509c36, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_267: .word 0x39400001 ! 305: FBPUGE fbuge,a,pn %fcc0, mondo_4_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3c8] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d910009 ! 306: WRPR_WSTATE_R wrpr %r4, %r9, %wstate nop nop set 0x5ee0ac9d, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9b4c4d2 ! 1: FCMPNE32 fcmpne32 %d50, %d18, %r20 intvec_4_269: .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, ibp_4_270: nop nop .word 0x20800002 ! 308: BN bn,a frzptr_4_271: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702010 ! 1: POPC_I popc 0x0010, %r12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfc2c0 ! 309: STDFA_R stda %f0, [%r0, %r31] .word 0xd927e0c8 ! 310: STF_I st %f12, [0x00c8, %r31] change_to_randtl_4_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_4_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_4_273: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fe040 ! 313: LDDFA_I ldda [%r31, 0x0040], %f16 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_274: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_274) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,664,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_274: wrhpr %g0, 0x6c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 314: RDPC rd %pc, %r16 memptr_4_275: set 0x60140000, %r31 .word 0x85842056 ! 315: WRCCR_I wr %r16, 0x0056, %ccr cancelint_4_276: rdhpr %halt, %r20 .word 0x85880000 ! 316: ALLCLEAN frzptr_4_277: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xe19fc2c0 ! 317: LDDFA_R ldda [%r31, %r0], %f16 br_badelay1_4_278: .word 0x3f400002 ! 1: FBPO fbo,a,pn %fcc0, .word 0x19400001 ! 1: FBPUGE fbuge .word 0xf16fe050 ! 1: PREFETCH_I prefetch [%r31 + 0x0050], #24 normalw .word 0x95458000 ! 318: RD_SOFTINT_REG rd %softint, %r10 nop nop mov 0x1, %r18 splash_cmpr_4_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_279)+8 , 16, 16)) -> intp(5,0,27,*,720,*,7d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_279)&0xffffffff)+8 , 16, 16)) -> intp(6,0,5,*,992,*,7d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 319: SIAM siam 1 mondo_4_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d948014 ! 320: WRPR_WSTATE_R wrpr %r18, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_4 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_281: wrhpr %g0, 0x198, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d100 ! 321: CASA_I casa [%r31] 0x88, %r0, %r19 frzptr_4_282: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 322: BN bn nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_283)+8 , 16, 16)) -> intp(1,0,21,*,744,*,65,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_283)&0xffffffff)+8 , 16, 16)) -> intp(5,0,30,*,640,*,65,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819839c7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x19c7, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_4 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_284: wrhpr %g0, 0x98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c380 ! 324: CASA_I casa [%r31] 0x1c, %r0, %r19 vahole3_4_285: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe63fe050 ! 325: STD_I std %r19, [%r31 + 0x0050] .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_4_287: set user_data_start, %o7 .word 0x93902006 ! 327: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xa7b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r19 .word 0x9f802c93 ! 328: SIR sir 0x0c93 memptr_4_288: set user_data_start, %r31 .word 0x8582b64c ! 329: WRCCR_I wr %r10, 0x164c, %ccr nop nop set 0xb930a2e2, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x95a2c9c1 ! 1: FDIVd fdivd %f42, %f32, %f10 intvec_4_289: .word 0x39400001 ! 330: FBPUGE fbuge,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_290: wrhpr %g0, 0xb03, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c600 ! 331: CASA_I casa [%r31] 0x30, %r0, %r13 brcommon1_4_291: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c2c0 ! 1: CASA_I casa [%r31] 0x16, %r0, %r13 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1a189d4 ! 332: FDIVd fdivd %f6, %f20, %f16 dvapa_4_292: nop nop ta T_CHANGE_HPRIV mov 0xaed, %r20 mov 0x1, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xb5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdb40 ! 333: LDDFA_R ldda [%r31, %r0], %f16 .word 0xf1efe100 ! 334: PREFETCHA_I prefetcha [%r31, + 0x0100] %asi, #24 nop nop ta T_CHANGE_HPRIV ! macro donret_4_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_294-donret_4_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f10600 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x175c, %htstate best_set_reg(0x1eb9, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) retry donretarg_4_294: .word 0x8198379f ! 335: WRHPR_HPSTATE_I wrhpr %r0, 0x179f, %hpstate splash_tba_4_295: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x0, %r18 splash_cmpr_4_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_4_297: nop nop ta T_CHANGE_HPRIV set 0xbb08ab1f, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 338: FBPULE fbule,a,pn %fcc0, .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_4_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d903301 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1301, %pstate ibp_4_300: nop nop .word 0x20800001 ! 341: BN bn,a .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_4_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_301-donret_4_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x002cfe00 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x168b, %htstate wrhpr %g0, 0xd1b, %hpstate ! rand=1 (4) done donretarg_4_301: .word 0x07400001 ! 343: FBPUL fbul fbl skip_4_302 bneg skip_4_302 .align 512 skip_4_302: .word 0xa5a349d1 ! 344: FDIVd fdivd %f44, %f48, %f18 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_4_303: ta T_CHANGE_NONHPRIV ! macro .word 0xdb3fe110 ! 1: STDF_I std %f13, [0x0110, %r31] .word 0x9f8025c9 ! 346: SIR sir 0x05c9 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983e85 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1e85, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_4_305: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe160 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x0160] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 348: BN bn,a mondo_4_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3e0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d92c010 ! 349: WRPR_WSTATE_R wrpr %r11, %r16, %wstate intveclr_4_307: nop nop ta T_CHANGE_HPRIV setx 0x783da5c3393f7c7e, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xdc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 350: FBPLG fblg .word 0x91950005 ! 351: WRPR_PIL_R wrpr %r20, %r5, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_309), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,664,*,*,1) xir_4_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_309: and %g1, 2, %g1 brnz,a %g1, xirwait_4_309 ldx [%r17], %g1 xir_4_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8435c8 ! 352: WR_CLEAR_SOFTINT_I wr %r16, 0x15c8, %clear_softint splash_tba_4_310: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_4_311: rdhpr %halt, %r11 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_4_312: nop nop ta T_CHANGE_HPRIV set 0xf2eba77a, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_4_313: rdhpr %halt, %r11 .word 0x85880000 ! 356: ALLCLEAN jmptr_4_314: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x87902351 ! 358: WRPR_TT_I wrpr %r0, 0x0351, %tt splash_tba_4_315: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_316), 16, 16)) -> intp(mask2tid(0x4),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,1008,*,*,1) xir_4_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_316: and %g1, 2, %g1 brnz,a %g1, xirwait_4_316 ldx [%r17], %g1 xir_4_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab836272 ! 360: WR_CLEAR_SOFTINT_I wr %r13, 0x0272, %clear_softint .word 0x23400002 ! 1: FBPNE fbne,a,pn %fcc0, .word 0x8d903ecc ! 361: WRPR_PSTATE_I wrpr %r0, 0x1ecc, %pstate .word 0xe19fdb40 ! 362: LDDFA_R ldda [%r31, %r0], %f16 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 .word 0x9f803dc0 ! 363: SIR sir 0x1dc0 mondo_4_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d920006 ! 364: WRPR_WSTATE_R wrpr %r8, %r6, %wstate .word 0xe8dfc280 ! 365: LDXA_R ldxa [%r31, %r0] 0x14, %r20 ibp_4_321: nop nop wrhpr %g0, 0xf90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7d040 ! 366: CASA_I casa [%r31] 0x82, %r0, %r20 .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_4_322: nop nop ta T_CHANGE_HPRIV setx 0xdbd2e37ccc779d67, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_4_323: nop nop wrhpr %g0, 0x8db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 370: BN bn,a memptr_4_324: set user_data_start, %r31 .word 0x8584abee ! 371: WRCCR_I wr %r18, 0x0bee, %ccr .word 0xe91fe1e0 ! 372: LDDF_I ldd [%r31, 0x01e0], %f20 ibp_4_326: nop nop wrhpr %g0, 0xe13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe81fe1a0 ! 373: LDD_I ldd [%r31 + 0x01a0], %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_327), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) xir_4_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_327: and %g1, 2, %g1 brnz,a %g1, xirwait_4_327 ldx [%r17], %g1 xir_4_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842a3e ! 374: WR_CLEAR_SOFTINT_I wr %r16, 0x0a3e, %clear_softint br_badelay2_4_328: .word 0x97a489d0 ! 1: FDIVd fdivd %f18, %f16, %f42 pdist %f30, %f30, %f4 .word 0xa9b30313 ! 375: ALIGNADDRESS alignaddr %r12, %r19, %r20 mondo_4_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d93400d ! 376: WRPR_WSTATE_R wrpr %r13, %r13, %wstate splash_tba_4_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_4_331: nop nop ta T_CHANGE_PRIV setx 0xffffffbcffffffaf, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_4_332: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_4_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3c0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d948013 ! 380: WRPR_WSTATE_R wrpr %r18, %r19, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_334)+8 , 16, 16)) -> intp(5,0,16,*,1000,*,36,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_334)&0xffffffff)+8 , 16, 16)) -> intp(4,0,3,*,752,*,36,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198245d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x045d, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_4_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_335)+8 , 16, 16)) -> intp(3,0,0,*,656,*,16,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_335)&0xffffffff)+8 , 16, 16)) -> intp(0,0,12,*,976,*,16,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_4_336: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0xfa70009a, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7b504c7 ! 1: FCMPNE32 fcmpne32 %d20, %d38, %r19 intvec_4_337: .word 0x91a049c5 ! 384: FDIVd fdivd %f32, %f36, %f8 brcommon3_4_338: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7d100 ! 1: CASA_I casa [%r31] 0x88, %r0, %r9 ba,a .+8 jmpl %r27-0, %r27 .word 0xd2dfc200 ! 385: LDXA_R ldxa [%r31, %r0] 0x10, %r9 demap_4_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r13, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0x681, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe033 ! 386: LDD_I ldd [%r31 + 0x0033], %r9 .word 0xc32fc000 ! 387: STXFSR_R st-sfr %f1, [%r0, %r31] fpinit_4_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009c4 ! 388: FDIVd fdivd %f0, %f4, %f8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_342) , 16, 16)) -> intp(3,0,27,*,704,*,1c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_342)&0xffffffff) , 16, 16)) -> intp(5,0,16,*,744,*,1c,1) #else set 0x67d06b12, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5b504d1 ! 1: FCMPNE32 fcmpne32 %d20, %d48, %r18 intvec_4_342: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80334b ! 389: SIR sir 0x134b brcommon2_4_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-0, %r27 .word 0xe1bfde20 ! 390: STDFA_R stda %f16, [%r0, %r31] .word 0xe19fde00 ! 391: LDDFA_R ldda [%r31, %r0], %f16 splash_lsu_4_344: nop nop ta T_CHANGE_HPRIV set 0xf9463e45, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_345)+8 , 16, 16)) -> intp(5,0,21,*,656,*,2c,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_345)&0xffffffff)+8 , 16, 16)) -> intp(2,0,24,*,920,*,2c,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198269d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x069d, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xc09fde00 ! 394: LDDA_R ldda [%r31, %r0] 0xf0, %r0 cancelint_4_347: rdhpr %halt, %r19 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_4 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_348: wrhpr %g0, 0xd91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c280 ! 396: CASA_I casa [%r31] 0x14, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_4_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_349-donret_4_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001c1400 | (57 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1ccd, %htstate wrhpr %g0, 0x30a, %hpstate ! rand=1 (4) .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, ldx [%r11+%r0], %g1 done donretarg_4_349: .word 0x93a189d2 ! 397: FDIVd fdivd %f6, %f18, %f40 splash_tba_4_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_4_351: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe0f0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00f0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd2800be0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x5f, %r9 cwp_4_352: set user_data_start, %o7 .word 0x93902005 ! 401: WRPR_CWP_I wrpr %r0, 0x0005, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_4_354: nop nop ta T_CHANGE_PRIV setx 0xffffffbcffffffa1, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_355), 16, 16)) -> intp(mask2tid(0x4),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,744,*,*,1) xir_4_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_355: and %g1, 2, %g1 brnz,a %g1, xirwait_4_355 ldx [%r17], %g1 xir_4_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817c59 ! 404: WR_CLEAR_SOFTINT_I wr %r5, 0x1c59, %clear_softint brcommon3_4_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902d49 ! 405: WRPR_PSTATE_I wrpr %r0, 0x0d49, %pstate frzptr_4_357: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_358) , 16, 16)) -> intp(7,0,26,*,944,*,54,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_358)&0xffffffff) , 16, 16)) -> intp(7,0,19,*,1000,*,54,1) #else set 0xc0f02cd2, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99b144c4 ! 1: FCMPNE32 fcmpne32 %d36, %d4, %r12 intvec_4_358: .word 0x9f802d63 ! 407: SIR sir 0x0d63 .word 0xe19fdc40 ! 408: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_4_359: nop nop .word 0xc19fdb40 ! 410: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_4_360: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe080 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0080] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902605 ! 411: WRPR_PSTATE_I wrpr %r0, 0x0605, %pstate .word 0x879022ed ! 412: WRPR_TT_I wrpr %r0, 0x02ed, %tt frzptr_4_361: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_4_362: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_4_363: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_4_364: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 416: BN bn,a br_badelay3_4_365: .word 0x34800001 ! 1: BG bg,a .word 0x22800001 ! 1: BE be,a .word 0xe5110011 ! 1: LDQF_R - [%r4, %r17], %f18 .word 0x97a4c830 ! 417: FADDs fadds %f19, %f16, %f11 intveclr_4_366: nop nop ta T_CHANGE_HPRIV setx 0xdcfc06991997d2b8, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x442, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 418: FBPLG fblg splash_tba_4_367: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_4_368: nop nop ta T_CHANGE_HPRIV setx 0x4b1909f224120a3a, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, .word 0x91918013 ! 421: WRPR_PIL_R wrpr %r6, %r19, %pil splash_hpstate_4_370: .word 0x13400002 ! 1: FBPE fbe .word 0x81983e5f ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x1e5f, %hpstate cancelint_4_371: rdhpr %halt, %r11 .word 0x85880000 ! 423: ALLCLEAN mondo_4_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3e8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d940013 ! 424: WRPR_WSTATE_R wrpr %r16, %r19, %wstate vahole3_4_373: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0xf1efe110 ! 425: PREFETCHA_I prefetcha [%r31, + 0x0110] %asi, #24 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_374), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,728,*,*,1) xir_4_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_374: and %g1, 2, %g1 brnz,a %g1, xirwait_4_374 ldx [%r17], %g1 xir_4_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842756 ! 426: WR_CLEAR_SOFTINT_I wr %r16, 0x0756, %clear_softint ibp_4_375: nop nop .word 0xa7a109b3 ! 427: FDIVs fdivs %f4, %f19, %f19 .word 0xc1bfe0a0 ! 428: STDFA_I stda %f0, [0x00a0, %r31] nop nop mov 0x1, %r18 splash_cmpr_4_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_376)+8 , 16, 16)) -> intp(4,0,10,*,640,*,bf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_376)&0xffffffff)+8 , 16, 16)) -> intp(0,0,21,*,760,*,bf,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_377), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,672,*,*,1) xir_4_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_377: and %g1, 2, %g1 brnz,a %g1, xirwait_4_377 ldx [%r17], %g1 xir_4_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842653 ! 430: WR_CLEAR_SOFTINT_I wr %r16, 0x0653, %clear_softint cancelint_4_378: rdhpr %halt, %r19 .word 0x85880000 ! 431: ALLCLEAN splash_tba_4_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_4_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_4_381: rdhpr %halt, %r10 .word 0x85880000 ! 434: ALLCLEAN memptr_4_382: set 0x60340000, %r31 .word 0x8584247e ! 435: WRCCR_I wr %r16, 0x047e, %ccr .word 0xd03fe1a0 ! 1: STD_I std %r8, [%r31 + 0x01a0] .word 0x9f8037e5 ! 436: SIR sir 0x17e5 .word 0xd037e1c0 ! 437: STH_I sth %r8, [%r31 + 0x01c0] .word 0xd09fc720 ! 438: LDDA_R ldda [%r31, %r0] 0x39, %r8 .word 0xc1bfdc00 ! 439: STDFA_R stda %f0, [%r0, %r31] ibp_4_385: nop nop .word 0xa7b347d0 ! 440: PDIST pdistn %d44, %d16, %d50 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_386), 16, 16)) -> intp(mask2tid(0x4),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) xir_4_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_386: and %g1, 2, %g1 brnz,a %g1, xirwait_4_386 ldx [%r17], %g1 xir_4_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823bd4 ! 441: WR_CLEAR_SOFTINT_I wr %r8, 0x1bd4, %clear_softint intveclr_4_387: nop nop ta T_CHANGE_HPRIV setx 0x8648cd8e77a80701, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 442: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_388: wrhpr %g0, 0x683, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c6c0 ! 443: CASA_I casa [%r31] 0x36, %r0, %r13 frzptr_4_389: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdc00 ! 444: STDFA_R stda %f0, [%r0, %r31] intveclr_4_390: nop nop ta T_CHANGE_HPRIV setx 0x8ea671bbfe37ffd4, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x611, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 445: FBPLG fblg,a,pn %fcc0, .word 0x91a249b2 ! 446: FDIVs fdivs %f9, %f18, %f8 br_badelay1_4_392: .word 0x93b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r9 .word 0xd131c011 ! 1: STQF_R - %f8, [%r17, %r7] .word 0x19400001 ! 1: FBPUGE fbuge normalw .word 0x99458000 ! 447: RD_SOFTINT_REG rd %softint, %r12 ibp_4_393: nop nop .word 0xa570304b ! 448: POPC_I popc 0x104b, %r18 jmptr_4_394: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe03fe120 ! 450: STD_I std %r16, [%r31 + 0x0120] memptr_4_396: set user_data_start, %r31 .word 0x8580b46a ! 451: WRCCR_I wr %r2, 0x146a, %ccr cancelint_4_397: rdhpr %halt, %r18 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_4_398: nop nop ta T_CHANGE_HPRIV set 0xacba0d93, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 453: FBPULE fbule,a,pn %fcc0, brcommon2_4_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f8021b0 ! 1: SIR sir 0x01b0 ba,a .+8 jmpl %r27-0, %r27 .word 0xe19fdb40 ! 454: LDDFA_R ldda [%r31, %r0], %f16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_4_400: ta T_CHANGE_NONHPRIV ! macro frzptr_4_401: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 456: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_402), 16, 16)) -> intp(mask2tid(0x4),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,976,*,*,1) xir_4_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_402: and %g1, 2, %g1 brnz,a %g1, xirwait_4_402 ldx [%r17], %g1 xir_4_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81b80f ! 457: WR_CLEAR_SOFTINT_I wr %r6, 0x180f, %clear_softint brcommon3_4_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e180 ! 1: STQF_I - %f10, [0x0180, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r10, [%r0] ASI_LSU_CONTROL .word 0x93aac830 ! 458: FMOVGE fmovs %fcc1, %f16, %f9 splash_tba_4_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_4_406: .word 0x32800001 ! 1: BNE bne,a .word 0xad74b27b ! Random illegal ? .word 0x91a1c9d3 ! 1: FDIVd fdivd %f38, %f50, %f8 .word 0xa5a44825 ! 461: FADDs fadds %f17, %f5, %f18 .word 0x93b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d40 .word 0x9f8026d2 ! 462: SIR sir 0x06d2 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819826df ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x06df, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_4_408: set user_data_start, %o7 .word 0x93902004 ! 464: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cancelint_4_409: rdhpr %halt, %r20 .word 0x85880000 ! 465: ALLCLEAN splash_tba_4_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe88008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 pmu_4_411: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffaf, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_4_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_4_413: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xc32fe020 ! 1: STXFSR_I st-sfr %f1, [0x0020, %r31] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdc40 ! 471: LDDFA_R ldda [%r31, %r0], %f16 mondo_4_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d904014 ! 472: WRPR_WSTATE_R wrpr %r1, %r20, %wstate mondo_4_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d91c012 ! 473: WRPR_WSTATE_R wrpr %r7, %r18, %wstate .word 0xa5b4c7d4 ! 474: PDIST pdistn %d50, %d20, %d18 mondo_4_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d90c00b ! 475: WRPR_WSTATE_R wrpr %r3, %r11, %wstate cancelint_4_418: rdhpr %halt, %r17 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_419), 16, 16)) -> intp(mask2tid(0x4),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,720,*,*,1) xir_4_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_419: and %g1, 2, %g1 brnz,a %g1, xirwait_4_419 ldx [%r17], %g1 xir_4_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853502 ! 477: WR_CLEAR_SOFTINT_I wr %r20, 0x1502, %clear_softint jmptr_4_420: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_421: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_421) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,960,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_421: wrhpr %g0, 0xa8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 479: RDPC rd %pc, %r12 fpinit_4_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009a4 ! 480: FDIVs fdivs %f0, %f4, %f8 .word 0xe297c600 ! 481: LDUHA_R lduha [%r31, %r0] 0x30, %r17 splash_tba_4_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_4_425: nop nop setx 0xffffffbbffffffa9, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe154 ! 484: STDA_I stda %r17, [%r31 + 0x0154] %asi splash_lsu_4_426: nop nop ta T_CHANGE_HPRIV set 0xaff7f988, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 485: FBPULE fbule,a,pn %fcc0, .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e154 ! 487: STQF_I - %f17, [0x0154, %r31] frzptr_4_428: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xe26fe130 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0130] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdd40 ! 488: STDFA_R stda %f0, [%r0, %r31] brcommon3_4_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e130 ! 1: STQF_I - %f17, [0x0130, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9025cf ! 489: WRPR_PSTATE_I wrpr %r0, 0x05cf, %pstate nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_430: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_430) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,952,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_430: wrhpr %g0, 0x181, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 490: RDPC rd %pc, %r19 .word 0xe8dfd040 ! 491: LDXA_R ldxa [%r31, %r0] 0x82, %r20 .word 0xa9a00160 ! 492: FABSq dis not found nop nop mov 0x1, %r18 splash_cmpr_4_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_433)+8 , 16, 16)) -> intp(2,0,17,*,912,*,25,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_433)&0xffffffff)+8 , 16, 16)) -> intp(4,0,9,*,976,*,25,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_434) , 16, 16)) -> intp(3,0,16,*,1008,*,87,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_434)&0xffffffff) , 16, 16)) -> intp(1,0,25,*,656,*,87,1) #else set 0x5f308124, %r28 !TTID : 1 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99b4c4d2 ! 1: FCMPNE32 fcmpne32 %d50, %d18, %r12 intvec_4_434: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802d2d ! 494: SIR sir 0x0d2d .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_4_436: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fda60 ! 496: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_437: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_437) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,680,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_437: wrhpr %g0, 0xf50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 497: RDPC rd %pc, %r12 splash_tba_4_438: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_4_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3e0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d940006 ! 499: WRPR_WSTATE_R wrpr %r16, %r6, %wstate brcommon2_4_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f802180 ! 1: SIR sir 0x0180 ba,a .+8 jmpl %r27-4, %r27 .word 0xc1bfdd40 ! 500: STDFA_R stda %f0, [%r0, %r31] .word 0x9194c013 ! 501: WRPR_PIL_R wrpr %r19, %r19, %pil ibp_4_442: nop nop .word 0xd697c720 ! 502: LDUHA_R lduha [%r31, %r0] 0x39, %r11 cwp_4_443: set user_data_start, %o7 .word 0x93902004 ! 503: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cancelint_4_444: rdhpr %halt, %r20 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e1c2 ! 505: STF_I st %f9, [0x01c2, %r31] brcommon3_4_445: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe050 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0050] ba,a .+8 jmpl %r27+0, %r27 .word 0x8198279d ! 506: WRHPR_HPSTATE_I wrhpr %r0, 0x079d, %hpstate splash_tba_4_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0xde10a8a5, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_447: .word 0x9f802ee8 ! 508: SIR sir 0x0ee8 intveclr_4_448: nop nop ta T_CHANGE_HPRIV setx 0xca3f7f56a4d3ffbe, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x219, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 509: FBPLG fblg,a,pn %fcc0, memptr_4_449: set 0x60340000, %r31 .word 0x85846b9f ! 510: WRCCR_I wr %r17, 0x0b9f, %ccr nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_4 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_450: wrhpr %g0, 0x250, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d100 ! 511: CASA_I casa [%r31] 0x88, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_451: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_451) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,680,*,*,1)') ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_451: wrhpr %g0, 9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 512: RDPC rd %pc, %r10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_452) , 16, 16)) -> intp(3,0,23,*,720,*,ed,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_452)&0xffffffff) , 16, 16)) -> intp(2,0,20,*,744,*,ed,1) #else set 0x9c6076f2, %r28 !TTID : 6 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_452: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a489c8 ! 513: FDIVd fdivd %f18, %f8, %f40 nop nop set 0x3d00b1ff, %r28 !TTID : 1 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_4_453: .word 0x93b0c4d2 ! 514: FCMPNE32 fcmpne32 %d34, %d18, %r9 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819827df ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07df, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_4_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3d8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d944011 ! 516: WRPR_WSTATE_R wrpr %r17, %r17, %wstate pmu_4_456: nop nop setx 0xffffffb4ffffffa2, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_4_457: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e020 ! 1: STQF_I - %f9, [0x0020, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd31fe0c0 ! 518: LDDF_I ldd [%r31, 0x00c0], %f9 pmu_4_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffa8, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xc2e0ab25, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_4_459: .word 0xa1b504c2 ! 520: FCMPNE32 fcmpne32 %d20, %d2, %r16 vahole3_4_460: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd6dfc2c0 ! 521: LDXA_R ldxa [%r31, %r0] 0x16, %r11 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_4_461: ta T_CHANGE_NONHPRIV ! macro .word 0x99a189a8 ! 523: FDIVs fdivs %f6, %f8, %f12 nop nop mov 0x1, %r18 splash_cmpr_4_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_463)+8 , 16, 16)) -> intp(5,0,3,*,648,*,ce,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_463)&0xffffffff)+8 , 16, 16)) -> intp(2,0,9,*,976,*,ce,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 .word 0xe19fde20 ! 525: LDDFA_R ldda [%r31, %r0], %f16 br_longdelay3_4_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f803f96 ! 526: SIR sir 0x1f96 frzptr_4_466: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 527: BN bn,a .word 0xd09fc3c0 ! 528: LDDA_R ldda [%r31, %r0] 0x1e, %r8 vahole4_4_468: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0x81983635 ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x1635, %hpstate .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, .word 0x8d903af6 ! 530: WRPR_PSTATE_I wrpr %r0, 0x1af6, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x04800002 ! 1: BLE ble .word 0x8d902e44 ! 532: WRPR_PSTATE_I wrpr %r0, 0x0e44, %pstate brcommon3_4_471: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e170 ! 1: STQF_I - %f8, [0x0170, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd0bfc240 ! 533: STDA_R stda %r8, [%r31 + %r0] 0x12 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_472) , 16, 16)) -> intp(5,0,28,*,664,*,27,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_472)&0xffffffff) , 16, 16)) -> intp(4,0,9,*,984,*,27,1) #else set 0xf40d6af, %r28 !TTID : 6 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_472: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 534: FBPUGE fbuge,a,pn %fcc0, .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe6dfc240 ! 536: LDXA_R ldxa [%r31, %r0] 0x12, %r19 jmptr_4_474: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_4_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_475-donret_4_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d5db00 | (0x88 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xa57, %htstate best_set_reg(0x1e18, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) done .align 2048 donretarg_4_475: .word 0x8198370f ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x170f, %hpstate trapasi_4_476: nop mov 0x3f8, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_477), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,704,*,*,1) xir_4_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_477: and %g1, 2, %g1 brnz,a %g1, xirwait_4_477 ldx [%r17], %g1 xir_4_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82eb70 ! 540: WR_CLEAR_SOFTINT_I wr %r11, 0x0b70, %clear_softint .word 0x1c800001 ! 1: BPOS bpos .word 0x8d9020eb ! 541: WRPR_PSTATE_I wrpr %r0, 0x00eb, %pstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_4 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_479: wrhpr %g0, 0xbc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d100 ! 542: CASA_I casa [%r31] 0x88, %r0, %r19 mondo_4_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d950013 ! 543: WRPR_WSTATE_R wrpr %r20, %r19, %wstate .word 0x97520000 ! 544: RDPR_PIL .word 0xe01fe1d0 ! 545: LDD_I ldd [%r31 + 0x01d0], %r16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_4_482: ta T_CHANGE_NONPRIV ! macro cancelint_4_483: rdhpr %halt, %r12 .word 0x85880000 ! 547: ALLCLEAN splash_tba_4_484: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_4_485: nop nop ta T_CHANGE_HPRIV mov 0x802, %r20 mov 0x1e, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xc91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfde00 ! 549: STDFA_R stda %f16, [%r0, %r31] .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_4_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r6, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0xf08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe068 ! 552: LDD_I ldd [%r31 + 0x0068], %r19 mondo_4_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d94c002 ! 553: WRPR_WSTATE_R wrpr %r19, %r2, %wstate .word 0xe7e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r19 .word 0x9f803019 ! 554: SIR sir 0x1019 .word 0xc0bfde20 ! 555: STDA_R stda %r0, [%r31 + %r0] 0xf1 memptr_4_491: set 0x60740000, %r31 .word 0x8584e99c ! 556: WRCCR_I wr %r19, 0x099c, %ccr nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_492: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_492) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1000,*,*,1)') ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_492: wrhpr %g0, 0x6c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 557: RDPC rd %pc, %r17 ibp_4_493: nop nop wrhpr %g0, 0x3d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe81fe120 ! 558: LDD_I ldd [%r31 + 0x0120], %r20 .word 0x28800001 ! 559: BLEU bleu,a vahole2_4_494: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xe19fde00 ! 560: LDDFA_R ldda [%r31, %r0], %f16 ibp_4_495: nop nop wrhpr %g0, 0x79b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdf20 ! 561: STDFA_R stda %f16, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_496) , 16, 16)) -> intp(2,0,21,*,640,*,cf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_496)&0xffffffff) , 16, 16)) -> intp(7,0,8,*,952,*,cf,1) #else set 0x1b00d55, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_496: .word 0x97b404d4 ! 562: FCMPNE32 fcmpne32 %d16, %d20, %r11 frzptr_4_497: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdf20 ! 563: LDDFA_R ldda [%r31, %r0], %f16 memptr_4_498: set user_data_start, %r31 .word 0x858139bc ! 564: WRCCR_I wr %r4, 0x19bc, %ccr .word 0xa7b107d4 ! 565: PDIST pdistn %d4, %d20, %d50 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_500) , 16, 16)) -> intp(4,0,31,*,968,*,e5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_500)&0xffffffff) , 16, 16)) -> intp(5,0,23,*,720,*,e5,1) #else set 0x287003ef, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_500: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400002 ! 566: FBPUGE fbuge jmptr_4_501: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_502: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_502) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_502: wrhpr %g0, 0x60b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 568: RDPC rd %pc, %r17 nop nop ta T_CHANGE_HPRIV ! macro donret_4_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_503-donret_4_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00ebaa00 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f0f, %htstate best_set_reg(0x15a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) done donretarg_4_503: .word 0x93a449d1 ! 569: FDIVd fdivd %f48, %f48, %f40 frzptr_4_504: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 570: BN bn,a .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 .word 0x9f802169 ! 571: SIR sir 0x0169 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_505), 16, 16)) -> intp(mask2tid(0x4),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) xir_4_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_505: and %g1, 2, %g1 brnz,a %g1, xirwait_4_505 ldx [%r17], %g1 xir_4_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816327 ! 572: WR_CLEAR_SOFTINT_I wr %r5, 0x0327, %clear_softint frzptr_4_506: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfdd40 ! 573: STDFA_R stda %f0, [%r0, %r31] cancelint_4_507: rdhpr %halt, %r9 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_508) , 16, 16)) -> intp(5,0,3,*,752,*,75,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_508)&0xffffffff) , 16, 16)) -> intp(1,0,25,*,976,*,75,1) #else set 0xcdf09fa6, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f802452 ! 1: SIR sir 0x0452 intvec_4_508: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b504d3 ! 575: FCMPNE32 fcmpne32 %d20, %d50, %r19 cancelint_4_509: rdhpr %halt, %r13 .word 0x85880000 ! 576: ALLCLEAN vahole4_4_510: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0x8d902e47 ! 577: WRPR_PSTATE_I wrpr %r0, 0x0e47, %pstate .word 0x87902005 ! 578: WRPR_TT_I wrpr %r0, 0x0005, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_511), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,704,*,*,1) xir_4_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_511: and %g1, 2, %g1 brnz,a %g1, xirwait_4_511 ldx [%r17], %g1 xir_4_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ace5 ! 579: WR_CLEAR_SOFTINT_I wr %r18, 0x0ce5, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_512) , 16, 16)) -> intp(2,0,29,*,696,*,cf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_512)&0xffffffff) , 16, 16)) -> intp(1,0,28,*,1016,*,cf,1) #else set 0xff40d1c2, %r28 !TTID : 1 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x91a309d3 ! 1: FDIVd fdivd %f12, %f50, %f8 intvec_4_512: .word 0x9ba149d0 ! 580: FDIVd fdivd %f36, %f16, %f44 brcommon3_4_513: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902091 ! 581: WRPR_PSTATE_I wrpr %r0, 0x0091, %pstate .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_4_514: ta T_CHANGE_NONHPRIV ! macro .word 0x9f802160 ! 583: SIR sir 0x0160 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_516: wrhpr %g0, 0x909, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c2e0 ! 584: CASA_I casa [%r31] 0x17, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_517: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_517) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,696,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_517: wrhpr %g0, 0xf0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 585: RDPC rd %pc, %r13 cancelint_4_518: rdhpr %halt, %r9 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_4 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_519: wrhpr %g0, 0x95a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d160 ! 587: CASA_I casa [%r31] 0x8b, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_520: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_520) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,672,*,*,1)') ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_520: wrhpr %g0, 0xa42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 588: RDPC rd %pc, %r16 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d903147 ! 590: WRPR_PSTATE_I wrpr %r0, 0x1147, %pstate br_badelay2_4_523: .word 0x32800001 ! 1: BNE bne,a pdist %f20, %f16, %f24 .word 0xa1b24305 ! 591: ALIGNADDRESS alignaddr %r9, %r5, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_524) , 16, 16)) -> intp(3,0,13,*,912,*,6d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_524)&0xffffffff) , 16, 16)) -> intp(5,0,16,*,912,*,6d,1) #else set 0xc9100b9a, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_524: .word 0x9f802ed2 ! 592: SIR sir 0x0ed2 nop nop mov 0x1, %r18 splash_cmpr_4_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_525)+8 , 16, 16)) -> intp(0,0,1,*,712,*,ec,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_525)&0xffffffff)+8 , 16, 16)) -> intp(5,0,9,*,1016,*,ec,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 593: SIAM siam 1 memptr_4_526: set 0x60740000, %r31 .word 0x8580727c ! 594: WRCCR_I wr %r1, 0x127c, %ccr frzptr_4_527: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdf20 ! 595: LDDFA_R ldda [%r31, %r0], %f16 brgez,pt %r17, skip_4_528 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0x9f8035b5 ! 1: SIR sir 0x15b5 stxa %r17, [%r0] ASI_LSU_CONTROL .align 2048 skip_4_528: .word 0xc30fc000 ! 596: LDXFSR_R ld-fsr [%r31, %r0], %f1 splash_hpstate_4_529: .word 0x34800001 ! 1: BG bg,a .word 0x81982d55 ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x0d55, %hpstate .word 0xe527e1c0 ! 598: STF_I st %f18, [0x01c0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_530), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,896,*,*,1) xir_4_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_530: and %g1, 2, %g1 brnz,a %g1, xirwait_4_530 ldx [%r17], %g1 xir_4_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab807624 ! 599: WR_CLEAR_SOFTINT_I wr %r1, 0x1624, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_4_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_531-donret_4_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00714d00 | (16 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x6d6, %htstate best_set_reg(0xae8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) ldx [%r11+%r0], %g1 done donretarg_4_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_532)+8 , 16, 16)) -> intp(0,0,9,*,656,*,25,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_532)&0xffffffff)+8 , 16, 16)) -> intp(7,0,3,*,696,*,25,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982e46 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0e46, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x97a09555, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa5a509d2 ! 1: FDIVd fdivd %f20, %f18, %f18 intvec_4_533: .word 0x9f802965 ! 602: SIR sir 0x0965 splash_hpstate_4_534: .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, .word 0x819825a5 ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x05a5, %hpstate bcs,a skip_4_535 fbl skip_4_535 .align 1024 skip_4_535: .word 0x39400001 ! 604: FBPUGE fbuge,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_536), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,960,*,*,1) xir_4_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_536: and %g1, 2, %g1 brnz,a %g1, xirwait_4_536 ldx [%r17], %g1 xir_4_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82ae70 ! 605: WR_CLEAR_SOFTINT_I wr %r10, 0x0e70, %clear_softint mondo_4_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d948014 ! 606: WRPR_WSTATE_R wrpr %r18, %r20, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_538) , 16, 16)) -> intp(2,0,30,*,688,*,7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_538)&0xffffffff) , 16, 16)) -> intp(6,0,28,*,1008,*,7,1) #else set 0xd0b0384d, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_538: .word 0x9f8023d9 ! 607: SIR sir 0x03d9 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_539: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_539) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,704,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_539: wrhpr %g0, 0x711, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 608: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_540) , 16, 16)) -> intp(5,0,1,*,928,*,1e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_540)&0xffffffff) , 16, 16)) -> intp(6,0,10,*,960,*,1e,1) #else set 0x1600e70d, %r28 !TTID : 7 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99a2c9cc ! 1: FDIVd fdivd %f42, %f12, %f12 intvec_4_540: .word 0x19400001 ! 609: FBPUGE fbuge nop nop ta T_CHANGE_HPRIV ! macro donret_4_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_541-donret_4_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00cf9900 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1406, %htstate best_set_reg(0x41, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) done donretarg_4_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_542: wrhpr %g0, 0x98a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 611: CASA_I casa [%r31] 0xc9, %r0, %r8 ibp_4_543: nop nop wrhpr %g0, 0x7d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdb40 ! 612: STDFA_R stda %f0, [%r0, %r31] .word 0x8d902563 ! 613: WRPR_PSTATE_I wrpr %r0, 0x0563, %pstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_4 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_545: wrhpr %g0, 0xc13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7dd40 ! 614: CASA_I casa [%r31] 0xea, %r0, %r8 jmptr_4_546: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0x9b702129 ! 616: POPC_I popc 0x0129, %r13 .word 0xe737e030 ! 617: STQF_I - %f19, [0x0030, %r31] .word 0x3a780001 ! 618: BPCC ibp_4_548: nop nop wrhpr %g0, 0xb48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdf00 ! 619: LDDFA_R ldda [%r31, %r0], %f0 .word 0xa5b0c48a ! 620: FCMPLE32 fcmple32 %d34, %d10, %r18 .word 0xdb1fe150 ! 621: LDDF_I ldd [%r31, 0x0150], %f13 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_551: wrhpr %g0, 0x989, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d040 ! 622: CASA_I casa [%r31] 0x82, %r0, %r13 mondo_4_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d950014 ! 623: WRPR_WSTATE_R wrpr %r20, %r20, %wstate intveclr_4_553: nop nop ta T_CHANGE_HPRIV setx 0x34944a2cd029bb71, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 624: FBPLG fblg splash_tba_4_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_555: wrhpr %g0, 0xc8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c540 ! 626: CASA_I casa [%r31] 0x2a, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_556) , 16, 16)) -> intp(2,0,19,*,680,*,4d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_556)&0xffffffff) , 16, 16)) -> intp(2,0,8,*,680,*,4d,1) #else set 0xb200602a, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b304d3 ! 627: FCMPNE32 fcmpne32 %d12, %d50, %r19 mondo_4_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3c0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d92c010 ! 628: WRPR_WSTATE_R wrpr %r11, %r16, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0xfa403dd1, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_559: .word 0x39400001 ! 630: FBPUGE fbuge,a,pn %fcc0, frzptr_4_560: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfdc40 ! 631: STDFA_R stda %f16, [%r0, %r31] splash_tba_4_561: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_4_562: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfda00 ! 633: STDFA_R stda %f0, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_563: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_563) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,912,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_563: wrhpr %g0, 0xdb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 634: RDPC rd %pc, %r9 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_564), 16, 16)) -> intp(mask2tid(0x4),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,736,*,*,1) xir_4_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_564: and %g1, 2, %g1 brnz,a %g1, xirwait_4_564 ldx [%r17], %g1 xir_4_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82aac1 ! 635: WR_CLEAR_SOFTINT_I wr %r10, 0x0ac1, %clear_softint ibp_4_565: nop nop wrhpr %g0, 0x350, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f802010 ! 636: SIR sir 0x0010 .word 0xa5a349b4 ! 637: FDIVs fdivs %f13, %f20, %f18 splash_lsu_4_567: nop nop ta T_CHANGE_HPRIV set 0xf211b8c7, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x28800001 ! 1: BLEU bleu,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_4_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-0, %r27 .word 0xc1bfdb20 ! 639: STDFA_R stda %f0, [%r0, %r31] nop nop set 0xce402b2c, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_569: .word 0x9ba0c9d0 ! 640: FDIVd fdivd %f34, %f16, %f44 .word 0x91940011 ! 641: WRPR_PIL_R wrpr %r16, %r17, %pil nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_571: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_571) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,904,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_571: wrhpr %g0, 0xb8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 642: RDPC rd %pc, %r17 .word 0xd33fe170 ! 643: STDF_I std %f9, [0x0170, %r31] .word 0xc19fde20 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_572), 16, 16)) -> intp(mask2tid(0x4),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,672,*,*,1) xir_4_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_572: and %g1, 2, %g1 brnz,a %g1, xirwait_4_572 ldx [%r17], %g1 xir_4_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ba75 ! 645: WR_CLEAR_SOFTINT_I wr %r18, 0x1a75, %clear_softint .word 0xe19fde20 ! 646: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0xd9e04200, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_573: .word 0x93b504ca ! 647: FCMPNE32 fcmpne32 %d20, %d10, %r9 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_574), 16, 16)) -> intp(mask2tid(0x4),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,920,*,*,1) xir_4_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_574: and %g1, 2, %g1 brnz,a %g1, xirwait_4_574 ldx [%r17], %g1 xir_4_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81bbfb ! 648: WR_CLEAR_SOFTINT_I wr %r6, 0x1bfb, %clear_softint ibp_4_575: nop nop wrhpr %g0, 0xdc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda3fe080 ! 649: STD_I std %r13, [%r31 + 0x0080] splash_tba_4_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_4_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3c0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d924003 ! 651: WRPR_WSTATE_R wrpr %r9, %r3, %wstate .word 0x9ba00160 ! 652: FABSq dis not found splash_tba_4_579: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_4_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r17, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0x511, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe142 ! 654: LDD_I ldd [%r31 + 0x0142], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_4_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d8] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d904014 ! 656: WRPR_WSTATE_R wrpr %r1, %r20, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_583), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) xir_4_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_583: and %g1, 2, %g1 brnz,a %g1, xirwait_4_583 ldx [%r17], %g1 xir_4_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81227e ! 657: WR_CLEAR_SOFTINT_I wr %r4, 0x027e, %clear_softint demap_4_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r14, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0x489, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe019 ! 658: LDD_I ldd [%r31 + 0x0019], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] vahole5_4_585: nop nop setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 ta T_CHANGE_NONPRIV .word 0x95b0c334 ! 660: BMASK bmask %r3, %r20, %r10 dvapa_4_586: nop nop ta T_CHANGE_HPRIV mov 0xbbc, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x1db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdc40 ! 661: LDDA_R ldda [%r31, %r0] 0xe2, %r0 frzptr_4_587: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 662: BN bn,a frzptr_4_588: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdb20 ! 663: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_589), 16, 16)) -> intp(mask2tid(0x4),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,920,*,*,1) xir_4_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_589: and %g1, 2, %g1 brnz,a %g1, xirwait_4_589 ldx [%r17], %g1 xir_4_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852379 ! 664: WR_CLEAR_SOFTINT_I wr %r20, 0x0379, %clear_softint .word 0xa7703270 ! 665: POPC_I popc 0x1270, %r19 .word 0xd8bfe1ca ! 666: STDA_I stda %r12, [%r31 + 0x01ca] %asi frzptr_4_590: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800002 ! 667: BN bn,a mondo_4_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d940004 ! 668: WRPR_WSTATE_R wrpr %r16, %r4, %wstate nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_592: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_592) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,752,*,*,1)') ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_592: wrhpr %g0, 0x75a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 669: RDPC rd %pc, %r11 pmu_4_593: nop nop ta T_CHANGE_PRIV setx 0xffffffbfffffffa4, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xa9a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f20 .word 0x9f803e82 ! 671: SIR sir 0x1e82 mondo_4_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d928012 ! 672: WRPR_WSTATE_R wrpr %r10, %r18, %wstate jmptr_4_595: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_596)+8 , 16, 16)) -> intp(6,0,12,*,736,*,77,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_596)&0xffffffff)+8 , 16, 16)) -> intp(5,0,31,*,744,*,77,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c35 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c35, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_597), 16, 16)) -> intp(mask2tid(0x4),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,912,*,*,1) xir_4_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_597: and %g1, 2, %g1 brnz,a %g1, xirwait_4_597 ldx [%r17], %g1 xir_4_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f350 ! 675: WR_CLEAR_SOFTINT_I wr %r7, 0x1350, %clear_softint .word 0xe927e138 ! 676: STF_I st %f20, [0x0138, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_598) , 16, 16)) -> intp(7,0,16,*,912,*,ee,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_598)&0xffffffff) , 16, 16)) -> intp(1,0,12,*,904,*,ee,1) #else set 0xc8000b49, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_598: .word 0x9bb104d4 ! 677: FCMPNE32 fcmpne32 %d4, %d20, %r13 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_4 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_599: wrhpr %g0, 0xad3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c720 ! 678: CASA_I casa [%r31] 0x39, %r0, %r13 frzptr_4_600: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe1d0 ! 1: STXFSR_I st-sfr %f1, [0x01d0, %r31] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdb20 ! 679: STDFA_R stda %f16, [%r0, %r31] .word 0x87a98a54 ! 680: FCMPd fcmpd %fcc, %f6, %f20 nop nop mov 0x0, %r18 splash_cmpr_4_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 681: SIAM siam 1 demap_4_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r12, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0x4d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe0d1 ! 682: LDD_I ldd [%r31 + 0x00d1], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_4_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_604-donret_4_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d49100 | (0x89 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x6d6, %htstate wrhpr %g0, 0x149, %hpstate ! rand=1 (4) .word 0x26cc4001 ! 1: BRLZ brlz,a,pt %r17, retry donretarg_4_604: .word 0xd66fe1be ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x01be] .word 0xd6dfc2c0 ! 684: LDXA_R ldxa [%r31, %r0] 0x16, %r11 .word 0x91904010 ! 685: WRPR_PIL_R wrpr %r1, %r16, %pil nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_4 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_607: wrhpr %g0, 0x403, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7df00 ! 686: CASA_I casa [%r31] 0xf8, %r0, %r11 .word 0x93b4458a ! 687: FCMPGT32 fcmpgt32 %d48, %d10, %r9 mondo_4_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94000b ! 688: WRPR_WSTATE_R wrpr %r16, %r11, %wstate cwp_4_609: set user_data_start, %o7 .word 0x93902004 ! 689: WRPR_CWP_I wrpr %r0, 0x0004, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d903ca3 ! 691: WRPR_PSTATE_I wrpr %r0, 0x1ca3, %pstate .word 0xc1bfe160 ! 692: STDFA_I stda %f0, [0x0160, %r31] .word 0x3c800001 ! 1: BPOS bpos,a .word 0x8d902f45 ! 693: WRPR_PSTATE_I wrpr %r0, 0x0f45, %pstate nop nop mov 0x1, %r18 splash_cmpr_4_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_612)+8 , 16, 16)) -> intp(4,0,22,*,712,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_612)&0xffffffff)+8 , 16, 16)) -> intp(3,0,9,*,720,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_4_613: .word 0x81983aac ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x1aac, %hpstate .word 0x95b50481 ! 696: FCMPLE32 fcmple32 %d20, %d32, %r10 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_4 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_615: wrhpr %g0, 0x8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c720 ! 697: CASA_I casa [%r31] 0x39, %r0, %r16 brcommon2_4_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe110 ! 1: PREFETCH_I prefetch [%r31 + 0x0110], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0x81b7c7c0 ! 698: PDIST pdistn %d62, %d0, %d0 .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xa3520000 ! 700: RDPR_PIL mondo_4_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c8] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d91c011 ! 701: WRPR_WSTATE_R wrpr %r7, %r17, %wstate .word 0xd51fe150 ! 702: LDDF_I ldd [%r31, 0x0150], %f10 .word 0xd48008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 splash_lsu_4_619: nop nop ta T_CHANGE_HPRIV set 0x53b67bd1, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x09400001 ! 1: FBPL fbl stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 704: FBPULE fbule,a,pn %fcc0, intveclr_4_620: nop nop ta T_CHANGE_HPRIV setx 0x12060c6d457f1e88, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 705: FBPLG fblg nop nop ta T_CHANGE_HPRIV ! macro donret_4_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_621-donret_4_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000fa400 | (0x58 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x60c, %htstate wrhpr %g0, 0x6d9, %hpstate ! rand=1 (4) .word 0x35400002 ! 1: FBPUE fbue,a,pn %fcc0, done donretarg_4_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_4_622: set user_data_start, %o7 .word 0x93902001 ! 707: WRPR_CWP_I wrpr %r0, 0x0001, %cwp .word 0xc1bfda60 ! 708: STDFA_R stda %f0, [%r0, %r31] frzptr_4_623: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 709: BN bn,a intveclr_4_624: nop nop ta T_CHANGE_HPRIV setx 0xd19f9e4c0346763b, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 710: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_625: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_625) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,960,*,*,1)') ifelse(7,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_625: wrhpr %g0, 0x68b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 711: RDPC rd %pc, %r17 .word 0xe1e7c200 ! 712: CASA_I casa [%r31] 0x10, %r0, %r16 splash_lsu_4_627: nop nop ta T_CHANGE_HPRIV set 0x1e8d5767, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x22cc4001 ! 1: BRZ brz,a,pt %r17, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 713: FBPULE fbule,a,pn %fcc0, mondo_4_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d940004 ! 714: WRPR_WSTATE_R wrpr %r16, %r4, %wstate .word 0x8d903829 ! 715: WRPR_PSTATE_I wrpr %r0, 0x1829, %pstate .word 0xa1b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r16 .word 0x9f8029ab ! 716: SIR sir 0x09ab .word 0xe11fe000 ! 717: LDDF_I ldd [%r31, 0x0000], %f16 nop nop set 0x31700d10, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_631: .word 0xa5b444c9 ! 718: FCMPNE32 fcmpne32 %d48, %d40, %r18 .word 0xd6bfc3c0 ! 719: STDA_R stda %r11, [%r31 + %r0] 0x1e nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_633: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_633) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1008,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_633: wrhpr %g0, 0xc52, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 720: RDPC rd %pc, %r10 mondo_4_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3c8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d930010 ! 721: WRPR_WSTATE_R wrpr %r12, %r16, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_635), 16, 16)) -> intp(mask2tid(0x4),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,648,*,*,1) xir_4_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_635: and %g1, 2, %g1 brnz,a %g1, xirwait_4_635 ldx [%r17], %g1 xir_4_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81757c ! 722: WR_CLEAR_SOFTINT_I wr %r5, 0x157c, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_4 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_636: wrhpr %g0, 0x191, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c720 ! 723: CASA_I casa [%r31] 0x39, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_637: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_637) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,672,*,*,1)') ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_637: wrhpr %g0, 0xd59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 724: RDPC rd %pc, %r16 jmptr_4_638: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xc09fdf00 ! 726: LDDA_R ldda [%r31, %r0] 0xf8, %r0 .word 0xd88008a0 ! 727: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 nop nop mov 0x1, %r18 splash_cmpr_4_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_640)+8 , 16, 16)) -> intp(3,0,30,*,952,*,cc,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_640)&0xffffffff)+8 , 16, 16)) -> intp(5,0,25,*,896,*,cc,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x0, %r18 splash_cmpr_4_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 730: SIAM siam 1 cancelint_4_643: rdhpr %halt, %r13 .word 0x85880000 ! 731: ALLCLEAN .word 0xe9e7df00 ! 732: CASA_I casa [%r31] 0xf8, %r0, %r20 splash_hpstate_4_645: .word 0x81982f8d ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x0f8d, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_646) , 16, 16)) -> intp(2,0,12,*,752,*,3e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_646)&0xffffffff) , 16, 16)) -> intp(0,0,0,*,968,*,3e,1) #else set 0x960bb30, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_4_646: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802977 ! 734: SIR sir 0x0977 .word 0x91940006 ! 735: WRPR_PIL_R wrpr %r16, %r6, %pil br_longdelay1_4_648: .word 0x0d400001 ! 1: FBPG fbg .word 0xbfe7c000 ! 736: SAVE_R save %r31, %r0, %r31 splash_lsu_4_649: nop nop ta T_CHANGE_HPRIV set 0xa305c35e, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 737: FBPULE fbule splash_tba_4_650: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fda60 ! 739: LDDFA_R ldda [%r31, %r0], %f0 .word 0xe19fda60 ! 740: LDDFA_R ldda [%r31, %r0], %f16 intveclr_4_651: nop nop ta T_CHANGE_HPRIV setx 0x5aefdd566ce1c1e0, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xe1bfda00 ! 742: STDFA_R stda %f16, [%r0, %r31] .word 0x8d903ad7 ! 743: WRPR_PSTATE_I wrpr %r0, 0x1ad7, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_653), 16, 16)) -> intp(mask2tid(0x4),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,912,*,*,1) xir_4_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_653: and %g1, 2, %g1 brnz,a %g1, xirwait_4_653 ldx [%r17], %g1 xir_4_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8475f9 ! 744: WR_CLEAR_SOFTINT_I wr %r17, 0x15f9, %clear_softint .word 0x99b28492 ! 745: FCMPLE32 fcmple32 %d10, %d18, %r12 .word 0xe9e7dc40 ! 746: CASA_I casa [%r31] 0xe2, %r0, %r20 nop nop mov 0x1, %r18 splash_cmpr_4_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_656)+8 , 16, 16)) -> intp(0,0,21,*,680,*,54,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_656)&0xffffffff)+8 , 16, 16)) -> intp(2,0,13,*,696,*,54,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x9190ec6a ! 748: WRPR_PIL_I wrpr %r3, 0x0c6a, %pil mondo_4_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d92c011 ! 749: WRPR_WSTATE_R wrpr %r11, %r17, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_659)+8 , 16, 16)) -> intp(6,0,24,*,1000,*,c5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_659)&0xffffffff)+8 , 16, 16)) -> intp(3,0,1,*,920,*,c5,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982177 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0177, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_4_660: rdhpr %halt, %r8 .word 0x85880000 ! 752: ALLCLEAN .word 0x2a780001 ! 753: BPCS .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_4_661: ta T_CHANGE_NONPRIV ! macro frzptr_4_662: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_4_663: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983254 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1254, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_4_665: rdhpr %halt, %r12 .word 0x85880000 ! 758: ALLCLEAN intveclr_4_666: nop nop ta T_CHANGE_HPRIV setx 0x3708f242a14b443a, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x8d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_4_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3d0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d94c011 ! 760: WRPR_WSTATE_R wrpr %r19, %r17, %wstate nop nop mov 0x1, %r18 splash_cmpr_4_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_668)+8 , 16, 16)) -> intp(2,0,9,*,904,*,1d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_668)&0xffffffff)+8 , 16, 16)) -> intp(4,0,28,*,928,*,1d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 761: SIAM siam 1 vahole6_4_669: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd03fe1b0 ! 762: STD_I std %r8, [%r31 + 0x01b0] nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_670: wrhpr %g0, 0xa8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c3c0 ! 763: CASA_I casa [%r31] 0x1e, %r0, %r8 ibp_4_671: nop nop .word 0xd11fe1f0 ! 764: LDDF_I ldd [%r31, 0x01f0], %f8 mondo_4_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d92c005 ! 765: WRPR_WSTATE_R wrpr %r11, %r5, %wstate .word 0xd0dfc400 ! 766: LDXA_R ldxa [%r31, %r0] 0x20, %r8 splash_tba_4_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc09fdc40 ! 768: LDDA_R ldda [%r31, %r0] 0xe2, %r0 .word 0x8d903413 ! 769: WRPR_PSTATE_I wrpr %r0, 0x1413, %pstate .word 0xd0bfe080 ! 770: STDA_I stda %r8, [%r31 + 0x0080] %asi .word 0xe1bfe0e0 ! 771: STDFA_I stda %f16, [0x00e0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_677: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_677) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,944,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_677: wrhpr %g0, 0x6d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 772: RDPC rd %pc, %r16 br_badelay2_4_678: .word 0xa5a309c9 ! 1: FDIVd fdivd %f12, %f40, %f18 allclean .word 0xa7b44312 ! 773: ALIGNADDRESS alignaddr %r17, %r18, %r19 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_4 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_679: wrhpr %g0, 0xbc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d140 ! 774: CASA_I casa [%r31] 0x8a, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_680), 16, 16)) -> intp(mask2tid(0x4),1,3,*,744,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,920,*,*,1) xir_4_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_680: and %g1, 2, %g1 brnz,a %g1, xirwait_4_680 ldx [%r17], %g1 xir_4_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82f67a ! 775: WR_CLEAR_SOFTINT_I wr %r11, 0x167a, %clear_softint splash_lsu_4_681: nop nop ta T_CHANGE_HPRIV set 0x0d3bea90, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x1d400001 ! 1: FBPULE fbule stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_682), 16, 16)) -> intp(mask2tid(0x4),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,696,*,*,1) xir_4_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_682: and %g1, 2, %g1 brnz,a %g1, xirwait_4_682 ldx [%r17], %g1 xir_4_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822d1f ! 777: WR_CLEAR_SOFTINT_I wr %r8, 0x0d1f, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_683)+8 , 16, 16)) -> intp(1,0,13,*,752,*,4f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_683)&0xffffffff)+8 , 16, 16)) -> intp(6,0,18,*,744,*,4f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819821ed ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x01ed, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_4_684: nop nop .word 0xf1efe0c0 ! 779: PREFETCHA_I prefetcha [%r31, + 0x00c0] %asi, #24 .word 0xe31fe010 ! 1: LDDF_I ldd [%r31, 0x0010], %f17 .word 0x9f8031a7 ! 780: SIR sir 0x11a7 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_685), 16, 16)) -> intp(mask2tid(0x4),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,976,*,*,1) xir_4_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_685: and %g1, 2, %g1 brnz,a %g1, xirwait_4_685 ldx [%r17], %g1 xir_4_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f73f ! 781: WR_CLEAR_SOFTINT_I wr %r19, 0x173f, %clear_softint .word 0xc19fda60 ! 782: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_686) , 16, 16)) -> intp(1,0,25,*,696,*,17,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_686)&0xffffffff) , 16, 16)) -> intp(2,0,29,*,704,*,17,1) #else set 0xdc07bcd, %r28 !TTID : 3 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7b244c5 ! 1: FCMPNE32 fcmpne32 %d40, %d36, %r19 intvec_4_686: .word 0x97b244d4 ! 783: FCMPNE32 fcmpne32 %d40, %d20, %r11 .word 0xc1bfc2c0 ! 784: STDFA_R stda %f0, [%r0, %r31] brcommon3_4_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e170 ! 1: STQF_I - %f11, [0x0170, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r15, [%r0] ASI_LSU_CONTROL .word 0x97aac833 ! 785: FMOVGE fmovs %fcc1, %f19, %f11 nop nop mov 0x1, %r18 splash_cmpr_4_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_688)+8 , 16, 16)) -> intp(4,0,25,*,976,*,84,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_688)&0xffffffff)+8 , 16, 16)) -> intp(5,0,8,*,664,*,84,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_4_689: nop nop .word 0xe1bfde00 ! 787: STDFA_R stda %f16, [%r0, %r31] .word 0xe027e080 ! 788: STW_I stw %r16, [%r31 + 0x0080] splash_tba_4_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_691: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_691) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,656,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_691: wrhpr %g0, 0x448, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 790: RDPC rd %pc, %r18 .word 0xa3a409d4 ! 791: FDIVd fdivd %f16, %f20, %f48 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_4_693: nop nop ta T_CHANGE_HPRIV setx 0x5c56027b77bfc04c, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_4_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_694-donret_4_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00fcc300 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f5f, %htstate best_set_reg(0x1af3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (4) retry .align 2048 donretarg_4_694: .word 0xa1a189d2 ! 794: FDIVd fdivd %f6, %f18, %f16 nop nop set 0xd8c03537, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_695: .word 0x99b104c1 ! 795: FCMPNE32 fcmpne32 %d4, %d32, %r12 .word 0xda2fe17a ! 796: STB_I stb %r13, [%r31 + 0x017a] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_696) , 16, 16)) -> intp(6,0,25,*,672,*,7e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_696)&0xffffffff) , 16, 16)) -> intp(6,0,19,*,904,*,7e,1) #else set 0x9b009275, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a489d2 ! 1: FDIVd fdivd %f18, %f18, %f16 intvec_4_696: .word 0x9f802106 ! 797: SIR sir 0x0106 .word 0x9bb40492 ! 798: FCMPLE32 fcmple32 %d16, %d18, %r13 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_698)+8 , 16, 16)) -> intp(5,0,21,*,976,*,d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_698)&0xffffffff)+8 , 16, 16)) -> intp(7,0,16,*,896,*,d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983dd7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1dd7, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0xdb50d0e1, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_699: .word 0xa1b404d0 ! 800: FCMPNE32 fcmpne32 %d16, %d16, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_700), 16, 16)) -> intp(mask2tid(0x4),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,752,*,*,1) xir_4_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_700: and %g1, 2, %g1 brnz,a %g1, xirwait_4_700 ldx [%r17], %g1 xir_4_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817311 ! 801: WR_CLEAR_SOFTINT_I wr %r5, 0x1311, %clear_softint .word 0xc1bfdb40 ! 802: STDFA_R stda %f0, [%r0, %r31] cancelint_4_701: rdhpr %halt, %r10 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_4_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_702)+8 , 16, 16)) -> intp(4,0,15,*,1016,*,de,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_702)&0xffffffff)+8 , 16, 16)) -> intp(1,0,28,*,672,*,de,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_4_703: ta T_CHANGE_NONHPRIV .word 0x8198368f ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x168f, %hpstate .word 0xe49fc3c0 ! 1: LDDA_R ldda [%r31, %r0] 0x1e, %r18 .word 0x9f802bda ! 806: SIR sir 0x0bda nop nop mov 0x1, %r18 splash_cmpr_4_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_704)+8 , 16, 16)) -> intp(1,0,29,*,960,*,46,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_704)&0xffffffff)+8 , 16, 16)) -> intp(2,0,1,*,712,*,46,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_705: wrhpr %g0, 0x40a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c280 ! 808: CASA_I casa [%r31] 0x14, %r0, %r18 pmu_4_706: nop nop setx 0xffffffbeffffffa9, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_4_707: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdc00 ! 810: LDDFA_R ldda [%r31, %r0], %f0 frzptr_4_708: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_709: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_709) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,984,*,*,1)') ifelse(3,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_709: wrhpr %g0, 2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 812: RDPC rd %pc, %r9 pmu_4_710: nop nop setx 0xffffffb9ffffffa6, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0x95c078c0, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_711: .word 0x9f8027ea ! 814: SIR sir 0x07ea splash_hpstate_4_712: .word 0x81983616 ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x1616, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_4 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_713: wrhpr %g0, 0xcc1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c540 ! 816: CASA_I casa [%r31] 0x2a, %r0, %r12 brcommon3_4_714: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7d160 ! 1: CASA_I casa [%r31] 0x8b, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x81982ecf ! 817: WRHPR_HPSTATE_I wrhpr %r0, 0x0ecf, %hpstate .word 0x9194c013 ! 818: WRPR_PIL_R wrpr %r19, %r19, %pil mondo_4_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d91400d ! 819: WRPR_WSTATE_R wrpr %r5, %r13, %wstate nop nop mov 0x1, %r18 splash_cmpr_4_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_717)+8 , 16, 16)) -> intp(7,0,17,*,936,*,e7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_717)&0xffffffff)+8 , 16, 16)) -> intp(1,0,5,*,672,*,e7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_718: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_718) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,968,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_718: wrhpr %g0, 0x612, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 821: RDPC rd %pc, %r8 nop nop set 0x1d702a42, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802966 ! 1: SIR sir 0x0966 intvec_4_719: .word 0x9f80245d ! 822: SIR sir 0x045d splash_lsu_4_720: nop nop ta T_CHANGE_HPRIV set 0x5a36eca0, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 823: FBPULE fbule .word 0xe83fe170 ! 1: STD_I std %r20, [%r31 + 0x0170] .word 0x9f803891 ! 824: SIR sir 0x1891 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_721: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_721) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,928,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_721: wrhpr %g0, 0x21a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 825: RDPC rd %pc, %r16 .word 0xe93fe0e0 ! 826: STDF_I std %f20, [0x00e0, %r31] br_badelay3_4_723: .word 0x34800001 ! 1: BG bg,a .word 0x02800001 ! 1: BE be .word 0xd711c002 ! 1: LDQF_R - [%r7, %r2], %f11 .word 0xa3a44829 ! 827: FADDs fadds %f17, %f9, %f17 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_724) , 16, 16)) -> intp(3,0,12,*,968,*,86,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_724)&0xffffffff) , 16, 16)) -> intp(2,0,16,*,640,*,86,1) #else set 0x96f01281, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f80206d ! 1: SIR sir 0x006d intvec_4_724: .word 0xa1b504d1 ! 828: FCMPNE32 fcmpne32 %d20, %d48, %r16 nop nop set 0x83d00d8c, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_725: .word 0x97a189d2 ! 829: FDIVd fdivd %f6, %f18, %f42 .word 0x91948010 ! 830: WRPR_PIL_R wrpr %r18, %r16, %pil jmptr_4_727: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x10800002 ! 1: BA ba .word 0x8d903175 ! 832: WRPR_PSTATE_I wrpr %r0, 0x1175, %pstate mondo_4_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d914013 ! 833: WRPR_WSTATE_R wrpr %r5, %r19, %wstate ibp_4_730: nop nop .word 0xa3a449d4 ! 834: FDIVd fdivd %f48, %f20, %f48 cwp_4_731: set user_data_start, %o7 .word 0x93902000 ! 835: WRPR_CWP_I wrpr %r0, 0x0000, %cwp jmptr_4_732: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_4_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3d8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d950011 ! 837: WRPR_WSTATE_R wrpr %r20, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_734) , 16, 16)) -> intp(5,0,28,*,968,*,bd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_734)&0xffffffff) , 16, 16)) -> intp(6,0,1,*,728,*,bd,1) #else set 0x3860c2f7, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803dbe ! 1: SIR sir 0x1dbe intvec_4_734: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803340 ! 838: SIR sir 0x1340 brcommon3_4_735: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x00800001 ! 839: BN bn mondo_4_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3c8] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d918009 ! 840: WRPR_WSTATE_R wrpr %r6, %r9, %wstate nop nop set 0x980f409, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_737: .word 0xa5a289d2 ! 841: FDIVd fdivd %f10, %f18, %f18 splash_lsu_4_738: nop nop ta T_CHANGE_HPRIV set 0x23345786, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 842: FBPULE fbule mondo_4_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d91c012 ! 843: WRPR_WSTATE_R wrpr %r7, %r18, %wstate .word 0x29400002 ! 1: FBPL fbl,a,pn %fcc0, .word 0x8d903206 ! 844: WRPR_PSTATE_I wrpr %r0, 0x1206, %pstate nop nop set 0x8ab0f818, %r28 !TTID : 0 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93a509c7 ! 1: FDIVd fdivd %f20, %f38, %f40 intvec_4_741: .word 0xa7b4c4d4 ! 845: FCMPNE32 fcmpne32 %d50, %d20, %r19 mondo_4_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d948011 ! 846: WRPR_WSTATE_R wrpr %r18, %r17, %wstate trapasi_4_743: nop mov 0x8, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_744: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_744) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,688,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_744: wrhpr %g0, 0x1c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 849: RDPC rd %pc, %r19 mondo_4_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d92000a ! 850: WRPR_WSTATE_R wrpr %r8, %r10, %wstate .word 0xc1bfda00 ! 851: STDFA_R stda %f0, [%r0, %r31] nop nop mov 0x1, %r18 splash_cmpr_4_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_747)+8 , 16, 16)) -> intp(0,0,15,*,728,*,3e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_747)&0xffffffff)+8 , 16, 16)) -> intp(2,0,19,*,712,*,3e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_4_748: set 0x60340000, %r31 .word 0x8581be8e ! 853: WRCCR_I wr %r6, 0x1e8e, %ccr nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_4 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_749: wrhpr %g0, 0x110, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c2e0 ! 854: CASA_I casa [%r31] 0x17, %r0, %r18 .word 0x9191a307 ! 855: WRPR_PIL_I wrpr %r6, 0x0307, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_750) , 16, 16)) -> intp(5,0,12,*,688,*,46,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_750)&0xffffffff) , 16, 16)) -> intp(6,0,9,*,960,*,46,1) #else set 0xbe10d446, %r28 !TTID : 4 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_4_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x95a189c3 ! 856: FDIVd fdivd %f6, %f34, %f10 nop nop set 0x496005b1, %r28 !TTID : 5 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_751: .word 0x9f802393 ! 857: SIR sir 0x0393 cancelint_4_752: rdhpr %halt, %r12 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_753: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_753) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,656,*,*,1)') ifelse(5,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_753: wrhpr %g0, 0xf19, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 859: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_754) , 16, 16)) -> intp(5,0,20,*,992,*,54,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_754)&0xffffffff) , 16, 16)) -> intp(4,0,28,*,640,*,54,1) #else set 0x2110eeb1, %r28 !TTID : 6 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5b404c6 ! 1: FCMPNE32 fcmpne32 %d16, %d6, %r18 intvec_4_754: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803f97 ! 860: SIR sir 0x1f97 brcommon3_4_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe130 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0130] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9026d7 ! 861: WRPR_PSTATE_I wrpr %r0, 0x06d7, %pstate nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_4_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982995 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0995, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_4 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_757: wrhpr %g0, 0xe02, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d040 ! 863: CASA_I casa [%r31] 0x82, %r0, %r18 .word 0x879020bc ! 864: WRPR_TT_I wrpr %r0, 0x00bc, %tt trapasi_4_758: nop mov 0x0, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_4_759: nop nop ta T_CHANGE_HPRIV set 0xb792b933, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 866: FBPULE fbule,a,pn %fcc0, .word 0xe477e154 ! 867: STX_I stx %r18, [%r31 + 0x0154] br_badelay2_4_760: .word 0xa1a4c9d3 ! 1: FDIVd fdivd %f50, %f50, %f16 pdist %f12, %f10, %f10 .word 0x93b44311 ! 868: ALIGNADDRESS alignaddr %r17, %r17, %r9 intveclr_4_761: nop nop ta T_CHANGE_HPRIV setx 0x6fee0245ff1b5810, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 869: FBPLG fblg .word 0xc32fc000 ! 870: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xc19fc2c0 ! 871: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_764: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_764) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,920,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_764: wrhpr %g0, 0x658, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 872: RDPC rd %pc, %r12 .word 0xd8dfdf00 ! 873: LDXA_R ldxa [%r31, %r0] 0xf8, %r12 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_4 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_766: wrhpr %g0, 0xa8b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c080 ! 874: CASA_I casa [%r31] 0x 4, %r0, %r12 nop nop set 0x51d0127d, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x4),`.align 16') stxa %r28, [%g0] 0x73 intvec_4_767: .word 0x9f8020ad ! 875: SIR sir 0x00ad brcommon1_4_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe1f0 ! 1: STXFSR_I st-sfr %f1, [0x01f0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0x99a309b3 ! 876: FDIVs fdivs %f12, %f19, %f12 frzptr_4_769: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_4_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe130 ! 1: PREFETCH_I prefetch [%r31 + 0x0130], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0xc1bfda60 ! 878: STDFA_R stda %f0, [%r0, %r31] .word 0x91a049b0 ! 879: FDIVs fdivs %f1, %f16, %f8 brcommon1_4_772: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0x91703ad5 ! 880: POPC_I popc 0x1ad5, %r8 .word 0xc19fdb40 ! 881: LDDFA_R ldda [%r31, %r0], %f0 splash_tba_4_774: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_4_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffa2, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, .word 0x8d903d95 ! 884: WRPR_PSTATE_I wrpr %r0, 0x1d95, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_777), 16, 16)) -> intp(mask2tid(0x4),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,944,*,*,1) xir_4_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_777: and %g1, 2, %g1 brnz,a %g1, xirwait_4_777 ldx [%r17], %g1 xir_4_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80adf8 ! 885: WR_CLEAR_SOFTINT_I wr %r2, 0x0df8, %clear_softint .word 0xd037e030 ! 886: STH_I sth %r8, [%r31 + 0x0030] .word 0xe19fe0a0 ! 887: LDDFA_I ldda [%r31, 0x00a0], %f16 splash_lsu_4_778: nop nop ta T_CHANGE_HPRIV set 0xa3c05ba6, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2e800001 ! 1: BVS bvs,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 888: FBPULE fbule,a,pn %fcc0, brcommon2_4_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 889: PDIST pdistn %d62, %d0, %d16 mondo_4_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3c8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d908009 ! 890: WRPR_WSTATE_R wrpr %r2, %r9, %wstate nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_781: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_781) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,680,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_781: wrhpr %g0, 0xf8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 891: RDPC rd %pc, %r18 fbge,a,pn %fcc0, skip_4_782 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0xa7a1c9cd ! 1: FDIVd fdivd %f38, %f44, %f50 stxa %r18, [%r0] ASI_LSU_CONTROL .align 128 skip_4_782: .word 0xc30fc000 ! 892: LDXFSR_R ld-fsr [%r31, %r0], %f1 intveclr_4_783: nop nop ta T_CHANGE_HPRIV setx 0xff3239ada41f621b, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 893: FBPLG fblg,a,pn %fcc0, jmptr_4_784: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_4_785: set user_data_start, %o7 .word 0x93902002 ! 895: WRPR_CWP_I wrpr %r0, 0x0002, %cwp vahole6_4_786: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd31fe1e0 ! 896: LDDF_I ldd [%r31, 0x01e0], %f9 pmu_4_787: nop nop setx 0xffffffb7ffffffa6, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- vahole2_4_788: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfdf00 ! 898: STDFA_R stda %f16, [%r0, %r31] mondo_4_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d950011 ! 899: WRPR_WSTATE_R wrpr %r20, %r17, %wstate mondo_4_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d908012 ! 900: WRPR_WSTATE_R wrpr %r2, %r18, %wstate mondo_4_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d94c014 ! 901: WRPR_WSTATE_R wrpr %r19, %r20, %wstate nop nop mov 0x0, %r18 splash_cmpr_4_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_793)+8 , 16, 16)) -> intp(5,0,2,*,912,*,1d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_793)&0xffffffff)+8 , 16, 16)) -> intp(2,0,24,*,736,*,1d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198311c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x111c, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_4_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e060 ! 1: STQF_I - %f9, [0x0060, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0xa1aac822 ! 904: FMOVGE fmovs %fcc1, %f2, %f16 cancelint_4_795: rdhpr %halt, %r11 .word 0x85880000 ! 905: ALLCLEAN pmu_4_796: nop nop setx 0xffffffbfffffffa7, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_4_797: nop nop ta T_CHANGE_HPRIV setx 0x58af96d86354f9ed, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_798: wrhpr %g0, 0x55a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c2e0 ! 908: CASA_I casa [%r31] 0x17, %r0, %r12 ibp_4_799: nop nop .word 0x99702f9f ! 909: POPC_I popc 0x0f9f, %r12 ibp_4_800: nop nop .word 0xe8dfd000 ! 910: LDXA_R ldxa [%r31, %r0] 0x80, %r20 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xc09fc2c0 ! 912: LDDA_R ldda [%r31, %r0] 0x16, %r0 brcommon3_4_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe1e0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x01e0] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0x91aac82c ! 913: FMOVGE fmovs %fcc1, %f12, %f8 cancelint_4_803: rdhpr %halt, %r16 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_4_804: .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, .word 0x81983fc0 ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x1fc0, %hpstate jmptr_4_805: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_4_806: nop nop .word 0x87ac0a41 ! 917: FCMPd fcmpd %fcc, %f16, %f32 .word 0xd03fe150 ! 918: STD_I std %r8, [%r31 + 0x0150] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_808), 16, 16)) -> intp(mask2tid(0x4),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,704,*,*,1) xir_4_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_808: and %g1, 2, %g1 brnz,a %g1, xirwait_4_808 ldx [%r17], %g1 xir_4_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8538d6 ! 919: WR_CLEAR_SOFTINT_I wr %r20, 0x18d6, %clear_softint .word 0xd097c200 ! 1: LDUHA_R lduha [%r31, %r0] 0x10, %r8 .word 0x9f8023b1 ! 920: SIR sir 0x03b1 jmptr_4_809: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_4_810: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_4_811: .word 0x81982681 ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x0681, %hpstate ibp_4_812: nop nop .word 0x20800001 ! 924: BN bn,a frzptr_4_813: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x91b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r8 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_4_814: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_4_815: .word 0x36800001 ! 1: BGE bge,a .word 0x81983f13 ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x1f13, %hpstate memptr_4_816: set user_data_start, %r31 .word 0x85812c61 ! 928: WRCCR_I wr %r4, 0x0c61, %ccr nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_817: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_817) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,672,*,*,1)') ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_817: wrhpr %g0, 0x7d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 929: RDPC rd %pc, %r18 .word 0xc19fdb20 ! 930: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_819: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_819) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1016,*,*,1)') ifelse(6,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_819: wrhpr %g0, 0x7c8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 931: RDPC rd %pc, %r19 br_badelay1_4_820: .word 0x9ba7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f44 .word 0xd534a613 ! 1: STQF_I - %f10, [0x0613, %r18] .word 0xe23fe070 ! 1: STD_I std %r17, [%r31 + 0x0070] normalw .word 0x97458000 ! 932: RD_SOFTINT_REG rd %softint, %r11 fpinit_4_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 933: FCMPd fcmpd %fcc, %f0, %f4 .word 0x8d902555 ! 934: WRPR_PSTATE_I wrpr %r0, 0x0555, %pstate mondo_4_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r5, [%r0+0x3d8] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d91c012 ! 935: WRPR_WSTATE_R wrpr %r7, %r18, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_4_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_4_824: .word 0x8f902001 ! 937: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tba_4_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_4_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_826)+8 , 16, 16)) -> intp(3,0,15,*,656,*,96,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_826)&0xffffffff)+8 , 16, 16)) -> intp(6,0,20,*,912,*,96,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983145 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1145, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_4_827: nop ta T_CHANGE_PRIV setx 0x0000000400380000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e1b8 ! 941: STX_I stx %r16, [%r31 + 0x01b8] br_badelay1_4_828: .word 0x14800001 ! 1: BG bg .word 0xa1b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r16 .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, normalw .word 0xa7458000 ! 942: RD_SOFTINT_REG rd %softint, %r19 nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_829: wrhpr %g0, 0x181, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d000 ! 943: CASA_I casa [%r31] 0x80, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_4_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc32fe0a0 ! 946: STXFSR_I st-sfr %f1, [0x00a0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_4_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_4 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_4_832: wrhpr %g0, 0x2d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7dc40 ! 947: CASA_I casa [%r31] 0xe2, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_833: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_833) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,680,*,*,1)') ifelse(0,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_833: wrhpr %g0, 0x10b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 948: RDPC rd %pc, %r10 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_834) , 16, 16)) -> intp(6,0,14,*,656,*,4f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_834)&0xffffffff) , 16, 16)) -> intp(0,0,6,*,712,*,4f,1) #else set 0x1ca0c23f, %r28 !TTID : 2 (mask2tid(0x4)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_4_834: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7a149d4 ! 951: FDIVd fdivd %f36, %f20, %f50 splash_tba_4_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_836), 16, 16)) -> intp(mask2tid(0x4),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,696,*,*,1) xir_4_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_836: and %g1, 2, %g1 brnz,a %g1, xirwait_4_836 ldx [%r17], %g1 xir_4_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846096 ! 953: WR_CLEAR_SOFTINT_I wr %r17, 0x0096, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_837), 16, 16)) -> intp(mask2tid(0x4),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x4),1,3,*,952,*,*,1) xir_4_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_4_837: and %g1, 2, %g1 brnz,a %g1, xirwait_4_837 ldx [%r17], %g1 xir_4_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab823c6b ! 954: WR_CLEAR_SOFTINT_I wr %r8, 0x1c6b, %clear_softint mondo_4_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3c8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d91c003 ! 955: WRPR_WSTATE_R wrpr %r7, %r3, %wstate pmu_4_839: nop nop setx 0xffffffb1ffffffa5, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xd29fc400 ! 1: LDDA_R ldda [%r31, %r0] 0x20, %r9 .word 0x9f802246 ! 957: SIR sir 0x0246 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_840: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_840) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,984,*,*,1)') ifelse(1,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_840: wrhpr %g0, 0x74b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 958: RDPC rd %pc, %r8 cancelint_4_841: rdhpr %halt, %r18 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe000 ! 960: LDDFA_I ldda [%r31, 0x0000], %f0 nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_842: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_842) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,976,*,*,1)') ifelse(4,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_842: wrhpr %g0, 0x1c1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 961: RDPC rd %pc, %r18 intveclr_4_843: nop nop ta T_CHANGE_HPRIV setx 0x8f9b0c65910fe473, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 962: FBPLG fblg,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_4_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_4_844)+8 , 16, 16)) -> intp(3,0,6,*,712,*,e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_4_844)&0xffffffff)+8 , 16, 16)) -> intp(6,0,22,*,976,*,e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_4_845: nop nop wrhpr %g0, 0x39a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x917034db ! 964: POPC_I popc 0x14db, %r8 frzptr_4_846: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdc40 ! 965: LDDFA_R ldda [%r31, %r0], %f0 nop nop mov 0x0, %r18 splash_cmpr_4_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_4_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd897d140 ! 968: LDUHA_R lduha [%r31, %r0] 0x8a, %r12 cancelint_4_850: rdhpr %halt, %r16 .word 0x85880000 ! 969: ALLCLEAN .word 0x9194c007 ! 970: WRPR_PIL_R wrpr %r19, %r7, %pil .word 0xc19fe120 ! 971: LDDFA_I ldda [%r31, 0x0120], %f0 .word 0xe277e0bc ! 972: STX_I stx %r17, [%r31 + 0x00bc] .word 0x91914010 ! 973: WRPR_PIL_R wrpr %r5, %r16, %pil splash_lsu_4_853: nop nop ta T_CHANGE_HPRIV set 0x6487b7d2, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x26c94001 ! 1: BRLZ brlz,a,pt %r5, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 974: FBPULE fbule,a,pn %fcc0, frzptr_4_854: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_4_855: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_4_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_4_856-donret_4_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x007a3300 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xb17, %htstate wrhpr %g0, 0xc53, %hpstate ! rand=1 (4) ldx [%r12+%r0], %g1 retry donretarg_4_856: .word 0x8d902546 ! 977: WRPR_PSTATE_I wrpr %r0, 0x0546, %pstate .word 0xc19fe100 ! 978: LDDFA_I ldda [%r31, 0x0100], %f0 .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, .word 0x8d903f25 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1f25, %pstate .word 0xe28008a0 ! 980: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x4+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_4_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_4_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 4 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_4_858: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x4),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x4),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_4_858) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,1000,*,*,1)') ifelse(2,mask2tid(0x4),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_4_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x4),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_4_858: wrhpr %g0, 0x252, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 982: RDPC rd %pc, %r12 .word 0xe03fe1d0 ! 983: STD_I std %r16, [%r31 + 0x01d0] jmptr_4_860: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0x95b207d3 ! 985: PDIST pdistn %d8, %d50, %d10 .word 0xe93fe1a0 ! 986: STDF_I std %f20, [0x01a0, %r31] vahole3_4_863: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xc32fc000 ! 987: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x9f8032c9 ! 988: SIR sir 0x12c9 splash_lsu_4_864: nop nop ta T_CHANGE_HPRIV set 0xe96a3edb, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x25400002 ! 1: FBPLG fblg,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 989: FBPULE fbule brcommon2_4_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a7c960 ! 1: FMULq dis not found ba,a .+8 jmpl %r27-0, %r27 .word 0xc19fdf20 ! 990: LDDFA_R ldda [%r31, %r0], %f0 ibp_4_866: nop nop wrhpr %g0, 0xa9a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe29fc400 ! 991: LDDA_R ldda [%r31, %r0] 0x20, %r17 memptr_4_867: set user_data_start, %r31 .word 0x8584eb7f ! 992: WRCCR_I wr %r19, 0x0b7f, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0xe2bfdf00 ! 1: STDA_R stda %r17, [%r31 + %r0] 0xf8 .word 0x9f803c27 ! 994: SIR sir 0x1c27 .word 0xe23fe060 ! 1: STD_I std %r17, [%r31 + 0x0060] .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] mov 0xb5, %r30 .word 0x91d0001e ! 995: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0x9f802140 ! 996: SIR sir 0x0140 .word 0xe227e0d5 ! 997: STW_I stw %r17, [%r31 + 0x00d5] .word 0xe23fe100 ! 998: STD_I std %r17, [%r31 + 0x0100] vahole6_4_871: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xe33fe000 ! 999: STDF_I std %f17, [0x0000, %r31] splash_tba_4_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_2: wrhpr %g0, 0xf8a, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_2_0: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e070 ! 2: STF_I st %f8, [0x0070, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_2 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_1: wrhpr %g0, 0x690, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c180 ! 3: CASA_I casa [%r31] 0x c, %r0, %r8 dvapa_2_2: nop nop ta T_CHANGE_HPRIV mov 0xa0f, %r20 mov 0x5, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x912, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5a189c8 ! 4: FDIVd fdivd %f6, %f8, %f18 nop nop set 0xce900c80, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802157 ! 1: SIR sir 0x0157 intvec_2_3: .word 0xa3a1c9c7 ! 5: FDIVd fdivd %f38, %f38, %f48 br_longdelay3_2_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8198355d ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x155d, %hpstate mondo_2_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d90c00d ! 7: WRPR_WSTATE_R wrpr %r3, %r13, %wstate .word 0xc1bfc3e0 ! 8: STDFA_R stda %f0, [%r0, %r31] br_badelay3_2_7: .word 0x32800002 ! 1: BNE bne,a .word 0x12800001 ! 1: BNE bne .word 0xd5140009 ! 1: LDQF_R - [%r16, %r9], %f10 .word 0x91a18831 ! 9: FADDs fadds %f6, %f17, %f8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_8), 16, 16)) -> intp(mask2tid(0x2),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) xir_2_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_8: and %g1, 2, %g1 brnz,a %g1, xirwait_2_8 ldx [%r17], %g1 xir_2_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842a24 ! 10: WR_CLEAR_SOFTINT_I wr %r16, 0x0a24, %clear_softint .word 0x2acc4001 ! 1: BRNZ brnz,a,pt %r17, .word 0x8d902031 ! 11: WRPR_PSTATE_I wrpr %r0, 0x0031, %pstate .word 0xe33fe0c0 ! 12: STDF_I std %f17, [0x00c0, %r31] nop nop set 0xfaf083ee, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_11: .word 0x9f802891 ! 13: SIR sir 0x0891 vahole2_2_12: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xc1bfdb40 ! 14: STDFA_R stda %f0, [%r0, %r31] ibp_2_13: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_13: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_13 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_13: brnz %r16, ibp_wait2_13 ld [%r23], %r16 ba ibp_startwait2_13 mov 0x2, %r16 continue_ibp_2_13: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_13: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_13 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_13: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_13 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_13: best_set_reg(0x00000040cbc00c85,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x93703d25 ! 15: POPC_I popc 0x1d25, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_2_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_14-donret_2_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00167500 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x10cc, %htstate best_set_reg(0xe71, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) ldx [%r12+%r0], %g1 retry donretarg_2_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_2_15: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_2 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_16: wrhpr %g0, 0xc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c540 ! 18: CASA_I casa [%r31] 0x2a, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_17: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_17) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,928,*,*,1)') ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_17: wrhpr %g0, 0x1c8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 19: RDPC rd %pc, %r20 .word 0x9f803da4 ! 20: SIR sir 0x1da4 brcommon3_2_18: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd29fc180 ! 21: LDDA_R ldda [%r31, %r0] 0x0c, %r9 .word 0x9f803b29 ! 22: SIR sir 0x1b29 .word 0x91d020b5 ! 23: Tcc_I ta icc_or_xcc, %r0 + 181 br_badelay2_2_19: .word 0x32800001 ! 1: BNE bne,a pdist %f8, %f6, %f12 .word 0xa9b2c314 ! 24: ALIGNADDRESS alignaddr %r11, %r20, %r20 ibp_2_20: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_20: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_20 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_20: brnz %r16, ibp_wait2_20 ld [%r23], %r16 ba ibp_startwait2_20 mov 0x2, %r16 continue_ibp_2_20: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_20: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_20 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_20: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_20 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_20: best_set_reg(0x00000040f1cc8562,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdb40 ! 25: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_21)+8 , 16, 16)) -> intp(4,0,17,*,984,*,eb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_21)&0xffffffff)+8 , 16, 16)) -> intp(7,0,30,*,736,*,eb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198320e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x120e, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_2_22: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 27: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_2 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_23: wrhpr %g0, 0xe59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c280 ! 28: CASA_I casa [%r31] 0x14, %r0, %r17 mondo_2_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948010 ! 29: WRPR_WSTATE_R wrpr %r18, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_2 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_25: wrhpr %g0, 0xc93, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c6c0 ! 30: CASA_I casa [%r31] 0x36, %r0, %r17 .word 0xe22fe0d8 ! 31: STB_I stb %r17, [%r31 + 0x00d8] brcommon3_2_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe31fe0f0 ! 32: LDDF_I ldd [%r31, 0x00f0], %f17 .word 0xe3e7c540 ! 1: CASA_I casa [%r31] 0x2a, %r0, %r17 .word 0xa3a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f48 mov 0xb3, %r30 .word 0x91d0001e ! 33: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe19fe100 ! 34: LDDFA_I ldda [%r31, 0x0100], %f16 brcommon3_2_27: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe31fe100 ! 35: LDDF_I ldd [%r31, 0x0100], %f17 nop nop mov 0x1, %r18 splash_cmpr_2_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_28)+8 , 16, 16)) -> intp(5,0,5,*,968,*,83,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_28)&0xffffffff)+8 , 16, 16)) -> intp(6,0,15,*,1016,*,83,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 36: SIAM siam 1 jmptr_2_29: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_30: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_30) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,680,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_30: wrhpr %g0, 0xfd3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 38: RDPC rd %pc, %r10 cancelint_2_31: rdhpr %halt, %r8 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_33), 16, 16)) -> intp(mask2tid(0x2),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1008,*,*,1) xir_2_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_33: and %g1, 2, %g1 brnz,a %g1, xirwait_2_33 ldx [%r17], %g1 xir_2_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80aad7 ! 41: WR_CLEAR_SOFTINT_I wr %r2, 0x0ad7, %clear_softint frzptr_2_34: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 42: BN bn,a brcommon3_2_35: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe0a0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00a0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 43: BN bn,a frzptr_2_36: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 44: BN bn,a nop nop set 0xd6908d73, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_37: .word 0xa7a409c7 ! 45: FDIVd fdivd %f16, %f38, %f50 frzptr_2_38: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe070 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0070] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 46: BN bn nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_39: wrhpr %g0, 0x798, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c2c0 ! 47: CASA_I casa [%r31] 0x16, %r0, %r16 vahole2_2_40: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xc1bfc3e0 ! 48: STDFA_R stda %f0, [%r0, %r31] .word 0xe0dfd920 ! 49: LDXA_R ldxa [%r31, %r0] 0xc9, %r16 nop nop mov 0x0, %r18 splash_cmpr_2_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 50: SIAM siam 1 mondo_2_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3e8] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d91c010 ! 51: WRPR_WSTATE_R wrpr %r7, %r16, %wstate .word 0xe09fe130 ! 52: LDDA_I ldda [%r31, + 0x0130] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_44) , 16, 16)) -> intp(5,0,18,*,944,*,93,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_44)&0xffffffff) , 16, 16)) -> intp(4,0,15,*,992,*,93,1) #else set 0xd701467, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_44: .word 0x9f802bcd ! 53: SIR sir 0x0bcd .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_2_46: rdhpr %halt, %r16 .word 0x85880000 ! 55: ALLCLEAN brcommon3_2_47: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe010 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0010] ba,a .+8 jmpl %r27-4, %r27 .word 0xc32fe170 ! 56: STXFSR_I st-sfr %f1, [0x0170, %r31] dvapa_2_48: nop nop ta T_CHANGE_HPRIV mov 0xe8f, %r20 mov 0x16, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x89a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd03fe0e0 ! 57: STD_I std %r8, [%r31 + 0x00e0] cancelint_2_49: rdhpr %halt, %r18 .word 0x85880000 ! 58: ALLCLEAN intveclr_2_50: nop nop ta T_CHANGE_HPRIV setx 0xad69ddd8ee4d309f, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xf82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 59: FBPLG fblg,a,pn %fcc0, pmu_2_51: nop nop setx 0xffffffb3ffffffab, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_2_52: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e0a0 ! 1: STQF_I - %f10, [0x00a0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xd4dfc2c0 ! 61: LDXA_R ldxa [%r31, %r0] 0x16, %r10 mondo_2_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r11, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d940014 ! 62: WRPR_WSTATE_R wrpr %r16, %r20, %wstate intveclr_2_54: nop nop ta T_CHANGE_HPRIV setx 0x4ba19de98833682d, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x21b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 63: FBPLG fblg,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_55), 16, 16)) -> intp(mask2tid(0x2),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) xir_2_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_55: and %g1, 2, %g1 brnz,a %g1, xirwait_2_55 ldx [%r17], %g1 xir_2_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ed49 ! 64: WR_CLEAR_SOFTINT_I wr %r19, 0x0d49, %clear_softint ibp_2_56: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_56: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_56 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_56: brnz %r16, ibp_wait2_56 ld [%r23], %r16 ba ibp_startwait2_56 mov 0x2, %r16 continue_ibp_2_56: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_56: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_56 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_56: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_56 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_56: best_set_reg(0x00000050e2c5625d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x87ad0a4d ! 65: FCMPd fcmpd %fcc, %f20, %f44 ibp_2_57: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_57: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_57 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_57: brnz %r16, ibp_wait2_57 ld [%r23], %r16 ba ibp_startwait2_57 mov 0x2, %r16 continue_ibp_2_57: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_57: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_57 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_57: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_57 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_57: best_set_reg(0x00000050dce25dd0,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x990, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99b487d0 ! 66: PDIST pdistn %d18, %d16, %d12 .word 0xc19fc3e0 ! 67: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_59), 16, 16)) -> intp(mask2tid(0x2),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) xir_2_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_59: and %g1, 2, %g1 brnz,a %g1, xirwait_2_59 ldx [%r17], %g1 xir_2_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84355b ! 68: WR_CLEAR_SOFTINT_I wr %r16, 0x155b, %clear_softint br_longdelay4_2_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902004 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate .word 0xe69fd160 ! 70: LDDA_R ldda [%r31, %r0] 0x8b, %r19 .word 0xc1bfdc00 ! 71: STDFA_R stda %f0, [%r0, %r31] splash_tba_2_62: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_2_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3e8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d92c009 ! 73: WRPR_WSTATE_R wrpr %r11, %r9, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_64) , 16, 16)) -> intp(2,0,12,*,896,*,a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_64)&0xffffffff) , 16, 16)) -> intp(4,0,26,*,648,*,a,1) #else set 0xaa4063da, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f802d14 ! 1: SIR sir 0x0d14 intvec_2_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 74: FBPUGE fbuge mondo_2_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3e0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d940012 ! 75: WRPR_WSTATE_R wrpr %r16, %r18, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_66), 16, 16)) -> intp(mask2tid(0x2),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,744,*,*,1) xir_2_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_66: and %g1, 2, %g1 brnz,a %g1, xirwait_2_66 ldx [%r17], %g1 xir_2_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846e33 ! 76: WR_CLEAR_SOFTINT_I wr %r17, 0x0e33, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_67), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,760,*,*,1) xir_2_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_67: and %g1, 2, %g1 brnz,a %g1, xirwait_2_67 ldx [%r17], %g1 xir_2_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843a6d ! 77: WR_CLEAR_SOFTINT_I wr %r16, 0x1a6d, %clear_softint splash_hpstate_2_68: ta T_CHANGE_NONHPRIV .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, .word 0x81982417 ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x0417, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_2 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_69: wrhpr %g0, 0xb43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c400 ! 79: CASA_I casa [%r31] 0x20, %r0, %r19 .word 0xe73fe080 ! 1: STDF_I std %f19, [0x0080, %r31] .word 0xe7e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r19 mov 0x31, %r30 .word 0x91d0001e ! 80: Tcc_R ta icc_or_xcc, %r0 + %r30 splash_lsu_2_70: nop nop ta T_CHANGE_HPRIV set 0x2a062a8e, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x1a800001 ! 1: BCC bcc stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x0, %r18 splash_cmpr_2_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_72), 16, 16)) -> intp(mask2tid(0x2),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,680,*,*,1) xir_2_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_72: and %g1, 2, %g1 brnz,a %g1, xirwait_2_72 ldx [%r17], %g1 xir_2_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f4e5 ! 83: WR_CLEAR_SOFTINT_I wr %r19, 0x14e5, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_73: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_73) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,728,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_73: wrhpr %g0, 0xbd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 84: RDPC rd %pc, %r19 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_74)+8 , 16, 16)) -> intp(3,0,9,*,704,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_74)&0xffffffff)+8 , 16, 16)) -> intp(3,0,27,*,968,*,33,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d44 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d44, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_2_75: set user_data_start, %o7 .word 0x93902000 ! 86: WRPR_CWP_I wrpr %r0, 0x0000, %cwp cwp_2_76: set user_data_start, %o7 .word 0x93902007 ! 87: WRPR_CWP_I wrpr %r0, 0x0007, %cwp brcommon1_2_77: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-0, %r27 .word 0xa3a309d0 ! 88: FDIVd fdivd %f12, %f16, %f48 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_78), 16, 16)) -> intp(mask2tid(0x2),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,760,*,*,1) xir_2_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_78: and %g1, 2, %g1 brnz,a %g1, xirwait_2_78 ldx [%r17], %g1 xir_2_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853a58 ! 89: WR_CLEAR_SOFTINT_I wr %r20, 0x1a58, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_2_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_79-donret_2_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00707e00 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xdc5, %htstate best_set_reg(0xb8a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) done donretarg_2_79: .word 0x8d90344d ! 90: WRPR_PSTATE_I wrpr %r0, 0x144d, %pstate .word 0xc19fe1c0 ! 91: LDDFA_I ldda [%r31, 0x01c0], %f0 ibp_2_80: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_80: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_80 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_80: brnz %r16, ibp_wait2_80 ld [%r23], %r16 ba ibp_startwait2_80 mov 0x2, %r16 continue_ibp_2_80: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_80: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_80 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_80: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_80 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_80: best_set_reg(0x0000005003ddd0f5,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xd4dfc6c0 ! 92: LDXA_R ldxa [%r31, %r0] 0x36, %r10 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_81: wrhpr %g0, 0x241, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c720 ! 93: CASA_I casa [%r31] 0x39, %r0, %r10 trapasi_2_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_2_83: nop nop ta T_CHANGE_HPRIV setx 0x23cc259d36654e05, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 95: FBPLG fblg intveclr_2_84: nop nop ta T_CHANGE_HPRIV setx 0x19a7ff970f390997, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x300, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 96: FBPLG fblg frzptr_2_85: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 97: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100a0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_86: !! CWQ interrupt (206100a0) goes to TID 5 ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_86) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,976,*,*,1)') ifelse(5,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_86: wrhpr %g0, 0x992, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 98: RDPC rd %pc, %r18 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_87: wrhpr %g0, 0xe9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c3c0 ! 99: CASA_I casa [%r31] 0x1e, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_2_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_88-donret_2_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00340e00 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x104d, %htstate best_set_reg(0xf3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) ldx [%r12+%r0], %g1 retry donretarg_2_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_2_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba brlz,a,pn %r20, skip_2_90 fblg,a,pn %fcc0, skip_2_90 .align 4096 skip_2_90: .word 0xa9a109c3 ! 102: FDIVd fdivd %f4, %f34, %f20 .word 0x93b28491 ! 103: FCMPLE32 fcmple32 %d10, %d48, %r9 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_92), 16, 16)) -> intp(mask2tid(0x2),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,744,*,*,1) xir_2_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_92: and %g1, 2, %g1 brnz,a %g1, xirwait_2_92 ldx [%r17], %g1 xir_2_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab812471 ! 104: WR_CLEAR_SOFTINT_I wr %r4, 0x0471, %clear_softint ibp_2_93: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_93: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_93 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_93: brnz %r16, ibp_wait2_93 ld [%r23], %r16 ba ibp_startwait2_93 mov 0x2, %r16 continue_ibp_2_93: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_93: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_93 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_93: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_93 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_93: best_set_reg(0x0000004037d0f5ab,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xc19fdf20 ! 105: LDDFA_R ldda [%r31, %r0], %f0 nop nop mov 0x1, %r18 splash_cmpr_2_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_94)+8 , 16, 16)) -> intp(7,0,1,*,912,*,d6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_94)&0xffffffff)+8 , 16, 16)) -> intp(3,0,6,*,712,*,d6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 106: SIAM siam 1 frzptr_2_95: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fda00 ! 107: LDDFA_R ldda [%r31, %r0], %f0 .word 0x9f802e75 ! 108: SIR sir 0x0e75 nop nop ta T_CHANGE_HPRIV ! macro donret_2_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_96-donret_2_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00944200 | (0x8a << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x15df, %htstate wrhpr %g0, 0x512, %hpstate ! rand=1 (2) ldx [%r12+%r0], %g1 retry donretarg_2_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x3c780001 ! 110: BPPOS .word 0xc32fe020 ! 111: STXFSR_I st-sfr %f1, [0x0020, %r31] splash_tba_2_98: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x709067e3, %r28 !TTID : 7 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_99: .word 0x39400001 ! 113: FBPUGE fbuge,a,pn %fcc0, memptr_2_100: set 0x60740000, %r31 .word 0x858463ea ! 114: WRCCR_I wr %r17, 0x03ea, %ccr nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_101: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_101) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,976,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_101: wrhpr %g0, 0xe48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 115: RDPC rd %pc, %r18 splash_tba_2_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_2_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983ec3 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1ec3, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_104: wrhpr %g0, 0xf49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c3c0 ! 118: CASA_I casa [%r31] 0x1e, %r0, %r13 ibp_2_105: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_105: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_105 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_105: brnz %r16, ibp_wait2_105 ld [%r23], %r16 ba ibp_startwait2_105 mov 0x2, %r16 continue_ibp_2_105: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_105: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_105 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_105: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_105 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_105: best_set_reg(0x000000402df5ab36,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x87aa0a51 ! 119: FCMPd fcmpd %fcc, %f8, %f48 ibp_2_106: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_106: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_106 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_106: brnz %r16, ibp_wait2_106 ld [%r23], %r16 ba ibp_startwait2_106 mov 0x2, %r16 continue_ibp_2_106: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_106: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_106 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_106: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_106 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_106: best_set_reg(0x0000005026eb3698,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xdadfdf00 ! 120: LDXA_R ldxa [%r31, %r0] 0xf8, %r13 mondo_2_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d948012 ! 121: WRPR_WSTATE_R wrpr %r18, %r18, %wstate .word 0xc19fdd40 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe1f0 ! 123: LDDA_I ldda [%r31, + 0x01f0] %asi, %r13 brcommon3_2_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0xa1aac832 ! 124: FMOVGE fmovs %fcc1, %f18, %f16 .word 0xe037e031 ! 125: STH_I sth %r16, [%r31 + 0x0031] frzptr_2_109: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702190 ! 1: POPC_I popc 0x0190, %r16 best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 126: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_110: wrhpr %g0, 17, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d140 ! 127: CASA_I casa [%r31] 0x8a, %r0, %r16 nop nop set 0x6ca081f1, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f802e0f ! 1: SIR sir 0x0e0f intvec_2_111: .word 0x9f802646 ! 128: SIR sir 0x0646 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_112) , 16, 16)) -> intp(3,0,17,*,984,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_112)&0xffffffff) , 16, 16)) -> intp(3,0,5,*,744,*,53,1) #else set 0x3720fef8, %r28 !TTID : 6 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x97a4c9c6 ! 1: FDIVd fdivd %f50, %f6, %f42 intvec_2_112: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x95a4c9cd ! 129: FDIVd fdivd %f50, %f44, %f10 .word 0xe1bfde20 ! 130: STDFA_R stda %f16, [%r0, %r31] .word 0xd41fe1b0 ! 131: LDD_I ldd [%r31 + 0x01b0], %r10 .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_2_116: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe070 ! 134: LDDA_I ldda [%r31, + 0x0070] %asi, %r10 intveclr_2_117: nop nop ta T_CHANGE_HPRIV setx 0xf3be790f5544ad54, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xf92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x06c88001 ! 1: BRLZ brlz,pt %r2, .word 0x8d9029b5 ! 136: WRPR_PSTATE_I wrpr %r0, 0x09b5, %pstate .word 0xd497c2c0 ! 137: LDUHA_R lduha [%r31, %r0] 0x16, %r10 ibp_2_120: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_120: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_120 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_120: brnz %r16, ibp_wait2_120 ld [%r23], %r16 ba ibp_startwait2_120 mov 0x2, %r16 continue_ibp_2_120: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_120: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_120 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_120: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_120 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_120: best_set_reg(0x00000040c8f698de,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x3c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd43fe120 ! 138: STD_I std %r10, [%r31 + 0x0120] .word 0x8d903a27 ! 139: WRPR_PSTATE_I wrpr %r0, 0x1a27, %pstate frzptr_2_122: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x95b7c4c0 ! 1: FCMPNE32 fcmpne32 %d62, %d0, %r10 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 140: BN bn,a nop nop set 0x92801d5b, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_123: .word 0x9f802c44 ! 141: SIR sir 0x0c44 .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_2_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819827c7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07c7, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_2_126: ta T_CHANGE_NONHPRIV .word 0x28800001 ! 1: BLEU bleu,a .word 0x81983f9c ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x1f9c, %hpstate demap_2_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, stxa %g3, [%g3] 0x5f wrhpr %g0, 0x291, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe023 ! 145: LDD_I ldd [%r31 + 0x0023], %r19 .word 0xe63fe170 ! 146: STD_I std %r19, [%r31 + 0x0170] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_128)+8 , 16, 16)) -> intp(3,0,28,*,648,*,a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_128)&0xffffffff)+8 , 16, 16)) -> intp(6,0,29,*,640,*,a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819829cd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x09cd, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_2_129: rdhpr %halt, %r20 .word 0x85880000 ! 148: ALLCLEAN splash_tba_2_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_2_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_131-donret_2_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00761300 | (32 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x10dd, %htstate best_set_reg(0xb71, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) done donretarg_2_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_132) , 16, 16)) -> intp(6,0,27,*,712,*,32,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_132)&0xffffffff) , 16, 16)) -> intp(0,0,9,*,920,*,32,1) #else set 0x7800a7f4, %r28 !TTID : 7 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7a4c9d4 ! 151: FDIVd fdivd %f50, %f20, %f50 memptr_2_133: set 0x60540000, %r31 .word 0x85842684 ! 152: WRCCR_I wr %r16, 0x0684, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0xe73fe050 ! 154: STDF_I std %f19, [0x0050, %r31] .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe170 ! 156: LDD_I ldd [%r31 + 0x0170], %r19 .word 0xe0bfde20 ! 157: STDA_R stda %r16, [%r31 + %r0] 0xf1 splash_lsu_2_136: nop nop ta T_CHANGE_HPRIV set 0x7f441021, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x32800001 ! 1: BNE bne,a stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 158: FBPULE fbule,a,pn %fcc0, .word 0xe697c2c0 ! 159: LDUHA_R lduha [%r31, %r0] 0x16, %r19 bvc skip_2_137 .word 0xa7a149d1 ! 1: FDIVd fdivd %f36, %f48, %f50 .align 2048 skip_2_137: .word 0x9f802070 ! 160: SIR sir 0x0070 dvapa_2_138: nop nop ta T_CHANGE_HPRIV mov 0x8cf, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x8d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2dfdd40 ! 161: LDXA_R ldxa [%r31, %r0] 0xea, %r9 .word 0xd2bfc600 ! 162: STDA_R stda %r9, [%r31 + %r0] 0x30 intveclr_2_140: nop nop ta T_CHANGE_HPRIV setx 0x1e40854195dbe2a5, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x6d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 163: FBPLG fblg,a,pn %fcc0, .word 0xc1bfda60 ! 164: STDFA_R stda %f0, [%r0, %r31] brcommon3_2_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa9aac831 ! 165: FMOVGE fmovs %fcc1, %f17, %f20 brcommon3_2_142: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-0, %r27 .word 0xe49fc180 ! 166: LDDA_R ldda [%r31, %r0] 0x0c, %r18 .word 0x9191000a ! 167: WRPR_PIL_R wrpr %r4, %r10, %pil frzptr_2_144: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfc2c0 ! 168: STDFA_R stda %f0, [%r0, %r31] splash_hpstate_2_145: ta T_CHANGE_NONHPRIV .word 0x81983411 ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x1411, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_146: wrhpr %g0, 0x681, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c3c0 ! 170: CASA_I casa [%r31] 0x1e, %r0, %r18 splash_lsu_2_147: nop nop ta T_CHANGE_HPRIV set 0xef3741b3, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x10800001 ! 1: BA ba stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 171: FBPULE fbule,a,pn %fcc0, ble,a skip_2_148 fbl,a,pn %fcc0, skip_2_148 .align 2048 skip_2_148: .word 0x9f802d1a ! 172: SIR sir 0x0d1a .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_2_149: set 0x60140000, %r31 .word 0x8580ef43 ! 174: WRCCR_I wr %r3, 0x0f43, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_150), 16, 16)) -> intp(mask2tid(0x2),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,648,*,*,1) xir_2_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_150: and %g1, 2, %g1 brnz,a %g1, xirwait_2_150 ldx [%r17], %g1 xir_2_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847b47 ! 175: WR_CLEAR_SOFTINT_I wr %r17, 0x1b47, %clear_softint nop nop mov 0x0, %r18 splash_cmpr_2_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_152) , 16, 16)) -> intp(2,0,22,*,1000,*,2b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_152)&0xffffffff) , 16, 16)) -> intp(6,0,21,*,648,*,2b,1) #else set 0xd240a22a, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99a309d2 ! 1: FDIVd fdivd %f12, %f18, %f12 intvec_2_152: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80355f ! 177: SIR sir 0x155f mondo_2_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d910003 ! 178: WRPR_WSTATE_R wrpr %r4, %r3, %wstate .word 0xd427e194 ! 179: STW_I stw %r10, [%r31 + 0x0194] nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_154: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_154) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,720,*,*,1)') ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_154: wrhpr %g0, 0xc11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 180: RDPC rd %pc, %r10 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_2 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_155: wrhpr %g0, 0x3d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c280 ! 182: CASA_I casa [%r31] 0x14, %r0, %r9 .word 0xa5b04fe1 ! 183: FONES e %f18 splash_tba_2_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_2_157: rdhpr %halt, %r18 .word 0x85880000 ! 185: ALLCLEAN .word 0x87a8cad4 ! 186: FCMPEd fcmped %fcc, %f34, %f20 frzptr_2_158: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 187: BN bn nop nop set 0xe4e06734, %r28 !TTID : 7 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_159: .word 0x19400001 ! 188: FBPUGE fbuge .word 0xd437e142 ! 189: STH_I sth %r10, [%r31 + 0x0142] change_to_randtl_2_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_2_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_162), 16, 16)) -> intp(mask2tid(0x2),1,3,*,968,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,936,*,*,1) xir_2_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_162: and %g1, 2, %g1 brnz,a %g1, xirwait_2_162 ldx [%r17], %g1 xir_2_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81b8fa ! 192: WR_CLEAR_SOFTINT_I wr %r6, 0x18fa, %clear_softint .word 0x91940009 ! 193: WRPR_PIL_R wrpr %r16, %r9, %pil memptr_2_164: set 0x60140000, %r31 .word 0x8581a208 ! 194: WRCCR_I wr %r6, 0x0208, %ccr .word 0xd497c540 ! 195: LDUHA_R lduha [%r31, %r0] 0x2a, %r10 frzptr_2_166: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc40 ! 196: STDFA_R stda %f16, [%r0, %r31] brcommon1_2_167: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0x87a84a53 ! 197: FCMPd fcmpd %fcc, %f32, %f50 dvapa_2_168: nop nop ta T_CHANGE_HPRIV mov 0xa93, %r20 mov 0x15, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x59b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd03fe0b0 ! 198: STD_I std %r8, [%r31 + 0x00b0] .word 0xe0bfde20 ! 199: STDA_R stda %r16, [%r31 + %r0] 0xf1 .word 0x9750c000 ! 200: RDPR_TT .word 0xf16fe110 ! 201: PREFETCH_I prefetch [%r31 + 0x0110], #24 fpinit_2_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 202: FCMPd fcmpd %fcc, %f0, %f4 .word 0xe1bfdb20 ! 203: STDFA_R stda %f16, [%r0, %r31] cwp_2_172: set user_data_start, %o7 .word 0x93902007 ! 204: WRPR_CWP_I wrpr %r0, 0x0007, %cwp nop nop set 0xe7a0e0a4, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x99b4c4ca ! 1: FCMPNE32 fcmpne32 %d50, %d10, %r12 intvec_2_173: .word 0x91b104c2 ! 205: FCMPNE32 fcmpne32 %d4, %d2, %r8 splash_lsu_2_174: nop nop ta T_CHANGE_HPRIV set 0x6418c896, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 206: FBPULE fbule,a,pn %fcc0, ibp_2_175: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_175: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_175 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_175: brnz %r16, ibp_wait2_175 ld [%r23], %r16 ba ibp_startwait2_175 mov 0x2, %r16 continue_ibp_2_175: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_175: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_175 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_175: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_175 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_175: best_set_reg(0x000000403bd8de54,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x00800001 ! 207: BN bn dvapa_2_176: nop nop ta T_CHANGE_HPRIV mov 0xd7a, %r20 mov 0x17, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x30b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdb40 ! 208: STDFA_R stda %f16, [%r0, %r31] splash_lsu_2_177: nop nop ta T_CHANGE_HPRIV set 0x03098655, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 209: FBPULE fbule nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_2 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_178: wrhpr %g0, 0x680, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c080 ! 210: CASA_I casa [%r31] 0x 4, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_179), 16, 16)) -> intp(mask2tid(0x2),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,664,*,*,1) xir_2_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_179: and %g1, 2, %g1 brnz,a %g1, xirwait_2_179 ldx [%r17], %g1 xir_2_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84685a ! 211: WR_CLEAR_SOFTINT_I wr %r17, 0x085a, %clear_softint .word 0x99a00549 ! 212: FSQRTd fsqrt cancelint_2_180: rdhpr %halt, %r19 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_181), 16, 16)) -> intp(mask2tid(0x2),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,992,*,*,1) xir_2_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_181: and %g1, 2, %g1 brnz,a %g1, xirwait_2_181 ldx [%r17], %g1 xir_2_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a1d5 ! 214: WR_CLEAR_SOFTINT_I wr %r18, 0x01d5, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_182: wrhpr %g0, 0x51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c200 ! 215: CASA_I casa [%r31] 0x10, %r0, %r10 dvapa_2_183: nop nop ta T_CHANGE_HPRIV mov 0xae4, %r20 mov 0x0, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x311, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fc3e0 ! 216: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_184), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,640,*,*,1) xir_2_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_184: and %g1, 2, %g1 brnz,a %g1, xirwait_2_184 ldx [%r17], %g1 xir_2_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8423c8 ! 217: WR_CLEAR_SOFTINT_I wr %r16, 0x03c8, %clear_softint vahole3_2_185: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xd4bfdf00 ! 218: STDA_R stda %r10, [%r31 + %r0] 0xf8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_186)+8 , 16, 16)) -> intp(0,0,22,*,680,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_186)&0xffffffff)+8 , 16, 16)) -> intp(0,0,18,*,680,*,33,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982cfd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0cfd, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_2_187: nop nop ta T_CHANGE_HPRIV mov 0xe53, %r20 mov 0x17, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x213, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd4bfdd40 ! 220: STDA_R stda %r10, [%r31 + %r0] 0xea pmu_2_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffad, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_2_189: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x95702140 ! 1: POPC_I popc 0x0140, %r10 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdb20 ! 222: STDFA_R stda %f0, [%r0, %r31] cancelint_2_190: rdhpr %halt, %r17 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_191: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_191) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,640,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_191: wrhpr %g0, 0xd11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 224: RDPC rd %pc, %r9 brcommon1_2_192: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x87aa0a51 ! 225: FCMPd fcmpd %fcc, %f8, %f48 nop nop mov 0x1, %r18 splash_cmpr_2_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_193)+8 , 16, 16)) -> intp(5,0,28,*,976,*,43,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_193)&0xffffffff)+8 , 16, 16)) -> intp(6,0,3,*,696,*,43,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_194)+8 , 16, 16)) -> intp(1,0,7,*,752,*,96,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_194)&0xffffffff)+8 , 16, 16)) -> intp(0,0,30,*,976,*,96,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982e0d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0e0d, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_195: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_195) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,920,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_195: wrhpr %g0, 0x403, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 228: RDPC rd %pc, %r10 .word 0x87902298 ! 229: WRPR_TT_I wrpr %r0, 0x0298, %tt nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_196: wrhpr %g0, 0x858, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7df00 ! 230: CASA_I casa [%r31] 0xf8, %r0, %r18 .word 0xe4bfd140 ! 231: STDA_R stda %r18, [%r31 + %r0] 0x8a .word 0xe43fe130 ! 232: STD_I std %r18, [%r31 + 0x0130] frzptr_2_199: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 233: BN bn,a .word 0x9f80339c ! 234: SIR sir 0x139c mondo_2_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948007 ! 235: WRPR_WSTATE_R wrpr %r18, %r7, %wstate splash_tba_2_201: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_202)+8 , 16, 16)) -> intp(5,0,18,*,704,*,97,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_202)&0xffffffff)+8 , 16, 16)) -> intp(2,0,28,*,944,*,97,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982de5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0de5, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_2_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3d8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d924013 ! 238: WRPR_WSTATE_R wrpr %r9, %r19, %wstate cancelint_2_204: rdhpr %halt, %r11 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_2_205: nop nop ta T_CHANGE_HPRIV set 0x3d1c2212, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 240: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_2_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_206-donret_2_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x005eba00 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x595, %htstate wrhpr %g0, 0x489, %hpstate ! rand=1 (2) ldx [%r12+%r0], %g1 retry donretarg_2_206: .word 0x05400001 ! 241: FBPLG fblg .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x91920011 ! 243: WRPR_PIL_R wrpr %r8, %r17, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_208), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,896,*,*,1) xir_2_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_208: and %g1, 2, %g1 brnz,a %g1, xirwait_2_208 ldx [%r17], %g1 xir_2_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f4c0 ! 244: WR_CLEAR_SOFTINT_I wr %r7, 0x14c0, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_209)+8 , 16, 16)) -> intp(1,0,27,*,720,*,86,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_209)&0xffffffff)+8 , 16, 16)) -> intp(3,0,20,*,912,*,86,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198345f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x145f, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_210: wrhpr %g0, 0xe41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d160 ! 246: CASA_I casa [%r31] 0x8b, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x0, %r18 splash_cmpr_2_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 248: SIAM siam 1 cancelint_2_212: rdhpr %halt, %r20 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_213)+8 , 16, 16)) -> intp(5,0,20,*,704,*,3a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_213)&0xffffffff)+8 , 16, 16)) -> intp(1,0,27,*,720,*,3a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982570 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0570, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d9039ac ! 251: WRPR_PSTATE_I wrpr %r0, 0x19ac, %pstate memptr_2_215: set 0x60340000, %r31 .word 0x8584f622 ! 252: WRCCR_I wr %r19, 0x1622, %ccr nop nop mov 0x1, %r18 splash_cmpr_2_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_216)+8 , 16, 16)) -> intp(0,0,22,*,912,*,7b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_216)&0xffffffff)+8 , 16, 16)) -> intp(0,0,19,*,1008,*,7b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_2_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7d040 ! 1: CASA_I casa [%r31] 0x82, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0xa7aac830 ! 254: FMOVGE fmovs %fcc1, %f16, %f19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_218) , 16, 16)) -> intp(2,0,23,*,760,*,a3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_218)&0xffffffff) , 16, 16)) -> intp(2,0,20,*,1000,*,a3,1) #else set 0x8fe05286, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_218: .word 0x9f802a10 ! 255: SIR sir 0x0a10 .word 0x91930014 ! 256: WRPR_PIL_R wrpr %r12, %r20, %pil ibp_2_220: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_220: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_220 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_220: brnz %r16, ibp_wait2_220 ld [%r23], %r16 ba ibp_startwait2_220 mov 0x2, %r16 continue_ibp_2_220: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_220: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_220 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_220: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_220 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_220: best_set_reg(0x0000004021de54ee,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa9b307d4 ! 257: PDIST pdistn %d12, %d20, %d20 .word 0xc32fe190 ! 258: STXFSR_I st-sfr %f1, [0x0190, %r31] cancelint_2_222: rdhpr %halt, %r19 .word 0x85880000 ! 259: ALLCLEAN .word 0xc1bfdb40 ! 260: STDFA_R stda %f0, [%r0, %r31] .word 0xc32fe050 ! 261: STXFSR_I st-sfr %f1, [0x0050, %r31] cancelint_2_225: rdhpr %halt, %r18 .word 0x85880000 ! 262: ALLCLEAN brcommon3_2_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r13, [%r0] ASI_LSU_CONTROL .word 0x99aac82d ! 263: FMOVGE fmovs %fcc1, %f13, %f12 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_227)+8 , 16, 16)) -> intp(3,0,8,*,648,*,12,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_227)&0xffffffff)+8 , 16, 16)) -> intp(1,0,10,*,744,*,12,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198359d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x159d, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_2_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe170 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0170] ba,a .+8 jmpl %r27+0, %r27 stxa %r15, [%r0] ASI_LSU_CONTROL .word 0x99aac82d ! 265: FMOVGE fmovs %fcc1, %f13, %f12 vahole3_2_229: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd69fc400 ! 266: LDDA_R ldda [%r31, %r0] 0x20, %r11 splash_hpstate_2_230: .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, .word 0x81983b95 ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x1b95, %hpstate memptr_2_231: set user_data_start, %r31 .word 0x85843b9c ! 268: WRCCR_I wr %r16, 0x1b9c, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_232) , 16, 16)) -> intp(5,0,3,*,1000,*,1a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_232)&0xffffffff) , 16, 16)) -> intp(1,0,24,*,680,*,1a,1) #else set 0x53308308, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x91a309d0 ! 1: FDIVd fdivd %f12, %f16, %f8 intvec_2_232: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 269: FBPUGE fbuge,a,pn %fcc0, pmu_2_233: nop nop ta T_CHANGE_PRIV setx 0xffffffbbffffffa0, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_2_234: nop nop ta T_CHANGE_HPRIV set 0xd740beeb, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_235), 16, 16)) -> intp(mask2tid(0x2),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,752,*,*,1) xir_2_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_235: and %g1, 2, %g1 brnz,a %g1, xirwait_2_235 ldx [%r17], %g1 xir_2_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847d3f ! 273: WR_CLEAR_SOFTINT_I wr %r17, 0x1d3f, %clear_softint .word 0xe31fe060 ! 274: LDDF_I ldd [%r31, 0x0060], %f17 .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick .word 0xe1bfdb20 ! 276: STDFA_R stda %f16, [%r0, %r31] .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_2_240: nop nop ta T_CHANGE_HPRIV set 0x61755636, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0a800001 ! 1: BCS bcs stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 278: FBPULE fbule,a,pn %fcc0, nop nop set 0xa1209c35, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_241: .word 0x95b404c5 ! 279: FCMPNE32 fcmpne32 %d16, %d36, %r10 mondo_2_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d93000d ! 280: WRPR_WSTATE_R wrpr %r12, %r13, %wstate dvapa_2_243: nop nop ta T_CHANGE_HPRIV mov 0xe2b, %r20 mov 0xb, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9bb40489 ! 281: FCMPLE32 fcmple32 %d16, %d40, %r13 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_244: wrhpr %g0, 0x8d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c2e0 ! 282: CASA_I casa [%r31] 0x17, %r0, %r20 .word 0xe8dfc280 ! 283: LDXA_R ldxa [%r31, %r0] 0x14, %r20 vahole3_2_246: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe93fe1f0 ! 284: STDF_I std %f20, [0x01f0, %r31] br_longdelay4_2_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902000 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_248: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_248) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,752,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_248: wrhpr %g0, 0x890, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 286: RDPC rd %pc, %r10 memptr_2_249: set user_data_start, %r31 .word 0x85806758 ! 287: WRCCR_I wr %r1, 0x0758, %ccr .word 0x91940013 ! 288: WRPR_PIL_R wrpr %r16, %r19, %pil mondo_2_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3d8] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d92c003 ! 289: WRPR_WSTATE_R wrpr %r11, %r3, %wstate cancelint_2_252: rdhpr %halt, %r11 .word 0x85880000 ! 290: ALLCLEAN jmptr_2_253: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_2_254: rdhpr %halt, %r8 .word 0x85880000 ! 292: ALLCLEAN frzptr_2_255: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x9ba7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f44 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfde20 ! 293: STDFA_R stda %f16, [%r0, %r31] .word 0xa9b147d2 ! 294: PDIST pdistn %d36, %d18, %d20 frzptr_2_257: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 295: BN bn,a br_badelay1_2_258: .word 0x01400001 ! 1: FBPN fbn .word 0xd937e0c0 ! 1: STQF_I - %f12, [0x00c0, %r31] .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, normalw .word 0xa3458000 ! 296: RD_SOFTINT_REG rd %softint, %r17 ibp_2_259: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_259: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_259 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_259: brnz %r16, ibp_wait2_259 ld [%r23], %r16 ba ibp_startwait2_259 mov 0x2, %r16 continue_ibp_2_259: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_259: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_259 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_259: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_259 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_259: best_set_reg(0x0000004093d4ee57,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x97702ff0 ! 297: POPC_I popc 0x0ff0, %r11 .word 0x91930014 ! 298: WRPR_PIL_R wrpr %r12, %r20, %pil brcommon2_2_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xe110c012 ! 1: LDQF_R - [%r3, %r18], %f16 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 299: BN bn,a splash_lsu_2_262: nop nop ta T_CHANGE_HPRIV set 0xb3ca7df8, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2a800001 ! 1: BCS bcs,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 300: FBPULE fbule,a,pn %fcc0, pmu_2_263: nop nop setx 0xffffffb1ffffffae, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_2_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_264)+8 , 16, 16)) -> intp(4,0,10,*,664,*,9e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_264)&0xffffffff)+8 , 16, 16)) -> intp(3,0,31,*,752,*,9e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_2_265: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_266), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1008,*,*,1) xir_2_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_266: and %g1, 2, %g1 brnz,a %g1, xirwait_2_266 ldx [%r17], %g1 xir_2_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80ffe8 ! 304: WR_CLEAR_SOFTINT_I wr %r3, 0x1fe8, %clear_softint nop nop set 0xf5c0f18e, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_2_267: .word 0x19400001 ! 305: FBPUGE fbuge mondo_2_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d92c006 ! 306: WRPR_WSTATE_R wrpr %r11, %r6, %wstate nop nop set 0xb1c0e373, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8033c6 ! 1: SIR sir 0x13c6 intvec_2_269: .word 0x99a4c9d2 ! 307: FDIVd fdivd %f50, %f18, %f12 ibp_2_270: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_270: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_270 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_270: brnz %r16, ibp_wait2_270 ld [%r23], %r16 ba ibp_startwait2_270 mov 0x2, %r16 continue_ibp_2_270: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_270: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_270 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_270: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_270 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_270: best_set_reg(0x00000050eaee575d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xc19fde00 ! 308: LDDFA_R ldda [%r31, %r0], %f0 frzptr_2_271: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702170 ! 1: POPC_I popc 0x0170, %r12 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 309: BN bn,a .word 0xd927e15a ! 310: STF_I st %f12, [0x015a, %r31] change_to_randtl_2_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_2_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_2_273: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fe120 ! 313: LDDFA_I ldda [%r31, 0x0120], %f0 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_274: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_274) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,760,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_274: wrhpr %g0, 0x941, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 314: RDPC rd %pc, %r13 memptr_2_275: set 0x60140000, %r31 .word 0x858475f3 ! 315: WRCCR_I wr %r17, 0x15f3, %ccr cancelint_2_276: rdhpr %halt, %r13 .word 0x85880000 ! 316: ALLCLEAN frzptr_2_277: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 317: BN bn,a br_badelay1_2_278: .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, normalw .word 0xa1458000 ! 318: RD_SOFTINT_REG rd %softint, %r16 nop nop mov 0x0, %r18 splash_cmpr_2_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 319: SIAM siam 1 mondo_2_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d92c006 ! 320: WRPR_WSTATE_R wrpr %r11, %r6, %wstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_2 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_281: wrhpr %g0, 0x180, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d040 ! 321: CASA_I casa [%r31] 0x82, %r0, %r19 frzptr_2_282: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xe7e7c240 ! 1: CASA_I casa [%r31] 0x12, %r0, %r19 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fde20 ! 322: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_283)+8 , 16, 16)) -> intp(4,0,23,*,920,*,a3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_283)&0xffffffff)+8 , 16, 16)) -> intp(3,0,5,*,736,*,a3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198254c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x054c, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_2 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_284: wrhpr %g0, 0x689, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c540 ! 324: CASA_I casa [%r31] 0x2a, %r0, %r19 vahole3_2_285: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xc32fc000 ! 325: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_2_287: set user_data_start, %o7 .word 0x93902005 ! 327: WRPR_CWP_I wrpr %r0, 0x0005, %cwp .word 0x9f803607 ! 328: SIR sir 0x1607 memptr_2_288: set user_data_start, %r31 .word 0x858337e6 ! 329: WRCCR_I wr %r12, 0x17e6, %ccr nop nop set 0xe5b010ae, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_289: .word 0x39400002 ! 330: FBPUGE fbuge,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_290: wrhpr %g0, 0xf00, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c240 ! 331: CASA_I casa [%r31] 0x12, %r0, %r13 brcommon1_2_291: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r13 ba,a .+8 jmpl %r27-4, %r27 .word 0xa3a409ca ! 332: FDIVd fdivd %f16, %f10, %f48 dvapa_2_292: nop nop ta T_CHANGE_HPRIV mov 0xa38, %r20 mov 0xc, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x1d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdc00 ! 333: STDFA_R stda %f16, [%r0, %r31] .word 0xd23fe160 ! 334: STD_I std %r9, [%r31 + 0x0160] nop nop ta T_CHANGE_HPRIV ! macro donret_2_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_294-donret_2_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x005f6200 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1404, %htstate best_set_reg(0x468, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) retry donretarg_2_294: .word 0x8d903bc4 ! 335: WRPR_PSTATE_I wrpr %r0, 0x1bc4, %pstate splash_tba_2_295: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x0, %r18 splash_cmpr_2_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_2_297: nop nop ta T_CHANGE_HPRIV set 0xf67620b7, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x09400002 ! 1: FBPL fbl stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 338: FBPULE fbule .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d902907 ! 340: WRPR_PSTATE_I wrpr %r0, 0x0907, %pstate ibp_2_300: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_300: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_300 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_300: brnz %r16, ibp_wait2_300 ld [%r23], %r16 ba ibp_startwait2_300 mov 0x2, %r16 continue_ibp_2_300: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_300: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_300 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_300: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_300 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_300: best_set_reg(0x00000040bad75d36,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x20800001 ! 341: BN bn,a .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_2_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_301-donret_2_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00fc3e00 | (54 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x4c7, %htstate wrhpr %g0, 0x103, %hpstate ! rand=1 (2) done donretarg_2_301: .word 0x3c800001 ! 343: BPOS bpos,a brz,a,pt %r17, skip_2_302 bvs,a skip_2_302 .align 512 skip_2_302: .word 0x39400001 ! 344: FBPUGE fbuge,a,pn %fcc0, .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_303: ta T_CHANGE_NONHPRIV ! macro .word 0x9f803ffc ! 346: SIR sir 0x1ffc nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_304)+8 , 16, 16)) -> intp(1,0,27,*,712,*,4f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_304)&0xffffffff)+8 , 16, 16)) -> intp(0,0,0,*,704,*,4f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983c5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c5f, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_2_305: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe090 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x0090] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdc40 ! 348: LDDFA_R ldda [%r31, %r0], %f0 mondo_2_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d930004 ! 349: WRPR_WSTATE_R wrpr %r12, %r4, %wstate intveclr_2_307: nop nop ta T_CHANGE_HPRIV setx 0xb8103eb26d16b462, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x5d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400002 ! 350: FBPLG fblg,a,pn %fcc0, .word 0x91940009 ! 351: WRPR_PIL_R wrpr %r16, %r9, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_309), 16, 16)) -> intp(mask2tid(0x2),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) xir_2_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_309: and %g1, 2, %g1 brnz,a %g1, xirwait_2_309 ldx [%r17], %g1 xir_2_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a786 ! 352: WR_CLEAR_SOFTINT_I wr %r18, 0x0786, %clear_softint splash_tba_2_310: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_2_311: rdhpr %halt, %r20 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_2_312: nop nop ta T_CHANGE_HPRIV set 0x687b7188, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x21400002 ! 1: FBPN fbn,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400002 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_2_313: rdhpr %halt, %r12 .word 0x85880000 ! 356: ALLCLEAN jmptr_2_314: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x879020e3 ! 358: WRPR_TT_I wrpr %r0, 0x00e3, %tt splash_tba_2_315: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_316), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,656,*,*,1) xir_2_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_316: and %g1, 2, %g1 brnz,a %g1, xirwait_2_316 ldx [%r17], %g1 xir_2_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab832ce3 ! 360: WR_CLEAR_SOFTINT_I wr %r12, 0x0ce3, %clear_softint .word 0x22800001 ! 1: BE be,a .word 0x8d90381c ! 361: WRPR_PSTATE_I wrpr %r0, 0x181c, %pstate .word 0xc09fdb20 ! 362: LDDA_R ldda [%r31, %r0] 0xd9, %r0 .word 0x9f803aa3 ! 363: SIR sir 0x1aa3 mondo_2_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r6, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d928011 ! 364: WRPR_WSTATE_R wrpr %r10, %r17, %wstate .word 0xe9e7c200 ! 365: CASA_I casa [%r31] 0x10, %r0, %r20 ibp_2_321: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_321: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_321 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_321: brnz %r16, ibp_wait2_321 ld [%r23], %r16 ba ibp_startwait2_321 mov 0x2, %r16 continue_ibp_2_321: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_321: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_321 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_321: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_321 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_321: best_set_reg(0x0000004010dd36cb,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xb0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe93fe1f0 ! 366: STDF_I std %f20, [0x01f0, %r31] .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_2_322: nop nop ta T_CHANGE_HPRIV setx 0xea72cc2a5cec59a9, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_2_323: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_323: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_323 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_323: brnz %r16, ibp_wait2_323 ld [%r23], %r16 ba ibp_startwait2_323 mov 0x2, %r16 continue_ibp_2_323: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_323: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_323 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_323: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_323 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_323: best_set_reg(0x00000050c6f6cb8b,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x409, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdf00 ! 370: STDFA_R stda %f0, [%r0, %r31] memptr_2_324: set user_data_start, %r31 .word 0x8581663f ! 371: WRCCR_I wr %r5, 0x063f, %ccr .word 0xe9e7c280 ! 372: CASA_I casa [%r31] 0x14, %r0, %r20 ibp_2_326: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_326: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_326 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_326: brnz %r16, ibp_wait2_326 ld [%r23], %r16 ba ibp_startwait2_326 mov 0x2, %r16 continue_ibp_2_326: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_326: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_326 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_326: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_326 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_326: best_set_reg(0x0000005003cb8bb0,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x718, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe897dd40 ! 373: LDUHA_R lduha [%r31, %r0] 0xea, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_327), 16, 16)) -> intp(mask2tid(0x2),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,928,*,*,1) xir_2_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_327: and %g1, 2, %g1 brnz,a %g1, xirwait_2_327 ldx [%r17], %g1 xir_2_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f75f ! 374: WR_CLEAR_SOFTINT_I wr %r19, 0x175f, %clear_softint br_badelay2_2_328: .word 0x95a409c6 ! 1: FDIVd fdivd %f16, %f6, %f10 pdist %f28, %f20, %f30 .word 0x9bb0c306 ! 375: ALIGNADDRESS alignaddr %r3, %r6, %r13 mondo_2_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d940010 ! 376: WRPR_WSTATE_R wrpr %r16, %r16, %wstate splash_tba_2_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_2_331: nop nop ta T_CHANGE_PRIV setx 0xffffffbfffffffa0, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_2_332: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_2_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d944014 ! 380: WRPR_WSTATE_R wrpr %r17, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_334)+8 , 16, 16)) -> intp(3,0,30,*,736,*,9a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_334)&0xffffffff)+8 , 16, 16)) -> intp(5,0,18,*,984,*,9a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982d83 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d83, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_2_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_335)+8 , 16, 16)) -> intp(6,0,7,*,1008,*,1f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_335)&0xffffffff)+8 , 16, 16)) -> intp(1,0,31,*,960,*,1f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_2_336: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0x3c902edf, %r28 !TTID : 6 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80244f ! 1: SIR sir 0x044f intvec_2_337: .word 0x93a209d4 ! 384: FDIVd fdivd %f8, %f20, %f40 brcommon3_2_338: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7d920 ! 1: CASA_I casa [%r31] 0xc9, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0xd2dfdd40 ! 385: LDXA_R ldxa [%r31, %r0] 0xea, %r9 demap_2_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r17, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0x5db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe1f8 ! 386: LDD_I ldd [%r31 + 0x01f8], %r9 .word 0xd31fe000 ! 387: LDDF_I ldd [%r31, 0x0000], %f9 fpinit_2_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91b00484 ! 388: FCMPLE32 fcmple32 %d0, %d4, %r8 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_342) , 16, 16)) -> intp(7,0,31,*,736,*,db,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_342)&0xffffffff) , 16, 16)) -> intp(0,0,29,*,712,*,db,1) #else set 0xd3b07e30, %r28 !TTID : 6 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x95b484d1 ! 1: FCMPNE32 fcmpne32 %d18, %d48, %r10 intvec_2_342: .word 0x9f803b44 ! 389: SIR sir 0x1b44 brcommon2_2_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd3110002 ! 1: LDQF_R - [%r4, %r2], %f9 ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 390: BN bn,a .word 0xc19fdf20 ! 391: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_2_344: nop nop ta T_CHANGE_HPRIV set 0x7cad2442, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_345)+8 , 16, 16)) -> intp(6,0,1,*,952,*,62,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_345)&0xffffffff)+8 , 16, 16)) -> intp(4,0,15,*,968,*,62,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819839c5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x19c5, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 .word 0xc19fde20 ! 394: LDDFA_R ldda [%r31, %r0], %f0 cancelint_2_347: rdhpr %halt, %r16 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_2 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_348: wrhpr %g0, 0x392, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c600 ! 396: CASA_I casa [%r31] 0x30, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_2_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_349-donret_2_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001ff300 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x7cd, %htstate wrhpr %g0, 0x5d0, %hpstate ! rand=1 (2) .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, ldx [%r11+%r0], %g1 done donretarg_2_349: .word 0xa7a509c4 ! 397: FDIVd fdivd %f20, %f4, %f50 splash_tba_2_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_2_351: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe0b0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00b0] best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd28008a0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 cwp_2_352: set user_data_start, %o7 .word 0x93902003 ! 401: WRPR_CWP_I wrpr %r0, 0x0003, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_2_354: nop nop ta T_CHANGE_PRIV setx 0xffffffb0ffffffa4, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_355), 16, 16)) -> intp(mask2tid(0x2),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,928,*,*,1) xir_2_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_355: and %g1, 2, %g1 brnz,a %g1, xirwait_2_355 ldx [%r17], %g1 xir_2_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e406 ! 404: WR_CLEAR_SOFTINT_I wr %r19, 0x0406, %clear_softint brcommon3_2_356: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 405: BN bn,a frzptr_2_357: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_358) , 16, 16)) -> intp(6,0,18,*,728,*,a7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_358)&0xffffffff) , 16, 16)) -> intp(3,0,31,*,960,*,a7,1) #else set 0x88e09014, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_358: .word 0xa1b444c6 ! 407: FCMPNE32 fcmpne32 %d48, %d6, %r16 .word 0xc19fdf20 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_2_359: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_359: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_359 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_359: brnz %r16, ibp_wait2_359 ld [%r23], %r16 ba ibp_startwait2_359 mov 0x2, %r16 continue_ibp_2_359: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_359: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_359 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_359: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_359 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_359: best_set_reg(0x00000050adcbb0dc,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe1bfc3e0 ! 410: STDFA_R stda %f16, [%r0, %r31] brcommon3_2_360: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe090 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0090] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 411: BN bn,a .word 0x8790214e ! 412: WRPR_TT_I wrpr %r0, 0x014e, %tt frzptr_2_361: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_2_362: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_2_363: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_2_364: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d903497 ! 416: WRPR_PSTATE_I wrpr %r0, 0x1497, %pstate br_badelay3_2_365: .word 0x34800002 ! 1: BG bg,a .word 0x02800001 ! 1: BE be .word 0xd3150011 ! 1: LDQF_R - [%r20, %r17], %f9 .word 0xa9a4882d ! 417: FADDs fadds %f18, %f13, %f20 intveclr_2_366: nop nop ta T_CHANGE_HPRIV setx 0x478c7eede4c4e1d4, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x981, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 418: FBPLG fblg,a,pn %fcc0, splash_tba_2_367: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_2_368: nop nop ta T_CHANGE_HPRIV setx 0xc3bd7e9b9d42f7e9, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 420: FBPLG fblg,a,pn %fcc0, .word 0x91930009 ! 421: WRPR_PIL_R wrpr %r12, %r9, %pil splash_hpstate_2_370: .word 0x1b400001 ! 1: FBPLE fble .word 0x81982c1e ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x0c1e, %hpstate cancelint_2_371: rdhpr %halt, %r17 .word 0x85880000 ! 423: ALLCLEAN mondo_2_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d948010 ! 424: WRPR_WSTATE_R wrpr %r18, %r16, %wstate vahole3_2_373: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0xe7e7e000 ! 425: CASA_R casa [%r31] %asi, %r0, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_374), 16, 16)) -> intp(mask2tid(0x2),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,744,*,*,1) xir_2_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_374: and %g1, 2, %g1 brnz,a %g1, xirwait_2_374 ldx [%r17], %g1 xir_2_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab816042 ! 426: WR_CLEAR_SOFTINT_I wr %r5, 0x0042, %clear_softint ibp_2_375: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_375: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_375 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_375: brnz %r16, ibp_wait2_375 ld [%r23], %r16 ba ibp_startwait2_375 mov 0x2, %r16 continue_ibp_2_375: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_375: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_375 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_375: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_375 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_375: best_set_reg(0x00000040b7f0dc25,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x91a489b4 ! 427: FDIVs fdivs %f18, %f20, %f8 .word 0xc1bfe040 ! 428: STDFA_I stda %f0, [0x0040, %r31] nop nop mov 0x1, %r18 splash_cmpr_2_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_376)+8 , 16, 16)) -> intp(5,0,22,*,928,*,96,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_376)&0xffffffff)+8 , 16, 16)) -> intp(6,0,5,*,1008,*,96,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_377), 16, 16)) -> intp(mask2tid(0x2),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,896,*,*,1) xir_2_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_377: and %g1, 2, %g1 brnz,a %g1, xirwait_2_377 ldx [%r17], %g1 xir_2_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab852635 ! 430: WR_CLEAR_SOFTINT_I wr %r20, 0x0635, %clear_softint cancelint_2_378: rdhpr %halt, %r16 .word 0x85880000 ! 431: ALLCLEAN splash_tba_2_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_2_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_2_381: rdhpr %halt, %r12 .word 0x85880000 ! 434: ALLCLEAN memptr_2_382: set 0x60140000, %r31 .word 0x85837879 ! 435: WRCCR_I wr %r13, 0x1879, %ccr .word 0x9f802b27 ! 436: SIR sir 0x0b27 .word 0xd037e166 ! 437: STH_I sth %r8, [%r31 + 0x0166] .word 0xd11fe070 ! 438: LDDF_I ldd [%r31, 0x0070], %f8 .word 0xe1bfda60 ! 439: STDFA_R stda %f16, [%r0, %r31] ibp_2_385: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_385: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_385 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_385: brnz %r16, ibp_wait2_385 ld [%r23], %r16 ba ibp_startwait2_385 mov 0x2, %r16 continue_ibp_2_385: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_385: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_385 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_385: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_385 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_385: best_set_reg(0x00000040a5dc2562,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x9b703baf ! 440: POPC_I popc 0x1baf, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_386), 16, 16)) -> intp(mask2tid(0x2),1,3,*,736,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,736,*,*,1) xir_2_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_386: and %g1, 2, %g1 brnz,a %g1, xirwait_2_386 ldx [%r17], %g1 xir_2_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab842929 ! 441: WR_CLEAR_SOFTINT_I wr %r16, 0x0929, %clear_softint intveclr_2_387: nop nop ta T_CHANGE_HPRIV setx 0x0da9deb28713572b, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 442: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_2 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_388: wrhpr %g0, 0x69b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c080 ! 443: CASA_I casa [%r31] 0x 4, %r0, %r13 frzptr_2_389: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 444: BN bn intveclr_2_390: nop nop ta T_CHANGE_HPRIV setx 0xa51b807405bd05d9, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xbc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 445: FBPLG fblg .word 0xa1b287c7 ! 446: PDIST pdistn %d10, %d38, %d16 br_badelay1_2_392: .word 0x04cfc002 ! 1: BRLEZ brlez,pt %r31, .word 0xd3320010 ! 1: STQF_R - %f9, [%r16, %r8] .word 0x32800001 ! 1: BNE bne,a normalw .word 0xa9458000 ! 447: RD_SOFTINT_REG rd %softint, %r20 ibp_2_393: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_393: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_393 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_393: brnz %r16, ibp_wait2_393 ld [%r23], %r16 ba ibp_startwait2_393 mov 0x2, %r16 continue_ibp_2_393: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_393: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_393 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_393: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_393 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_393: best_set_reg(0x00000040e1e562e9,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x87ad0a54 ! 448: FCMPd fcmpd %fcc, %f20, %f20 jmptr_2_394: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe01fe1a0 ! 450: LDD_I ldd [%r31 + 0x01a0], %r16 memptr_2_396: set user_data_start, %r31 .word 0x8584ab92 ! 451: WRCCR_I wr %r18, 0x0b92, %ccr cancelint_2_397: rdhpr %halt, %r12 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_2_398: nop nop ta T_CHANGE_HPRIV set 0x5b28adaf, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 453: FBPULE fbule brcommon2_2_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xd5104013 ! 1: LDQF_R - [%r1, %r19], %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 454: PDIST pdistn %d62, %d0, %d16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_400: ta T_CHANGE_NONHPRIV ! macro frzptr_2_401: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfda60 ! 456: STDFA_R stda %f16, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_402), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1016,*,*,1) xir_2_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_402: and %g1, 2, %g1 brnz,a %g1, xirwait_2_402 ldx [%r17], %g1 xir_2_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab83327e ! 457: WR_CLEAR_SOFTINT_I wr %r12, 0x127e, %clear_softint brcommon3_2_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e0b0 ! 1: STQF_I - %f10, [0x00b0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r10, [%r0] ASI_LSU_CONTROL .word 0x95aac82a ! 458: FMOVGE fmovs %fcc1, %f10, %f10 splash_tba_2_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_2_406: .word 0x32800001 ! 1: BNE bne,a .word 0xdf7e170b ! Random illegal ? .word 0x91a209c3 ! 1: FDIVd fdivd %f8, %f34, %f8 .word 0x9ba0c831 ! 461: FADDs fadds %f3, %f17, %f13 .word 0x9f80336b ! 462: SIR sir 0x136b nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_407)+8 , 16, 16)) -> intp(4,0,16,*,760,*,72,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_407)&0xffffffff)+8 , 16, 16)) -> intp(0,0,6,*,960,*,72,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982595 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0595, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_2_408: set user_data_start, %o7 .word 0x93902007 ! 464: WRPR_CWP_I wrpr %r0, 0x0007, %cwp cancelint_2_409: rdhpr %halt, %r8 .word 0x85880000 ! 465: ALLCLEAN splash_tba_2_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe88008a0 ! 467: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 pmu_2_411: nop nop ta T_CHANGE_PRIV setx 0xffffffbeffffffaf, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_2_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_2_413: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xc32fe040 ! 1: STXFSR_I st-sfr %f1, [0x0040, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 471: BN bn mondo_2_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d948013 ! 472: WRPR_WSTATE_R wrpr %r18, %r19, %wstate mondo_2_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3e0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d910014 ! 473: WRPR_WSTATE_R wrpr %r4, %r20, %wstate .word 0x97a489c4 ! 474: FDIVd fdivd %f18, %f4, %f42 mondo_2_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944012 ! 475: WRPR_WSTATE_R wrpr %r17, %r18, %wstate cancelint_2_418: rdhpr %halt, %r8 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_419), 16, 16)) -> intp(mask2tid(0x2),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,760,*,*,1) xir_2_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_419: and %g1, 2, %g1 brnz,a %g1, xirwait_2_419 ldx [%r17], %g1 xir_2_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84204b ! 477: WR_CLEAR_SOFTINT_I wr %r16, 0x004b, %clear_softint jmptr_2_420: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_421: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_421) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1008,*,*,1)') ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_421: wrhpr %g0, 0x993, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 479: RDPC rd %pc, %r18 fpinit_2_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89b00484 ! 480: FCMPLE32 fcmple32 %d0, %d4, %r4 .word 0xf1efe090 ! 481: PREFETCHA_I prefetcha [%r31, + 0x0090] %asi, #24 splash_tba_2_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_2_425: nop nop setx 0xffffffb4ffffffa9, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe016 ! 484: STDA_I stda %r17, [%r31 + 0x0016] %asi splash_lsu_2_426: nop nop ta T_CHANGE_HPRIV set 0x43de79e9, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 485: FBPULE fbule .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e050 ! 487: STQF_I - %f17, [0x0050, %r31] frzptr_2_428: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0xe26fe0c0 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x00c0] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdb40 ! 488: LDDFA_R ldda [%r31, %r0], %f0 brcommon3_2_429: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e150 ! 1: STQF_I - %f17, [0x0150, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x819828ce ! 489: WRHPR_HPSTATE_I wrhpr %r0, 0x08ce, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_430: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_430) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,912,*,*,1)') ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_430: wrhpr %g0, 0x50a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 490: RDPC rd %pc, %r18 .word 0xe9e7dd40 ! 491: CASA_I casa [%r31] 0xea, %r0, %r20 .word 0xe8bfd140 ! 492: STDA_R stda %r20, [%r31 + %r0] 0x8a nop nop mov 0x1, %r18 splash_cmpr_2_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_433)+8 , 16, 16)) -> intp(7,0,7,*,664,*,c3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_433)&0xffffffff)+8 , 16, 16)) -> intp(0,0,22,*,664,*,c3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_434) , 16, 16)) -> intp(4,0,22,*,928,*,5a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_434)&0xffffffff) , 16, 16)) -> intp(4,0,7,*,944,*,5a,1) #else set 0xa1c02591, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9bb084d4 ! 1: FCMPNE32 fcmpne32 %d2, %d20, %r13 intvec_2_434: .word 0x39400001 ! 494: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_2_436: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_437: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_437) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,912,*,*,1)') ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,928,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_437: wrhpr %g0, 0xfca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 497: RDPC rd %pc, %r17 splash_tba_2_438: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_2_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d92c013 ! 499: WRPR_WSTATE_R wrpr %r11, %r19, %wstate brcommon2_2_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x97a00545 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0xe19fdf00 ! 500: LDDFA_R ldda [%r31, %r0], %f16 .word 0x91920012 ! 501: WRPR_PIL_R wrpr %r8, %r18, %pil ibp_2_442: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_442: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_442 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_442: brnz %r16, ibp_wait2_442 ld [%r23], %r16 ba ibp_startwait2_442 mov 0x2, %r16 continue_ibp_2_442: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_442: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_442 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_442: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_442 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_442: best_set_reg(0x0000004026e2e927,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xd697df00 ! 502: LDUHA_R lduha [%r31, %r0] 0xf8, %r11 cwp_2_443: set user_data_start, %o7 .word 0x93902001 ! 503: WRPR_CWP_I wrpr %r0, 0x0001, %cwp cancelint_2_444: rdhpr %halt, %r8 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e074 ! 505: STF_I st %f9, [0x0074, %r31] brcommon3_2_445: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe190 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0190] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902e4f ! 506: WRPR_PSTATE_I wrpr %r0, 0x0e4f, %pstate splash_tba_2_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x12059f7, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_2_447: .word 0x9f8022c8 ! 508: SIR sir 0x02c8 intveclr_2_448: nop nop ta T_CHANGE_HPRIV setx 0xff4926ffaa2069d4, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x389, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 509: FBPLG fblg,a,pn %fcc0, memptr_2_449: set 0x60340000, %r31 .word 0x858523b9 ! 510: WRCCR_I wr %r20, 0x03b9, %ccr nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_450: wrhpr %g0, 0x508, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c6c0 ! 511: CASA_I casa [%r31] 0x36, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_451: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_451) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,656,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_451: wrhpr %g0, 0x441, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 512: RDPC rd %pc, %r18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_452) , 16, 16)) -> intp(3,0,24,*,760,*,ef,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_452)&0xffffffff) , 16, 16)) -> intp(1,0,12,*,944,*,ef,1) #else set 0xd380f8cf, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_2_452: .word 0x9f80383b ! 513: SIR sir 0x183b nop nop set 0x1c0c3be, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_2_453: .word 0x93b4c4d0 ! 514: FCMPNE32 fcmpne32 %d50, %d16, %r9 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_454)+8 , 16, 16)) -> intp(1,0,27,*,936,*,c6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_454)&0xffffffff)+8 , 16, 16)) -> intp(2,0,29,*,936,*,c6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983b53 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1b53, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_2_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d914011 ! 516: WRPR_WSTATE_R wrpr %r5, %r17, %wstate pmu_2_456: nop nop setx 0xffffffbeffffffae, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_2_457: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0b0 ! 1: STQF_I - %f9, [0x00b0, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd23fe1c0 ! 518: STD_I std %r9, [%r31 + 0x01c0] pmu_2_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffab, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xb340c057, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400002 ! 1: FBPUGE fbuge intvec_2_459: .word 0x9f8036fd ! 520: SIR sir 0x16fd vahole3_2_460: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd7e7e000 ! 521: CASA_R casa [%r31] %asi, %r0, %r11 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_461: ta T_CHANGE_NONHPRIV ! macro .word 0x87aa8a53 ! 523: FCMPd fcmpd %fcc, %f10, %f50 nop nop mov 0x1, %r18 splash_cmpr_2_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_463)+8 , 16, 16)) -> intp(1,0,24,*,936,*,e2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_463)&0xffffffff)+8 , 16, 16)) -> intp(4,0,4,*,984,*,e2,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 524: SIAM siam 1 .word 0xc09fdf20 ! 525: LDDA_R ldda [%r31, %r0] 0xf9, %r0 br_longdelay3_2_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x819824cf ! 526: WRHPR_HPSTATE_I wrhpr %r0, 0x04cf, %hpstate frzptr_2_466: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0xc1bfde20 ! 527: STDFA_R stda %f0, [%r0, %r31] .word 0xd11fe030 ! 528: LDDF_I ldd [%r31, 0x0030], %f8 vahole4_2_468: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0x81982c4c ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x0c4c, %hpstate .word 0x24cc0001 ! 1: BRLEZ brlez,a,pt %r16, .word 0x8d903c85 ! 530: WRPR_PSTATE_I wrpr %r0, 0x1c85, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x34800001 ! 1: BG bg,a .word 0x8d90315b ! 532: WRPR_PSTATE_I wrpr %r0, 0x115b, %pstate brcommon3_2_471: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e110 ! 1: STQF_I - %f8, [0x0110, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xd0bfc240 ! 533: STDA_R stda %r8, [%r31 + %r0] 0x12 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_472) , 16, 16)) -> intp(4,0,28,*,1016,*,66,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_472)&0xffffffff) , 16, 16)) -> intp(0,0,27,*,944,*,66,1) #else set 0x7380786d, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_472: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3a049c3 ! 534: FDIVd fdivd %f32, %f34, %f48 .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe7e7d000 ! 536: CASA_I casa [%r31] 0x80, %r0, %r19 jmptr_2_474: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_2_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_475-donret_2_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x008d1100 | (0x88 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x5f5, %htstate best_set_reg(0x1791, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) done .align 2048 donretarg_2_475: .word 0x8198351c ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x151c, %hpstate trapasi_2_476: nop mov 0x3d0, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_477), 16, 16)) -> intp(mask2tid(0x2),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,992,*,*,1) xir_2_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_477: and %g1, 2, %g1 brnz,a %g1, xirwait_2_477 ldx [%r17], %g1 xir_2_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817a2e ! 540: WR_CLEAR_SOFTINT_I wr %r5, 0x1a2e, %clear_softint .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, .word 0x8d9032e5 ! 541: WRPR_PSTATE_I wrpr %r0, 0x12e5, %pstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_479: wrhpr %g0, 0x30b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c080 ! 542: CASA_I casa [%r31] 0x 4, %r0, %r19 mondo_2_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r7, [%r0+0x3d8] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d940005 ! 543: WRPR_WSTATE_R wrpr %r16, %r5, %wstate .word 0xa3520000 ! 544: RDPR_PIL .word 0xe11fe020 ! 545: LDDF_I ldd [%r31, 0x0020], %f16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_482: ta T_CHANGE_NONPRIV ! macro cancelint_2_483: rdhpr %halt, %r9 .word 0x85880000 ! 547: ALLCLEAN splash_tba_2_484: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_2_485: nop nop ta T_CHANGE_HPRIV mov 0x945, %r20 mov 0x17, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xbc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fda00 ! 549: LDDA_R ldda [%r31, %r0] 0xd0, %r0 .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_2_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r18, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0xf50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe1c8 ! 552: LDD_I ldd [%r31 + 0x01c8], %r19 mondo_2_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3c0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d940003 ! 553: WRPR_WSTATE_R wrpr %r16, %r3, %wstate .word 0x9f802428 ! 554: SIR sir 0x0428 .word 0xe0bfdf20 ! 555: STDA_R stda %r16, [%r31 + %r0] 0xf9 memptr_2_491: set 0x60140000, %r31 .word 0x8581ae8c ! 556: WRCCR_I wr %r6, 0x0e8c, %ccr nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_492: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_492) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,648,*,*,1)') ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_492: wrhpr %g0, 0x990, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 557: RDPC rd %pc, %r20 ibp_2_493: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_493: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_493 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_493: brnz %r16, ibp_wait2_493 ld [%r23], %r16 ba ibp_startwait2_493 mov 0x2, %r16 continue_ibp_2_493: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_493: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_493 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_493: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_493 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_493: best_set_reg(0x0000004014e927f5,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xf5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7c080 ! 558: CASA_I casa [%r31] 0x 4, %r0, %r20 .word 0x08800001 ! 559: BLEU bleu vahole2_2_494: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xe19fdf20 ! 560: LDDFA_R ldda [%r31, %r0], %f16 ibp_2_495: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_495: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_495 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_495: brnz %r16, ibp_wait2_495 ld [%r23], %r16 ba ibp_startwait2_495 mov 0x2, %r16 continue_ibp_2_495: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_495: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_495 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_495: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_495 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_495: best_set_reg(0x00000040dbe7f57d,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x141, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdf00 ! 561: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_496) , 16, 16)) -> intp(5,0,27,*,1016,*,f3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_496)&0xffffffff) , 16, 16)) -> intp(2,0,22,*,728,*,f3,1) #else set 0x1270f58c, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_496: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa3b4c4cb ! 562: FCMPNE32 fcmpne32 %d50, %d42, %r17 frzptr_2_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd5e7dd40 ! 1: CASA_I casa [%r31] 0xea, %r0, %r10 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 563: BN bn,a memptr_2_498: set user_data_start, %r31 .word 0x8582adc4 ! 564: WRCCR_I wr %r10, 0x0dc4, %ccr .word 0xa1a409b4 ! 565: FDIVs fdivs %f16, %f20, %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_500) , 16, 16)) -> intp(2,0,12,*,672,*,d6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_500)&0xffffffff) , 16, 16)) -> intp(3,0,28,*,1000,*,d6,1) #else set 0xc3d00ec0, %r28 !TTID : 6 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_2_500: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 566: FBPUGE fbuge jmptr_2_501: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_502: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_502) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1000,*,*,1)') ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_502: wrhpr %g0, 0x310, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 568: RDPC rd %pc, %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_2_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_503-donret_2_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00d07500 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x8d2, %htstate best_set_reg(0x1120, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) done donretarg_2_503: .word 0x97a289c6 ! 569: FDIVd fdivd %f10, %f6, %f42 frzptr_2_504: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdf20 ! 570: LDDFA_R ldda [%r31, %r0], %f0 .word 0x9f803a41 ! 571: SIR sir 0x1a41 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_505), 16, 16)) -> intp(mask2tid(0x2),1,3,*,640,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) xir_2_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_505: and %g1, 2, %g1 brnz,a %g1, xirwait_2_505 ldx [%r17], %g1 xir_2_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8468b3 ! 572: WR_CLEAR_SOFTINT_I wr %r17, 0x08b3, %clear_softint frzptr_2_506: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfde20 ! 573: STDFA_R stda %f0, [%r0, %r31] cancelint_2_507: rdhpr %halt, %r10 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_508) , 16, 16)) -> intp(6,0,24,*,952,*,3f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_508)&0xffffffff) , 16, 16)) -> intp(5,0,19,*,960,*,3f,1) #else set 0x3ea04a83, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_2_508: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 575: FBPUGE fbuge cancelint_2_509: rdhpr %halt, %r17 .word 0x85880000 ! 576: ALLCLEAN vahole4_2_510: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0x8198200e ! 577: WRHPR_HPSTATE_I wrhpr %r0, 0x000e, %hpstate .word 0x8790222b ! 578: WRPR_TT_I wrpr %r0, 0x022b, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_511), 16, 16)) -> intp(mask2tid(0x2),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,712,*,*,1) xir_2_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_511: and %g1, 2, %g1 brnz,a %g1, xirwait_2_511 ldx [%r17], %g1 xir_2_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846438 ! 579: WR_CLEAR_SOFTINT_I wr %r17, 0x0438, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_512) , 16, 16)) -> intp(6,0,12,*,640,*,17,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_512)&0xffffffff) , 16, 16)) -> intp(3,0,31,*,992,*,17,1) #else set 0xe207813, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_512: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f8029ac ! 580: SIR sir 0x09ac brcommon3_2_513: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902e8d ! 581: WRPR_PSTATE_I wrpr %r0, 0x0e8d, %pstate .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_514: ta T_CHANGE_NONHPRIV ! macro .word 0xe63fe090 ! 583: STD_I std %r19, [%r31 + 0x0090] nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_2 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_516: wrhpr %g0, 0xdd1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d040 ! 584: CASA_I casa [%r31] 0x82, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_517: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_517) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,952,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_517: wrhpr %g0, 0x852, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 585: RDPC rd %pc, %r12 cancelint_2_518: rdhpr %halt, %r20 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_519: wrhpr %g0, 0xb1a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c380 ! 587: CASA_I casa [%r31] 0x1c, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_520: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_520) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1008,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1000,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_520: wrhpr %g0, 0x9c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 588: RDPC rd %pc, %r18 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d903f10 ! 590: WRPR_PSTATE_I wrpr %r0, 0x1f10, %pstate br_badelay2_2_523: .word 0x12800001 ! 1: BNE bne pdist %f2, %f12, %f18 .word 0x9bb4430d ! 591: ALIGNADDRESS alignaddr %r17, %r13, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_524) , 16, 16)) -> intp(3,0,26,*,968,*,b6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_524)&0xffffffff) , 16, 16)) -> intp(3,0,13,*,736,*,b6,1) #else set 0x14b07050, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_524: .word 0x39400002 ! 592: FBPUGE fbuge,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_2_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_525)+8 , 16, 16)) -> intp(2,0,9,*,976,*,93,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_525)&0xffffffff)+8 , 16, 16)) -> intp(2,0,18,*,1016,*,93,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 593: SIAM siam 1 memptr_2_526: set 0x60340000, %r31 .word 0x8584bd68 ! 594: WRCCR_I wr %r18, 0x1d68, %ccr frzptr_2_527: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 595: BN bn fbn,a,pn %fcc0, skip_2_528 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0x87aaca54 ! 1: FCMPd fcmpd %fcc, %f42, %f20 stxa %r13, [%r0] ASI_LSU_CONTROL .align 2048 skip_2_528: .word 0xc32fc000 ! 596: STXFSR_R st-sfr %f1, [%r0, %r31] splash_hpstate_2_529: .word 0x28800001 ! 1: BLEU bleu,a .word 0x81982153 ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x0153, %hpstate .word 0xe527e0f6 ! 598: STF_I st %f18, [0x00f6, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_530), 16, 16)) -> intp(mask2tid(0x2),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,944,*,*,1) xir_2_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_530: and %g1, 2, %g1 brnz,a %g1, xirwait_2_530 ldx [%r17], %g1 xir_2_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80fc67 ! 599: WR_CLEAR_SOFTINT_I wr %r3, 0x1c67, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_2_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_531-donret_2_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x003fc700 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1944, %htstate best_set_reg(0x518, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) ldx [%r11+%r0], %g1 done donretarg_2_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_532)+8 , 16, 16)) -> intp(1,0,16,*,752,*,3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_532)&0xffffffff)+8 , 16, 16)) -> intp(4,0,30,*,976,*,3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819820dd ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x00dd, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0x82900be2, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x99a109c7 ! 1: FDIVd fdivd %f4, %f38, %f12 intvec_2_533: .word 0x9f802d3c ! 602: SIR sir 0x0d3c splash_hpstate_2_534: .word 0x06ca8001 ! 1: BRLZ brlz,pt %r10, .word 0x81982717 ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x0717, %hpstate bcs skip_2_535 ba skip_2_535 .align 1024 skip_2_535: .word 0xa7a489c2 ! 604: FDIVd fdivd %f18, %f2, %f50 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_536), 16, 16)) -> intp(mask2tid(0x2),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,672,*,*,1) xir_2_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_536: and %g1, 2, %g1 brnz,a %g1, xirwait_2_536 ldx [%r17], %g1 xir_2_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846c45 ! 605: WR_CLEAR_SOFTINT_I wr %r17, 0x0c45, %clear_softint mondo_2_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d944002 ! 606: WRPR_WSTATE_R wrpr %r17, %r2, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_538) , 16, 16)) -> intp(6,0,13,*,648,*,a6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_538)&0xffffffff) , 16, 16)) -> intp(2,0,10,*,952,*,a6,1) #else set 0x4590c253, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_538: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9bb4c4cd ! 607: FCMPNE32 fcmpne32 %d50, %d44, %r13 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_539: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_539) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,656,*,*,1)') ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_539: wrhpr %g0, 0x49b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 608: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_540) , 16, 16)) -> intp(5,0,1,*,656,*,ae,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_540)&0xffffffff) , 16, 16)) -> intp(2,0,12,*,672,*,ae,1) #else set 0x5cf03a72, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_540: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803804 ! 609: SIR sir 0x1804 nop nop ta T_CHANGE_HPRIV ! macro donret_2_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_541-donret_2_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x001a5300 | (0x88 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x183, %htstate best_set_reg(0x14f8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) done donretarg_2_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_2 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_542: wrhpr %g0, 0xd48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7dd40 ! 611: CASA_I casa [%r31] 0xea, %r0, %r8 ibp_2_543: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_543: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_543 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_543: brnz %r16, ibp_wait2_543 ld [%r23], %r16 ba ibp_startwait2_543 mov 0x2, %r16 continue_ibp_2_543: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_543: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_543 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_543: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_543 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_543: best_set_reg(0x000000403cf57d18,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xdc0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfdf20 ! 612: STDFA_R stda %f16, [%r0, %r31] .word 0x8d903201 ! 613: WRPR_PSTATE_I wrpr %r0, 0x1201, %pstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_545: wrhpr %g0, 0xc83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d920 ! 614: CASA_I casa [%r31] 0xc9, %r0, %r8 jmptr_2_546: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 .word 0x95a249a8 ! 616: FDIVs fdivs %f9, %f8, %f10 .word 0xe737e01a ! 617: STQF_I - %f19, [0x001a, %r31] .word 0x1a780001 ! 618: BPCC ibp_2_548: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_548: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_548 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_548: brnz %r16, ibp_wait2_548 ld [%r23], %r16 ba ibp_startwait2_548 mov 0x2, %r16 continue_ibp_2_548: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_548: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_548 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_548: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_548 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_548: best_set_reg(0x000000500bfd18d4,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xcd2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800001 ! 619: BN bn .word 0xa9a489c4 ! 620: FDIVd fdivd %f18, %f4, %f20 .word 0xda9fdd40 ! 621: LDDA_R ldda [%r31, %r0] 0xea, %r13 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_551: wrhpr %g0, 0x82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d040 ! 622: CASA_I casa [%r31] 0x82, %r0, %r13 mondo_2_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3e8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d930011 ! 623: WRPR_WSTATE_R wrpr %r12, %r17, %wstate intveclr_2_553: nop nop ta T_CHANGE_HPRIV setx 0x966b6f5282894dc8, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 624: FBPLG fblg,a,pn %fcc0, splash_tba_2_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_2 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_555: wrhpr %g0, 0xed2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d040 ! 626: CASA_I casa [%r31] 0x82, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_556) , 16, 16)) -> intp(1,0,18,*,928,*,17,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_556)&0xffffffff) , 16, 16)) -> intp(2,0,14,*,952,*,17,1) #else set 0x34404058, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa3b504d0 ! 1: FCMPNE32 fcmpne32 %d20, %d16, %r17 intvec_2_556: .word 0x97b484c2 ! 627: FCMPNE32 fcmpne32 %d18, %d2, %r11 mondo_2_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3c0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d940005 ! 628: WRPR_WSTATE_R wrpr %r16, %r5, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0x13e05a23, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_559: .word 0x9f802f27 ! 630: SIR sir 0x0f27 frzptr_2_560: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 631: BN bn,a splash_tba_2_561: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_2_562: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfdc40 ! 633: STDFA_R stda %f0, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_563: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_563) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,744,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_563: wrhpr %g0, 0xf03, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 634: RDPC rd %pc, %r20 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_564), 16, 16)) -> intp(mask2tid(0x2),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,920,*,*,1) xir_2_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_564: and %g1, 2, %g1 brnz,a %g1, xirwait_2_564 ldx [%r17], %g1 xir_2_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80ad09 ! 635: WR_CLEAR_SOFTINT_I wr %r2, 0x0d09, %clear_softint ibp_2_565: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_565: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_565 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_565: brnz %r16, ibp_wait2_565 ld [%r23], %r16 ba ibp_startwait2_565 mov 0x2, %r16 continue_ibp_2_565: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_565: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_565 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_565: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_565 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_565: best_set_reg(0x00000040c4d8d469,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x85b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe73fe120 ! 636: STDF_I std %f19, [0x0120, %r31] .word 0xa5b1c490 ! 637: FCMPLE32 fcmple32 %d38, %d16, %r18 splash_lsu_2_567: nop nop ta T_CHANGE_HPRIV set 0x1aefd4fe, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_2_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa3a00553 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 639: PDIST pdistn %d62, %d0, %d16 nop nop set 0x1b10922d, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_569: .word 0x97b104d1 ! 640: FCMPNE32 fcmpne32 %d4, %d48, %r11 .word 0x91928011 ! 641: WRPR_PIL_R wrpr %r10, %r17, %pil nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_571: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_571) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,912,*,*,1)') ifelse(2,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_571: wrhpr %g0, 0xa91, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 642: RDPC rd %pc, %r11 .word 0xd33fe058 ! 643: STDF_I std %f9, [0x0058, %r31] .word 0xe19fda00 ! 644: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_572), 16, 16)) -> intp(mask2tid(0x2),1,3,*,736,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,912,*,*,1) xir_2_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_572: and %g1, 2, %g1 brnz,a %g1, xirwait_2_572 ldx [%r17], %g1 xir_2_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8267a4 ! 645: WR_CLEAR_SOFTINT_I wr %r9, 0x07a4, %clear_softint .word 0xc19fdc00 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x955034ca, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa3a349d1 ! 1: FDIVd fdivd %f44, %f48, %f48 intvec_2_573: .word 0x9bb044d3 ! 647: FCMPNE32 fcmpne32 %d32, %d50, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_574), 16, 16)) -> intp(mask2tid(0x2),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,984,*,*,1) xir_2_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_574: and %g1, 2, %g1 brnz,a %g1, xirwait_2_574 ldx [%r17], %g1 xir_2_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f1d6 ! 648: WR_CLEAR_SOFTINT_I wr %r7, 0x11d6, %clear_softint ibp_2_575: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_575: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_575 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_575: brnz %r16, ibp_wait2_575 ld [%r23], %r16 ba ibp_startwait2_575 mov 0x2, %r16 continue_ibp_2_575: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_575: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_575 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_575: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_575 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_575: best_set_reg(0x00000040d2d46999,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x9ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe040 ! 649: LDD_I ldd [%r31 + 0x0040], %r13 splash_tba_2_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_2_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3c0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d950011 ! 651: WRPR_WSTATE_R wrpr %r20, %r17, %wstate .word 0xdb1fe160 ! 652: LDDF_I ldd [%r31, 0x0160], %f13 splash_tba_2_579: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_2_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r7, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0xf5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe159 ! 654: LDD_I ldd [%r31 + 0x0159], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_2_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d92c00a ! 656: WRPR_WSTATE_R wrpr %r11, %r10, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_583), 16, 16)) -> intp(mask2tid(0x2),1,3,*,752,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,952,*,*,1) xir_2_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_583: and %g1, 2, %g1 brnz,a %g1, xirwait_2_583 ldx [%r17], %g1 xir_2_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82a634 ! 657: WR_CLEAR_SOFTINT_I wr %r10, 0x0634, %clear_softint demap_2_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r15, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f wrhpr %g0, 0xa88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe1a8 ! 658: LDD_I ldd [%r31 + 0x01a8], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] vahole5_2_585: nop nop setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 ta T_CHANGE_NONPRIV .word 0xa9b08330 ! 660: BMASK bmask %r2, %r16, %r20 dvapa_2_586: nop nop ta T_CHANGE_HPRIV mov 0x989, %r20 mov 0x1, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x113, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfde00 ! 661: STDFA_R stda %f16, [%r0, %r31] frzptr_2_587: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 662: BN bn,a frzptr_2_588: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_589), 16, 16)) -> intp(mask2tid(0x2),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,664,*,*,1) xir_2_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_589: and %g1, 2, %g1 brnz,a %g1, xirwait_2_589 ldx [%r17], %g1 xir_2_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8435c6 ! 664: WR_CLEAR_SOFTINT_I wr %r16, 0x15c6, %clear_softint .word 0x9970390d ! 665: POPC_I popc 0x190d, %r12 .word 0xd8bfe164 ! 666: STDA_I stda %r12, [%r31 + 0x0164] %asi frzptr_2_590: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb80000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 667: BN bn,a mondo_2_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e8] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d950010 ! 668: WRPR_WSTATE_R wrpr %r20, %r16, %wstate nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_592: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_592) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,896,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_592: wrhpr %g0, 0xfcb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 669: RDPC rd %pc, %r19 pmu_2_593: nop nop ta T_CHANGE_PRIV setx 0xffffffb2ffffffa7, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f8031ac ! 671: SIR sir 0x11ac mondo_2_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d91800a ! 672: WRPR_WSTATE_R wrpr %r6, %r10, %wstate jmptr_2_595: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_2_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982d54 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0d54, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_597), 16, 16)) -> intp(mask2tid(0x2),1,3,*,672,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1000,*,*,1) xir_2_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_597: and %g1, 2, %g1 brnz,a %g1, xirwait_2_597 ldx [%r17], %g1 xir_2_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8161d4 ! 675: WR_CLEAR_SOFTINT_I wr %r5, 0x01d4, %clear_softint .word 0xe927e01e ! 676: STF_I st %f20, [0x001e, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_598) , 16, 16)) -> intp(5,0,4,*,968,*,1e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_598)&0xffffffff) , 16, 16)) -> intp(1,0,23,*,1000,*,1e,1) #else set 0x9ad0a4d9, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f8037f6 ! 1: SIR sir 0x17f6 intvec_2_598: .word 0x9f802546 ! 677: SIR sir 0x0546 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_2 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_599: wrhpr %g0, 0xc03, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c240 ! 678: CASA_I casa [%r31] 0x12, %r0, %r13 frzptr_2_600: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe1b0 ! 1: STXFSR_I st-sfr %f1, [0x01b0, %r31] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfde00 ! 679: STDFA_R stda %f16, [%r0, %r31] .word 0xa3702abe ! 680: POPC_I popc 0x0abe, %r17 nop nop mov 0x0, %r18 splash_cmpr_2_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 681: SIAM siam 1 demap_2_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r19, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0xbc3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe138 ! 682: LDD_I ldd [%r31 + 0x0138], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_2_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_604-donret_2_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f9fa00 | (16 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x44d, %htstate wrhpr %g0, 0x548, %hpstate ! rand=1 (2) .word 0x3c800001 ! 1: BPOS bpos,a retry donretarg_2_604: .word 0xd66fe07d ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x007d] .word 0x97a00160 ! 684: FABSq dis not found .word 0x91940012 ! 685: WRPR_PIL_R wrpr %r16, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_607: wrhpr %g0, 0x79b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c6c0 ! 686: CASA_I casa [%r31] 0x36, %r0, %r11 .word 0x93b4c584 ! 687: FCMPGT32 fcmpgt32 %d50, %d4, %r9 mondo_2_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r18, [%r0+0x3e8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d910014 ! 688: WRPR_WSTATE_R wrpr %r4, %r20, %wstate cwp_2_609: set user_data_start, %o7 .word 0x93902006 ! 689: WRPR_CWP_I wrpr %r0, 0x0006, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d9028e0 ! 691: WRPR_PSTATE_I wrpr %r0, 0x08e0, %pstate .word 0xe1bfe1c0 ! 692: STDFA_I stda %f16, [0x01c0, %r31] .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, .word 0x8d902d91 ! 693: WRPR_PSTATE_I wrpr %r0, 0x0d91, %pstate nop nop mov 0x1, %r18 splash_cmpr_2_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_612)+8 , 16, 16)) -> intp(5,0,31,*,720,*,d2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_612)&0xffffffff)+8 , 16, 16)) -> intp(5,0,21,*,1008,*,d2,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_2_613: .word 0x8198354f ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x154f, %hpstate .word 0x99a349d0 ! 696: FDIVd fdivd %f44, %f16, %f12 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_2 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_615: wrhpr %g0, 0xc50, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d140 ! 697: CASA_I casa [%r31] 0x8a, %r0, %r16 brcommon2_2_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a00550 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0x00800001 ! 698: BN bn .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xa1520000 ! 700: RDPR_PIL mondo_2_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3e0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d910014 ! 701: WRPR_WSTATE_R wrpr %r4, %r20, %wstate .word 0xd497d040 ! 702: LDUHA_R lduha [%r31, %r0] 0x82, %r10 .word 0xd48008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 splash_lsu_2_619: nop nop ta T_CHANGE_HPRIV set 0x4898a39a, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0acc8002 ! 1: BRNZ brnz,pt %r18, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 704: FBPULE fbule intveclr_2_620: nop nop ta T_CHANGE_HPRIV setx 0x22c04156439dc674, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_2_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_621-donret_2_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00270400 | (0x89 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f5f, %htstate wrhpr %g0, 0x1d9, %hpstate ! rand=1 (2) .word 0x0cc90001 ! 1: BRGZ brgz,pt %r4, done donretarg_2_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_2_622: set user_data_start, %o7 .word 0x93902000 ! 707: WRPR_CWP_I wrpr %r0, 0x0000, %cwp .word 0xc1bfdf00 ! 708: STDFA_R stda %f0, [%r0, %r31] frzptr_2_623: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x20800001 ! 709: BN bn,a intveclr_2_624: nop nop ta T_CHANGE_HPRIV setx 0xc91a2c8384f996de, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xa4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 710: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_625: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_625) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,696,*,*,1)') ifelse(2,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_625: wrhpr %g0, 0x44b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 711: RDPC rd %pc, %r17 .word 0xe097d920 ! 712: LDUHA_R lduha [%r31, %r0] 0xc9, %r16 splash_lsu_2_627: nop nop ta T_CHANGE_HPRIV set 0x88597cf9, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 713: FBPULE fbule mondo_2_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d92c00c ! 714: WRPR_WSTATE_R wrpr %r11, %r12, %wstate .word 0x8d9036fd ! 715: WRPR_PSTATE_I wrpr %r0, 0x16fd, %pstate .word 0x9f802896 ! 716: SIR sir 0x0896 .word 0xe09fc380 ! 717: LDDA_R ldda [%r31, %r0] 0x1c, %r16 nop nop set 0x2fa02970, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400001 ! 1: FBPUGE fbuge intvec_2_631: .word 0xa9a489d2 ! 718: FDIVd fdivd %f18, %f18, %f20 .word 0xd69fd920 ! 719: LDDA_R ldda [%r31, %r0] 0xc9, %r11 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_633: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_633) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,928,*,*,1)') ifelse(3,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_633: wrhpr %g0, 0xd13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 720: RDPC rd %pc, %r17 mondo_2_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3c0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d950008 ! 721: WRPR_WSTATE_R wrpr %r20, %r8, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_635), 16, 16)) -> intp(mask2tid(0x2),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,728,*,*,1) xir_2_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_635: and %g1, 2, %g1 brnz,a %g1, xirwait_2_635 ldx [%r17], %g1 xir_2_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ab3b ! 722: WR_CLEAR_SOFTINT_I wr %r18, 0x0b3b, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_636: wrhpr %g0, 17, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c2e0 ! 723: CASA_I casa [%r31] 0x17, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_637: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_637) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,936,*,*,1)') ifelse(0,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,648,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_637: wrhpr %g0, 0xa11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 724: RDPC rd %pc, %r8 jmptr_2_638: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 .word 0xe09fc3e0 ! 726: LDDA_R ldda [%r31, %r0] 0x1f, %r16 .word 0xd8800b40 ! 727: LDUWA_R lduwa [%r0, %r0] 0x5a, %r12 nop nop mov 0x1, %r18 splash_cmpr_2_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_640)+8 , 16, 16)) -> intp(4,0,25,*,992,*,c2,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_640)&0xffffffff)+8 , 16, 16)) -> intp(1,0,20,*,952,*,c2,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x1, %r18 splash_cmpr_2_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_642)+8 , 16, 16)) -> intp(7,0,29,*,760,*,8e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_642)&0xffffffff)+8 , 16, 16)) -> intp(2,0,13,*,704,*,8e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 730: SIAM siam 1 cancelint_2_643: rdhpr %halt, %r18 .word 0x85880000 ! 731: ALLCLEAN .word 0xe89fc380 ! 732: LDDA_R ldda [%r31, %r0] 0x1c, %r20 splash_hpstate_2_645: .word 0x81982f6f ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x0f6f, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_646) , 16, 16)) -> intp(2,0,27,*,640,*,b7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_646)&0xffffffff) , 16, 16)) -> intp(5,0,27,*,696,*,b7,1) #else set 0xde60010b, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_646: .word 0xa3b504d3 ! 734: FCMPNE32 fcmpne32 %d20, %d50, %r17 .word 0x9194c009 ! 735: WRPR_PIL_R wrpr %r19, %r9, %pil br_longdelay1_2_648: .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, .word 0x9d97c000 ! 736: WRPR_WSTATE_R wrpr %r31, %r0, %wstate splash_lsu_2_649: nop nop ta T_CHANGE_HPRIV set 0x7c09e544, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 737: FBPULE fbule splash_tba_2_650: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fdf20 ! 739: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc19fdf20 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_2_651: nop nop ta T_CHANGE_HPRIV setx 0xc7d421f23cfaeaf6, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 741: FBPLG fblg,a,pn %fcc0, .word 0xc1bfde20 ! 742: STDFA_R stda %f0, [%r0, %r31] .word 0x8d903625 ! 743: WRPR_PSTATE_I wrpr %r0, 0x1625, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_653), 16, 16)) -> intp(mask2tid(0x2),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,672,*,*,1) xir_2_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_653: and %g1, 2, %g1 brnz,a %g1, xirwait_2_653 ldx [%r17], %g1 xir_2_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80fc77 ! 744: WR_CLEAR_SOFTINT_I wr %r3, 0x1c77, %clear_softint .word 0x99a509c9 ! 745: FDIVd fdivd %f20, %f40, %f12 .word 0xe8bfc2e0 ! 746: STDA_R stda %r20, [%r31 + %r0] 0x17 nop nop mov 0x1, %r18 splash_cmpr_2_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_656)+8 , 16, 16)) -> intp(3,0,27,*,712,*,e3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_656)&0xffffffff)+8 , 16, 16)) -> intp(5,0,13,*,656,*,e3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x919224c3 ! 748: WRPR_PIL_I wrpr %r8, 0x04c3, %pil mondo_2_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d918013 ! 749: WRPR_WSTATE_R wrpr %r6, %r19, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_659)+8 , 16, 16)) -> intp(1,0,21,*,680,*,be,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_659)&0xffffffff)+8 , 16, 16)) -> intp(4,0,8,*,680,*,be,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819821d5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x01d5, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_2_660: rdhpr %halt, %r18 .word 0x85880000 ! 752: ALLCLEAN .word 0x2a780001 ! 753: BPCS .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_2_661: ta T_CHANGE_NONPRIV ! macro frzptr_2_662: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) sethi %hi(0x3cb00000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 755: BN bn,a jmptr_2_663: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_664)+8 , 16, 16)) -> intp(0,0,27,*,1008,*,86,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_664)&0xffffffff)+8 , 16, 16)) -> intp(3,0,15,*,760,*,86,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983653 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1653, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_2_665: rdhpr %halt, %r17 .word 0x85880000 ! 758: ALLCLEAN intveclr_2_666: nop nop ta T_CHANGE_HPRIV setx 0x35910b8f57f5b1b6, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x712, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 759: FBPLG fblg mondo_2_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d944008 ! 760: WRPR_WSTATE_R wrpr %r17, %r8, %wstate nop nop mov 0x0, %r18 splash_cmpr_2_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 761: SIAM siam 1 vahole6_2_669: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd0bfd040 ! 762: STDA_R stda %r8, [%r31 + %r0] 0x82 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_2 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_670: wrhpr %g0, 0xdca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7d140 ! 763: CASA_I casa [%r31] 0x8a, %r0, %r8 ibp_2_671: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_671: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_671 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_671: brnz %r16, ibp_wait2_671 ld [%r23], %r16 ba ibp_startwait2_671 mov 0x2, %r16 continue_ibp_2_671: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_671: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_671 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_671: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_671 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_671: best_set_reg(0x00000040aae99901,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xd09fd060 ! 764: LDDA_R ldda [%r31, %r0] 0x83, %r8 mondo_2_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d94400c ! 765: WRPR_WSTATE_R wrpr %r17, %r12, %wstate .word 0xd11fe090 ! 766: LDDF_I ldd [%r31, 0x0090], %f8 splash_tba_2_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xc19fde00 ! 768: LDDFA_R ldda [%r31, %r0], %f0 .word 0x8d902dac ! 769: WRPR_PSTATE_I wrpr %r0, 0x0dac, %pstate .word 0xd0bfe15d ! 770: STDA_I stda %r8, [%r31 + 0x015d] %asi .word 0xe1bfe040 ! 771: STDFA_I stda %f16, [0x0040, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_677: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_677) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,704,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_677: wrhpr %g0, 0x708, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 772: RDPC rd %pc, %r16 br_badelay2_2_678: .word 0x9ba409c1 ! 1: FDIVd fdivd %f16, %f32, %f44 allclean .word 0xa1b4c304 ! 773: ALIGNADDRESS alignaddr %r19, %r4, %r16 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_679: wrhpr %g0, 0x4c0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c280 ! 774: CASA_I casa [%r31] 0x14, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_680), 16, 16)) -> intp(mask2tid(0x2),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,696,*,*,1) xir_2_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_680: and %g1, 2, %g1 brnz,a %g1, xirwait_2_680 ldx [%r17], %g1 xir_2_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822fad ! 775: WR_CLEAR_SOFTINT_I wr %r8, 0x0fad, %clear_softint splash_lsu_2_681: nop nop ta T_CHANGE_HPRIV set 0x649f8b06, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x32800001 ! 1: BNE bne,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_682), 16, 16)) -> intp(mask2tid(0x2),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,760,*,*,1) xir_2_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_682: and %g1, 2, %g1 brnz,a %g1, xirwait_2_682 ldx [%r17], %g1 xir_2_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847989 ! 777: WR_CLEAR_SOFTINT_I wr %r17, 0x1989, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_683)+8 , 16, 16)) -> intp(7,0,10,*,944,*,b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_683)&0xffffffff)+8 , 16, 16)) -> intp(7,0,3,*,704,*,b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983c1d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c1d, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_2_684: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_684: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_684 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_684: brnz %r16, ibp_wait2_684 ld [%r23], %r16 ba ibp_startwait2_684 mov 0x2, %r16 continue_ibp_2_684: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_684: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_684 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_684: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_684 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_684: best_set_reg(0x00000040f8d90101,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x9f802030 ! 779: SIR sir 0x0030 .word 0x9f803f9f ! 780: SIR sir 0x1f9f #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_685), 16, 16)) -> intp(mask2tid(0x2),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,912,*,*,1) xir_2_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_685: and %g1, 2, %g1 brnz,a %g1, xirwait_2_685 ldx [%r17], %g1 xir_2_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82f2fc ! 781: WR_CLEAR_SOFTINT_I wr %r11, 0x12fc, %clear_softint .word 0xc19fdc40 ! 782: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_686) , 16, 16)) -> intp(1,0,8,*,1000,*,23,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_686)&0xffffffff) , 16, 16)) -> intp(5,0,22,*,648,*,23,1) #else set 0x8ba0283c, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a409d1 ! 1: FDIVd fdivd %f16, %f48, %f16 intvec_2_686: .word 0x19400001 ! 783: FBPUGE fbuge .word 0xc1bfdf20 ! 784: STDFA_R stda %f0, [%r0, %r31] brcommon3_2_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e0c0 ! 1: STQF_I - %f11, [0x00c0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0x93aac823 ! 785: FMOVGE fmovs %fcc1, %f3, %f9 nop nop mov 0x0, %r18 splash_cmpr_2_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 786: SIAM siam 1 ibp_2_689: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_689: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_689 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_689: brnz %r16, ibp_wait2_689 ld [%r23], %r16 ba ibp_startwait2_689 mov 0x2, %r16 continue_ibp_2_689: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_689: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_689 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_689: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_689 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_689: best_set_reg(0x0000004029c1018a,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe19fdc40 ! 787: LDDFA_R ldda [%r31, %r0], %f16 .word 0xe027e188 ! 788: STW_I stw %r16, [%r31 + 0x0188] splash_tba_2_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_691: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_691) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,680,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_691: wrhpr %g0, 0x449, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 790: RDPC rd %pc, %r17 .word 0xa5702aee ! 791: POPC_I popc 0x0aee, %r18 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_2_693: nop nop ta T_CHANGE_HPRIV setx 0x5089fc6baf281e07, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_2_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_694-donret_2_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00938c00 | (20 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1307, %htstate best_set_reg(0x1cf3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (2) retry .align 2048 donretarg_2_694: .word 0x91a489d0 ! 794: FDIVd fdivd %f18, %f16, %f8 nop nop set 0xe7d00957, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_2_695: .word 0x9bb484c5 ! 795: FCMPNE32 fcmpne32 %d18, %d36, %r13 .word 0xda2fe0a9 ! 796: STB_I stb %r13, [%r31 + 0x00a9] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_696) , 16, 16)) -> intp(5,0,9,*,688,*,cb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_696)&0xffffffff) , 16, 16)) -> intp(1,0,15,*,1000,*,cb,1) #else set 0xc160f211, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_696: .word 0xa5a309cb ! 797: FDIVd fdivd %f12, %f42, %f18 .word 0x87ac8a52 ! 798: FCMPd fcmpd %fcc, %f18, %f18 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_698)+8 , 16, 16)) -> intp(7,0,12,*,1016,*,8f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_698)&0xffffffff)+8 , 16, 16)) -> intp(1,0,18,*,728,*,8f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983716 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1716, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0x28d08d2d, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_699: .word 0x97b4c4d2 ! 800: FCMPNE32 fcmpne32 %d50, %d18, %r11 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_700), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,664,*,*,1) xir_2_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_700: and %g1, 2, %g1 brnz,a %g1, xirwait_2_700 ldx [%r17], %g1 xir_2_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82e450 ! 801: WR_CLEAR_SOFTINT_I wr %r11, 0x0450, %clear_softint .word 0xe1bfdb20 ! 802: STDFA_R stda %f16, [%r0, %r31] cancelint_2_701: rdhpr %halt, %r12 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x0, %r18 splash_cmpr_2_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_2_703: ta T_CHANGE_NONHPRIV .word 0x8198255f ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x055f, %hpstate .word 0x9f802c0f ! 806: SIR sir 0x0c0f nop nop mov 0x1, %r18 splash_cmpr_2_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_704)+8 , 16, 16)) -> intp(2,0,23,*,728,*,7e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_704)&0xffffffff)+8 , 16, 16)) -> intp(6,0,12,*,1016,*,7e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_705: wrhpr %g0, 0x9d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c2c0 ! 808: CASA_I casa [%r31] 0x16, %r0, %r18 pmu_2_706: nop nop setx 0xffffffb4ffffffad, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_2_707: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_2_708: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_709: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_709) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,992,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_709: wrhpr %g0, 0x71b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 812: RDPC rd %pc, %r12 pmu_2_710: nop nop setx 0xffffffbbffffffa2, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xbc4092fb, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_711: .word 0x9f802f9e ! 814: SIR sir 0x0f9e splash_hpstate_2_712: .word 0x81983df5 ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x1df5, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_2 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_713: wrhpr %g0, 0xb4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c080 ! 816: CASA_I casa [%r31] 0x 4, %r0, %r12 brcommon3_2_714: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7df00 ! 1: CASA_I casa [%r31] 0xf8, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x8d90350d ! 817: WRPR_PSTATE_I wrpr %r0, 0x150d, %pstate .word 0x91948006 ! 818: WRPR_PIL_R wrpr %r18, %r6, %pil mondo_2_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d910010 ! 819: WRPR_WSTATE_R wrpr %r4, %r16, %wstate nop nop mov 0x1, %r18 splash_cmpr_2_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_717)+8 , 16, 16)) -> intp(6,0,0,*,960,*,37,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_717)&0xffffffff)+8 , 16, 16)) -> intp(5,0,15,*,952,*,37,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_718: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_718) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,664,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_718: wrhpr %g0, 0x950, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 821: RDPC rd %pc, %r20 nop nop set 0x9f0f532, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_719: .word 0x9f80206e ! 822: SIR sir 0x006e splash_lsu_2_720: nop nop ta T_CHANGE_HPRIV set 0x78441012, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 823: FBPULE fbule,a,pn %fcc0, .word 0x9f802ef5 ! 824: SIR sir 0x0ef5 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_721: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_721) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,688,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_721: wrhpr %g0, 0xacb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 825: RDPC rd %pc, %r9 .word 0xe81fe050 ! 826: LDD_I ldd [%r31 + 0x0050], %r20 br_badelay3_2_723: .word 0x34800001 ! 1: BG bg,a .word 0x02800001 ! 1: BE be .word 0xd7104006 ! 1: LDQF_R - [%r1, %r6], %f11 .word 0x95a4c82d ! 827: FADDs fadds %f19, %f13, %f10 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_724) , 16, 16)) -> intp(4,0,15,*,912,*,f6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_724)&0xffffffff) , 16, 16)) -> intp(6,0,20,*,648,*,f6,1) #else set 0x615023a8, %r28 !TTID : 3 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_724: .word 0xa3a2c9cc ! 828: FDIVd fdivd %f42, %f12, %f48 nop nop set 0x907030c8, %r28 !TTID : 0 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_725: .word 0xa3a449d1 ! 829: FDIVd fdivd %f48, %f48, %f48 .word 0x9194c010 ! 830: WRPR_PIL_R wrpr %r19, %r16, %pil jmptr_2_727: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x19400001 ! 1: FBPUGE fbuge .word 0x8d90336b ! 832: WRPR_PSTATE_I wrpr %r0, 0x136b, %pstate mondo_2_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3e0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d940014 ! 833: WRPR_WSTATE_R wrpr %r16, %r20, %wstate ibp_2_730: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_730: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_730 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_730: brnz %r16, ibp_wait2_730 ld [%r23], %r16 ba ibp_startwait2_730 mov 0x2, %r16 continue_ibp_2_730: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_730: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_730 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_730: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_730 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_730: best_set_reg(0x00000040d1c18a31,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa9b34494 ! 834: FCMPLE32 fcmple32 %d44, %d20, %r20 cwp_2_731: set user_data_start, %o7 .word 0x93902005 ! 835: WRPR_CWP_I wrpr %r0, 0x0005, %cwp jmptr_2_732: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_2_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3d0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d94c011 ! 837: WRPR_WSTATE_R wrpr %r19, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_734) , 16, 16)) -> intp(3,0,15,*,696,*,ea,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_734)&0xffffffff) , 16, 16)) -> intp(4,0,11,*,968,*,ea,1) #else set 0x5d307f22, %r28 !TTID : 7 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_734: .word 0x97b184d3 ! 838: FCMPNE32 fcmpne32 %d6, %d50, %r11 brcommon3_2_735: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x00800001 ! 839: BN bn mondo_2_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d92c008 ! 840: WRPR_WSTATE_R wrpr %r11, %r8, %wstate nop nop set 0xfbf0fc99, %r28 !TTID : 4 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7a4c9d2 ! 1: FDIVd fdivd %f50, %f18, %f50 intvec_2_737: .word 0x19400001 ! 841: FBPUGE fbuge splash_lsu_2_738: nop nop ta T_CHANGE_HPRIV set 0x3ac1fb57, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 842: FBPULE fbule mondo_2_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d910010 ! 843: WRPR_WSTATE_R wrpr %r4, %r16, %wstate .word 0x3e800001 ! 1: BVC bvc,a .word 0x8d9035a9 ! 844: WRPR_PSTATE_I wrpr %r0, 0x15a9, %pstate nop nop set 0x8bf0b167, %r28 !TTID : 1 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_741: .word 0x9f802e2d ! 845: SIR sir 0x0e2d mondo_2_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r18, [%r0+0x3d0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d92c009 ! 846: WRPR_WSTATE_R wrpr %r11, %r9, %wstate trapasi_2_743: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_744: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_744) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,952,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_744: wrhpr %g0, 0xcc9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 849: RDPC rd %pc, %r18 mondo_2_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r2, [%r0+0x3c0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d91c012 ! 850: WRPR_WSTATE_R wrpr %r7, %r18, %wstate .word 0xc0bfde20 ! 851: STDA_R stda %r0, [%r31 + %r0] 0xf1 nop nop mov 0x1, %r18 splash_cmpr_2_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_747)+8 , 16, 16)) -> intp(1,0,2,*,752,*,f6,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_747)&0xffffffff)+8 , 16, 16)) -> intp(5,0,26,*,704,*,f6,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_2_748: set 0x60140000, %r31 .word 0x8584a31b ! 853: WRCCR_I wr %r18, 0x031b, %ccr nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_749: wrhpr %g0, 0xcda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c720 ! 854: CASA_I casa [%r31] 0x39, %r0, %r18 .word 0x9192f2b3 ! 855: WRPR_PIL_I wrpr %r11, 0x12b3, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_750) , 16, 16)) -> intp(1,0,28,*,944,*,bf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_750)&0xffffffff) , 16, 16)) -> intp(6,0,20,*,952,*,bf,1) #else set 0xf6b03a74, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a509d0 ! 856: FDIVd fdivd %f20, %f16, %f40 nop nop set 0x6b509e3b, %r28 !TTID : 6 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 intvec_2_751: .word 0x99a489cb ! 857: FDIVd fdivd %f18, %f42, %f12 cancelint_2_752: rdhpr %halt, %r19 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100d0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_753: !! CWQ interrupt (206100d0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_753) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,640,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,968,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_753: wrhpr %g0, 0x5d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 859: RDPC rd %pc, %r9 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_754) , 16, 16)) -> intp(5,0,15,*,968,*,df,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_754)&0xffffffff) , 16, 16)) -> intp(3,0,14,*,976,*,df,1) #else set 0xb1a0badd, %r28 !TTID : 2 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f80396c ! 1: SIR sir 0x196c intvec_2_754: .word 0x39400001 ! 860: FBPUGE fbuge,a,pn %fcc0, brcommon3_2_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe190 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0190] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902c16 ! 861: WRPR_PSTATE_I wrpr %r0, 0x0c16, %pstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_756)+8 , 16, 16)) -> intp(0,0,31,*,752,*,63,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_756)&0xffffffff)+8 , 16, 16)) -> intp(5,0,30,*,680,*,63,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982e9d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0e9d, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_2 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_757: wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c080 ! 863: CASA_I casa [%r31] 0x 4, %r0, %r18 .word 0x879020d7 ! 864: WRPR_TT_I wrpr %r0, 0x00d7, %tt trapasi_2_758: nop mov 0x18, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_2_759: nop nop ta T_CHANGE_HPRIV set 0xe72045c9, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 866: FBPULE fbule,a,pn %fcc0, .word 0xe477e0e8 ! 867: STX_I stx %r18, [%r31 + 0x00e8] br_badelay2_2_760: .word 0xa9a1c9d3 ! 1: FDIVd fdivd %f38, %f50, %f20 pdist %f28, %f10, %f12 .word 0xa3b28314 ! 868: ALIGNADDRESS alignaddr %r10, %r20, %r17 intveclr_2_761: nop nop ta T_CHANGE_HPRIV setx 0x7f5f4febc06a8ecd, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 869: FBPLG fblg,a,pn %fcc0, .word 0xf1efe070 ! 870: PREFETCHA_I prefetcha [%r31, + 0x0070] %asi, #24 .word 0xc0bfdb40 ! 871: STDA_R stda %r0, [%r31 + %r0] 0xda nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_764: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_764) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,696,*,*,1)') ifelse(5,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_764: wrhpr %g0, 0x6ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 872: RDPC rd %pc, %r17 .word 0x9f802020 ! 873: SIR sir 0x0020 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_2 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_766: wrhpr %g0, 0xe48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c3c0 ! 874: CASA_I casa [%r31] 0x1e, %r0, %r12 nop nop set 0x32b0e50e, %r28 !TTID : 5 (mask2tid(0x2)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x2),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7b284d3 ! 1: FCMPNE32 fcmpne32 %d10, %d50, %r19 intvec_2_767: .word 0x39400001 ! 875: FBPUGE fbuge,a,pn %fcc0, brcommon1_2_768: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe070 ! 1: STXFSR_I st-sfr %f1, [0x0070, %r31] ba,a .+8 jmpl %r27-4, %r27 .word 0xa9b50488 ! 876: FCMPLE32 fcmple32 %d20, %d8, %r20 frzptr_2_769: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) sethi %hi(0x3cb40000), %r21 stxa %r27, [%r21]0x57 ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 877: BN bn,a brcommon2_2_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xdb14c011 ! 1: LDQF_R - [%r19, %r17], %f13 ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fda60 ! 878: LDDFA_R ldda [%r31, %r0], %f0 .word 0xa5703e6a ! 879: POPC_I popc 0x1e6a, %r18 brcommon1_2_772: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-0, %r27 .word 0x87aa8a50 ! 880: FCMPd fcmpd %fcc, %f10, %f16 .word 0xc09fda60 ! 881: LDDA_R ldda [%r31, %r0] 0xd3, %r0 splash_tba_2_774: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_2_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb3ffffffac, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x02800001 ! 1: BE be .word 0x8d903347 ! 884: WRPR_PSTATE_I wrpr %r0, 0x1347, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_777), 16, 16)) -> intp(mask2tid(0x2),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,936,*,*,1) xir_2_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_777: and %g1, 2, %g1 brnz,a %g1, xirwait_2_777 ldx [%r17], %g1 xir_2_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab843040 ! 885: WR_CLEAR_SOFTINT_I wr %r16, 0x1040, %clear_softint .word 0xd037e0db ! 886: STH_I sth %r8, [%r31 + 0x00db] .word 0xc19fe140 ! 887: LDDFA_I ldda [%r31, 0x0140], %f0 splash_lsu_2_778: nop nop ta T_CHANGE_HPRIV set 0xb76d0af2, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x02800001 ! 1: BE be stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 888: FBPULE fbule,a,pn %fcc0, brcommon2_2_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a00541 ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-0, %r27 .word 0xe1bfde20 ! 889: STDFA_R stda %f16, [%r0, %r31] mondo_2_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d944008 ! 890: WRPR_WSTATE_R wrpr %r17, %r8, %wstate nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_781: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_781) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,736,*,*,1)') ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,720,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_781: wrhpr %g0, 0xf5b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 891: RDPC rd %pc, %r18 fbn skip_2_782 stxa %r18, [%r0] ASI_LSU_CONTROL .word 0x95b144cd ! 1: FCMPNE32 fcmpne32 %d36, %d44, %r10 stxa %r15, [%r0] ASI_LSU_CONTROL .align 128 skip_2_782: .word 0xd23fe1e4 ! 892: STD_I std %r9, [%r31 + 0x01e4] intveclr_2_783: nop nop ta T_CHANGE_HPRIV setx 0xcca7b6f2738b8597, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 893: FBPLG fblg jmptr_2_784: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_2_785: set user_data_start, %o7 .word 0x93902000 ! 895: WRPR_CWP_I wrpr %r0, 0x0000, %cwp vahole6_2_786: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xd3e7e000 ! 896: CASA_R casa [%r31] %asi, %r0, %r9 pmu_2_787: nop nop setx 0xffffffb7ffffffa8, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- vahole2_2_788: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfdb20 ! 898: STDFA_R stda %f16, [%r0, %r31] mondo_2_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3c8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d908010 ! 899: WRPR_WSTATE_R wrpr %r2, %r16, %wstate mondo_2_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d94400a ! 900: WRPR_WSTATE_R wrpr %r17, %r10, %wstate mondo_2_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3c0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d94c003 ! 901: WRPR_WSTATE_R wrpr %r19, %r3, %wstate nop nop mov 0x1, %r18 splash_cmpr_2_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_792)+8 , 16, 16)) -> intp(1,0,17,*,976,*,1f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_792)&0xffffffff)+8 , 16, 16)) -> intp(4,0,24,*,672,*,1f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_793)+8 , 16, 16)) -> intp(0,0,6,*,1008,*,22,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_793)&0xffffffff)+8 , 16, 16)) -> intp(2,0,17,*,688,*,22,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983d85 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1d85, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_2_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e050 ! 1: STQF_I - %f9, [0x0050, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa5aac829 ! 904: FMOVGE fmovs %fcc1, %f9, %f18 cancelint_2_795: rdhpr %halt, %r18 .word 0x85880000 ! 905: ALLCLEAN pmu_2_796: nop nop setx 0xffffffbdffffffa5, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_2_797: nop nop ta T_CHANGE_HPRIV setx 0x2ecb115c58784233, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_2 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_798: wrhpr %g0, 0xe98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7d160 ! 908: CASA_I casa [%r31] 0x8b, %r0, %r12 ibp_2_799: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_799: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_799 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_799: brnz %r16, ibp_wait2_799 ld [%r23], %r16 ba ibp_startwait2_799 mov 0x2, %r16 continue_ibp_2_799: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_799: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_799 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_799: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_799 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_799: best_set_reg(0x000000400fca31b6,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa5a449b0 ! 909: FDIVs fdivs %f17, %f16, %f18 ibp_2_800: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_800: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_800 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_800: brnz %r16, ibp_wait2_800 ld [%r23], %r16 ba ibp_startwait2_800 mov 0x2, %r16 continue_ibp_2_800: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_800: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_800 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_800: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_800 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_800: best_set_reg(0x0000004003f1b6a4,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xe83fe0b0 ! 910: STD_I std %r20, [%r31 + 0x00b0] .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] .word 0xc0bfde20 ! 912: STDA_R stda %r0, [%r31 + %r0] 0xf1 brcommon3_2_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe170 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0170] ba,a .+8 jmpl %r27+0, %r27 stxa %r20, [%r0] ASI_LSU_CONTROL .word 0x9baac832 ! 913: FMOVGE fmovs %fcc1, %f18, %f13 cancelint_2_803: rdhpr %halt, %r8 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_2_804: .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, .word 0x81983f66 ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x1f66, %hpstate jmptr_2_805: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_2_806: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_806: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_806 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_806: brnz %r16, ibp_wait2_806 ld [%r23], %r16 ba ibp_startwait2_806 mov 0x2, %r16 continue_ibp_2_806: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_806: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_806 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_806: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_806 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_806: best_set_reg(0x000000500af6a40e,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0xa3a149d2 ! 917: FDIVd fdivd %f36, %f18, %f48 .word 0xd03fe110 ! 918: STD_I std %r8, [%r31 + 0x0110] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_808), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,720,*,*,1) xir_2_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_808: and %g1, 2, %g1 brnz,a %g1, xirwait_2_808 ldx [%r17], %g1 xir_2_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8268dd ! 919: WR_CLEAR_SOFTINT_I wr %r9, 0x08dd, %clear_softint .word 0x9f802c01 ! 920: SIR sir 0x0c01 jmptr_2_809: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_2_810: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_2_811: .word 0x81983edd ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x1edd, %hpstate ibp_2_812: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_812: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_812 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_812: brnz %r16, ibp_wait2_812 ld [%r23], %r16 ba ibp_startwait2_812 mov 0x2, %r16 continue_ibp_2_812: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_812: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_812 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_812: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_812 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_812: best_set_reg(0x000000401fe40eff,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi .word 0x20800001 ! 924: BN bn,a frzptr_2_813: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 925: BN bn,a jmptr_2_814: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_2_815: .word 0x26ca0001 ! 1: BRLZ brlz,a,pt %r8, .word 0x81982d03 ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x0d03, %hpstate memptr_2_816: set user_data_start, %r31 .word 0x8582b4e0 ! 928: WRCCR_I wr %r10, 0x14e0, %ccr nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_817: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_817) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,688,*,*,1)') ifelse(7,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_817: wrhpr %g0, 0xe5a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 929: RDPC rd %pc, %r10 .word 0xc19fdc40 ! 930: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_819: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_819) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,968,*,*,1)') ifelse(4,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_819: wrhpr %g0, 0x583, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 931: RDPC rd %pc, %r9 br_badelay1_2_820: .word 0xf16fe140 ! 1: PREFETCH_I prefetch [%r31 + 0x0140], #24 .word 0xd13470ac ! 1: STQF_I - %f8, [0x10ac, %r17] .word 0xf16fe170 ! 1: PREFETCH_I prefetch [%r31 + 0x0170], #24 normalw .word 0x93458000 ! 932: RD_SOFTINT_REG rd %softint, %r9 fpinit_2_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x87a80a44 ! 933: FCMPd fcmpd %fcc, %f0, %f4 .word 0x8d903b15 ! 934: WRPR_PSTATE_I wrpr %r0, 0x1b15, %pstate mondo_2_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3d8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d934006 ! 935: WRPR_WSTATE_R wrpr %r13, %r6, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_2_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_2_824: .word 0x8f902002 ! 937: WRPR_TL_I wrpr %r0, 0x0002, %tl splash_tba_2_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_2_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_826)+8 , 16, 16)) -> intp(7,0,12,*,952,*,a,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_826)&0xffffffff)+8 , 16, 16)) -> intp(1,0,13,*,712,*,a,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982c85 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0c85, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_2_827: nop ta T_CHANGE_PRIV setx 0x00000004003a0000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e170 ! 941: STX_I stx %r16, [%r31 + 0x0170] br_badelay1_2_828: .word 0x32800001 ! 1: BNE bne,a .word 0xa1a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f16 .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, normalw .word 0x91458000 ! 942: RD_SOFTINT_REG rd %softint, %r8 nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_2 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_829: wrhpr %g0, 0xe83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d920 ! 943: CASA_I casa [%r31] 0xc9, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_2_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe03fe070 ! 946: STD_I std %r16, [%r31 + 0x0070] nop nop ta T_CHANGE_HPRIV mov 0x2, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_2_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_2 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_2_832: wrhpr %g0, 0xe9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c720 ! 947: CASA_I casa [%r31] 0x39, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_833: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_833) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,912,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,1016,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_833: wrhpr %g0, 0x251, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 948: RDPC rd %pc, %r9 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_834) , 16, 16)) -> intp(6,0,8,*,688,*,4e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_834)&0xffffffff) , 16, 16)) -> intp(7,0,13,*,704,*,4e,1) #else set 0x6380a7ec, %r28 !TTID : 7 (mask2tid(0x2)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_2_834: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x91b484d3 ! 951: FCMPNE32 fcmpne32 %d18, %d50, %r8 splash_tba_2_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_836), 16, 16)) -> intp(mask2tid(0x2),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1016,*,*,1) xir_2_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_836: and %g1, 2, %g1 brnz,a %g1, xirwait_2_836 ldx [%r17], %g1 xir_2_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8366e7 ! 953: WR_CLEAR_SOFTINT_I wr %r13, 0x06e7, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_837), 16, 16)) -> intp(mask2tid(0x2),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x2),1,3,*,1000,*,*,1) xir_2_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_2_837: and %g1, 2, %g1 brnz,a %g1, xirwait_2_837 ldx [%r17], %g1 xir_2_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f4e6 ! 954: WR_CLEAR_SOFTINT_I wr %r7, 0x14e6, %clear_softint mondo_2_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3d0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d948003 ! 955: WRPR_WSTATE_R wrpr %r18, %r3, %wstate pmu_2_839: nop nop setx 0xffffffb9ffffffa0, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f8030ff ! 957: SIR sir 0x10ff nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_840: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_840) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,760,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,936,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_840: wrhpr %g0, 0x881, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 958: RDPC rd %pc, %r13 cancelint_2_841: rdhpr %halt, %r11 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe0e0 ! 960: LDDFA_I ldda [%r31, 0x00e0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_842: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_842) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,752,*,*,1)') ifelse(1,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,976,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_842: wrhpr %g0, 0xa83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 961: RDPC rd %pc, %r17 intveclr_2_843: nop nop ta T_CHANGE_HPRIV setx 0xd0d94e7302508a5b, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 962: FBPLG fblg nop nop mov 0x1, %r18 splash_cmpr_2_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_844)+8 , 16, 16)) -> intp(2,0,23,*,944,*,66,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_844)&0xffffffff)+8 , 16, 16)) -> intp(2,0,0,*,968,*,66,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_2_845: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_845: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_845 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_845: brnz %r16, ibp_wait2_845 ld [%r23], %r16 ba ibp_startwait2_845 mov 0x2, %r16 continue_ibp_2_845: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_845: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_845 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_845: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_845 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_845: best_set_reg(0x00000040feceffd3,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0xf98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1a1c9b1 ! 964: FDIVs fdivs %f7, %f17, %f16 frzptr_2_846: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f12 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x1, %r18 splash_cmpr_2_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_2_847)+8 , 16, 16)) -> intp(5,0,22,*,720,*,7e,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_2_847)&0xffffffff)+8 , 16, 16)) -> intp(3,0,22,*,1000,*,7e,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_2_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd91fe0d0 ! 968: LDDF_I ldd [%r31, 0x00d0], %f12 cancelint_2_850: rdhpr %halt, %r19 .word 0x85880000 ! 969: ALLCLEAN .word 0x91924010 ! 970: WRPR_PIL_R wrpr %r9, %r16, %pil .word 0xe19fe060 ! 971: LDDFA_I ldda [%r31, 0x0060], %f16 .word 0xe277e0f0 ! 972: STX_I stx %r17, [%r31 + 0x00f0] .word 0x91940011 ! 973: WRPR_PIL_R wrpr %r16, %r17, %pil splash_lsu_2_853: nop nop ta T_CHANGE_HPRIV set 0xb1c211e2, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x30800001 ! 1: BA ba,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 974: FBPULE fbule frzptr_2_854: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) sethi %hi(0x3cbc0000), %r21 stxa %r27, [%r21]0x57 jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_2_855: nop nop best_set_reg(0xe1a00000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_2_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_2_856-donret_2_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00970a00 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1719, %htstate wrhpr %g0, 0xc19, %hpstate ! rand=1 (2) ldx [%r12+%r0], %g1 retry donretarg_2_856: .word 0x81982d16 ! 977: WRHPR_HPSTATE_I wrhpr %r0, 0x0d16, %hpstate .word 0xe19fe180 ! 978: LDDFA_I ldda [%r31, 0x0180], %f16 .word 0x17400001 ! 1: FBPGE fbge .word 0x8d903d90 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1d90, %pstate .word 0xe2800b80 ! 980: LDUWA_R lduwa [%r0, %r0] 0x5c, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x2+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_2_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_2_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 2 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_2_858: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x2),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_2_858) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,912,*,*,1)') ifelse(6,mask2tid(0x2),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_2_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x2),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_2_858: wrhpr %g0, 0x112, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 982: RDPC rd %pc, %r8 .word 0xe13fe150 ! 983: STDF_I std %f16, [0x0150, %r31] jmptr_2_860: nop nop best_set_reg(0xe0a00000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 .word 0xa9a249c4 ! 985: FDIVd fdivd %f40, %f4, %f20 .word 0xe8bfc2c0 ! 986: STDA_R stda %r20, [%r31 + %r0] 0x16 vahole3_2_863: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe93fe0b0 ! 987: STDF_I std %f20, [0x00b0, %r31] .word 0x9f802d66 ! 988: SIR sir 0x0d66 splash_lsu_2_864: nop nop ta T_CHANGE_HPRIV set 0x228e58e9, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0f400002 ! 1: FBPU fbu stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 989: FBPULE fbule,a,pn %fcc0, brcommon2_2_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa3a0054b ! 1: FSQRTd fsqrt ba,a .+8 jmpl %r27-4, %r27 .word 0xc19fde20 ! 990: LDDFA_R ldda [%r31, %r0], %f0 ibp_2_866: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x2, %r16 ibp_startwait2_866: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_ibp_2_866 mov (~0x2&0xf), %r16 ld [%r23], %r16 ibp_wait2_866: brnz %r16, ibp_wait2_866 ld [%r23], %r16 ba ibp_startwait2_866 mov 0x2, %r16 continue_ibp_2_866: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_2_866: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_2_866 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_ibp_2_866: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_ibp_2_866 ldxa [0x50]%asi, %r14 !Running_rw ibp_doit2_866: best_set_reg(0x0000005080ffd37c,%r19, %r20) stxa %r20, [%r18]0x42 stxa %r16, [0x60] %asi !Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi !restore %asi wrhpr %g0, 0x3d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe21fe0f0 ! 991: LDD_I ldd [%r31 + 0x00f0], %r17 memptr_2_867: set user_data_start, %r31 .word 0x85807f79 ! 992: WRCCR_I wr %r1, 0x1f79, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0x9f802608 ! 994: SIR sir 0x0608 .word 0xf16fe160 ! 1: PREFETCH_I prefetch [%r31 + 0x0160], #24 .word 0xe3e7d060 ! 1: CASA_I casa [%r31] 0x83, %r0, %r17 mov 0xb4, %r30 .word 0x93d0001e ! 995: Tcc_R tne icc_or_xcc, %r0 + %r30 .word 0x9f802100 ! 996: SIR sir 0x0100 .word 0xe227e0cb ! 997: STW_I stw %r17, [%r31 + 0x00cb] .word 0x9f8021c0 ! 998: SIR sir 0x01c0 vahole6_2_871: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xe21fe040 ! 999: LDD_I ldd [%r31 + 0x0040], %r17 splash_tba_2_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop .text setx join_lbl_0_0, %g1, %g2 jmp %g2 nop fork_lbl_0_1: wrhpr %g0, 0x18b, %hpstate ! ta T_CHANGE_NONHPRIV splash_tba_1_0: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 1: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xd127e16c ! 2: STF_I st %f8, [0x016c, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_1 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 1_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_1: wrhpr %g0, 0x448, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 3: CASA_I casa [%r31] 0xf8, %r0, %r8 dvapa_1_2: nop nop ta T_CHANGE_HPRIV mov 0x92b, %r20 mov 0x1b, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xa41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f80202c ! 4: SIR sir 0x002c nop nop set 0x2fa093fb, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9bb144c6 ! 1: FCMPNE32 fcmpne32 %d36, %d6, %r13 intvec_1_3: .word 0x39400001 ! 5: FBPUGE fbuge,a,pn %fcc0, br_longdelay3_1_4: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9f803483 ! 6: SIR sir 0x1483 mondo_1_5: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d944004 ! 7: WRPR_WSTATE_R wrpr %r17, %r4, %wstate iaw_1_6: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_6: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_6 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_6: brnz %r16, iaw_wait1_6 ld [%r23], %r16 ba iaw_startwait1_6 mov 0x1, %r16 continue_iaw_1_6: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_6: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_6 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_6: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_6 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_6: mov 0x38, %r18 iaw4_1_6: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfda00 ! 8: STDA_R stda %r0, [%r31 + %r0] 0xd0 br_badelay3_1_7: .word 0x12800001 ! 1: BNE bne .word 0x32800002 ! 1: BNE bne,a .word 0xe915000b ! 1: LDQF_R - [%r20, %r11], %f20 .word 0xa3a2c823 ! 9: FADDs fadds %f11, %f3, %f17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_8), 16, 16)) -> intp(mask2tid(0x1),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_8)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1000,*,*,1) xir_1_8: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_8: and %g1, 2, %g1 brnz,a %g1, xirwait_1_8 ldx [%r17], %g1 xir_1_8: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ba6f ! 10: WR_CLEAR_SOFTINT_I wr %r18, 0x1a6f, %clear_softint .word 0x2a800001 ! 1: BCS bcs,a .word 0x8d902081 ! 11: WRPR_PSTATE_I wrpr %r0, 0x0081, %pstate .word 0xe31fe170 ! 12: LDDF_I ldd [%r31, 0x0170], %f17 nop nop set 0x18e04358, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80275f ! 1: SIR sir 0x075f intvec_1_11: .word 0x91a449c3 ! 13: FDIVd fdivd %f48, %f34, %f8 vahole2_1_12: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xc1bfdf00 ! 14: STDFA_R stda %f0, [%r0, %r31] ibp_1_13: nop nop .word 0x87a98a44 ! 15: FCMPd fcmpd %fcc, %f6, %f4 nop nop ta T_CHANGE_HPRIV ! macro donret_1_14: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_14-donret_1_14), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0090e600 | (28 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x40d, %htstate best_set_reg(0x12aa, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) ldx [%r12+%r0], %g1 retry donretarg_1_14: .word 0xd2ffdd40 ! 16: SWAPA_R swapa %r9, [%r31 + %r0] 0xea splash_tba_1_15: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 17: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_16 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 16_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_16: wrhpr %g0, 0x8da, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d040 ! 18: CASA_I casa [%r31] 0x82, %r0, %r9 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_17 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_17 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_17: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_17) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,688,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_17)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_17: wrhpr %g0, 0x7c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 19: RDPC rd %pc, %r9 .word 0x9f8024c3 ! 20: SIR sir 0x04c3 brcommon3_1_18: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 21: BN bn,a .word 0x9f802023 ! 22: SIR sir 0x0023 .word 0x91d020b2 ! 23: Tcc_I ta icc_or_xcc, %r0 + 178 br_badelay2_1_19: .word 0x32800001 ! 1: BNE bne,a pdist %f14, %f14, %f14 .word 0xa3b4c314 ! 24: ALIGNADDRESS alignaddr %r19, %r20, %r17 ibp_1_20: nop nop wrhpr %g0, 0xb4b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fc2c0 ! 25: LDDFA_R ldda [%r31, %r0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_21: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983812 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1812, %hpstate .word 0x81b01021 ! 26: SIAM siam 1 frzptr_1_22: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x24cfc001 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 27: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_23 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 23_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_23: wrhpr %g0, 0x89b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7d060 ! 28: CASA_I casa [%r31] 0x83, %r0, %r17 mondo_1_24: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3e8] %asi stxa %r7, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d914014 ! 29: WRPR_WSTATE_R wrpr %r5, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_25 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 25_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_25: wrhpr %g0, 0x541, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7dd40 ! 30: CASA_I casa [%r31] 0xea, %r0, %r17 .word 0xe22fe16a ! 31: STB_I stb %r17, [%r31 + 0x016a] brcommon3_1_26: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7c380 ! 1: CASA_I casa [%r31] 0x1c, %r0, %r17 ba,a .+8 jmpl %r27-4, %r27 .word 0xe2bfc3c0 ! 32: STDA_R stda %r17, [%r31 + %r0] 0x1e .word 0xe2dfc240 ! 1: LDXA_R ldxa [%r31, %r0] 0x12, %r17 .word 0xa3b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r17 mov 0xb5, %r30 .word 0x93d0001e ! 33: Tcc_R tne icc_or_xcc, %r0 + %r30 .word 0xe19fe180 ! 34: LDDFA_I ldda [%r31, 0x0180], %f16 brcommon3_1_27: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r17 ba,a .+8 jmpl %r27-0, %r27 .word 0xe33fe050 ! 35: STDF_I std %f17, [0x0050, %r31] nop nop mov 0x1, %r18 splash_cmpr_1_28: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_28)+8 , 16, 16)) -> intp(4,0,5,*,992,*,67,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_28)&0xffffffff)+8 , 16, 16)) -> intp(0,0,31,*,760,*,67,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 36: SIAM siam 1 jmptr_1_29: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 37: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_30 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_30 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_30: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_30) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,960,*,*,1)') ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_30)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,752,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_30: wrhpr %g0, 0x43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 38: RDPC rd %pc, %r18 cancelint_1_31: rdhpr %halt, %r18 .word 0x85880000 ! 39: ALLCLEAN .word 0x89800011 ! 40: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_33), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_33)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,912,*,*,1) xir_1_33: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_33: and %g1, 2, %g1 brnz,a %g1, xirwait_1_33 ldx [%r17], %g1 xir_1_33: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8429ff ! 41: WR_CLEAR_SOFTINT_I wr %r16, 0x09ff, %clear_softint frzptr_1_34: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfda00 ! 42: STDFA_R stda %f0, [%r0, %r31] brcommon3_1_35: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe010 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0010] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 43: BN bn,a frzptr_1_36: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x24cfc002 ! 1: BRLEZ brlez,a,pt %r31, best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 44: BN bn,a nop nop set 0x9c20679f, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7a209c7 ! 1: FDIVd fdivd %f8, %f38, %f50 intvec_1_37: .word 0xa1b404d3 ! 45: FCMPNE32 fcmpne32 %d16, %d50, %r16 frzptr_1_38: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe06fe060 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0060] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdf20 ! 46: LDDFA_R ldda [%r31, %r0], %f0 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_39 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 39_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_39: wrhpr %g0, 0xd83, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c2e0 ! 47: CASA_I casa [%r31] 0x17, %r0, %r16 vahole2_1_40: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfda60 ! 48: STDFA_R stda %f16, [%r0, %r31] .word 0xe09fc720 ! 49: LDDA_R ldda [%r31, %r0] 0x39, %r16 nop nop mov 0x1, %r18 splash_cmpr_1_42: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_42)+8 , 16, 16)) -> intp(3,0,23,*,712,*,3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_42)&0xffffffff)+8 , 16, 16)) -> intp(2,0,21,*,688,*,3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 50: SIAM siam 1 mondo_1_43: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c8] %asi stxa %r20, [%r0+0x3c0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d950011 ! 51: WRPR_WSTATE_R wrpr %r20, %r17, %wstate .word 0xe09fe090 ! 52: LDDA_I ldda [%r31, + 0x0090] %asi, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_44) , 16, 16)) -> intp(6,0,11,*,952,*,3b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_44)&0xffffffff) , 16, 16)) -> intp(2,0,3,*,728,*,3b,1) #else set 0xd5f032eb, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_1_44: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803efc ! 53: SIR sir 0x1efc .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick cancelint_1_46: rdhpr %halt, %r8 .word 0x85880000 ! 55: ALLCLEAN brcommon3_1_47: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] ba,a .+8 jmpl %r27-4, %r27 .word 0xd11fe1e0 ! 56: LDDF_I ldd [%r31, 0x01e0], %f8 dvapa_1_48: nop nop ta T_CHANGE_HPRIV mov 0xafb, %r20 mov 0x10, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x51b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd0dfdf00 ! 57: LDXA_R ldxa [%r31, %r0] 0xf8, %r8 cancelint_1_49: rdhpr %halt, %r10 .word 0x85880000 ! 58: ALLCLEAN intveclr_1_50: nop nop ta T_CHANGE_HPRIV setx 0x5f5fc49e151ff442, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x3c9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 59: FBPLG fblg pmu_1_51: nop nop setx 0xffffffb8ffffffaf, %g1, %g7 .word 0xa3800007 ! 60: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_1_52: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e170 ! 1: STQF_I - %f10, [0x0170, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x00800002 ! 61: BN bn mondo_1_53: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3d8] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d918005 ! 62: WRPR_WSTATE_R wrpr %r6, %r5, %wstate intveclr_1_54: nop nop ta T_CHANGE_HPRIV setx 0x76f65b99c4abd518, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xc42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 63: FBPLG fblg,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_55), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_55)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,728,*,*,1) xir_1_55: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_55: and %g1, 2, %g1 brnz,a %g1, xirwait_1_55 ldx [%r17], %g1 xir_1_55: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82ef69 ! 64: WR_CLEAR_SOFTINT_I wr %r11, 0x0f69, %clear_softint ibp_1_56: nop nop .word 0xa7a509a4 ! 65: FDIVs fdivs %f20, %f4, %f19 ibp_1_57: nop nop wrhpr %g0, 0xc18, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7a109d1 ! 66: FDIVd fdivd %f4, %f48, %f50 iaw_1_58: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_58: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_58 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_58: brnz %r16, iaw_wait1_58 ld [%r23], %r16 ba iaw_startwait1_58 mov 0x1, %r16 continue_iaw_1_58: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_58: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_58 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_58: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_58 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_58: mov 0x38, %r18 iaw1_1_58: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdb40 ! 67: LDDA_R ldda [%r31, %r0] 0xda, %r16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_59), 16, 16)) -> intp(mask2tid(0x1),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_59)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,968,*,*,1) xir_1_59: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_59: and %g1, 2, %g1 brnz,a %g1, xirwait_1_59 ldx [%r17], %g1 xir_1_59: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846236 ! 68: WR_CLEAR_SOFTINT_I wr %r17, 0x0236, %clear_softint br_longdelay4_1_60: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902004 ! 69: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate .word 0xe69fc600 ! 70: LDDA_R ldda [%r31, %r0] 0x30, %r19 iaw_1_61: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_61: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_61 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_61: brnz %r16, iaw_wait1_61 ld [%r23], %r16 ba iaw_startwait1_61 mov 0x1, %r16 continue_iaw_1_61: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_61: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_61 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_61: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_61 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_61: mov 0x38, %r18 iaw3_1_61: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x840, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdc00 ! 71: LDDA_R ldda [%r31, %r0] 0xe0, %r16 splash_tba_1_62: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 72: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_1_63: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d904001 ! 73: WRPR_WSTATE_R wrpr %r1, %r1, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_64) , 16, 16)) -> intp(6,0,13,*,760,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_64)&0xffffffff) , 16, 16)) -> intp(6,0,14,*,976,*,5d,1) #else set 0xb0c0383d, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_64: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b484c4 ! 74: FCMPNE32 fcmpne32 %d18, %d4, %r19 mondo_1_65: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r9, [%r0+0x3d8] %asi stxa %r11, [%r0+0x3c0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d94c010 ! 75: WRPR_WSTATE_R wrpr %r19, %r16, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_66), 16, 16)) -> intp(mask2tid(0x1),1,3,*,976,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_66)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,944,*,*,1) xir_1_66: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_66: and %g1, 2, %g1 brnz,a %g1, xirwait_1_66 ldx [%r17], %g1 xir_1_66: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84b0d0 ! 76: WR_CLEAR_SOFTINT_I wr %r18, 0x10d0, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_67), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1000,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_67)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,904,*,*,1) xir_1_67: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_67: and %g1, 2, %g1 brnz,a %g1, xirwait_1_67 ldx [%r17], %g1 xir_1_67: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab813b87 ! 77: WR_CLEAR_SOFTINT_I wr %r4, 0x1b87, %clear_softint splash_hpstate_1_68: ta T_CHANGE_NONHPRIV .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, .word 0x8198355f ! 78: WRHPR_HPSTATE_I wrhpr %r0, 0x155f, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_69 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 69_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_69: wrhpr %g0, 0x998, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c080 ! 79: CASA_I casa [%r31] 0x 4, %r0, %r19 .word 0xe73fe090 ! 1: STDF_I std %f19, [0x0090, %r31] .word 0xe69fc720 ! 1: LDDA_R ldda [%r31, %r0] 0x39, %r19 mov 0x32, %r30 .word 0x83d0001e ! 80: Tcc_R te icc_or_xcc, %r0 + %r30 splash_lsu_1_70: nop nop ta T_CHANGE_HPRIV set 0x5c8844fc, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_1_71: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_71)+8 , 16, 16)) -> intp(1,0,18,*,704,*,51,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_71)&0xffffffff)+8 , 16, 16)) -> intp(6,0,7,*,752,*,51,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 82: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_72), 16, 16)) -> intp(mask2tid(0x1),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_72)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,760,*,*,1) xir_1_72: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_72: and %g1, 2, %g1 brnz,a %g1, xirwait_1_72 ldx [%r17], %g1 xir_1_72: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab826ab4 ! 83: WR_CLEAR_SOFTINT_I wr %r9, 0x0ab4, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_73 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_73 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_73: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_73) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,992,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_73)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,640,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_73: wrhpr %g0, 0x113, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 84: RDPC rd %pc, %r18 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_74: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_74)+8 , 16, 16)) -> intp(0,0,8,*,896,*,1d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_74)&0xffffffff)+8 , 16, 16)) -> intp(1,0,16,*,1000,*,1d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819837ce ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x17ce, %hpstate .word 0x81b01021 ! 85: SIAM siam 1 cwp_1_75: set user_data_start, %o7 .word 0x93902004 ! 86: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cwp_1_76: set user_data_start, %o7 .word 0x93902003 ! 87: WRPR_CWP_I wrpr %r0, 0x0003, %cwp brcommon1_1_77: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xa5a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f18 ba,a .+8 jmpl %r27-4, %r27 .word 0x95a189b2 ! 88: FDIVs fdivs %f6, %f18, %f10 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_78), 16, 16)) -> intp(mask2tid(0x1),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_78)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,752,*,*,1) xir_1_78: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_78: and %g1, 2, %g1 brnz,a %g1, xirwait_1_78 ldx [%r17], %g1 xir_1_78: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817da8 ! 89: WR_CLEAR_SOFTINT_I wr %r5, 0x1da8, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_1_79: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_79-donret_1_79), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00e5e400 | (0x89 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x78d, %htstate best_set_reg(0xfa1, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) done donretarg_1_79: .word 0x81982f05 ! 90: WRHPR_HPSTATE_I wrhpr %r0, 0x0f05, %hpstate .word 0xe19fe1a0 ! 91: LDDFA_I ldda [%r31, 0x01a0], %f16 ibp_1_80: nop nop .word 0xd497c400 ! 92: LDUHA_R lduha [%r31, %r0] 0x20, %r10 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_81 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 81_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_81: wrhpr %g0, 0x292, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c180 ! 93: CASA_I casa [%r31] 0x c, %r0, %r10 trapasi_1_82: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd4d84900 ! 94: LDXA_R ldxa [%r1, %r0] 0x48, %r10 intveclr_1_83: nop nop ta T_CHANGE_HPRIV setx 0xba72d8a4f8eecd2b, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 95: FBPLG fblg intveclr_1_84: nop nop ta T_CHANGE_HPRIV setx 0x73e13bb5f75703f5, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xf48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 96: FBPLG fblg,a,pn %fcc0, frzptr_1_85: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 97: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_86 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_86 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_86: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_86) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,760,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_86)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,912,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_86: wrhpr %g0, 0xc59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 98: RDPC rd %pc, %r8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_87 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 87_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_87: wrhpr %g0, 0xf92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c3c0 ! 99: CASA_I casa [%r31] 0x1e, %r0, %r8 nop nop ta T_CHANGE_HPRIV ! macro donret_1_88: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_88-donret_1_88), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00134b00 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x125f, %htstate best_set_reg(0x3f8, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) ldx [%r12+%r0], %g1 retry donretarg_1_88: .word 0xd0ffdd40 ! 100: SWAPA_R swapa %r8, [%r31 + %r0] 0xea splash_tba_1_89: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 101: WRPR_TBA_R wrpr %r0, %r12, %tba bge,a skip_1_90 fbl skip_1_90 .align 4096 skip_1_90: .word 0x9f802f3e ! 102: SIR sir 0x0f3e iaw_1_91: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_91: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_91 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_91: brnz %r16, iaw_wait1_91 ld [%r23], %r16 ba iaw_startwait1_91 mov 0x1, %r16 continue_iaw_1_91: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_91: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_91 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_91: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_91 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_91: mov 0x38, %r18 iaw1_1_91: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3b347c5 ! 103: PDIST pdistn %d44, %d36, %d48 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_92), 16, 16)) -> intp(mask2tid(0x1),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_92)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) xir_1_92: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_92: and %g1, 2, %g1 brnz,a %g1, xirwait_1_92 ldx [%r17], %g1 xir_1_92: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8460ea ! 104: WR_CLEAR_SOFTINT_I wr %r17, 0x00ea, %clear_softint ibp_1_93: nop nop .word 0xc1bfdc40 ! 105: STDFA_R stda %f0, [%r0, %r31] nop nop mov 0x0, %r18 splash_cmpr_1_94: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 106: SIAM siam 1 frzptr_1_95: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 107: BN bn,a .word 0x9f8027b9 ! 108: SIR sir 0x07b9 nop nop ta T_CHANGE_HPRIV ! macro donret_1_96: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_96-donret_1_96), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x006a2c00 | (0x55 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x168d, %htstate wrhpr %g0, 0xd52, %hpstate ! rand=1 (1) ldx [%r12+%r0], %g1 retry donretarg_1_96: .word 0xe2ffdd40 ! 109: SWAPA_R swapa %r17, [%r31 + %r0] 0xea .word 0x1c780001 ! 110: BPPOS .word 0xe33fe0a0 ! 111: STDF_I std %f17, [0x00a0, %r31] splash_tba_1_98: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 112: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x65f0d407, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_99: .word 0xa7a049ca ! 113: FDIVd fdivd %f32, %f10, %f50 memptr_1_100: set 0x60540000, %r31 .word 0x858370ec ! 114: WRCCR_I wr %r13, 0x10ec, %ccr nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_101 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_101 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_101: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_101) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,1008,*,*,1)') ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_101)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_101: wrhpr %g0, 0xa90, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 115: RDPC rd %pc, %r13 splash_tba_1_102: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 116: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_103: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_103)+8 , 16, 16)) -> intp(5,0,20,*,760,*,f3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_103)&0xffffffff)+8 , 16, 16)) -> intp(7,0,23,*,664,*,f3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f86 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f86, %hpstate .word 0x81b01021 ! 117: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_104 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 104_1 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_104: wrhpr %g0, 0xa02, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d920 ! 118: CASA_I casa [%r31] 0xc9, %r0, %r13 ibp_1_105: nop nop .word 0x9b702b0d ! 119: POPC_I popc 0x0b0d, %r13 ibp_1_106: nop nop .word 0xda97dc40 ! 120: LDUHA_R lduha [%r31, %r0] 0xe2, %r13 mondo_1_107: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e8] %asi stxa %r2, [%r0+0x3e8] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d94c011 ! 121: WRPR_WSTATE_R wrpr %r19, %r17, %wstate .word 0xc19fdf00 ! 122: LDDFA_R ldda [%r31, %r0], %f0 .word 0xda9fe080 ! 123: LDDA_I ldda [%r31, + 0x0080] %asi, %r13 brcommon3_1_108: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdb37c000 ! 1: STQF_R - %f13, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r8, [%r0] ASI_LSU_CONTROL .word 0xa1aac827 ! 124: FMOVGE fmovs %fcc1, %f7, %f16 .word 0xe037e022 ! 125: STH_I sth %r16, [%r31 + 0x0022] frzptr_1_109: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xa1702150 ! 1: POPC_I popc 0x0150, %r16 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 126: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_110 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 110_1 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_110: wrhpr %g0, 0x9c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c600 ! 127: CASA_I casa [%r31] 0x30, %r0, %r16 nop nop set 0x28801762, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_111: .word 0xa5a449c8 ! 128: FDIVd fdivd %f48, %f8, %f18 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_112) , 16, 16)) -> intp(5,0,19,*,728,*,13,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_112)&0xffffffff) , 16, 16)) -> intp(2,0,29,*,968,*,13,1) #else set 0xa930488d, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa1a089d2 ! 1: FDIVd fdivd %f2, %f18, %f16 intvec_1_112: .word 0x39400001 ! 129: FBPUGE fbuge,a,pn %fcc0, iaw_1_113: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_113: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_113 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_113: brnz %r16, iaw_wait1_113 ld [%r23], %r16 ba iaw_startwait1_113 mov 0x1, %r16 continue_iaw_1_113: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_113: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_113 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_113: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_113 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_113: mov 0x38, %r18 iaw1_1_113: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x713, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fdf00 ! 130: LDDFA_R ldda [%r31, %r0], %f16 .word 0xd43fe170 ! 131: STD_I std %r10, [%r31 + 0x0170] .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick jmptr_1_116: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 133: JMPL_R jmpl %r27 + %r0, %r27 .word 0xd49fe0c0 ! 134: LDDA_I ldda [%r31, + 0x00c0] %asi, %r10 intveclr_1_117: nop nop ta T_CHANGE_HPRIV setx 0x7e33420d6b83d60b, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x8d3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, .word 0x32800001 ! 1: BNE bne,a .word 0x8d903c70 ! 136: WRPR_PSTATE_I wrpr %r0, 0x1c70, %pstate iaw_1_119: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_119: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_119 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_119: brnz %r16, iaw_wait1_119 ld [%r23], %r16 ba iaw_startwait1_119 mov 0x1, %r16 continue_iaw_1_119: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_119: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_119 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_119: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_119 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_119: mov 0x38, %r18 iaw4_1_119: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x90a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c3c0 ! 137: CASA_I casa [%r31] 0x1e, %r0, %r10 ibp_1_120: nop nop wrhpr %g0, 0x619, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd53fe1c0 ! 138: STDF_I std %f10, [0x01c0, %r31] .word 0x8d9038a5 ! 139: WRPR_PSTATE_I wrpr %r0, 0x18a5, %pstate frzptr_1_122: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd43fe000 ! 1: STD_I std %r10, [%r31 + 0x0000] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800002 ! 140: BN bn,a nop nop set 0xced0e75b, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_123: .word 0x19400002 ! 141: FBPUGE fbuge .word 0x89800011 ! 142: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_125: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983d93 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1d93, %hpstate .word 0x81b01021 ! 143: SIAM siam 1 splash_hpstate_1_126: ta T_CHANGE_NONHPRIV .word 0x24800001 ! 1: BLE ble,a .word 0x81983499 ! 144: WRHPR_HPSTATE_I wrhpr %r0, 0x1499, %hpstate demap_1_127: nop mov 0x80, %g3 ta T_CHANGE_HPRIV .word 0x24800001 ! 1: BLE ble,a stxa %g3, [%g3] 0x57 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0x959, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe098 ! 145: LDD_I ldd [%r31 + 0x0098], %r19 .word 0xe63fe058 ! 146: STD_I std %r19, [%r31 + 0x0058] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_128: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_128)+8 , 16, 16)) -> intp(1,0,21,*,696,*,ed,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_128)&0xffffffff)+8 , 16, 16)) -> intp(6,0,11,*,704,*,ed,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982545 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0545, %hpstate .word 0x81b01021 ! 147: SIAM siam 1 cancelint_1_129: rdhpr %halt, %r20 .word 0x85880000 ! 148: ALLCLEAN splash_tba_1_130: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV ! macro donret_1_131: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_131-donret_1_131), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00df9500 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x110f, %htstate best_set_reg(0x11c3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) done donretarg_1_131: .word 0xe8ffdd40 ! 150: SWAPA_R swapa %r20, [%r31 + %r0] 0xea #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_132) , 16, 16)) -> intp(3,0,24,*,720,*,e5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_132)&0xffffffff) , 16, 16)) -> intp(5,0,29,*,664,*,e5,1) #else set 0xb2a00a47, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x95b444d0 ! 1: FCMPNE32 fcmpne32 %d48, %d16, %r10 intvec_1_132: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f80244a ! 151: SIR sir 0x044a memptr_1_133: set 0x60740000, %r31 .word 0x85852ef2 ! 152: WRCCR_I wr %r20, 0x0ef2, %ccr .word 0xe657c000 ! 153: LDSH_R ldsh [%r31 + %r0], %r19 .word 0x9f8020f0 ! 154: SIR sir 0x00f0 .word 0xe677c000 ! 155: STX_R stx %r19, [%r31 + %r0] .word 0xe61fe1c0 ! 156: LDD_I ldd [%r31 + 0x01c0], %r19 iaw_1_135: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_135: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_135 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_135: brnz %r16, iaw_wait1_135 ld [%r23], %r16 ba iaw_startwait1_135 mov 0x1, %r16 continue_iaw_1_135: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_135: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_135 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_135: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_135 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_135: mov 0x38, %r18 iaw4_1_135: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xcda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdb20 ! 157: STDA_R stda %r0, [%r31 + %r0] 0xd9 splash_lsu_1_136: nop nop ta T_CHANGE_HPRIV set 0x68a2ec03, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x00800001 ! 1: BN bn stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 158: FBPULE fbule .word 0xe697d000 ! 159: LDUHA_R lduha [%r31, %r0] 0x80, %r19 bvc,a skip_1_137 .word 0x91a109c7 ! 1: FDIVd fdivd %f4, %f38, %f8 .align 2048 skip_1_137: .word 0x87ac0a52 ! 160: FCMPd fcmpd %fcc, %f16, %f18 dvapa_1_138: nop nop ta T_CHANGE_HPRIV mov 0x95b, %r20 mov 0x1e, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x391, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd31fe020 ! 161: LDDF_I ldd [%r31, 0x0020], %f9 iaw_1_139: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_139: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_139 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_139: brnz %r16, iaw_wait1_139 ld [%r23], %r16 ba iaw_startwait1_139 mov 0x1, %r16 continue_iaw_1_139: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_139: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_139 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_139: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_139 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_139: mov 0x38, %r18 iaw1_1_139: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe10, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd2bfc180 ! 162: STDA_R stda %r9, [%r31 + %r0] 0x0c intveclr_1_140: nop nop ta T_CHANGE_HPRIV setx 0x9e5df1b2cbc53e2d, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xa88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 163: FBPLG fblg .word 0xe1bfde00 ! 164: STDFA_R stda %f16, [%r0, %r31] brcommon3_1_141: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r9 ba,a .+8 jmpl %r27+0, %r27 stxa %r11, [%r0] ASI_LSU_CONTROL .word 0xa5aac823 ! 165: FMOVGE fmovs %fcc1, %f3, %f18 brcommon3_1_142: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r18 ba,a .+8 jmpl %r27-0, %r27 .word 0xa5b7c7c0 ! 166: PDIST pdistn %d62, %d0, %d18 .word 0x91910014 ! 167: WRPR_PIL_R wrpr %r4, %r20, %pil frzptr_1_144: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc19fdf00 ! 168: LDDFA_R ldda [%r31, %r0], %f0 splash_hpstate_1_145: ta T_CHANGE_NONHPRIV .word 0x8198205f ! 169: WRHPR_HPSTATE_I wrhpr %r0, 0x005f, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_146 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 146_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_146: wrhpr %g0, 0xa43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7df00 ! 170: CASA_I casa [%r31] 0xf8, %r0, %r18 splash_lsu_1_147: nop nop ta T_CHANGE_HPRIV set 0x41cd35e5, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 171: FBPULE fbule bgu,a skip_1_148 brnz,a,pt %r1, skip_1_148 .align 2048 skip_1_148: .word 0x87ad0a47 ! 172: FCMPd fcmpd %fcc, %f20, %f38 .word 0xd537c000 ! 173: STQF_R - %f10, [%r0, %r31] memptr_1_149: set 0x60140000, %r31 .word 0x85817671 ! 174: WRCCR_I wr %r5, 0x1671, %ccr #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_150), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_150)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,920,*,*,1) xir_1_150: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_150: and %g1, 2, %g1 brnz,a %g1, xirwait_1_150 ldx [%r17], %g1 xir_1_150: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82e264 ! 175: WR_CLEAR_SOFTINT_I wr %r11, 0x0264, %clear_softint nop nop mov 0x1, %r18 splash_cmpr_1_151: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_151)+8 , 16, 16)) -> intp(7,0,4,*,640,*,6f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_151)&0xffffffff)+8 , 16, 16)) -> intp(4,0,14,*,936,*,6f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 176: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_152) , 16, 16)) -> intp(5,0,14,*,984,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_152)&0xffffffff) , 16, 16)) -> intp(4,0,8,*,936,*,33,1) #else set 0x9800990f, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_152: .word 0x19400001 ! 177: FBPUGE fbuge mondo_1_153: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3e8] %asi stxa %r13, [%r0+0x3c8] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d92c008 ! 178: WRPR_WSTATE_R wrpr %r11, %r8, %wstate .word 0xd427e150 ! 179: STW_I stw %r10, [%r31 + 0x0150] nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_154 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_154 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_154: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_154) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,920,*,*,1)') ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_154)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,704,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_154: wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 180: RDPC rd %pc, %r9 .word 0xd327c000 ! 181: STF_R st %f9, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_155 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 155_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_155: wrhpr %g0, 0x1d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c3c0 ! 182: CASA_I casa [%r31] 0x1e, %r0, %r9 .word 0x95b20ff4 ! 183: FONES e %f10 splash_tba_1_156: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 184: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_1_157: rdhpr %halt, %r20 .word 0x85880000 ! 185: ALLCLEAN .word 0x87a84ac5 ! 186: FCMPEd fcmped %fcc, %f32, %f36 frzptr_1_158: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fdf00 ! 187: LDDFA_R ldda [%r31, %r0], %f16 nop nop set 0xddd07aa8, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93b2c4d1 ! 1: FCMPNE32 fcmpne32 %d42, %d48, %r9 intvec_1_159: .word 0x95b084d0 ! 188: FCMPNE32 fcmpne32 %d2, %d16, %r10 .word 0xd437e1a1 ! 189: STH_I sth %r10, [%r31 + 0x01a1] change_to_randtl_1_160: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_1_160: .word 0x8f902000 ! 190: WRPR_TL_I wrpr %r0, 0x0000, %tl .word 0x89800011 ! 191: WRTICK_R wr %r0, %r17, %tick #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_162), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_162)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,688,*,*,1) xir_1_162: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_162: and %g1, 2, %g1 brnz,a %g1, xirwait_1_162 ldx [%r17], %g1 xir_1_162: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84b8a0 ! 192: WR_CLEAR_SOFTINT_I wr %r18, 0x18a0, %clear_softint .word 0x91908009 ! 193: WRPR_PIL_R wrpr %r2, %r9, %pil memptr_1_164: set 0x60740000, %r31 .word 0x85822e15 ! 194: WRCCR_I wr %r8, 0x0e15, %ccr iaw_1_165: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_165: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_165 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_165: brnz %r16, iaw_wait1_165 ld [%r23], %r16 ba iaw_startwait1_165 mov 0x1, %r16 continue_iaw_1_165: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_165: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_165 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_165: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_165 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_165: mov 0x38, %r18 iaw3_1_165: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd49fc080 ! 195: LDDA_R ldda [%r31, %r0] 0x04, %r10 frzptr_1_166: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdc00 ! 196: LDDFA_R ldda [%r31, %r0], %f0 brcommon1_1_167: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0x95a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f10 ba,a .+8 jmpl %r27-4, %r27 .word 0x91b2c7c2 ! 197: PDIST pdistn %d42, %d2, %d8 dvapa_1_168: nop nop ta T_CHANGE_HPRIV mov 0x97c, %r20 mov 0x9, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x691, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fc000 ! 198: STXFSR_R st-sfr %f1, [%r0, %r31] iaw_1_169: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_169: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_169 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_169: brnz %r16, iaw_wait1_169 ld [%r23], %r16 ba iaw_startwait1_169 mov 0x1, %r16 continue_iaw_1_169: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_169: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_169 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_169: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_169 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_169: mov 0x38, %r18 iaw1_1_169: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x68a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fda60 ! 199: LDDFA_R ldda [%r31, %r0], %f16 .word 0x9150c000 ! 200: RDPR_TT .word 0xf16fe000 ! 201: PREFETCH_I prefetch [%r31 + 0x0000], #24 fpinit_1_170: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89a009a4 ! 202: FDIVs fdivs %f0, %f4, %f4 iaw_1_171: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_171: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_171 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_171: brnz %r16, iaw_wait1_171 ld [%r23], %r16 ba iaw_startwait1_171 mov 0x1, %r16 continue_iaw_1_171: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_171: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_171 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_171: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_171 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_171: mov 0x38, %r18 iaw1_1_171: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x85b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdc40 ! 203: LDDFA_R ldda [%r31, %r0], %f0 cwp_1_172: set user_data_start, %o7 .word 0x93902004 ! 204: WRPR_CWP_I wrpr %r0, 0x0004, %cwp nop nop set 0x3040a71a, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80392c ! 1: SIR sir 0x192c intvec_1_173: .word 0x9bb404cd ! 205: FCMPNE32 fcmpne32 %d16, %d44, %r13 splash_lsu_1_174: nop nop ta T_CHANGE_HPRIV set 0xce6c3e96, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 206: FBPULE fbule ibp_1_175: nop nop .word 0xe1bfda60 ! 207: STDFA_R stda %f16, [%r0, %r31] dvapa_1_176: nop nop ta T_CHANGE_HPRIV mov 0xb34, %r20 mov 0xb, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xcd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdd40 ! 208: STDA_R stda %r0, [%r31 + %r0] 0xea splash_lsu_1_177: nop nop ta T_CHANGE_HPRIV set 0x04b072d5, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 209: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_178 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x161fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 178_1 is 161fff !! MA interrupt goes to TID 5 ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_178: wrhpr %g0, 0x190, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c180 ! 210: CASA_I casa [%r31] 0x c, %r0, %r13 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_179), 16, 16)) -> intp(mask2tid(0x1),1,3,*,688,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_179)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) xir_1_179: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_179: and %g1, 2, %g1 brnz,a %g1, xirwait_1_179 ldx [%r17], %g1 xir_1_179: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817100 ! 211: WR_CLEAR_SOFTINT_I wr %r5, 0x1100, %clear_softint .word 0xa1a00554 ! 212: FSQRTd fsqrt cancelint_1_180: rdhpr %halt, %r10 .word 0x85880000 ! 213: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_181), 16, 16)) -> intp(mask2tid(0x1),1,3,*,728,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_181)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) xir_1_181: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_181: and %g1, 2, %g1 brnz,a %g1, xirwait_1_181 ldx [%r17], %g1 xir_1_181: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f119 ! 214: WR_CLEAR_SOFTINT_I wr %r7, 0x1119, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_182 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 182_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_182: wrhpr %g0, 0x11b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd5e7c6c0 ! 215: CASA_I casa [%r31] 0x36, %r0, %r10 dvapa_1_183: nop nop ta T_CHANGE_HPRIV mov 0xeca, %r20 mov 0x4, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xb59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdc00 ! 216: STDFA_R stda %f0, [%r0, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_184), 16, 16)) -> intp(mask2tid(0x1),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_184)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) xir_1_184: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_184: and %g1, 2, %g1 brnz,a %g1, xirwait_1_184 ldx [%r17], %g1 xir_1_184: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80af80 ! 217: WR_CLEAR_SOFTINT_I wr %r2, 0x0f80, %clear_softint vahole3_1_185: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xd43fe1a0 ! 218: STD_I std %r10, [%r31 + 0x01a0] nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_186: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_186)+8 , 16, 16)) -> intp(5,0,1,*,712,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_186)&0xffffffff)+8 , 16, 16)) -> intp(4,0,18,*,704,*,33,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819834ce ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x14ce, %hpstate .word 0x81b01021 ! 219: SIAM siam 1 dvapa_1_187: nop nop ta T_CHANGE_HPRIV mov 0xc1d, %r20 mov 0x16, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x30b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd497dc40 ! 220: LDUHA_R lduha [%r31, %r0] 0xe2, %r10 pmu_1_188: nop nop ta T_CHANGE_PRIV setx 0xffffffb4ffffffa8, %g1, %g7 .word 0xa3800007 ! 221: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_1_189: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x95702050 ! 1: POPC_I popc 0x0050, %r10 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfda60 ! 222: STDFA_R stda %f0, [%r0, %r31] cancelint_1_190: rdhpr %halt, %r11 .word 0x85880000 ! 223: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_191 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_191 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_191: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_191) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,1000,*,*,1)') ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_191)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_191: wrhpr %g0, 0x2db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 224: RDPC rd %pc, %r8 brcommon1_1_192: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x99b48492 ! 225: FCMPLE32 fcmple32 %d18, %d18, %r12 nop nop mov 0x1, %r18 splash_cmpr_1_193: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_193)+8 , 16, 16)) -> intp(6,0,17,*,1016,*,9d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_193)&0xffffffff)+8 , 16, 16)) -> intp(0,0,19,*,992,*,9d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 226: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_194: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983285 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1285, %hpstate .word 0x81b01021 ! 227: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_195 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_195 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_195: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_195) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,704,*,*,1)') ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_195)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,920,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_195: wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 228: RDPC rd %pc, %r18 .word 0x87902101 ! 229: WRPR_TT_I wrpr %r0, 0x0101, %tt nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_196 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 196_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_196: wrhpr %g0, 0xf92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7d060 ! 230: CASA_I casa [%r31] 0x83, %r0, %r18 iaw_1_197: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_197: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_197 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_197: brnz %r16, iaw_wait1_197 ld [%r23], %r16 ba iaw_startwait1_197 mov 0x1, %r16 continue_iaw_1_197: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_197: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_197 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_197: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_197 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_197: mov 0x38, %r18 iaw3_1_197: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xa81, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe4dfc720 ! 231: LDXA_R ldxa [%r31, %r0] 0x39, %r18 .word 0xc32fe020 ! 232: STXFSR_I st-sfr %f1, [0x0020, %r31] frzptr_1_199: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xc1bfda00 ! 233: STDFA_R stda %f0, [%r0, %r31] .word 0x9f803697 ! 234: SIR sir 0x1697 mondo_1_200: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r10, [%r0+0x3c0] %asi stxa %r10, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d90c003 ! 235: WRPR_WSTATE_R wrpr %r3, %r3, %wstate splash_tba_1_201: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 236: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_202: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819834ce ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x14ce, %hpstate .word 0x81b01021 ! 237: SIAM siam 1 mondo_1_203: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3e8] %asi stxa %r4, [%r0+0x3e0] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d910011 ! 238: WRPR_WSTATE_R wrpr %r4, %r17, %wstate cancelint_1_204: rdhpr %halt, %r8 .word 0x85880000 ! 239: ALLCLEAN splash_lsu_1_205: nop nop ta T_CHANGE_HPRIV set 0x10bf1247, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 240: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_1_206: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_206-donret_1_206+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000de400 | (0x8b << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x71f, %htstate wrhpr %g0, 0xd2, %hpstate ! rand=1 (1) ldx [%r12+%r0], %g1 retry donretarg_1_206: .word 0x26cac001 ! 241: BRLZ brlz,a,pt %r11, .word 0x81510000 ! 242: RDPR_TICK rdpr %tick, %r0 .word 0x91920014 ! 243: WRPR_PIL_R wrpr %r8, %r20, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_208), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1008,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_208)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,912,*,*,1) xir_1_208: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_208: and %g1, 2, %g1 brnz,a %g1, xirwait_1_208 ldx [%r17], %g1 xir_1_208: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822e0f ! 244: WR_CLEAR_SOFTINT_I wr %r8, 0x0e0f, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_209: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_209)+8 , 16, 16)) -> intp(3,0,23,*,960,*,31,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_209)&0xffffffff)+8 , 16, 16)) -> intp(4,0,2,*,944,*,31,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198378e ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x178e, %hpstate .word 0x81b01021 ! 245: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_210 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 210_1 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_210: wrhpr %g0, 0x5d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c200 ! 246: CASA_I casa [%r31] 0x10, %r0, %r8 .word 0xd01fc000 ! 247: LDD_R ldd [%r31 + %r0], %r8 nop nop mov 0x0, %r18 splash_cmpr_1_211: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 248: SIAM siam 1 cancelint_1_212: rdhpr %halt, %r18 .word 0x85880000 ! 249: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_213: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_213)+8 , 16, 16)) -> intp(1,0,11,*,648,*,e5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_213)&0xffffffff)+8 , 16, 16)) -> intp(5,0,22,*,1016,*,e5,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81982a5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0a5f, %hpstate .word 0x81b01021 ! 250: SIAM siam 1 .word 0x8d90356c ! 251: WRPR_PSTATE_I wrpr %r0, 0x156c, %pstate memptr_1_215: set 0x60140000, %r31 .word 0x8584fab8 ! 252: WRCCR_I wr %r19, 0x1ab8, %ccr nop nop mov 0x0, %r18 splash_cmpr_1_216: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 253: SIAM siam 1 brcommon3_1_217: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe5e7c180 ! 1: CASA_I casa [%r31] 0x c, %r0, %r18 ba,a .+8 jmpl %r27+0, %r27 stxa %r11, [%r0] ASI_LSU_CONTROL .word 0xa3aac826 ! 254: FMOVGE fmovs %fcc1, %f6, %f17 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_218) , 16, 16)) -> intp(6,0,11,*,696,*,af,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_218)&0xffffffff) , 16, 16)) -> intp(7,0,9,*,944,*,af,1) #else set 0xd300d4e1, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803803 ! 1: SIR sir 0x1803 intvec_1_218: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x99b504d4 ! 255: FCMPNE32 fcmpne32 %d20, %d20, %r12 .word 0x91944013 ! 256: WRPR_PIL_R wrpr %r17, %r19, %pil ibp_1_220: nop nop .word 0x97702444 ! 257: POPC_I popc 0x0444, %r11 .word 0xd697c200 ! 258: LDUHA_R lduha [%r31, %r0] 0x10, %r11 cancelint_1_222: rdhpr %halt, %r20 .word 0x85880000 ! 259: ALLCLEAN iaw_1_223: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_223: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_223 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_223: brnz %r16, iaw_wait1_223 ld [%r23], %r16 ba iaw_startwait1_223 mov 0x1, %r16 continue_iaw_1_223: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_223: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_223 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_223: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_223 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_223: mov 0x38, %r18 iaw4_1_223: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x18a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfde00 ! 260: STDA_R stda %r16, [%r31 + %r0] 0xf0 .word 0xe91fe0b0 ! 261: LDDF_I ldd [%r31, 0x00b0], %f20 cancelint_1_225: rdhpr %halt, %r13 .word 0x85880000 ! 262: ALLCLEAN brcommon3_1_226: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7e000 ! 1: CASA_R casa [%r31] %asi, %r0, %r13 ba,a .+8 jmpl %r27+0, %r27 stxa %r20, [%r0] ASI_LSU_CONTROL .word 0xa3aac834 ! 263: FMOVGE fmovs %fcc1, %f20, %f17 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_227: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_227)+8 , 16, 16)) -> intp(5,0,12,*,680,*,d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_227)&0xffffffff)+8 , 16, 16)) -> intp(2,0,29,*,992,*,d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983dd5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1dd5, %hpstate .word 0x81b01021 ! 264: SIAM siam 1 brcommon3_1_228: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe26fe040 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0040] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0x97aac82d ! 265: FMOVGE fmovs %fcc1, %f13, %f11 vahole3_1_229: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd6bfc380 ! 266: STDA_R stda %r11, [%r31 + %r0] 0x1c splash_hpstate_1_230: .word 0x2accc001 ! 1: BRNZ brnz,a,pt %r19, .word 0x81983c95 ! 267: WRHPR_HPSTATE_I wrhpr %r0, 0x1c95, %hpstate memptr_1_231: set user_data_start, %r31 .word 0x8581ef7c ! 268: WRCCR_I wr %r7, 0x0f7c, %ccr #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_232) , 16, 16)) -> intp(6,0,30,*,680,*,cd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_232)&0xffffffff) , 16, 16)) -> intp(4,0,3,*,944,*,cd,1) #else set 0xfe309df7, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7a149c6 ! 1: FDIVd fdivd %f36, %f6, %f50 intvec_1_232: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 269: FBPUGE fbuge,a,pn %fcc0, pmu_1_233: nop nop ta T_CHANGE_PRIV setx 0xffffffb4ffffffa2, %g1, %g7 .word 0xa3800007 ! 270: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xc32fc000 ! 271: STXFSR_R st-sfr %f1, [%r0, %r31] splash_lsu_1_234: nop nop ta T_CHANGE_HPRIV set 0x590f2410, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_235), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_235)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) xir_1_235: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_235: and %g1, 2, %g1 brnz,a %g1, xirwait_1_235 ldx [%r17], %g1 xir_1_235: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84aa08 ! 273: WR_CLEAR_SOFTINT_I wr %r18, 0x0a08, %clear_softint .word 0xe2dfc240 ! 274: LDXA_R ldxa [%r31, %r0] 0x12, %r17 .word 0x89800011 ! 275: WRTICK_R wr %r0, %r17, %tick iaw_1_238: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_238: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_238 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_238: brnz %r16, iaw_wait1_238 ld [%r23], %r16 ba iaw_startwait1_238 mov 0x1, %r16 continue_iaw_1_238: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_238: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_238 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_238: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_238 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_238: mov 0x38, %r18 iaw4_1_238: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x703, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdc40 ! 276: LDDA_R ldda [%r31, %r0] 0xe2, %r16 .word 0x89800011 ! 277: WRTICK_R wr %r0, %r17, %tick splash_lsu_1_240: nop nop ta T_CHANGE_HPRIV set 0xf9378d4d, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x38800001 ! 1: BGU bgu,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 278: FBPULE fbule nop nop set 0x92206889, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f803b1e ! 1: SIR sir 0x1b1e intvec_1_241: .word 0xa7a409c8 ! 279: FDIVd fdivd %f16, %f8, %f50 mondo_1_242: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3d0] %asi stxa %r4, [%r0+0x3c0] %asi .word 0x87802088 ! 1: WRASI_I wr %r0, 0x0088, %asi .word 0x9d920007 ! 280: WRPR_WSTATE_R wrpr %r8, %r7, %wstate dvapa_1_243: nop nop ta T_CHANGE_HPRIV mov 0xad8, %r20 mov 0x1a, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x2c8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a049a3 ! 281: FDIVs fdivs %f1, %f3, %f20 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_244 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 244_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_244: wrhpr %g0, 0x708, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe9e7dd40 ! 282: CASA_I casa [%r31] 0xea, %r0, %r20 .word 0xe89fc2e0 ! 283: LDDA_R ldda [%r31, %r0] 0x17, %r20 vahole3_1_246: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe9e7e000 ! 284: CASA_R casa [%r31] %asi, %r0, %r20 br_longdelay4_1_247: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x9d902001 ! 285: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_248 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_248 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_248: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_248) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,744,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_248)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,664,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_248: wrhpr %g0, 0x342, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 286: RDPC rd %pc, %r11 memptr_1_249: set user_data_start, %r31 .word 0x85846bf9 ! 287: WRCCR_I wr %r17, 0x0bf9, %ccr .word 0x91908010 ! 288: WRPR_PIL_R wrpr %r2, %r16, %pil mondo_1_251: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3e0] %asi stxa %r11, [%r0+0x3e0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d948013 ! 289: WRPR_WSTATE_R wrpr %r18, %r19, %wstate cancelint_1_252: rdhpr %halt, %r8 .word 0x85880000 ! 290: ALLCLEAN jmptr_1_253: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 291: JMPL_R jmpl %r27 + %r0, %r27 cancelint_1_254: rdhpr %halt, %r13 .word 0x85880000 ! 292: ALLCLEAN frzptr_1_255: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x9ba7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f44 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe19fdd40 ! 293: LDDFA_R ldda [%r31, %r0], %f16 iaw_1_256: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_256: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_256 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_256: brnz %r16, iaw_wait1_256 ld [%r23], %r16 ba iaw_startwait1_256 mov 0x1, %r16 continue_iaw_1_256: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_256: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_256 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_256: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_256 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_256: mov 0x38, %r18 iaw0_1_256: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x682, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99b487d3 ! 294: PDIST pdistn %d18, %d50, %d12 frzptr_1_257: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 295: BN bn,a br_badelay1_1_258: .word 0x38800001 ! 1: BGU bgu,a .word 0xd937e140 ! 1: STQF_I - %f12, [0x0140, %r31] .word 0x99a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f12 normalw .word 0x95458000 ! 296: RD_SOFTINT_REG rd %softint, %r10 ibp_1_259: nop nop .word 0xa5a4c9d3 ! 297: FDIVd fdivd %f50, %f50, %f18 .word 0x9192c002 ! 298: WRPR_PIL_R wrpr %r11, %r2, %pil brcommon2_1_261: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe020 ! 1: PREFETCH_I prefetch [%r31 + 0x0020], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0xc19fde00 ! 299: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_1_262: nop nop ta T_CHANGE_HPRIV set 0x05f31700, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 300: FBPULE fbule,a,pn %fcc0, pmu_1_263: nop nop setx 0xffffffbaffffffa7, %g1, %g7 .word 0xa3800007 ! 301: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop mov 0x1, %r18 splash_cmpr_1_264: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_264)+8 , 16, 16)) -> intp(2,0,12,*,936,*,b3,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_264)&0xffffffff)+8 , 16, 16)) -> intp(7,0,17,*,912,*,b3,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 302: SIAM siam 1 jmptr_1_265: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 303: JMPL_R jmpl %r27 + %r0, %r27 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_266), 16, 16)) -> intp(mask2tid(0x1),1,3,*,704,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_266)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,640,*,*,1) xir_1_266: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_266: and %g1, 2, %g1 brnz,a %g1, xirwait_1_266 ldx [%r17], %g1 xir_1_266: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab826a9a ! 304: WR_CLEAR_SOFTINT_I wr %r9, 0x0a9a, %clear_softint nop nop set 0xaf6078fe, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x19400002 ! 1: FBPUGE fbuge intvec_1_267: .word 0x19400001 ! 305: FBPUGE fbuge mondo_1_268: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3e8] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d91c012 ! 306: WRPR_WSTATE_R wrpr %r7, %r18, %wstate nop nop set 0x8680551c, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_269: .word 0x9f803ccd ! 307: SIR sir 0x1ccd ibp_1_270: nop nop .word 0xc19fda00 ! 308: LDDFA_R ldda [%r31, %r0], %f0 frzptr_1_271: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x99702170 ! 1: POPC_I popc 0x0170, %r12 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdc40 ! 309: STDFA_R stda %f16, [%r0, %r31] .word 0xd927e0ec ! 310: STF_I st %f12, [0x00ec, %r31] change_to_randtl_1_272: ta T_CHANGE_HPRIV ! macro done_change_to_randtl_1_272: .word 0x8f902000 ! 311: WRPR_TL_I wrpr %r0, 0x0000, %tl splash_tba_1_273: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 312: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fe0e0 ! 313: LDDFA_I ldda [%r31, 0x00e0], %f16 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_274 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_274 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_274: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_274) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,904,*,*,1)') ifelse(5,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_274)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_274: wrhpr %g0, 0xc58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 314: RDPC rd %pc, %r18 memptr_1_275: set 0x60140000, %r31 .word 0x85812d13 ! 315: WRCCR_I wr %r4, 0x0d13, %ccr cancelint_1_276: rdhpr %halt, %r17 .word 0x85880000 ! 316: ALLCLEAN frzptr_1_277: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 317: BN bn,a br_badelay1_1_278: .word 0x1e800001 ! 1: BVC bvc .word 0xe23fe190 ! 1: STD_I std %r17, [%r31 + 0x0190] .word 0xe3e7d160 ! 1: CASA_I casa [%r31] 0x8b, %r0, %r17 normalw .word 0xa7458000 ! 318: RD_SOFTINT_REG rd %softint, %r19 nop nop mov 0x1, %r18 splash_cmpr_1_279: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_279)+8 , 16, 16)) -> intp(1,0,11,*,744,*,bd,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_279)&0xffffffff)+8 , 16, 16)) -> intp(6,0,17,*,1000,*,bd,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 319: SIAM siam 1 mondo_1_280: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d948014 ! 320: WRPR_WSTATE_R wrpr %r18, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_281 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 281_1 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_281: wrhpr %g0, 11, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c240 ! 321: CASA_I casa [%r31] 0x12, %r0, %r19 frzptr_1_282: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xf16fe130 ! 1: PREFETCH_I prefetch [%r31 + 0x0130], #24 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 322: BN bn nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_283: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819837df ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x17df, %hpstate .word 0x81b01021 ! 323: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_284 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 284_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_284: wrhpr %g0, 0xe9a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7d060 ! 324: CASA_I casa [%r31] 0x83, %r0, %r19 vahole3_1_285: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xe7e7d000 ! 325: CASA_I casa [%r31] 0x80, %r0, %r19 .word 0x89800011 ! 326: WRTICK_R wr %r0, %r17, %tick cwp_1_287: set user_data_start, %o7 .word 0x93902002 ! 327: WRPR_CWP_I wrpr %r0, 0x0002, %cwp .word 0x9f802d19 ! 328: SIR sir 0x0d19 memptr_1_288: set user_data_start, %r31 .word 0x85836158 ! 329: WRCCR_I wr %r13, 0x0158, %ccr nop nop set 0x1f503b19, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f8030f8 ! 1: SIR sir 0x10f8 intvec_1_289: .word 0x9f8039f8 ! 330: SIR sir 0x19f8 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_290 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 290_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_290: wrhpr %g0, 0x759, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7d000 ! 331: CASA_I casa [%r31] 0x80, %r0, %r13 brcommon1_1_291: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xdbe7c540 ! 1: CASA_I casa [%r31] 0x2a, %r0, %r13 ba,a .+8 jmpl %r27-0, %r27 .word 0x93a349b2 ! 332: FDIVs fdivs %f13, %f18, %f9 dvapa_1_292: nop nop ta T_CHANGE_HPRIV mov 0xef6, %r20 mov 0x7, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x89a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfc2c0 ! 333: STDFA_R stda %f0, [%r0, %r31] iaw_1_293: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_293: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_293 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_293: brnz %r16, iaw_wait1_293 ld [%r23], %r16 ba iaw_startwait1_293 mov 0x1, %r16 continue_iaw_1_293: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_293: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_293 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_293: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_293 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_293: mov 0x38, %r18 iaw3_1_293: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xfda, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7c400 ! 334: CASA_I casa [%r31] 0x20, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_1_294: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_294-donret_1_294+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00343700 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1f1f, %htstate best_set_reg(0xaf1, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) retry donretarg_1_294: .word 0x81982293 ! 335: WRHPR_HPSTATE_I wrhpr %r0, 0x0293, %hpstate splash_tba_1_295: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 336: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop mov 0x1, %r18 splash_cmpr_1_296: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_296)+8 , 16, 16)) -> intp(7,0,10,*,728,*,5b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_296)&0xffffffff)+8 , 16, 16)) -> intp(7,0,14,*,648,*,5b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 337: SIAM siam 1 splash_lsu_1_297: nop nop ta T_CHANGE_HPRIV set 0x63dfe86a, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x07400001 ! 1: FBPUL fbul stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 338: FBPULE fbule,a,pn %fcc0, .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_1_298: ta T_CHANGE_NONPRIV ! macro .word 0x8d903b23 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1b23, %pstate ibp_1_300: nop nop .word 0xe1bfda00 ! 341: STDFA_R stda %f16, [%r0, %r31] .word 0xd207c000 ! 342: LDUW_R lduw [%r31 + %r0], %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_1_301: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_301-donret_1_301+4), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00fe1200 | (0x88 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1e07, %htstate wrhpr %g0, 0x588, %hpstate ! rand=1 (1) done donretarg_1_301: .word 0x0e800001 ! 343: BVS bvs brlz,a,pt %r6, skip_1_302 fbuge skip_1_302 .align 512 skip_1_302: .word 0x9ba089d1 ! 344: FDIVd fdivd %f2, %f48, %f44 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_1_303: ta T_CHANGE_NONHPRIV ! macro .word 0x9f8028ac ! 346: SIR sir 0x08ac nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_304: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_304)+8 , 16, 16)) -> intp(0,0,4,*,1008,*,89,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_304)&0xffffffff)+8 , 16, 16)) -> intp(1,0,2,*,936,*,89,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983fcf ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1fcf, %hpstate .word 0x81b01021 ! 347: SIAM siam 1 frzptr_1_305: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xda6fe040 ! 1: LDSTUB_I ldstub %r13, [%r31 + 0x0040] best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 348: BN bn,a mondo_1_306: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3c0] %asi stxa %r11, [%r0+0x3e0] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d950001 ! 349: WRPR_WSTATE_R wrpr %r20, %r1, %wstate intveclr_1_307: nop nop ta T_CHANGE_HPRIV setx 0xca99d7ca6a5e21ed, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xfd0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 350: FBPLG fblg .word 0x91950002 ! 351: WRPR_PIL_R wrpr %r20, %r2, %pil #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_309), 16, 16)) -> intp(mask2tid(0x1),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_309)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) xir_1_309: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_309: and %g1, 2, %g1 brnz,a %g1, xirwait_1_309 ldx [%r17], %g1 xir_1_309: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab817200 ! 352: WR_CLEAR_SOFTINT_I wr %r5, 0x1200, %clear_softint splash_tba_1_310: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 353: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_1_311: rdhpr %halt, %r19 .word 0x85880000 ! 354: ALLCLEAN splash_lsu_1_312: nop nop ta T_CHANGE_HPRIV set 0x4b8c6cb0, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x24800001 ! 1: BLE ble,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 355: FBPULE fbule,a,pn %fcc0, cancelint_1_313: rdhpr %halt, %r20 .word 0x85880000 ! 356: ALLCLEAN jmptr_1_314: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 .word 0x87902390 ! 358: WRPR_TT_I wrpr %r0, 0x0390, %tt splash_tba_1_315: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 359: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_316), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_316)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,896,*,*,1) xir_1_316: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_316: and %g1, 2, %g1 brnz,a %g1, xirwait_1_316 ldx [%r17], %g1 xir_1_316: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84b6de ! 360: WR_CLEAR_SOFTINT_I wr %r18, 0x16de, %clear_softint .word 0x2e800001 ! 1: BVS bvs,a .word 0x8d903974 ! 361: WRPR_PSTATE_I wrpr %r0, 0x1974, %pstate iaw_1_318: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_318: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_318 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_318: brnz %r16, iaw_wait1_318 ld [%r23], %r16 ba iaw_startwait1_318 mov 0x1, %r16 continue_iaw_1_318: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_318: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_318 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_318: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_318 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_318: mov 0x38, %r18 iaw4_1_318: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x9c8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fde20 ! 362: LDDFA_R ldda [%r31, %r0], %f16 .word 0x9f803a98 ! 363: SIR sir 0x1a98 mondo_1_319: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r17, [%r0+0x3d0] %asi stxa %r3, [%r0+0x3c0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d950010 ! 364: WRPR_WSTATE_R wrpr %r20, %r16, %wstate .word 0xe83fe000 ! 365: STD_I std %r20, [%r31 + 0x0000] ibp_1_321: nop nop wrhpr %g0, 0xa59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe93fe110 ! 366: STDF_I std %f20, [0x0110, %r31] .word 0xe83fc000 ! 367: STD_R std %r20, [%r31 + %r0] .word 0xe93fc000 ! 368: STDF_R std %f20, [%r0, %r31] intveclr_1_322: nop nop ta T_CHANGE_HPRIV setx 0xe4f31468415fc48c, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 369: FBPLG fblg,a,pn %fcc0, ibp_1_323: nop nop wrhpr %g0, 0x908, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800001 ! 370: BN bn,a memptr_1_324: set user_data_start, %r31 .word 0x8580e0bb ! 371: WRCCR_I wr %r3, 0x00bb, %ccr .word 0xe9e7d060 ! 372: CASA_I casa [%r31] 0x83, %r0, %r20 ibp_1_326: nop nop wrhpr %g0, 0xb98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f8020e0 ! 373: SIR sir 0x00e0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_327), 16, 16)) -> intp(mask2tid(0x1),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_327)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,712,*,*,1) xir_1_327: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_327: and %g1, 2, %g1 brnz,a %g1, xirwait_1_327 ldx [%r17], %g1 xir_1_327: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8467f8 ! 374: WR_CLEAR_SOFTINT_I wr %r17, 0x07f8, %clear_softint br_badelay2_1_328: .word 0xa1a449d4 ! 1: FDIVd fdivd %f48, %f20, %f16 pdist %f14, %f12, %f10 .word 0xa7b10310 ! 375: ALIGNADDRESS alignaddr %r4, %r16, %r19 mondo_1_329: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3c0] %asi stxa %r4, [%r0+0x3d8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d94c012 ! 376: WRPR_WSTATE_R wrpr %r19, %r18, %wstate splash_tba_1_330: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 377: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_1_331: nop nop ta T_CHANGE_PRIV setx 0xffffffb1ffffffab, %g1, %g7 .word 0xa3800007 ! 378: WR_PERF_COUNTER_R wr %r0, %r7, %- jmptr_1_332: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 379: JMPL_R jmpl %r27 + %r0, %r27 mondo_1_333: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3d0] %asi stxa %r19, [%r0+0x3d0] %asi .word 0x87802089 ! 1: WRASI_I wr %r0, 0x0089, %asi .word 0x9d91c014 ! 380: WRPR_WSTATE_R wrpr %r7, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_334: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_334)+8 , 16, 16)) -> intp(1,0,21,*,696,*,eb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_334)&0xffffffff)+8 , 16, 16)) -> intp(7,0,20,*,928,*,eb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819824ff ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x04ff, %hpstate .word 0x81b01021 ! 381: SIAM siam 1 nop nop mov 0x1, %r18 splash_cmpr_1_335: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_335)+8 , 16, 16)) -> intp(1,0,16,*,1008,*,4d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_335)&0xffffffff)+8 , 16, 16)) -> intp(4,0,28,*,704,*,4d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 382: SIAM siam 1 frzptr_1_336: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 383: BN bn,a nop nop set 0xa6b0325b, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a109c9 ! 1: FDIVd fdivd %f4, %f40, %f20 intvec_1_337: .word 0x9f8037b2 ! 384: SIR sir 0x17b2 brcommon3_1_338: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd3e7d040 ! 1: CASA_I casa [%r31] 0x82, %r0, %r9 ba,a .+8 jmpl %r27-4, %r27 .word 0xd2bfc180 ! 385: STDA_R stda %r9, [%r31 + %r0] 0x0c demap_1_339: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r14, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 wrhpr %g0, 0x34a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe198 ! 386: LDD_I ldd [%r31 + 0x0198], %r9 iaw_1_340: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_340: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_340 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_340: brnz %r16, iaw_wait1_340 ld [%r23], %r16 ba iaw_startwait1_340 mov 0x1, %r16 continue_iaw_1_340: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_340: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_340 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_340: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_340 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_340: mov 0x38, %r18 iaw2_1_340: rdpr %tba, %r19 mov 0x102, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x6d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd21fe050 ! 387: LDD_I ldd [%r31 + 0x0050], %r9 fpinit_1_341: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x89a009c4 ! 388: FDIVd fdivd %f0, %f4, %f4 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_342) , 16, 16)) -> intp(3,0,2,*,912,*,9d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_342)&0xffffffff) , 16, 16)) -> intp(3,0,9,*,688,*,9d,1) #else set 0xc800bd4c, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa9a489c6 ! 1: FDIVd fdivd %f18, %f6, %f20 intvec_1_342: .word 0x97b344d3 ! 389: FCMPNE32 fcmpne32 %d44, %d50, %r11 brcommon2_1_343: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-0, %r27 .word 0xc1bfdf00 ! 390: STDFA_R stda %f0, [%r0, %r31] .word 0xc19fda60 ! 391: LDDFA_R ldda [%r31, %r0], %f0 splash_lsu_1_344: nop nop ta T_CHANGE_HPRIV set 0xe1d0e0b5, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 392: FBPULE fbule,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_345: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_345)+8 , 16, 16)) -> intp(4,0,6,*,936,*,29,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_345)&0xffffffff)+8 , 16, 16)) -> intp(3,0,12,*,896,*,29,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f5d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f5d, %hpstate .word 0x81b01021 ! 393: SIAM siam 1 iaw_1_346: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_346: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_346 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_346: brnz %r16, iaw_wait1_346 ld [%r23], %r16 ba iaw_startwait1_346 mov 0x1, %r16 continue_iaw_1_346: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_346: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_346 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_346: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_346 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_346: mov 0x38, %r18 iaw1_1_346: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x552, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fc3e0 ! 394: LDDFA_R ldda [%r31, %r0], %f16 cancelint_1_347: rdhpr %halt, %r9 .word 0x85880000 ! 395: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_348 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 348_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_348: wrhpr %g0, 0xa42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd3e7d100 ! 396: CASA_I casa [%r31] 0x88, %r0, %r9 nop nop ta T_CHANGE_HPRIV ! macro donret_1_349: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_349-donret_1_349), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x000a4c00 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x6df, %htstate wrhpr %g0, 0xb8a, %hpstate ! rand=1 (1) .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, ldx [%r11+%r0], %g1 done donretarg_1_349: .word 0x93a0c9d4 ! 397: FDIVd fdivd %f34, %f20, %f40 splash_tba_1_350: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 398: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_1_351: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xd26fe1c0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x01c0] best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 399: BN bn,a .word 0xd28008a0 ! 400: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 cwp_1_352: set user_data_start, %o7 .word 0x93902004 ! 401: WRPR_CWP_I wrpr %r0, 0x0004, %cwp .word 0x89800011 ! 402: WRTICK_R wr %r0, %r17, %tick pmu_1_354: nop nop ta T_CHANGE_PRIV setx 0xffffffbcffffffa6, %g1, %g7 .word 0xa3800007 ! 403: WR_PERF_COUNTER_R wr %r0, %r7, %- #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_355), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_355)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,992,*,*,1) xir_1_355: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_355: and %g1, 2, %g1 brnz,a %g1, xirwait_1_355 ldx [%r17], %g1 xir_1_355: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f5e5 ! 404: WR_CLEAR_SOFTINT_I wr %r19, 0x15e5, %clear_softint brcommon3_1_356: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337c000 ! 1: STQF_R - %f9, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8198261f ! 405: WRHPR_HPSTATE_I wrhpr %r0, 0x061f, %hpstate frzptr_1_357: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 406: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_358) , 16, 16)) -> intp(7,0,4,*,1016,*,f1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_358)&0xffffffff) , 16, 16)) -> intp(7,0,12,*,712,*,f1,1) #else set 0xa1d0d553, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_1_358: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x39400001 ! 407: FBPUGE fbuge,a,pn %fcc0, .word 0xc19fc2c0 ! 408: LDDFA_R ldda [%r31, %r0], %f0 .word 0xc32fc000 ! 409: STXFSR_R st-sfr %f1, [%r0, %r31] ibp_1_359: nop nop .word 0x20800001 ! 410: BN bn,a brcommon3_1_360: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe06fe1e0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01e0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800001 ! 411: BN bn,a .word 0x879023b3 ! 412: WRPR_TT_I wrpr %r0, 0x03b3, %tt frzptr_1_361: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 413: BN bn,a splash_tba_1_362: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 414: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_1_363: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 415: WRPR_TBA_R wrpr %r0, %r12, %tba brcommon3_1_364: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe137c000 ! 1: STQF_R - %f16, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x81983696 ! 416: WRHPR_HPSTATE_I wrhpr %r0, 0x1696, %hpstate br_badelay3_1_365: .word 0x14800001 ! 1: BG bg .word 0x22800001 ! 1: BE be,a .word 0xe914c011 ! 1: LDQF_R - [%r19, %r17], %f20 .word 0xa1a48831 ! 417: FADDs fadds %f18, %f17, %f16 intveclr_1_366: nop nop ta T_CHANGE_HPRIV setx 0x6631c9a2cc2bc945, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x993, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 418: FBPLG fblg splash_tba_1_367: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 419: WRPR_TBA_R wrpr %r0, %r12, %tba intveclr_1_368: nop nop ta T_CHANGE_HPRIV setx 0xc60d51987fef05a5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 420: FBPLG fblg .word 0x91944014 ! 421: WRPR_PIL_R wrpr %r17, %r20, %pil splash_hpstate_1_370: .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, .word 0x8198281d ! 422: WRHPR_HPSTATE_I wrhpr %r0, 0x081d, %hpstate cancelint_1_371: rdhpr %halt, %r19 .word 0x85880000 ! 423: ALLCLEAN mondo_1_372: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r13, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3e0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d950012 ! 424: WRPR_WSTATE_R wrpr %r20, %r18, %wstate vahole3_1_373: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0xf1efe020 ! 425: PREFETCHA_I prefetcha [%r31, + 0x0020] %asi, #24 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_374), 16, 16)) -> intp(mask2tid(0x1),1,3,*,664,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_374)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,976,*,*,1) xir_1_374: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_374: and %g1, 2, %g1 brnz,a %g1, xirwait_1_374 ldx [%r17], %g1 xir_1_374: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab807dd9 ! 426: WR_CLEAR_SOFTINT_I wr %r1, 0x1dd9, %clear_softint ibp_1_375: nop nop .word 0x937024fa ! 427: POPC_I popc 0x04fa, %r9 .word 0xe1bfe060 ! 428: STDFA_I stda %f16, [0x0060, %r31] nop nop mov 0x1, %r18 splash_cmpr_1_376: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_376)+8 , 16, 16)) -> intp(2,0,7,*,992,*,15,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_376)&0xffffffff)+8 , 16, 16)) -> intp(0,0,14,*,744,*,15,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 429: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_377), 16, 16)) -> intp(mask2tid(0x1),1,3,*,992,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_377)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,968,*,*,1) xir_1_377: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_377: and %g1, 2, %g1 brnz,a %g1, xirwait_1_377 ldx [%r17], %g1 xir_1_377: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab81f5b1 ! 430: WR_CLEAR_SOFTINT_I wr %r7, 0x15b1, %clear_softint cancelint_1_378: rdhpr %halt, %r9 .word 0x85880000 ! 431: ALLCLEAN splash_tba_1_379: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 432: WRPR_TBA_R wrpr %r0, %r12, %tba splash_tba_1_380: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 433: WRPR_TBA_R wrpr %r0, %r12, %tba cancelint_1_381: rdhpr %halt, %r8 .word 0x85880000 ! 434: ALLCLEAN memptr_1_382: set 0x60740000, %r31 .word 0x858471b0 ! 435: WRCCR_I wr %r17, 0x11b0, %ccr .word 0x9f803593 ! 436: SIR sir 0x1593 .word 0xd037e0f4 ! 437: STH_I sth %r8, [%r31 + 0x00f4] iaw_1_383: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_383: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_383 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_383: brnz %r16, iaw_wait1_383 ld [%r23], %r16 ba iaw_startwait1_383 mov 0x1, %r16 continue_iaw_1_383: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_383: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_383 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_383: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_383 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_383: mov 0x38, %r18 iaw4_1_383: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x109, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd0dfdd40 ! 438: LDXA_R ldxa [%r31, %r0] 0xea, %r8 iaw_1_384: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_384: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_384 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_384: brnz %r16, iaw_wait1_384 ld [%r23], %r16 ba iaw_startwait1_384 mov 0x1, %r16 continue_iaw_1_384: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_384: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_384 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_384: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_384 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_384: mov 0x38, %r18 iaw0_1_384: rd %pc, %r19 add %r19, (16+9), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xd49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdc00 ! 439: STDFA_R stda %f0, [%r0, %r31] ibp_1_385: nop nop .word 0x87ac0a51 ! 440: FCMPd fcmpd %fcc, %f16, %f48 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_386), 16, 16)) -> intp(mask2tid(0x1),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_386)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) xir_1_386: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_386: and %g1, 2, %g1 brnz,a %g1, xirwait_1_386 ldx [%r17], %g1 xir_1_386: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab8534d5 ! 441: WR_CLEAR_SOFTINT_I wr %r20, 0x14d5, %clear_softint intveclr_1_387: nop nop ta T_CHANGE_HPRIV setx 0x1841dbdbd0b3df79, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 442: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_388 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 388_1 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_388: wrhpr %g0, 0x1c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c400 ! 443: CASA_I casa [%r31] 0x20, %r0, %r13 frzptr_1_389: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fc3e0 ! 444: LDDFA_R ldda [%r31, %r0], %f0 intveclr_1_390: nop nop ta T_CHANGE_HPRIV setx 0x06f21f9a4c6fb0b5, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0xe92, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400002 ! 445: FBPLG fblg iaw_1_391: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_391: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_391 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_391: brnz %r16, iaw_wait1_391 ld [%r23], %r16 ba iaw_startwait1_391 mov 0x1, %r16 continue_iaw_1_391: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_391: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_391 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_391: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_391 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_391: mov 0x38, %r18 iaw4_1_391: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x951, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93a349d0 ! 446: FDIVd fdivd %f44, %f16, %f40 br_badelay1_1_392: .word 0x04cfc001 ! 1: BRLEZ brlez,pt %r31, .word 0xe334c010 ! 1: STQF_R - %f17, [%r16, %r19] .word 0x22c84001 ! 1: BRZ brz,a,pt %r1, normalw .word 0xa5458000 ! 447: RD_SOFTINT_REG rd %softint, %r18 ibp_1_393: nop nop .word 0xa1b0c491 ! 448: FCMPLE32 fcmple32 %d34, %d48, %r16 jmptr_1_394: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 449: JMPL_R jmpl %r27 + %r0, %r27 .word 0x9f8020b0 ! 450: SIR sir 0x00b0 memptr_1_396: set user_data_start, %r31 .word 0x85837b4d ! 451: WRCCR_I wr %r13, 0x1b4d, %ccr cancelint_1_397: rdhpr %halt, %r19 .word 0x85880000 ! 452: ALLCLEAN splash_lsu_1_398: nop nop ta T_CHANGE_HPRIV set 0x1ee95459, %r2 mov 0x5, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 453: FBPULE fbule,a,pn %fcc0, brcommon2_1_399: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f8021a0 ! 1: SIR sir 0x01a0 ba,a .+8 jmpl %r27-4, %r27 .word 0xa1b7c7c0 ! 454: PDIST pdistn %d62, %d0, %d16 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_1_400: ta T_CHANGE_NONHPRIV ! macro frzptr_1_401: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 456: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_402), 16, 16)) -> intp(mask2tid(0x1),1,3,*,744,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_402)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,640,*,*,1) xir_1_402: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_402: and %g1, 2, %g1 brnz,a %g1, xirwait_1_402 ldx [%r17], %g1 xir_1_402: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab833f9d ! 457: WR_CLEAR_SOFTINT_I wr %r12, 0x1f9d, %clear_softint brcommon3_1_403: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd537e0d0 ! 1: STQF_I - %f10, [0x00d0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r13, [%r0] ASI_LSU_CONTROL .word 0xa3aac832 ! 458: FMOVGE fmovs %fcc1, %f18, %f17 splash_tba_1_404: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 459: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0x89800011 ! 460: WRTICK_R wr %r0, %r17, %tick br_badelay3_1_406: .word 0x12800002 ! 1: BNE bne .word 0xa777fb7b ! Random illegal ? .word 0xa5a509d2 ! 1: FDIVd fdivd %f20, %f18, %f18 .word 0x93a24830 ! 461: FADDs fadds %f9, %f16, %f9 .word 0x9f802c4c ! 462: SIR sir 0x0c4c nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_407: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_407)+8 , 16, 16)) -> intp(1,0,2,*,712,*,d5,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_407)&0xffffffff)+8 , 16, 16)) -> intp(4,0,31,*,928,*,d5,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983492 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1492, %hpstate .word 0x81b01021 ! 463: SIAM siam 1 cwp_1_408: set user_data_start, %o7 .word 0x93902004 ! 464: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cancelint_1_409: rdhpr %halt, %r20 .word 0x85880000 ! 465: ALLCLEAN splash_tba_1_410: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 466: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe8800a80 ! 467: LDUWA_R lduwa [%r0, %r0] 0x54, %r20 pmu_1_411: nop nop ta T_CHANGE_PRIV setx 0xffffffbbffffffae, %g1, %g7 .word 0xa3800007 ! 468: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe80fc000 ! 469: LDUB_R ldub [%r31 + %r0], %r20 splash_tba_1_412: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 470: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_1_413: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe0f0 ! 1: STXFSR_I st-sfr %f1, [0x00f0, %r31] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 471: BN bn mondo_1_414: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3e0] %asi stxa %r18, [%r0+0x3c0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d94c010 ! 472: WRPR_WSTATE_R wrpr %r19, %r16, %wstate mondo_1_415: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r3, [%r0+0x3d0] %asi stxa %r2, [%r0+0x3c0] %asi .word 0x8780208b ! 1: WRASI_I wr %r0, 0x008b, %asi .word 0x9d92c00a ! 473: WRPR_WSTATE_R wrpr %r11, %r10, %wstate iaw_1_416: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_416: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_416 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_416: brnz %r16, iaw_wait1_416 ld [%r23], %r16 ba iaw_startwait1_416 mov 0x1, %r16 continue_iaw_1_416: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_416: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_416 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_416: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_416 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_416: mov 0x38, %r18 iaw0_1_416: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x2d0, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95a509b2 ! 474: FDIVs fdivs %f20, %f18, %f10 mondo_1_417: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3d0] %asi stxa %r11, [%r0+0x3d0] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d914011 ! 475: WRPR_WSTATE_R wrpr %r5, %r17, %wstate cancelint_1_418: rdhpr %halt, %r10 .word 0x85880000 ! 476: ALLCLEAN #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_419), 16, 16)) -> intp(mask2tid(0x1),1,3,*,720,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_419)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,744,*,*,1) xir_1_419: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_419: and %g1, 2, %g1 brnz,a %g1, xirwait_1_419 ldx [%r17], %g1 xir_1_419: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e8d6 ! 477: WR_CLEAR_SOFTINT_I wr %r19, 0x08d6, %clear_softint jmptr_1_420: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 478: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_421 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_421 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610050, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_421: !! CWQ interrupt (20610050) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_421) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,720,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_421)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,736,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_421: wrhpr %g0, 0x813, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 479: RDPC rd %pc, %r17 fpinit_1_422: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x91a009c4 ! 480: FDIVd fdivd %f0, %f4, %f8 iaw_1_423: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_423: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_423 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_423: brnz %r16, iaw_wait1_423 ld [%r23], %r16 ba iaw_startwait1_423 mov 0x1, %r16 continue_iaw_1_423: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_423: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_423 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_423: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_423 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_423: mov 0x38, %r18 iaw4_1_423: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe23fe040 ! 481: STD_I std %r17, [%r31 + 0x0040] splash_tba_1_424: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 482: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_1_425: nop nop setx 0xffffffbeffffffa3, %g1, %g7 .word 0xa3800007 ! 483: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0xe2bfe0f3 ! 484: STDA_I stda %r17, [%r31 + 0x00f3] %asi splash_lsu_1_426: nop nop ta T_CHANGE_HPRIV set 0xa5746179, %r2 mov 0x2, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 485: FBPULE fbule,a,pn %fcc0, .word 0x89800011 ! 486: WRTICK_R wr %r0, %r17, %tick .word 0xe337e0d4 ! 487: STQF_I - %f17, [0x00d4, %r31] frzptr_1_428: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xe26fe070 ! 1: LDSTUB_I ldstub %r17, [%r31 + 0x0070] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfdf00 ! 488: STDFA_R stda %f16, [%r0, %r31] brcommon3_1_429: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe337e070 ! 1: STQF_I - %f17, [0x0070, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d903642 ! 489: WRPR_PSTATE_I wrpr %r0, 0x1642, %pstate nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_430 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_430 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_430: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_430) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,952,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_430)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_430: wrhpr %g0, 0x501, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 490: RDPC rd %pc, %r20 .word 0xe9e7c6c0 ! 491: CASA_I casa [%r31] 0x36, %r0, %r20 .word 0xe9e7c280 ! 492: CASA_I casa [%r31] 0x14, %r0, %r20 nop nop mov 0x0, %r18 splash_cmpr_1_433: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 493: SIAM siam 1 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_434) , 16, 16)) -> intp(4,0,17,*,696,*,f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_434)&0xffffffff) , 16, 16)) -> intp(7,0,31,*,760,*,f,1) #else set 0xa6d0df0f, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_434: .word 0x39400002 ! 494: FBPUGE fbuge,a,pn %fcc0, .word 0x89800011 ! 495: WRTICK_R wr %r0, %r17, %tick frzptr_1_436: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x97a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f42 best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 496: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_437 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_437 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_437: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_437) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,736,*,*,1)') ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_437)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_437: wrhpr %g0, 0x791, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 497: RDPC rd %pc, %r18 splash_tba_1_438: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 498: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_1_439: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3d0] %asi stxa %r18, [%r0+0x3e8] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d928006 ! 499: WRPR_WSTATE_R wrpr %r10, %r6, %wstate brcommon2_1_440: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x9f8021b0 ! 1: SIR sir 0x01b0 ba,a .+8 jmpl %r27-4, %r27 .word 0xe1bfde00 ! 500: STDFA_R stda %f16, [%r0, %r31] .word 0x9192400a ! 501: WRPR_PIL_R wrpr %r9, %r10, %pil ibp_1_442: nop nop .word 0xd69fc400 ! 502: LDDA_R ldda [%r31, %r0] 0x20, %r11 cwp_1_443: set user_data_start, %o7 .word 0x93902004 ! 503: WRPR_CWP_I wrpr %r0, 0x0004, %cwp cancelint_1_444: rdhpr %halt, %r9 .word 0x85880000 ! 504: ALLCLEAN .word 0xd327e038 ! 505: STF_I st %f9, [0x0038, %r31] brcommon3_1_445: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd26fe0e0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00e0] ba,a .+8 jmpl %r27+0, %r27 .word 0x20800002 ! 506: BN bn,a splash_tba_1_446: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 507: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop set 0x70d0a7ab, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_447: .word 0x9f803e6f ! 508: SIR sir 0x1e6f intveclr_1_448: nop nop ta T_CHANGE_HPRIV setx 0xbecc0667c96342db, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x588, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 509: FBPLG fblg memptr_1_449: set 0x60140000, %r31 .word 0x8581671d ! 510: WRCCR_I wr %r5, 0x071d, %ccr nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_450 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 450_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_450: wrhpr %g0, 0x880, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d140 ! 511: CASA_I casa [%r31] 0x8a, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_451 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_451 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100f0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_451: !! CWQ interrupt (206100f0) goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_451) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,728,*,*,1)') ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_451)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_451: wrhpr %g0, 0x953, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 512: RDPC rd %pc, %r16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_452) , 16, 16)) -> intp(4,0,14,*,944,*,c7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_452)&0xffffffff) , 16, 16)) -> intp(4,0,20,*,648,*,c7,1) #else set 0xc9d098cf, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a489d0 ! 1: FDIVd fdivd %f18, %f16, %f18 intvec_1_452: .word 0x97b304c4 ! 513: FCMPNE32 fcmpne32 %d12, %d4, %r11 nop nop set 0x9190f607, %r28 !TTID : 6 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400002 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_1_453: .word 0x9f803e33 ! 514: SIR sir 0x1e33 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_454: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_454)+8 , 16, 16)) -> intp(2,0,25,*,976,*,bb,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_454)&0xffffffff)+8 , 16, 16)) -> intp(1,0,22,*,712,*,bb,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819822e5 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x02e5, %hpstate .word 0x81b01021 ! 515: SIAM siam 1 mondo_1_455: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3d0] %asi stxa %r3, [%r0+0x3d8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d940013 ! 516: WRPR_WSTATE_R wrpr %r16, %r19, %wstate pmu_1_456: nop nop setx 0xffffffbbffffffa1, %g1, %g7 .word 0xa3800007 ! 517: WR_PERF_COUNTER_R wr %r0, %r7, %- brcommon3_1_457: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0f0 ! 1: STQF_I - %f9, [0x00f0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xc32fe140 ! 518: STXFSR_I st-sfr %f1, [0x0140, %r31] pmu_1_458: nop nop ta T_CHANGE_PRIV setx 0xffffffb9ffffffa2, %g1, %g7 .word 0xa3800007 ! 519: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0xfea04d8e, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(5,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80235c ! 1: SIR sir 0x035c intvec_1_459: .word 0x97b044d4 ! 520: FCMPNE32 fcmpne32 %d32, %d20, %r11 vahole3_1_460: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xd697c200 ! 521: LDUHA_R lduha [%r31, %r0] 0x10, %r11 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_1_461: ta T_CHANGE_NONHPRIV ! macro iaw_1_462: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_462: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_462 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_462: brnz %r16, iaw_wait1_462 ld [%r23], %r16 ba iaw_startwait1_462 mov 0x1, %r16 continue_iaw_1_462: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_462: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_462 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_462: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_462 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_462: mov 0x38, %r18 iaw4_1_462: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x749, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91a149d4 ! 523: FDIVd fdivd %f36, %f20, %f8 nop nop mov 0x0, %r18 splash_cmpr_1_463: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 524: SIAM siam 1 iaw_1_464: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_464: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_464 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_464: brnz %r16, iaw_wait1_464 ld [%r23], %r16 ba iaw_startwait1_464 mov 0x1, %r16 continue_iaw_1_464: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_464: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_464 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_464: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_464 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_464: mov 0x38, %r18 iaw0_1_464: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc12, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdf00 ! 525: LDDA_R ldda [%r31, %r0] 0xf8, %r16 br_longdelay3_1_465: nop not %g0, %r27 jmpl %r27+0, %r27 .word 0x8d903e13 ! 526: WRPR_PSTATE_I wrpr %r0, 0x1e13, %pstate frzptr_1_466: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 527: BN bn,a .word 0x9f802000 ! 528: SIR sir 0x0000 vahole4_1_468: nop nop ta T_CHANGE_NONHPRIV setx vahole_target2, %r18, %r27 jmpl %r27+0, %r27 .word 0x81983c23 ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x1c23, %hpstate .word 0x16800001 ! 1: BGE bge .word 0x8d903885 ! 530: WRPR_PSTATE_I wrpr %r0, 0x1885, %pstate .word 0xd127c000 ! 531: STF_R st %f8, [%r0, %r31] .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, .word 0x8d902947 ! 532: WRPR_PSTATE_I wrpr %r0, 0x0947, %pstate brcommon3_1_471: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xd137e1f0 ! 1: STQF_I - %f8, [0x01f0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0x20800001 ! 533: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_472) , 16, 16)) -> intp(5,0,6,*,640,*,1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_472)&0xffffffff) , 16, 16)) -> intp(3,0,31,*,960,*,1,1) #else set 0x5490e44b, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_472: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b144d3 ! 534: FCMPNE32 fcmpne32 %d36, %d50, %r19 .word 0xe677c000 ! 535: STX_R stx %r19, [%r31 + %r0] .word 0xe7e7d160 ! 536: CASA_I casa [%r31] 0x8b, %r0, %r19 jmptr_1_474: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 537: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_1_475: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_475-donret_1_475), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0062a200 | (32 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1415, %htstate best_set_reg(0x7c3, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) done .align 2048 donretarg_1_475: .word 0x81983c73 ! 538: WRHPR_HPSTATE_I wrhpr %r0, 0x1c73, %hpstate trapasi_1_476: nop mov 0x3f0, %r1 ! (VA for ASI 0x25) .word 0xe6d844a0 ! 539: LDXA_R ldxa [%r1, %r0] 0x25, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_477), 16, 16)) -> intp(mask2tid(0x1),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_477)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,968,*,*,1) xir_1_477: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_477: and %g1, 2, %g1 brnz,a %g1, xirwait_1_477 ldx [%r17], %g1 xir_1_477: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab807079 ! 540: WR_CLEAR_SOFTINT_I wr %r1, 0x1079, %clear_softint .word 0x3d400002 ! 1: FBPULE fbule,a,pn %fcc0, .word 0x8d903b83 ! 541: WRPR_PSTATE_I wrpr %r0, 0x1b83, %pstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_479 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x61fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 479_1 is 61fff !! MA interrupt goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_479: wrhpr %g0, 0x359, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7dc40 ! 542: CASA_I casa [%r31] 0xe2, %r0, %r19 mondo_1_480: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3d0] %asi stxa %r13, [%r0+0x3d0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d944007 ! 543: WRPR_WSTATE_R wrpr %r17, %r7, %wstate .word 0xa1520000 ! 544: RDPR_PIL iaw_1_481: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_481: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_481 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_481: brnz %r16, iaw_wait1_481 ld [%r23], %r16 ba iaw_startwait1_481 mov 0x1, %r16 continue_iaw_1_481: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_481: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_481 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_481: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_481 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_481: mov 0x38, %r18 iaw1_1_481: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x55a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe03fe140 ! 545: STD_I std %r16, [%r31 + 0x0140] .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_1_482: ta T_CHANGE_NONPRIV ! macro cancelint_1_483: rdhpr %halt, %r19 .word 0x85880000 ! 547: ALLCLEAN splash_tba_1_484: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 548: WRPR_TBA_R wrpr %r0, %r12, %tba dvapa_1_485: nop nop ta T_CHANGE_HPRIV mov 0xa70, %r20 mov 0xc, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0x61b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc09fdc00 ! 549: LDDA_R ldda [%r31, %r0] 0xe0, %r0 .word 0x89800011 ! 550: WRTICK_R wr %r0, %r17, %tick .word 0x89800011 ! 551: WRTICK_R wr %r0, %r17, %tick demap_1_488: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r10, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0x408, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe1d7 ! 552: LDD_I ldd [%r31 + 0x01d7], %r19 mondo_1_489: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d904012 ! 553: WRPR_WSTATE_R wrpr %r1, %r18, %wstate .word 0x9f80387a ! 554: SIR sir 0x187a iaw_1_490: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_490: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_490 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_490: brnz %r16, iaw_wait1_490 ld [%r23], %r16 ba iaw_startwait1_490 mov 0x1, %r16 continue_iaw_1_490: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_490: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_490 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_490: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_490 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_490: mov 0x38, %r18 iaw1_1_490: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x70b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe19fc2c0 ! 555: LDDFA_R ldda [%r31, %r0], %f16 memptr_1_491: set 0x60540000, %r31 .word 0x8584a3a2 ! 556: WRCCR_I wr %r18, 0x03a2, %ccr nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_492 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_492 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_492: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_492) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,968,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_492)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,760,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_492: wrhpr %g0, 0xf82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 557: RDPC rd %pc, %r20 ibp_1_493: nop nop wrhpr %g0, 0x35a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe91fe140 ! 558: LDDF_I ldd [%r31, 0x0140], %f20 .word 0x28800001 ! 559: BLEU bleu,a vahole2_1_494: nop nop ta T_CHANGE_NONHPRIV setx vahole_target1, %r18, %r27 jmpl %r27+0, %r27 .word 0xe1bfdf20 ! 560: STDFA_R stda %f16, [%r0, %r31] ibp_1_495: nop nop wrhpr %g0, 0xed9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x20800002 ! 561: BN bn,a #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_496) , 16, 16)) -> intp(6,0,1,*,960,*,ab,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_496)&0xffffffff) , 16, 16)) -> intp(2,0,27,*,968,*,ab,1) #else set 0xe72072ad, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_496: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x95a089c4 ! 562: FDIVd fdivd %f2, %f4, %f10 frzptr_1_497: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0xd43fe000 ! 1: STD_I std %r10, [%r31 + 0x0000] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc19fdf20 ! 563: LDDFA_R ldda [%r31, %r0], %f0 memptr_1_498: set user_data_start, %r31 .word 0x85853399 ! 564: WRCCR_I wr %r20, 0x1399, %ccr iaw_1_499: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_499: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_499 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_499: brnz %r16, iaw_wait1_499 ld [%r23], %r16 ba iaw_startwait1_499 mov 0x1, %r16 continue_iaw_1_499: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_499: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_499 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_499: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_499 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_499: mov 0x38, %r18 iaw1_1_499: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x343, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a409d2 ! 565: FDIVd fdivd %f16, %f18, %f20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_500) , 16, 16)) -> intp(5,0,8,*,1000,*,13,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_500)&0xffffffff) , 16, 16)) -> intp(4,0,20,*,728,*,13,1) #else set 0xdb909de5, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_500: .word 0x39400001 ! 566: FBPUGE fbuge,a,pn %fcc0, jmptr_1_501: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 567: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_502 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_502 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_502: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_502) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,696,*,*,1)') ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_502)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,896,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_502: wrhpr %g0, 0xe9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 568: RDPC rd %pc, %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_1_503: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_503-donret_1_503), %r12 add %r12, 0x8, %r11 ! nonseq tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00cc7100 | (4 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xe7d, %htstate best_set_reg(0x9c2, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) done donretarg_1_503: .word 0xa5a109d0 ! 569: FDIVd fdivd %f4, %f16, %f18 frzptr_1_504: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 570: BN bn,a .word 0x9f803ac8 ! 571: SIR sir 0x1ac8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_505), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_505)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) xir_1_505: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_505: and %g1, 2, %g1 brnz,a %g1, xirwait_1_505 ldx [%r17], %g1 xir_1_505: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84f504 ! 572: WR_CLEAR_SOFTINT_I wr %r19, 0x1504, %clear_softint frzptr_1_506: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfda60 ! 573: STDFA_R stda %f16, [%r0, %r31] cancelint_1_507: rdhpr %halt, %r20 .word 0x85880000 ! 574: ALLCLEAN #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_508) , 16, 16)) -> intp(6,0,31,*,984,*,87,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_508)&0xffffffff) , 16, 16)) -> intp(5,0,25,*,944,*,87,1) #else set 0x16404905, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa7a109c5 ! 1: FDIVd fdivd %f4, %f36, %f50 intvec_1_508: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f803fcc ! 575: SIR sir 0x1fcc cancelint_1_509: rdhpr %halt, %r11 .word 0x85880000 ! 576: ALLCLEAN vahole4_1_510: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0x9f802e15 ! 577: SIR sir 0x0e15 .word 0x879022a2 ! 578: WRPR_TT_I wrpr %r0, 0x02a2, %tt #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_511), 16, 16)) -> intp(mask2tid(0x1),1,3,*,912,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_511)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) xir_1_511: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_511: and %g1, 2, %g1 brnz,a %g1, xirwait_1_511 ldx [%r17], %g1 xir_1_511: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab837d9e ! 579: WR_CLEAR_SOFTINT_I wr %r13, 0x1d9e, %clear_softint #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_512) , 16, 16)) -> intp(1,0,19,*,736,*,ff,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_512)&0xffffffff) , 16, 16)) -> intp(4,0,17,*,1016,*,ff,1) #else set 0xe51028b9, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa5a509d1 ! 1: FDIVd fdivd %f20, %f48, %f18 intvec_1_512: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b444c4 ! 580: FCMPNE32 fcmpne32 %d48, %d4, %r19 brcommon3_1_513: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe737c000 ! 1: STQF_R - %f19, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d903edb ! 581: WRPR_PSTATE_I wrpr %r0, 0x1edb, %pstate .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl reduce_priv_lvl_1_514: ta T_CHANGE_NONHPRIV ! macro .word 0xc32fe010 ! 583: STXFSR_I st-sfr %f1, [0x0010, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_516 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 516_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_516: wrhpr %g0, 0x941, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe7e7c240 ! 584: CASA_I casa [%r31] 0x12, %r0, %r19 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_517 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_517 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100e0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_517: !! CWQ interrupt (206100e0) goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_517) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,760,*,*,1)') ifelse(7,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_517)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_517: wrhpr %g0, 0x243, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 585: RDPC rd %pc, %r18 cancelint_1_518: rdhpr %halt, %r17 .word 0x85880000 ! 586: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_519 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 519_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_519: wrhpr %g0, 0x80a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7df00 ! 587: CASA_I casa [%r31] 0xf8, %r0, %r17 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_520 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_520 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100b0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_520: !! CWQ interrupt (206100b0) goes to TID 5 ifelse(5,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(5,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_520) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,736,*,*,1)') ifelse(5,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_520)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_520: wrhpr %g0, 0x71b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 588: RDPC rd %pc, %r12 .word 0x89800011 ! 589: WRTICK_R wr %r0, %r17, %tick .word 0x8d903fc2 ! 590: WRPR_PSTATE_I wrpr %r0, 0x1fc2, %pstate br_badelay2_1_523: .word 0x32800001 ! 1: BNE bne,a pdist %f16, %f20, %f16 .word 0x9bb04311 ! 591: ALIGNADDRESS alignaddr %r1, %r17, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_524) , 16, 16)) -> intp(4,0,17,*,760,*,43,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_524)&0xffffffff) , 16, 16)) -> intp(5,0,15,*,752,*,43,1) #else set 0xe7f00b58, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803f6c ! 1: SIR sir 0x1f6c intvec_1_524: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 592: FBPUGE fbuge nop nop mov 0x0, %r18 splash_cmpr_1_525: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 593: SIAM siam 1 memptr_1_526: set 0x60140000, %r31 .word 0x8581a03f ! 594: WRCCR_I wr %r6, 0x003f, %ccr frzptr_1_527: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x00800001 ! 595: BN bn fbn,a,pn %fcc0, skip_1_528 stxa %r14, [%r0] ASI_LSU_CONTROL .word 0xa3b244c4 ! 1: FCMPNE32 fcmpne32 %d40, %d4, %r17 stxa %r17, [%r0] ASI_LSU_CONTROL .align 2048 skip_1_528: .word 0xe5e7dd40 ! 596: CASA_I casa [%r31] 0xea, %r0, %r18 splash_hpstate_1_529: .word 0x3a800001 ! 1: BCC bcc,a .word 0x81982704 ! 597: WRHPR_HPSTATE_I wrhpr %r0, 0x0704, %hpstate .word 0xe527e154 ! 598: STF_I st %f18, [0x0154, %r31] #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_530), 16, 16)) -> intp(mask2tid(0x1),1,3,*,696,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_530)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) xir_1_530: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_530: and %g1, 2, %g1 brnz,a %g1, xirwait_1_530 ldx [%r17], %g1 xir_1_530: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80a935 ! 599: WR_CLEAR_SOFTINT_I wr %r2, 0x0935, %clear_softint nop nop ta T_CHANGE_HPRIV ! macro donret_1_531: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_531-donret_1_531), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00bdfa00 | (0x80 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xcd7, %htstate best_set_reg(0x213, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) ldx [%r11+%r0], %g1 done donretarg_1_531: .word 0xe4ffdd40 ! 600: SWAPA_R swapa %r18, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_532: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_532)+8 , 16, 16)) -> intp(1,0,6,*,640,*,11,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_532)&0xffffffff)+8 , 16, 16)) -> intp(3,0,27,*,920,*,11,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x819825c7 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x05c7, %hpstate .word 0x81b01021 ! 601: SIAM siam 1 nop nop set 0xa7a076e4, %r28 !TTID : 6 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa7a409ca ! 1: FDIVd fdivd %f16, %f10, %f50 intvec_1_533: .word 0x95b504c6 ! 602: FCMPNE32 fcmpne32 %d20, %d6, %r10 splash_hpstate_1_534: .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, .word 0x81983d64 ! 603: WRHPR_HPSTATE_I wrhpr %r0, 0x1d64, %hpstate brnz,pt %r19, skip_1_535 bleu skip_1_535 .align 1024 skip_1_535: .word 0x9f802bfd ! 604: SIR sir 0x0bfd #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_536), 16, 16)) -> intp(mask2tid(0x1),1,3,*,896,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_536)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,968,*,*,1) xir_1_536: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_536: and %g1, 2, %g1 brnz,a %g1, xirwait_1_536 ldx [%r17], %g1 xir_1_536: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82fc72 ! 605: WR_CLEAR_SOFTINT_I wr %r11, 0x1c72, %clear_softint mondo_1_537: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r20, [%r0+0x3e0] %asi stxa %r10, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d924011 ! 606: WRPR_WSTATE_R wrpr %r9, %r17, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_538) , 16, 16)) -> intp(0,0,4,*,896,*,37,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_538)&0xffffffff) , 16, 16)) -> intp(7,0,24,*,1016,*,37,1) #else set 0x89500ccc, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x9f803b51 ! 1: SIR sir 0x1b51 intvec_1_538: .word 0x9f803d93 ! 607: SIR sir 0x1d93 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_539 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_539 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_539: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_539) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,696,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_539)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,744,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_539: wrhpr %g0, 0x699, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 608: RDPC rd %pc, %r17 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_540) , 16, 16)) -> intp(1,0,11,*,688,*,87,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_540)&0xffffffff) , 16, 16)) -> intp(5,0,9,*,1000,*,87,1) #else set 0x4e208cb1, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0xa3b444d2 ! 1: FCMPNE32 fcmpne32 %d48, %d18, %r17 intvec_1_540: .word 0x9f803c24 ! 609: SIR sir 0x1c24 nop nop ta T_CHANGE_HPRIV ! macro donret_1_541: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_541-donret_1_541), %r12 add %r12, 0x4, %r11 ! seq tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00b58700 | (0x4f << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1d5f, %htstate best_set_reg(0x113a, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) done donretarg_1_541: .word 0xd0ffdd40 ! 610: SWAPA_R swapa %r8, [%r31 + %r0] 0xea nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_542 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 542_1 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_542: wrhpr %g0, 0x158, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7df00 ! 611: CASA_I casa [%r31] 0xf8, %r0, %r8 ibp_1_543: nop nop wrhpr %g0, 0xec3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc19fdf00 ! 612: LDDFA_R ldda [%r31, %r0], %f0 .word 0x8d903515 ! 613: WRPR_PSTATE_I wrpr %r0, 0x1515, %pstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_545 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 545_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_545: wrhpr %g0, 0x842, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c280 ! 614: CASA_I casa [%r31] 0x14, %r0, %r8 jmptr_1_546: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 615: JMPL_R jmpl %r27 + %r0, %r27 iaw_1_547: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_547: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_547 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_547: brnz %r16, iaw_wait1_547 ld [%r23], %r16 ba iaw_startwait1_547 mov 0x1, %r16 continue_iaw_1_547: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_547: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_547 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_547: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_547 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_547: mov 0x38, %r18 iaw1_1_547: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xfc2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7a489ac ! 616: FDIVs fdivs %f18, %f12, %f19 .word 0xe737e148 ! 617: STQF_I - %f19, [0x0148, %r31] .word 0x1a780001 ! 618: BPCC ibp_1_548: nop nop wrhpr %g0, 0xd08, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x00800001 ! 619: BN bn iaw_1_549: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_549: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_549 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_549: brnz %r16, iaw_wait1_549 ld [%r23], %r16 ba iaw_startwait1_549 mov 0x1, %r16 continue_iaw_1_549: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_549: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_549 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_549: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_549 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_549: mov 0x38, %r18 iaw3_1_549: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x1cb, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9bb48491 ! 620: FCMPLE32 fcmple32 %d18, %d48, %r13 .word 0x9ba00160 ! 621: FABSq dis not found nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_551 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 551_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_551: wrhpr %g0, 0x2ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c2c0 ! 622: CASA_I casa [%r31] 0x16, %r0, %r13 mondo_1_552: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r3, [%r0+0x3d8] %asi stxa %r2, [%r0+0x3e8] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d918009 ! 623: WRPR_WSTATE_R wrpr %r6, %r9, %wstate intveclr_1_553: nop nop ta T_CHANGE_HPRIV setx 0x43dc87ca743d1e23, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 624: FBPLG fblg,a,pn %fcc0, splash_tba_1_554: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 625: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_555 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 555_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_555: wrhpr %g0, 0x78b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c600 ! 626: CASA_I casa [%r31] 0x30, %r0, %r13 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_556) , 16, 16)) -> intp(2,0,22,*,760,*,35,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_556)&0xffffffff) , 16, 16)) -> intp(3,0,2,*,696,*,35,1) #else set 0x5ac0ead0, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x99a409d2 ! 1: FDIVd fdivd %f16, %f18, %f12 intvec_1_556: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7a309d1 ! 627: FDIVd fdivd %f12, %f48, %f50 mondo_1_557: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r4, [%r0+0x3d0] %asi stxa %r11, [%r0+0x3e8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d950014 ! 628: WRPR_WSTATE_R wrpr %r20, %r20, %wstate .word 0x89800011 ! 629: WRTICK_R wr %r0, %r17, %tick nop nop set 0x2d80dc1d, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa5b084d2 ! 1: FCMPNE32 fcmpne32 %d2, %d18, %r18 intvec_1_559: .word 0x9f802595 ! 630: SIR sir 0x0595 frzptr_1_560: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 631: BN bn,a splash_tba_1_561: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 632: WRPR_TBA_R wrpr %r0, %r12, %tba frzptr_1_562: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 633: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_563 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_563 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_563: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_563) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,640,*,*,1)') ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_563)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_563: wrhpr %g0, 0x298, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 634: RDPC rd %pc, %r19 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_564), 16, 16)) -> intp(mask2tid(0x1),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_564)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,976,*,*,1) xir_1_564: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_564: and %g1, 2, %g1 brnz,a %g1, xirwait_1_564 ldx [%r17], %g1 xir_1_564: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e7bb ! 635: WR_CLEAR_SOFTINT_I wr %r19, 0x07bb, %clear_softint ibp_1_565: nop nop wrhpr %g0, 0x259, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe61fe150 ! 636: LDD_I ldd [%r31 + 0x0150], %r19 iaw_1_566: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_566: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_566 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_566: brnz %r16, iaw_wait1_566 ld [%r23], %r16 ba iaw_startwait1_566 mov 0x1, %r16 continue_iaw_1_566: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_566: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_566 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_566: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_566 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_566: mov 0x38, %r18 iaw4_1_566: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xa42, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99a109ac ! 637: FDIVs fdivs %f4, %f12, %f12 splash_lsu_1_567: nop nop ta T_CHANGE_HPRIV set 0x9a7282e8, %r2 mov 0x1, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x03400001 ! 1: FBPNE fbne stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 638: FBPULE fbule,a,pn %fcc0, brcommon2_1_568: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 ba,a .+8 jmpl %r27-4, %r27 .word 0x20800001 ! 639: BN bn,a nop nop set 0x38d00291, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x95b4c4cb ! 1: FCMPNE32 fcmpne32 %d50, %d42, %r10 intvec_1_569: .word 0x9f803408 ! 640: SIR sir 0x1408 .word 0x91924014 ! 641: WRPR_PIL_R wrpr %r9, %r20, %pil nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_571 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_571 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_571: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_571) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,1000,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_571)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_571: wrhpr %g0, 0x541, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 642: RDPC rd %pc, %r9 .word 0xd33fe08b ! 643: STDF_I std %f9, [0x008b, %r31] .word 0xc19fc3e0 ! 644: LDDFA_R ldda [%r31, %r0], %f0 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_572), 16, 16)) -> intp(mask2tid(0x1),1,3,*,936,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_572)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) xir_1_572: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_572: and %g1, 2, %g1 brnz,a %g1, xirwait_1_572 ldx [%r17], %g1 xir_1_572: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847cf7 ! 645: WR_CLEAR_SOFTINT_I wr %r17, 0x1cf7, %clear_softint .word 0xc19fdb20 ! 646: LDDFA_R ldda [%r31, %r0], %f0 nop nop set 0x17d06968, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x95b244d4 ! 1: FCMPNE32 fcmpne32 %d40, %d20, %r10 intvec_1_573: .word 0x9f802576 ! 647: SIR sir 0x0576 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_574), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_574)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,928,*,*,1) xir_1_574: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_574: and %g1, 2, %g1 brnz,a %g1, xirwait_1_574 ldx [%r17], %g1 xir_1_574: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84fcbf ! 648: WR_CLEAR_SOFTINT_I wr %r19, 0x1cbf, %clear_softint ibp_1_575: nop nop wrhpr %g0, 0x101, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdb1fe140 ! 649: LDDF_I ldd [%r31, 0x0140], %f13 splash_tba_1_576: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 650: WRPR_TBA_R wrpr %r0, %r12, %tba mondo_1_577: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r16, [%r0+0x3d0] %asi stxa %r2, [%r0+0x3e0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d950013 ! 651: WRPR_WSTATE_R wrpr %r20, %r19, %wstate .word 0xda9fdc40 ! 652: LDDA_R ldda [%r31, %r0] 0xe2, %r13 splash_tba_1_579: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 653: WRPR_TBA_R wrpr %r0, %r12, %tba demap_1_580: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r6, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x57 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate wrhpr %g0, 0xb4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe11a ! 654: LDD_I ldd [%r31 + 0x011a], %r13 .word 0x89800011 ! 655: WRTICK_R wr %r0, %r17, %tick mondo_1_582: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3d0] %asi stxa %r11, [%r0+0x3d0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d904011 ! 656: WRPR_WSTATE_R wrpr %r1, %r17, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_583), 16, 16)) -> intp(mask2tid(0x1),1,3,*,984,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_583)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,752,*,*,1) xir_1_583: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_583: and %g1, 2, %g1 brnz,a %g1, xirwait_1_583 ldx [%r17], %g1 xir_1_583: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab82f434 ! 657: WR_CLEAR_SOFTINT_I wr %r11, 0x1434, %clear_softint demap_1_584: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r14, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 wrhpr %g0, 0x1c3, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xda1fe120 ! 658: LDD_I ldd [%r31 + 0x0120], %r13 .word 0xda77c000 ! 659: STX_R stx %r13, [%r31 + %r0] vahole5_1_585: nop nop setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 ta T_CHANGE_NONPRIV .word 0xa9b4c332 ! 660: BMASK bmask %r19, %r18, %r20 dvapa_1_586: nop nop ta T_CHANGE_HPRIV mov 0xa07, %r20 mov 0x3, %r19 sllx %r20, 23, %r20 or %r19, %r20, %r19 stxa %r19, [%g0] ASI_LSU_CONTROL mov 0x38, %r18 stxa %r31, [%r18]0x58 wrhpr %g0, 0xd89, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe09fdd40 ! 661: LDDA_R ldda [%r31, %r0] 0xea, %r16 frzptr_1_587: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe19fc3e0 ! 662: LDDFA_R ldda [%r31, %r0], %f16 frzptr_1_588: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 663: BN bn,a #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_589), 16, 16)) -> intp(mask2tid(0x1),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_589)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,680,*,*,1) xir_1_589: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_589: and %g1, 2, %g1 brnz,a %g1, xirwait_1_589 ldx [%r17], %g1 xir_1_589: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab813a6c ! 664: WR_CLEAR_SOFTINT_I wr %r4, 0x1a6c, %clear_softint .word 0x99703448 ! 665: POPC_I popc 0x1448, %r12 .word 0xd8bfe1a0 ! 666: STDA_I stda %r12, [%r31 + 0x01a0] %asi frzptr_1_590: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfc2c0 ! 667: STDFA_R stda %f0, [%r0, %r31] mondo_1_591: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r12, [%r0+0x3c8] %asi stxa %r19, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d944011 ! 668: WRPR_WSTATE_R wrpr %r17, %r17, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_592 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_592 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_592: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_592) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,704,*,*,1)') ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_592)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,960,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_592: wrhpr %g0, 0x351, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 669: RDPC rd %pc, %r20 pmu_1_593: nop nop ta T_CHANGE_PRIV setx 0xffffffbcffffffa2, %g1, %g7 .word 0xa3800007 ! 670: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f802ec0 ! 671: SIR sir 0x0ec0 mondo_1_594: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r4, [%r0+0x3c8] %asi stxa %r10, [%r0+0x3e8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d908003 ! 672: WRPR_WSTATE_R wrpr %r2, %r3, %wstate jmptr_1_595: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 673: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_596: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x819827c0 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x07c0, %hpstate .word 0x81b01021 ! 674: SIAM siam 1 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_597), 16, 16)) -> intp(mask2tid(0x1),1,3,*,952,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_597)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1000,*,*,1) xir_1_597: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_597: and %g1, 2, %g1 brnz,a %g1, xirwait_1_597 ldx [%r17], %g1 xir_1_597: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab85230f ! 675: WR_CLEAR_SOFTINT_I wr %r20, 0x030f, %clear_softint .word 0xe927e1a4 ! 676: STF_I st %f20, [0x01a4, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_598) , 16, 16)) -> intp(7,0,5,*,896,*,e9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_598)&0xffffffff) , 16, 16)) -> intp(2,0,18,*,744,*,e9,1) #else set 0x7dc08828, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_1_598: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x9f802ea9 ! 677: SIR sir 0x0ea9 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_599 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 599_1 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_599: wrhpr %g0, 0xd99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xdbe7c3c0 ! 678: CASA_I casa [%r31] 0x1e, %r0, %r13 frzptr_1_600: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0xc32fe0d0 ! 1: STXFSR_I st-sfr %f1, [0x00d0, %r31] best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xe1bfde20 ! 679: STDFA_R stda %f16, [%r0, %r31] iaw_1_601: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_601: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_601 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_601: brnz %r16, iaw_wait1_601 ld [%r23], %r16 ba iaw_startwait1_601 mov 0x1, %r16 continue_iaw_1_601: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_601: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_601 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_601: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_601 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_601: mov 0x38, %r18 iaw1_1_601: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x88b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97702217 ! 680: POPC_I popc 0x0217, %r11 nop nop mov 0x0, %r18 splash_cmpr_1_602: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 681: SIAM siam 1 demap_1_603: nop mov 0x80, %g3 ta T_CHANGE_HPRIV stxa %r11, [%r0] ASI_LSU_CONTROL stxa %g3, [%g3] 0x5f .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 wrhpr %g0, 0xb09, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd61fe059 ! 682: LDD_I ldd [%r31 + 0x0059], %r11 nop nop ta T_CHANGE_HPRIV ! macro donret_1_604: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_604-donret_1_604), %r12 add %r12, 0x8, %r11 ! nonseq tnpc andn %r12, %r10, %r12 ! low VA tpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x0027e600 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xe19, %htstate wrhpr %g0, 0xa5a, %hpstate ! rand=1 (1) .word 0x06ca8001 ! 1: BRLZ brlz,pt %r10, retry donretarg_1_604: .word 0xd66fe06c ! 683: LDSTUB_I ldstub %r11, [%r31 + 0x006c] .word 0xd73fe060 ! 684: STDF_I std %f11, [0x0060, %r31] .word 0x91914012 ! 685: WRPR_PIL_R wrpr %r5, %r18, %pil nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_607 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 607_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_607: wrhpr %g0, 0xd51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7c180 ! 686: CASA_I casa [%r31] 0x c, %r0, %r11 .word 0x91b14587 ! 687: FCMPGT32 fcmpgt32 %d36, %d38, %r8 mondo_1_608: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r1, [%r0+0x3e0] %asi stxa %r19, [%r0+0x3e0] %asi .word 0x87802036 ! 1: WRASI_I wr %r0, 0x0036, %asi .word 0x9d950013 ! 688: WRPR_WSTATE_R wrpr %r20, %r19, %wstate cwp_1_609: set user_data_start, %o7 .word 0x93902003 ! 689: WRPR_CWP_I wrpr %r0, 0x0003, %cwp .word 0xd077c000 ! 690: STX_R stx %r8, [%r31 + %r0] .word 0x8d9038a3 ! 691: WRPR_PSTATE_I wrpr %r0, 0x18a3, %pstate .word 0xc1bfe000 ! 692: STDFA_I stda %f0, [0x0000, %r31] .word 0x16800001 ! 1: BGE bge .word 0x8d903d75 ! 693: WRPR_PSTATE_I wrpr %r0, 0x1d75, %pstate nop nop mov 0x1, %r18 splash_cmpr_1_612: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_612)+8 , 16, 16)) -> intp(3,0,17,*,936,*,43,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_612)&0xffffffff)+8 , 16, 16)) -> intp(7,0,20,*,728,*,43,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 694: SIAM siam 1 splash_hpstate_1_613: .word 0x8198369f ! 695: WRHPR_HPSTATE_I wrhpr %r0, 0x169f, %hpstate iaw_1_614: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_614: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_614 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_614: brnz %r16, iaw_wait1_614 ld [%r23], %r16 ba iaw_startwait1_614 mov 0x1, %r16 continue_iaw_1_614: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_614: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_614 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_614: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_614 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_614: mov 0x38, %r18 iaw4_1_614: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x500, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1b08490 ! 696: FCMPLE32 fcmple32 %d2, %d16, %r16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_615 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 615_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_615: wrhpr %g0, 0x519, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d060 ! 697: CASA_I casa [%r31] 0x83, %r0, %r16 brcommon2_1_616: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe100 ! 1: PREFETCH_I prefetch [%r31 + 0x0100], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0x00800001 ! 698: BN bn .word 0xc32fc000 ! 699: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0x95520000 ! 700: RDPR_PIL mondo_1_617: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r19, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3d0] %asi .word 0x87802083 ! 1: WRASI_I wr %r0, 0x0083, %asi .word 0x9d944006 ! 701: WRPR_WSTATE_R wrpr %r17, %r6, %wstate iaw_1_618: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_618: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_618 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_618: brnz %r16, iaw_wait1_618 ld [%r23], %r16 ba iaw_startwait1_618 mov 0x1, %r16 continue_iaw_1_618: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_618: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_618 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_618: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_618 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_618: mov 0x38, %r18 iaw1_1_618: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x6d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc32fc000 ! 702: STXFSR_R st-sfr %f1, [%r0, %r31] .word 0xd48008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 splash_lsu_1_619: nop nop ta T_CHANGE_HPRIV set 0x04b529be, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x2ecc0002 ! 1: BRGEZ brgez,a,pt %r16, stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 704: FBPULE fbule,a,pn %fcc0, intveclr_1_620: nop nop ta T_CHANGE_HPRIV setx 0x7a38bd4918978ccf, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 705: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_1_621: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_621-donret_1_621+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x1, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00766400 | (22 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0xc1d, %htstate wrhpr %g0, 0xc99, %hpstate ! rand=1 (1) .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, done donretarg_1_621: .word 0xd4ffdd40 ! 706: SWAPA_R swapa %r10, [%r31 + %r0] 0xea cwp_1_622: set user_data_start, %o7 .word 0x93902007 ! 707: WRPR_CWP_I wrpr %r0, 0x0007, %cwp .word 0xe1bfde00 ! 708: STDFA_R stda %f16, [%r0, %r31] frzptr_1_623: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 709: BN bn,a intveclr_1_624: nop nop ta T_CHANGE_HPRIV setx 0x4ebbdffced384e86, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x798, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x05400001 ! 710: FBPLG fblg nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_625 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_625 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_625: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_625) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,920,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_625)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_625: wrhpr %g0, 0x88b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 711: RDPC rd %pc, %r16 iaw_1_626: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_626: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_626 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_626: brnz %r16, iaw_wait1_626 ld [%r23], %r16 ba iaw_startwait1_626 mov 0x1, %r16 continue_iaw_1_626: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_626: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_626 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_626: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_626 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_626: mov 0x38, %r18 iaw1_1_626: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc80, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe097c200 ! 712: LDUHA_R lduha [%r31, %r0] 0x10, %r16 splash_lsu_1_627: nop nop ta T_CHANGE_HPRIV set 0x36ae7b4b, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x09400001 ! 1: FBPL fbl stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400002 ! 713: FBPULE fbule,a,pn %fcc0, mondo_1_628: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c8] %asi stxa %r10, [%r0+0x3d0] %asi .word 0x87802080 ! 1: WRASI_I wr %r0, 0x0080, %asi .word 0x9d94c00a ! 714: WRPR_WSTATE_R wrpr %r19, %r10, %wstate .word 0x8d902d50 ! 715: WRPR_PSTATE_I wrpr %r0, 0x0d50, %pstate .word 0x9f802648 ! 716: SIR sir 0x0648 iaw_1_630: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_630: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_630 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_630: brnz %r16, iaw_wait1_630 ld [%r23], %r16 ba iaw_startwait1_630 mov 0x1, %r16 continue_iaw_1_630: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_630: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_630 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_630: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_630 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_630: mov 0x38, %r18 iaw4_1_630: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x3d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c200 ! 717: CASA_I casa [%r31] 0x10, %r0, %r16 nop nop set 0xc0b018cb, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(0,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_631: .word 0x97a4c9cb ! 718: FDIVd fdivd %f50, %f42, %f42 iaw_1_632: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_632: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_632 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_632: brnz %r16, iaw_wait1_632 ld [%r23], %r16 ba iaw_startwait1_632 mov 0x1, %r16 continue_iaw_1_632: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_632: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_632 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_632: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_632 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_632: mov 0x38, %r18 iaw0_1_632: rd %pc, %r19 add %r19, (16+1), %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x1d2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd71fe1e0 ! 719: LDDF_I ldd [%r31, 0x01e0], %f11 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_633 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_633 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_633: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_633) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,944,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_633)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_633: wrhpr %g0, 0x95b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x97414000 ! 720: RDPC rd %pc, %r11 mondo_1_634: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r5, [%r0+0x3e0] %asi stxa %r5, [%r0+0x3c0] %asi .word 0x8780201c ! 1: WRASI_I wr %r0, 0x001c, %asi .word 0x9d920003 ! 721: WRPR_WSTATE_R wrpr %r8, %r3, %wstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_635), 16, 16)) -> intp(mask2tid(0x1),1,3,*,760,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_635)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,752,*,*,1) xir_1_635: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_635: and %g1, 2, %g1 brnz,a %g1, xirwait_1_635 ldx [%r17], %g1 xir_1_635: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80ae41 ! 722: WR_CLEAR_SOFTINT_I wr %r2, 0x0e41, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_636 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1a1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 636_1 is 1a1fff !! MA interrupt goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_636: wrhpr %g0, 0x459, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd7e7d100 ! 723: CASA_I casa [%r31] 0x88, %r0, %r11 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_637 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_637 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_637: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_637) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,920,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_637)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,952,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_637: wrhpr %g0, 0x19a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 724: RDPC rd %pc, %r12 jmptr_1_638: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 725: JMPL_R jmpl %r27 + %r0, %r27 iaw_1_639: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_639: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_639 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_639: brnz %r16, iaw_wait1_639 ld [%r23], %r16 ba iaw_startwait1_639 mov 0x1, %r16 continue_iaw_1_639: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_639: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_639 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_639: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_639 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_639: mov 0x38, %r18 iaw4_1_639: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x55b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc1bfdd40 ! 726: STDFA_R stda %f0, [%r0, %r31] .word 0xd8800bc0 ! 727: LDUWA_R lduwa [%r0, %r0] 0x5e, %r12 nop nop mov 0x1, %r18 splash_cmpr_1_640: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_640)+8 , 16, 16)) -> intp(3,0,26,*,720,*,95,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_640)&0xffffffff)+8 , 16, 16)) -> intp(0,0,3,*,736,*,95,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 728: SIAM siam 1 .word 0x89800011 ! 729: WRTICK_R wr %r0, %r17, %tick nop nop mov 0x1, %r18 splash_cmpr_1_642: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_642)+8 , 16, 16)) -> intp(3,0,8,*,912,*,3d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_642)&0xffffffff)+8 , 16, 16)) -> intp(1,0,22,*,1008,*,3d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 730: SIAM siam 1 cancelint_1_643: rdhpr %halt, %r20 .word 0x85880000 ! 731: ALLCLEAN iaw_1_644: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_644: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_644 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_644: brnz %r16, iaw_wait1_644 ld [%r23], %r16 ba iaw_startwait1_644 mov 0x1, %r16 continue_iaw_1_644: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_644: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_644 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_644: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_644 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_644: mov 0x38, %r18 iaw2_1_644: rdpr %tba, %r19 mov 0x102, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf02, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xf1efe1c0 ! 732: PREFETCHA_I prefetcha [%r31, + 0x01c0] %asi, #24 splash_hpstate_1_645: .word 0x81982e15 ! 733: WRHPR_HPSTATE_I wrhpr %r0, 0x0e15, %hpstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_646) , 16, 16)) -> intp(5,0,0,*,952,*,25,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_646)&0xffffffff) , 16, 16)) -> intp(6,0,17,*,672,*,25,1) #else set 0xbb306813, %r28 !TTID : 0 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_646: .word 0xa9b1c4c8 ! 734: FCMPNE32 fcmpne32 %d38, %d8, %r20 .word 0x91924014 ! 735: WRPR_PIL_R wrpr %r9, %r20, %pil br_longdelay1_1_648: .word 0x0f400001 ! 1: FBPU fbu .word 0x9d97c000 ! 736: WRPR_WSTATE_R wrpr %r31, %r0, %wstate splash_lsu_1_649: nop nop ta T_CHANGE_HPRIV set 0x454b6fbf, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 737: FBPULE fbule,a,pn %fcc0, splash_tba_1_650: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 738: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe19fda60 ! 739: LDDFA_R ldda [%r31, %r0], %f16 .word 0xc19fc2c0 ! 740: LDDFA_R ldda [%r31, %r0], %f0 intveclr_1_651: nop nop ta T_CHANGE_HPRIV setx 0x1ef756bb944d6541, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x05400001 ! 741: FBPLG fblg .word 0xe1bfc3e0 ! 742: STDFA_R stda %f16, [%r0, %r31] .word 0x8d9031a5 ! 743: WRPR_PSTATE_I wrpr %r0, 0x11a5, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_653), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_653)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,960,*,*,1) xir_1_653: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_653: and %g1, 2, %g1 brnz,a %g1, xirwait_1_653 ldx [%r17], %g1 xir_1_653: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84a712 ! 744: WR_CLEAR_SOFTINT_I wr %r18, 0x0712, %clear_softint iaw_1_654: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_654: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_654 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_654: brnz %r16, iaw_wait1_654 ld [%r23], %r16 ba iaw_startwait1_654 mov 0x1, %r16 continue_iaw_1_654: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_654: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_654 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_654: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_654 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_654: mov 0x38, %r18 iaw4_1_654: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xb0a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a509d4 ! 745: FDIVd fdivd %f20, %f20, %f20 iaw_1_655: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_655: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_655 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_655: brnz %r16, iaw_wait1_655 ld [%r23], %r16 ba iaw_startwait1_655 mov 0x1, %r16 continue_iaw_1_655: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_655: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_655 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_655: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_655 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_655: mov 0x38, %r18 iaw4_1_655: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf49, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe89fd060 ! 746: LDDA_R ldda [%r31, %r0] 0x83, %r20 nop nop mov 0x1, %r18 splash_cmpr_1_656: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_656)+8 , 16, 16)) -> intp(4,0,23,*,992,*,75,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_656)&0xffffffff)+8 , 16, 16)) -> intp(7,0,31,*,960,*,75,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 747: SIAM siam 1 .word 0x91916d0a ! 748: WRPR_PIL_I wrpr %r5, 0x0d0a, %pil mondo_1_657: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r20, [%r0+0x3e0] %asi stxa %r7, [%r0+0x3e8] %asi .word 0x87802004 ! 1: WRASI_I wr %r0, 0x0004, %asi .word 0x9d92c013 ! 749: WRPR_WSTATE_R wrpr %r11, %r19, %wstate .word 0x89800011 ! 750: WRTICK_R wr %r0, %r17, %tick nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_659: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983c06 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c06, %hpstate .word 0x81b01021 ! 751: SIAM siam 1 cancelint_1_660: rdhpr %halt, %r17 .word 0x85880000 ! 752: ALLCLEAN .word 0x2a780001 ! 753: BPCS .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl reduce_priv_lvl_1_661: ta T_CHANGE_NONPRIV ! macro frzptr_1_662: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800002 ! 755: BN bn,a jmptr_1_663: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 756: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_664: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81983c5f ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1c5f, %hpstate .word 0x81b01021 ! 757: SIAM siam 1 cancelint_1_665: rdhpr %halt, %r8 .word 0x85880000 ! 758: ALLCLEAN intveclr_1_666: nop nop ta T_CHANGE_HPRIV setx 0x5cf705e4de16d865, %r1, %r28 stxa %r28, [%g0] 0x72 wrhpr %g0, 0x392, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x25400001 ! 759: FBPLG fblg,a,pn %fcc0, mondo_1_667: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r19, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3c0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d94c005 ! 760: WRPR_WSTATE_R wrpr %r19, %r5, %wstate nop nop mov 0x1, %r18 splash_cmpr_1_668: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x280, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_668)+8 , 16, 16)) -> intp(4,0,3,*,928,*,c7,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_668)&0xffffffff)+8 , 16, 16)) -> intp(0,0,20,*,760,*,c7,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 761: SIAM siam 1 vahole6_1_669: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xc32fe0f0 ! 762: STXFSR_I st-sfr %f1, [0x00f0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_670 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 670_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_670: wrhpr %g0, 0x19a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd1e7c720 ! 763: CASA_I casa [%r31] 0x39, %r0, %r8 ibp_1_671: nop nop .word 0xd13fe0a0 ! 764: STDF_I std %f8, [0x00a0, %r31] mondo_1_672: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r12, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3c8] %asi .word 0x87802058 ! 1: WRASI_I wr %r0, 0x0058, %asi .word 0x9d910008 ! 765: WRPR_WSTATE_R wrpr %r4, %r8, %wstate .word 0xd11fe0b0 ! 766: LDDF_I ldd [%r31, 0x00b0], %f8 splash_tba_1_674: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 767: WRPR_TBA_R wrpr %r0, %r12, %tba iaw_1_675: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_675: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_675 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_675: brnz %r16, iaw_wait1_675 ld [%r23], %r16 ba iaw_startwait1_675 mov 0x1, %r16 continue_iaw_1_675: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_675: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_675 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_675: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_675 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_675: mov 0x38, %r18 iaw1_1_675: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x70a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfdb20 ! 768: STDA_R stda %r0, [%r31 + %r0] 0xd9 .word 0x8d903896 ! 769: WRPR_PSTATE_I wrpr %r0, 0x1896, %pstate .word 0xd0bfe128 ! 770: STDA_I stda %r8, [%r31 + 0x0128] %asi .word 0xe1bfe000 ! 771: STDFA_I stda %f16, [0x0000, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_677 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_677 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_677: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_677) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,928,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_677)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,944,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_677: wrhpr %g0, 0xf41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95414000 ! 772: RDPC rd %pc, %r10 br_badelay2_1_678: .word 0xa1a409c7 ! 1: FDIVd fdivd %f16, %f38, %f16 allclean .word 0xa3b50305 ! 773: ALIGNADDRESS alignaddr %r20, %r5, %r17 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_679 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 679_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_679: wrhpr %g0, 0x288, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe3e7c200 ! 774: CASA_I casa [%r31] 0x10, %r0, %r17 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_680), 16, 16)) -> intp(mask2tid(0x1),1,3,*,1016,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_680)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,648,*,*,1) xir_1_680: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_680: and %g1, 2, %g1 brnz,a %g1, xirwait_1_680 ldx [%r17], %g1 xir_1_680: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab822591 ! 775: WR_CLEAR_SOFTINT_I wr %r8, 0x0591, %clear_softint splash_lsu_1_681: nop nop ta T_CHANGE_HPRIV set 0xa3157808, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3c800001 ! 1: BPOS bpos,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 776: FBPULE fbule #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_682), 16, 16)) -> intp(mask2tid(0x1),1,3,*,920,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_682)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,936,*,*,1) xir_1_682: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_682: and %g1, 2, %g1 brnz,a %g1, xirwait_1_682 ldx [%r17], %g1 xir_1_682: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab846468 ! 777: WR_CLEAR_SOFTINT_I wr %r17, 0x0468, %clear_softint nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_683: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_683)+8 , 16, 16)) -> intp(1,0,6,*,752,*,2d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_683)&0xffffffff)+8 , 16, 16)) -> intp(4,0,22,*,744,*,2d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198379c ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x179c, %hpstate .word 0x81b01021 ! 778: SIAM siam 1 ibp_1_684: nop nop .word 0xe3e7c240 ! 779: CASA_I casa [%r31] 0x12, %r0, %r17 .word 0x9f802ea6 ! 780: SIR sir 0x0ea6 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_685), 16, 16)) -> intp(mask2tid(0x1),1,3,*,944,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_685)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,944,*,*,1) xir_1_685: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_685: and %g1, 2, %g1 brnz,a %g1, xirwait_1_685 ldx [%r17], %g1 xir_1_685: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ad5a ! 781: WR_CLEAR_SOFTINT_I wr %r18, 0x0d5a, %clear_softint .word 0xe19fdb40 ! 782: LDDFA_R ldda [%r31, %r0], %f16 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_686) , 16, 16)) -> intp(6,0,6,*,1000,*,5d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_686)&0xffffffff) , 16, 16)) -> intp(0,0,26,*,664,*,5d,1) #else set 0x3950fdbe, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x93a089c3 ! 1: FDIVd fdivd %f2, %f34, %f40 intvec_1_686: .word 0x19400001 ! 783: FBPUGE fbuge .word 0xe1bfdc40 ! 784: STDFA_R stda %f16, [%r0, %r31] brcommon3_1_687: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd737e170 ! 1: STQF_I - %f11, [0x0170, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r19, [%r0] ASI_LSU_CONTROL .word 0xa1aac830 ! 785: FMOVGE fmovs %fcc1, %f16, %f16 nop nop mov 0x1, %r18 splash_cmpr_1_688: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_688)+8 , 16, 16)) -> intp(7,0,7,*,688,*,57,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_688)&0xffffffff)+8 , 16, 16)) -> intp(3,0,11,*,976,*,57,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 786: SIAM siam 1 ibp_1_689: nop nop .word 0xc19fdc40 ! 787: LDDFA_R ldda [%r31, %r0], %f0 .word 0xe027e00d ! 788: STW_I stw %r16, [%r31 + 0x000d] splash_tba_1_690: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 789: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_691 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_691 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_691: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_691) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,896,*,*,1)') ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_691)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_691: wrhpr %g0, 0x219, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 790: RDPC rd %pc, %r9 iaw_1_692: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_692: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_692 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_692: brnz %r16, iaw_wait1_692 ld [%r23], %r16 ba iaw_startwait1_692 mov 0x1, %r16 continue_iaw_1_692: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_692: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_692 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_692: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_692 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_692: mov 0x38, %r18 iaw2_1_692: rdpr %tba, %r19 mov 0x102, %r20 sllx %r20, 5, %r20 add %r20, %r19, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xe82, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x95a209d1 ! 791: FDIVd fdivd %f8, %f48, %f10 .word 0xd477c000 ! 792: STX_R stx %r10, [%r31 + %r0] intveclr_1_693: nop nop ta T_CHANGE_HPRIV setx 0xe3a2b5284fe8c276, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 793: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV ! macro donret_1_694: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_694-donret_1_694+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00f29e00 | (0x82 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1b04, %htstate best_set_reg(0xc4b, %g1, %g2) wrpr %g0, %g2, %pstate ! rand=0 (1) retry .align 2048 donretarg_1_694: .word 0x95a4c9cc ! 794: FDIVd fdivd %f50, %f12, %f10 nop nop set 0xdb401efd, %r28 !TTID : 6 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(6,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_695: .word 0x39400001 ! 795: FBPUGE fbuge,a,pn %fcc0, .word 0xda2fe13c ! 796: STB_I stb %r13, [%r31 + 0x013c] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_696) , 16, 16)) -> intp(6,0,6,*,976,*,cf,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_696)&0xffffffff) , 16, 16)) -> intp(2,0,13,*,944,*,cf,1) #else set 0x12200c18, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x97a189c8 ! 1: FDIVd fdivd %f6, %f8, %f42 intvec_1_696: .word 0xa9a349c3 ! 797: FDIVd fdivd %f44, %f34, %f20 iaw_1_697: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_697: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_697 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_697: brnz %r16, iaw_wait1_697 ld [%r23], %r16 ba iaw_startwait1_697 mov 0x1, %r16 continue_iaw_1_697: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_697: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_697 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_697: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_697 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_697: mov 0x38, %r18 iaw1_1_697: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc9b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x87acca54 ! 798: FCMPd fcmpd %fcc, %f50, %f20 nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_698: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- .word 0x8198348a ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x148a, %hpstate .word 0x81b01021 ! 799: SIAM siam 1 nop nop set 0xc780bb28, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(3,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x95a4c9c9 ! 1: FDIVd fdivd %f50, %f40, %f10 intvec_1_699: .word 0xa1a449d3 ! 800: FDIVd fdivd %f48, %f50, %f16 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_700), 16, 16)) -> intp(mask2tid(0x1),1,3,*,960,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_700)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) xir_1_700: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_700: and %g1, 2, %g1 brnz,a %g1, xirwait_1_700 ldx [%r17], %g1 xir_1_700: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84e3b4 ! 801: WR_CLEAR_SOFTINT_I wr %r19, 0x03b4, %clear_softint .word 0xe1bfdf00 ! 802: STDFA_R stda %f16, [%r0, %r31] cancelint_1_701: rdhpr %halt, %r18 .word 0x85880000 ! 803: ALLCLEAN nop nop mov 0x1, %r18 splash_cmpr_1_702: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_702)+8 , 16, 16)) -> intp(7,0,9,*,728,*,ff,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_702)&0xffffffff)+8 , 16, 16)) -> intp(5,0,27,*,688,*,ff,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 804: SIAM siam 1 splash_hpstate_1_703: ta T_CHANGE_NONHPRIV .word 0x81983c4d ! 805: WRHPR_HPSTATE_I wrhpr %r0, 0x1c4d, %hpstate .word 0x9f803ed8 ! 806: SIR sir 0x1ed8 nop nop mov 0x1, %r18 splash_cmpr_1_704: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0x700, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_704)+8 , 16, 16)) -> intp(7,0,24,*,712,*,d9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_704)&0xffffffff)+8 , 16, 16)) -> intp(5,0,7,*,984,*,d9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 807: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_705 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x21fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 705_1 is 21fff !! MA interrupt goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_705: wrhpr %g0, 0x983, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c380 ! 808: CASA_I casa [%r31] 0x1c, %r0, %r18 pmu_1_706: nop nop setx 0xffffffb0ffffffa7, %g1, %g7 .word 0xa3800007 ! 809: WR_PERF_COUNTER_R wr %r0, %r7, %- frzptr_1_707: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0x20800001 ! 810: BN bn,a frzptr_1_708: nop nop best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 811: BN bn,a nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_709 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_709 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x206100c0, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_709: !! CWQ interrupt (206100c0) goes to TID 6 ifelse(6,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_709) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,752,*,*,1)') ifelse(6,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_709)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_709: wrhpr %g0, 0x8c2, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 812: RDPC rd %pc, %r17 pmu_1_710: nop nop setx 0xffffffb4ffffffa5, %g1, %g7 .word 0xa3800007 ! 813: WR_PERF_COUNTER_R wr %r0, %r7, %- nop nop set 0x6fd0c7f4, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(7,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_711: .word 0x99b504cc ! 814: FCMPNE32 fcmpne32 %d20, %d12, %r12 splash_hpstate_1_712: .word 0x81983f15 ! 815: WRHPR_HPSTATE_I wrhpr %r0, 0x1f15, %hpstate nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_713 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 713_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_713: wrhpr %g0, 0x449, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7c6c0 ! 816: CASA_I casa [%r31] 0x36, %r0, %r12 brcommon3_1_714: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xd9e7c6c0 ! 1: CASA_I casa [%r31] 0x36, %r0, %r12 ba,a .+8 jmpl %r27+0, %r27 .word 0x81983793 ! 817: WRHPR_HPSTATE_I wrhpr %r0, 0x1793, %hpstate .word 0x91944013 ! 818: WRPR_PIL_R wrpr %r17, %r19, %pil mondo_1_716: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi stxa %r20, [%r0+0x3e0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d950013 ! 819: WRPR_WSTATE_R wrpr %r20, %r19, %wstate nop nop mov 0x1, %r18 splash_cmpr_1_717: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_717)+8 , 16, 16)) -> intp(0,0,18,*,984,*,df,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_717)&0xffffffff)+8 , 16, 16)) -> intp(5,0,3,*,672,*,df,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 820: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_718 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_718 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610020, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_718: !! CWQ interrupt (20610020) goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_718) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,896,*,*,1)') ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_718)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_718: wrhpr %g0, 0x681, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 821: RDPC rd %pc, %r16 nop nop set 0x14408a33, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(2,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, intvec_1_719: .word 0xa9a509d0 ! 822: FDIVd fdivd %f20, %f16, %f20 splash_lsu_1_720: nop nop ta T_CHANGE_HPRIV set 0x949c8435, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 823: FBPULE fbule .word 0x9f8037f9 ! 824: SIR sir 0x17f9 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_721 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_721 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_721: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_721) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,1000,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_721)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,680,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_721: wrhpr %g0, 0x50b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9414000 ! 825: RDPC rd %pc, %r20 iaw_1_722: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_722: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_722 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_722: brnz %r16, iaw_wait1_722 ld [%r23], %r16 ba iaw_startwait1_722 mov 0x1, %r16 continue_iaw_1_722: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_722: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_722 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_722: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_722 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_722: mov 0x38, %r18 iaw1_1_722: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xfc8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe8dfc180 ! 826: LDXA_R ldxa [%r31, %r0] 0x0c, %r20 br_badelay3_1_723: .word 0x34800001 ! 1: BG bg,a .word 0x02800001 ! 1: BE be .word 0xd714400a ! 1: LDQF_R - [%r17, %r10], %f11 .word 0xa9a20834 ! 827: FADDs fadds %f8, %f20, %f20 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_724) , 16, 16)) -> intp(6,0,27,*,896,*,9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_724)&0xffffffff) , 16, 16)) -> intp(6,0,23,*,656,*,9,1) #else set 0x1250a71e, %r28 !TTID : 7 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_724: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0xa7b1c4d2 ! 828: FCMPNE32 fcmpne32 %d38, %d18, %r19 nop nop set 0x41d02c77, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0xa9a409d1 ! 1: FDIVd fdivd %f16, %f48, %f20 intvec_1_725: .word 0xa1a249c6 ! 829: FDIVd fdivd %f40, %f6, %f16 .word 0x91940013 ! 830: WRPR_PIL_R wrpr %r16, %r19, %pil jmptr_1_727: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 831: JMPL_R jmpl %r27 + %r0, %r27 .word 0x08800001 ! 1: BLEU bleu .word 0x8d903fd7 ! 832: WRPR_PSTATE_I wrpr %r0, 0x1fd7, %pstate mondo_1_729: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r16, [%r0+0x3e0] %asi stxa %r16, [%r0+0x3c8] %asi .word 0x87802039 ! 1: WRASI_I wr %r0, 0x0039, %asi .word 0x9d908013 ! 833: WRPR_WSTATE_R wrpr %r2, %r19, %wstate ibp_1_730: nop nop .word 0x87a94a4a ! 834: FCMPd fcmpd %fcc, %f36, %f10 cwp_1_731: set user_data_start, %o7 .word 0x93902004 ! 835: WRPR_CWP_I wrpr %r0, 0x0004, %cwp jmptr_1_732: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 836: JMPL_R jmpl %r27 + %r0, %r27 mondo_1_733: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r2, [%r0+0x3e8] %asi stxa %r11, [%r0+0x3e8] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d94c010 ! 837: WRPR_WSTATE_R wrpr %r19, %r16, %wstate #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_734) , 16, 16)) -> intp(1,0,19,*,696,*,3d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_734)&0xffffffff) , 16, 16)) -> intp(7,0,6,*,936,*,3d,1) #else set 0x5440f399, %r28 !TTID : 3 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_734: .word 0xa9a209c1 ! 838: FDIVd fdivd %f8, %f32, %f20 brcommon3_1_735: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-4] ! Load common dest into dcache .. ba,a .+12 .word 0xe937c000 ! 1: STQF_R - %f20, [%r0, %r31] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d9023e5 ! 839: WRPR_PSTATE_I wrpr %r0, 0x03e5, %pstate mondo_1_736: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r1, [%r0+0x3e0] %asi stxa %r17, [%r0+0x3e8] %asi .word 0x87802030 ! 1: WRASI_I wr %r0, 0x0030, %asi .word 0x9d91c005 ! 840: WRPR_WSTATE_R wrpr %r7, %r5, %wstate nop nop set 0x7390918c, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 intvec_1_737: .word 0xa7b404c5 ! 841: FCMPNE32 fcmpne32 %d16, %d36, %r19 splash_lsu_1_738: nop nop ta T_CHANGE_HPRIV set 0x68ac6587, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x3d400001 ! 842: FBPULE fbule,a,pn %fcc0, mondo_1_739: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r11, [%r0+0x3d8] %asi stxa %r7, [%r0+0x3e0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d944004 ! 843: WRPR_WSTATE_R wrpr %r17, %r4, %wstate .word 0x0ec90001 ! 1: BRGEZ brgez,pt %r4, .word 0x8d9035d5 ! 844: WRPR_PSTATE_I wrpr %r0, 0x15d5, %pstate nop nop set 0x20300c0e, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x93b444d4 ! 1: FCMPNE32 fcmpne32 %d48, %d20, %r9 intvec_1_741: .word 0x99b044c4 ! 845: FCMPNE32 fcmpne32 %d32, %d4, %r12 mondo_1_742: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r10, [%r0+0x3e8] %asi stxa %r7, [%r0+0x3d0] %asi .word 0x8780208a ! 1: WRASI_I wr %r0, 0x008a, %asi .word 0x9d94c002 ! 846: WRPR_WSTATE_R wrpr %r19, %r2, %wstate trapasi_1_743: nop mov 0x10, %r1 ! (VA for ASI 0x48) .word 0xd8d84900 ! 847: LDXA_R ldxa [%r1, %r0] 0x48, %r12 .word 0xc32fc000 ! 848: STXFSR_R st-sfr %f1, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_744 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_744 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_744: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_744) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,656,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_744)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,1008,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_744: wrhpr %g0, 0x602, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa5414000 ! 849: RDPC rd %pc, %r18 mondo_1_745: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r17, [%r0+0x3c8] %asi stxa %r7, [%r0+0x3d0] %asi .word 0x8780204f ! 1: WRASI_I wr %r0, 0x004f, %asi .word 0x9d940013 ! 850: WRPR_WSTATE_R wrpr %r16, %r19, %wstate iaw_1_746: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_746: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_746 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_746: brnz %r16, iaw_wait1_746 ld [%r23], %r16 ba iaw_startwait1_746 mov 0x1, %r16 continue_iaw_1_746: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_746: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_746 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_746: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_746 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_746: mov 0x38, %r18 iaw1_1_746: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x142, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdc40 ! 851: STDA_R stda %r16, [%r31 + %r0] 0xe2 nop nop mov 0x1, %r18 splash_cmpr_1_747: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_747)+8 , 16, 16)) -> intp(7,0,16,*,1016,*,2b,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_747)&0xffffffff)+8 , 16, 16)) -> intp(7,0,23,*,672,*,2b,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 852: SIAM siam 1 memptr_1_748: set 0x60540000, %r31 .word 0x8584ef81 ! 853: WRCCR_I wr %r19, 0x0f81, %ccr nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_749 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x121fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 749_1 is 121fff !! MA interrupt goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_749: wrhpr %g0, 0xb59, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c400 ! 854: CASA_I casa [%r31] 0x20, %r0, %r18 .word 0x91942257 ! 855: WRPR_PIL_I wrpr %r16, 0x0257, %pil #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_750) , 16, 16)) -> intp(7,0,2,*,704,*,33,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_750)&0xffffffff) , 16, 16)) -> intp(5,0,28,*,936,*,33,1) #else set 0x9e50a9f1, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif intvec_1_750: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x93a409cb ! 856: FDIVd fdivd %f16, %f42, %f40 nop nop set 0x88d0093b, %r28 !TTID : 1 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(1,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9ba089c8 ! 1: FDIVd fdivd %f2, %f8, %f44 intvec_1_751: .word 0xa9a449d4 ! 857: FDIVd fdivd %f48, %f20, %f20 cancelint_1_752: rdhpr %halt, %r18 .word 0x85880000 ! 858: ALLCLEAN nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_753 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_753 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610010, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_753: !! CWQ interrupt (20610010) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_753) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,752,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_753)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,728,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_753: wrhpr %g0, 0xd98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa7414000 ! 859: RDPC rd %pc, %r19 #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_754) , 16, 16)) -> intp(5,0,6,*,672,*,53,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_754)&0xffffffff) , 16, 16)) -> intp(0,0,28,*,912,*,53,1) #else set 0xc6203a1f, %r28 !TTID : 2 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x91a449c1 ! 1: FDIVd fdivd %f48, %f32, %f8 intvec_1_754: #if (defined SPC || defined CMP1) wrhpr %g0, 0x0, %halt ! HALT #else ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #endif .word 0x19400001 ! 860: FBPUGE fbuge brcommon3_1_755: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xe46fe160 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0160] ba,a .+8 jmpl %r27+0, %r27 .word 0x8d902bc7 ! 861: WRPR_PSTATE_I wrpr %r0, 0x0bc7, %pstate nop nop ta T_CHANGE_HPRIV mov 0x0, %r18 splash_cmpr_1_756: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81982e58 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x0e58, %hpstate .word 0x81b01021 ! 862: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_757 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 757_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_757: wrhpr %g0, 0xb48, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe5e7c6c0 ! 863: CASA_I casa [%r31] 0x36, %r0, %r18 .word 0x879021a7 ! 864: WRPR_TT_I wrpr %r0, 0x01a7, %tt trapasi_1_758: nop mov 0x28, %r1 ! (VA for ASI 0x4c) .word 0xe4d84980 ! 865: LDXA_R ldxa [%r1, %r0] 0x4c, %r18 splash_lsu_1_759: nop nop ta T_CHANGE_HPRIV set 0xd80469da, %r2 mov 0x4, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400001 ! 866: FBPULE fbule .word 0xe477e0aa ! 867: STX_I stx %r18, [%r31 + 0x00aa] br_badelay2_1_760: .word 0xa7a409cc ! 1: FDIVd fdivd %f16, %f12, %f50 pdist %f16, %f0, %f0 .word 0x95b20303 ! 868: ALIGNADDRESS alignaddr %r8, %r3, %r10 intveclr_1_761: nop nop ta T_CHANGE_HPRIV setx 0xba3013620006a58c, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 869: FBPLG fblg,a,pn %fcc0, iaw_1_762: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_762: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_762 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_762: brnz %r16, iaw_wait1_762 ld [%r23], %r16 ba iaw_startwait1_762 mov 0x1, %r16 continue_iaw_1_762: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_762: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_762 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_762: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_762 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_762: mov 0x38, %r18 iaw1_1_762: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x251, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd497c380 ! 870: LDUHA_R lduha [%r31, %r0] 0x1c, %r10 iaw_1_763: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_763: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_763 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_763: brnz %r16, iaw_wait1_763 ld [%r23], %r16 ba iaw_startwait1_763 mov 0x1, %r16 continue_iaw_1_763: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_763: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_763 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_763: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_763 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_763: mov 0x38, %r18 iaw1_1_763: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xf98, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xc0bfde20 ! 871: STDA_R stda %r0, [%r31 + %r0] 0xf1 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_764 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_764 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610000, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_764: !! CWQ interrupt (20610000) goes to TID 0 ifelse(0,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_764) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,984,*,*,1)') ifelse(0,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_764)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,712,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_764: wrhpr %g0, 0x190, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99414000 ! 872: RDPC rd %pc, %r12 .word 0xc32fe160 ! 873: STXFSR_I st-sfr %f1, [0x0160, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_766 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 766_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_766: wrhpr %g0, 0x8d8, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7dd40 ! 874: CASA_I casa [%r31] 0xea, %r0, %r12 nop nop set 0x26005ca0, %r28 !TTID : 4 (mask2tid(0x1)) #if (MAX_THREADS == 8) sethi %hi(0x3f800), %r27 #else sethi %hi(0x30000), %r27 #endif andn %r28, %r27, %r28 ta T_CHANGE_HPRIV ifelse(4,mask2tid(0x1),`.align 16') stxa %r28, [%g0] 0x73 .word 0x9f80375b ! 1: SIR sir 0x175b intvec_1_767: .word 0x9ba089c8 ! 875: FDIVd fdivd %f2, %f8, %f44 brcommon1_1_768: nop nop setx common_target, %r12, %r27 lduw [%r27-0], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xc32fe0b0 ! 1: STXFSR_I st-sfr %f1, [0x00b0, %r31] ba,a .+8 jmpl %r27-0, %r27 .word 0xa3a049d1 ! 876: FDIVd fdivd %f32, %f48, %f48 frzptr_1_769: nop nop best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27, %r27 .word 0xe1bfdb40 ! 877: STDFA_R stda %f16, [%r0, %r31] brcommon2_1_770: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xf16fe050 ! 1: PREFETCH_I prefetch [%r31 + 0x0050], #24 ba,a .+8 jmpl %r27-0, %r27 .word 0xe19fdb20 ! 878: LDDFA_R ldda [%r31, %r0], %f16 iaw_1_771: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_771: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_771 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_771: brnz %r16, iaw_wait1_771 ld [%r23], %r16 ba iaw_startwait1_771 mov 0x1, %r16 continue_iaw_1_771: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_771: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_771 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_771: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_771 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_771: mov 0x38, %r18 iaw1_1_771: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x253, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9702ca7 ! 879: POPC_I popc 0x0ca7, %r20 brcommon1_1_772: nop nop setx common_target, %r12, %r27 lduw [%r27-4], %r12 ! Load common dest into dcache .. stuw %r12, [%r27-0] ! Load common dest into dcache .. ba,a .+12 .word 0xa9a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f20 ba,a .+8 jmpl %r27-4, %r27 .word 0x91b447d4 ! 880: PDIST pdistn %d48, %d20, %d8 iaw_1_773: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_773: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_773 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_773: brnz %r16, iaw_wait1_773 ld [%r23], %r16 ba iaw_startwait1_773 mov 0x1, %r16 continue_iaw_1_773: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_773: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_773 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_773: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_773 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_773: mov 0x38, %r18 iaw3_1_773: setx vahole_target1, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc41, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1bfda60 ! 881: STDFA_R stda %f16, [%r0, %r31] splash_tba_1_774: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 882: WRPR_TBA_R wrpr %r0, %r12, %tba pmu_1_775: nop nop ta T_CHANGE_PRIV setx 0xffffffb6ffffffa6, %g1, %g7 .word 0xa3800007 ! 883: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x32800001 ! 1: BNE bne,a .word 0x8d90328d ! 884: WRPR_PSTATE_I wrpr %r0, 0x128d, %pstate #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_777), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_777)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,664,*,*,1) xir_1_777: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_777: and %g1, 2, %g1 brnz,a %g1, xirwait_1_777 ldx [%r17], %g1 xir_1_777: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab80eb3f ! 885: WR_CLEAR_SOFTINT_I wr %r3, 0x0b3f, %clear_softint .word 0xd037e0b7 ! 886: STH_I sth %r8, [%r31 + 0x00b7] .word 0xc19fe0c0 ! 887: LDDFA_I ldda [%r31, 0x00c0], %f0 splash_lsu_1_778: nop nop ta T_CHANGE_HPRIV set 0xcddf2b35, %r2 mov 0x6, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x0f400001 ! 1: FBPU fbu stxa %r2, [%r0] ASI_LSU_CONTROL ta T_CHANGE_NONHPRIV .word 0x1d400001 ! 888: FBPULE fbule brcommon2_1_779: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0x91a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f8 ba,a .+8 jmpl %r27-4, %r27 .word 0x00800002 ! 889: BN bn mondo_1_780: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r8, [%r0+0x3e8] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802016 ! 1: WRASI_I wr %r0, 0x0016, %asi .word 0x9d914014 ! 890: WRPR_WSTATE_R wrpr %r5, %r20, %wstate nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_781 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_781 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_781: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_781) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,896,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_781)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,904,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_781: wrhpr %g0, 0xd58, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 891: RDPC rd %pc, %r9 fbug skip_1_782 stxa %r17, [%r0] ASI_LSU_CONTROL brlez,a,pn %r7, skip_1_782 stxa %r19, [%r0] ASI_LSU_CONTROL .align 128 skip_1_782: .word 0xf16fe1ab ! 892: PREFETCH_I prefetch [%r31 + 0x01ab], #24 intveclr_1_783: nop nop ta T_CHANGE_HPRIV setx 0x0858a885264cd49f, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 893: FBPLG fblg,a,pn %fcc0, jmptr_1_784: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 894: JMPL_R jmpl %r27 + %r0, %r27 cwp_1_785: set user_data_start, %o7 .word 0x93902006 ! 895: WRPR_CWP_I wrpr %r0, 0x0006, %cwp vahole6_1_786: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0x93b7c7c0 ! 896: PDIST pdistn %d62, %d0, %d40 pmu_1_787: nop nop setx 0xffffffb7ffffffa9, %g1, %g7 .word 0xa3800007 ! 897: WR_PERF_COUNTER_R wr %r0, %r7, %- vahole2_1_788: nop nop ta T_CHANGE_NONHPRIV setx vahole_target3, %r18, %r27 jmpl %r27+0, %r27 .word 0xc19fdd40 ! 898: LDDFA_R ldda [%r31, %r0], %f0 mondo_1_789: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r13, [%r0+0x3d0] %asi stxa %r17, [%r0+0x3c0] %asi .word 0x87802010 ! 1: WRASI_I wr %r0, 0x0010, %asi .word 0x9d910014 ! 899: WRPR_WSTATE_R wrpr %r4, %r20, %wstate mondo_1_790: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r7, [%r0+0x3c8] %asi stxa %r17, [%r0+0x3c8] %asi .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi .word 0x9d950012 ! 900: WRPR_WSTATE_R wrpr %r20, %r18, %wstate mondo_1_791: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi stxa %r8, [%r0+0x3e0] %asi stxa %r3, [%r0+0x3e0] %asi .word 0x87802055 ! 1: WRASI_I wr %r0, 0x0055, %asi .word 0x9d92c00d ! 901: WRPR_WSTATE_R wrpr %r11, %r13, %wstate nop nop mov 0x1, %r18 splash_cmpr_1_792: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0x900, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_792)+8 , 16, 16)) -> intp(4,0,20,*,976,*,43,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_792)&0xffffffff)+8 , 16, 16)) -> intp(0,0,18,*,976,*,43,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 902: SIAM siam 1 nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_793: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x700, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x100, %r17 #else add %r17, 0x280, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_793)+8 , 16, 16)) -> intp(0,0,20,*,640,*,9f,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_793)&0xffffffff)+8 , 16, 16)) -> intp(3,0,2,*,944,*,9f,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x8198374d ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x174d, %hpstate .word 0x81b01021 ! 903: SIAM siam 1 brcommon3_1_794: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xd337e0a0 ! 1: STQF_I - %f9, [0x00a0, %r31] ba,a .+8 jmpl %r27+0, %r27 stxa %r17, [%r0] ASI_LSU_CONTROL .word 0xa1aac831 ! 904: FMOVGE fmovs %fcc1, %f17, %f16 cancelint_1_795: rdhpr %halt, %r12 .word 0x85880000 ! 905: ALLCLEAN pmu_1_796: nop nop setx 0xffffffb1ffffffaa, %g1, %g7 .word 0xa3800007 ! 906: WR_PERF_COUNTER_R wr %r0, %r7, %- intveclr_1_797: nop nop ta T_CHANGE_HPRIV setx 0x4e0ae2333978ee06, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400002 ! 907: FBPLG fblg,a,pn %fcc0, nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_798 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0x1e1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 798_1 is 1e1fff !! MA interrupt goes to TID 7 ifelse(7,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_798: wrhpr %g0, 0x690, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7d920 ! 908: CASA_I casa [%r31] 0xc9, %r0, %r12 ibp_1_799: nop nop .word 0xa9b0c488 ! 909: FCMPLE32 fcmple32 %d34, %d8, %r20 ibp_1_800: nop nop .word 0xe9e7c540 ! 910: CASA_I casa [%r31] 0x2a, %r0, %r20 .word 0xe83fc000 ! 911: STD_R std %r20, [%r31 + %r0] iaw_1_801: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_801: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_801 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_801: brnz %r16, iaw_wait1_801 ld [%r23], %r16 ba iaw_startwait1_801 mov 0x1, %r16 continue_iaw_1_801: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_801: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_801 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_801: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_801 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_801: mov 0x38, %r18 iaw1_1_801: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xb4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfdc00 ! 912: STDA_R stda %r16, [%r31 + %r0] 0xe0 brcommon3_1_802: nop nop setx common_target, %r12, %r27 lduw [%r27], %r12 ! Load common dest into dcache .. stuw %r12, [%r27] ! Load common dest into dcache .. ba,a .+12 .word 0xe86fe1f0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x01f0] ba,a .+8 jmpl %r27+0, %r27 stxa %r7, [%r0] ASI_LSU_CONTROL .word 0x91aac832 ! 913: FMOVGE fmovs %fcc1, %f18, %f8 cancelint_1_803: rdhpr %halt, %r18 .word 0x85880000 ! 914: ALLCLEAN splash_hpstate_1_804: .word 0x24800001 ! 1: BLE ble,a .word 0x81982183 ! 915: WRHPR_HPSTATE_I wrhpr %r0, 0x0183, %hpstate jmptr_1_805: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 916: JMPL_R jmpl %r27 + %r0, %r27 ibp_1_806: nop nop .word 0x91a409c2 ! 917: FDIVd fdivd %f16, %f2, %f8 iaw_1_807: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_807: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_807 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_807: brnz %r16, iaw_wait1_807 ld [%r23], %r16 ba iaw_startwait1_807 mov 0x1, %r16 continue_iaw_1_807: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_807: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_807 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_807: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_807 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_807: mov 0x38, %r18 iaw4_1_807: setx common_target, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x99, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd09fdd40 ! 918: LDDA_R ldda [%r31, %r0] 0xea, %r8 #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_808), 16, 16)) -> intp(mask2tid(0x1),1,3,*,904,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_808)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,656,*,*,1) xir_1_808: wrhpr %g0, 0x0, %halt ! HALT #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_808: and %g1, 2, %g1 brnz,a %g1, xirwait_1_808 ldx [%r17], %g1 xir_1_808: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab847f11 ! 919: WR_CLEAR_SOFTINT_I wr %r17, 0x1f11, %clear_softint .word 0x9f802715 ! 920: SIR sir 0x0715 jmptr_1_809: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 921: JMPL_R jmpl %r27 + %r0, %r27 splash_tba_1_810: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 922: WRPR_TBA_R wrpr %r0, %r12, %tba splash_hpstate_1_811: .word 0x8198376d ! 923: WRHPR_HPSTATE_I wrhpr %r0, 0x176d, %hpstate ibp_1_812: nop nop .word 0xe19fdf20 ! 924: LDDFA_R ldda [%r31, %r0], %f16 frzptr_1_813: nop nop best_set_reg(0x3cb00000+0x1ffc, %r20, %r27) jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cb40000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0xc1bfdb20 ! 925: STDFA_R stda %f0, [%r0, %r31] jmptr_1_814: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 926: JMPL_R jmpl %r27 + %r0, %r27 splash_hpstate_1_815: .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, .word 0x81983ec9 ! 927: WRHPR_HPSTATE_I wrhpr %r0, 0x1ec9, %hpstate memptr_1_816: set user_data_start, %r31 .word 0x8582af77 ! 928: WRCCR_I wr %r10, 0x0f77, %ccr nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_817 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_817 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610080, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_817: !! CWQ interrupt (20610080) goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_817) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,944,*,*,1)') ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_817)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,696,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_817: wrhpr %g0, 0xe8a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x93414000 ! 929: RDPC rd %pc, %r9 iaw_1_818: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_818: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_818 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_818: brnz %r16, iaw_wait1_818 ld [%r23], %r16 ba iaw_startwait1_818 mov 0x1, %r16 continue_iaw_1_818: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_818: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_818 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_818: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_818 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_818: mov 0x38, %r18 iaw1_1_818: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0xc88, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe0bfc3e0 ! 930: STDA_R stda %r16, [%r31 + %r0] 0x1f nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_819 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_819 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610060, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_819: !! CWQ interrupt (20610060) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_819) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,752,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_819)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,680,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_819: wrhpr %g0, 0x213, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9b414000 ! 931: RDPC rd %pc, %r13 br_badelay1_1_820: .word 0x9ba7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f44 .word 0xe332e2df ! 1: STQF_I - %f17, [0x02df, %r11] .word 0xe3e7c540 ! 1: CASA_I casa [%r31] 0x2a, %r0, %r17 normalw .word 0xa1458000 ! 932: RD_SOFTINT_REG rd %softint, %r16 fpinit_1_821: nop setx fp_data_quads, %r19, %r20 ldd [%r20], %f0 ldd [%r20+8], %f4 ld [%r20+16], %fsr ld [%r20+24], %r19 wr %r19, %g0, %gsr .word 0x8db00484 ! 933: FCMPLE32 fcmple32 %d0, %d4, %r6 .word 0x8d903025 ! 934: WRPR_PSTATE_I wrpr %r0, 0x1025, %pstate mondo_1_823: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r9, [%r0+0x3c0] %asi stxa %r19, [%r0+0x3c0] %asi .word 0x87802020 ! 1: WRASI_I wr %r0, 0x0020, %asi .word 0x9d948009 ! 935: WRPR_WSTATE_R wrpr %r18, %r9, %wstate .word 0x08780001 ! 936: BPLEU change_to_randtl_1_824: ta T_CHANGE_PRIV ! macro done_change_to_randtl_1_824: .word 0x8f902001 ! 937: WRPR_TL_I wrpr %r0, 0x0001, %tl splash_tba_1_825: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 938: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_HPRIV mov 0x1, %r18 splash_cmpr_1_826: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x501, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 wrhpr %r17, %g0, %hsys_tick_cmpr wrhpr %g0, 0x0, %halt ! HALT ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x700, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_826)+8 , 16, 16)) -> intp(6,0,31,*,960,*,e9,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_826)&0xffffffff)+8 , 16, 16)) -> intp(3,0,4,*,904,*,e9,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81983f45 ! 1: WRHPR_HPSTATE_I wrhpr %r0, 0x1f45, %hpstate .word 0x81b01021 ! 939: SIAM siam 1 splash_tba_1_827: nop ta T_CHANGE_PRIV setx 0x0000000000380000, %r11, %r12 .word 0x8b90000c ! 940: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe077e0c4 ! 941: STX_I stx %r16, [%r31 + 0x00c4] br_badelay1_1_828: .word 0x0d400001 ! 1: FBPG fbg .word 0x19400001 ! 1: FBPUGE fbuge .word 0xe1e7d040 ! 1: CASA_I casa [%r31] 0x82, %r0, %r16 normalw .word 0xa1458000 ! 942: RD_SOFTINT_REG rd %softint, %r16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_829 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xe1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 829_1 is e1fff !! MA interrupt goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_829: wrhpr %g0, 0x183, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7d140 ! 943: CASA_I casa [%r31] 0x8a, %r0, %r16 .word 0xc32fc000 ! 944: STXFSR_R st-sfr %f1, [%r0, %r31] splash_tba_1_830: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 945: WRPR_TBA_R wrpr %r0, %r12, %tba .word 0xe01fe0a0 ! 946: LDD_I ldd [%r31 + 0x00a0], %r16 nop nop ta T_CHANGE_HPRIV mov 0x1, %r10 set sync_thr_counter6, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 #endif cas [%r23],%g0,%r10 !lock brnz %r10, sma_1_832 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 set 0xa1fff, %l7 stxa %l7, [%g0 + 0x80] %asi !! RV_SMA for 832_1 is a1fff !! MA interrupt goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') wr %r12, %g0, %asi st %g0, [%r23] sma_1_832: wrhpr %g0, 0x149, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe1e7c180 ! 947: CASA_I casa [%r31] 0x c, %r0, %r16 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_833 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_833 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610090, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_833: !! CWQ interrupt (20610090) goes to TID 4 ifelse(4,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_833) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,760,*,*,1)') ifelse(4,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_833)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,672,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_833: wrhpr %g0, 0xc43, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa3414000 ! 948: RDPC rd %pc, %r17 .word 0xe337c000 ! 949: STQF_R - %f17, [%r0, %r31] .word 0xe337c000 ! 950: STQF_R - %f17, [%r0, %r31] #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_834) , 16, 16)) -> intp(3,0,15,*,656,*,e1,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_834)&0xffffffff) , 16, 16)) -> intp(3,0,19,*,640,*,e1,1) #else set 0xbf90ede7, %r28 !TTID : 5 (mask2tid(0x1)) #if (MAX_THREADS == 8) and %r28, 0x7ff, %r28 #endif stxa %r28, [%g0] 0x73 #endif .word 0x19400001 ! 1: FBPUGE fbuge intvec_1_834: .word 0x93a409c1 ! 951: FDIVd fdivd %f16, %f32, %f40 splash_tba_1_835: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 952: WRPR_TBA_R wrpr %r0, %r12, %tba #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_836), 16, 16)) -> intp(mask2tid(0x1),1,3,*,928,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_836)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,712,*,*,1) xir_1_836: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_836: and %g1, 2, %g1 brnz,a %g1, xirwait_1_836 ldx [%r17], %g1 xir_1_836: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab84ea8b ! 953: WR_CLEAR_SOFTINT_I wr %r19, 0x0a8b, %clear_softint #if (defined SPC || defined CMP) !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_837), 16, 16)) -> intp(mask2tid(0x1),1,3,*,744,*,*,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_837)&0xffffffff), 16, 16)) -> intp(mask2tid(0x1),1,3,*,736,*,*,1) xir_1_837: #else #if (defined FC) !! Generate XIR via RESET_GEN register ta T_CHANGE_HPRIV rdpr %pstate, %r18 andn %r18, 0x208, %r18 ! Reset pstate.am,cle wrpr %r18, %pstate #ifndef XIR_RND_CORES ldxa [%g0] 0x63, %o1 mov 1, %r18 sllx %r18, %o1, %r18 #endif mov 0x30, %r19 setx 0x8900000808, %r16, %r17 mov 0x2, %r16 !! Poll RESET gen to see if no XIRs pending ldx [%r17], %g1 xirwait_1_837: and %g1, 2, %g1 brnz,a %g1, xirwait_1_837 ldx [%r17], %g1 xir_1_837: stxa %r18, [%r19] 0x41 stx %r16, [%r17] #endif #endif .word 0xab853309 ! 954: WR_CLEAR_SOFTINT_I wr %r20, 0x1309, %clear_softint mondo_1_838: nop nop .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi ta T_CHANGE_PRIV stxa %r6, [%r0+0x3c0] %asi stxa %r17, [%r0+0x3e0] %asi .word 0x87802082 ! 1: WRASI_I wr %r0, 0x0082, %asi .word 0x9d944012 ! 955: WRPR_WSTATE_R wrpr %r17, %r18, %wstate pmu_1_839: nop nop setx 0xffffffb3ffffffa2, %g1, %g7 .word 0xa3800007 ! 956: WR_PERF_COUNTER_R wr %r0, %r7, %- .word 0x9f802ffc ! 957: SIR sir 0x0ffc nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_840 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_840 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610040, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_840: !! CWQ interrupt (20610040) goes to TID 2 ifelse(2,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_840) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,984,*,*,1)') ifelse(2,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_840)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,992,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_840: wrhpr %g0, 0xa51, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 958: RDPC rd %pc, %r16 cancelint_1_841: rdhpr %halt, %r17 .word 0x85880000 ! 959: ALLCLEAN .word 0xc19fe160 ! 960: LDDFA_I ldda [%r31, 0x0160], %f0 nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_842 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_842 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610070, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_842: !! CWQ interrupt (20610070) goes to TID 3 ifelse(3,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_842) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,744,*,*,1)') ifelse(3,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_842)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,656,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_842: wrhpr %g0, 0x2ca, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x91414000 ! 961: RDPC rd %pc, %r8 intveclr_1_843: nop nop ta T_CHANGE_HPRIV setx 0x24726473c846e0f5, %r1, %r28 stxa %r28, [%g0] 0x72 .word 0x25400001 ! 962: FBPLG fblg,a,pn %fcc0, nop nop mov 0x1, %r18 splash_cmpr_1_844: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x80, %r17 #else add %r17, 0x900, %r17 #endif and %r17, %r18, %r17 ta T_CHANGE_PRIV #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0xc00, %r17 #endif .word 0xb3800011 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r17, %- #if (defined SPC || defined CMP1) !$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_1_844)+8 , 16, 16)) -> intp(6,0,17,*,936,*,2d,1) !$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_1_844)&0xffffffff)+8 , 16, 16)) -> intp(2,0,17,*,1000,*,2d,1) #endif wrhpr %g0, 0x0, %halt ! HALT .word 0x81b01021 ! 963: SIAM siam 1 ibp_1_845: nop nop wrhpr %g0, 0xe4a, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x99b447d4 ! 964: PDIST pdistn %d48, %d20, %d12 frzptr_1_846: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) ldx [%r27+0xc], %r20 jmpl %r27+4, %r27 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 best_set_reg(0x3cbc0000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x20800001 ! 965: BN bn,a nop nop mov 0x0, %r18 splash_cmpr_1_847: sllx %r18, 63, %r18 not %r18, %r18 rd %tick, %r17 #if (defined SPC || defined CMP1) add %r17, 0x200, %r17 #else add %r17, 0xc00, %r17 #endif and %r17, %r18, %r17 #if (defined SPC || defined CMP1) add %r17, 0x250, %r17 #else add %r17, 0x500, %r17 #endif .word 0xaf800011 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r17, %- .word 0x81b01021 ! 966: SIAM siam 1 splash_tba_1_848: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 967: WRPR_TBA_R wrpr %r0, %r12, %tba iaw_1_849: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_849: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_849 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_849: brnz %r16, iaw_wait1_849 ld [%r23], %r16 ba iaw_startwait1_849 mov 0x1, %r16 continue_iaw_1_849: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_849: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_849 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_849: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_849 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_849: mov 0x38, %r18 iaw1_1_849: best_set_reg(0x00000000e0200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x19b, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xd9e7dd40 ! 968: CASA_I casa [%r31] 0xea, %r0, %r12 cancelint_1_850: rdhpr %halt, %r17 .word 0x85880000 ! 969: ALLCLEAN .word 0x9192c006 ! 970: WRPR_PIL_R wrpr %r11, %r6, %pil .word 0xe19fe0a0 ! 971: LDDFA_I ldda [%r31, 0x00a0], %f16 .word 0xe277e1c2 ! 972: STX_I stx %r17, [%r31 + 0x01c2] .word 0x91928004 ! 973: WRPR_PIL_R wrpr %r10, %r4, %pil splash_lsu_1_853: nop nop ta T_CHANGE_HPRIV set 0x44e5257e, %r2 mov 0x7, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x36800001 ! 1: BGE bge,a stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x1d400002 ! 974: FBPULE fbule frzptr_1_854: nop nop best_set_reg(0x3cb80000+0x1ffc, %r20, %r27) jmpl %r27, %r27 .word 0x00800001 ! 975: BN bn jmptr_1_855: nop nop best_set_reg(0xe0200000, %r20, %r27) .word 0xb7c6c000 ! 976: JMPL_R jmpl %r27 + %r0, %r27 nop nop ta T_CHANGE_HPRIV ! macro donret_1_856: rd %pc, %r12 mov HIGHVA_HIGHNUM, %r10 sllx %r10, 32, %r10 or %r12, %r10, %r12 add %r12, (donretarg_1_856-donret_1_856+4), %r12 add %r12, 0x4, %r11 ! seq tnpc andn %r11, %r10, %r11 ! low VA tnpc wrpr %g0, 0x2, %tl wrpr %g0, %r12, %tpc wrpr %g0, %r11, %tnpc set (0x00095c00 | (48 << 24)), %r13 and %r12, 0xfff, %r14 sllx %r14, 32, %r14 or %r13, %r14, %r20 wrpr %r20, %g0, %tstate wrhpr %g0, 0x1c9f, %htstate wrhpr %g0, 0x610, %hpstate ! rand=1 (1) ldx [%r12+%r0], %g1 retry donretarg_1_856: .word 0x8d903987 ! 977: WRPR_PSTATE_I wrpr %r0, 0x1987, %pstate .word 0xe19fe120 ! 978: LDDFA_I ldda [%r31, 0x0120], %f16 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, .word 0x8d903a23 ! 979: WRPR_PSTATE_I wrpr %r0, 0x1a23, %pstate .word 0xe28008a0 ! 980: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 .word 0xe337c000 ! 981: STQF_R - %f17, [%r0, %r31] nop nop ta T_CHANGE_HPRIV mov 0x1+1, %r10 set sync_thr_counter5, %r23 #ifndef SPC ldxa [%g0]0x63, %o1 and %o1, 0x38, %o1 add %o1, %r23, %r23 sllx %o1, 5, %o3 !(CID*256) #endif cas [%r23],%g0,%r10 !lock brnz %r10, cwq_1_858 rd %asi, %r12 wr %g0, 0x40, %asi ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 and %l1, 0x3, %l1 ! Check if busy/enabled .. cmp %l1, 1 bne cwq_1_858 set CWQ_BASE, %l6 #ifndef SPC add %l6, %o3, %l6 #endif stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi best_set_reg(0x20610030, %l1, %l2) !#Control Word 1 sllx %l2, 32, %l2 stx %l2, [%l6 + 0x0] membar #Sync ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 sub %l2, 0x40, %l2 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi cwq_pre_1_858: !! CWQ interrupt (20610030) goes to TID 1 ifelse(1,mask2tid(0x1),`wrhpr %g0, 0x0, %halt ! HALT') #if (defined SPC || defined CMP1) ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_1_858) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,720,*,*,1)') ifelse(1,mask2tid(0x1),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_1_858)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x1),0,45,*,688,*,*,1)') #endif wr %r12, %g0, %asi st %g0, [%r23] cwq_1_858: wrhpr %g0, 0xb13, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa1414000 ! 982: RDPC rd %pc, %r16 iaw_1_859: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_859: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_859 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_859: brnz %r16, iaw_wait1_859 ld [%r23], %r16 ba iaw_startwait1_859 mov 0x1, %r16 continue_iaw_1_859: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_859: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_859 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_859: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_859 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_859: mov 0x38, %r18 iaw1_1_859: best_set_reg(0x00000000e1200000, %r20, %r19) or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x5d1, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xe03fe060 ! 983: STD_I std %r16, [%r31 + 0x0060] jmptr_1_860: nop nop best_set_reg(0xe1200000, %r20, %r27) .word 0xb7c6c000 ! 984: JMPL_R jmpl %r27 + %r0, %r27 iaw_1_861: nop nop ta T_CHANGE_HPRIV mov 8, %r18 rd %asi, %r12 wr %r0, 0x41, %asi set sync_thr_counter4, %r23 #ifndef SPC ldxa [%g0]0x63, %r8 and %r8, 0x38, %r8 ! Core ID add %r8, %r23, %r23 #else mov 0, %r8 #endif mov 0x1, %r16 iaw_startwait1_861: cas [%r23],%g0,%r16 !lock brz,a %r16, continue_iaw_1_861 mov (~0x1&0xf), %r16 ld [%r23], %r16 iaw_wait1_861: brnz %r16, iaw_wait1_861 ld [%r23], %r16 ba iaw_startwait1_861 mov 0x1, %r16 continue_iaw_1_861: sllx %r16, %r8, %r16 !Mask for my core only ldxa [0x58]%asi, %r17 !Running_status wait_for_stat_1_861: ldxa [0x50]%asi, %r13 !Running_rw cmp %r13, %r17 bne,a %xcc, wait_for_stat_1_861 ldxa [0x58]%asi, %r17 !Running_status stxa %r16, [0x68]%asi !Park (W1C) ldxa [0x50]%asi, %r14 !Running_rw wait_for_iaw_1_861: ldxa [0x58]%asi, %r17 !Running_status cmp %r14, %r17 bne,a %xcc, wait_for_iaw_1_861 ldxa [0x50]%asi, %r14 !Running_rw iaw_doit1_861: mov 0x38, %r18 iaw3_1_861: setx vahole_target0, %r20, %r19 or %r19, 0x1, %r19 stxa %r19, [%r18]0x50 stxa %r16, [0x60] %asi ! Unpark (W1S) st %g0, [%r23] !clear lock wr %r0, %r12, %asi ! restore %asi wrhpr %g0, 0x2db, %hpstate ! ta T_CHANGE_NONHPRIV .word 0xa9a449c3 ! 985: FDIVd fdivd %f48, %f34, %f20 .word 0x9f802180 ! 986: SIR sir 0x0180 vahole3_1_863: nop nop ta T_CHANGE_NONHPRIV setx vahole_target0, %r18, %r27 jmpl %r27+0, %r27 .word 0xe8bfc400 ! 987: STDA_R stda %r20, [%r31 + %r0] 0x20 .word 0x9f80276e ! 988: SIR sir 0x076e splash_lsu_1_864: nop nop ta T_CHANGE_HPRIV set 0x3683d648, %r2 mov 0x3, %r1 sllx %r1, 32, %r1 or %r1, %r2, %r2 .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, stxa %r2, [%r0] ASI_LSU_CONTROL .word 0x3d400001 ! 989: FBPULE fbule,a,pn %fcc0, brcommon2_1_865: nop nop setx common_target, %r12, %r27 ba,a .+12 .word 0xa9a7c960 ! 1: FMULq dis not found ba,a .+8 jmpl %r27-4, %r27 .word 0x81b7c7c0 ! 990: PDIST pdistn %d62, %d0, %d0 ibp_1_866: nop nop wrhpr %g0, 0x8d9, %hpstate ! ta T_CHANGE_NONHPRIV .word 0x9f802170 ! 991: SIR sir 0x0170 memptr_1_867: set user_data_start, %r31 .word 0x858168cb ! 992: WRCCR_I wr %r5, 0x08cb, %ccr .word 0x89800011 ! 993: WRTICK_R wr %r0, %r17, %tick .word 0x9f8036cd ! 994: SIR sir 0x16cd .word 0xe3e7c200 ! 1: CASA_I casa [%r31] 0x10, %r0, %r17 .word 0xe3e7c720 ! 1: CASA_I casa [%r31] 0x39, %r0, %r17 mov 0x31, %r30 .word 0x91d0001e ! 995: Tcc_R ta icc_or_xcc, %r0 + %r30 .word 0xe297d100 ! 996: LDUHA_R lduha [%r31, %r0] 0x88, %r17 .word 0xe227e0d4 ! 997: STW_I stw %r17, [%r31 + 0x00d4] .word 0xe297c240 ! 998: LDUHA_R lduha [%r31, %r0] 0x12, %r17 vahole6_1_871: nop nop mov 1, %r27 sllx %r27, 49, %r27 jmpl %r27+0, %r27 ta T_CHANGE_HPRIV .word 0xe2dfc080 ! 999: LDXA_R ldxa [%r31, %r0] 0x04, %r17 splash_tba_1_872: nop ta T_CHANGE_PRIV set 0x120000, %r12 .word 0x8b90000c ! 1000: WRPR_TBA_R wrpr %r0, %r12, %tba nop nop ta T_CHANGE_PRIV wrpr %g0, %g0, %gl nop nop join_lbl_0_0: SECTION .MAIN .text diag_finish: nop nop nop ta T_CHANGE_HPRIV #if (MULTIPASS > 0) multipass_check: rd %asi, %r12 wr %g0, ASI_SCRATCHPAD, %asi ldxa [0x38]%asi, %r10 cmp %r10, MULTIPASS inc %r10 stxa %r10, [0x38]%asi wr %g0, %r12, %asi bne fork_threads wrpr %g0, %g0, %gl #endif finish_diag: best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) wrhpr %g2, %g0, %htba ta T_GOOD_TRAP nop nop nop .data .xword 0x0 ! fp data rs1, rs2, fsr, gsr quads .. .global fp_data_quads fp_data_quads: .xword 0x0044000000000000 .xword 0x4028000000000000 .xword 0x0fc0400400000000 .xword 0x0000000000000000 .xword 0x0041000000000000 .xword 0x4022000000000000 .xword 0x0600800000000000 .xword 0x0000000000000000 .xword 0x0220000000000000 .xword 0x4140000000000000 .xword 0x4fc0400400000000 .xword 0x0000000000000000 .xword 0x4090000000000000 .xword 0x0090000000000000 .xword 0x0f80400800000000 .xword 0x0a00000000000000 .align 128 .global user_data_start .data user_data_start: .xword 0x84131d2d5eca811e .xword 0x555c6bdd2e683cc7 .xword 0x351934b15392cf25 .xword 0xecdcb8a481d23b58 .xword 0x26efd6b3a94088d9 .xword 0xc0428b11f57717b5 .xword 0xcc72a57b74be1f35 .xword 0xe79b283e76bc585f .xword 0x23f43bd4d665f8ab .xword 0xcf50b69732a24ea6 .xword 0x8b48e0e333813a21 .xword 0xe0f5fabef74b979f .xword 0xff37f638410b6c9f .xword 0x03178b006aec3b24 .xword 0x6f650f3203ed359a .xword 0xc770d6682b870bda .xword 0xc2754b6788532ea9 .xword 0x75296c3782227c9a .xword 0x7f107febb5722919 .xword 0x1b2b3c55e1bfa375 .xword 0xad43d74859a0c20f .xword 0x3545854e2c3c96ed .xword 0x2bf92c8851e5b2b0 .xword 0x6ff1542719fd35d8 .xword 0xd4da7c8aef6ef1fc .xword 0xb006b2bce0044019 .xword 0x4d4d38ed2d1065c2 .xword 0x3ddcdb984a2aacf0 .xword 0xb5ca6831fe922ec7 .xword 0xfb2aec34917f9987 .xword 0x9d1e9326eae26ec0 .xword 0x5b767976f665be7c .xword 0x478cbe8a809286f4 .xword 0x944fbcd64fc2d23d .xword 0x83dcb858d0bfeb2d .xword 0xb2a2ba6a9baaa685 .xword 0x78d0ac6c1eb78e1a .xword 0x9f029abdb390bd97 .xword 0x6e37587eae8249f7 .xword 0xa2f5255f4c5aa005 .xword 0x2441a038d3fa9c48 .xword 0x1f7f036e01b506cc .xword 0x831067b37772e492 .xword 0x901997ccbb322497 .xword 0xb0edfff533cb9770 .xword 0xcf0f3633523b1afa .xword 0xdd0a652cd7f65c5a .xword 0x80ff0a311caf6840 .xword 0x1846c45bec8358c8 .xword 0x4a78a2a0f4d141f4 .xword 0x9bbe8b0f4c18d3a4 .xword 0x71bdf149aaa87519 .xword 0x9161d1a30239a76e .xword 0x3ae584b535062d10 .xword 0xdde092b6de412c2e .xword 0x3d033579653b6a65 .xword 0x92d277120ef1c9f5 .xword 0xbd6d40528dbc9d5a .xword 0x21e809d3fe8ab1ef .xword 0x4eb30baea56053dc .xword 0xf5b8c53ed1b14911 .xword 0x98b2b525d0252d17 .xword 0x15ee6031c935a62c .xword 0xec98fa69ef09cbe6 .xword 0xf10ed351aeaef082 .xword 0xba6af9e9b69346e9 .xword 0xaba935d9af3df2de .xword 0xe12d2da92717c6d3 .xword 0x52d128d926e51eea .xword 0x2613fe357a5dfbb1 .xword 0xad1f7ae2a3b3aa2b .xword 0x4927bfe8fef63ddd .xword 0xfbd171fe933b5078 .xword 0xeb5abcbc7020f164 .xword 0x6e2b75f1599a7ec1 .xword 0xfeb40b948d25196a .xword 0x0c47e072d4b6aa2c .xword 0x04012f1ea6354fa1 .xword 0x07107bcd979525c2 .xword 0xf2605527295d86d1 .xword 0x7066cd4b516b1c94 .xword 0x74a6720272af6b19 .xword 0x8547fe89ac623b89 .xword 0x3ae1f3b2461387d0 .xword 0x3bd37fce217608ea .xword 0x203c2bd2178575c2 .xword 0x07c7d4ce1d7b36d8 .xword 0x1a1225a390c0705a .xword 0xa8620bd37418345b .xword 0x03b9f2e0cde802fe .xword 0xef18f2af40e5f933 .xword 0xeb666e3dbe0a74fb .xword 0x895ed1b11924f589 .xword 0x697a0084dafa469d .xword 0x33f01d1dd2dd04ea .xword 0x9f3c9895bf82d43f .xword 0x1da2960b9dc64491 .xword 0x7e582ffe6a7599d0 .xword 0x0430d9c270a14434 .xword 0xd40dbbd5a752e5b0 .xword 0xd683e113106cd68b .xword 0x2fcdbe87fef7f1fc .xword 0xd227bdd0057f3f06 .xword 0xe74d7201d6ade889 .xword 0xb0da0e1531f33df4 .xword 0x40c7d772cb8d7e3f .xword 0x729c668998478c14 .xword 0xe76710ed2223d30e .xword 0x3b9c3e8e72d6d47f .xword 0xa2b9bf504e4f6ce1 .xword 0x678ba840ce101f8c .xword 0xe91eb1c4d5f25de1 .xword 0x7488815e4403f77a .xword 0xc190bcf2d55fa22b .xword 0xa29f6d7fa7604e10 .xword 0xb66ac3a18e01fe0e .xword 0xf8e506360834952d .xword 0x233c40d6e096904f .xword 0x9407bd078caa4e3b .xword 0xd7f8bb0a99d3f001 .xword 0x8a21afea06b081d1 .xword 0xa0b6b306cae23632 .xword 0xf7e6ca17742fd694 .xword 0xf636a462632f1139 .xword 0x35df47f90a9c5037 .xword 0x7a8c80e011a4e6a4 .xword 0xb192d0b3d1a5e21d .xword 0x40737fcd10effbd9 .xword 0x0580b3eb0161207d .xword 0xa44ef6c0f6c0df0a .xword 0xbc2c7c5f097876e2 .xword 0x3c3f2bad6802c6f8 .xword 0x2551947ee673be91 .xword 0x5207bd5c5c60f65e .xword 0xd3a182b8a69c2a36 .xword 0xb995ac51fa18ef07 .xword 0x411c21ff1cf533f5 .xword 0xff68c0edfee5253e .xword 0xd4188d00e52ecf85 .xword 0x95e785255a58b3c6 .xword 0x09c52d465fcc697d .xword 0x7a19a2824a10a7ec .xword 0xcbbcb70548689e37 .xword 0x359022c5e045c61c .xword 0x8f9020947615817a .xword 0x3dc7ad0b5657dab9 .xword 0xe61f6a0b8e6013f4 .xword 0xf109f2b528ac6d70 .xword 0xf9c80dc261a57a6d .xword 0x74886c3bc583268f .xword 0x13ee414f3226292d .xword 0xb1b67d1705036c61 .xword 0xf63d8e6ae569c3ed .xword 0xfcd9b0aecb712e16 .xword 0x4d09f2423ddf889d .xword 0x9af71e5defee2b9e .xword 0xcc0575fb96c15eb0 .xword 0xb603b5145f95d6bf .xword 0x105f071f796a03bd .xword 0xa5d58a3077c27c18 .xword 0x98e03e30f1cf7296 .xword 0x428f483ba65e02f3 .xword 0x4d8922daa0bf1355 .xword 0xb28628934cd028dd .xword 0x49426458e5f99d7e .xword 0x97b0857317b147e3 .xword 0xdb4993dc157754fe .xword 0xdcd851496c24b724 .xword 0xe16139bb3459d329 .xword 0xb61a23162dfe716b .xword 0xc9792ffc5a9e93cd .xword 0xd65d69d7ddc2ecea .xword 0x28595c0c110423df .xword 0x4e7d1bda1e60839f .xword 0x7f35a0e4eedd7bba .xword 0xd830c2fbd471b743 .xword 0x9b647ed442ca0bbd .xword 0xe558e784e691981d .xword 0xd048efb01aa46daf .xword 0xa417dbd10e5416a1 .xword 0x10183d392a53ff51 .xword 0xa13108e7b505fea7 .xword 0x1f043e942ac23f8f .xword 0xad6c620d3523a5be .xword 0xbadee1961f2b40e9 .xword 0x1a1105c8ba6448ab .xword 0xb05f81919c17d082 .xword 0x03a0c3b4f5935d6d .xword 0x1ca572f69aa72c7f .xword 0x4c210b55e2369b9f .xword 0xc8762012a9a3d53b .xword 0x3e1901cbf692df93 .xword 0xfc056a80f0b0bef3 .xword 0x6a5bcf763b64f8db .xword 0x3c083111e4143778 .xword 0x17074121de16d253 .xword 0xec569a962c8118e4 .xword 0xd1903f1d744bf507 .xword 0x93025e9b33f6c6ef .xword 0xb5dee04d11464497 .xword 0x33abfea705b2d442 .xword 0x1d97f857edcd6a27 .xword 0x28e8e66175b78325 .xword 0x2a7943e931b165be .xword 0x6995581679abc139 .xword 0x96b1ab87d59cd836 .xword 0x115e66df7d3332df .xword 0x52df919af1ed534e .xword 0x020e16276967b332 .xword 0xf849b1bad2026681 .xword 0x1a50edec01bcef2e .xword 0xca7aa7893593ce02 .xword 0xbfca9f77ae9eb4e8 .xword 0xbd734de6fd9ffc09 .xword 0x5fb5e4ae9c105ec7 .xword 0xb0b502cc1f24f4a2 .xword 0x1088d0b51eb81ddb .xword 0xc698a449ac90a395 .xword 0x438017ed444a2514 .xword 0xb3c4e3d3331d190f .xword 0x2eb0e9349e293fd1 .xword 0xf5db721c1e116a31 .xword 0xf88eecbfbc6d0229 .xword 0xa3247686b29f17a3 .xword 0xe523d05290b977d9 .xword 0xefdbd3d9b14fb469 .xword 0xb00e3ac584cec08d .xword 0x68ad2b4e138c8eb5 .xword 0x2b4f76deaa8c8a6f .xword 0x27352376af93ad29 .xword 0x2fba9a69391ae81f .xword 0xb6e63886de700e0d .xword 0x9b02c45a8057e873 .xword 0x8c160f1a047e00e4 .xword 0x628113843fc399e7 .xword 0x28aefd371ea9a07c .xword 0x58c9fdefae05b0e9 .xword 0x77e0493974218ba9 .xword 0xa0c5f03e7b9a9af7 .xword 0xa27c5e8debd9174d .xword 0x0db3154d0ca53d4c .xword 0x735eba37c17ea9fd .xword 0xf745163ab1334f4b .xword 0x569f15347eace1b1 .xword 0x71529e391da38340 .xword 0x64d58211befa2648 .xword 0x658d4dabb4f33602 .xword 0x4113f69738ff3c42 .xword 0x0db98862ef62aed8 .xword 0x899a2d71fd4b63d7 .xword 0x739771cfa08aaef0 .xword 0x8736927f1cf1bb87 .xword 0xc46a521d8e332719 .xword 0x7e9cf16d2fca03a8 .xword 0xcbac24febfa99e07 .xword 0x35c9d7334196eebb SECTION .HTRAPS .text .global restore_range_regs restore_range_regs: wr %g0, ASI_MMU_REAL_RANGE, %asi mov 1, %g1 sllx %g1, 63, %g1 ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 or %g2 ,%g1, %g2 stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 or %g2 ,%g1, %g2 stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 or %g2 ,%g1, %g2 stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 or %g2 ,%g1, %g2 stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi retry .global wdog_2_ext SECTION .HTRAPS .global wdog_2_ext .global retry_with_base_tba .global resolve_bad_tte .text resolve_bad_tte: !if pc[63:15] matches tba, then relocated handler .. rdpr %tpc, %r4 check_tba: set 0x7fff, %r5 andn %r4, %r5, %r5 !clear 14:0 rdpr %tba, %r6 !compare pc[63:15] to tba cmp %r5, %r6 bne,a not_a_reloc_handler andn %r27, 0x1f, %r6 retry_with_base_tba: best_set_reg(TRAP_BASE_VA, %r3, %r5) cmp %r4, %r5 bz htrap_5_ext_done set 0x7fff, %r3 and %r4, %r3, %r4 or %r5, %r4, %r4 wrpr %r4, %tpc rdpr %tnpc, %r4 and %r4, %r3, %r4 or %r5, %r4, %r4 wrpr %r4, %tnpc retry !assume %r27 is where we came from .. not_a_reloc_handler: stxa %r27, [%r6] 0x57 add %r27, 8, %r27 wrpr %r27, %tnpc done htrap_5_ext: rd %pc, %l2 inc %l3 add %l2, htrap_5_ext_done-htrap_5_ext, %l2 rdpr %tl, %l3 rdpr %tstate, %l4 rdhpr %htstate, %l5 or %l5, 0x4, %l5 inc %l3 wrpr %l3, %tl wrpr %l2, %tpc add %l2, 4, %l2 wrpr %l2, %tnpc wrpr %l4, %tstate wrhpr %l5, %htstate retry htrap_5_ext_done: done wdog_2_ext: mov 0x1f, %l1 stxa %l1, [%g0] ASI_LSU_CTL_REG ! If TT != 2, then goto trap handler rdpr %tt, %l1 cmp %l1, 0x2 bne wdog_2_goto_handler nop ! else done done wdog_2_goto_handler: rdhpr %htstate, %l3 and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv brnz,a %l3, wdog_2_goto_handler_1 rdhpr %htba, %l3 srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. be,a wdog_2_goto_handler_1 rdpr %tba, %l3 rdhpr %htba, %l3 wdog_2_goto_handler_1: sllx %l1, 5, %l1 add %l1, %l3, %l3 jmp %l3 nop ! Red mode other reset handler ! Get htba, and tt and make trap address ! Jump to trap handler .. SECTION .RED_SEC .global red_other_ext .global wdog_red_ext .text red_other_ext: ! IF TL=6, shift stack by one .. rdpr %tl, %l1 cmp %l1, 6 be start_tsa_shift nop continue_red_other: mov 0x1f, %l1 stxa %l1, [%g0] ASI_LSU_CTL_REG rdpr %tt, %l1 rdhpr %htstate, %l2 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv brnz,a %l2, red_goto_handler rdhpr %htba, %l2 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. be,a red_goto_handler rdpr %tba, %l2 rdhpr %htba, %l2 red_goto_handler: sllx %l1, 5, %l1 add %l1, %l2, %l2 rdhpr %hpstate, %l1 jmp %l2 wrhpr %l1, 0x20, %hpstate nop wdog_red_ext: ! Shift stack down by 1 ... rdpr %tl, %l1 cmp %l1, 6 bl wdog_end start_tsa_shift: mov 0x2, %l2 tsa_shift: wrpr %l2, %tl rdpr %tt, %l3 rdpr %tpc, %l4 rdpr %tnpc, %l5 rdpr %tstate, %l6 rdhpr %htstate, %l7 dec %l2 wrpr %l2, %tl wrpr %l3, %tt wrpr %l4, %tpc wrpr %l5, %tnpc wrpr %l6, %tstate wrhpr %l7, %htstate add %l2, 2, %l2 cmp %l2, %l1 ble tsa_shift nop tsa_shift_done: dec %l1 wrpr %l1, %tl wdog_end: ! If TT != 2, then goto trap handler rdpr %tt, %l1 cmp %l1, 0x2 bne continue_red_other nop ! else done mov 0x1f, %l1 stxa %l1, [%g0] ASI_LSU_CTL_REG done SECTION .CWQ_DATA DATA_VA =0x4000 attr_data { Name = .CWQ_DATA hypervisor } .data .align 16 .global msg msg: .xword 0xad32fa52374cc6ba .xword 0x4cbf52280549003a .align 16 .global results results: .xword 0xDEADBEEFDEADBEEF .xword 0xDEADBEEFDEADBEEF !# CWQ data area !# CWQ_BASE for core N is CWQ_BASE+(N*256) !# CWQ_LAST for core N is CWQ_LAST+(N*256) .align 64 .global CWQ_BASE CWQ_BASE: .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .global CWQ_LAST .align 64 CWQ_LAST: .word 0x0 .align 64 cwq_base1: .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 cwq_last1: .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 .align 64 .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .xword 0xAAAAAAAAAAAAAAA .align 64 .word 0x0 SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 attr_text { Name = .MyHTRAPS_0, RA = 0x0000000000280000, PA = ra2pa(0x0000000000280000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 1, TTE_P = 1, TTE_W = 0, TTE_X = 0 } attr_data { Name = .MyHTRAPS_0, RA = 0x00000000002c0000, PA = ra2pa(0x00000000002c0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0 } .text #include "htraps.s" #include "tlu_htraps_ext.s" SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 attr_text { Name = .MyHTRAPS_1, RA = 0x00000000002a0000, PA = ra2pa(0x00000000002a0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0, TTE_X = 0 } attr_data { Name = .MyHTRAPS_1, RA = 0x00000000002e0000, PA = ra2pa(0x00000000002e0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0 } .text #include "htraps.s" #include "tlu_htraps_ext.s" SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 attr_text { Name = .MyHTRAPS_2, RA = 0x0000000200280000, PA = ra2pa(0x0000000200280000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0, TTE_X = 0 } attr_data { Name = .MyHTRAPS_2, RA = 0x00000002002c0000, PA = ra2pa(0x00000002002c0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 0, TTE_P = 1, TTE_W = 0 } .text #include "htraps.s" #include "tlu_htraps_ext.s" SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 attr_text { Name = .MyHTRAPS_3, RA = 0x00000002002a0000, PA = ra2pa(0x00000002002a0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 1, TTE_P = 1, TTE_W = 0, TTE_X = 0 } attr_data { Name = .MyHTRAPS_3, RA = 0x00000002002e0000, PA = ra2pa(0x00000002002e0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0 } .text #include "htraps.s" #include "tlu_htraps_ext.s" SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 attr_text { Name = .MyTRAPS_0, RA = 0x0000000000380000, PA = ra2pa(0x0000000000380000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 1, TTE_X = 1 } attr_data { Name = .MyTRAPS_0, RA = 0x00000000003c0000, PA = ra2pa(0x00000000003c0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 0 } #include "traps.s" SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 attr_text { Name = .MyTRAPS_1, RA = 0x00000000003a0000, PA = ra2pa(0x00000000003a0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 1, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1, TTE_X = 0 } attr_data { Name = .MyTRAPS_1, RA = 0x00000000003e0000, PA = ra2pa(0x00000000003e0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 1 } #include "traps.s" SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 attr_text { Name = .MyTRAPS_2, RA = 0x0000000400380000, PA = ra2pa(0x0000000400380000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 1, TTE_X = 0 } attr_data { Name = .MyTRAPS_2, RA = 0x00000004003c0000, PA = ra2pa(0x00000004003c0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 1, TTE_W = 0 } #include "traps.s" SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 attr_text { Name = .MyTRAPS_3, RA = 0x00000004003a0000, PA = ra2pa(0x00000004003a0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 1, TTE_P = 0, TTE_W = 0, TTE_X = 1 } attr_data { Name = .MyTRAPS_3, RA = 0x00000004003e0000, PA = ra2pa(0x00000004003e0000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0, TTE_V = 1, TTE_Size = PART0_Z_PAGE_SIZE_3, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 1 } #include "traps.s" SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 attr_text { Name = .MyDATA_0, RA = 0x0000000170100000, PA = ra2pa(0x0000000170100000,0), part_0_ctx_zero_tsb_config_0, part_0_ctx_nonzero_tsb_config_0, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_0, RA = 0x0000000170100000, PA = ra2pa(0x0000000170100000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_0, RA = 0x0000000170100000, PA = ra2pa(0x0000000170100000,0), part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = SCONTEXT, TTE_V = 1, TTE_Size = 3, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 1, TTE_W = 1, tsbonly } attr_data { Name = .MyDATA_0, hypervisor } attr_text { Name = .MyDATA_0, hypervisor } .data .xword 0x052de83320da5385 .xword 0xe6d8b17974bdfc12 .xword 0xb21184235add943d .xword 0xbf9e3141710d9aae .xword 0xd0b00db6c4c0ae63 .xword 0x99e4b16a553778b0 .xword 0x6fdfd9661b9aea6e .xword 0xc651558135a0ca42 .xword 0xab6a2021a016f18d .xword 0xe8d7eb7d5f32ffe6 .xword 0xd85dbf223a57045e .xword 0x819e0b5bc7b622b0 .xword 0xae676ab8d71c8bdc .xword 0x4ca6f96d14475666 .xword 0xf721148cb1d9bf29 .xword 0xb7ab392ea63b31d4 .xword 0x087c140f85589e51 .xword 0xdf891b1148b0d8ef .xword 0xd246764b7da5eef3 .xword 0xcead042f753a4c07 .xword 0x6f9431a230176457 .xword 0x87051ecf91e3ee1a .xword 0xf8a770c22a4bd103 .xword 0xafdd8e5ca3902c51 .xword 0xc644ac509ee6b86b .xword 0x21281fe4a0914073 .xword 0xe292fded6392426a .xword 0xff2de52f0a443440 .xword 0x218e8ec806906659 .xword 0x5b09fed5dd5334d2 .xword 0xb3b0bf37e99174f0 .xword 0x99f1d790b2fb97af SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 attr_text { Name = .MyDATA_1, RA = 0x0000000170300000, PA = ra2pa(0x0000000170300000,0), part_0_ctx_zero_tsb_config_0, part_0_ctx_nonzero_tsb_config_0, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 1, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_1, RA = 0x0000000170300000, PA = ra2pa(0x0000000170300000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 1, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_1, RA = 0x0000000170300000, PA = ra2pa(0x0000000170300000,0), part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = SCONTEXT, TTE_V = 1, TTE_Size = 3, TTE_NFO = 1, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 1, TTE_P = 1, TTE_W = 0, tsbonly } attr_data { Name = .MyDATA_1, hypervisor } attr_text { Name = .MyDATA_1, hypervisor } .data .xword 0x7647e2702da03d08 .xword 0xd3bbf5901c0f22e7 .xword 0xb01a8c84fa1331cc .xword 0x30802161dd4a390b .xword 0xb571effbaef8e318 .xword 0x848dec0a64df5db8 .xword 0x220ec5c68ce204aa .xword 0x08baf01a016cbfb2 .xword 0x003279b9478c9fbe .xword 0x94d4314233a657d7 .xword 0xf16da56c922ecc20 .xword 0x95144fbd5ee1a112 .xword 0x05bc8e315364e82f .xword 0xd6f2bd57462fc444 .xword 0xbfbd633f25d0c840 .xword 0x120573b1afe56a5e .xword 0x13c7edcd01886d56 .xword 0xe6900f8f82c55195 .xword 0x6bc280eea69caf2e .xword 0xc26a7639f574e94d .xword 0xdb65b3f703cc4860 .xword 0x4938119c85ce2776 .xword 0xd47ddd2d181083f4 .xword 0xbd1afbc8fd0a6f47 .xword 0x1d4464fdebc1df89 .xword 0xdcc832fde1e12b4f .xword 0xd59d907dec61b743 .xword 0x5d03b6b801632cdb .xword 0x929b9b6f3126c8af .xword 0x068f7b382e134e0e .xword 0x20a6a8637048fd13 .xword 0x4eeadcaefa400bd9 SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 attr_text { Name = .MyDATA_2, RA = 0x0000000170500000, PA = ra2pa(0x0000000170500000,0), part_0_ctx_zero_tsb_config_0, part_0_ctx_nonzero_tsb_config_0, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 1, TTE_P = 1, TTE_W = 1 } attr_data { Name = .MyDATA_2, RA = 0x0000000170500000, PA = ra2pa(0x0000000170500000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_2, RA = 0x0000000170500000, PA = ra2pa(0x0000000170500000,0), part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = SCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 1, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 1, TTE_P = 1, TTE_W = 0, tsbonly } attr_data { Name = .MyDATA_2, hypervisor } attr_text { Name = .MyDATA_2, hypervisor } .data .xword 0x2a5e6102bfb318a8 .xword 0xd26f7e9a216248f6 .xword 0xd66b6d403915b342 .xword 0x9dbc9a553cb2e582 .xword 0x0e58950620098bf3 .xword 0xf075f964b85c135b .xword 0x9f51f3ce73bed6bf .xword 0xdebd5d6eca941ec0 .xword 0x7ac1b2121fff9dfb .xword 0xcf43194ff90916d0 .xword 0x5ef6d316d6a0e19d .xword 0x4ef7151ab96f4a3a .xword 0x182785bb35b8393d .xword 0xbc76ae06d00d473a .xword 0x29327efc24997cc4 .xword 0xb127f89c9eac7885 .xword 0x1e612199c884b363 .xword 0xb7131de48423043d .xword 0x4603ea56f60a028d .xword 0x0b2f979da1c76b9b .xword 0xe69642eb2fafe783 .xword 0x6fec07bbe92ca636 .xword 0x983d694c0d298fe8 .xword 0x1aaa3d77610fd02e .xword 0x5b5e02a8efc128a0 .xword 0x6956c5a14d1bb379 .xword 0xf91832b7070b6c6b .xword 0x01a4cbd2b4e16f68 .xword 0xc94a46db421ad432 .xword 0x4890da5335f1377c .xword 0xb73d664a67a53264 .xword 0xf0a4666f34bc847d SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 attr_text { Name = .MyDATA_3, RA = 0x0000000170700000, PA = ra2pa(0x0000000170700000,0), part_0_ctx_zero_tsb_config_0, part_0_ctx_nonzero_tsb_config_0, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 1, TTE_P = 0, TTE_W = 1 } attr_data { Name = .MyDATA_3, RA = 0x0000000170700000, PA = ra2pa(0x0000000170700000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 1, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 1, TTE_P = 1, TTE_W = 0 } attr_data { Name = .MyDATA_3, RA = 0x0000000170700000, PA = ra2pa(0x0000000170700000,0), part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = SCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_E = 1, TTE_P = 0, TTE_W = 1, tsbonly } attr_data { Name = .MyDATA_3, hypervisor } attr_text { Name = .MyDATA_3, hypervisor } .data .xword 0x6ec57515bd526dd5 .xword 0xdd7b53aac088e1a9 .xword 0x82ed2f55f71bc437 .xword 0xb91db8d66221d741 .xword 0x33252319c42ab2e9 .xword 0x7fb1a58c43bef90c .xword 0xffa7cbfc21c0c4a9 .xword 0x374fe5d2ec7b0aa2 .xword 0xed73ac3a70a14bc0 .xword 0x0c0e6b29b76670ad .xword 0x9baed30a1444e536 .xword 0x5e959dc6379c4ed7 .xword 0x8ddae896f08ca185 .xword 0xc9b1a3a5ddf8cf25 .xword 0x2945522ae42f5374 .xword 0x950b63ef272146f2 .xword 0x0ea4753d55896441 .xword 0xc37b38e3b91fa7a2 .xword 0x87e4121f58b424eb .xword 0x0726fb949ef45f12 .xword 0x11cf8d67b8ee742b .xword 0xd3a03a58cdbcfe3e .xword 0x97faf80d6e962578 .xword 0x27c8c00e1f026868 .xword 0xb3b8c78efe5a9b20 .xword 0x1e47ea5430760ac8 .xword 0xe47fe21e7951e660 .xword 0xcf55ae76ba89b534 .xword 0xc9e8fc48d3c23c64 .xword 0x198c1484d8f18634 .xword 0x93f323339392c2f3 .xword 0x043921f11c7b3d22 SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 attr_text { Name = .MyTEXT_0, RA = 0x00000000e0200000, PA = ra2pa(0x00000000e0200000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 1, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_EP = 1, TTE_E = 1, TTE_P = 1, TTE_W = 0 } .text nuff_said_0: .word 0xc0bfdd40 ! 1: STDA_R stda %r0, [%r31 + %r0] 0xea .word 0xc1bfc3e0 ! 1: STDFA_R stda %f0, [%r0, %r31] mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 .word 0xe19fde00 ! 1: LDDFA_R ldda [%r31, %r0], %f16 .word 0x81b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r0 SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 attr_text { Name = .MyTEXT_1, RA = 0x00000000e0a00000, PA = ra2pa(0x00000000e0a00000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 3, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_EP = 0, TTE_E = 1, TTE_P = 0, TTE_W = 1 } .text nuff_said_1: .word 0xc1bfdc00 ! 1: STDFA_R stda %f0, [%r0, %r31] .word 0xa1a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f16 mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 .word 0xe0bfdc00 ! 1: STDA_R stda %r16, [%r31 + %r0] 0xe0 .word 0xc0bfda00 ! 1: STDA_R stda %r0, [%r31 + %r0] 0xd0 SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 attr_text { Name = .MyTEXT_2, RA = 0x00000000e1200000, PA = ra2pa(0x00000000e1200000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 1, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_EP = 0, TTE_E = 0, TTE_P = 0, TTE_W = 0 } .text nuff_said_2: .word 0xc0bfde00 ! 1: STDA_R stda %r0, [%r31 + %r0] 0xf0 .word 0x81b7c480 ! 1: FCMPLE32 fcmple32 %d62, %d0, %r0 mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 .word 0x81a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f0 .word 0x81a7c9a0 ! 1: FDIVs fdivs %f31, %f0, %f0 SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 attr_text { Name = .MyTEXT_3, RA = 0x00000000e1a00000, PA = ra2pa(0x00000000e1a00000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 3, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_EP = 0, TTE_E = 0, TTE_P = 1, TTE_W = 1 } .text nuff_said_3: .word 0xe0bfdb20 ! 1: STDA_R stda %r16, [%r31 + %r0] 0xd9 .word 0x87afca40 ! 1: FCMPd fcmpd %fcc, %f62, %f0 mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 jmpl %r27+8, %r0 .word 0xa1a7c9c0 ! 1: FDIVd fdivd %f62, %f0, %f16 .word 0xe09fdb40 ! 1: LDDA_R ldda [%r31, %r0] 0xda, %r16 SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 attr_text { Name = .VaHOLE_0, RA = 0x00000000ffffe000, PA = ra2pa(0x00000000ffffe000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 1, TTE_P = 0, TTE_W = 1, TTE_X = 1 } .text .global vahole_target0 .text .global vahole_target1 .text .global vahole_target2 .text .global vahole_target3 nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop nop .align 16 nop;nop;nop vahole_target0: nop;nop vahole_target1: nop vahole_target2: nop;nop;nop vahole_target3: nop;nop;nop SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 attr_text { Name = .VaHOLEL_0, RA = 0x00000000ffffe000, PA = ra2pa(0x00000000ffffe000,0), part_0_ctx_zero_tsb_config_0, part_0_ctx_nonzero_tsb_config_0, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 5, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_E = 0, TTE_P = 0, TTE_W = 1, TTE_X = 1, tsbonly } .text nop SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 attr_text { Name = .ZERO_0, RA = 0x0000000000000000, PA = ra2pa(0x0000000000000000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = 0x44, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_E = 0, TTE_P = 0, TTE_W = 1, TTE_X = 1 } .text nop mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 jmpl %r27+8, %r0 nop jmpl %r27+8, %r0 nop Power_On_Reset: setx HRedmode_Reset_Handler, %g1, %g2 jmp %g2 nop .align 32 Watchdog_Reset: setx wdog_red_ext, %g1, %g2 jmp %g2 nop .align 32 External_Reset: My_External_Reset .align 32 Software_Initiated_Reset: setx Software_Reset_Handler, %g1, %g2 jmp %g2 nop .align 32 RED_Mode_Other_Reset: ! IF TL=6, shift stack by one .. rdpr %tl, %l1 cmp %l1, 6 be start_tsa_shift nop continue_red_other: mov 0x1f, %l1 stxa %l1, [%g0] ASI_LSU_CTL_REG rdpr %tt, %l1 rdhpr %htstate, %l2 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv brnz,a %l2, red_goto_handler rdhpr %htba, %l2 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. be,a red_goto_handler rdpr %tba, %l2 rdhpr %htba, %l2 red_goto_handler: sllx %l1, 5, %l1 add %l1, %l2, %l2 rdhpr %htstate, %l1 andn %l1, 0x20, %l1 wrhpr %g0, %l1, %htstate rdhpr %hpstate, %l1 jmp %l2 wrhpr %l1, 0x20, %hpstate nop wdog_red_ext: ! Shift stack down by 1 ... rdpr %tl, %l1 cmp %l1, 6 bl wdog_end start_tsa_shift: mov 0x2, %l2 tsa_shift: wrpr %l2, %tl rdpr %tt, %l3 rdpr %tpc, %l4 rdpr %tnpc, %l5 rdpr %tstate, %l6 rdhpr %htstate, %l7 dec %l2 wrpr %l2, %tl wrpr %l3, %tt wrpr %l4, %tpc wrpr %l5, %tnpc wrpr %l6, %tstate wrhpr %l7, %htstate add %l2, 2, %l2 cmp %l2, %l1 ble tsa_shift nop tsa_shift_done: dec %l1 wrpr %l1, %tl wdog_end: ! If TT != 2, then goto trap handler rdpr %tt, %l1 cmp %l1, 0x2 bne continue_red_other nop ! else done mov 0x1f, %l1 stxa %l1, [%g0] ASI_LSU_CTL_REG done SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 attr_text { Name = .VAHOLE_PA_0, hypervisor } nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop nop .align 16 nop;nop;nop nop nop jmpl %r27+8, %r0 nop nop nop jmpl %r27+8, %r0 nop SECTION .MASKEDHOLE_0 TEXT_VA = 0x0000000100000000 attr_text { Name = .MASKEDHOLE_0, RA = 0x0000000000000000, PA = ra2pa(0x0000000000000000,0), part_0_ctx_zero_tsb_config_3, part_0_ctx_nonzero_tsb_config_3, TTE_G = 1, TTE_Context = 0x44, TTE_V = 1, TTE_Size = 1, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_E = 0, TTE_P = 0, TTE_W = 0, TTE_X = 1, tsbonly } attr_text { Name = .MASKEDHOLE_0, hypervisor } mov HIGHVA_HIGHNUM, %r11 sllx %r11, 32, %r11 or %r27, %r11, %r27 return %r27+8 nop SECTION .MyFRZ_0 TEXT_VA = 0x000000003cb00000 attr_text { Name = .MyFRZ_0, RA = 0x000000003cb00000, PA = ra2pa(0x000000003cb00000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_EP = 0, TTE_E = 1, TTE_P = 1, TTE_W = 1 } .text .global last_in_frz_1_0 nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop .align 16 nop; nop; ;nop; nop; nop; nop; nop; nop; nop; nop; nop last_in_frz_1_0: .word 0xc01fe040 ! 1: LDD_I ldd [%r31 + 0x0040], %r0 SECTION .MyFRZ_1 TEXT_VA = 0x000000003cb40000 attr_text { Name = .MyFRZ_1, RA = 0x000000003cb40000, PA = ra2pa(0x000000003cb40000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_EP = 1, TTE_E = 0, TTE_P = 0, TTE_W = 1 } .text .global last_in_frz_1_1 nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop .align 16 nop; nop; ;nop; nop; nop; nop; nop; nop; nop; nop; nop last_in_frz_1_1: .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, SECTION .MyFRZ_2 TEXT_VA = 0x000000003cb80000 attr_text { Name = .MyFRZ_2, RA = 0x000000003cb80000, PA = ra2pa(0x000000003cb80000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 1, TTE_EP = 0, TTE_E = 1, TTE_P = 0, TTE_W = 1 } .text .global last_in_frz_1_2 nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop .align 16 nop; nop; ;nop; nop; nop; nop; nop; nop; nop; nop; nop last_in_frz_1_2: .word 0xc097db40 ! 1: LDUHA_R lduha [%r31, %r0] 0xda, %r0 SECTION .MyFRZ_3 TEXT_VA = 0x000000003cbc0000 attr_text { Name = .MyFRZ_3, RA = 0x000000003cbc0000, PA = ra2pa(0x000000003cbc0000,0), part_0_ctx_zero_tsb_config_1, part_0_ctx_nonzero_tsb_config_1, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 1, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 0, TTE_EP = 1, TTE_E = 1, TTE_P = 1, TTE_W = 0 } .text .global last_in_frz_1_3 nop .align 4096 nop .align 2048 nop .align 1024 nop .align 512 nop .align 256 nop .align 128 nop .align 64 nop .align 16 nop; nop; ;nop; nop; nop; nop; nop; nop; nop; nop; nop last_in_frz_1_3: .word 0xa1b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d16 SECTION .MyFRZn_0 TEXT_VA = 0x000000003cb02000 attr_text { Name = .MyFRZn_0, RA = 0x000000003cb02000, PA = ra2pa(0x000000003cb02000,0), part_0_ctx_zero_tsb_config_2, part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_EP = 1, TTE_E = 1, TTE_P = 0, TTE_W = 1 } nop nop return %r27+8 .word 0xc11fe060 ! 1: LDDF_I ldd [%r31, 0x0060], %f0 SECTION .MyFRZn_1 TEXT_VA = 0x000000003cb42000 attr_text { Name = .MyFRZn_1, RA = 0x000000003cb42000, PA = ra2pa(0x000000003cb42000,0), part_0_ctx_zero_tsb_config_2, part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_EP = 1, TTE_E = 0, TTE_P = 0, TTE_W = 0 } nop nop return %r27+8 .word 0xc1e7c3e0 ! 1: CASA_I casa [%r31] 0x1f, %r0, %r0 SECTION .MyFRZn_2 TEXT_VA = 0x000000003cb82000 attr_text { Name = .MyFRZn_2, RA = 0x000000003cb82000, PA = ra2pa(0x000000003cb82000,0), part_0_ctx_zero_tsb_config_2, part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 1, TTE_CV = 0, TTE_EP = 1, TTE_E = 1, TTE_P = 0, TTE_W = 1 } nop nop return %r27+8 .word 0xe13fe120 ! 1: STDF_I std %f16, [0x0120, %r31] SECTION .MyFRZn_3 TEXT_VA = 0x000000003cbc2000 attr_text { Name = .MyFRZn_3, RA = 0x000000003cbc2000, PA = ra2pa(0x000000003cbc2000,0), part_0_ctx_zero_tsb_config_2, part_0_ctx_nonzero_tsb_config_2, TTE_G = 1, TTE_Context = PCONTEXT, TTE_V = 1, TTE_Size = 0, TTE_NFO = 0, TTE_IE = 0, TTE_Soft2 = 0, TTE_Diag = 0, TTE_Soft = 0, TTE_L = 0, TTE_CP = 0, TTE_CV = 1, TTE_EP = 1, TTE_E = 1, TTE_P = 0, TTE_W = 1 } nop nop return %r27+8 .word 0x9f802060 ! 1: SIR sir 0x0060 #if 0 #endif