// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: Fc_MT.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
<Fc_MT name=Fc_MT>


// ****************************************************************************
// 10G -> MAC0 -> NIU Tx + Rx. 
// ****************************************************************************
<fc_ldst_dma>

<runargs -sas >
<runargs -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+ORIG_META >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+TX_TEST >
<runargs -vcs_run_args=+RX_TEST -vcs_run_args=+no_verilog_finish >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -midas_args=-DRX_TEST -midas_args=-DTX_TEST >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING  -midas_args=-DENABLE_PCIE_LINK_TRAINING >

<runargs -midas_args=-DTHREAD_COUNT=2 >
<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 >
<runargs -midas_args=-DTHREAD_0_DIAG=niu/NIU_Tx/FcNiuBasicTx.s >
<runargs -midas_args=-DTHREAD_1_DIAG=niu/NIU_Rx/FcNiuBasicRx_sweep1.s >
<runargs -midas_args=-DMAIN_PAGE_HV_ALSO >

Fc_MT_NIUTx_NIURx	mt_template.s

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>

</fc_ldst_dma>
// ****************************************************************************
// 10G -> MAC0 -> NIU Tx + PEU PCIeDMAWr
// ****************************************************************************

<runargs -sas >
<runargs -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+ORIG_META >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+TX_TEST >
<runargs -vcs_run_args=+PEU_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES > 
<runargs -midas_args=-DTX_TEST >
<runargs -midas_args=-DENABLE_PCIE_LINK_TRAINING -midas_args=-DDMA_DATA_ADDR=0x0000000123456700 >
<runargs -midas_args=-DDMA_DATA_BYP_ADDR1=0xfffc000123456700 -midas_args=-DDMA_DATA_BYP_ADDR2=0xfffc000123456780 >
<runargs -midas_args=-DDMA_DATA_BYP_ADDR3=0xfffc000123456800 >

<runargs -midas_args=-DTHREAD_COUNT=2 >
<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 >
<runargs -midas_args=-DTHREAD_0_DIAG=niu/NIU_Tx/FcNiuBasicTx.s >
<runargs -midas_args=-DTHREAD_1_DIAG=peu/PCIeDMAWr.s >
<runargs -midas_args=-DMAIN_PAGE_HV_ALSO >

Fc_MT_NIUTx_PEUDMAWr mt_template.s

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
 
// ****************************************************************************
// 10G -> MAC0 -> NIU Tx + NIU Rx + Memory.
// ****************************************************************************

// <runargs -sas >
// <runargs -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 >
// <runargs -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+ORIG_META >
// <runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+TX_TEST >
// <runargs -vcs_run_args=+RX_TEST -vcs_run_args=+no_verilog_finish >
// <runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES > 
// <runargs -midas_args=-DRX_TEST -midas_args=-DTX_TEST >
// <runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING  -midas_args=-DENABLE_PCIE_LINK_TRAINING >
// 
// <runargs -midas_args=-DTHREAD_COUNT=3 >
// <runargs -midas_args=-DCMP_THREAD_START=0x7 -finish_mask=7 >
// <runargs -midas_args=-DTHREAD_0_DIAG=niu/NIU_Tx/FcNiuBasicTx.s >
// <runargs -midas_args=-DTHREAD_1_DIAG=niu/NIU_Rx/FcNiuBasicRx_sweep1.s >
// <runargs -midas_args=-DTHREAD_2_DIAG=arch/prm/memory/memop_word_byte_mask.s >
// <runargs -midas_args=-DMAIN_PAGE_HV_ALSO >
// 
// Fc_MT_NIUTx_NIURx_Mem mt_template.s
// 
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// </runargs>
// ****************************************************************************
// 10G -> MAC0 -> NIU Tx + Rx. 
// ****************************************************************************
<runargs -sas >
<runargs -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+ORIG_META >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+TX_TEST >
<runargs -vcs_run_args=+RX_TEST -vcs_run_args=+no_verilog_finish >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -midas_args=-DRX_TEST -midas_args=-DTX_TEST >
<runargs -vcs_run_args=+USE_RANDOM_ADDRESS>
<runargs  -vcs_run_args=+RXWRITE_TIMEOUT=20000>
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING  -midas_args=-DENABLE_PCIE_LINK_TRAINING >

<runargs -midas_args=-DTHREAD_COUNT=2 >
<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 >

//#ifndef NIU_SYSTEMC_T2
Fc_MT_NIUTx_NIURx_rand	txrxrand_1.s -midas_args=-DRXMAC_PKTCNT=0x60 -vcs_run_args=+RXMAC_PKTCNT=96
Fc_MT_NIU_wrm	txrxrand_wrm.s -midas_args=-DRXMAC_PKTCNT=0x30 -vcs_run_args=+RXMAC_PKTCNT=48
Fc_MT_NIU_wrm_macp txrxrand_wrm_macp.s -midas_args=-DRXMAC_PKTCNT=0x30 -vcs_run_args=+RXMAC_PKTCNT=48
//#endif

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>

</Fc_MT>