// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: fc_crc_err.diaglist // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ //NB n2_crc_err_adv_mcu___MCU0_NB_FBR_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_ENABLE -midas_args=-DCRC_RE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC n2_crc_err_adv_mcu___MCU0_NB_FBU_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_ENABLE -vcs_run_args=+MCU0_INJECT_FBU_ERR -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_RE -midas_args=-DCRC_NB //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_NB //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_NB -vcs_run_args=+DUMP_CRC n2_crc_err_adv_mcu___MCU0_NB_FBR_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_NB //n2_crc_err_adv_mcu___MCU0_NB_FBU_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_NB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_NB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_NB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC //SB n2_crc_err_adv_mcu___MCU0_SB_FBR_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_ENABLE -midas_args=-DCRC_RE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC //n2_crc_err_adv_mcu___MCU0_SB_FBU_ENABLE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_ENABLE -vcs_run_args=+MCU0_INJECT_FBU_ERR -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC //n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_RE -midas_args=-DCRC_SB //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MBIT n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -midas_args=-DCRC_UE -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -midas_args=-DCRC_SB -vcs_run_args=+DUMP_CRC //n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_SB //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC n2_crc_err_adv_mcu___MCU0_SB_FBR_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_RE -midas_args=-DCRC_SB //n2_crc_err_adv_mcu___MCU0_SB_FBU_RANDOM_MBIT_MLANE n2_err_adv_mcu_trap_h.s -vcs_run_args=+MCU0_SB_ERR_RANDOM -vcs_run_args=+MCU0_INJECT_FBU_ERR -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_BIT_TIMES -vcs_run_args=+MCU0_SB_CRC_MULTIPLE_LANES -midas_args=-DCRC_UE -midas_args=-DCRC_SB -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -start_dump=14000000 -vcs_run_args=+DUMP_FBDIMM -vcs_run_args=+DUMP_MON -vcs_run_args=+DUMP_CRC