// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: fc_ecc_err.diaglist // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ //n2_ecc_err_adv_mcu___SCRUB_CE n2_err_adv_mcu_scrub_trap_h.s -midas_args=-DSCRUB_CE //n2_ecc_err_adv_mcu___SCRUB_UE n2_err_adv_mcu_scrub_trap_h.s -midas_args=-DSCRUB_UE //n2_ecc_err_adv_mcu___IMISS_CE n2_err_adv_mcu_icache_miss_trap_h.s -midas_args=-DECC_CE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+1BIT_DATA_ERROR -vcs_run_args=+FLIP4 //n2_ecc_err_adv_mcu___IMISS_UE n2_err_adv_mcu_icache_miss_trap_h.s -midas_args=-DECC_UE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+MULTI_BIT_DATA_ERROR -vcs_run_args=+FLIP4 //OLD CE and UE n2_ecc_err_adv_mcu___CE_CHNL0 n2_err_adv_mcu_trap_h.s -midas_args=-DECC_CE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+1BIT_DATA_ERROR -vcs_run_args=+FLIP2 n2_ecc_err_adv_mcu___CE_CHNL1 n2_err_adv_mcu_trap_h.s -midas_args=-DECC_CE -vcs_run_args=+CHNL1_ERR_ENABLE -vcs_run_args=+1BIT_DATA_ERROR -vcs_run_args=+FLIP3 n2_ecc_err_adv_mcu___UE_CHNL0 n2_err_adv_mcu_trap_h.s -midas_args=-DECC_UE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+MULTI_BIT_DATA_ERROR -vcs_run_args=+FLIP1 n2_ecc_err_adv_mcu___UE_CHNL1 n2_err_adv_mcu_trap_h.s -midas_args=-DECC_UE -vcs_run_args=+CHNL1_ERR_ENABLE -vcs_run_args=+MULTI_BIT_DATA_ERROR -vcs_run_args=+FLIP4 //NEW CE n2_ecc_err_adv_mcu___CE_QUADWORD_1_ON_WRITE_ON_DATA n2_err_adv_mcu_trap_h.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=1 -vcs_run_args=+ON_WRITE_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___CE_QUADWORD_2_ON_WRITE_ON_ECC n2_err_adv_mcu_trap_h.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=2 -vcs_run_args=+ON_ECC_NEW -vcs_run_args=+ON_WRITE_NEW n2_ecc_err_adv_mcu___CE_QUADWORD_3_ON_READ_ON_DATA n2_err_adv_mcu_trap_h.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=3 n2_ecc_err_adv_mcu___CE_QUADWORD_4_ON_READ_ON_ECC n2_err_adv_mcu_trap_h.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=4 -vcs_run_args=+ON_ECC_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 //NEW UE n2_ecc_err_adv_mcu___UE_QUADWORD_1_ON_WRITE_ON_DATA n2_err_adv_mcu_trap_h.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=1 -vcs_run_args=+ON_WRITE_NEW n2_ecc_err_adv_mcu___UE_QUADWORD_2_ON_WRITE_ON_ECC n2_err_adv_mcu_trap_h.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=2 -vcs_run_args=+ON_ECC_NEW -vcs_run_args=+ON_WRITE_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___UE_QUADWORD_3_ON_READ_ON_DATA n2_err_adv_mcu_trap_h.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=3 -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___UE_QUADWORD_4_ON_READ_ON_ECC n2_err_adv_mcu_trap_h.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=4 -vcs_run_args=+ON_ECC_NEW // //OLD CE and UE n2_ecc_err_adv_mcu___CE_CHNL0_MT n2_err_adv_mcu_trap_h_31T.s -midas_args=-DECC_CE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+1BIT_DATA_ERROR -vcs_run_args=+FLIP2 n2_ecc_err_adv_mcu___CE_CHNL1_MT n2_err_adv_mcu_trap_h_31T.s -midas_args=-DECC_CE -vcs_run_args=+CHNL1_ERR_ENABLE -vcs_run_args=+1BIT_DATA_ERROR -vcs_run_args=+FLIP3 n2_ecc_err_adv_mcu___UE_CHNL0_MT n2_err_adv_mcu_trap_h_31T.s -midas_args=-DECC_UE -vcs_run_args=+CHNL0_ERR_ENABLE -vcs_run_args=+MULTI_BIT_DATA_ERROR -vcs_run_args=+FLIP1 n2_ecc_err_adv_mcu___UE_CHNL1_MT n2_err_adv_mcu_trap_h_31T.s -midas_args=-DECC_UE -vcs_run_args=+CHNL1_ERR_ENABLE -vcs_run_args=+MULTI_BIT_DATA_ERROR -vcs_run_args=+FLIP4 //NEW CE n2_ecc_err_adv_mcu___CE_QUADWORD_1_ON_WRITE_ON_DATA_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=1 -vcs_run_args=+ON_WRITE_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___CE_QUADWORD_2_ON_WRITE_ON_ECC_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=2 -vcs_run_args=+ON_ECC_NEW -vcs_run_args=+ON_WRITE_NEW n2_ecc_err_adv_mcu___CE_QUADWORD_3_ON_READ_ON_DATA_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=3 n2_ecc_err_adv_mcu___CE_QUADWORD_4_ON_READ_ON_ECC_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+ONE_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_CE -vcs_run_args=+QUADWORD_NEW=4 -vcs_run_args=+ON_ECC_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 //NEW UE n2_ecc_err_adv_mcu___UE_QUADWORD_1_ON_WRITE_ON_DATA_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=1 -vcs_run_args=+ON_WRITE_NEW n2_ecc_err_adv_mcu___UE_QUADWORD_2_ON_WRITE_ON_ECC_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=2 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=2 -vcs_run_args=+ON_ECC_NEW -vcs_run_args=+ON_WRITE_NEW -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___UE_QUADWORD_3_ON_READ_ON_DATA_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=3 -debussy -vcs_run_args=+DUMP_LIMIT -vcs_run_args=+DUMP_ENV -vcs_run_args=+DUMP_MCU0 -vcs_run_args=+DUMP_MON -start_dump=14000000 n2_ecc_err_adv_mcu___UE_QUADWORD_4_ON_READ_ON_ECC_MT n2_err_adv_mcu_trap_h_31T.s -vcs_run_args=+MULTI_NIBBLE_ERROR -vcs_run_args=+FLIP_NEW=3 -midas_args=-DECC_UE -vcs_run_args=+QUADWORD_NEW=4 -vcs_run_args=+ON_ECC_NEW