// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: fc_cov_intf_ver_defines.vrhpal // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #define NCU_PER_REG 40'h8000003028 #define PCX_PKT_LOAD 5'b00000 #define PCX_LOAD_8BYTE 8'h3 #define CPX_PKT_LOAD_RTN 4'b1000 //----------PCX------------------- reg [10:0] pcx_int_clk_cnt; reg pcx_int_flag = 0; reg [63:0] spc_pcx_int_cpu_thr_reg=0; reg [63:0] pcx_int_des_cpu_thr_reg=0; event spc_ccx_intf_event; //----------CPX------------------- reg [5:0] spc_cpx_cpu_thr_id=0; reg [5:0] spc_cpx_int_vec=0; reg [10:0] spc_cpx_int_cnt=0; reg [63:0] cpx_spc_int_cpu_thr_reg=0; reg [7:0] int_des_clk_cnt_en=0; reg [7:0] int_des_clk_cnt=0; reg [63:0] int_des_cpu_thr_reg = 1;