// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: ccx_cpx_req_sample.vrhpal // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ state allbanks_core0(72'h01010101_01010101_00); state allbanks_core1(72'h02020202_02020202_00); state allbanks_core2(72'h04040404_04040404_00); state allbanks_core3(72'h08080808_08080808_00); state allbanks_core4(72'h10101010_10101010_00); state allbanks_core5(72'h20202020_20202020_00); state allbanks_core6(72'h40404040_40404040_00); state allbanks_core7(72'h80808080_80808080_00); // 2-packet requests state allbanks_core0_atom(72'h01010101_01010101_ff); state allbanks_core1_atom(72'h02020202_02020202_ff); state allbanks_core2_atom(72'h04040404_04040404_ff); state allbanks_core3_atom(72'h08080808_08080808_ff); state allbanks_core4_atom(72'h10101010_10101010_ff); state allbanks_core5_atom(72'h20202020_20202020_ff); state allbanks_core6_atom(72'h40404040_40404040_ff); state allbanks_core7_atom(72'h80808080_80808080_ff); // }