// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: ccxl2_intf_pcx_req_window_sample.vrhpal
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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    state allcores_bank0_clk(128'h01010101_01010101_00000000_00000000);
    state allcores_bank1_clk(128'h02020202_02020202_00000000_00000000);
    state allcores_bank2_clk(128'h04040404_04040404_00000000_00000000);
    state allcores_bank3_clk(128'h08080808_08080808_00000000_00000000);
    state allcores_bank4_clk(128'h10101010_10101010_00000000_00000000);
    state allcores_bank5_clk(128'h20202020_20202020_00000000_00000000);
    state allcores_bank6_clk(128'h40404040_40404040_00000000_00000000);
    state allcores_bank7_clk(128'h80808080_80808080_00000000_00000000);

    // 2-packet requests

    state allcores_bank0_atom_clk(128'h01010101_01010101_01010101_01010101);
    state allcores_bank1_atom_clk(128'h02020202_02020202_02020202_02020202);
    state allcores_bank2_atom_clk(128'h04040404_04040404_04040404_04040404);
    state allcores_bank3_atom_clk(128'h08080808_08080808_08080808_08080808);
    state allcores_bank4_atom_clk(128'h10101010_10101010_10101010_10101010);
    state allcores_bank5_atom_clk(128'h20202020_20202020_20202020_20202020);
    state allcores_bank6_atom_clk(128'h40404040_40404040_40404040_40404040);
    state allcores_bank7_atom_clk(128'h80808080_80808080_80808080_80808080);



// #endif

// }