// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: l2_dir_write_sample.vrhpal
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
    wildcard state idir_panel_00( {1'b1, 4'h0, 4'bx, 10'bx} );
    wildcard state idir_panel_01( {1'b1, 4'h1, 4'bx, 10'bx} );
    wildcard state idir_panel_02( {1'b1, 4'h2, 4'bx, 10'bx} );
    wildcard state idir_panel_03( {1'b1, 4'h3, 4'bx, 10'bx} );
    wildcard state idir_panel_04( {1'b1, 4'h4, 4'bx, 10'bx} );
    wildcard state idir_panel_05( {1'b1, 4'h5, 4'bx, 10'bx} );
    wildcard state idir_panel_06( {1'b1, 4'h6, 4'bx, 10'bx} );
    wildcard state idir_panel_07( {1'b1, 4'h7, 4'bx, 10'bx} );
    wildcard state idir_panel_08( {1'b1, 4'h8, 4'bx, 10'bx} );
    wildcard state idir_panel_09( {1'b1, 4'h9, 4'bx, 10'bx} );
    wildcard state idir_panel_10( {1'b1, 4'ha, 4'bx, 10'bx} );
    wildcard state idir_panel_11( {1'b1, 4'hb, 4'bx, 10'bx} );
    wildcard state idir_panel_12( {1'b1, 4'hc, 4'bx, 10'bx} );
    wildcard state idir_panel_13( {1'b1, 4'hd, 4'bx, 10'bx} );
    wildcard state idir_panel_14( {1'b1, 4'he, 4'bx, 10'bx} );
    wildcard state idir_panel_15( {1'b1, 4'hf, 4'bx, 10'bx} );

    wildcard state idir_entry_00( {1'b1, 4'bx, 5'h00, 10'bx} );
    wildcard state idir_entry_01( {1'b1, 4'bx, 5'h01, 10'bx} );
    wildcard state idir_entry_02( {1'b1, 4'bx, 5'h02, 10'bx} );
    wildcard state idir_entry_03( {1'b1, 4'bx, 5'h03, 10'bx} );
    wildcard state idir_entry_04( {1'b1, 4'bx, 5'h04, 10'bx} );
    wildcard state idir_entry_05( {1'b1, 4'bx, 5'h05, 10'bx} );
    wildcard state idir_entry_06( {1'b1, 4'bx, 5'h06, 10'bx} );
    wildcard state idir_entry_07( {1'b1, 4'bx, 5'h07, 10'bx} );
    wildcard state idir_entry_08( {1'b1, 4'bx, 5'h08, 10'bx} );
    wildcard state idir_entry_09( {1'b1, 4'bx, 5'h09, 10'bx} );
    wildcard state idir_entry_10( {1'b1, 4'bx, 5'h0a, 10'bx} );
    wildcard state idir_entry_11( {1'b1, 4'bx, 5'h0b, 10'bx} );
    wildcard state idir_entry_12( {1'b1, 4'bx, 5'h0c, 10'bx} );
    wildcard state idir_entry_13( {1'b1, 4'bx, 5'h0d, 10'bx} );
    wildcard state idir_entry_14( {1'b1, 4'bx, 5'h0e, 10'bx} );
    wildcard state idir_entry_15( {1'b1, 4'bx, 5'h0f, 10'bx} );
    wildcard state idir_entry_16( {1'b1, 4'bx, 5'h10, 10'bx} );
    wildcard state idir_entry_17( {1'b1, 4'bx, 5'h11, 10'bx} );
    wildcard state idir_entry_18( {1'b1, 4'bx, 5'h12, 10'bx} );
    wildcard state idir_entry_19( {1'b1, 4'bx, 5'h13, 10'bx} );
    wildcard state idir_entry_20( {1'b1, 4'bx, 5'h14, 10'bx} );
    wildcard state idir_entry_21( {1'b1, 4'bx, 5'h15, 10'bx} );
    wildcard state idir_entry_22( {1'b1, 4'bx, 5'h16, 10'bx} );
    wildcard state idir_entry_23( {1'b1, 4'bx, 5'h17, 10'bx} );
    wildcard state idir_entry_24( {1'b1, 4'bx, 5'h18, 10'bx} );
    wildcard state idir_entry_25( {1'b1, 4'bx, 5'h19, 10'bx} );
    wildcard state idir_entry_26( {1'b1, 4'bx, 5'h1a, 10'bx} );
    wildcard state idir_entry_27( {1'b1, 4'bx, 5'h1b, 10'bx} );
    wildcard state idir_entry_28( {1'b1, 4'bx, 5'h1c, 10'bx} );
    wildcard state idir_entry_29( {1'b1, 4'bx, 5'h1d, 10'bx} );
    wildcard state idir_entry_30( {1'b1, 4'bx, 5'h1e, 10'bx} );
    wildcard state idir_entry_31( {1'b1, 4'bx, 5'h1f, 10'bx} );

    wildcard state ddir_panel_00( {10'bx, 1'b1, 4'h0, 4'bx} );
    wildcard state ddir_panel_01( {10'bx, 1'b1, 4'h1, 4'bx} );
    wildcard state ddir_panel_02( {10'bx, 1'b1, 4'h2, 4'bx} );
    wildcard state ddir_panel_03( {10'bx, 1'b1, 4'h3, 4'bx} );
    wildcard state ddir_panel_04( {10'bx, 1'b1, 4'h4, 4'bx} );
    wildcard state ddir_panel_05( {10'bx, 1'b1, 4'h5, 4'bx} );
    wildcard state ddir_panel_06( {10'bx, 1'b1, 4'h6, 4'bx} );
    wildcard state ddir_panel_07( {10'bx, 1'b1, 4'h7, 4'bx} );
    wildcard state ddir_panel_08( {10'bx, 1'b1, 4'h8, 4'bx} );
    wildcard state ddir_panel_09( {10'bx, 1'b1, 4'h9, 4'bx} );
    wildcard state ddir_panel_10( {10'bx, 1'b1, 4'ha, 4'bx} );
    wildcard state ddir_panel_11( {10'bx, 1'b1, 4'hb, 4'bx} );
    wildcard state ddir_panel_12( {10'bx, 1'b1, 4'hc, 4'bx} );
    wildcard state ddir_panel_13( {10'bx, 1'b1, 4'hd, 4'bx} );
    wildcard state ddir_panel_14( {10'bx, 1'b1, 4'he, 4'bx} );
    wildcard state ddir_panel_15( {10'bx, 1'b1, 4'hf, 4'bx} );

    wildcard state ddir_entry_00( {10'bx, 1'b1, 4'bx, 5'h00} );
    wildcard state ddir_entry_01( {10'bx, 1'b1, 4'bx, 5'h01} );
    wildcard state ddir_entry_02( {10'bx, 1'b1, 4'bx, 5'h02} );
    wildcard state ddir_entry_03( {10'bx, 1'b1, 4'bx, 5'h03} );
    wildcard state ddir_entry_04( {10'bx, 1'b1, 4'bx, 5'h04} );
    wildcard state ddir_entry_05( {10'bx, 1'b1, 4'bx, 5'h05} );
    wildcard state ddir_entry_06( {10'bx, 1'b1, 4'bx, 5'h06} );
    wildcard state ddir_entry_07( {10'bx, 1'b1, 4'bx, 5'h07} );
    wildcard state ddir_entry_08( {10'bx, 1'b1, 4'bx, 5'h08} );
    wildcard state ddir_entry_09( {10'bx, 1'b1, 4'bx, 5'h09} );
    wildcard state ddir_entry_10( {10'bx, 1'b1, 4'bx, 5'h0a} );
    wildcard state ddir_entry_11( {10'bx, 1'b1, 4'bx, 5'h0b} );
    wildcard state ddir_entry_12( {10'bx, 1'b1, 4'bx, 5'h0c} );
    wildcard state ddir_entry_13( {10'bx, 1'b1, 4'bx, 5'h0d} );
    wildcard state ddir_entry_14( {10'bx, 1'b1, 4'bx, 5'h0e} );
    wildcard state ddir_entry_15( {10'bx, 1'b1, 4'bx, 5'h0f} );
    wildcard state ddir_entry_16( {10'bx, 1'b1, 4'bx, 5'h10} );
    wildcard state ddir_entry_17( {10'bx, 1'b1, 4'bx, 5'h11} );
    wildcard state ddir_entry_18( {10'bx, 1'b1, 4'bx, 5'h12} );
    wildcard state ddir_entry_19( {10'bx, 1'b1, 4'bx, 5'h13} );
    wildcard state ddir_entry_20( {10'bx, 1'b1, 4'bx, 5'h14} );
    wildcard state ddir_entry_21( {10'bx, 1'b1, 4'bx, 5'h15} );
    wildcard state ddir_entry_22( {10'bx, 1'b1, 4'bx, 5'h16} );
    wildcard state ddir_entry_23( {10'bx, 1'b1, 4'bx, 5'h17} );
    wildcard state ddir_entry_24( {10'bx, 1'b1, 4'bx, 5'h18} );
    wildcard state ddir_entry_25( {10'bx, 1'b1, 4'bx, 5'h19} );
    wildcard state ddir_entry_26( {10'bx, 1'b1, 4'bx, 5'h1a} );
    wildcard state ddir_entry_27( {10'bx, 1'b1, 4'bx, 5'h1b} );
    wildcard state ddir_entry_28( {10'bx, 1'b1, 4'bx, 5'h1c} );
    wildcard state ddir_entry_29( {10'bx, 1'b1, 4'bx, 5'h1d} );
    wildcard state ddir_entry_30( {10'bx, 1'b1, 4'bx, 5'h1e} );
    wildcard state ddir_entry_31( {10'bx, 1'b1, 4'bx, 5'h1f} );