// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: mcusat_wr_que_sample.vrhpal // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ wildcard state s_WR_REQ_DEASSRT (WR_REQ_DEASSRT ); wildcard state s_WR_REQ_ASSRT (WR_REQ_ASSRT ); wildcard state s_WR_Q_WR_PTR_DEASSRT (WR_Q_WR_PTR_DEASSRT ); wildcard state s_WR_Q_WR_PTR_ASSRT0 (WR_Q_WR_PTR_ASSRT0 ); wildcard state s_WR_Q_WR_PTR_ASSRT1 (WR_Q_WR_PTR_ASSRT1 ); wildcard state s_WR_Q_WR_PTR_ASSRT2 (WR_Q_WR_PTR_ASSRT2 ); wildcard state s_WR_Q_WR_PTR_ASSRT3 (WR_Q_WR_PTR_ASSRT3 ); wildcard state s_WR_Q_WR_PTR_ASSRT4 (WR_Q_WR_PTR_ASSRT4 ); wildcard state s_WR_Q_WR_PTR_ASSRT5 (WR_Q_WR_PTR_ASSRT5 ); wildcard state s_WR_Q_WR_PTR_ASSRT6 (WR_Q_WR_PTR_ASSRT6 ); wildcard state s_WR_Q_WR_PTR_ASSRT7 (WR_Q_WR_PTR_ASSRT7 ); wildcard state s_WR_Q_RD_PTR_DEASSRT (WR_Q_RD_PTR_DEASSRT ); wildcard state s_WR_Q_RD_PTR_ASSRT0 (WR_Q_RD_PTR_ASSRT0 ); wildcard state s_WR_Q_RD_PTR_ASSRT1 (WR_Q_RD_PTR_ASSRT1 ); wildcard state s_WR_Q_RD_PTR_ASSRT2 (WR_Q_RD_PTR_ASSRT2 ); wildcard state s_WR_Q_RD_PTR_ASSRT3 (WR_Q_RD_PTR_ASSRT3 ); wildcard state s_WR_Q_RD_PTR_ASSRT4 (WR_Q_RD_PTR_ASSRT4 ); wildcard state s_WR_Q_RD_PTR_ASSRT5 (WR_Q_RD_PTR_ASSRT5 ); wildcard state s_WR_Q_RD_PTR_ASSRT6 (WR_Q_RD_PTR_ASSRT6 ); wildcard state s_WR_Q_RD_PTR_ASSRT7 (WR_Q_RD_PTR_ASSRT7 ); wildcard state s_WR_Q_CNT0 (WR_Q_CNT0 ); wildcard state s_WR_Q_CNT1 (WR_Q_CNT1 ); wildcard state s_WR_Q_CNT2 (WR_Q_CNT2 ); wildcard state s_WR_Q_CNT3 (WR_Q_CNT3 ); wildcard state s_WR_Q_CNT4 (WR_Q_CNT4 ); wildcard state s_WR_Q_CNT5 (WR_Q_CNT5 ); wildcard state s_WR_Q_CNT6 (WR_Q_CNT6 ); wildcard state s_WR_Q_CNT7 (WR_Q_CNT7 ); wildcard state s_WR_Q_CNT8 (WR_Q_CNT8 ); wildcard state s_WR_Q_NOT_FULL (WR_Q_NOT_FULL ); wildcard state s_WR_Q_FULL (WR_Q_FULL ); wildcard state s_WR_Q_NOT_EMPTY (WR_Q_NOT_EMPTY ); wildcard state s_WR_Q_EMPTY (WR_Q_EMPTY ); wildcard state s_WR_COLPS_FIFO_NOT_EMPTY (WR_COLPS_FIFO_NOT_EMPTY); wildcard state s_WR_COLPS_FIFO_EMPTY (WR_COLPS_FIFO_EMPTY ); // }