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// 
// OpenSPARC T2 Processor File: ncu_ssi_sample.vrh
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sample ncu_ssi_size_sample (ncu_ssi_size)
{
	   state SIZE0		( 3'b000 ); 
	   state SIZE1		( 3'b001 ); 
	   state SIZE2		( 3'b010 ); 
	   state SIZE3		( 3'b011 ); 
}
sample ncu_ssi_type_sample (ncu_ssi_type)
{
           state READ_REQ  	( 4'b0100 );
           state WRITE_REQ  	( 4'b0101 );
           state IFILLED_REQ  	( 4'b0110 );
}

sample ncu_ssi_cpuid_sample (ncu_ssi_cpuid)
{
           m_state CPUID  	( 0:63 ) ;
}

#ifndef FC_COVERAGE
sample ncu_ssi_type_trans (ncu_ssi_type)
{
           state READ_REQ  	( 4'b0100 );
           state WRITE_REQ  	( 4'b0101 );
           state IFILLED_REQ  	( 4'b0110 );

	  trans TYPE_TRAN0 ("READ_REQ" -> "IFILLED_REQ");
	  trans TYPE_TRAN1 ("READ_REQ" -> "WRITE_REQ");

	  trans TYPE_TRAN2 ("WRITE_REQ" -> "READ_REQ");
	  trans TYPE_TRAN3 ("WRITE_REQ" -> "IFILLED_REQ");

	  trans TYPE_TRAN4 ("IFILLED_REQ" -> "WRITE_REQ");
	  trans TYPE_TRAN5 ("IFILLED_REQ" -> "READ_REQ");
}


sample ncu_ssi_bufid_sample (ncu_ssi_bufid)
{
           m_state BUFFID  	(0:1);
}




sample ncu_ssi_b2b_sample (ncu_ssi_b2b)
{
           m_state B2B  	( 2:5 ) ;
}

sample ncu_ssi_stall_b2b_sample (ssi_ncu_stall_b2b)
{
           m_state STALL	( 1:30) ;
}
sample ncu_ssi_pkt_gap_sample (ncu_ssi_pkt_gap)
{
           m_state PKT_GAP        ( 1:10) ;
}

cross ncu_ssi_id_type_cross(ncu_ssi_type_sample, ncu_ssi_cpuid_sample);
#endif