// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: siu_ipcc_state.vrhpal // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #define START (14'b00000000000001) #define DEC (14'b00000000000010) #define ARB (14'b00000000000100) #define HDR (14'b00000000001000) #define HDRDLY (14'b00000000010000) #define DATA1 (14'b00000000100000) #define DATA2 (14'b00000001000000) #define DATA3 (14'b00000010000000) #define DATA4 (14'b00000100000000) #define DATA5 (14'b00001000000000) #define DATA6 (14'b00010000000000) #define DATA7 (14'b00100000000000) #define DATA8 (14'b01000000000000) #define RDDW (14'b10000000000000) sample siu_ipcc_state_machine.cstate { state s_START (START); state s_DEC (DEC ); state s_ARB (ARB ); state s_HDR (HDR); state s_HDRDLY (HDRDLY); state s_DATA1 (DATA1); state s_DATA2 (DATA2); state s_DATA3 (DATA3); state s_DATA4 (DATA4); state s_DATA5 (DATA5); state s_DATA6 (DATA6); state s_DATA7 (DATA7); state s_DATA8 (DATA8); state s_RDDW (RDDW); trans t_START_START_01 (START -> START); trans t_START_DEC_02 (START -> DEC); trans t_DEC_START_03 (DEC -> START); trans t_DEC_ARB_04 (DEC -> ARB); trans t_ARB_START_05 (ARB -> START); trans t_ARB_HDR_06 (ARB -> HDR); trans t_HDR_HDRDLY_07 (HDR -> HDRDLY ); trans t_HDRDLY_DATA1_09 (HDRDLY -> DATA1); trans t_HDRDLY_RDDW_10 (HDRDLY -> RDDW); trans t_RDDW_START_11 (RDDW -> START ); trans t_DATA1_DATA2_13 (DATA1 -> DATA2); trans t_DATA2_START_14 (DATA2 -> START); trans t_DATA2_DATA2_15 (DATA2 -> DATA3); trans t_DATA3_DATA4_16 (DATA3 -> DATA4); trans t_DATA4_DATA5_17 (DATA4 -> DATA5); trans t_DATA5_DATA6_18 (DATA5 -> DATA6); trans t_DATA6_DATA7_19 (DATA6 -> DATA7); trans t_DATA7_DATA8_20 (DATA7 -> DATA8); trans t_DATA8_START_21 (DATA8 -> START); // bad transitions bad_trans t_HDRDLY_START_08 (HDRDLY -> START); bad_trans t_DATA1_START_12 (DATA1 -> START); }