// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: MCUStub.bind.vrh // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #ifndef INC__MCUSTUB_PORTS_BINDS_VRH #define INC__MCUSTUB_PORTS_BINDS_VRH // these signals are shared between banks // so you have to have 2 MCUs share them. // Every 2 MCU BFMs will share this. 0,1 2,3 4,5 6,7 port mcu_data_port { mcu_l2b_data_r2; // shared mcu_l2b_ecc_r2; // shared } port mcu_port { clk; //read signals //inputs l2t_mcu_rd_req; l2t_mcu_addr; l2t_mcu_addr_5; l2t_mcu_rd_req_id; l2t_mcu_rd_dummy_req; //outputs mcu_l2t_rd_ack; mcu_l2t_rd_req_id_r0; mcu_l2t_data_vld_r0; mcu_l2t_qword_id_r0; mcu_l2t_secc_err_r2; mcu_l2t_mecc_err_r2; mcu_l2t_scb_secc_err; mcu_l2t_scb_mecc_err; //write signals //inputs l2t_mcu_wr_req; l2b_mcu_data_vld_r5; l2b_mcu_wr_data_r5; //outputs mcu_l2t_wr_ack; } #ifndef RTL_NO_BNK01 bind mcu_data_port mcu_bind_data_01 { mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_01;// shared mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_01; // shared } bind mcu_port mcu_bind_0 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_0; l2t_mcu_addr mcustub_if.l2t_mcu_addr_0; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_0; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_0; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_0; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_0; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_0; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_0; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_0; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_0; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_0; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_0; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_0; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_0; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_0; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_0; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_0; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_0; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_0; } bind mcu_port mcu_bind_1 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_1; l2t_mcu_addr mcustub_if.l2t_mcu_addr_1; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_1; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_1; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_1; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_1; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_1; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_1; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_1; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_1; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_1; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_1; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_1; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_1; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_1; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_1; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_1; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_1; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_1; } #endif #ifndef RTL_NO_BNK23 bind mcu_data_port mcu_bind_data_23 { mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_23;// shared mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_23; // shared } bind mcu_port mcu_bind_2 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_2; l2t_mcu_addr mcustub_if.l2t_mcu_addr_2; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_2; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_2; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_2; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_2; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_2; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_2; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_2; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_2; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_2; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_2; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_2; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_2; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_2; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_2; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_2; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_2; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_2; } bind mcu_port mcu_bind_3 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_3; l2t_mcu_addr mcustub_if.l2t_mcu_addr_3; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_3; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_3; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_3; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_3; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_3; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_3; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_3; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_3; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_3; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_3; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_3; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_3; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_3; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_3; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_3; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_3; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_3; } #endif #ifndef RTL_NO_BNK45 bind mcu_data_port mcu_bind_data_45 { mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_45;// shared mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_45; // shared } bind mcu_port mcu_bind_4 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_4; l2t_mcu_addr mcustub_if.l2t_mcu_addr_4; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_4; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_4; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_4; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_4; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_4; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_4; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_4; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_4; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_4; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_4; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_4; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_4; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_4; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_4; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_4; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_4; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_4; } bind mcu_port mcu_bind_5 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_5; l2t_mcu_addr mcustub_if.l2t_mcu_addr_5; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_5; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_5; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_5; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_5; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_5; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_5; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_5; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_5; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_5; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_5; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_5; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_5; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_5; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_5; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_5; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_5; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_5; } #endif #ifndef RTL_NO_BNK67 bind mcu_data_port mcu_bind_data_67 { mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_67;// shared mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_67; // shared } bind mcu_port mcu_bind_6 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_6; l2t_mcu_addr mcustub_if.l2t_mcu_addr_6; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_6; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_6; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_6; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_6; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_6; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_6; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_6; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_6; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_6; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_6; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_6; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_6; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_6; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_6; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_6; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_6; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_6; } bind mcu_port mcu_bind_7 { clk mcustub_if.clk; //read signals //inputs l2t_mcu_rd_req mcustub_if.l2t_mcu_rd_req_7; l2t_mcu_addr mcustub_if.l2t_mcu_addr_7; l2t_mcu_addr_5 mcustub_if.l2t_mcu_addr_5_7; l2t_mcu_rd_req_id mcustub_if.l2t_mcu_rd_req_id_7; l2t_mcu_rd_dummy_req mcustub_if.l2t_mcu_rd_dummy_req_7; //outputs mcu_l2t_rd_ack mcustub_if.mcu_l2t_rd_ack_7; mcu_l2t_rd_req_id_r0 mcustub_if.mcu_l2t_rd_req_id_r0_7; mcu_l2t_data_vld_r0 mcustub_if.mcu_l2t_data_vld_r0_7; // mcu_l2b_data_r2 mcustub_if.mcu_l2b_data_r2_7; mcu_l2t_qword_id_r0 mcustub_if.mcu_l2t_qword_id_r0_7; // mcu_l2b_ecc_r2 mcustub_if.mcu_l2b_ecc_r2_7; mcu_l2t_secc_err_r2 mcustub_if.mcu_l2t_secc_err_r2_7; mcu_l2t_mecc_err_r2 mcustub_if.mcu_l2t_mecc_err_r2_7; mcu_l2t_scb_secc_err mcustub_if.mcu_l2t_scb_secc_err_7; mcu_l2t_scb_mecc_err mcustub_if.mcu_l2t_scb_mecc_err_7; //write signals //inputs l2t_mcu_wr_req mcustub_if.l2t_mcu_wr_req_7; l2b_mcu_data_vld_r5 mcustub_if.evict_l2b_mcu_data_vld_r5_7; l2b_mcu_wr_data_r5 mcustub_if.evict_l2b_mcu_wr_data_r5_7; //outputs mcu_l2t_wr_ack mcustub_if.mcu_l2t_wr_ack_7; } #endif // EOF #endif