// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: niu_intr_memory_map.vri // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #define PIO_LDSV 'h80_0000 #define PIO_LDGIM 'h90_0000 #define PIO_IMASK0 'hA0_0000 #define PIO_IMASK1 'hB0_0000 #define FZC_PIO 'h08_0000 #define PCIE_LDG_NUM FZC_PIO + 'h2_0000 #define PCIE_LD_SV0 PIO_LDSV #define PCIE_LD_SV1 PIO_LDSV + 'h8 #define PCIE_LD_SV2 PIO_LDSV + 'h10 #define PCIE_LD_IM0 PIO_IMASK0 #define PCIE_LD_IM1 PIO_IMASK1 #define PCIE_LDGIMGN PIO_LDSV + 'h18 #define INTR_SID FZC_PIO + 'h1_0200