// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: pc_db.vr // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ class pc_db { bit [10:0] info_ram_ptr[]; // IBTP info_ram addr bit [10:0] rdmaw_offset[]; // bit [1:0] rdmaw_type[]; // bit se[]; // bit [4:0] ibtp_opcode[]; // bit [13:0] end_pkt_ptr[]; // bit [13:0] start_pkt_ptr[]; // bit rtnptr_flag[]; // bit ack_req[]; // bit [7:0] qp_num[]; // MSB alwys 0 Extra bit bit [7:0] opcode[]; bit [7:0] syndrome[]; bit [15:0] payload_len[]; // SQM payload_len bit [23:0] msn[]; bit [23:0] psn[]; bit [229:0] qr_data[]; bit [111:0] ir_data[]; bit [111:0] ir_data1[]; bit [3:0] vl[]; bit [127:0] cw[]; bit done_tbs[]; integer obs_tbs[]; integer pc_port[]; integer packet_len[]; integer bmc_error[]; // This is a request to insert bmc error integer bmc_error_done[]; // This is a ack that bmc error is inserted sucessfully bit qp_perr[]; integer error_action[]; integer pkt_done[]; bit [7:0] bktcount[]; integer data_length[]; bit sqm_error[]; integer num_of_lines[]; bit data_fifo_error[]; integer bmc_error_count[]; bit bkt_err[]; bit bad_opcode[]; bit got_tag[]; bit rtn_bkt_done[]; task new(){ info_ram_ptr[0] = 11'h0_00; rdmaw_offset[0] = 11'h0_00; rdmaw_type[0] = 2'b00; se[0] = 1'b0; ibtp_opcode[0] = 5'h00; end_pkt_ptr[0] = 14'h0000; start_pkt_ptr[0] = 14'h0000; rtnptr_flag[0] = 1'b0; ack_req[0] = 1'b0; qp_num[0] = 8'h00; opcode[0] = 8'h00; syndrome[0] = 8'h00; payload_len[0] = 16'h0000; msn[0] = 24'h00_0000; psn[0] = 24'h00_0000; qr_data[0] = 0; ir_data[0] = 0; ir_data1[0] = 0; vl[0] = 4'b0000; pc_port[0] = 0; packet_len[0] = 0; bmc_error[0] = 0; bmc_error_done[0] = 0; qp_perr[0] = 1'b1; error_action[0] = 0; //NONE ( OR NO_ERROR) pkt_done[0] = 0; bktcount[0] = 0; cw[0] = 0; obs_tbs[0] = 0; done_tbs[0] = 0; data_length[0] = 100000000; // Dirty work required for // old test to work sorry!!! sudhir sqm_error[0] = 0; num_of_lines[0] = 0; data_fifo_error[0] = 0; bmc_error_count[0] = 0; bkt_err[0] = 0; bad_opcode[0] = 0; got_tag[0] = 0; rtn_bkt_done[0] = 0; } }