// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: report_verilog_tasks.vrh
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#ifndef _REPORT_VERILOG_TASKS_INC
#define _REPORT_VERILOG_TASKS_INC

// Class variable accessors
verilog_task ReportPLI_set_global_print_threshold(integer new_print_threshold, integer locked_by) "report_verilog_tasks.report_verilog_set_global_print_threshold";
verilog_task ReportPLI_set_max_error_count(integer max_error_count) "report_verilog_tasks.report_verilog_set_max_error_count";
verilog_task ReportPLI_inc_global_error_count() "report_verilog_tasks.report_verilog_inc_global_error_count";
verilog_task ReportPLI_get_global_error_count(var integer ec) "report_verilog_tasks.report_verilog_get_global_error_count";
verilog_task ReportPLI_inc_global_warning_count() "report_verilog_tasks.report_verilog_inc_global_warning_count";
verilog_task ReportPLI_get_global_warning_count(var integer wc) "report_verilog_tasks.report_verilog_get_global_warning_count";
verilog_task ReportPLI_set_short_pathnames(integer short_names) "report_verilog_tasks.report_verilog_set_short_pathnames";
verilog_task ReportPLI_set_path_prefix(bit [(256*8)-1:0] path_prefix) "report_verilog_tasks.report_verilog_set_path_prefix";
verilog_task ReportPLI_disable_fatal_errors(integer num_cycles) "report_verilog_tasks.report_verilog_disable_fatal_errors";
verilog_task ReportPLI_set_show_simulation_time(integer show_sim_time) "report_verilog_tasks.report_verilog_set_show_simulation_time";
verilog_task ReportPLI_set_exit_on_error(integer exit_on_error) "report_verilog_tasks.report_verilog_set_exit_on_error";
verilog_task ReportPLI_get_exit_on_error(var integer exit_on_error) "report_verilog_tasks.report_verilog_get_exit_on_error";

// Instance variable accessors
verilog_task ReportPLI_set_print_level(bit [(256*8)-1:0] regexp, integer report_type, integer print_level) "report_verilog_tasks.report_verilog_set_print_level";
verilog_task ReportPLI_set_error_level(bit [(256*8)-1:0] regexp, integer report_type, integer error_level) "report_verilog_tasks.report_verilog_set_error_level";
verilog_task ReportPLI_set_table_mode(bit [(256*8)-1:0] regexp, integer report_type, integer table_mode) "report_verilog_tasks.report_verilog_set_table_mode";

verilog_task ReportPLI_set_default_print_level(integer report_type, integer print_level) "report_verilog_tasks.report_verilog_set_default_print_level";
verilog_task ReportPLI_set_default_error_level(integer report_type, integer error_level) "report_verilog_tasks.report_verilog_set_default_error_level";
verilog_task ReportPLI_set_default_table_mode(integer report_type, integer table_mode)   "report_verilog_tasks.report_verilog_set_default_table_mode";

// Other tasks
verilog_task ReportPLI_print_cycles_per_second() "report_verilog_tasks.report_verilog_print_cycles_per_second";

#endif