// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: ilupeu_defines.vri // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #ifndef INC_ILUPEU_DEFINES_VRI #define INC_ILUPEU_DEFINES_VRI #define ILUPEU_DL_INACTIVE 3'b001 #define ILUPEU_DL_INIT 3'b010 #define ILUPEU_DL_ACTIVE 3'b100 #define ILUPEU_LINK_DOWN 1'b0 #define ILUPEU_LINK_UP 1'b1 #define ILUPEU_FC_IDLE 2'b00 #define ILUPEU_FC_INIT1 2'b01 #define ILUPEU_FC_INIT2 2'b11 #define ILUPEU_FC_INIT_DONE 2'b10 #define ILUPEU_LANE_REVERSED 1'b1 #define ILUPEU_LANE_NOT_REVERSED 1'b0 #define ILUPEU_LINK_WIDTH_X1 4'b0000 #define ILUPEU_LINK_WIDTH_X2 4'b0001 #define ILUPEU_LINK_WIDTH_X4 4'b0011 #define ILUPEU_LINK_WIDTH_X8 4'b0111 //PEU definitions from xmlh_ltssm.v #define ILUPEU_LTSSM_DETECT_QUIET 5'h00 #define ILUPEU_LTSSM_DETECT_ACT 5'h01 #define ILUPEU_LTSSM_POLL_ACTIVE 5'h02 #define ILUPEU_LTSSM_POLL_COMPLIANCE 5'h03 #define ILUPEU_LTSSM_POLL_CONFIG 5'h04 #define ILUPEU_LTSSM_PRE_DETECT_QUIET 5'h05 #define ILUPEU_LTSSM_DETECT_WAIT 5'h06 #define ILUPEU_LTSSM_CFG_LINKWD_START 5'h07 #define ILUPEU_LTSSM_CFG_LINKWD_ACEPT 5'h08 #define ILUPEU_LTSSM_CFG_LANENUM_WAIT 5'h09 #define ILUPEU_LTSSM_CFG_LANENUM_ACEPT 5'h0A #define ILUPEU_LTSSM_CFG_COMPLETE 5'h0B #define ILUPEU_LTSSM_CFG_IDLE 5'h0C #define ILUPEU_LTSSM_RCVRY_RCVRLOCK 5'h0D #define ILUPEU_LTSSM_RCVRY_RCVRCFG 5'h0E #define ILUPEU_LTSSM_RCVRY_IDLE 5'h0F #define ILUPEU_LTSSM_L0 5'h10 #define ILUPEU_LTSSM_L0S 5'h11 #define ILUPEU_LTSSM_L123_SEND_EIDLE 5'h12 #define ILUPEU_LTSSM_L1_IDLE 5'h13 #define ILUPEU_LTSSM_L2_IDLE 5'h14 #define ILUPEU_LTSSM_L2_WAKE 5'h15 #define ILUPEU_LTSSM_DISABLED_ENTRY 5'h16 #define ILUPEU_LTSSM_DISABLED_IDLE 5'h17 #define ILUPEU_LTSSM_DISABLED 5'h18 #define ILUPEU_LTSSM_LPBK_ENTRY 5'h19 #define ILUPEU_LTSSM_LPBK_ACTIVE 5'h1A #define ILUPEU_LTSSM_LPBK_EXIT 5'h1B #define ILUPEU_LTSSM_LPBK_EXIT_TIMEOUT 5'h1C #define ILUPEU_LTSSM_HOT_RESET_ENTRY 5'h1D #define ILUPEU_LTSSM_HOT_RESET 5'h1F //#define ILUPEU_LTSSM_DETECT_QUIET 5'h00 //#define ILUPEU_LTSSM_DETECT_ACTIVE 5'h01 //#define ILUPEU_LTSSM_DETECT_CHARGE 5'h02 //#define ILUPEU_LTSSM_POLLING_QUIET 5'h03 //#define ILUPEU_LTSSM_POLLING_ACTIVE 5'h04 //#define ILUPEU_LTSSM_POLLING_COMPL 5'h05 //#define ILUPEU_LTSSM_POLLING_CONFIG 5'h06 //#define ILUPEU_LTSSM_POLLING_SPEED 5'h07 //#define ILUPEU_LTSSM_CONFIG_RCVRCFG 5'h08 //#define ILUPEU_LTSSM_CONFIG_IDLE 5'h09 //#define ILUPEU_LTSSM_RECOVERY_RCVRLOCK 5'h0a //#define ILUPEU_LTSSM_RECOVERY_RCVRCFG 5'h0b //#define ILUPEU_LTSSM_RECOVERY_IDLE 5'h0c //#define ILUPEU_LTSSM_L0 5'h0d //#define ILUPEU_LTSSM_L0S_RXE 5'h0e //#define ILUPEU_LTSSM_L0S_RXI 5'h0f //Standard CSR width #define ILUPEU_CSR_WIDTH 64 #define ILUPEU_FAST_LINK_TRAIN_TO 15000 #define ILUPEU_DEFAULT_LINK_TRAIN_TO 10000000 //Default Retry Credits #define ILUPEU_DEFAULT_RETRY_CREDITS 16'h1580 //Defines for Ingress/Egress #define ILUPEU_INGRESS_TRANS 1 #define ILUPEU_EGRESS_TRANS 0 //Defines for Strategy Encodings #define ILUPEU_TLP_STRAT_ENC 0 #define ILUPEU_DLLP_FC_STRAT_ENC 1 #define ILUPEU_DLLP_PM_STRAT_ENC 2 //review - Need a new define file for testbench once its working // // File name : LPUXtrComponentsDefine.vri // // Description: All LPU Transactor #defines live in this file. // // // Revision History : // 04/10/02 filliate : Original File Created // 08/28/02 Modified for LPU // // ************************************************************************* #define ILUPEU_TRUE 1 #define ILUPEU_FALSE 0 // TLP Field Acquisition Defines #define ILUPEU_TLP_TYPE_QUAD_LOC 0 #define ILUPEU_TLP_TYPE_BITS 30:24 #define ILUPEU_TLP_TC_QUAD_LOC 0 #define ILUPEU_TLP_TC_BITS 22:20 #define ILUPEU_TLP_DATASIZE_QUAD_LOC 0 #define ILUPEU_TLP_DATASIZE_BITS 9:0 // TLP Type Encodings #define ILUPEU_TLP_FMT_TYPE_MRD32 7'b_00_00000 #define ILUPEU_TLP_FMT_TYPE_MRD64 7'b_01_00000 #define ILUPEU_TLP_FMT_TYPE_MRDLK32 7'b_00_00001 #define ILUPEU_TLP_FMT_TYPE_MRDLK64 7'b_01_00001 #define ILUPEU_TLP_FMT_TYPE_MWR32 7'b_10_00000 #define ILUPEU_TLP_FMT_TYPE_MWR64 7'b_11_00000 #define ILUPEU_TLP_FMT_TYPE_IORD 7'b_00_00010 #define ILUPEU_TLP_FMT_TYPE_IOWR 7'b_10_00010 #define ILUPEU_TLP_FMT_TYPE_CFGRD0 7'b_00_00100 #define ILUPEU_TLP_FMT_TYPE_CFGWR0 7'b_10_00100 #define ILUPEU_TLP_FMT_TYPE_CFGRD1 7'b_00_00101 #define ILUPEU_TLP_FMT_TYPE_CFGWR1 7'b_10_00101 #define ILUPEU_TLP_FMT_TYPE_MSG0 7'b_01_10000 #define ILUPEU_TLP_FMT_TYPE_MSG1 7'b_01_10001 #define ILUPEU_TLP_FMT_TYPE_MSG2 7'b_01_10010 #define ILUPEU_TLP_FMT_TYPE_MSG3 7'b_01_10011 #define ILUPEU_TLP_FMT_TYPE_MSG4 7'b_01_10100 #define ILUPEU_TLP_FMT_TYPE_MSG5 7'b_01_10101 #define ILUPEU_TLP_FMT_TYPE_MSG6 7'b_01_10110 #define ILUPEU_TLP_FMT_TYPE_MSG7 7'b_01_10111 #define ILUPEU_TLP_FMT_TYPE_MSGD0 7'b_11_10000 #define ILUPEU_TLP_FMT_TYPE_MSGD1 7'b_11_10001 #define ILUPEU_TLP_FMT_TYPE_MSGD2 7'b_11_10010 #define ILUPEU_TLP_FMT_TYPE_MSGD3 7'b_11_10011 #define ILUPEU_TLP_FMT_TYPE_MSGD4 7'b_11_10100 #define ILUPEU_TLP_FMT_TYPE_MSGD5 7'b_11_10101 #define ILUPEU_TLP_FMT_TYPE_MSGD6 7'b_11_10110 #define ILUPEU_TLP_FMT_TYPE_MSGD7 7'b_11_10111 #define ILUPEU_TLP_FMT_TYPE_CPL 7'b_00_01010 #define ILUPEU_TLP_FMT_TYPE_CPLD 7'b_10_01010 #define ILUPEU_TLP_FMT_TYPE_CPLLK 7'b_00_01011 #define ILUPEU_TLP_FMT_TYPE_CPLDLK 7'b_10_01011 // TLP Commands #define ILUPEU_TLP_CMD_IDLE 3'b_000 #define ILUPEU_TLP_CMD_ABORT_EOP 3'b_001 #define ILUPEU_TLP_CMD_DATA 3'b_010 #define ILUPEU_TLP_CMD_DATA_EOP 3'b_011 #define ILUPEU_TLP_CMD_RESERVED_A 3'b_100 #define ILUPEU_TLP_CMD_RESERVED_B 3'b_101 #define ILUPEU_TLP_CMD_SOP_DATA 3'b_110 #define ILUPEU_TLP_CMD_SOP_DATA_EOP 3'b_111 // TLP Status #define ILUPEU_TLP_STATUS_NO_ERROR 4'b_0000 #define ILUPEU_TLP_STATUS_RECEIVE_ERROR 4'b_0001 #define ILUPEU_TLP_STATUS_CRC_ERROR 4'b_0010 #define ILUPEU_TLP_STATUS_EDB_INDICATION 4'b_0011 #define ILUPEU_TLP_STATUS_MISSING_EOP_ERROR 4'b_0100 #define ILUPEU_TLP_STATUS_PACKET_LENGTH_ERROR 4'b_0101 #define ILUPEU_TLP_STATUS_DATA_PARITY_ERROR 4'b_0110 // FC Type #define ILUPEU_FC_TYPE_IDLE 3'b_000 #define ILUPEU_FC_TYPE_INIT_COMPLETION 3'b_001 #define ILUPEU_FC_TYPE_INIT_NON_POSTED 3'b_010 #define ILUPEU_FC_TYPE_INIT_POSTED 3'b_011 #define ILUPEU_FC_TYPE_RESERVED 3'b_100 #define ILUPEU_FC_TYPE_UPDATE_COMPLETION 3'b_101 #define ILUPEU_FC_TYPE_UPDATE_NON_POSTED 3'b_110 #define ILUPEU_FC_TYPE_UPDATE_POSTED 3'b_111 #define ILUPEU_FC_HEADER_CREDIT_WIDTH 8 #define ILUPEU_FC_DATA_CREDIT_WIDTH 12 //DL Link State //review - Defined above //#define ILUPEU_LS_DL_INACTIVE 3'b001 //#define ILUPEU_LS_DL_INIT 3'b010 //#define ILUPEU_LS_DL_ACTIVE 3'b100 //Defines for 4DW 128 bit header #define ILUPEU_TLP_HDR_WIDTH 128 #define ILUPEU_TLP_HDR_DW0_BITS 127:96 #define ILUPEU_TLP_HDR_DW1_BITS 95:64 #define ILUPEU_TLP_HDR_DW2_BITS 63:32 #define ILUPEU_TLP_HDR_DW3_BITS 31:0 #define ILUPEU_TLP_HDR_BITS 127:0 #define ILUPEU_TLP_HDR_FMT_BITS 126:125 #define ILUPEU_TLP_HDR_FMT_DATA_BITS 126:126 #define ILUPEU_TLP_HDR_FMT_4DW_BITS 125:125 #define ILUPEU_TLP_HDR_TYPE_BITS 124:120 #define ILUPEU_TLP_HDR_FMT_TYPE_BITS 126:120 #define ILUPEU_TLP_HDR_TC_BITS 118:116 #define ILUPEU_TLP_HDR_TD_BITS 111:111 #define ILUPEU_TLP_HDR_EP_BITS 110:110 #define ILUPEU_TLP_HDR_ATTR_BITS 109:108 #define ILUPEU_TLP_HDR_RO_BITS 109:109 #define ILUPEU_TLP_HDR_SNOOP_BITS 108:108 #define ILUPEU_TLP_HDR_LEN_BITS 105:96 #define ILUPEU_TLP_HDR_REQ_ID_BITS 95:80 #define ILUPEU_TLP_HDR_REQ_BUS_NUM_BITS 95:88 #define ILUPEU_TLP_HDR_REQ_DEV_NUM_BITS 87:83 #define ILUPEU_TLP_HDR_REQ_FUNC_NUM_BITS 82:80 #define ILUPEU_TLP_HDR_TAG_BITS 79:72 #define ILUPEU_TLP_HDR_LAST_DWBE_BITS 71:68 #define ILUPEU_TLP_HDR_FIRST_DWBE_BITS 67:64 #define ILUPEU_TLP_HDR_MSG_CODE_BITS 71:64 #define ILUPEU_TLP_HDR_ADDR64_UPPER_BITS 63:32 #define ILUPEU_TLP_HDR_ADDR64_LOWER_BITS 31:2 #define ILUPEU_TLP_HDR_ADDR32_BITS 63:34 #define ILUPEU_TLP_HDR_CPL_ID_BITS 95:80 #define ILUPEU_TLP_HDR_CPL_CPL_BUS_NUM_BITS 95:88 #define ILUPEU_TLP_HDR_CPL_CPL_DEV_NUM_BITS 87:83 #define ILUPEU_TLP_HDR_CPL_CPL_FUNC_NUM_BITS 82:80 #define ILUPEU_TLP_HDR_CPL_STATUS_BITS 79:77 #define ILUPEU_TLP_HDR_CPL_BCM_BITS 76:76 #define ILUPEU_TLP_HDR_CPL_BYTECOUNT_BITS 75:64 #define ILUPEU_TLP_HDR_CPL_REQ_ID_BITS 63:48 #define ILUPEU_TLP_HDR_CPL_REQ_BUS_NUM_BITS 63:56 #define ILUPEU_TLP_HDR_CPL_REQ_DEV_NUM_BITS 55:51 #define ILUPEU_TLP_HDR_CPL_REQ_FUNC_NUM_BITS 50:48 #define ILUPEU_TLP_HDR_CPL_TAG_BITS 47:40 #define ILUPEU_TLP_HDR_CPL_LOWADDR_BITS 38:32 #define ILUPEU_TLP_HDR_CFG_BUS_NUM_BITS 63:56 #define ILUPEU_TLP_HDR_CFG_DEV_NUM_BITS 55:51 #define ILUPEU_TLP_HDR_CFG_FUNC_NUM_BITS 50:48 #define ILUPEU_TLP_HDR_CFG_EXT_REG_NUM_BITS 43:40 #define ILUPEU_TLP_HDR_CFG_REG_NUM_BITS 39:34 #define ILUPEU_TLP_HDR_MSG_DW3_BITS 63:32 #define ILUPEU_TLP_HDR_MSG_DW4_BITS 31:0 #define ILUPEU_TLP_HDR_MSG_VNDR_CPL_BUS_NUM_BITS 63:56 #define ILUPEU_TLP_HDR_MSG_VNDR_CPL_DEV_NUM_BITS 55:51 #define ILUPEU_TLP_HDR_MSG_VNDR_CPL_FUNC_NUM_BITS 50:48 #define ILUPEU_TLP_HDR_MSG_VNDR_VNDR_ID 47:32 #define ILUPEU_DW_WIDTH 32 #define ILUPEU_DW_BITS 31:0 #define ILUPEU_DW_BYTE_0_BITS 31:24 #define ILUPEU_DW_BYTE_1_BITS 23:16 #define ILUPEU_DW_BYTE_2_BITS 15:8 #define ILUPEU_DW_BYTE_3_BITS 7:0 #define ILUPEU_TLP_HDR_FMT_DATA_3DW 2'b_10 #define ILUPEU_TLP_HDR_FMT_DATA_4DW 2'b_11 #define ILUPEU_TLP_HDR_FMT_NO_DATA_3DW 2'b_00 #define ILUPEU_TLP_HDR_FMT_NO_DATA_4DW 2'b_01 #define ILUPEU_TLP_TYPE_MEM 5'b00000 #define ILUPEU_TLP_TYPE_MEM_LK 5'b00001 #define ILUPEU_TLP_TYPE_CPL 5'b01010 #define ILUPEU_TLP_TYPE_CPL_LK 5'b01011 #define ILUPEU_TLP_TYPE_CFG0 5'b00100 #define ILUPEU_TLP_TYPE_CFG1 5'b00101 #define ILUPEU_TLP_TYPE_IO 5'b00010 #define ILUPEU_TLP_TYPE_MSG 5'b10000 #define ILUPEU_TLP_TYPE_MSG_RC_MASK 5'b00111 #define ILUPEU_TLP_TYPE_VALID_00 32'h00000c37 #define ILUPEU_TLP_TYPE_VALID_01 32'h00ff0003 #define ILUPEU_TLP_TYPE_VALID_10 32'h00000c35 #define ILUPEU_TLP_TYPE_VALID_11 32'h00ff0001 #define ILUPEU_TLP_CPL_STATUS_SC 3'b_000 #define ILUPEU_TLP_CPL_STATUS_UR 3'b_001 #define ILUPEU_TLP_CPL_STATUS_CRS 3'b_010 #define ILUPEU_TLP_CPL_STATUS_CA 3'b_100 #define ILUPEU_TLP_CPL_STATUS_TIMEOUT 3'b_111 #define ILUPEU_TLP_CPL_STATUS_RSVD1 3'b_011 #define ILUPEU_TLP_CPL_STATUS_RSVD2 3'b_101 #define ILUPEU_TLP_CPL_STATUS_RSVD3 3'b_110 #define ILUPEU_TLP_CPL_STATUS_RSVD4 3'b_111 //L2T defines #define ILUPEU_L2T_ITP_CMD_WIDTH 3 #define ILUPEU_L2T_ITP_CMD_BITS 2:0 #define ILUPEU_L2T_ITP_CMD_EOP_VLD_BITS 0:0 #define ILUPEU_L2T_ITP_CMD_DATA_VLD_BITS 1:1 #define ILUPEU_L2T_ITP_CMD_SOP_VLD_BITS 2:2 #define ILUPEU_L2T_ITP_POS_WIDTH 4 #define ILUPEU_L2T_ITP_POS_SOP_WIDTH 2 #define ILUPEU_L2T_ITP_POS_EOP_WIDTH 2 #define ILUPEU_L2T_ITP_POS_BITS 3:0 #define ILUPEU_L2T_ITP_POS_SOP_BITS 3:2 #define ILUPEU_L2T_ITP_POS_EOP_BITS 1:0 #define ILUPEU_L2T_ITP_POS_SOP_POS0 2'b00 #define ILUPEU_L2T_ITP_POS_SOP_POS1 2'b01 #define ILUPEU_L2T_ITP_POS_SOP_POS2 2'b10 #define ILUPEU_L2T_ITP_POS_SOP_POS3 2'b11 #define ILUPEU_L2T_ITP_POS_EOP_POS0 2'b00 #define ILUPEU_L2T_ITP_POS_EOP_POS1 2'b01 #define ILUPEU_L2T_ITP_POS_EOP_POS2 2'b10 #define ILUPEU_L2T_ITP_POS_EOP_POS3 2'b11 //T2L defines #define ILUPEU_T2L_LNK_CAP_WIDTH 32 #define ILUPEU_T2L_LNK_CAP_MAX_LNK_SPD_WIDTH 4 #define ILUPEU_T2L_LNK_CAP_MAX_LNK_SPD_BITS 3:0 #define ILUPEU_T2L_LNK_CAP_MAX_LNK_WDTH_WIDTH 6 #define ILUPEU_T2L_LNK_CAP_MAX_LNK_WDTH_BITS 9:4 #define ILUPEU_T2L_LNK_CAP_ASPM_WIDTH 2 #define ILUPEU_T2L_LNK_CAP_ASPM_BITS 11:10 #define ILUPEU_T2L_LNK_CAP_LOS_EXIT_LAT_WIDTH 3 #define ILUPEU_T2L_LNK_CAP_LOS_EXIT_LAT_BITS 14:12 #define ILUPEU_T2L_LNK_CAP_L1_EXIT_LAT_WIDTH 3 #define ILUPEU_T2L_LNK_CAP_L1_EXIT_LAT_BITS 17:15 #define ILUPEU_T2L_LNK_CAP_PORT_NMBR_WIDTH 8 #define ILUPEU_T2L_LNK_CAP_PORT_NMBR_BITS 31:24 #define ILUPEU_T2L_LNK_CTRL_WIDTH 16 #define ILUPEU_T2L_LNK_CTRL_ASPM_WIDTH 2 #define ILUPEU_T2L_LNK_CTRL_ASPM_BITS 1:0 #define ILUPEU_T2L_LNK_CTRL_RCB_WIDTH 1 #define ILUPEU_T2L_LNK_CTRL_RCB_BITS 3:3 #define ILUPEU_T2L_LNK_CTRL_LNK_DISABL_WIDTH 1 #define ILUPEU_T2L_LNK_CTRL_LNK_DISABL_BITS 4:4 #define ILUPEU_T2L_LNK_CTRL_RETRAIN_LNK_WIDTH 1 #define ILUPEU_T2L_LNK_CTRL_RETRAIN_LNK_BITS 5:5 #define ILUPEU_T2L_LNK_CTRL_CMN_CLK_CFG_WIDTH 1 #define ILUPEU_T2L_LNK_CTRL_CMN_CLK_CFG_BITS 6:6 #define ILUPEU_T2L_LNK_CTRL_EXTND_SYNC_WIDTH 1 #define ILUPEU_T2L_LNK_CTRL_EXTND_SYNC_BITS 7:7 #define ILUPEU_T2L_LNK_CFG_WIDTH 8 #define ILUPEU_T2L_LNK_CFG_PORT_CFG_WIDTH 1 #define ILUPEU_T2L_LNK_CFG_PORT_CFG_BITS 0:0 #define ILUPEU_T2L_LNK_CFG_SLOT_CLK_CFG_WIDTH 1 #define ILUPEU_T2L_LNK_CFG_SLOT_CLK_CFG_BITS 1:1 // PM DLLP Type #define ILUPEU_PM_DLLP_TYPE_WIDTH 3 #define ILUPEU_PM_DLLP_TYPE_IDLE 3'b_000 #define ILUPEU_PM_DLLP_TYPE_ENTER_L1 3'b_001 #define ILUPEU_PM_DLLP_TYPE_ENTER_L23 3'b_010 #define ILUPEU_PM_DLLP_TYPE_ACTIVE_STATE_REQ_L1 3'b_011 #define ILUPEU_PM_DLLP_TYPE_REQ_ACK 3'b_100 #endif