// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: neptune_defines.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
    #ifdef NIU_SYSTEMC_T2
      #define TOP                       "tb_top
      #define NIU_DUV_PATH              TOP.cpu.niu
      #define MAC_DUV_PATH              TOP.cpu.niu.mac
      #ifdef NIU_GATE
          #define RDC_DUV_PATH          TOP.cpu.niu.rdp
          #define RXC_DUV_PATH          TOP.cpu.niu.rtx
          #define TXC_DUV_PATH          TOP.cpu.niu.rtx
          #define TXC_DUV_PATH_P0_SF_RAM    TOP.cpu.niu.rtx.txc_port0_sf_ram_ram_1024x152_0_ram_1024x152_0
          #define TXC_DUV_PATH_P0_RO_RAM    TOP.cpu.niu.rtx.txc_port0_ro_ram_ram_1024x152_0_ram_1024x152_0
      #else
          #define RDC_DUV_PATH          TOP.cpu.niu.rdp.niu_rdmc
          #define RXC_DUV_PATH          TOP.cpu.niu.rtx.rxc
          #define TXC_DUV_PATH          TOP.cpu.niu.rtx.txc
          #define TXC_DUV_PATH_P0_SF_RAM    TOP.cpu.niu.rtx.txc.port0_SF_RAM
          #define TXC_DUV_PATH_P0_RO_RAM    TOP.cpu.niu.rtx.txc.port0_RO_RAM
      #endif
      #define RDP_DUV_PATH              TOP.cpu.niu.rdp
      #define TDS_DUV_PATH              TOP.cpu.niu.tds
      #define RTX_DUV_PATH              TOP.cpu.niu.rtx
      #define ESR_DUV_PATH              TOP.cpu.niu.esr
    #else
      #define TOP                  	"tb_top
      #define NIU_DUV_PATH         	TOP.cpu
      #define MAC_DUV_PATH	   	TOP.cpu.mac
      #ifdef NIU_GATE
          #define RDC_DUV_PATH         	TOP.cpu.rdp
          #define RXC_DUV_PATH         	TOP.cpu.rtx
          #define TXC_DUV_PATH         	TOP.cpu.rtx
          #define TXC_DUV_PATH_P0_SF_RAM    TOP.cpu.rtx.txc_port0_sf_ram_ram_1024x152_0_ram_1024x152_0
          #define TXC_DUV_PATH_P0_RO_RAM    TOP.cpu.rtx.txc_port0_ro_ram_ram_1024x152_0_ram_1024x152_0
      #else
          #define RDC_DUV_PATH         	TOP.cpu.rdp.niu_rdmc
          #define RXC_DUV_PATH         	TOP.cpu.rtx.rxc
          #define TXC_DUV_PATH         	TOP.cpu.rtx.txc
          #define TXC_DUV_PATH_P0_SF_RAM    TOP.cpu.rtx.txc.port0_SF_RAM
          #define TXC_DUV_PATH_P0_RO_RAM    TOP.cpu.rtx.txc.port0_RO_RAM
      #endif
      #define RDP_DUV_PATH	   	TOP.cpu.rdp
      #define TDS_DUV_PATH	   	TOP.cpu.tds
      #define RTX_DUV_PATH	   	TOP.cpu.rtx
      #define ESR_DUV_PATH	   	TOP.cpu.esr
    #endif

#define EP_BUS_NUMBER  1