// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: pio_memory_map.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
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// ========== Copyright Header End ============================================
#include "neptune_memory_map.vri"

#define DEV_FUNC_SR PIO_BASE_ADDRESS_RANGE + 20'h10000
#define MULTI_PART_CTL FZC_PIO_BASE_ADDRESS_RANGE +20'h0
#define DMA_BIND FZC_PIO_BASE_ADDRESS_RANGE +20'h10000
#define LDG_NUM FZC_PIO_BASE_ADDRESS_RANGE +20'h20000
#define LDSV0 PIO_LDSV_BASE_ADDRESS_RANGE + 20'h00000
#define LDSV1 PIO_LDSV_BASE_ADDRESS_RANGE + 20'h00008
#define LDSV2 PIO_LDSV_BASE_ADDRESS_RANGE + 20'h00010
#define LD_IM0 PIO_IMASK0_BASE_ADDRESS_RANGE + 20'h00000
#define LD_IM1 PIO_IMASK1_BASE_ADDRESS_RANGE + 20'h00000
#define LDGIMGN PIO_LDSV_BASE_ADDRESS_RANGE + 20'h00018
#define LDGITMRES FZC_PIO_BASE_ADDRESS_RANGE + 20'h00008
#define NIU_SID FZC_PIO_BASE_ADDRESS_RANGE + 20'h10200
#define RST_CTL FZC_PIO_BASE_ADDRESS_RANGE + 20'h00038
#define SYS_ERR_MASK FZC_PIO_BASE_ADDRESS_RANGE + 20'h00090
#define SYS_ERR_STAT FZC_PIO_BASE_ADDRESS_RANGE + 20'h00098
#define DIRTY_TID_CTL FZC_PIO_BASE_ADDRESS_RANGE +20'h00010
#define DIRTY_TID_STAT FZC_PIO_BASE_ADDRESS_RANGE +20'h00018
#define SMX_CFIG_DAT FZC_PIO_BASE_ADDRESS_RANGE + 20'h00040
#define SMX_INT_STAT FZC_PIO_BASE_ADDRESS_RANGE + 20'h00048
#define SMX_CTL FZC_PIO_BASE_ADDRESS_RANGE + 20'h00050
#define SMX_DBG_VEC FZC_PIO_BASE_ADDRESS_RANGE + 20'h00058