// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: xpcs_memory_map.vri // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #include "neptune_memory_map.vri" #define XPCS_CONTROL1 ( 12'h000 <<1) #define XPCS_STATUS1 ( 12'h004 <<1) #define XPCS_DEVICE_ID ( 12'h008 <<1) #define XPCS_SPEED_ABILITY ( 12'h00C <<1) #define XPCS_DEVICE_IN_PKG ( 12'h010 <<1) #define XPCS_CONTROL2 ( 12'h014 <<1) #define XPCS_STATUS2 ( 12'h018 <<1) #define XPCS_PKG_ID ( 12'h01C <<1) #define XPCS_STATUS ( 12'h020 <<1) #define XPCS_TEST_CONTROL ( 12'h024 <<1) #define XPCS_CONFIG_VENDOR1 ( 12'h028 <<1) #define XPCS_DIAG_VENDOR2 ( 12'h02C <<1) #define XPCS_MASK1 ( 12'h030 <<1) #define XPCS_PACKET_COUNTER ( 12'h034 <<1) #define XPCS_TX_STATEMACHINE ( 12'h038 <<1) #define XPCS_TX_DESKWERR_COUNTER ( 12'h03C <<1) // BASE ADDRESS FOR EACH PCS BLOCK #define XPCS0_BASE (MAC_ADDRESS_RANGE + XPCS_0_RANGE) #define XPCS1_BASE (MAC_ADDRESS_RANGE + XPCS_1_RANGE)