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// 
// OpenSPARC T2 Processor File: pcs_util.vr
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#include <vera_defines.vrh>
#include "mac_defines.vri"
#include "pcs_memory_map.vri"
#include "pio_driver.vrh"
#include "mac_pio_class.vrh"

extern mac_pio_cl mac_pio_class;
//extern pio_drv pio_driver_class;

class pcs_util_class {

        task new();
        function bit[39:0] get_pcs_reg_base(integer iport);
        task pcs_init ( integer iport);

}

        task pcs_util_class :: new(){ 

        }


         task pcs_util_class :: pcs_init ( integer iport) {

		bit [39:0] base_addr;
		bit [31:0] data;

		base_addr = get_pcs_reg_base(iport);
		if ( get_plus_arg(CHECK, "PCS_SERDES") )
  			{
                        	printf("In PCS init \n");

			data=32'h0000_0023;
			mac_pio_class.mac_pio_wr(base_addr + PCS_CONFIGURATION, data);
                        printf("The address is %0h\n",base_addr + PCS_CONFIGURATION);
			data=32'h0000_0000;
			mac_pio_class.mac_pio_wr(base_addr + PCS_DATAPATH_MODE, data);
                        printf("The address is %0h\n",base_addr + PCS_DATAPATH_MODE);
  			}

              else 
			{ 
			data      = 32'h0000_0002; 
			mac_pio_class.mac_pio_wr(base_addr + PCS_DATAPATH_MODE,   data );
			}

}


        function bit[39:0] pcs_util_class :: get_pcs_reg_base(integer iport){

                case(iport) {
                    0: get_pcs_reg_base = PCS0_BASE;
                    1: get_pcs_reg_base = PCS1_BASE;
                    2: get_pcs_reg_base = PCS2_BASE;
                    3: get_pcs_reg_base = PCS3_BASE;
                   default: error("Error: Invalid PORT (%0d) for get_pcs_reg_base task.\n",iport);
                   }

          }