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// 
// OpenSPARC T2 Processor File: niu_int_qmgr.vr
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#include <vera_defines.vrh>
#include <ListMacros.vrh>

class CniuGenIntrMsg {
    bit [9:0]  device_id;
    integer int_message;
    integer no_of_intr_alloc;
    
    integer time;
    integer mode;  // N2 or PCIE
    task new() {
      int_message = -1;
    }
}
MakeVeraList(CniuGenIntrMsg) // que'd list of read requests

class CNiuIntrQMgr {

  local integer queSize;   
  integer intx_enable[4],msi_enable[4], msix_enable[4];
  VeraList_CniuGenIntrMsg IntrMsgQ;
  task addIntrMsg(CniuGenIntrMsg M);
  function CniuGenIntrMsg getIntrMsg( var integer status);
  function integer isQEmpty();
  task new();
 
}
task CNiuIntrQMgr::new() {
        integer i;
	IntrMsgQ = new();
	queSize = 0;
        for(i=0;i<4;i++) {
	 intx_enable[i] = 1;
	 msi_enable[i] = 0;
	 msix_enable[i] = 0;
        }

}

task CNiuIntrQMgr::addIntrMsg(CniuGenIntrMsg M){
   IntrMsgQ.push_back(M);
   queSize++;
}

function CniuGenIntrMsg CNiuIntrQMgr::getIntrMsg( var integer status) {

  if(isQEmpty()) {
	status = 0;
	getIntrMsg = null;
  } else {
	getIntrMsg = IntrMsgQ.front();
	IntrMsgQ.pop_front();
	queSize--;
  }
}

function integer CNiuIntrQMgr::isQEmpty() {
 if(IntrMsgQ.size() ==0) {
   isQEmpty = 1;
 } else {
   isQEmpty = 0;
 }
}