// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: rst.bind.vri // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #ifndef INC_RST_BIND_VRI #define INC_RST_BIND_VRI #include "tcu_top_defines.vri" bind sc__port sc_bind { clk sc.clk; por_in_ sc.POR_L_IN; por_ sc.POR_L; pb_xir_ sc.PB_XIR_L; pb_rst_ sc.PB_RST_L; } bind rst__port rst_bind { clk rst.clk; clk_l2clk rst_l2clk.clk_l2clk; clk_iol2clk rst_iol2clk.clk_iol2clk; tb_clk_stop_all rst.tb_clk_stop_all; tb_clk_stop_one rst.tb_clk_stop_one; rst_niu_wmr_ rst_l2clk.rst_niu_wmr_; rst_ncu_unpark_thread rst_iol2clk.rst_ncu_unpark_thread; rst_ncu_xir_ rst_iol2clk.rst_ncu_xir_; ccu_rst_change rst_l2clk.ccu_rst_change; tcu_bisx_done rst_l2clk.tcu_bisx_done; tcu_rst_efu_done rst_l2clk.tcu_rst_efu_done; tcu_pce_ov rst_l2clk.tcu_pce_ov; tcu_rst_io_clk_stop rst_l2clk.tcu_rst_io_clk_stop; ncu_rst_xir_done rst_iol2clk.ncu_rst_xir_done; rst_mcu_selfrsh rst_iol2clk.rst_mcu_selfrsh; tcu_rst_flush_init_ack rst_l2clk.tcu_rst_flush_init_ack; tcu_rst_flush_stop_ack rst_l2clk.tcu_rst_flush_stop_ack; rst_tcu_flush_init_req rst_l2clk.rst_tcu_flush_init_req ; rst_tcu_flush_stop_req rst_l2clk.rst_tcu_flush_stop_req; rst_tcu_asicflush_stop_req rst_l2clk.rst_tcu_asicflush_stop_req; tcu_rst_asicflush_stop_ack rst_l2clk.tcu_rst_asicflush_stop_ack; rst_l2_por_ rst_l2clk.rst_l2_por_; rst_l2_wmr_ rst_l2clk.rst_l2_wmr_; rst_wmr_protect rst_l2clk.rst_wmr_protect; rst_dmu_peu_por_ rst_l2clk.rst_dmu_peu_por_; rst_dmu_peu_wmr_ rst_l2clk.rst_dmu_peu_wmr_; ccu_rst_sync_stable rst_l2clk.ccu_rst_sync_stable; tcu_rst_scan_mode rst_l2clk.tcu_rst_scan_mode; l2t0_rst_fatal_error rst_iol2clk.l2t0_rst_fatal_error; l2t1_rst_fatal_error rst_iol2clk.l2t1_rst_fatal_error; l2t2_rst_fatal_error rst_iol2clk.l2t2_rst_fatal_error; l2t3_rst_fatal_error rst_iol2clk.l2t3_rst_fatal_error; l2t4_rst_fatal_error rst_iol2clk.l2t4_rst_fatal_error; l2t5_rst_fatal_error rst_iol2clk.l2t5_rst_fatal_error; l2t6_rst_fatal_error rst_iol2clk.l2t6_rst_fatal_error; l2t7_rst_fatal_error rst_iol2clk.l2t7_rst_fatal_error; ncu_rst_fatal_error rst_iol2clk.ncu_rst_fatal_error; } #endif