// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: Fc_Niu_Multi_Perf.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
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// ========== Copyright Header End ============================================
<Fc_Niu_Multi_Perf name=Fc_Niu_Multi_Perf>

//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//@@ The following option could be used for debugging                             @@
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//-vera_build_args=VERA_DEFS_GATE=-DMEMARRAY_DEBUG 
//-vcs_run_args=+no_verilog_finish 
//-vcs_run_args=+show_delta 
//-midas_args=-DPART_0_BASE=0x200000000 
//-vcs_run_args=+DUMP_LIMIT 
//-vcs_run_args=+DUMP_NIU 
//-vcs_run_args=+DUMP_PEU 
//-vcs_run_args=+DUMP_ENV 
//-vcs_run_args=+DUMP_SIU 
//-vcs_run_args=+DUMP_L2_1 
//-vcs_run_args=+DUMP_MCU 
//-vcs_run_args=+debussy 
//-vcs_run_args=+debug_all 
//-vcs_run_args=+RXWRITE_TIMEOUT=20000 
//-vcs_run_args=+ccxPktPrint=all 
//-vcs_run_args=+report_global_print_threshold=RPRT_DEBUG_1 
//-vcs_run_args=+ENABLE_MAC_HDR_DEBUG 
//-vcs_run_args=+TX_VERBOSE 
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//@@ Rx 64B Packets Tx 64B Packets MULTI_PORT/MULTI_DMA                           @@
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
<runargs -sas -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 >
<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
<runargs -vcs_run_args=+GET_MAC_PORTS=01 -vcs_run_args=+ORIG_META -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >

<runargs -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST >
<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x11 -vcs_run_args=+NIU_RX_MULTI_DMA=0x11 >
<runargs -midas_args=-DRXMAC_PKTCNT=0x7d0 -vcs_run_args=+RXMAC_PKTCNT=2000 >

<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
<runargs -vcs_run_args=+NIU_TX_MULTI_TEST -midas_args=-DNIU_TX_MULTI_TEST >
<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=0001 -midas_args=-DNIU_TX_MULTI_DMA_P0=0x0001 >
<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=0100 -midas_args=-DNIU_TX_MULTI_DMA_P1=0x0100 >
<runargs -midas_args=-DNIU_TX_PKT_CNT=0x200 >

<runargs -vcs_run_args=+RX_BUF_SIZ0=256 -midas_args=-DRX_BUF_SIZ0=0x100 >
<runargs -vcs_run_args=+RX_BUF_SIZ1=1024 -midas_args=-DRX_BUF_SIZ1=0x400 >
<runargs -vcs_run_args=+RX_BUF_SIZ2=2048 -midas_args=-DRX_BUF_SIZ2=0x800 >
<runargs -vcs_run_args=+RX_BLKSZ=4 -vcs_run_args=+USE_RANDOM_ADDRESS>

<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x40 -vcs_run_args=+NIU_TX_PKT_LEN_P0=64 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x40 -vcs_run_args=+NIU_TX_PKT_LEN_P1=64 >
Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx64_Tx64 FcNiuBasicTxRx_MULTI_1DMA_Rx64_Tx64.s
</runargs>
</runargs>

<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P0=1500 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P1=1500 >
Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx64_Tx1500 FcNiuBasicTxRx_MULTI_1DMA_Rx64_Tx1500.s 
</runargs>
</runargs>

<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=40 -vcs_run_args=+NIU_TX_PKT_LEN_P0=64 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=40 -vcs_run_args=+NIU_TX_PKT_LEN_P1=64 >
Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx1500_Tx64 FcNiuBasicTxRx_MULTI_1DMA_Rx1500_Tx64.s 
</runargs>
</runargs>

<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P0=1500 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P1=1500 >
Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx1500_Tx1500 FcNiuBasicTxRx_MULTI_1DMA_Rx1500_Tx1500.s 
</runargs>
</runargs>

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>

</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>

</runargs>
</runargs>
</runargs>
</runargs>

//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//@@ Full DMA Multi-Port/Multi-DMA Case (16 DMA for Tx and 8 DMA for Rx)          @@
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
<runargs -sas -finish_mask=3 -midas_args=-DCMP_THREAD_START=0x3 -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+GET_MAC_PORTS=01 >
<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >

<runargs -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0xff -vcs_run_args=+NIU_RX_MULTI_DMA=0xff >
<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST >
<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
<runargs -midas_args=-DRXMAC_PKTCNT=0x40 -vcs_run_args=+RXMAC_PKTCNT=64 >

<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
<runargs -vcs_run_args=+NIU_TX_MULTI_TEST -midas_args=-DNIU_TX_MULTI_TEST >
<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=00ff -midas_args=-DNIU_TX_MULTI_DMA_P0=0x00ff >
<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=ff00 -midas_args=-DNIU_TX_MULTI_DMA_P1=0xff00 >
<runargs -midas_args=-DNIU_TX_PKT_CNT=0x80 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x80 -vcs_run_args=+NIU_TX_PKT_LEN_P0=128 >
<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x80 -vcs_run_args=+NIU_TX_PKT_LEN_P1=128 >

Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s

<runargs -vcs_run_args=+CMPDR_RATIO_2.00 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_2.25 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_2.50 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_2.75 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_3.00 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_3.25 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_3.50 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_3.75 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_4.00 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_4.25 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_4.50 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_4.75 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_5.00 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

<runargs -vcs_run_args=+CMPDR_RATIO_5.25 >
Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
</runargs>

</runargs>
</runargs>
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</runargs>
</runargs>
</runargs>

</Fc_Niu_Multi_Perf>