//////////////////////////////////////////////////////////////////////////////////////////////////// #include "diaglists/memop/memop.diaglist" #include "diaglists/misc/ported_arch_diags.diaglist" //////////////////////////////////////////////////////////////////////////// // CMT diags, 1 core cmp_park_self cmp_park_self.s -midas_args=-DSYNC_THREADS -midas_args=-allow_tsb_conflicts //////////////////////////////////////////////////////////////////////////// // Single-threaded interrupt diags interrupt_INT_VEC_DIS interrupt_INT_VEC_DIS.s interrupt_INT_VEC_DIS_all2 interrupt_INT_VEC_DIS_all2.s interrupt_SWVR_INTR_R interrupt_SWVR_INTR_R.s interrupt_SWVR_INTR_W interrupt_SWVR_INTR_W.s interrupt_SWVR_INTR_W_all_vectors interrupt_SWVR_INTR_W_all_vectors.s interrupt_INTR_REC_priority interrupt_INTR_REC_priority.s interrupt_QUEUE_CPU_MONDO_trap interrupt_QUEUE_CPU_MONDO_trap.s interrupt_QUEUE_DEV_MONDO_trap interrupt_QUEUE_DEV_MONDO_trap.s interrupt_ncu_regs_rw interrupt_ncu_regs_rw.s interrupt_QUEUE_CPU_MONDO_mode interrupt_QUEUE_CPU_MONDO_mode.s interrupt_QUEUE_DEV_MONDO_mode interrupt_QUEUE_DEV_MONDO_mode.s interrupt_DMU_CORE_BLK_enable1 interrupt_DMU_CORE_BLK_enable1.s //////////////////////////////////////////////////////////////////////////// // 2-threaded interrupt diags interrupt_SWVR_INTR_REC_mode interrupt_SWVR_INTR_REC_mode.s interrupt_SWVR_INTR_R_mode interrupt_SWVR_INTR_R_mode.s interrupt_SWVR_INTR_W_mode interrupt_SWVR_INTR_W_mode.s //////////////////////////////////////////////////////////////////////////// // Miscellaneous interrupt diags interrupt_pci_spurious_err interrupt_pci_spurious_err.s -nosas memop_all_atomics_pll memop_all_atomics.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4 -vcs_run_args=+gchkr_off tcu_csr_regs_rw tcu_csr_regs_rw.s -nosas tcu_regs_l2 tcu_regs_l2.s tcu_regs_soc tcu_regs_soc.s tcu_regs_bist tcu_regs_bist.s -nosas tcu_regs_dram tcu_regs_dram.s -nofast_boot tcu_regs_dram_2 tcu_regs_dram_2.s -nofast_boot tcu_regs_dram_piu tcu_regs_dram_piu.s -nofast_boot Debug_Event_Mcu_Ctl2 Debug_Event_Mcu2.s Debug_Event_L2_PABank0 Debug_Event_L2PaBank.s -midas_args=-DMCU0 Debug_Event_L2_PABank2 Debug_Event_L2PaBank.s -midas_args=-DMCU1 Debug_Event_L2_PABank4 Debug_Event_L2PaBank.s -midas_args=-DMCU2 Debug_Event_L2_PABank6 Debug_Event_L2PaBank.s -midas_args=-DMCU3 Debug_Event_L2_PABank1 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU0 Debug_Event_L2_PABank3 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU1 Debug_Event_L2_PABank5 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU2 Debug_Event_L2_PABank7 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU3 Debug_Event_Mcu_Ctl0 Debug_Event_Mcu.s -midas_args=-DMCU0 Debug_Event_Mcu_Ctl1 Debug_Event_Mcu.s -midas_args=-DMCU1 Debug_Event_Mcu_Ctl2 Debug_Event_Mcu.s -midas_args=-DMCU2 Debug_Event_Mcu_Ctl3 Debug_Event_Mcu.s -midas_args=-DMCU3 Debug_Event_L2Bank0 Debug_Event_L2.s -midas_args=-DL2_0 -midas_args=-DMCU0 Debug_Event_L2Bank2 Debug_Event_L2.s -midas_args=-DL2_2 -midas_args=-DMCU1 Debug_Event_L2Bank4 Debug_Event_L2.s -midas_args=-DL2_4 -midas_args=-DMCU2 Debug_Event_L2Bank6 Debug_Event_L2.s -midas_args=-DL2_6 -midas_args=-DMCU3 Debug_Event_L2Bank1 Debug_Event_L2Odd.s -midas_args=-DMCU0 Debug_Event_L2Bank3 Debug_Event_L2Odd.s -midas_args=-DMCU1 Debug_Event_L2Bank5 Debug_Event_L2Odd.s -midas_args=-DMCU2 Debug_Event_L2Bank7 Debug_Event_L2Odd.s -midas_args=-DMCU3 #ifndef FC_NO_NIU_T2 Debug_Niu_Obs Debug_Niu_Mode.s #endif // Applied for ALL Error diags // esr mon off // CEEN and NCEEN bit OFF // L2 RAS DIAGS // Need -nosas because of L2$ diagnostic load // Use +L2_SCRUB_FREQ=1000 to speed simulation // Use +L2_SCRUB_IDX=50 to match the corrupted address n2_err_l2_LDSC_cecc_trap n2_err_l2_LDSC_cecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50 n2_err_l2_LDSU_uecc_trap n2_err_l2_LDSU_uecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50 // Only for following few l2 error diags n2_err_l2_LDAC_tid_01.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x03 -finish_mask=03 n2_err_l2_LDAC_tid_02.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x05 -finish_mask=05 n2_err_l2_LDAC_tid_03.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x09 -finish_mask=09 n2_err_l2_LDAC_tid_04.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11 n2_err_l2_LDAC_tid_05.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x21 -finish_mask=21 n2_err_l2_LDAC_tid_06.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x41 -finish_mask=41 n2_err_l2_LDAC_tid_07.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x81 -finish_mask=81 //Only for following L2 RAS diags n2_err_L2_LDWC_cecc_trap n2_err_L2_LDWC_cecc_trap.s n2_err_L2_LDWC_cecc n2_err_L2_LDWC_cecc.s n2_err_L2_LVC_cecc_trap n2_err_L2_LVC_cecc_trap.s n2_err_L2_LVC_cecc n2_err_L2_LVC_cecc.s n2_err_L2_LVC_cecc_Synd_check n2_err_L2_LVC_cecc_SyndCheck.s n2_err_L2_LDWU_MEU_uecc n2_err_L2_LDWU_uecc.s n2_err_l2_LDAC_st_cecc_trap n2_err_l2_LDAC_st_cecc_trap.s n2_err_l2_LDAC_st_cecc n2_err_l2_LDAC_st_cecc.s n2_err_l2_LDAC_cecc_trap n2_err_l2_LDAC_cecc_trap.s -midas_args=-DL2_LDAC_err n2_err_l2_LDAC_cecc n2_err_l2_LDAC_cecc.s n2_err_l2_LDAU_trap n2_err_l2_LDAU_uecc_trap.s //n2_err_l2_LDAU_trap_inj n2_err_l2_trap_ErrInj.s -midas_args=-DLDAU -midas_args=-DL2_0 -vcs_run_args=+L2DA_INJECT_UE n2_err_l2_LDAU_trap_2thrds n2_err_l2_LDAU_uecc_2thrds_trap.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_err_l2_LDAU_uecc n2_err_l2_LDAU_uecc.s n2_err_l2_LDAU_st_uecc_trap n2_err_l2_LDAU_st_uecc_trap.s -midas_args=-DL2_DWS_err n2_err_l2_LDAU_st_uecc n2_err_l2_LDAU_st_uecc.s n2_err_l2_LDWU_uecc n2_err_l2_LDWU_uecc.s n2_err_l2_csrs n2_err_l2_csrs.s n2_err_l2_LTC_cecc_trap n2_err_l2_LTC_cecc_trap.s n2_err_l2_LTC_cecc n2_err_l2_LTC_cecc.s n2_err_l2_LTC_4bnk_trap n2_err_l2_LTC_4bnk_cecc_trap.s -vcs_run_args=+bank_set_mask=3 n2_err_l2_LTC_L2off_trap n2_err_l2_LTC_cecc_trap_L2off.s -vcs_run_args=+gchkr_off //n2_err_l2_LRU n2_err_l2_LRU.s n2_err_l2_LDWU_uecc_trap n2_err_l2_LDWU_uecc_trap.s -midas_args=-DL2_DWS_err // L2 Not Data diag, In Fc because MCU registers prog in FC n2_err_L2_NotData_NDSP n2_err_L2_NotData.s -midas_args=-DL2_NDSP_err n2_err_L2_NotData_NDSP_meu n2_err_L2_NotData_NDSP_meu.s n2_err_L2_NotData_NDSP_meu_trap0 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL20 n2_err_L2_NotData_NDSP_meu_trap1 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL21 n2_err_L2_NotData_NDSP_meu_trap2 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL22 n2_err_L2_NotData_NDSP_meu_trap3 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL23 n2_err_L2_NotData_NDSP_meu_trap4 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL24 n2_err_L2_NotData_NDSP_meu_trap5 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL25 n2_err_L2_NotData_NDSP_meu_trap6 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL26 n2_err_L2_NotData_NDSP_meu_trap7 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL27 // n2_err_L2_NotData_NDDM n2_err_L2_NotData_NDDM.s -midas_args=-DL2_NDSP_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off // n2_err_L2_NotData_NDDM_meu n2_err_L2_NotData_NDDM_meu.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off // n2_err_L2_NotData_NDDM_meu_trap n2_err_L2_NotData_NDDM_meu_trap.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off -midas_args=-DL20 // n2_err_l2_LDRC_cecc_trap n2_err_l2_LDRC_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off // n2_err_l2_LDRU_cecc_trap n2_err_l2_LDRU_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off // ADVANCED L2 RAS DIAGS n2_err_dram_L2_Off_DAU_ld_mcu0 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU0 n2_err_dram_L2_Off_DAU_ld_mcu1 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU1 n2_err_dram_L2_Off_DAU_ld_mcu2 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU2 n2_err_dram_L2_Off_DAU_ld_mcu3 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU3 n2_err_dram_L2_Off_DAC_st n2_err_dram_DAC_st_trap_L2_Off.s -midas_args=-DMCU0 n2_err_dram_L2_Off_DAU_st_mcu0 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_DWS_err //n2_err_dram_L2_Off_DAU_st_mcu1 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_DWS_err //n2_err_dram_L2_Off_DAU_st_mcu2 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_DWS_err //n2_err_dram_L2_Off_DAU_st_mcu3 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_DWS_err n2_err_dram_L2_Off_DAC_ld_mcu0 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_LDAC_err n2_err_dram_L2_Off_DAC_ld_mcu1 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_LDAC_err n2_err_dram_L2_Off_DAC_ld_mcu2 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_LDAC_err n2_err_dram_L2_Off_DAC_ld_mcu3 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_LDAC_err n2_err_L2_LVF_WrmRst_uecc n2_err_L2_LVF_uecc_WrmRst.s //n2_err_L2_FatalErr_WrmRst n2_err_L2_FatalErr_WrmRst.s n2_err_l2_LDAC_LDWC_noDAC n2_err_l2_LDAC_LDWC_noDAC.s //End of L2 Advanced Diags // MCU Error diags; except FBD errors //-nosas to be debugged and removed n2_err_mcu_csrs n2_err_mcu_csrs.s -vcs_run_args=+mcu_errmon_disable -nosas n2_err_dram_DAC_ld_mcu0 n2_err_dram_DAC_ld.s -midas_args=-DMCU0 -sas n2_err_dram_DAC_ld_mcu1 n2_err_dram_DAC_ld.s -midas_args=-DMCU1 n2_err_dram_DAC_ld_mcu2 n2_err_dram_DAC_ld.s -midas_args=-DMCU2 n2_err_dram_DAC_ld_mcu3 n2_err_dram_DAC_ld.s -midas_args=-DMCU3 n2_err_dram_DAC_ld_trap_mcu0 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU0 n2_err_dram_DAC_ld_trap_mcu1 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU1 n2_err_dram_DAC_ld_trap_mcu2 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU2 n2_err_dram_DAC_ld_trap_mcu3 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU3 n2_err_dram_DAC_st_mcu0 n2_err_dram_DAC_st.s -midas_args=-DMCU0 n2_err_dram_DAC_st_mcu1 n2_err_dram_DAC_st.s -midas_args=-DMCU1 n2_err_dram_DAC_st_mcu2 n2_err_dram_DAC_st.s -midas_args=-DMCU2 n2_err_dram_DAC_st_mcu3 n2_err_dram_DAC_st.s -midas_args=-DMCU3 n2_err_dram_DAC_st_trap n2_err_dram_DAC_st_trap.s n2_err_dram_DAU_st n2_err_dram_DAU_st.s n2_err_dram_DAU_st_trap n2_err_dram_DAU_st_trap.s -midas_args=-DL2_DWS_err // advanced Directed Diags n2_err_dram_Mem_Poisn_L2Bank0 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_0 -nosas n2_err_dram_Mem_Poisn_L2Bank1 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_1 -nosas n2_err_all_4_mcu n2_err_all_4_mcu.s // MCU Err Advanced Diags n2_err_dram_dac_dau_fbr_mcu0 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dac_dau_fbr_mcu1 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dac_dau_fbr_mcu2 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dac_dau_fbr_mcu3 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dau_fbr_mcu0 n2_err_dram_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dau_fbr_mcu1 n2_err_dram_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dau_fbr_mcu2 n2_err_dram_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dau_fbr_mcu3 n2_err_dram_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_afe_NoMemOp n2_err_dram_afe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1 n2_err_dram_sfe_NoMemOp n2_err_dram_sfe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_dram_dac_dau_fbr_fbu_mcu0 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_dram_dac_dau_fbr_fbu_mcu1 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_dram_dac_dau_fbr_fbu_mcu2 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_dram_dac_dau_fbr_fbu_mcu3 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 // IOS Error diags // runarg for all IOS diags //FBR n2_err_Mcu0Fbr_C n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu0Fbr_AFE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1 n2_err_Mcu0Fbr_AA n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2 n2_err_Mcu0Fbr_SFPE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_Mcu0Fbr_C_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu0Fbr_AFE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1 n2_err_Mcu0Fbr_AA_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2 n2_err_Mcu0Fbr_SFPE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 n2_err_Mcu1Fbr_C n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu1Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu2Fbr_C n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu2Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu3Fbr_C n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu3Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu0Fbu_C n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0 n2_err_Mcu0Fbu_AFE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1 n2_err_Mcu0Fbu_AA n2_err_mcu_int_fbu_AA.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2 n2_err_Mcu0Fbu_SFPE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3 //ECC n2_err_Mcu0Ecc n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC n2_err_Mcu0Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC n2_err_Mcu1Ecc n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC n2_err_Mcu1Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC n2_err_Mcu2Ecc n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC n2_err_Mcu2Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC n2_err_Mcu3Ecc n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC n2_err_Mcu3Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC //FBR and ECC both // IOS ncu error diags //temporarily disabling sas because of outstanding bug 103339; associated diag n2_err_NcuDmuCredit n2_err_ncu_csrs n2_err_ncu_csrs.s -nosas n2_err_ncu_ejr_ce_10 n2_err_ncu_ejr_ce_10.s n2_err_ncu_esr_3 n2_err_ncu_esr_3.s n2_err_ncu_all_int n2_err_ncu_all_int.s n2_err_ncu_NcuMondoTable n2_err_ncu_dmu_mondo.s -midas_args=-DERR_FIELD=NcuMondoTable -midas_args=-DTT=0x32 n2_err_ncu_NcuMondoFifo n2_err_ncu_dmu_mondo_2th.s -midas_args=-DERR_FIELD=NcuMondoFifo -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2 -midas_args=-DTT=0x32 //all diags // Applied for ALL Error diags // esr mon off // This suit requires PEU // //NCU: using EJR n2_err_adv_NcuCtagUe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+lsu_mon_off n2_err_adv_NcuCtagCe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagCe -midas_args=-DTT=0x63 n2_err_adv_NcuDataParity_mondo n2_err_adv_piu_int_ejr_nomondo.s -midas_args=-DERR_FIELD=NcuDataParity -vcs_run_args=+PEU_TEST //DMU n2_err_adv_DmuNcuCredit_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40 /////////////////////// Diags with follow up of Silicon Level Testing //////////////////////////// n2_mcu_si_DSC n2_mcu_si_DSC.s -vcs_run_args=+l2cpx_mon_off -midas_args=-DMCU0 // for all diags tso_n1_bcopy tso_n1_bcopy.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta tso_n1_binit1 tso_n1_binit1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta tso_n1_binit2 tso_n1_binit2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta #if (! defined FC) tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=f tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod3 tso_n1_self_mod3.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11 -vcs_run_args=+show_delta tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1 tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off #endif #if (defined FC) tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod3 tso_n1_self_mod3.s -finish_mask=11 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1 tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off #endif #if (! defined FC) tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3 tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3 tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas #endif #if (defined FC) tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3 tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3 tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas #endif #if (!defined CCM && !defined CMP) #if (! defined FC) tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off #endif #if (defined FC) tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off #endif #endif // fc bench: default is 166mhz sys clk // single thread (ie. thread 0) // must specify this option when doing WMR reset memop_all_atomics_CMPDR_RATIO_2_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_00 memop_all_atomics_CMPDR_RATIO_2_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_25 memop_all_atomics_CMPDR_RATIO_2_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_50 memop_all_atomics_CMPDR_RATIO_2_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_75 memop_all_atomics_CMPDR_RATIO_3_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_00 memop_all_atomics_CMPDR_RATIO_3_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_25 memop_all_atomics_CMPDR_RATIO_3_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_50 memop_all_atomics_CMPDR_RATIO_3_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_75 memop_all_atomics_CMPDR_RATIO_4_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_00 memop_all_atomics_CMPDR_RATIO_4_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_25 memop_all_atomics_CMPDR_RATIO_4_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_50 #if (!defined FC) #endif #if (defined FC) #endif n2_mcu_0_all_bcopy_all_banks n2_mcu_0_all_bcopy_all_banks.s n2_mcu_0_all_fbdimm_rkhi_mcu0 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_mcu_0_all_fbdimm_rkhi_mcu1 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_mcu_0_all_fbdimm_rkhi_mcu2 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_mcu_0_all_fbdimm_rkhi_mcu3 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_mcu_0_all_fbdimm_rkhi_mcu0_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off n2_mcu_0_all_fbdimm_rkhi_mcu1_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off n2_mcu_0_all_fbdimm_rkhi_mcu2_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off n2_mcu_0_all_fbdimm_rkhi_mcu3_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off n2_all_mcu_all_l2_8th n2_all_mcu_all_l2.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_all_th_ldst_8th n2_all_th_ldst.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff n2_cmp_upk_pk_upk n2_cmp_upk_pk_upk.s -finish_mask=3 -sas n2_cmp_upk_pk_upk_nosas n2_cmp_upk_pk_upk.s -finish_mask=3 -nosas ncu_1core_wakup ncu_1core_wakup.s -finish_mask=0x2b -sas -midas_args=-DPART_0_BASE=0x200000000 ncu_ssi_rw ncu_ssi_rw.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000 ncu_ssi_rw_b2b ncu_ssi_rw_b2b.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000 //runargs -sas -finish_mask=ff