// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: dmu.config // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #include "defaults.config" #ifdef AXIS_BUILD -config_rtl=AXIS -sunv_args=-keepSectionSym=AXIS_SMEM -sunv_args=-keepSectionSym=EMUL_COSIM -axis_build_args="-scope n2_ccm" #endif -asm_diag_root=$DV_ROOT/verif/diag -vera_diag_root=$DV_ROOT/verif/diag -vera_config_root=$DV_ROOT/verif -image_diag_root=$DV_ROOT/verif -wait_cycle_to_kill=10 -post_process_cmd="regreport -1 > status.log" -model=dmu -flist=$DV_ROOT/verif/env/dmu/dmu.flist -flist=$DV_ROOT/verif/env/dmu/dmu.rtlflist -flist=$DV_ROOT/verif/env/dmu/dmu.commonflist -flist=$DV_ROOT/verif/env/dmu/dmu.libsflist -config_rtl=DMC -vera_vcon_file=dmu_top.vcon -env_base=$DV_ROOT/verif/env/dmu -drm_disk=[/export/home/bw=30] -drm_type=vcs -drm_freeram=1000 -drm_freeprocessor=1.0 SUNVFORCEOPTS -sunv_args=-topcell=cpu -sunv_args=-define=SIM -sunv_args=-define=LIB -sunv_args=-define=INITLATZERO -sunv_args=-define=INITRAMZERO -sunv_args=-define=SCAN_MODE -sunv_args=-showCompiledOutCode=off -sunv_use_nonprim -sunv_nonprim_list=$DV_ROOT/verif/env/dmu/nonprimitive.list -sunv_args=-excludecell=dmu -sunv_args=-excludepreload -sunv_args=-out=cpu.v -sunv_args=-path=SUNV_RTL_PATH -sunv_args=-preload=SUNVLIBS_SUNV -sunv_args=-perlinclude=SUNVPERLINC -sunv_args=-stopcell=n2_clk_gl_cust -vlint_top=dmu -vlint_args=-merge_bus_repor -vlint_args=-turn_unspecified_off -vlint_args=-binary -vlint_args=-vlint -vlint_args=-depth 999 -vlint_args=-vr $DV_ROOT/verif/env/config/asic_vlint.rc -vlint_args=-turn_unspecified_off -vlint_args=SUNVLIBS_OTHER -vlint_args=-binary_only -illust_run -illust_args=-b -c $DV_ROOT/verif/env/config/filter_vlint.rc -zeroIn_build_args=-d dmu #ifdef AXIS_BUILD -zeroIn_build_args=-sim axis #else -zeroIn_build_args=-sim vcs -zeroIn_build_args=-exit_on_directive_errors //-zeroIn_build_args=-fastmod //-zeroIn_build_args="-fastsim turbo" -zeroIn_build_args=+error+command-19 -zeroIn_build_args=+error+command-46 -zeroIn_build_args=+error+command-6 -zeroIn_build_args=+error+command-7 #endif -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/dmu/dmu_zeroIn_cfg.v -zeroIn_build_args=-ctrl $DV_ROOT/verif/env/common/verilog/checkers/0in_checkers.v -zeroIn_build_args=SUNVLIBS_OTHER // -zeroIn_build_args=-rcd -zeroIn_build_args=+define+NO_ILU -zeroIn_build_args=+define+CPU=tb_top.cpu -zeroIn_build_args=+define+X_GUARD //-vcs_build_args=+define+INITLATZERO -vcs_build_args=+define+LIB -vcs_build_args=+define+SCAN_MODE #ifdef AXIS_BUILD -vcs_build_args=-P $VERA_HOME/lib/vera_pli.tab -vcs_build_args=$VERA_HOME/lib/libSysSciTask.a -vcs_build_args=-pl -lsocket -pl -lnsl -pl -lintl -pl -ldl -vcs_build_args=+v2000 -vcs_build_args=+timescale+1ns/1ns -vcs_build_args=" -pl -R/import/freetools/local/gcc/3.3.2/lib " -vcs_build_args=" /import/freetools/local/gcc/3.3.2/lib/libstdc++.so" -vcs_build_args=" /import/freetools/local/gcc/3.3.2/lib/libgcc_s.so " #else VCS_BUILD_WITH_GPP -vcs_build_args=-Mupdate -vcs_build_args=-vera -vcs_build_args=+rad -vcs_build_args=+v2k -vcs_build_args=+race=all -vcs_build_args=-timescale=1ns/1ns -vcs_build_args=-lstdc++ -vcs_build_args=+nospecify +notimingcheck #endif -vcs_cm_config=$DV_ROOT/verif/env/dmu/dmu.cm_config -vcs_build_args=SUNVLIBS_OTHER -vcs_build_args=+define+NO_ILU -vcs_build_args=-P $DV_ROOT/verif/env/fire/clib/report/report.tab -vcs_build_args=vera/report.a -vcs_build_args="-P $DV_ROOT/verif/env/common/pli/monitor/monitor_pli.tab" -vcs_build_args=$DV_ROOT/verif/env/common/pli/monitor/libmonitor_pli.a -vcs_build_args="-P $DV_ROOT/verif/env/common/pli/socket/socket_pli.tab" -vcs_build_args=$DV_ROOT/verif/env/common/pli/socket/libsocket_pli.a -verix_top=dmu -sas_run_args=-DSP0 -sas_run_args=-DMEM_TEST -sas_run_args=-DINTR_TEST -sas_run_args=-DMEM_DEBUG -sas_run_args=-DNIAGARA -vcs_run_args=+vera_disable_final_report -vcs_run_args=+vera_exit_on_error // -vera_cov_obj=DMU_COVERAGE