// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: DMUXtrPorts.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// ========== Copyright Header End ============================================
#ifndef DMU_XTR_PORTS_DEFINED
#define DMU_XTR_PORTS_DEFINED


port po_DMUegress {
  deq;         /* PEC record dequeue (return credit) */
  addr;        /* requested DOU address */
  relrcd;      /* egress release record */
  relrcdenq;   /* release record enqueue ("relrcd" valid) */
#ifndef	N2_FC
  recd;        /* egress PEC record */
  enq;         /* PEC record enqueue (consume credit) */
  data;        /* DOU data corresponding to "addr" */
  par;         /* parity for DOU "data" */
  douvalid;    /* Is there a valid entry in the DOU? (for DMA cmp'n data) */
  douaddr;     /* The index of the "valid" DOU entry */
  douerr;      /* "1" if the entry is garbage */
#endif
}

port po_DMUingress {
  recd;        /* ingress PEC record */
  enq;         /* PEC record enqueue (consume credit) */
#ifndef	N2_FC
  deq;         /* PEC record dequeue (return credit) */
  data;        /* DOU data corresponding to "addr" */
  par;         /* parity for DOU "data" */
  addr;        /* requested DOU address */
  relrcd;      /* ingress release record */
  relrcdenq;   /* release record enqueue ("relrcd" valid) */
#endif
}

port po_DMUmisc {
#ifndef	N2_FC
  pwrOnRstN;	/*Active low Power On Reset*/
  resetN; 	/*Active low reset*/
#endif
  int;		/*Interrupt from ILU*/
  mps;    	/*Max packet size*/ 
  drain;    	/*drainState entered */ 
}
#endif