// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: mac_defines.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
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// CA 95054 USA or visit www.sun.com if you need additional information or 
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// ========== Copyright Header End ============================================
#define XMAC_TOTAL_REGS 310 
#define BMAC_TOTAL_REGS 113 

#define RX_MAC_RESET	64'h0000_0000_0000_0001
#define TX_MAC_RESET	64'h0000_0000_0000_0002
#define MAC_CONF_10	64'h0000_0000_0000_0004
#define MAC_CONF_100	64'h0000_0000_0000_0008
#define MAC_REG_VERIFY	64'h0000_0000_0000_0010
#define MAC_ER_CK_EN	64'h0000_0000_0000_0020
#define MAC_LOOPBACK	64'h0000_0000_0000_0040
#define MAC_NOT_MUXED	64'h0000_0000_0000_0080
#define MAC_NOT_PROM	64'h0000_0000_0000_0100
#define MAC_NOT_PROM_GR	64'h0000_0000_0000_0200
#define MAC_SHORT_PKT	64'h0000_0000_0000_0400
#define MAC_RSVD_MTCST	64'h0000_0000_0000_0800
#define MAC_INIT_ALL_REG	\
			64'h0000_0000_0000_1000
#define MAC_CONF_1000	64'h0000_0000_0000_2000
#define MAC_DIS_PAUSE	64'h0000_0000_0000_4000
#define MAC_DONT_PASS_FC	\
			64'h0000_0000_0000_8000
#define MAC_FORCE_MII	64'h0000_0000_0001_0000
#define MAC_TX_CE	64'h0000_0000_0002_0000
#define MAC_RX_CE	64'h0000_0000_0004_0000
#define MAC_HALF_DPLX	64'h0000_0000_0008_0000
#define MAC_EN_IPG0	64'h0000_0000_0010_0000
#define MAC_CONF_10000	64'h0000_0000_0020_0000

#define MI_DEBUG	64'h8000_0000_0000_0000


#define MAC_DEF_ADDR0	48'h4eed_0add_1200
#define MAC_DEF_ADDR1	48'h4eed_0add_1201
#define MAC_DEF_ADDR2	48'h4eed_0add_1202
#define MAC_DEF_ADDR3	48'h4eed_0add_1203
#define MAC_DEF_ADDR4	48'h4eed_0add_1204
#define MAC_DEF_ADDR5	48'h4eed_0add_1205
#define MAC_DEF_ADDR6	48'h4eed_0add_1206
#define MAC_DEF_ADDR7	48'h4eed_0add_1207
#define MAC_DEF_ADDR8	48'h4eed_0add_1208
#define MAC_DEF_ADDR9	48'h4eed_0add_1209
#define MAC_DEF_ADDR10	48'h4eed_0add_2100
#define MAC_DEF_ADDR11	48'h4eed_0add_2101
#define MAC_DEF_ADDR12	48'h4eed_0add_2102
#define MAC_DEF_ADDR13	48'h4eed_0add_2103
#define MAC_DEF_ADDR14	48'h4eed_0add_2104
#define MAC_DEF_ADDR15	48'h4eed_0add_2105
#define MAC_DEF_ADDR16	48'h4eed_0add_2106
#define MAC_DEF_ADDR17	48'h4eed_0add_2107
#define MAC_DEF_ADDR18	48'h4eed_0add_2108
#define MAC_FC_ADDR	48'h01_80_c2_00_00_01


//
// FAKE OPP/MAC
//
#define OMF_MAC_GEN_CRC 16'h0001
#define OMF_CRC_ERR     16'h0002
#define OMF_SA_REPL     16'h0004