// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: dbg_dq_pins_defines.vri // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ #ifndef INC_DBG_DQ_PINS_DEFINES_VRI #define INC_DBG_DQ_PINS_DEFINES_VRI //----- pin numbers are listed in descending order---- #define DBG_DQ__INPUT__PLL_CHAR_IN 157 #define DBG_DQ__INPUT__PLL_DIV2__MSB 156 #define DBG_DQ__INPUT__PLL_DIV2__LSB 151 #define DBG_DQ__INPUT__PLL_DIV2__SIZE 6 #define DBG_DQ__INPUT__PLL_TRST_L 150 #define DBG_DQ__INPUT__PLL_CLAMP_FLTR 149 #define DBG_DQ__INPUT__PLL_DIV4__MSB 146 #define DBG_DQ__INPUT__PLL_DIV4__LSB 140 #define DBG_DQ__INPUT__PLL_DIV4__SIZE 7 #define DBG_DQ__INPUT__PLL_EXT_DR_CLK 139 #define DBG_DQ__INPUT__PLL_EXT_CMP_CLK 138 #define DBG_DQ__INPUT__AC_TESTMODE 137 #define DBG_DQ__INPUT__AC_TESTTRIG 136 #define DBG_DQ__INPUT__ACLK 135 #define DBG_DQ__INPUT__BCLK 134 #define DBG_DQ__INPUT__SCAN_IN__MSB 133 #define DBG_DQ__INPUT__SCAN_IN29 132 #define DBG_DQ__INPUT__SCAN_IN28 131 #define DBG_DQ__INPUT__SCAN_IN27 130 #define DBG_DQ__INPUT__SCAN_IN26 129 #define DBG_DQ__INPUT__SCAN_IN25 128 #define DBG_DQ__INPUT__SCAN_IN24 127 #define DBG_DQ__INPUT__SCAN_IN23 126 #define DBG_DQ__INPUT__SCAN_IN22 125 #define DBG_DQ__INPUT__SCAN_IN21 124 #define DBG_DQ__INPUT__SCAN_IN20 123 #define DBG_DQ__INPUT__SCAN_IN19 122 #define DBG_DQ__INPUT__SCAN_IN18 121 #define DBG_DQ__INPUT__SCAN_IN17 120 #define DBG_DQ__INPUT__SCAN_IN16 119 #define DBG_DQ__INPUT__SCAN_IN15 118 #define DBG_DQ__INPUT__SCAN_IN14 117 #define DBG_DQ__INPUT__SCAN_IN13 116 #define DBG_DQ__INPUT__SCAN_IN12 115 #define DBG_DQ__INPUT__SCAN_IN11 114 #define DBG_DQ__INPUT__SCAN_IN10 113 #define DBG_DQ__INPUT__SCAN_IN9 112 #define DBG_DQ__INPUT__SCAN_IN8 111 #define DBG_DQ__INPUT__SCAN_IN7 110 #define DBG_DQ__INPUT__SCAN_IN6 109 #define DBG_DQ__INPUT__SCAN_IN5 108 #define DBG_DQ__INPUT__SCAN_IN4 107 #define DBG_DQ__INPUT__SCAN_IN3 106 #define DBG_DQ__INPUT__SCAN_IN2 105 #define DBG_DQ__INPUT__SCAN_IN1 104 #define DBG_DQ__INPUT__SCAN_IN__LSB 103 #define DBG_DQ__INPUT__SCAN_IN__SIZE 31 #define DBG_DQ__INPUT__SCAN_EN 74 #endif // end of #ifndef INC_DBG_DQ_PINS_DEFINES_VRI