[pdp11-memory-test] / pdp11_register.h

// (c) 2020 Aaron Taylor <ataylor at subgeniuskitty dot com>
// See LICENSE.txt file for copyright and license details.

#ifndef SGK_PDP11_REGISTER_H
#define SGK_PDP11_REGISTER_H


/*
 * =============================================================================
 * Register Access Macros
 * =============================================================================
 */

/*
 * Use these macros along with the register address/field definitions in this
 * file to get/set memory mapped registers.
 *
 * For example:
 *     SET(KISDR2,PDR_PAGELEN,0100);
 *     SET(MMR3,MMR3_EN_22BIT,1);
 *     uint16_t value = GET(PSW,PSW_REGSET);
 */

#define GET(reg,regspec) GET_EXPANDED(reg,regspec)
#define GET_EXPANDED(reg,mask,offset) ((reg & (mask << offset)) >> offset)

#define SET(reg,regspec,value) SET_EXPANDED(reg,regspec,value)
#define SET_EXPANDED(reg,mask,offset,value) (reg = ((reg & (~(mask << offset))) | (value << offset)))


/*
 * =============================================================================
 * Register Address Definitions
 * =============================================================================
 */

// Register names correspond to KDJ11-B User Guide (EK-KDJ1B-UG).
// http://bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1B-UG_KDJ11-B_Nov86.pdf

/* CPU */

#define PSW      (*((volatile uint16_t *)0177776))
#define PIRQ     (*((volatile uint16_t *)0177772))
#define CPUERR   (*((volatile uint16_t *)0177766))

/* MMU */

#define MMR0     (*((volatile uint16_t *)0177572))
#define MMR1     (*((volatile uint16_t *)0177574))
#define MMR2     (*((volatile uint16_t *)0177576))
#define MMR3     (*((volatile uint16_t *)0172516))

#define UISDR0   (*((volatile uint16_t *)0177600))
#define UISDR1   (*((volatile uint16_t *)0177602))
#define UISDR2   (*((volatile uint16_t *)0177604))
#define UISDR3   (*((volatile uint16_t *)0177606))
#define UISDR4   (*((volatile uint16_t *)0177610))
#define UISDR5   (*((volatile uint16_t *)0177612))
#define UISDR6   (*((volatile uint16_t *)0177614))
#define UISDR7   (*((volatile uint16_t *)0177616))

#define UDSDR0   (*((volatile uint16_t *)0177620))
#define UDSDR1   (*((volatile uint16_t *)0177622))
#define UDSDR2   (*((volatile uint16_t *)0177624))
#define UDSDR3   (*((volatile uint16_t *)0177626))
#define UDSDR4   (*((volatile uint16_t *)0177630))
#define UDSDR5   (*((volatile uint16_t *)0177632))
#define UDSDR6   (*((volatile uint16_t *)0177634))
#define UDSDR7   (*((volatile uint16_t *)0177636))

#define UISAR0   (*((volatile uint16_t *)0177640))
#define UISAR1   (*((volatile uint16_t *)0177642))
#define UISAR2   (*((volatile uint16_t *)0177644))
#define UISAR3   (*((volatile uint16_t *)0177646))
#define UISAR4   (*((volatile uint16_t *)0177650))
#define UISAR5   (*((volatile uint16_t *)0177652))
#define UISAR6   (*((volatile uint16_t *)0177654))
#define UISAR7   (*((volatile uint16_t *)0177656))

#define UDSAR0   (*((volatile uint16_t *)0177660))
#define UDSAR1   (*((volatile uint16_t *)0177662))
#define UDSAR2   (*((volatile uint16_t *)0177664))
#define UDSAR3   (*((volatile uint16_t *)0177666))
#define UDSAR4   (*((volatile uint16_t *)0177670))
#define UDSAR5   (*((volatile uint16_t *)0177672))
#define UDSAR6   (*((volatile uint16_t *)0177674))
#define UDSAR7   (*((volatile uint16_t *)0177676))

#define SISDR0   (*((volatile uint16_t *)0172200))
#define SISDR1   (*((volatile uint16_t *)0172202))
#define SISDR2   (*((volatile uint16_t *)0172204))
#define SISDR3   (*((volatile uint16_t *)0172206))
#define SISDR4   (*((volatile uint16_t *)0172210))
#define SISDR5   (*((volatile uint16_t *)0172212))
#define SISDR6   (*((volatile uint16_t *)0172214))
#define SISDR7   (*((volatile uint16_t *)0172216))

#define SDSDR0   (*((volatile uint16_t *)0172220))
#define SDSDR1   (*((volatile uint16_t *)0172222))
#define SDSDR2   (*((volatile uint16_t *)0172224))
#define SDSDR3   (*((volatile uint16_t *)0172226))
#define SDSDR4   (*((volatile uint16_t *)0172230))
#define SDSDR5   (*((volatile uint16_t *)0172232))
#define SDSDR6   (*((volatile uint16_t *)0172234))
#define SDSDR7   (*((volatile uint16_t *)0172236))

#define SISAR0   (*((volatile uint16_t *)0172240))
#define SISAR1   (*((volatile uint16_t *)0172242))
#define SISAR2   (*((volatile uint16_t *)0172244))
#define SISAR3   (*((volatile uint16_t *)0172246))
#define SISAR4   (*((volatile uint16_t *)0172250))
#define SISAR5   (*((volatile uint16_t *)0172252))
#define SISAR6   (*((volatile uint16_t *)0172254))
#define SISAR7   (*((volatile uint16_t *)0172256))

#define SDSAR0   (*((volatile uint16_t *)0172260))
#define SDSAR1   (*((volatile uint16_t *)0172262))
#define SDSAR2   (*((volatile uint16_t *)0172264))
#define SDSAR3   (*((volatile uint16_t *)0172266))
#define SDSAR4   (*((volatile uint16_t *)0172270))
#define SDSAR5   (*((volatile uint16_t *)0172272))
#define SDSAR6   (*((volatile uint16_t *)0172274))
#define SDSAR7   (*((volatile uint16_t *)0172276))

#define KISDR0   (*((volatile uint16_t *)0172300))
#define KISDR1   (*((volatile uint16_t *)0172302))
#define KISDR2   (*((volatile uint16_t *)0172304))
#define KISDR3   (*((volatile uint16_t *)0172306))
#define KISDR4   (*((volatile uint16_t *)0172310))
#define KISDR5   (*((volatile uint16_t *)0172312))
#define KISDR6   (*((volatile uint16_t *)0172314))
#define KISDR7   (*((volatile uint16_t *)0172316))

#define KDSDR0   (*((volatile uint16_t *)0172320))
#define KDSDR1   (*((volatile uint16_t *)0172322))
#define KDSDR2   (*((volatile uint16_t *)0172324))
#define KDSDR3   (*((volatile uint16_t *)0172326))
#define KDSDR4   (*((volatile uint16_t *)0172330))
#define KDSDR5   (*((volatile uint16_t *)0172332))
#define KDSDR6   (*((volatile uint16_t *)0172334))
#define KDSDR7   (*((volatile uint16_t *)0172336))

#define KISAR0   (*((volatile uint16_t *)0172340))
#define KISAR1   (*((volatile uint16_t *)0172342))
#define KISAR2   (*((volatile uint16_t *)0172344))
#define KISAR3   (*((volatile uint16_t *)0172346))
#define KISAR4   (*((volatile uint16_t *)0172350))
#define KISAR5   (*((volatile uint16_t *)0172352))
#define KISAR6   (*((volatile uint16_t *)0172354))
#define KISAR7   (*((volatile uint16_t *)0172356))

#define KDSAR0   (*((volatile uint16_t *)0172360))
#define KDSAR1   (*((volatile uint16_t *)0172362))
#define KDSAR2   (*((volatile uint16_t *)0172364))
#define KDSAR3   (*((volatile uint16_t *)0172366))
#define KDSAR4   (*((volatile uint16_t *)0172370))
#define KDSAR5   (*((volatile uint16_t *)0172372))
#define KDSAR6   (*((volatile uint16_t *)0172374))
#define KDSAR7   (*((volatile uint16_t *)0172376))

/* SLU */

#define CONSRCSR (*((volatile uint16_t *)0177560))
#define CONSRBUF (*((volatile uint16_t *)0177562))
#define CONSXCSR (*((volatile uint16_t *)0177564))
#define CONSXBUF (*((volatile uint16_t *)0177566))

#define SLU0RCSR (*((volatile uint16_t *)0176500))
#define SLU0RBUF (*((volatile uint16_t *)0176502))
#define SLU0XCSR (*((volatile uint16_t *)0176504))
#define SLU0XBUF (*((volatile uint16_t *)0176506))

#define SLU1RCSR (*((volatile uint16_t *)0176510))
#define SLU1RBUF (*((volatile uint16_t *)0176512))
#define SLU1XCSR (*((volatile uint16_t *)0176514))
#define SLU1XBUF (*((volatile uint16_t *)0176516))

#define SLU2RCSR (*((volatile uint16_t *)0176520))
#define SLU2RBUF (*((volatile uint16_t *)0176522))
#define SLU2XCSR (*((volatile uint16_t *)0176524))
#define SLU2XBUF (*((volatile uint16_t *)0176524))

#define SLU3RCSR (*((volatile uint16_t *)0176530))
#define SLU3RBUF (*((volatile uint16_t *)0176532))
#define SLU3XCSR (*((volatile uint16_t *)0176534))
#define SLU3XBUF (*((volatile uint16_t *)0176536))


/*
 * =============================================================================
 * Register Field Definitions
 * =============================================================================
 */

/*
 * These take the form of "(width),(offset)".  For example, if a field is
 * 4-bits wide and occupies bits 2-5 (starting from 0), then it would be
 * defined as "(017),(2)".
 */

/* CPU */


/* MMU */
#define MMR0_AB_NONRES (01),(15)
#define MMR0_AB_PAGLEN (01),(14)
#define MMR0_AB_RO     (01),(13)
#define MMR0_PG_MODE   (03),(5)
#define MMR0_PG_SPLTID (01),(4)
#define MMR0_PG_NUMBER (07),(1)
#define MMR0_EN_MMU    (01),(0)

#define MMR1_A_CHANGE  (037),(11)
#define MMR1_A_REGSTR  (07),(8)
#define MMR1_B_CHANGE  (037),(3)
#define MMR1_B_REGSTR  (07),(0)

#define MMR2_PC        (0177777),(0)

#define MMR3_EN_22BIT  (01),(4)
#define MMR3_EN_CSMINS (01),(3)
#define MMR3_KRNSPLTID (01),(2)
#define MMR3_SUPSPLTID (01),(1)
#define MMR3_USRSPLTID (01),(0)

#define PAR_PAF        (0177777),(0)

#define PDR_BYPASCACHE (01),(15)
#define PDR_PAGELEN    (0177),(8)
#define PDR_PAGEWRITEN (01),(6)
#define PDR_EXPANDDIR  (01),(3)
#define PDR_ACCESSCTRL (03),(1)

/* SLU */

#define SLURCSR_RCVRDY (01),(7)
#define SLURCSR_RCVINT (01),(6)
#define SLURCSR_RCVEN  (01),(0)

#define SLURBUF_ERROR  (01),(15)
#define SLURBUF_EOVRUN (01),(14)
#define SLURBUF_EFRAME (01),(13)
#define SLURBUF_EPARIT (01),(12)
#define SLURBUF_BUFFER (0377),(0)

#define SLUXCSR_XMTBRK (01),(0)
#define SLUXCSR_XMTINT (01),(6)
#define SLUXCSR_XMTRDY (01),(7)

#define SLUXBUF_BUFFER (0377),(0)


#endif // SGK_PDP11_REGISTER_H
Commit	Line	Data
7f635197 AT	1	// (c) 2020 Aaron Taylor <ataylor at subgeniuskitty dot com>
	2	// See LICENSE.txt file for copyright and license details.
	3
	4	#ifndef SGK_PDP11_REGISTER_H
	5	#define SGK_PDP11_REGISTER_H
	6
	7
	8	/*
	9	* =============================================================================
	10	* Register Access Macros
	11	* =============================================================================
	12	*/
	13
	14	/*
	15	* Use these macros along with the register address/field definitions in this
	16	* file to get/set memory mapped registers.
	17	*
	18	* For example:
	19	* SET(KISDR2,PDR_PAGELEN,0100);
	20	* SET(MMR3,MMR3_EN_22BIT,1);
	21	* uint16_t value = GET(PSW,PSW_REGSET);
	22	*/
	23
	24	#define GET(reg,regspec) GET_EXPANDED(reg,regspec)
	25	#define GET_EXPANDED(reg,mask,offset) ((reg & (mask << offset)) >> offset)
	26
	27	#define SET(reg,regspec,value) SET_EXPANDED(reg,regspec,value)
	28	#define SET_EXPANDED(reg,mask,offset,value) (reg = ((reg & (~(mask << offset))) \| (value << offset)))
	29
	30
	31	/*
	32	* =============================================================================
	33	* Register Address Definitions
	34	* =============================================================================
	35	*/
	36
	37	// Register names correspond to KDJ11-B User Guide (EK-KDJ1B-UG).
	38	// http://bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1B-UG_KDJ11-B_Nov86.pdf
	39
	40	/* CPU */
	41
6ecf2d76 AT	42	#define PSW (((volatile uint16_t )0177776))
	43	#define PIRQ (((volatile uint16_t )0177772))
	44	#define CPUERR (((volatile uint16_t )0177766))
7f635197 AT	45
	46	/* MMU */
	47
6ecf2d76 AT	48	#define MMR0 (((volatile uint16_t )0177572))
	49	#define MMR1 (((volatile uint16_t )0177574))
	50	#define MMR2 (((volatile uint16_t )0177576))
	51	#define MMR3 (((volatile uint16_t )0172516))
	52
	53	#define UISDR0 (((volatile uint16_t )0177600))
	54	#define UISDR1 (((volatile uint16_t )0177602))
	55	#define UISDR2 (((volatile uint16_t )0177604))
	56	#define UISDR3 (((volatile uint16_t )0177606))
	57	#define UISDR4 (((volatile uint16_t )0177610))
	58	#define UISDR5 (((volatile uint16_t )0177612))
	59	#define UISDR6 (((volatile uint16_t )0177614))
	60	#define UISDR7 (((volatile uint16_t )0177616))
	61
	62	#define UDSDR0 (((volatile uint16_t )0177620))
	63	#define UDSDR1 (((volatile uint16_t )0177622))
	64	#define UDSDR2 (((volatile uint16_t )0177624))
	65	#define UDSDR3 (((volatile uint16_t )0177626))
	66	#define UDSDR4 (((volatile uint16_t )0177630))
	67	#define UDSDR5 (((volatile uint16_t )0177632))
	68	#define UDSDR6 (((volatile uint16_t )0177634))
	69	#define UDSDR7 (((volatile uint16_t )0177636))
	70
	71	#define UISAR0 (((volatile uint16_t )0177640))
	72	#define UISAR1 (((volatile uint16_t )0177642))
	73	#define UISAR2 (((volatile uint16_t )0177644))
	74	#define UISAR3 (((volatile uint16_t )0177646))
	75	#define UISAR4 (((volatile uint16_t )0177650))
	76	#define UISAR5 (((volatile uint16_t )0177652))
	77	#define UISAR6 (((volatile uint16_t )0177654))
	78	#define UISAR7 (((volatile uint16_t )0177656))
	79
	80	#define UDSAR0 (((volatile uint16_t )0177660))
	81	#define UDSAR1 (((volatile uint16_t )0177662))
	82	#define UDSAR2 (((volatile uint16_t )0177664))
	83	#define UDSAR3 (((volatile uint16_t )0177666))
	84	#define UDSAR4 (((volatile uint16_t )0177670))
	85	#define UDSAR5 (((volatile uint16_t )0177672))
	86	#define UDSAR6 (((volatile uint16_t )0177674))
	87	#define UDSAR7 (((volatile uint16_t )0177676))
	88
	89	#define SISDR0 (((volatile uint16_t )0172200))
	90	#define SISDR1 (((volatile uint16_t )0172202))
	91	#define SISDR2 (((volatile uint16_t )0172204))
	92	#define SISDR3 (((volatile uint16_t )0172206))
	93	#define SISDR4 (((volatile uint16_t )0172210))
	94	#define SISDR5 (((volatile uint16_t )0172212))
	95	#define SISDR6 (((volatile uint16_t )0172214))
	96	#define SISDR7 (((volatile uint16_t )0172216))
	97
	98	#define SDSDR0 (((volatile uint16_t )0172220))
	99	#define SDSDR1 (((volatile uint16_t )0172222))
	100	#define SDSDR2 (((volatile uint16_t )0172224))
	101	#define SDSDR3 (((volatile uint16_t )0172226))
	102	#define SDSDR4 (((volatile uint16_t )0172230))
	103	#define SDSDR5 (((volatile uint16_t )0172232))
	104	#define SDSDR6 (((volatile uint16_t )0172234))
	105	#define SDSDR7 (((volatile uint16_t )0172236))
	106
	107	#define SISAR0 (((volatile uint16_t )0172240))
	108	#define SISAR1 (((volatile uint16_t )0172242))
	109	#define SISAR2 (((volatile uint16_t )0172244))
	110	#define SISAR3 (((volatile uint16_t )0172246))
	111	#define SISAR4 (((volatile uint16_t )0172250))
112	#define SISAR5 (((volatile uint16_t )0172252))
113	#define SISAR6 (((volatile uint16_t )0172254))
114	#define SISAR7 (((volatile uint16_t )0172256))
115
116	#define SDSAR0 (((volatile uint16_t )0172260))
117	#define SDSAR1 (((volatile uint16_t )0172262))
118	#define SDSAR2 (((volatile uint16_t )0172264))
119	#define SDSAR3 (((volatile uint16_t )0172266))
120	#define SDSAR4 (((volatile uint16_t )0172270))
121	#define SDSAR5 (((volatile uint16_t )0172272))
122	#define SDSAR6 (((volatile uint16_t )0172274))
123	#define SDSAR7 (((volatile uint16_t )0172276))
124
125	#define KISDR0 (((volatile uint16_t )0172300))
126	#define KISDR1 (((volatile uint16_t )0172302))
127	#define KISDR2 (((volatile uint16_t )0172304))
128	#define KISDR3 (((volatile uint16_t )0172306))
129	#define KISDR4 (((volatile uint16_t )0172310))
130	#define KISDR5 (((volatile uint16_t )0172312))
131	#define KISDR6 (((volatile uint16_t )0172314))
132	#define KISDR7 (((volatile uint16_t )0172316))
133
134	#define KDSDR0 (((volatile uint16_t )0172320))
135	#define KDSDR1 (((volatile uint16_t )0172322))
136	#define KDSDR2 (((volatile uint16_t )0172324))
137	#define KDSDR3 (((volatile uint16_t )0172326))
138	#define KDSDR4 (((volatile uint16_t )0172330))
139	#define KDSDR5 (((volatile uint16_t )0172332))
140	#define KDSDR6 (((volatile uint16_t )0172334))
141	#define KDSDR7 (((volatile uint16_t )0172336))
142
143	#define KISAR0 (((volatile uint16_t )0172340))
144	#define KISAR1 (((volatile uint16_t )0172342))
145	#define KISAR2 (((volatile uint16_t )0172344))
146	#define KISAR3 (((volatile uint16_t )0172346))
147	#define KISAR4 (((volatile uint16_t )0172350))
148	#define KISAR5 (((volatile uint16_t )0172352))
149	#define KISAR6 (((volatile uint16_t )0172354))
150	#define KISAR7 (((volatile uint16_t )0172356))
151
152	#define KDSAR0 (((volatile uint16_t )0172360))
153	#define KDSAR1 (((volatile uint16_t )0172362))
154	#define KDSAR2 (((volatile uint16_t )0172364))
155	#define KDSAR3 (((volatile uint16_t )0172366))
156	#define KDSAR4 (((volatile uint16_t )0172370))
157	#define KDSAR5 (((volatile uint16_t )0172372))
158	#define KDSAR6 (((volatile uint16_t )0172374))
159	#define KDSAR7 (((volatile uint16_t )0172376))
160
161	/* SLU */
162
ae36b406 AT	163	#define CONSRCSR (((volatile uint16_t )0177560))
	164	#define CONSRBUF (((volatile uint16_t )0177562))
	165	#define CONSXCSR (((volatile uint16_t )0177564))
	166	#define CONSXBUF (((volatile uint16_t )0177566))
	167
	168	#define SLU0RCSR (((volatile uint16_t )0176500))
	169	#define SLU0RBUF (((volatile uint16_t )0176502))
	170	#define SLU0XCSR (((volatile uint16_t )0176504))
	171	#define SLU0XBUF (((volatile uint16_t )0176506))
	172
	173	#define SLU1RCSR (((volatile uint16_t )0176510))
	174	#define SLU1RBUF (((volatile uint16_t )0176512))
	175	#define SLU1XCSR (((volatile uint16_t )0176514))
	176	#define SLU1XBUF (((volatile uint16_t )0176516))
	177
	178	#define SLU2RCSR (((volatile uint16_t )0176520))
	179	#define SLU2RBUF (((volatile uint16_t )0176522))
	180	#define SLU2XCSR (((volatile uint16_t )0176524))
	181	#define SLU2XBUF (((volatile uint16_t )0176524))
	182
	183	#define SLU3RCSR (((volatile uint16_t )0176530))
	184	#define SLU3RBUF (((volatile uint16_t )0176532))
	185	#define SLU3XCSR (((volatile uint16_t )0176534))
	186	#define SLU3XBUF (((volatile uint16_t )0176536))
7f635197 AT	187
	188
	189	/*
	190	* =============================================================================
	191	* Register Field Definitions
	192	* =============================================================================
	193	*/
	194
dc5bb9bb	195	/*
8c0bb8d8 AT	196	* These take the form of "(width),(offset)". For example, if a field is
	197	* 4-bits wide and occupies bits 2-5 (starting from 0), then it would be
	198	* defined as "(017),(2)".
dc5bb9bb AT	199	*/
dc5bb9bb AT	200
6ecf2d76 AT	201	/* CPU */
	202
	203
	204	/* MMU */
7f635197 AT	205	#define MMR0_AB_NONRES (01),(15)
	206	#define MMR0_AB_PAGLEN (01),(14)
	207	#define MMR0_AB_RO (01),(13)
	208	#define MMR0_PG_MODE (03),(5)
	209	#define MMR0_PG_SPLTID (01),(4)
	210	#define MMR0_PG_NUMBER (07),(1)
	211	#define MMR0_EN_MMU (01),(0)
	212
	213	#define MMR1_A_CHANGE (037),(11)
	214	#define MMR1_A_REGSTR (07),(8)
	215	#define MMR1_B_CHANGE (037),(3)
	216	#define MMR1_B_REGSTR (07),(0)
	217
	218	#define MMR2_PC (0177777),(0)
	219
	220	#define MMR3_EN_22BIT (01),(4)
	221	#define MMR3_EN_CSMINS (01),(3)
	222	#define MMR3_KRNSPLTID (01),(2)
	223	#define MMR3_SUPSPLTID (01),(1)
	224	#define MMR3_USRSPLTID (01),(0)
	225
	226	#define PAR_PAF (0177777),(0)
	227
	228	#define PDR_BYPASCACHE (01),(15)
	229	#define PDR_PAGELEN (0177),(8)
	230	#define PDR_PAGEWRITEN (01),(6)
	231	#define PDR_EXPANDDIR (01),(3)
	232	#define PDR_ACCESSCTRL (03),(1)
	233
6ecf2d76 AT	234	/* SLU */
	235
	236	#define SLURCSR_RCVRDY (01),(7)
	237	#define SLURCSR_RCVINT (01),(6)
	238	#define SLURCSR_RCVEN (01),(0)
	239
	240	#define SLURBUF_ERROR (01),(15)
	241	#define SLURBUF_EOVRUN (01),(14)
	242	#define SLURBUF_EFRAME (01),(13)
	243	#define SLURBUF_EPARIT (01),(12)
	244	#define SLURBUF_BUFFER (0377),(0)
	245
	246	#define SLUXCSR_XMTBRK (01),(0)
	247	#define SLUXCSR_XMTINT (01),(6)
	248	#define SLUXCSR_XMTRDY (01),(7)
	249
	250	#define SLUXBUF_BUFFER (0377),(0)
	251
7f635197 AT	252
7f635197 AT	253	#endif // SGK_PDP11_REGISTER_H