// ========== Copyright Header Begin ========================================== // // OpenSPARC T2 Processor File: Fc_Niu_Multi.diaglist // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved // 4150 Network Circle, Santa Clara, California 95054, U.S.A. // // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; version 2 of the License. // // This program is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // // You should have received a copy of the GNU General Public License // along with this program; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // For the avoidance of doubt, and except that if any non-GPL license // choice is available it will apply instead, Sun elects to use only // the General Public License version 2 (GPLv2) at this time for any // software where a choice of GPL license versions is made // available with the language indicating that GPLv2 or any later version // may be used, or where a choice of which version of the GPL is applied is // otherwise unspecified. // // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, // CA 95054 USA or visit www.sun.com if you need additional information or // have any questions. // // ========== Copyright Header End ============================================ //@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ //@@ RX MULTI_PORT/MULTI_DMA @@ //@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ FcNiu_rx_p0_MULTI_2DMA_rand_0C rx_p0_MULTI_2DMA_rand_0C.s FcNiu_rx_p0_MULTI_2DMA_rand_C0 rx_p0_MULTI_2DMA_rand_C0.s FcNiu_rx_p0_MULTI_3DMA_rand_07 rx_p0_MULTI_3DMA_rand_07.s // // // // //FcNiu_rx_p1_MULTI_3DMA_rand_0700 rx_p1_MULTI_3DMA_rand_0700.s // // // // FcNiu_rx_p0p1_MULTI_2DMA_rand_11 rx_p0p1_MULTI_2DMA_rand_11.s FcNiu_rx_p0p1_MULTI_2DMA_rand_88 rx_p0p1_MULTI_2DMA_rand_88.s FcNiu_rx_p0p1_MULTI_4DMA_rand_33 rx_p0p1_MULTI_4DMA_rand_33.s FcNiu_rx_p0p1_MULTI_4DMA_rand_CC rx_p0p1_MULTI_4DMA_rand_CC.s FcNiu_rx_p0p1_MULTI_6DMA_rand_77 rx_p0p1_MULTI_6DMA_rand_77.s //@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ //@@ TX MULTI_PORT/MULTI_DMA @@ //@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ FcNiu_tx_MULTI_PORT_DMA_rand_0088 tx_MULTI_PORT_DMA_rand_0088.s FcNiu_tx_MULTI_PORT_DMA_rand_8080 tx_MULTI_PORT_DMA_rand_8080.s FcNiu_tx_MULTI_PORT_DMA_rand_0101 tx_MULTI_PORT_DMA_rand_0101.s