From 7add6a1d486f5794ae8f1774a6c9acc31dc43511 Mon Sep 17 00:00:00 2001
From: CSRG <csrg@ucbvax.Berkeley.EDU>
Date: Sun, 31 Jul 1983 21:10:02 -0800
Subject: [PATCH] BSD 4_2 development Work on file usr/src/sys/vax/nexus.h

Synthesized-from: CSRG/cd1/4.2
---
 usr/src/sys/vax/nexus.h | 92 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)
 create mode 100644 usr/src/sys/vax/nexus.h

diff --git a/usr/src/sys/vax/nexus.h b/usr/src/sys/vax/nexus.h
new file mode 100644
index 0000000000..1c672bc8a3
--- /dev/null
+++ b/usr/src/sys/vax/nexus.h
@@ -0,0 +1,92 @@
+/*	nexus.h	6.1	83/08/01	*/
+
+/*
+ * Information about nexus's.
+ *
+ * Each machine has an address of backplane slots (nexi).
+ * Each nexus is some type of adapter, whose code is the low
+ * byte of the first word of the adapter address space.
+ * At boot time the system looks through the array of available
+ * slots and finds the interconnects for the machine.
+ */
+#if VAX780
+#define	NNEX780	16
+#define	NEX780	((struct nexus *)0x20000000)
+#endif
+#if VAX750
+#define	NNEX750	16
+#define	NEX750	((struct nexus *)0xf20000)
+#endif
+#if VAX730
+#define	NNEX730	16
+#define	NEX730	((struct nexus *)0xf20000)
+#endif
+#define	NEXSIZE	0x2000
+
+#define	MAXNNEXUS 16
+
+#ifndef LOCORE
+struct	nexus {
+	union nexcsr {
+		long	nex_csr;
+		u_char	nex_type;
+	} nexcsr;
+	long	nex_pad[NEXSIZE / sizeof (long) - 1];
+};
+#ifdef	KERNEL
+struct nexus nexus[MAXNNEXUS];
+#endif
+#endif
+
+/*
+ * Bits in high word of nexus's.
+ */
+#define	SBI_PARFLT	(1<<31)		/* sbi parity fault */
+#define	SBI_WSQFLT	(1<<30)		/* write sequence fault */
+#define	SBI_URDFLT	(1<<29)		/* unexpected read data fault */
+#define	SBI_ISQFLT	(1<<28)		/* interlock sequence fault */
+#define	SBI_MXTFLT	(1<<27)		/* multiple transmitter fault */
+#define	SBI_XMTFLT	(1<<26)		/* transmit fault */
+
+#define	NEX_CFGFLT	(0xfc000000)
+
+#ifndef LOCORE
+#if VAX780
+#define	NEXFLT_BITS \
+"\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
+#endif
+#endif
+
+#define	NEX_APD		(1<<23)		/* adaptor power down */
+#define	NEX_APU		(1<<22)		/* adaptor power up */
+
+#define	MBA_OT		(1<<21)		/* overtemperature */
+
+#define	UBA_UBINIT	(1<<18)		/* unibus init */
+#define	UBA_UBPDN	(1<<17)		/* unibus power down */
+#define	UBA_UBIC	(1<<16)		/* unibus initialization complete */
+
+/*
+ * Types for nex_type.
+ */
+#define	NEX_ANY		0		/* pseudo for handling 11/750 */
+#define	NEX_MEM4	0x08		/* 4K chips, non-interleaved mem */
+#define	NEX_MEM4I	0x09		/* 4K chips, interleaved mem */
+#define	NEX_MEM16	0x10		/* 16K chips, non-interleaved mem */
+#define	NEX_MEM16I	0x11		/* 16K chips, interleaved mem */
+#define	NEX_MBA		0x20		/* Massbus adaptor */
+#define	NEX_UBA0	0x28		/* Unibus adaptor */
+#define	NEX_UBA1	0x29		/* 4 flavours for 4 addr spaces */
+#define	NEX_UBA2	0x2a
+#define	NEX_UBA3	0x2b
+#define	NEX_DR32	0x30		/* DR32 user i'face to SBI */
+#define	NEX_CI		0x38		/* CI adaptor */
+#define	NEX_MPM0	0x40		/* Multi-port mem */
+#define	NEX_MPM1	0x41		/* Who knows why 4 different ones ? */
+#define	NEX_MPM2	0x42
+#define	NEX_MPM3	0x43
+#define	NEX_MEM64L	0x68		/* 64K chips, non-interleaved, lower */
+#define	NEX_MEM64LI	0x69		/* 64K chips, ext-interleaved, lower */
+#define	NEX_MEM64U	0x6a		/* 64K chips, non-interleaved, upper */
+#define	NEX_MEM64UI	0x6b		/* 64K chips, ext-interleaved, upper */
+#define	NEX_MEM64I	0x6c		/* 64K chips, interleaved */
-- 
2.20.1