From 7e00c42b2019bc702943c9e8291b01f74ca28ed3 Mon Sep 17 00:00:00 2001 From: Bill Joy Date: Wed, 18 Feb 1981 01:34:42 -0800 Subject: [PATCH] minor cleanups... for dh: DELAY(5)s SCCS-vsn: sys/vax/uba/dh.c 4.16 SCCS-vsn: sys/vax/uba/dz.c 4.13 SCCS-vsn: sys/vax/uba/uba.c 4.10 SCCS-vsn: sys/vax/uba/up.c 4.16 SCCS-vsn: sys/vax/uba/tm.c 4.12 SCCS-vsn: sys/vax/vax/autoconf.c 4.6 --- usr/src/sys/vax/uba/dh.c | 357 +++++++++++++++++++++++++-------- usr/src/sys/vax/uba/dz.c | 128 +++++++----- usr/src/sys/vax/uba/tm.c | 229 +++++++++++---------- usr/src/sys/vax/uba/uba.c | 4 +- usr/src/sys/vax/uba/up.c | 119 ++++++----- usr/src/sys/vax/vax/autoconf.c | 3 +- 6 files changed, 534 insertions(+), 306 deletions(-) diff --git a/usr/src/sys/vax/uba/dh.c b/usr/src/sys/vax/uba/dh.c index 3a42258cd1..a853d5d659 100644 --- a/usr/src/sys/vax/uba/dh.c +++ b/usr/src/sys/vax/uba/dh.c @@ -1,13 +1,11 @@ -/* dh.c 4.15 81/02/16 */ +/* dh.c 4.16 81/02/17 */ #include "dh.h" #if NDH11 > 0 #define DELAY(i) { register int j = i; while (--j > 0); } /* * DH-11 driver - * DOESNT HANDLE EXTENDED ADDRESS BITS. */ - #include "../h/param.h" #include "../h/conf.h" #include "../h/dir.h" @@ -20,9 +18,13 @@ #include "../h/bk.h" #include "../h/clist.h" #include "../h/mx.h" +#include "../h/file.h" -#define UBACVT(x,uban) (cbase[uban] + ((x)-(char *)cfree)) +#define UBACVT(x, uban) (cbase[uban] + ((x)-(char *)cfree)) +/* + * Definition of the controller for the auto-configuration program. + */ int dhcntrlr(), dhslave(), dhrint(), dhxint(); struct uba_dinfo *dhinfo[NDH11]; u_short dhstd[] = { 0 }; @@ -37,9 +39,7 @@ int ttrstrt(); int dh_ubinfo[MAXNUBA]; int cbase[MAXNUBA]; -/* - * Hardware control bits - */ +/* Bits in dhlpr */ #define BITS6 01 #define BITS7 02 #define BITS8 03 @@ -76,9 +76,7 @@ int cbase[MAXNUBA]; #define DM_DTR 02 /* data terminal ready */ #define DM_RQS 04 /* request to send */ -/* - * Software copy of last dhbar - */ +/* Software copy of last dhbar */ short dhsar[NDH11]; struct device @@ -100,11 +98,12 @@ struct device * Routine for configuration to force a dh to interrupt. * Set to transmit at 9600 baud, and cause a transmitter interrupt. */ +/*ARGSUSED*/ dhcntrlr(ui, reg) struct uba_dinfo *ui; caddr_t reg; { - register int br, cvec; + register int br, cvec; /* these are ``value-result'' */ register struct device *dhaddr = (struct device *)reg; int i; @@ -133,7 +132,9 @@ dhslave(ui, reg, slaveno) } /* - * Open a DH11 line. + * Open a DH11 line, mapping the clist onto the uba if this + * is the first dh on this uba. Turn on this dh if this is + * the first use of it. Also do a dmopen to wait for carrier. */ /*ARGSUSED*/ dhopen(dev, flag) @@ -147,18 +148,25 @@ dhopen(dev, flag) unit = minor(dev); dh = unit >> 4; - if (unit >= NDH11*16 || (ui = dhinfo[dh])->ui_alive == 0) { + if (unit >= NDH11*16 || (ui = dhinfo[dh])== 0 || ui->ui_alive == 0) { u.u_error = ENXIO; return; } tp = &dh11[unit]; - ui = dhinfo[dh]; + if (tp->t_state&XCLUDE && u.u_uid!=0) { + u.u_error = EBUSY; + return; + } addr = (struct device *)ui->ui_addr; tp->t_addr = (caddr_t)addr; tp->t_oproc = dhstart; tp->t_iproc = NULL; tp->t_state |= WOPEN; - s = spl6(); + /* + * While setting up state for this uba and this dh, + * block uba resets which can clear the state. + */ + s = spl5(); if (dh_ubinfo[ui->ui_ubanum] == 0) { /* 512+ is a kludge to try to get around a hardware problem */ dh_ubinfo[ui->ui_ubanum] = @@ -168,10 +176,14 @@ dhopen(dev, flag) } if ((dhact&(1<un.dhcsr |= DH_IE; - addr->dhsilo = 16; + DELAY(5); dhact |= (1<dhsilo = 16; } splx(s); + /* + * If this is first open, initialze tty state to default. + */ if ((tp->t_state&ISOPEN) == 0) { ttychars(tp); if (tp->t_ispeed == 0) { @@ -181,16 +193,15 @@ dhopen(dev, flag) } dhparam(unit); } - if (tp->t_state&XCLUDE && u.u_uid!=0) { - u.u_error = EBUSY; - return; - } + /* + * Wait for carrier, then process line discipline specific open. + */ dmopen(dev); (*linesw[tp->t_line].l_open)(dev, tp); } /* - * Close a DH11 line. + * Close a DH11 line, turning off the DM11. */ /*ARGSUSED*/ dhclose(dev, flag) @@ -209,9 +220,6 @@ dhclose(dev, flag) ttyclose(tp); } -/* - * Read from a DH11 line. - */ dhread(dev) dev_t dev; { @@ -221,9 +229,6 @@ dhread(dev) (*linesw[tp->t_line].l_read)(tp); } -/* - * write on a DH11 line - */ dhwrite(dev) dev_t dev; { @@ -247,42 +252,44 @@ dhrint(dh) int s; ui = dhinfo[dh]; - if (ui == 0) { - printf("stray dhrint %d\n", dh); - asm("halt"); - return; - } addr = (struct device *)ui->ui_addr; - tp0 = &dh11[dh*16]; - while ((c = addr->dhrcr) < 0) { /* char. present */ - tp = tp0 + ((c>>8)&017); - if (tp >= &dh11[NDH11*16]) - continue; - if((tp->t_state&ISOPEN)==0) { + tp0 = &dh11[dh<<4]; + /* + * Loop fetching characters from the silo for this + * dh until there are no more in the silo. + */ + while ((c = addr->dhrcr) < 0) { + tp = tp0 + ((c>>8)&0xf); + if ((tp->t_state&ISOPEN)==0) { wakeup((caddr_t)tp); continue; } - if (c&DH_PE) + if (c & DH_PE) if ((tp->t_flags&(EVENP|ODDP))==EVENP || (tp->t_flags&(EVENP|ODDP))==ODDP ) continue; - if (c&DH_DO) + if (c & DH_DO) printf("O"); - if (c&DH_FE) /* break */ + if (c & DH_FE) + /* + * At framing error (break) generate + * a null (in raw mode, for getty), or a + * interrupt (in cooked/cbreak mode). + */ if (tp->t_flags&RAW) - c = 0; /* null (for getty) */ + c = 0; else c = tun.t_intrc; if (tp->t_line == NETLDISC) { c &= 0177; BKINPUT(c, tp); } else - (*linesw[tp->t_line].l_rint)(c,tp); + (*linesw[tp->t_line].l_rint)(c, tp); } } /* - * stty/gtty for DH11 + * Ioctl for DH11. */ /*ARGSUSED*/ dhioctl(dev, cmd, addr, flag) @@ -293,10 +300,10 @@ dhioctl(dev, cmd, addr, flag) tp = &dh11[unit]; cmd = (*linesw[tp->t_line].l_ioctl)(tp, cmd, addr); - if (cmd==0) + if (cmd == 0) return; if (ttioctl(tp, cmd, addr, flag)) { - if (cmd==TIOCSETP||cmd==TIOCSETN) + if (cmd==TIOCSETP || cmd==TIOCSETN) dhparam(unit); } else switch(cmd) { case TIOCSBRK: @@ -330,15 +337,19 @@ dhparam(unit) tp = &dh11[unit]; addr = (struct device *)tp->t_addr; + /* + * Block interrupts so parameters will be set + * before the line interrupts. + */ s = spl5(); - addr->un.dhcsrl = (unit&017) | DH_IE; + addr->un.dhcsrl = (unit&0xf) | DH_IE; if ((tp->t_ispeed)==0) { tp->t_state |= HUPCLS; dmctl(unit, DM_OFF, DMSET); return; } lpar = ((tp->t_ospeed)<<10) | ((tp->t_ispeed)<<6); - if ((tp->t_ispeed) == 4) /* 134.5 baud */ + if ((tp->t_ispeed) == B134) lpar |= BITS6|PENABLE|HDUPLX; else if ((tp->t_flags&RAW) || (tp->t_local&LLITOUT)) lpar |= BITS8; @@ -346,7 +357,7 @@ dhparam(unit) lpar |= BITS7|PENABLE; if ((tp->t_flags&EVENP) == 0) lpar |= OPAR; - if ((tp->t_ospeed) == 3) /* 110 baud */ + if ((tp->t_ospeed) == B110) lpar |= TWOSB; addr->dhlpr = lpar; splx(s); @@ -364,21 +375,23 @@ dhxint(dh) register struct device *addr; short ttybit, bar, *sbar; register struct uba_dinfo *ui; - register unit; + register int unit; int s; + u_short cnt; ui = dhinfo[dh]; addr = (struct device *)ui->ui_addr; if (addr->un.dhcsr & DH_NXM) { + DELAY(5); addr->un.dhcsr |= DH_CNI; - printf("dh%d NXM\n", ui->ui_ctlr); + printf("dh%d NXM\n", dh); } - addr->un.dhcsr &= (short)~DH_TI; sbar = &dhsar[dh]; bar = *sbar & ~addr->dhbar; unit = dh * 16; ttybit = 1; - for(; bar; unit++, ttybit <<= 1) { - if(bar&ttybit) { + addr->un.dhcsr &= (short)~DH_TI; + for (; bar; unit++, ttybit <<= 1) { + if (bar & ttybit) { *sbar &= ~ttybit; bar &= ~ttybit; tp = &dh11[unit]; @@ -387,10 +400,14 @@ dhxint(dh) tp->t_state &= ~FLUSH; else { addr->un.dhcsrl = (unit&017)|DH_IE; - ndflush(&tp->t_outq, - /* SHOULD PASTE ON 16&17 BITS HERE */ - addr->dhcar- - UBACVT(tp->t_outq.c_cf,ui->ui_ubanum)); + DELAY(5); + /* + * Do arithmetic in a short to make up + * for lost 16&17 bits. + */ + cnt = addr->dhcar - + UBACVT(tp->t_outq.c_cf, ui->ui_ubanum); + ndflush(&tp->t_outq, cnt); } if (tp->t_line) (*linesw[tp->t_line].l_start)(tp); @@ -407,19 +424,28 @@ dhstart(tp) register struct tty *tp; { register struct device *addr; - register int nch, dh, unit; + register int car, dh, unit, nch; int s; - /* - * If it's currently active, or delaying, - * no need to do anything. - */ - s = spl5(); unit = minor(tp->t_dev); dh = unit >> 4; + unit &= 0xf; addr = (struct device *)tp->t_addr; + + /* + * Must hold interrupts in following code to prevent + * state of the tp from changing. + */ + s = spl5(); + /* + * If it's currently active, or delaying, no need to do anything. + */ if (tp->t_state&(TIMEOUT|BUSY|TTSTOP)) goto out; + /* + * If there are sleepers, and output has drained below low + * water mark, wake up the sleepers. + */ if ((tp->t_state&ASLEEP) && tp->t_outq.c_cc<=TTLOWAT(tp)) { tp->t_state &= ~ASLEEP; if (tp->t_chan) @@ -427,28 +453,38 @@ dhstart(tp) else wakeup((caddr_t)&tp->t_outq); } + /* + * Now restart transmission unless the output queue is + * empty. + */ if (tp->t_outq.c_cc == 0) goto out; if (tp->t_flags & RAW) nch = ndqb(&tp->t_outq, 0); else { nch = ndqb(&tp->t_outq, 0200); + /* + * If first thing on queue is a delay process it. + */ if (nch == 0) { nch = getc(&tp->t_outq); - timeout(ttrstrt, (caddr_t)tp, (nch&0177)+6); + timeout(ttrstrt, (caddr_t)tp, (nch&0x7f)+6); tp->t_state |= TIMEOUT; goto out; } } + /* + * If characters to transmit, restart transmission. + */ if (nch) { - /* SHOULD PASTE ON BITS 16&17 HERE */ - addr->un.dhcsrl = (unit&017)|DH_IE; - addr->dhcar = UBACVT(tp->t_outq.c_cf, - dhinfo[dh]->ui_ubanum); + car = UBACVT(tp->t_outq.c_cf, dhinfo[dh]->ui_ubanum); + addr->un.dhcsrl = unit|((car>>12)&0x30)|DH_IE; + DELAY(5); + unit = 1 << unit; + dhsar[dh] |= unit; + addr->dhcar = car; addr->dhbcr = -nch; - nch = 1<<(unit&017); - addr->dhbar |= nch; - dhsar[dh] |= nch; + addr->dhbar |= unit; tp->t_state |= BUSY; } out: @@ -456,20 +492,30 @@ out: } /* - * Stop output on a line. + * Stop output on a line, e.g. for ^S/^Q or output flush. */ /*ARGSUSED*/ dhstop(tp, flag) -register struct tty *tp; + register struct tty *tp; { register struct device *addr; register int unit, s; addr = (struct device *)tp->t_addr; - s = spl6(); + /* + * Block input/output interrupts while messing with state. + */ + s = spl5(); if (tp->t_state & BUSY) { + /* + * Device is transmitting; stop output + * by selecting the line and setting the byte + * count to -1. We will clean up later + * by examining the address where the dh stopped. + */ unit = minor(tp->t_dev); addr->un.dhcsrl = (unit&017) | DH_IE; + DELAY(5); if ((tp->t_state&TTSTOP)==0) tp->t_state |= FLUSH; addr->dhbcr = -1; @@ -483,6 +529,7 @@ register struct tty *tp; * restart transmitters. */ dhreset(uban) + int uban; { register int dh, unit; register struct tty *tp; @@ -502,6 +549,7 @@ dhreset(uban) if (ui == 0 || ui->ui_alive == 0 || ui->ui_ubanum != uban) continue; ((struct device *)ui->ui_addr)->un.dhcsr |= DH_IE; + DELAY(5); ((struct device *)ui->ui_addr)->dhsilo = 16; unit = dh * 16; for (i = 0; i < 16; i++) { @@ -518,6 +566,10 @@ dhreset(uban) dhtimer(); } +/* + * At software clock interrupt time or after a UNIBUS reset + * empty all the dh silos. + */ dhtimer() { register int dh; @@ -526,9 +578,152 @@ dhtimer() dhrint(dh); } -#if DHDM -#include "../dev/dhdm.c" -#else -#include "../dev/dhfdm.c" -#endif -#endif +/* + * DM-11 driver. + */ + +/* + * Definition of the controller for the auto-configuration program. + */ +int dmcntrlr(), dmslave(), dmintr(); +struct uba_dinfo *dminfo[NDH11]; +u_short dmstd[] = { 0 }; +struct uba_driver dmdriver = + { dmcntrlr, dmslave, 0, 0, dmstd, "dm", dminfo }; + +/* hardware bits */ +#define DM_CARRTRANS 040000 /* carrier transition */ +#define DM_CLSCAN 004000 /* clear scan */ +#define DM_DONE 000200 +#define DM_CARRON 000100 /* carrier on */ +#define DM_SCENABLE 000040 /* scan enable */ +#define DM_SCBUSY 000020 /* scan busy */ + +struct dmdevice +{ + short dmcsr; + short dmlstat; + short dmpad1[2]; +}; + +dmcntrlr(um, addr) + struct uba_minfo *um; + caddr_t addr; +{ + +} + +dmslave() +{ + +} + +/* + * Turn on the line associated with the dh device dev. + */ +dmopen(dev) + dev_t dev; +{ + register struct tty *tp; + register struct dmdevice *addr; + register struct uba_dinfo *ui; + register int unit; + register int dm; + + unit = minor(dev); + dm = unit >> 8; + tp = &dh11[unit]; + if (dm >= NDH11 || (ui = dminfo[dm]) == 0 || ui->ui_alive == 0) { + tp->t_state |= CARR_ON; + return; + } + addr = (struct dmdevice *)ui->ui_addr; + spl5(); + addr->dmcsr &= ~DM_SCENABLE; + while (addr->dmcsr & DM_SCBUSY) + ; + addr->dmcsr = unit & 0xf; + addr->dmlstat = DM_ON; + if (addr->dmlstat&DM_CARRON) + tp->t_state |= CARR_ON; + addr->dmcsr = DH_IE|DM_SCENABLE; + while ((tp->t_state&CARR_ON)==0) + sleep((caddr_t)&tp->t_rawq, TTIPRI); + spl0(); +} + +/* + * Dump control bits into the DM registers. + */ +dmctl(dev, bits, how) + dev_t dev; + int bits, how; +{ + register struct uba_dinfo *ui; + register struct dmdevice *addr; + register int unit, s; + int dm; + + unit = minor(dev); + dm = unit >> 4; + if ((ui = dminfo[dm]) == 0 || ui->ui_alive == 0) + return; + addr = (struct dmdevice *)ui->ui_addr; + s = spl5(); + addr->dmcsr &= ~DM_SCENABLE; + while (addr->dmcsr & DM_SCBUSY) + ; + addr->dmcsr = unit & 0xf; + switch(how) { + case DMSET: + addr->dmlstat = bits; + break; + case DMBIS: + addr->dmlstat |= bits; + break; + case DMBIC: + addr->dmlstat &= ~bits; + break; + } + addr->dmcsr = DH_IE|DM_SCENABLE; + splx(s); +} + +/* + * DM11 interrupt; deal with carrier transitions. + */ +dmintr(dm) + register int dm; +{ + register struct uba_dinfo *ui; + register struct tty *tp; + register struct dmdevice *addr; + + ui = dminfo[dm]; + addr = (struct dmdevice *)ui->ui_addr; + if (addr->dmcsr&DM_DONE && addr->dmcsr&DM_CARRTRANS) { + tp = &dh11[(dm<<4)+(addr->dmcsr&0xf)]; + wakeup((caddr_t)&tp->t_rawq); + if ((tp->t_state&WOPEN)==0 && + (tp->t_local&LMDMBUF)) { + if (addr->dmlstat & DM_CARRON) { + tp->t_state &= ~TTSTOP; + ttstart(tp); + } else if ((tp->t_state&TTSTOP) == 0) { + tp->t_state |= TTSTOP; + dhstop(tp, 0); + } + } else if ((addr->dmlstat&DM_CARRON)==0) { + if ((tp->t_state&WOPEN)==0 && + (tp->t_local&LNOHANG)==0) { + gsignal(tp->t_pgrp, SIGHUP); + gsignal(tp->t_pgrp, SIGCONT); + addr->dmlstat = 0; + flushtty(tp, FREAD|FWRITE); + } + tp->t_state &= ~CARR_ON; + } else + tp->t_state |= CARR_ON; + addr->dmcsr = DH_IE|DM_SCENABLE; + } +} diff --git a/usr/src/sys/vax/uba/dz.c b/usr/src/sys/vax/uba/dz.c index 3a0d465e17..5d61b980e1 100644 --- a/usr/src/sys/vax/uba/dz.c +++ b/usr/src/sys/vax/uba/dz.c @@ -1,10 +1,12 @@ -/* dz.c 4.12 %G% */ +/* dz.c 4.13 %G% */ #include "dz.h" #if NDZ11 > 0 #define DELAY(i) { register int j = i; while (--j > 0); } /* * DZ-11 Driver + * + * This driver mimics dh.c; see it for explanation of common code. */ #include "../h/param.h" #include "../h/systm.h" @@ -21,6 +23,9 @@ #include "../h/file.h" #include "../h/mx.h" +/* + * Driver information for auto-configuration stuff. + */ int dzcntrlr(), dzslave(), dzrint(); struct uba_dinfo *dzinfo[NDZ11]; u_short dzstd[] = { 0 }; @@ -29,49 +34,68 @@ struct uba_driver dzdriver = #define NDZ (NDZ11*8) +/* + * Registers and bits + */ + +/* Bits in dzlpr */ #define BITS7 020 #define BITS8 030 #define TWOSB 040 #define PENABLE 0100 #define OPAR 0200 -#define CLR 020 /* Reset dz */ -#define MSE 040 /* Master Scan Enable */ -#define RIE 0100 /* Receiver Interrupt Enable */ -#define SAE 010000 /* Silo Alarm Enable */ -#define TIE 040000 /* Transmit Interrupt Enable */ -#define DZ_IEN (MSE+RIE+TIE+SAE) -#define PERROR 010000 -#define FRERROR 020000 -#define OVERRUN 040000 -#define SSPEED 7 /* std speed = 300 baud */ -#define dzlpr dzrbuf -#define dzmsr dzbrk -#define ON 1 -#define OFF 0 +/* Bits in dzrbuf */ +#define DZ_PE 010000 +#define DZ_FE 020000 +#define DZ_DO 040000 + +/* Bits in dzcsr */ +#define DZ_CLR 020 /* Reset dz */ +#define DZ_MSE 040 /* Master Scan Enable */ +#define DZ_RIE 0100 /* Receiver Interrupt Enable */ +#define DZ_SAE 010000 /* Silo Alarm Enable */ +#define DZ_TIE 040000 /* Transmit Interrupt Enable */ +#define DZ_IEN (DZ_MSE+DZ_RIE+DZ_TIE+DZ_SAE) + +/* Flags for modem-control */ +#define DZ_ON 1 +#define DZ_OFF 0 -int dzstart(); -int dzxint(); -int dzdma(); +int dzstart(), dzxint(), dzdma(); int ttrstrt(); struct tty dz_tty[NDZ]; int dz_cnt = { NDZ }; int dzact; struct device { - short dzcsr; - short dzrbuf; - char dztcr; - char dzdtr; - char dztbuf; - char dzbrk; + short dzcsr; /* control-status register */ + short dzrbuf; /* receiver buffer */ +#define dzlpr dzrbuf /* line parameter reg is write of dzrbuf */ + char dztcr; /* transmit control register */ + char dzdtr; /* data terminal ready */ + char dztbuf; /* transmit buffer */ + char dzbrk; /* break control */ +#define dzmsr dzbrk /* modem status register */ }; +/* + * Software copy of dzbrk since it isn't readable + */ +char dz_brk[NDZ11]; +/* + * The dz doesn't interrupt on carrier transitions, so + * we have to use a timer to watch it. + */ +char dz_timer; /* timer started? */ + +/* + * Pdma structures for fast output code + */ struct pdma dzpdma[NDZ]; -char dz_timer; + char dz_speeds[] = { 0,020,021,022,023,024,0,025,026,027,030,032,034,036,0,0 }; -char dz_brk[NDZ11]; dzcntrlr(ui, reg) struct uba_dinfo *ui; @@ -80,15 +104,19 @@ dzcntrlr(ui, reg) register int br, cvec; register struct device *dzaddr = (struct device *)reg; - dzaddr->dzcsr = TIE|MSE; + dzaddr->dzcsr = DZ_TIE|DZ_MSE; dzaddr->dztcr = 1; /* enable any line */ DELAY(100000); - dzaddr->dzcsr = CLR; /* reset everything */ + dzaddr->dzcsr = DZ_CLR; /* reset everything */ if (cvec && cvec != 0x200) cvec -= 4; return (1); } +/* + * Called by auto-configure to initialize good dz's; + * set up pdma structures. + */ dzslave(ui, reg, slaveno, uban) register struct uba_dinfo *ui; caddr_t reg; @@ -96,7 +124,6 @@ dzslave(ui, reg, slaveno, uban) register struct pdma *pdp = &dzpdma[ui->ui_unit*8]; register struct tty *tp = &dz_tty[ui->ui_unit*8]; register int cnt; - caddr_t cp; for (cnt = 0; cnt < 8; cnt++) { pdp->p_addr = (struct device *)reg; @@ -122,7 +149,7 @@ dzopen(dev, flag) } if (dz_timer == 0) { dz_timer++; - timeout(dzscan, (caddr_t)0, 60); + timeout(dzscan, (caddr_t)0, HZ); } tp = &dz_tty[unit]; tp->t_addr = (caddr_t)&dzpdma[unit]; @@ -131,15 +158,15 @@ dzopen(dev, flag) tp->t_state |= WOPEN; if ((tp->t_state & ISOPEN) == 0) { ttychars(tp); - tp->t_ospeed = tp->t_ispeed = SSPEED; + tp->t_ospeed = tp->t_ispeed = B300; tp->t_flags = ODDP|EVENP|ECHO; - /*tp->t_state |= HUPCLS;*/ + /* tp->t_state |= HUPCLS; */ dzparam(unit); } else if (tp->t_state&XCLUDE && u.u_uid != 0) { u.u_error = EBUSY; return; } - dzmodem(unit, ON); + dzmodem(unit, DZ_ON); (void) spl5(); while ((tp->t_state & CARR_ON) == 0) { tp->t_state |= WOPEN; @@ -164,7 +191,7 @@ dzclose(dev, flag) ((struct pdma *)(tp->t_addr))->p_addr->dzbrk = (dz_brk[dz] &= ~(1 << (unit&07))); if (tp->t_state & HUPCLS) - dzmodem(unit, OFF); + dzmodem(unit, DZ_OFF); ttyclose(tp); } @@ -210,16 +237,14 @@ dzrint(dz) wakeup((caddr_t)&tp->t_rawq); continue; } - if (c&FRERROR) - /* framing error = break */ + if (c&DZ_FE) if (tp->t_flags & RAW) - c = 0; /* null for getty */ + c = 0; else c = tun.t_intrc; - if (c&OVERRUN) + if (c&DZ_DO) printf("o"); - if (c&PERROR) - /* parity error */ + if (c&DZ_PE) if (((tp->t_flags & (EVENP|ODDP)) == EVENP) || ((tp->t_flags & (EVENP|ODDP)) == ODDP)) continue; @@ -258,10 +283,10 @@ dzioctl(dev, cmd, addr, flag) (dz_brk[dz] &= ~(1 << (unit&07))); break; case TIOCSDTR: - dzmodem(unit, ON); + dzmodem(unit, DZ_ON); break; case TIOCCDTR: - dzmodem(unit, OFF); + dzmodem(unit, DZ_OFF); break; default: u.u_error = ENOTTY; @@ -280,7 +305,7 @@ dzparam(unit) dzaddr->dzcsr = DZ_IEN; dzact |= (1<<(unit>>3)); if (tp->t_ispeed == 0) { - dzmodem(unit, OFF); /* hang up line */ + dzmodem(unit, DZ_OFF); /* hang up line */ return; } lpr = (dz_speeds[tp->t_ispeed]<<8) | (unit & 07); @@ -290,8 +315,8 @@ dzparam(unit) lpr |= (BITS7|PENABLE); if ((tp->t_flags & EVENP) == 0) lpr |= OPAR; - if (tp->t_ispeed == 3) - lpr |= TWOSB; /* 110 baud: 2 stop bits */ + if (tp->t_ispeed == B110) + lpr |= TWOSB; dzaddr->dzlpr = lpr; } @@ -301,7 +326,7 @@ dzxint(tp) register struct pdma *dp; register s; - s = spl5(); + s = spl5(); /* block pdma interrupts */ dp = (struct pdma *)tp->t_addr; tp->t_state &= ~BUSY; if (tp->t_state & FLUSH) @@ -345,7 +370,7 @@ dzstart(tp) cc = ndqb(&tp->t_outq, 0200); if (cc == 0) { cc = getc(&tp->t_outq); - timeout(ttrstrt, (caddr_t)tp, (cc&0177) + 6); + timeout(ttrstrt, (caddr_t)tp, (cc&0x7f) + 6); tp->t_state |= TIMEOUT; goto out; } @@ -353,7 +378,7 @@ dzstart(tp) tp->t_state |= BUSY; dp->p_end = dp->p_mem = tp->t_outq.c_cf; dp->p_end += cc; - dzaddr->dztcr |= 1 << (minor(tp->t_dev) & 07); + dzaddr->dztcr |= 1 << (minor(tp->t_dev) & 07); /* force intr */ out: splx(s); } @@ -386,7 +411,7 @@ dzmodem(unit, flag) dzaddr = dzpdma[unit].p_addr; bit = 1<<(unit&07); - if (flag == OFF) + if (flag == DZ_OFF) dzaddr->dzdtr &= ~bit; else dzaddr->dzdtr |= bit; @@ -414,7 +439,8 @@ dzscan() tp->t_state |= CARR_ON; } } else { - if ((tp->t_state&CARR_ON) && (tp->t_local&LNOHANG)==0) { + if ((tp->t_state&CARR_ON) && + (tp->t_local&LNOHANG)==0) { /* carrier lost */ if (tp->t_state&ISOPEN) { gsignal(tp->t_pgrp, SIGHUP); @@ -460,7 +486,7 @@ dzreset(uban) tp = &dz_tty[unit]; if (tp->t_state & (ISOPEN|WOPEN)) { dzparam(unit); - dzmodem(unit, ON); + dzmodem(unit, DZ_ON); tp->t_state &= ~BUSY; dzstart(tp); } diff --git a/usr/src/sys/vax/uba/tm.c b/usr/src/sys/vax/uba/tm.c index 9f0b3b1126..b81cfd729d 100644 --- a/usr/src/sys/vax/uba/tm.c +++ b/usr/src/sys/vax/uba/tm.c @@ -1,11 +1,14 @@ -/* tm.c 4.11 %G% */ +/* tm.c 4.12 %G% */ #include "tm.h" -#if NTM > 0 +#if NTM03 > 0 /* * TM tape driver + * + * THIS HANDLES ONLY ONE DRIVE ON ONE CONTROLER, AS WE HAVE NO + * WAY TO TEST MULTIPLE TRANSPORTS. */ -#define DELAY(N) { register int d; d = N; while (--d > 0); } +#define DELAY(N) { register int d = N; while (--d > 0); } #include "../h/param.h" #include "../h/buf.h" #include "../h/dir.h" @@ -27,12 +30,11 @@ struct buf ctmbuf; struct buf rtmbuf; int tmcntrlr(), tmslave(), tmdgo(), tmintr(); -struct uba_dinfo *tmdinfo[NTM]; -struct uba_minfo *tmminfo[NTM]; +struct uba_minfo *tmminfo[NTM03]; +struct uba_dinfo *tmdinfo[NTM11]; u_short tmstd[] = { 0772520, 0 }; struct uba_driver tmdriver = { tmcntrlr, tmslave, tmdgo, 0, tmstd, "tm", tmdinfo, tmminfo }; -int tm_ubinfo; /* bits in minor device */ #define T_NOREWIND 04 @@ -40,21 +42,16 @@ int tm_ubinfo; #define INF (daddr_t)1000000L -/* - * Really only handle one tape drive... if you have more than one, - * you can put all these (and some of the above) in a structure, - * change the obvious things, and make tmslave smarter, but - * it is not clear what happens when some drives are transferring while - * others rewind, so we don't pretend that this driver handles multiple - * tape drives. - */ -char t_openf; -daddr_t t_blkno; -char t_flags; -daddr_t t_nxrec; -u_short t_erreg; -u_short t_dsreg; -short t_resid; +struct tm_softc { + char sc_openf; + char sc_flags; + daddr_t sc_blkno; + daddr_t sc_nxrec; + u_short sc_erreg; + u_short sc_dsreg; + short sc_resid; + int sc_ubinfo; +} tm_softc[NTM03]; #define SSEEK 1 /* seeking */ #define SIO 2 /* doing seq i/o */ @@ -82,6 +79,10 @@ tmcntrlr(um, reg) * Just in case, we will reference one * of the more distant registers, and hope for a machine * check, or similar disaster if this is a ts. + * + * Note: on an 11/780, badaddr will just generate + * a uba error for a ts; but our caller will notice that + * so we won't check for it. */ if (badaddr(&((struct device *)reg)->tmrd, 2)) return (0); @@ -113,43 +114,48 @@ tmopen(dev, flag) { register ds, unit; register struct uba_dinfo *ui; + register struct tm_softc *sc = &tm_softc[0]; tmminfo[0]->um_tab.b_flags |= B_TAPE; unit = minor(dev)&03; - if (unit>=NTM || t_openf || !(ui = tmdinfo[minor(dev)&03])->ui_alive) { + if (unit>=NTM11 || sc->sc_openf || (ui = tmdinfo[0]) == 0 || ui->ui_alive==0) { u.u_error = ENXIO; /* out of range or open */ return; } tcommand(dev, NOP, 1); - if ((t_erreg&SELR) == 0) { - u.u_error = EIO; /* offline */ - return; + if ((sc->sc_erreg&SELR) == 0) { + u.u_error = EIO; + goto eio; } - t_openf = 1; - if (t_erreg&RWS) + sc->sc_openf = 1; + if (sc->sc_erreg&RWS) tmwaitrws(dev); /* wait for rewind complete */ - while (t_erreg&SDWN) + while (sc->sc_erreg&SDWN) tcommand(dev, NOP, 1); /* await settle down */ - if ((t_erreg&TUR)==0 || - ((flag&(FREAD|FWRITE)) == FWRITE && (t_erreg&WRL))) { + if ((sc->sc_erreg&TUR)==0 || + ((flag&(FREAD|FWRITE)) == FWRITE && (sc->sc_erreg&WRL))) { ((struct device *)ui->ui_addr)->tmcs = DCLR|GO; u.u_error = EIO; /* offline or write protect */ } if (u.u_error != 0) { - t_openf = 0; + sc->sc_openf = 0; + if (u.u_error == EIO) +eio: + uprintf("tape offline or protected\n"); return; } - t_blkno = (daddr_t)0; - t_nxrec = INF; - t_flags = 0; - t_openf = 1; + sc->sc_blkno = (daddr_t)0; + sc->sc_nxrec = INF; + sc->sc_flags = 0; + sc->sc_openf = 1; } tmwaitrws(dev) register dev; { register struct device *addr = - (struct device *)tmdinfo[minor(dev)&03]->ui_addr; + (struct device *)tmdinfo[0]->ui_addr; + register struct tm_softc *sc = &tm_softc[0]; spl5(); for (;;) { @@ -157,8 +163,8 @@ tmwaitrws(dev) spl0(); /* rewind complete */ return; } - t_flags |= WAITREW; - sleep((caddr_t)&t_flags, PRIBIO); + sc->sc_flags |= WAITREW; + sleep((caddr_t)&sc->sc_flags, PRIBIO); } } @@ -166,15 +172,16 @@ tmclose(dev, flag) register dev_t dev; register flag; { + register struct tm_softc *sc = &tm_softc[0]; - if (flag == FWRITE || ((flag&FWRITE) && (t_flags&LASTIOW))) { + if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&LASTIOW))) { tcommand(dev, WEOF, 1); tcommand(dev, WEOF, 1); tcommand(dev, SREV, 1); } if ((minor(dev)&T_NOREWIND) == 0) tcommand(dev, REW, 1); - t_openf = 0; + sc->sc_openf = 0; } tcommand(dev, com, count) @@ -210,7 +217,7 @@ tmstrategy(bp) tmwaitrws(bp->b_dev); if (bp != &ctmbuf) { - p = &t_nxrec; + p = &tm_softc[0].sc_nxrec; if (dbtofsb(bp->b_blkno) > *p) { bp->b_flags |= B_ERROR; bp->b_error = ENXIO; /* past EOF */ @@ -240,23 +247,24 @@ tmstrategy(bp) tmstart() { register struct buf *bp; + register struct uba_minfo *um = tmminfo[0]; register struct uba_dinfo *ui; register struct device *addr; - register cmd; - register daddr_t blkno; - int s; + register struct tm_softc *sc = &tm_softc[0]; + int cmd, s; + daddr_t blkno; loop: - if ((bp = tmminfo[0]->um_tab.b_actf) == 0) + if ((bp = um->um_tab.b_actf) == 0) return; - ui = tmdinfo[minor(bp->b_dev)&03]; + ui = tmdinfo[0]; addr = (struct device *)ui->ui_addr; - t_dsreg = addr->tmcs; - t_erreg = addr->tmer; - t_resid = addr->tmbc; - t_flags &= ~LASTIOW; - if (t_openf < 0 || (addr->tmcs&CUR) == 0) { - /* t_openf = -1; ??? */ + sc->sc_dsreg = addr->tmcs; + sc->sc_erreg = addr->tmer; + sc->sc_resid = addr->tmbc; + sc->sc_flags &= ~LASTIOW; + if (sc->sc_openf < 0 || (addr->tmcs&CUR) == 0) { + /* sc->sc_openf = -1; ??? */ bp->b_flags |= B_ERROR; /* hard error'ed or !SELR */ goto next; } @@ -268,33 +276,33 @@ loop: goto next; /* just get status */ else { cmd |= bp->b_command; - tmminfo[0]->um_tab.b_active = SCOM; + um->um_tab.b_active = SCOM; if (bp->b_command == SFORW || bp->b_command == SREV) addr->tmbc = bp->b_repcnt; addr->tmcs = cmd; return; } } - if ((blkno = t_blkno) == dbtofsb(bp->b_blkno)) { + if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { addr->tmbc = -bp->b_bcount; s = spl6(); - if (tm_ubinfo == 0) - tm_ubinfo = ubasetup(ui->ui_ubanum, bp, 1); + if (sc->sc_ubinfo == 0) + sc->sc_ubinfo = ubasetup(ui->ui_ubanum, bp, 1); splx(s); if ((bp->b_flags&B_READ) == 0) { - if (tmminfo[0]->um_tab.b_errcnt) + if (um->um_tab.b_errcnt) cmd |= WIRG; else cmd |= WCOM; } else cmd |= RCOM; - cmd |= (tm_ubinfo >> 12) & 0x30; - tmminfo[0]->um_tab.b_active = SIO; - addr->tmba = tm_ubinfo; + cmd |= (sc->sc_ubinfo >> 12) & 0x30; + um->um_tab.b_active = SIO; + addr->tmba = sc->sc_ubinfo; addr->tmcs = cmd; return; } - tmminfo[0]->um_tab.b_active = SSEEK; + um->um_tab.b_active = SSEEK; if (blkno < dbtofsb(bp->b_blkno)) { cmd |= SFORW; addr->tmbc = blkno - dbtofsb(bp->b_blkno); @@ -306,35 +314,40 @@ loop: return; next: - ubarelse(ui->ui_ubanum, &tm_ubinfo); - tmminfo[0]->um_tab.b_actf = bp->av_forw; + ubarelse(ui->ui_ubanum, &sc->sc_ubinfo); + um->um_tab.b_actf = bp->av_forw; iodone(bp); goto loop; } tmdgo() { + } +/*ARGSUSED*/ tmintr(d) + int d; { register struct buf *bp; - register struct device *addr = (struct device *)tmdinfo[d]->ui_addr; + register struct uba_minfo *um = tmminfo[0]; + register struct device *addr = (struct device *)tmdinfo[0]->ui_addr; + register struct tm_softc *sc = &tm_softc[0]; register state; - if (t_flags&WAITREW && (addr->tmer&RWS) == 0) { - t_flags &= ~WAITREW; - wakeup((caddr_t)&t_flags); + if (sc->sc_flags&WAITREW && (addr->tmer&RWS) == 0) { + sc->sc_flags &= ~WAITREW; + wakeup((caddr_t)&sc->sc_flags); } - if ((bp = tmminfo[0]->um_tab.b_actf) == NULL) + if ((bp = um->um_tab.b_actf) == NULL) return; - t_dsreg = addr->tmcs; - t_erreg = addr->tmer; - t_resid = addr->tmbc; + sc->sc_dsreg = addr->tmcs; + sc->sc_erreg = addr->tmer; + sc->sc_resid = addr->tmbc; if ((bp->b_flags & B_READ) == 0) - t_flags |= LASTIOW; - state = tmminfo[0]->um_tab.b_active; - tmminfo[0]->um_tab.b_active = 0; + sc->sc_flags |= LASTIOW; + state = um->um_tab.b_active; + um->um_tab.b_active = 0; if (addr->tmcs&ERROR) { while(addr->tmer & SDWN) ; /* await settle down */ @@ -347,17 +360,17 @@ tmintr(d) if ((bp->b_flags&B_READ) && (addr->tmer&(HARD|SOFT)) == RLE) goto out; if ((addr->tmer&HARD)==0 && state==SIO) { - if (++tmminfo[0]->um_tab.b_errcnt < 7) { + if (++um->um_tab.b_errcnt < 7) { if((addr->tmer&SOFT) == NXM) printf("TM UBA late error\n"); - t_blkno++; - ubarelse(tmdinfo[d]->ui_ubanum, &tm_ubinfo); + sc->sc_blkno++; + ubarelse(um->um_ubanum, &sc->sc_ubinfo); tmstart(); return; } - } else if (t_openf>0 && bp != &rtmbuf) - t_openf = -1; - deverror(bp, t_erreg, t_dsreg); + } else if (sc->sc_openf>0 && bp != &rtmbuf) + sc->sc_openf = -1; + deverror(bp, sc->sc_erreg, sc->sc_dsreg); bp->b_flags |= B_ERROR; state = SIO; } @@ -365,18 +378,18 @@ out: switch (state) { case SIO: - t_blkno++; + sc->sc_blkno++; /* fall into ... */ case SCOM: if (bp == &ctmbuf) { switch (bp->b_command) { case SFORW: - t_blkno -= bp->b_repcnt; + sc->sc_blkno -= bp->b_repcnt; break; case SREV: - t_blkno += bp->b_repcnt; + sc->sc_blkno += bp->b_repcnt; break; default: @@ -387,15 +400,15 @@ out: } } errout: - tmminfo[0]->um_tab.b_errcnt = 0; - tmminfo[0]->um_tab.b_actf = bp->av_forw; + um->um_tab.b_errcnt = 0; + um->um_tab.b_actf = bp->av_forw; bp->b_resid = -addr->tmbc; - ubarelse(tmdinfo[d]->ui_ubanum, &tm_ubinfo); + ubarelse(um->um_ubanum, &sc->sc_ubinfo); iodone(bp); break; case SSEEK: - t_blkno = dbtofsb(bp->b_blkno); + sc->sc_blkno = dbtofsb(bp->b_blkno); break; default: @@ -408,22 +421,23 @@ tmseteof(bp) register struct buf *bp; { register struct device *addr = - (struct device *)tmdinfo[minor(bp->b_dev)&03]->ui_addr; + (struct device *)tmdinfo[0]->ui_addr; + register struct tm_softc *sc = &tm_softc[0]; if (bp == &ctmbuf) { - if (t_blkno > dbtofsb(bp->b_blkno)) { + if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { /* reversing */ - t_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; - t_blkno = t_nxrec; + sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; + sc->sc_blkno = sc->sc_nxrec; } else { /* spacing forward */ - t_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; - t_nxrec = t_blkno - 1; + sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; + sc->sc_nxrec = sc->sc_blkno - 1; } return; } /* eof on read */ - t_nxrec = dbtofsb(bp->b_blkno); + sc->sc_nxrec = dbtofsb(bp->b_blkno); } tmread(dev) @@ -443,10 +457,11 @@ tmwrite(dev) tmphys(dev) { register daddr_t a; + register struct tm_softc *sc = &tm_softc[0]; a = dbtofsb(u.u_offset >> 9); - t_blkno = a; - t_nxrec = a + 1; + sc->sc_blkno = a; + sc->sc_nxrec = a + 1; } /*ARGSUSED*/ @@ -455,6 +470,7 @@ tmioctl(dev, cmd, addr, flag) dev_t dev; { register callcount; + register struct tm_softc *sc = &tm_softc[0]; int fcount; struct mtop mtop; struct mtget mtget; @@ -493,15 +509,16 @@ tmioctl(dev, cmd, addr, flag) u.u_error = EIO; break; } - if ((ctmbuf.b_flags&B_ERROR) || t_erreg&BOT) + if ((ctmbuf.b_flags&B_ERROR) || + sc->sc_erreg&BOT) break; } geterror(&ctmbuf); return; case MTIOCGET: - mtget.mt_dsreg = t_dsreg; - mtget.mt_erreg = t_erreg; - mtget.mt_resid = t_resid; + mtget.mt_dsreg = sc->sc_dsreg; + mtget.mt_erreg = sc->sc_erreg; + mtget.mt_resid = sc->sc_resid; if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) u.u_error = EFAULT; return; @@ -543,10 +560,10 @@ tmdump() start += blk; num -= blk; } - tmwait(addr); tmeof(addr); tmeof(addr); - tmrewind(addr); + tmwait(addr); + addr->tmcs = REW | GO; tmwait(addr); return (0); } @@ -580,14 +597,6 @@ tmwait(addr) while ((s & CUR) == 0); } -tmrewind(addr) - struct device *addr; -{ - - tmwait(addr); - addr->tmcs = REW | GO; -} - tmeof(addr) struct device *addr; { diff --git a/usr/src/sys/vax/uba/uba.c b/usr/src/sys/vax/uba/uba.c index 59120a287b..2497e85c38 100644 --- a/usr/src/sys/vax/uba/uba.c +++ b/usr/src/sys/vax/uba/uba.c @@ -1,4 +1,4 @@ -/* uba.c 4.9 %G% */ +/* uba.c 4.10 %G% */ #include "../h/param.h" #include "../h/systm.h" @@ -259,7 +259,7 @@ ubaerror(uban, uh, xx, uvec, uba) sr = uba->uba_sr; s = spl7(); printf("UBA%d ERROR SR %x FMER %x FUBAR %o\n", - uban, uba->uba_sr, uba->uba_fmer, uba->uba_fubar); + uban, uba->uba_sr, uba->uba_fmer, 4*uba->uba_fubar); splx(s); uba->uba_sr = sr; uvec &= UBA_DIV; diff --git a/usr/src/sys/vax/uba/up.c b/usr/src/sys/vax/uba/up.c index 5ac11b0e35..57382ad4d1 100644 --- a/usr/src/sys/vax/uba/up.c +++ b/usr/src/sys/vax/uba/up.c @@ -1,4 +1,4 @@ -/* up.c 4.15 81/02/16 */ +/* up.c 4.16 81/02/17 */ #include "up.h" #if NSC21 > 0 @@ -104,6 +104,7 @@ daddr_t dkblock(); #endif int upwstart, upwatch(); /* Have started guardian */ +int upseek; /*ARGSUSED*/ upcntrlr(um, reg) @@ -143,14 +144,13 @@ upstrategy(bp) register struct buf *bp; { register struct uba_dinfo *ui; - register struct uba_minfo *um; register struct upst *st; register int unit; + register struct buf *dp; int xunit = minor(bp->b_dev) & 07; - long sz, bn; + long bn, sz; - sz = bp->b_bcount; - sz = (sz+511) >> 9; /* transfer size in 512 byte sectors */ + sz = (bp->b_bcount+511) >> 9; unit = dkunit(bp); if (unit >= NUP) goto bad; @@ -163,8 +163,9 @@ upstrategy(bp) goto bad; bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; (void) spl5(); - disksort(&uputab[ui->ui_unit], bp); - if (uputab[ui->ui_unit].b_active == 0) { + dp = &uputab[ui->ui_unit]; + disksort(dp, bp); + if (dp->b_active == 0) { (void) upustart(ui); bp = &ui->ui_mi->um_tab; if (bp->b_actf && bp->b_active == 0) @@ -222,7 +223,6 @@ upustart(ui) sn = (sn + st->nsect - upSDIST) % st->nsect; if (cn - upaddr->updc) goto search; /* Not on-cylinder */ -/**** WHAT SHOULD THIS BE NOW ??? else if (upseek) goto done; /* Ok just to be on-cylinder */ csn = (upaddr->upla>>6) - sn - 1; @@ -232,10 +232,9 @@ upustart(ui) goto done; search: upaddr->updc = cn; -/*** ANOTHER OCCURRENCE if (upseek) upaddr->upcs1 = IE|SEEK|GO; - else ****/ { + else { upaddr->upda = sn; upaddr->upcs1 = IE|SEARCH|GO; } @@ -263,7 +262,8 @@ upstart(um) register struct uba_dinfo *ui; register unit; register struct device *upaddr; - register struct upst *st; + struct upst *st; + struct up_softc *sc = &up_softc[um->um_ctlr]; daddr_t bn; int dn, sn, tn, cmd; @@ -289,7 +289,7 @@ loop: upaddr = (struct device *)ui->ui_addr; if ((upaddr->upcs2 & 07) != dn) upaddr->upcs2 = dn; - up_softc[um->um_ctlr].sc_info = + sc->sc_info = ubasetup(ui->ui_ubanum, bp, UBA_NEEDBDP|UBA_CANTWAIT); /* * If drive is not present and on-line, then @@ -308,7 +308,7 @@ loop: bp->b_flags |= B_ERROR; iodone(bp); /* A funny place to do this ... */ - ubarelse(ui->ui_ubanum, &up_softc[um->um_ctlr].sc_info); + ubarelse(ui->ui_ubanum, &sc->sc_info); goto loop; } printf("-- came back\n"); @@ -330,30 +330,29 @@ loop: */ upaddr->updc = bp->b_cylin; upaddr->upda = (tn << 8) + sn; - upaddr->upba = up_softc[um->um_ctlr].sc_info; + upaddr->upba = sc->sc_info; upaddr->upwc = -bp->b_bcount / sizeof (short); - cmd = (up_softc[um->um_ctlr].sc_info >> 8) & 0x300; + cmd = (sc->sc_info >> 8) & 0x300; if (bp->b_flags & B_READ) cmd |= IE|RCOM|GO; else cmd |= IE|WCOM|GO; upaddr->upcs1 = cmd; /* - * This is a controller busy situation. - * Record in dk slot NUP+UPDK_N (after last drive) - * unless there aren't that many slots reserved for - * us in which case we record this as a drive busy - * (if there is room for that). + * Mark i/o in progress */ - unit = ui->ui_dk; - dk_busy |= 1<b_bcount>>6; + if (ui->ui_dk >= 0) { + unit = ui->ui_dk; + dk_busy |= 1<b_bcount>>6; + } return (1); } updgo() { + } /* @@ -373,18 +372,15 @@ upintr(sc21) register struct uba_dinfo *ui; register struct device *upaddr = (struct device *)um->um_addr; register unit; + struct up_softc *sc = &up_softc[um->um_ctlr]; int as = upaddr->upas & 0377; int needie = 1; (void) spl6(); - up_softc[um->um_ctlr].sc_wticks = 0; + sc->sc_wticks = 0; if (um->um_tab.b_active) { - if ((upaddr->upcs1 & RDY) == 0) { - printf("!RDY: cs1 %o, ds %o, wc %d\n", upaddr->upcs1, - upaddr->upds, upaddr->upwc); - printf("as=%d act %d %d %d\n", as, um->um_tab.b_active, - uputab[0].b_active, uputab[1].b_active); - } + if ((upaddr->upcs1 & RDY) == 0) + printf("upintr !RDY\n"); dp = um->um_tab.b_actf; bp = dp->b_actf; ui = updinfo[dkunit(bp)]; @@ -431,6 +427,7 @@ upintr(sc21) dp->b_errcnt = 0; dp->b_actf = bp->av_forw; bp->b_resid = (-upaddr->upwc * sizeof(short)); + /* CHECK FOR WRITE LOCK HERE... */ if (bp->b_resid) printf("resid %d ds %o er? %o %o %o\n", bp->b_resid, upaddr->upds, @@ -440,19 +437,19 @@ upintr(sc21) if (upustart(ui)) needie = 0; } - up_softc[um->um_ctlr].sc_softas &= ~(1<ui_slave); - ubarelse(ui->ui_ubanum, &up_softc[um->um_ctlr].sc_info); + sc->sc_softas &= ~(1<ui_slave); + ubarelse(ui->ui_ubanum, &sc->sc_info); } else { if (upaddr->upcs1 & TRE) upaddr->upcs1 = TRE; } - as |= up_softc[um->um_ctlr].sc_softas; + as |= sc->sc_softas; + sc->sc_softas = 0; for (unit = 0; unit < NUP; unit++) { if ((ui = updinfo[unit]) == 0 || ui->ui_mi != um) continue; if (as & (1<upas = 1<upas = 1<ui_unit].b_actf; register struct uba_minfo *um = ui->ui_mi; register struct upst *st; + struct up_softc *sc = &up_softc[um->um_ctlr]; struct uba_regs *ubp = ui->ui_hd->uh_uba; register int i; caddr_t addr; @@ -500,7 +500,7 @@ upecc(ui) * O is offset within a memory page of the first byte transferred. */ npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1; - reg = btop(up_softc[um->um_ctlr].sc_info&0x3ffff) + npf; + reg = btop(sc->sc_info&0x3ffff) + npf; o = (int)bp->b_un.b_addr & PGOFSET; printf("%D ", bp->b_blkno+npf); prdev("ECC", bp->b_dev); @@ -515,7 +515,7 @@ upecc(ui) * is the byte offset in the transfer, the variable byte * is the offset from a page boundary in main memory. */ - ubp->uba_dpr[(up_softc[um->um_ctlr].sc_info>>28)&0x0f] |= UBA_BNE; + ubp->uba_dpr[(sc->sc_info>>28)&0x0f] |= UBA_BNE; i = up->upec1 - 1; /* -1 makes 0 origin */ bit = i&07; i = (i&~07)>>3; @@ -572,25 +572,24 @@ upreset(uban) register struct uba_minfo *um; register struct uba_dinfo *ui; register sc21, unit; + struct up_softc *sc; int any = 0; for (sc21 = 0; sc21 < NSC21; sc21++) { - if ((um = upminfo[sc21]) == 0) - continue; - if (um->um_ubanum != uban) - continue; - if (!um->um_alive) + if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban || + um->um_alive == 0) continue; + sc = &up_softc[um->um_ctlr]; if (any == 0) { printf(" up"); - DELAY(15000000); /* give it time to self-test */ + DELAY(10000000); /* give it time to self-test */ any++; } um->um_tab.b_active = 0; um->um_tab.b_actf = um->um_tab.b_actl = 0; - if (up_softc[um->um_ctlr].sc_info) { - printf("<%d>", (up_softc[um->um_ctlr].sc_info>>28)&0xf); - ubarelse(um->um_ubanum, &up_softc[um->um_ctlr].sc_info); + if (sc->sc_info) { + printf("<%d>", (sc->sc_info>>28)&0xf); + ubarelse(um->um_ubanum, &sc->sc_info); } ((struct device *)(um->um_addr))->upcs2 = CLR; for (unit = 0; unit < NUP; unit++) { @@ -615,23 +614,28 @@ upwatch() { register struct uba_minfo *um; register sc21, unit; + register struct up_softc *sc; timeout(upwatch, (caddr_t)0, HZ); for (sc21 = 0; sc21 < NSC21; sc21++) { um = upminfo[sc21]; + if (um == 0 || um->um_alive == 0) + continue; + sc = &up_softc[sc21]; if (um->um_tab.b_active == 0) { for (unit = 0; unit < NUP; unit++) if (updinfo[unit]->ui_mi == um && uputab[unit].b_active) goto active; - up_softc[sc21].sc_wticks = 0; + sc->sc_wticks = 0; continue; } active: - up_softc[sc21].sc_wticks++; - if (up_softc[sc21].sc_wticks >= 20) { - up_softc[sc21].sc_wticks = 0; + sc->sc_wticks++; + if (sc->sc_wticks >= 20) { + sc->sc_wticks = 0; printf("LOST INTERRUPT RESET"); + /* SHOULD JUST RESET ONE CTLR, NOT ALL ON UBA */ upreset(um->um_ubanum); printf("\n"); } @@ -657,8 +661,7 @@ updump(dev) printf("bad unit\n"); return (-1); } -#define phys1(cast, addr) ((cast)((int)addr & 0x7fffffff)) -#define phys(cast, addr) phys1(cast, phys1(cast *, &addr)) +#define phys(cast, addr) ((cast)((int)addr & 0x7fffffff)) ui = phys(struct uba_dinfo *, updinfo[unit]); if (ui->ui_alive == 0) { printf("dna\n"); @@ -666,12 +669,8 @@ updump(dev) } uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba; #if VAX780 - if (cpu == VAX_780) { - uba->uba_cr = UBA_ADINIT; - uba->uba_cr = UBA_IFS|UBA_BRIE|UBA_USEFIE|UBA_SUEFIE; - while ((uba->uba_cnfgr & UBA_UBIC) == 0) - ; - } + if (cpu == VAX_780) + ubainit(uba); #endif DELAY(1000000); upaddr = (struct device *)ui->ui_physaddr; @@ -689,7 +688,7 @@ updump(dev) printf("up !DPR || !MOL\n"); return (-1); } - st = phys1(struct upst *, &upst[ui->ui_type]); + st = &upst[ui->ui_type]; nsect = st->nsect; ntrak = st->ntrak; sizes = phys(struct size *, st->sizes); diff --git a/usr/src/sys/vax/vax/autoconf.c b/usr/src/sys/vax/vax/autoconf.c index 3c1ac2b44b..a16eed2c14 100644 --- a/usr/src/sys/vax/vax/autoconf.c +++ b/usr/src/sys/vax/vax/autoconf.c @@ -1,4 +1,4 @@ -/* autoconf.c 4.5 81/02/16 */ +/* autoconf.c 4.6 81/02/17 */ /* * Configure the system for the current machine. @@ -347,7 +347,6 @@ fixctlrmask() *phys(ud->ud_cntrlr, short *) &= ~0xc00; for (ui = ubdinit; ud = phys(ui->ui_driver, struct uba_driver *); ui++) *phys(ud->ud_cntrlr, short *) &= ~0xc00; - asm("halt"); } /* -- 2.20.1