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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ccu_pulse_shift.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
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32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `timescale 1 ns / 1 ns | |
36 | ||
37 | module ccu_pulse_shift ( | |
38 | rst_n, | |
39 | clk, | |
40 | shift, | |
41 | pulse_in, | |
42 | pulse_out | |
43 | ); | |
44 | ||
45 | input rst_n; | |
46 | input clk; | |
47 | input [4:0] shift; | |
48 | input pulse_in; | |
49 | output pulse_out; | |
50 | ||
51 | wire rst_n; | |
52 | wire clk; | |
53 | wire [4:0] shift; | |
54 | wire pulse_in; | |
55 | wire pulse_out; | |
56 | ||
57 | reg [4:0] cnt; // shift counter | |
58 | reg pulse_event; // sticky bit set hi once pulse is seen | |
59 | ||
60 | assign pulse_out = ((cnt[4:0] == shift[4:0]) && pulse_event)?1'b1:1'b0; | |
61 | ||
62 | always @ (posedge clk) begin | |
63 | if (!rst_n) begin | |
64 | cnt <= 5'h00; | |
65 | pulse_event <= 1'b0; | |
66 | end else | |
67 | if (pulse_in) begin | |
68 | pulse_event <= 1'b1; | |
69 | cnt <= 5'h00; | |
70 | end else begin | |
71 | pulse_event <= pulse_event; | |
72 | cnt <= cnt + 1'b1; | |
73 | end | |
74 | end | |
75 | ||
76 | ||
77 | endmodule | |
78 |