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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: cpx_dpsb.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `ifndef FPGA | |
36 | module cpx_dpsb ( | |
37 | cpx_spc_data_x_, | |
38 | arb_grant_l_a, | |
39 | arb_q0_holdbar_l_a, | |
40 | arb_qsel0_l_a, | |
41 | arb_qsel1_l_a, | |
42 | arb_shift_l_a, | |
43 | arb_grant_r_a, | |
44 | arb_q0_holdbar_r_a, | |
45 | arb_qsel0_r_a, | |
46 | arb_qsel1_r_a, | |
47 | arb_shift_r_a, | |
48 | io_cpx_data_a, | |
49 | scache0_cpx_data_a, | |
50 | scache1_cpx_data_a, | |
51 | scache2_cpx_data_a, | |
52 | scache3_cpx_data_a, | |
53 | scache4_cpx_data_a, | |
54 | scache5_cpx_data_a, | |
55 | scache6_cpx_data_a, | |
56 | scache7_cpx_data_a, | |
57 | tcu_scan_en, | |
58 | l2clk, | |
59 | scan_in, | |
60 | tcu_pce_ov, | |
61 | ccx_aclk, | |
62 | ccx_bclk, | |
63 | scan_out); | |
64 | wire [4:0] mac0_rep_in; | |
65 | wire [3:0] arb_grant_l_a_rep; | |
66 | wire [3:0] arb_qsel0_l_a_rep; | |
67 | wire [3:0] arb_qsel1_l_a_rep; | |
68 | wire [3:0] arb_shift_l_a_rep; | |
69 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
70 | wire [4:0] mac0_rep_out; | |
71 | wire [4:0] mac1_rep_in; | |
72 | wire [4:0] mac1_rep_out; | |
73 | wire [4:0] mac2_rep_in; | |
74 | wire [4:0] mac2_rep_out; | |
75 | wire [4:0] mac3_rep_in; | |
76 | wire [4:0] mac3_rep_out; | |
77 | wire [4:0] mac4_rep_in; | |
78 | wire [7:5] arb_grant_r_a_rep; | |
79 | wire [7:5] arb_q0_holdbar_r_a_rep; | |
80 | wire [7:5] arb_qsel0_r_a_rep; | |
81 | wire [7:5] arb_qsel1_r_a_rep; | |
82 | wire [7:5] arb_shift_r_a_rep; | |
83 | wire [4:0] mac4_rep_out; | |
84 | wire [4:0] mac5_rep_in; | |
85 | wire [4:0] mac5_rep_out; | |
86 | wire [4:0] mac6_rep_in; | |
87 | wire [4:0] mac6_rep_out; | |
88 | wire scan_rep_in; | |
89 | wire [149:0] col8_data_x_; | |
90 | wire tcu_scan_en_out_8_unused; | |
91 | wire tcu_pce_ov_out_8_unused; | |
92 | wire ccx_aclk_out_8_unused; | |
93 | wire ccx_bclk_out_8_unused; | |
94 | wire cpx_mac8_scanin; | |
95 | wire cpx_mac8_scanout; | |
96 | wire [6:0] tcu_scan_en_out; | |
97 | wire [6:0] tcu_pce_ov_out; | |
98 | wire [6:0] ccx_aclk_out; | |
99 | wire [6:0] ccx_bclk_out; | |
100 | wire [149:0] col0_data_x_; | |
101 | wire cpx_mac0_scanin; | |
102 | wire cpx_mac0_scanout; | |
103 | wire [149:0] col2_data_x_; | |
104 | wire cpx_mac1_scanin; | |
105 | wire cpx_mac1_scanout; | |
106 | wire [149:0] col3_data_x_; | |
107 | wire cpx_mac2_scanin; | |
108 | wire cpx_mac2_scanout; | |
109 | wire [149:0] col4_data_x_; | |
110 | wire cpx_mac3_scanin; | |
111 | wire cpx_mac3_scanout; | |
112 | wire [149:0] col5_data_x_; | |
113 | wire cpx_mac4_scanin; | |
114 | wire cpx_mac4_scanout; | |
115 | wire [149:0] col6_data_x_; | |
116 | wire cpx_mac5_scanin; | |
117 | wire cpx_mac5_scanout; | |
118 | wire [149:0] col7_data_x_; | |
119 | wire cpx_mac6_scanin; | |
120 | wire cpx_mac6_scanout; | |
121 | wire tcu_scan_en_out_7_unused; | |
122 | wire tcu_pce_ov_out_7_unused; | |
123 | wire ccx_aclk_out_7_unused; | |
124 | wire ccx_bclk_out_7_unused; | |
125 | wire cpx_mac7_scanin; | |
126 | wire cpx_mac7_scanout; | |
127 | wire [7:4] arb_grant_l_a_unused; | |
128 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
129 | wire [7:4] arb_qsel0_l_a_unused; | |
130 | wire [7:4] arb_qsel1_l_a_unused; | |
131 | wire [7:4] arb_shift_l_a_unused; | |
132 | wire [8:0] arb_grant_r_a_unused; | |
133 | wire [8:0] arb_q0_holdbar_r_a_unused; | |
134 | wire [8:0] arb_qsel0_r_a_unused; | |
135 | wire [8:0] arb_qsel1_r_a_unused; | |
136 | wire [8:0] arb_shift_r_a_unused; | |
137 | wire scan_rep_out; | |
138 | ||
139 | ||
140 | ||
141 | // Beginning of automatic outputs (from unused autoinst outputs) | |
142 | output [149:0] cpx_spc_data_x_; // From mac4 of cpx_mcr_dp.v | |
143 | // End of automatics | |
144 | ||
145 | // Beginning of automatic inputs (from unused autoinst inputs) | |
146 | input [8:0] arb_grant_l_a; // To mac0 of cpx_mar_dp.v, ... | |
147 | input [8:0] arb_q0_holdbar_l_a; // To mac0 of cpx_mar_dp.v, ... | |
148 | input [8:0] arb_qsel0_l_a; // To mac0 of cpx_mar_dp.v, ... | |
149 | input [8:0] arb_qsel1_l_a; // To mac0 of cpx_mar_dp.v, ... | |
150 | input [8:0] arb_shift_l_a; // To mac0 of cpx_mar_dp.v, ... | |
151 | input [8:0] arb_grant_r_a; // To mac0 of cpx_mar_dp.v, ... | |
152 | input [8:0] arb_q0_holdbar_r_a; // To mac0 of cpx_mar_dp.v, ... | |
153 | input [8:0] arb_qsel0_r_a; // To mac0 of cpx_mar_dp.v, ... | |
154 | input [8:0] arb_qsel1_r_a; // To mac0 of cpx_mar_dp.v, ... | |
155 | input [8:0] arb_shift_r_a; // To mac0 of cpx_mar_dp.v, ... | |
156 | input [149:0] io_cpx_data_a; // To mac8 of cpx_mal_dp.v | |
157 | input [149:0] scache0_cpx_data_a; // To mac0 of cpx_mar_dp.v | |
158 | input [149:0] scache1_cpx_data_a; // To mac1 of cpx_mbr_dp.v | |
159 | input [149:0] scache2_cpx_data_a; // To mac2 of cpx_mbr_dp.v | |
160 | input [149:0] scache3_cpx_data_a; // To mac3 of cpx_mbr_dp.v | |
161 | input [149:0] scache4_cpx_data_a; // To mac4 of cpx_mcr_dp.v | |
162 | input [149:0] scache5_cpx_data_a; // To mac5 of cpx_mbl_dp.v | |
163 | input [149:0] scache6_cpx_data_a; // To mac6 of cpx_mbl_dp.v | |
164 | input [149:0] scache7_cpx_data_a; // To cpx_mac7 of cpx_mbl_dp.v | |
165 | // End of automatics | |
166 | ||
167 | // globals | |
168 | input tcu_scan_en ; | |
169 | input l2clk; | |
170 | input scan_in; | |
171 | input tcu_pce_ov; // scan signals | |
172 | input ccx_aclk; | |
173 | input ccx_bclk; | |
174 | output scan_out; | |
175 | ||
176 | ||
177 | // io scache2 scache0 scache3 scache1 scache7 scache5 scache6 scache4 | |
178 | // | | | | | | | | | | |
179 | // v v v v v v v v v | |
180 | // mac8-> mac0 -> mac1 <-mac2 <- mac3 <- mac4 <- mac5 <- mac6 <- mac7 | |
181 | // al bl cl br br br br br bl | |
182 | // | | |
183 | // ---buf--------- | |
184 | // | | |
185 | // v | |
186 | // to spccore | |
187 | ||
188 | // mac0 arb inputs go through 1 buffer | |
189 | assign mac0_rep_in[4:0] = {arb_grant_l_a[2],arb_qsel0_l_a[2],arb_qsel1_l_a[2], | |
190 | arb_shift_l_a[2],arb_q0_holdbar_l_a[2]}; | |
191 | ||
192 | assign {arb_grant_l_a_rep[2],arb_qsel0_l_a_rep[2],arb_qsel1_l_a_rep[2], | |
193 | arb_shift_l_a_rep[2],arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0]; | |
194 | ||
195 | // mac1 arb input go through 1 buffer | |
196 | assign mac1_rep_in[4:0] = {arb_grant_l_a[0],arb_q0_holdbar_l_a[0],arb_qsel0_l_a[0], | |
197 | arb_qsel1_l_a[0],arb_shift_l_a[0]}; | |
198 | ||
199 | assign {arb_grant_l_a_rep[0],arb_q0_holdbar_l_a_rep[0],arb_qsel0_l_a_rep[0], | |
200 | arb_qsel1_l_a_rep[0],arb_shift_l_a_rep[0]} = mac1_rep_out[4:0]; | |
201 | ||
202 | // mac2 arb inputs go through 2 buffers | |
203 | assign mac2_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3], | |
204 | arb_qsel1_l_a[3],arb_shift_l_a[3]}; | |
205 | ||
206 | assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3], | |
207 | arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac2_rep_out[4:0]; | |
208 | ||
209 | // mac3 inputs go through 2 buffers | |
210 | assign mac3_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1], | |
211 | arb_qsel1_l_a[1],arb_shift_l_a[1]}; | |
212 | ||
213 | assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1], | |
214 | arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac3_rep_out[4:0]; | |
215 | ||
216 | // mac4 inputs go through 2 buffers | |
217 | assign mac4_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7], | |
218 | arb_qsel1_r_a[7],arb_shift_r_a[7]}; | |
219 | ||
220 | assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7], | |
221 | arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac4_rep_out[4:0]; | |
222 | ||
223 | // mac5 inputs go through 1 buffer | |
224 | assign mac5_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5], | |
225 | arb_qsel1_r_a[5],arb_shift_r_a[5]}; | |
226 | ||
227 | assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5], | |
228 | arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac5_rep_out[4:0]; | |
229 | ||
230 | // mac6 inputs go through 1 buffer | |
231 | assign mac6_rep_in[4:0] = {arb_grant_r_a[6],arb_q0_holdbar_r_a[6],arb_qsel0_r_a[6], | |
232 | arb_qsel1_r_a[6],arb_shift_r_a[6]}; | |
233 | ||
234 | assign {arb_grant_r_a_rep[6],arb_q0_holdbar_r_a_rep[6],arb_qsel0_r_a_rep[6], | |
235 | arb_qsel1_r_a_rep[6],arb_shift_r_a_rep[6]} = mac6_rep_out[4:0]; | |
236 | ||
237 | assign scan_rep_in = scan_in; | |
238 | ||
239 | ||
240 | ||
241 | cpx_rep_dp cpx_rep(.mac0_rep_out(mac0_rep_out[4:0]), | |
242 | .mac1_rep_out(mac1_rep_out[4:0]), | |
243 | .mac2_rep_out(mac2_rep_out[4:0]), | |
244 | .mac3_rep_out(mac3_rep_out[4:0]), | |
245 | .mac4_rep_out(mac4_rep_out[4:0]), | |
246 | .mac5_rep_out(mac5_rep_out[4:0]), | |
247 | .mac6_rep_out(mac6_rep_out[4:0]), | |
248 | .scan_rep_out(scan_rep_out), | |
249 | .mac0_rep_in(mac0_rep_in[4:0]), | |
250 | .mac1_rep_in(mac1_rep_in[4:0]), | |
251 | .mac2_rep_in(mac2_rep_in[4:0]), | |
252 | .mac3_rep_in(mac3_rep_in[4:0]), | |
253 | .mac4_rep_in(mac4_rep_in[4:0]), | |
254 | .mac5_rep_in(mac5_rep_in[4:0]), | |
255 | .mac6_rep_in(mac6_rep_in[4:0]), | |
256 | .scan_rep_in(scan_rep_in) | |
257 | ); | |
258 | ||
259 | /* | |
260 | cpx_mal_dp AUTO_TEMPLATE | |
261 | ( | |
262 | // Outputs | |
263 | .data_out_x_ (col@_data_x_[149:0]), | |
264 | // Inputs | |
265 | .arb_grant_a(arb_grant_l_a[@]), | |
266 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
267 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
268 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
269 | .arb_shift_a(arb_shift_l_a[@]), | |
270 | .src_cpx_data_a(io_cpx_data_a[149:0]), | |
271 | .l2clk (l2clk)); | |
272 | */ | |
273 | ||
274 | // do not use autoinstancing. | |
275 | // connections have been modified to match the cpu floorplan | |
276 | // src_pcx_data_a has to be manually connected. | |
277 | ||
278 | // input from io | |
279 | cpx_mal_dp cpx_mac8 ( | |
280 | // Outputs | |
281 | .data_out_x_ (col8_data_x_[149:0]), // Templated | |
282 | .tcu_scan_en_out (tcu_scan_en_out_8_unused), | |
283 | .tcu_pce_ov_out (tcu_pce_ov_out_8_unused), | |
284 | .ccx_aclk_out (ccx_aclk_out_8_unused), | |
285 | .ccx_bclk_out (ccx_bclk_out_8_unused), | |
286 | // Inputs | |
287 | .arb_grant_a (arb_grant_l_a[8]), // Templated | |
288 | .arb_qsel0_a (arb_qsel0_l_a[8]), // Templated | |
289 | .arb_qsel1_a (arb_qsel1_l_a[8]), // Templated | |
290 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]), // Templated | |
291 | .arb_shift_a (arb_shift_l_a[8]), // Templated | |
292 | .src_cpx_data_a (io_cpx_data_a[149:0]), // Templated | |
293 | .scan_in(cpx_mac8_scanin), | |
294 | .scan_out(cpx_mac8_scanout), | |
295 | .l2clk (l2clk), // Templated | |
296 | .tcu_scan_en (tcu_scan_en_out[0]), | |
297 | .tcu_pce_ov (tcu_pce_ov_out[0]), | |
298 | .ccx_aclk (ccx_aclk_out[0]), | |
299 | .ccx_bclk (ccx_bclk_out[0]) | |
300 | ); | |
301 | ||
302 | ||
303 | /* | |
304 | cpx_mbl_dp AUTO_TEMPLATE | |
305 | ( | |
306 | // Outputs | |
307 | .data_out_x_ (col@_data_x_[149:0]), | |
308 | // Inputs | |
309 | .arb_grant_a(arb_grant_l_a[@]), | |
310 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
311 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
312 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
313 | .arb_shift_a(arb_shift_l_a[@]), | |
314 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), | |
315 | .data_prev_x_(col@"(- @ 1)"_data_x_[149:0]), | |
316 | .l2clk (l2clk)); | |
317 | */ | |
318 | ||
319 | ||
320 | // input from sctag2 | |
321 | cpx_mbl_dp cpx_mac0 ( | |
322 | // Outputs | |
323 | .data_out_x_ (col0_data_x_[149:0]), | |
324 | .tcu_scan_en_out (tcu_scan_en_out[0]), | |
325 | .tcu_pce_ov_out (tcu_pce_ov_out[0]), | |
326 | .ccx_aclk_out (ccx_aclk_out[0]), | |
327 | .ccx_bclk_out (ccx_bclk_out[0]), | |
328 | // Inputs | |
329 | .arb_grant_a (arb_grant_l_a_rep[2]), | |
330 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), | |
331 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), | |
332 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), | |
333 | .arb_shift_a (arb_shift_l_a_rep[2]), | |
334 | .src_cpx_data_a (scache2_cpx_data_a[149:0]), | |
335 | .data_prev_x_ (col8_data_x_[149:0]), | |
336 | .scan_in(cpx_mac0_scanin), | |
337 | .scan_out(cpx_mac0_scanout), | |
338 | .l2clk (l2clk), | |
339 | .tcu_scan_en (tcu_scan_en_out[1]), | |
340 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
341 | .ccx_aclk (ccx_aclk_out[1]), | |
342 | .ccx_bclk (ccx_bclk_out[1]) | |
343 | ); | |
344 | ||
345 | ||
346 | /* | |
347 | cpx_mcl_dp AUTO_TEMPLATE | |
348 | ( | |
349 | // Outputs | |
350 | .data_out_x_ (cpx_spc_data_x_[149:0]), | |
351 | // Inputs | |
352 | .arb_grant_a(arb_grant_l_a[@]), | |
353 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
354 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
355 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
356 | .arb_shift_a(arb_shift_l_a[@]), | |
357 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), | |
358 | .data_crit_x_(col@"(+ @ 1)"_data_x_[149:0]), | |
359 | .data_ncrit_x_(col@"(- @ 1)"_data_x_[149:0]), | |
360 | .l2clk (l2clk)); | |
361 | */ | |
362 | ||
363 | // input from sctag0 | |
364 | cpx_mcl_dp cpx_mac1 ( | |
365 | // Outputs | |
366 | .data_out_x_ (cpx_spc_data_x_[149:0]), // Templated | |
367 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
368 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
369 | .ccx_aclk_out (ccx_aclk_out[1]), | |
370 | .ccx_bclk_out (ccx_bclk_out[1]), | |
371 | // Inputs | |
372 | .arb_grant_a (arb_grant_l_a_rep[0]), // Templated | |
373 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated | |
374 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated | |
375 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated | |
376 | .arb_shift_a (arb_shift_l_a_rep[0]), // Templated | |
377 | .src_cpx_data_a (scache0_cpx_data_a[149:0]), // Templated | |
378 | .data_crit_x_ (col2_data_x_[149:0]), // Templated | |
379 | .data_ncrit_x_ (col0_data_x_[149:0]), // Templated | |
380 | .scan_in(cpx_mac1_scanin), | |
381 | .scan_out(cpx_mac1_scanout), | |
382 | .l2clk (l2clk), // Templated | |
383 | .tcu_scan_en (tcu_scan_en_out[2]), | |
384 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
385 | .ccx_aclk (ccx_aclk_out[2]), | |
386 | .ccx_bclk (ccx_bclk_out[2]) | |
387 | ); | |
388 | ||
389 | ||
390 | /* | |
391 | cpx_mbr_dp AUTO_TEMPLATE | |
392 | ( | |
393 | // Outputs | |
394 | .data_out_x_ (col@_data_x_[149:0]), | |
395 | // Inputs | |
396 | .arb_grant_a(arb_grant_l_a[@]), | |
397 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
398 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
399 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
400 | .arb_shift_a(arb_shift_l_a[@]), | |
401 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), | |
402 | .data_prev_x_(col@"(+ @ 1)"_data_x_[149:0]), | |
403 | .l2clk (l2clk)); | |
404 | */ | |
405 | ||
406 | ||
407 | // input from sctag3 | |
408 | cpx_mbr_dp cpx_mac2 ( | |
409 | // Outputs | |
410 | .data_out_x_ (col2_data_x_[149:0]), // Templated | |
411 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
412 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
413 | .ccx_aclk_out (ccx_aclk_out[2]), | |
414 | .ccx_bclk_out (ccx_bclk_out[2]), | |
415 | // Inputs | |
416 | .arb_grant_a (arb_grant_l_a_rep[3]), // Templated | |
417 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated | |
418 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated | |
419 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated | |
420 | .arb_shift_a (arb_shift_l_a_rep[3]), // Templated | |
421 | .src_cpx_data_a (scache3_cpx_data_a[149:0]), // Templated | |
422 | .data_prev_x_ (col3_data_x_[149:0]), // Templated | |
423 | .scan_in(cpx_mac2_scanin), | |
424 | .scan_out(cpx_mac2_scanout), | |
425 | .l2clk (l2clk), // Templated | |
426 | .tcu_scan_en (tcu_scan_en_out[3]), | |
427 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
428 | .ccx_aclk (ccx_aclk_out[3]), | |
429 | .ccx_bclk (ccx_bclk_out[3]) | |
430 | ); | |
431 | ||
432 | ||
433 | // input from sctag1 | |
434 | cpx_mbr_dp cpx_mac3 ( | |
435 | // Outputs | |
436 | .data_out_x_ (col3_data_x_[149:0]), // Templated | |
437 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
438 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
439 | .ccx_aclk_out (ccx_aclk_out[3]), | |
440 | .ccx_bclk_out (ccx_bclk_out[3]), | |
441 | // Inputs | |
442 | .arb_grant_a (arb_grant_l_a_rep[1]), // Templated | |
443 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated | |
444 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated | |
445 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated | |
446 | .arb_shift_a (arb_shift_l_a_rep[1]), // Templated | |
447 | .src_cpx_data_a (scache1_cpx_data_a[149:0]), // Templated | |
448 | .data_prev_x_ (col4_data_x_[149:0]), // Templated | |
449 | .scan_in(cpx_mac3_scanin), | |
450 | .scan_out(cpx_mac3_scanout), | |
451 | .l2clk (l2clk), // Templated | |
452 | .tcu_scan_en (tcu_scan_en), | |
453 | .tcu_pce_ov (tcu_pce_ov), | |
454 | .ccx_aclk (ccx_aclk), | |
455 | .ccx_bclk (ccx_bclk) | |
456 | ); | |
457 | ||
458 | ||
459 | // input from sctag7 | |
460 | cpx_mbr_dp cpx_mac4 ( | |
461 | // Outputs | |
462 | .data_out_x_ (col4_data_x_[149:0]), // Templated | |
463 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
464 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
465 | .ccx_aclk_out (ccx_aclk_out[4]), | |
466 | .ccx_bclk_out (ccx_bclk_out[4]), | |
467 | // Inputs | |
468 | .arb_grant_a (arb_grant_r_a_rep[7]), // Templated | |
469 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated | |
470 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated | |
471 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated | |
472 | .arb_shift_a (arb_shift_r_a_rep[7]), // Templated | |
473 | .src_cpx_data_a (scache7_cpx_data_a[149:0]), // Templated | |
474 | .data_prev_x_ (col5_data_x_[149:0]), // Templated | |
475 | .scan_in(cpx_mac4_scanin), | |
476 | .scan_out(cpx_mac4_scanout), | |
477 | .l2clk (l2clk), // Templated | |
478 | .tcu_scan_en (tcu_scan_en_out[3]), | |
479 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
480 | .ccx_aclk (ccx_aclk_out[3]), | |
481 | .ccx_bclk (ccx_bclk_out[3]) | |
482 | ); | |
483 | ||
484 | ||
485 | // input from sctag5 | |
486 | cpx_mbr_dp cpx_mac5 ( | |
487 | // Outputs | |
488 | .data_out_x_ (col5_data_x_[149:0]), // Templated | |
489 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
490 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
491 | .ccx_aclk_out (ccx_aclk_out[5]), | |
492 | .ccx_bclk_out (ccx_bclk_out[5]), | |
493 | // Inputs | |
494 | .arb_grant_a (arb_grant_r_a_rep[5]), // Templated | |
495 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated | |
496 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated | |
497 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated | |
498 | .arb_shift_a (arb_shift_r_a_rep[5]), // Templated | |
499 | .src_cpx_data_a (scache5_cpx_data_a[149:0]), // Templated | |
500 | .data_prev_x_ (col6_data_x_[149:0]), // Templated | |
501 | .scan_in(cpx_mac5_scanin), | |
502 | .scan_out(cpx_mac5_scanout), | |
503 | .l2clk (l2clk), // Templated | |
504 | .tcu_scan_en (tcu_scan_en_out[4]), | |
505 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
506 | .ccx_aclk (ccx_aclk_out[4]), | |
507 | .ccx_bclk (ccx_bclk_out[4]) | |
508 | ); | |
509 | ||
510 | // input from sctag6 | |
511 | cpx_mbr_dp cpx_mac6 ( | |
512 | // Outputs | |
513 | .data_out_x_ (col6_data_x_[149:0]), // Templated | |
514 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
515 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
516 | .ccx_aclk_out (ccx_aclk_out[6]), | |
517 | .ccx_bclk_out (ccx_bclk_out[6]), | |
518 | // Inputs | |
519 | .arb_grant_a (arb_grant_r_a_rep[6]), // Templated | |
520 | .arb_qsel0_a (arb_qsel0_r_a_rep[6]), // Templated | |
521 | .arb_qsel1_a (arb_qsel1_r_a_rep[6]), // Templated | |
522 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]), // Templated | |
523 | .arb_shift_a (arb_shift_r_a_rep[6]), // Templated | |
524 | .src_cpx_data_a (scache6_cpx_data_a[149:0]), // Templated | |
525 | .data_prev_x_ (col7_data_x_[149:0]), // Templated | |
526 | .scan_in(cpx_mac6_scanin), | |
527 | .scan_out(cpx_mac6_scanout), | |
528 | .l2clk (l2clk), // Templated | |
529 | .tcu_scan_en (tcu_scan_en_out[5]), | |
530 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
531 | .ccx_aclk (ccx_aclk_out[5]), | |
532 | .ccx_bclk (ccx_bclk_out[5]) | |
533 | ); | |
534 | ||
535 | /* | |
536 | cpx_mar_dp AUTO_TEMPLATE | |
537 | ( | |
538 | // Outputs | |
539 | .data_out_x_ (col@_data_x_[149:0]), | |
540 | // Inputs | |
541 | .arb_grant_a(arb_grant_r_a[@]), | |
542 | .arb_qsel0_a(arb_qsel0_r_a[@]), | |
543 | .arb_qsel1_a(arb_qsel1_r_a[@]), | |
544 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), | |
545 | .arb_shift_a(arb_shift_r_a[@]), | |
546 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), | |
547 | .l2clk (l2clk)); | |
548 | */ | |
549 | ||
550 | // input from sctag4 | |
551 | cpx_mar_dp cpx_mac7 ( | |
552 | // Outputs | |
553 | .data_out_x_ (col7_data_x_[149:0]), // Templated | |
554 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
555 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
556 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
557 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
558 | // Inputs | |
559 | .arb_grant_a (arb_grant_r_a[4]), // Templated | |
560 | .arb_qsel0_a (arb_qsel0_r_a[4]), // Templated | |
561 | .arb_qsel1_a (arb_qsel1_r_a[4]), // Templated | |
562 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]), // Templated | |
563 | .arb_shift_a (arb_shift_r_a[4]), // Templated | |
564 | .src_cpx_data_a (scache4_cpx_data_a[149:0]), // Templated | |
565 | .scan_in(cpx_mac7_scanin), | |
566 | .scan_out(cpx_mac7_scanout), | |
567 | .l2clk (l2clk), // Templated | |
568 | .tcu_scan_en (tcu_scan_en_out[6]), | |
569 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
570 | .ccx_aclk (ccx_aclk_out[6]), | |
571 | .ccx_bclk (ccx_bclk_out[6]) | |
572 | ); | |
573 | ||
574 | ||
575 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
576 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
577 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
578 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
579 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
580 | ||
581 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
582 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
583 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
584 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
585 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
586 | ||
587 | assign arb_grant_r_a_unused[8] = arb_grant_r_a[8]; | |
588 | assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8]; | |
589 | assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8]; | |
590 | assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8]; | |
591 | assign arb_shift_r_a_unused[8] = arb_shift_r_a[8]; | |
592 | ||
593 | ||
594 | // fixscan start: | |
595 | assign cpx_mac8_scanin = scan_rep_out ; | |
596 | assign cpx_mac0_scanin = cpx_mac8_scanout ; | |
597 | assign cpx_mac1_scanin = cpx_mac0_scanout ; | |
598 | assign cpx_mac2_scanin = cpx_mac1_scanout ; | |
599 | assign cpx_mac3_scanin = cpx_mac2_scanout ; | |
600 | assign cpx_mac4_scanin = cpx_mac3_scanout ; | |
601 | assign cpx_mac5_scanin = cpx_mac4_scanout ; | |
602 | assign cpx_mac6_scanin = cpx_mac5_scanout ; | |
603 | assign cpx_mac7_scanin = cpx_mac6_scanout ; | |
604 | assign scan_out = cpx_mac7_scanout ; | |
605 | // fixscan end: | |
606 | endmodule | |
607 | ||
608 | // Local Variables: | |
609 | // verilog-library-directories:("." "v") | |
610 | // End: | |
611 | ||
612 | ||
613 | ||
614 | // | |
615 | // buff macro | |
616 | // | |
617 | // | |
618 | ||
619 | ||
620 | ||
621 | ||
622 | ||
623 | module cpx_dpsb_buff_macro__dbuff_32x__stack_6l__width_5 ( | |
624 | din, | |
625 | dout); | |
626 | input [4:0] din; | |
627 | output [4:0] dout; | |
628 | ||
629 | ||
630 | ||
631 | ||
632 | ||
633 | ||
634 | buff #(5) d0_0 ( | |
635 | .in(din[4:0]), | |
636 | .out(dout[4:0]) | |
637 | ); | |
638 | ||
639 | ||
640 | ||
641 | ||
642 | ||
643 | ||
644 | ||
645 | ||
646 | endmodule | |
647 | ||
648 | ||
649 | ||
650 | ||
651 | ||
652 | // | |
653 | // buff macro | |
654 | // | |
655 | // | |
656 | ||
657 | ||
658 | ||
659 | ||
660 | ||
661 | module cpx_dpsb_buff_macro__dbuff_32x__stack_none__width_1 ( | |
662 | din, | |
663 | dout); | |
664 | input [0:0] din; | |
665 | output [0:0] dout; | |
666 | ||
667 | ||
668 | ||
669 | ||
670 | ||
671 | ||
672 | buff #(1) d0_0 ( | |
673 | .in(din[0:0]), | |
674 | .out(dout[0:0]) | |
675 | ); | |
676 | ||
677 | ||
678 | ||
679 | ||
680 | ||
681 | ||
682 | ||
683 | ||
684 | endmodule | |
685 | ||
686 | ||
687 | ||
688 | ||
689 | // | |
690 | // buff macro | |
691 | // | |
692 | // | |
693 | ||
694 | ||
695 | ||
696 | ||
697 | ||
698 | module cpx_dpsb_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 ( | |
699 | din, | |
700 | dout); | |
701 | input [3:0] din; | |
702 | output [3:0] dout; | |
703 | ||
704 | ||
705 | ||
706 | ||
707 | ||
708 | ||
709 | buff #(4) d0_0 ( | |
710 | .in(din[3:0]), | |
711 | .out(dout[3:0]) | |
712 | ); | |
713 | ||
714 | ||
715 | ||
716 | ||
717 | ||
718 | ||
719 | ||
720 | ||
721 | endmodule | |
722 | ||
723 | ||
724 | ||
725 | ||
726 | ||
727 | ||
728 | ||
729 | ||
730 | ||
731 | // any PARAMS parms go into naming of macro | |
732 | ||
733 | module cpx_dpsb_ccx_l1clkhdr_ctl_macro__dl1hdr_24x ( | |
734 | l2clk, | |
735 | l1en, | |
736 | pce_ov, | |
737 | stop, | |
738 | se, | |
739 | l1clk); | |
740 | ||
741 | ||
742 | input l2clk; | |
743 | input l1en; | |
744 | input pce_ov; | |
745 | input stop; | |
746 | input se; | |
747 | output l1clk; | |
748 | ||
749 | ||
750 | ||
751 | ||
752 | ||
753 | cl_sc1_l1hdr_24x c_0 ( | |
754 | ||
755 | ||
756 | .l2clk(l2clk), | |
757 | .pce(l1en), | |
758 | .l1clk(l1clk), | |
759 | .se(se), | |
760 | .pce_ov(pce_ov), | |
761 | .stop(stop) | |
762 | ); | |
763 | ||
764 | ||
765 | ||
766 | ||
767 | ||
768 | ||
769 | endmodule | |
770 | ||
771 | ||
772 | ||
773 | ||
774 | ||
775 | ||
776 | ||
777 | ||
778 | ||
779 | // | |
780 | // ccx macro | |
781 | // | |
782 | // | |
783 | ||
784 | ||
785 | ||
786 | ||
787 | ||
788 | module cpx_dpsb_ccx_new_macro__type_a ( | |
789 | l2clk, | |
790 | l1clk, | |
791 | pce0, | |
792 | pce1, | |
793 | pce_ov, | |
794 | se, | |
795 | stop, | |
796 | siclk_in, | |
797 | soclk_in, | |
798 | scan_in, | |
799 | grant_a, | |
800 | qsel0, | |
801 | shift, | |
802 | data_a, | |
803 | data_x_l, | |
804 | scan_out); | |
805 | wire so5; | |
806 | wire siclk_out; | |
807 | wire soclk_out; | |
808 | wire l1clk0; | |
809 | wire l1clk1; | |
810 | wire grant_x; | |
811 | wire qsel0_buf; | |
812 | wire shift_buf; | |
813 | ||
814 | input l2clk; | |
815 | input l1clk; | |
816 | input pce0; | |
817 | input pce1; | |
818 | input pce_ov; | |
819 | input se; | |
820 | input stop; | |
821 | input siclk_in; | |
822 | input soclk_in; | |
823 | input scan_in; | |
824 | input grant_a; | |
825 | input qsel0; | |
826 | input shift; | |
827 | input [9:0] data_a; | |
828 | output [9:0] data_x_l; | |
829 | output scan_out; | |
830 | cl_dp1_ccxhdr c0 ( | |
831 | .si(scan_in), | |
832 | .so(so5), | |
833 | .l2clk(l2clk), | |
834 | .pce0(pce0), | |
835 | .pce1(pce1), | |
836 | .pce_ov(pce_ov), | |
837 | .stop(stop), | |
838 | .siclk_in(siclk_in), | |
839 | .soclk_in(soclk_in), | |
840 | .siclk_out(siclk_out), | |
841 | .soclk_out(soclk_out), | |
842 | .l1clk0(l1clk0), | |
843 | .l1clk1(l1clk1), | |
844 | .se(se), | |
845 | .l1clk(l1clk), | |
846 | .grant_a(grant_a), | |
847 | .grant_x(grant_x), | |
848 | .qsel0(qsel0), | |
849 | .qsel0_buf(qsel0_buf), | |
850 | .shift(shift), | |
851 | .shift_buf(shift_buf) | |
852 | ); | |
853 | ||
854 | ||
855 | ||
856 | ||
857 | ||
858 | ||
859 | ccx_mac_a #(10) mac_a( | |
860 | .siclk(siclk_out), | |
861 | .soclk(soclk_out), | |
862 | .data_a(data_a[9:0]), | |
863 | .data_x_l(data_x_l[9:0]), | |
864 | .si(so5), | |
865 | .so(scan_out), | |
866 | .l1clk0(l1clk0), | |
867 | .l1clk1(l1clk1), | |
868 | .grant_x(grant_x), | |
869 | .qsel0_buf(qsel0_buf), | |
870 | .shift_buf(shift_buf) | |
871 | ); | |
872 | ||
873 | ||
874 | ||
875 | ||
876 | ||
877 | ||
878 | ||
879 | ||
880 | ||
881 | ||
882 | ||
883 | ||
884 | ||
885 | ||
886 | endmodule | |
887 | ||
888 | ||
889 | ||
890 | // | |
891 | // ccx macro | |
892 | // | |
893 | // | |
894 | ||
895 | ||
896 | ||
897 | ||
898 | ||
899 | module cpx_dpsb_ccx_new_macro__type_b_l ( | |
900 | l2clk, | |
901 | l1clk, | |
902 | pce0, | |
903 | pce1, | |
904 | pce_ov, | |
905 | se, | |
906 | stop, | |
907 | siclk_in, | |
908 | soclk_in, | |
909 | scan_in, | |
910 | grant_a, | |
911 | qsel0, | |
912 | shift, | |
913 | data_a, | |
914 | data_prev_x_l, | |
915 | data_x_l, | |
916 | scan_out); | |
917 | wire so5; | |
918 | wire siclk_out; | |
919 | wire soclk_out; | |
920 | wire l1clk0; | |
921 | wire l1clk1; | |
922 | wire grant_x; | |
923 | wire qsel0_buf; | |
924 | wire shift_buf; | |
925 | ||
926 | input l2clk; | |
927 | input l1clk; | |
928 | input pce0; | |
929 | input pce1; | |
930 | input pce_ov; | |
931 | input se; | |
932 | input stop; | |
933 | input siclk_in; | |
934 | input soclk_in; | |
935 | input scan_in; | |
936 | input grant_a; | |
937 | input qsel0; | |
938 | input shift; | |
939 | input [9:0] data_a; | |
940 | input [9:0] data_prev_x_l; | |
941 | output [9:0] data_x_l; | |
942 | output scan_out; | |
943 | cl_dp1_ccxhdr c0 ( | |
944 | .si(scan_in), | |
945 | .so(so5), | |
946 | .l2clk(l2clk), | |
947 | .pce0(pce0), | |
948 | .pce1(pce1), | |
949 | .pce_ov(pce_ov), | |
950 | .stop(stop), | |
951 | .siclk_in(siclk_in), | |
952 | .soclk_in(soclk_in), | |
953 | .siclk_out(siclk_out), | |
954 | .soclk_out(soclk_out), | |
955 | .l1clk0(l1clk0), | |
956 | .l1clk1(l1clk1), | |
957 | .se(se), | |
958 | .l1clk(l1clk), | |
959 | .grant_a(grant_a), | |
960 | .grant_x(grant_x), | |
961 | .qsel0(qsel0), | |
962 | .qsel0_buf(qsel0_buf), | |
963 | .shift(shift), | |
964 | .shift_buf(shift_buf) | |
965 | ); | |
966 | ||
967 | ||
968 | ||
969 | ||
970 | ||
971 | ||
972 | ccx_mac_b #(10) mac_b( | |
973 | .siclk(siclk_out), | |
974 | .soclk(soclk_out), | |
975 | .data_a(data_a[9:0]), | |
976 | .data_prev_x_l(data_prev_x_l[9:0]), | |
977 | .data_x_l(data_x_l[9:0]), | |
978 | .si(so5), | |
979 | .so(scan_out), | |
980 | .l1clk0(l1clk0), | |
981 | .l1clk1(l1clk1), | |
982 | .grant_x(grant_x), | |
983 | .qsel0_buf(qsel0_buf), | |
984 | .shift_buf(shift_buf) | |
985 | ); | |
986 | ||
987 | ||
988 | ||
989 | ||
990 | ||
991 | ||
992 | ||
993 | ||
994 | ||
995 | ||
996 | ||
997 | ||
998 | ||
999 | ||
1000 | endmodule | |
1001 | ||
1002 | ||
1003 | // | |
1004 | // ccx macro | |
1005 | // | |
1006 | // | |
1007 | ||
1008 | ||
1009 | ||
1010 | ||
1011 | ||
1012 | module cpx_dpsb_ccx_new_macro__type_c_l ( | |
1013 | l2clk, | |
1014 | l1clk, | |
1015 | pce0, | |
1016 | pce1, | |
1017 | pce_ov, | |
1018 | se, | |
1019 | stop, | |
1020 | siclk_in, | |
1021 | soclk_in, | |
1022 | scan_in, | |
1023 | grant_a, | |
1024 | qsel0, | |
1025 | shift, | |
1026 | data_a, | |
1027 | data_crit_x_l, | |
1028 | data_ncrit_x_l, | |
1029 | data_x_l, | |
1030 | scan_out); | |
1031 | wire so5; | |
1032 | wire siclk_out; | |
1033 | wire soclk_out; | |
1034 | wire l1clk0; | |
1035 | wire l1clk1; | |
1036 | wire grant_x; | |
1037 | wire qsel0_buf; | |
1038 | wire shift_buf; | |
1039 | ||
1040 | input l2clk; | |
1041 | input l1clk; | |
1042 | input pce0; | |
1043 | input pce1; | |
1044 | input pce_ov; | |
1045 | input se; | |
1046 | input stop; | |
1047 | input siclk_in; | |
1048 | input soclk_in; | |
1049 | input scan_in; | |
1050 | input grant_a; | |
1051 | input qsel0; | |
1052 | input shift; | |
1053 | input [9:0] data_a; | |
1054 | input [9:0] data_crit_x_l; | |
1055 | input [9:0] data_ncrit_x_l; | |
1056 | output [9:0] data_x_l; | |
1057 | output scan_out; | |
1058 | cl_dp1_ccxhdr c0 ( | |
1059 | .si(scan_in), | |
1060 | .so(so5), | |
1061 | .l2clk(l2clk), | |
1062 | .pce0(pce0), | |
1063 | .pce1(pce1), | |
1064 | .pce_ov(pce_ov), | |
1065 | .stop(stop), | |
1066 | .siclk_in(siclk_in), | |
1067 | .soclk_in(soclk_in), | |
1068 | .siclk_out(siclk_out), | |
1069 | .soclk_out(soclk_out), | |
1070 | .l1clk0(l1clk0), | |
1071 | .l1clk1(l1clk1), | |
1072 | .se(se), | |
1073 | .l1clk(l1clk), | |
1074 | .grant_a(grant_a), | |
1075 | .grant_x(grant_x), | |
1076 | .qsel0(qsel0), | |
1077 | .qsel0_buf(qsel0_buf), | |
1078 | .shift(shift), | |
1079 | .shift_buf(shift_buf) | |
1080 | ); | |
1081 | ||
1082 | ||
1083 | ||
1084 | ||
1085 | ||
1086 | ||
1087 | ccx_mac_c #(10) mac_c( | |
1088 | .siclk(siclk_out), | |
1089 | .soclk(soclk_out), | |
1090 | .data_a(data_a[9:0]), | |
1091 | .data_crit_x_l(data_crit_x_l[9:0]), | |
1092 | .data_ncrit_x_l(data_ncrit_x_l[9:0]), | |
1093 | .data_x_l(data_x_l[9:0]), | |
1094 | .si(so5), | |
1095 | .so(scan_out), | |
1096 | .l1clk0(l1clk0), | |
1097 | .l1clk1(l1clk1), | |
1098 | .grant_x(grant_x), | |
1099 | .qsel0_buf(qsel0_buf), | |
1100 | .shift_buf(shift_buf) | |
1101 | ); | |
1102 | ||
1103 | ||
1104 | ||
1105 | ||
1106 | ||
1107 | ||
1108 | ||
1109 | ||
1110 | ||
1111 | ||
1112 | ||
1113 | ||
1114 | ||
1115 | ||
1116 | endmodule | |
1117 | ||
1118 | ||
1119 | ||
1120 | // | |
1121 | // ccx macro | |
1122 | // | |
1123 | // | |
1124 | ||
1125 | ||
1126 | ||
1127 | ||
1128 | ||
1129 | module cpx_dpsb_ccx_new_macro__type_b_r ( | |
1130 | l2clk, | |
1131 | l1clk, | |
1132 | pce0, | |
1133 | pce1, | |
1134 | pce_ov, | |
1135 | se, | |
1136 | stop, | |
1137 | siclk_in, | |
1138 | soclk_in, | |
1139 | scan_in, | |
1140 | grant_a, | |
1141 | qsel0, | |
1142 | shift, | |
1143 | data_a, | |
1144 | data_prev_x_l, | |
1145 | data_x_l, | |
1146 | scan_out); | |
1147 | wire so5; | |
1148 | wire siclk_out; | |
1149 | wire soclk_out; | |
1150 | wire l1clk0; | |
1151 | wire l1clk1; | |
1152 | wire grant_x; | |
1153 | wire qsel0_buf; | |
1154 | wire shift_buf; | |
1155 | ||
1156 | input l2clk; | |
1157 | input l1clk; | |
1158 | input pce0; | |
1159 | input pce1; | |
1160 | input pce_ov; | |
1161 | input se; | |
1162 | input stop; | |
1163 | input siclk_in; | |
1164 | input soclk_in; | |
1165 | input scan_in; | |
1166 | input grant_a; | |
1167 | input qsel0; | |
1168 | input shift; | |
1169 | input [9:0] data_a; | |
1170 | input [9:0] data_prev_x_l; | |
1171 | output [9:0] data_x_l; | |
1172 | output scan_out; | |
1173 | cl_dp1_ccxhdr c0 ( | |
1174 | .si(scan_in), | |
1175 | .so(so5), | |
1176 | .l2clk(l2clk), | |
1177 | .pce0(pce0), | |
1178 | .pce1(pce1), | |
1179 | .pce_ov(pce_ov), | |
1180 | .stop(stop), | |
1181 | .siclk_in(siclk_in), | |
1182 | .soclk_in(soclk_in), | |
1183 | .siclk_out(siclk_out), | |
1184 | .soclk_out(soclk_out), | |
1185 | .l1clk0(l1clk0), | |
1186 | .l1clk1(l1clk1), | |
1187 | .se(se), | |
1188 | .l1clk(l1clk), | |
1189 | .grant_a(grant_a), | |
1190 | .grant_x(grant_x), | |
1191 | .qsel0(qsel0), | |
1192 | .qsel0_buf(qsel0_buf), | |
1193 | .shift(shift), | |
1194 | .shift_buf(shift_buf) | |
1195 | ); | |
1196 | ||
1197 | ||
1198 | ||
1199 | ||
1200 | ||
1201 | ||
1202 | ccx_mac_b #(10) mac_b( | |
1203 | .siclk(siclk_out), | |
1204 | .soclk(soclk_out), | |
1205 | .data_a(data_a[9:0]), | |
1206 | .data_prev_x_l(data_prev_x_l[9:0]), | |
1207 | .data_x_l(data_x_l[9:0]), | |
1208 | .si(so5), | |
1209 | .so(scan_out), | |
1210 | .l1clk0(l1clk0), | |
1211 | .l1clk1(l1clk1), | |
1212 | .grant_x(grant_x), | |
1213 | .qsel0_buf(qsel0_buf), | |
1214 | .shift_buf(shift_buf) | |
1215 | ); | |
1216 | ||
1217 | ||
1218 | ||
1219 | ||
1220 | ||
1221 | ||
1222 | ||
1223 | ||
1224 | ||
1225 | ||
1226 | ||
1227 | ||
1228 | ||
1229 | ||
1230 | endmodule | |
1231 | ||
1232 | ||
1233 | //// scan renames | |
1234 | //assign pce_ov = tcu_pce_ov; | |
1235 | //assign stop = tcu_clk_stop; | |
1236 | //assign siclk = tcu_aclk; | |
1237 | //assign soclk = tcu_bclk; | |
1238 | //// end scan | |
1239 | // | |
1240 | //// buffer the grant signal | |
1241 | // | |
1242 | //buff_macro i_buf_grant (width=1, stack=50c) | |
1243 | //( | |
1244 | // .din (arb_grant_a), | |
1245 | // .dout (grant_a), | |
1246 | // ); | |
1247 | // | |
1248 | //msff_macro i_dff_grant_x (width=12, stack=50c) | |
1249 | //( | |
1250 | // .scan_in(i_dff_grant_x_scanin), | |
1251 | // .scan_out(i_dff_grant_x_scanout), | |
1252 | // .clk (l2clk), | |
1253 | // .din ({12{grant_a}}), | |
1254 | // .dout (grant_x[11:0]), | |
1255 | // .en (1'b1), | |
1256 | // ); | |
1257 | // | |
1258 | // | |
1259 | //// DATAPATH SECTION | |
1260 | // | |
1261 | //msff_macro i_dff_q1_2 (width=50, stack=50c) | |
1262 | //( | |
1263 | // .scan_in(i_dff_q1_2_scanin), | |
1264 | // .scan_out(i_dff_q1_2_scanout), | |
1265 | // .clk (l2clk), | |
1266 | // .din (src_cpx_data_a[149:100]), | |
1267 | // .dout (q1_dataout[149:100]), | |
1268 | // .en (arb_qsel1_a), | |
1269 | // ); | |
1270 | // | |
1271 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
1272 | //( | |
1273 | // .scan_in(i_dff_q1_1_scanin), | |
1274 | // .scan_out(i_dff_q1_1_scanout), | |
1275 | // .clk (l2clk), | |
1276 | // .din (src_cpx_data_a[99:50]), | |
1277 | // .dout (q1_dataout[99:50]), | |
1278 | // .en (arb_qsel1_a), | |
1279 | // ); | |
1280 | // | |
1281 | //msff_macro i_dff_q1_0 (width=50, stack=50c) | |
1282 | //( | |
1283 | // .scan_in(i_dff_q1_0_scanin), | |
1284 | // .scan_out(i_dff_q1_0_scanout), | |
1285 | // .clk (l2clk), | |
1286 | // .din (src_cpx_data_a[49:0]), | |
1287 | // .dout (q1_dataout[49:0]), | |
1288 | // .en (arb_qsel1_a), | |
1289 | // ); | |
1290 | // | |
1291 | ////assign q0_datain_ca[149:0] = | |
1292 | //// (arb_cpxdp_qsel0_ca ? src_cpx_data_ca[149:0] : 150'd0) | | |
1293 | //// (arb_cpxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
1294 | // | |
1295 | // | |
1296 | //mux_macro i_mux_q0_2 (width=50, mux=aonpe, ports=2, stack=50c) | |
1297 | //( | |
1298 | // .din0 (src_cpx_data_a[149:100]), | |
1299 | // .din1 (q1_dataout[149:100]), | |
1300 | // .sel0 (arb_qsel0_a), | |
1301 | // .sel1 (arb_shift_a), | |
1302 | // .dout (q0_datain_a[149:100]), | |
1303 | // ); | |
1304 | // | |
1305 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
1306 | //( | |
1307 | // .din0 (src_cpx_data_a[99:50]), | |
1308 | // .din1 (q1_dataout[99:50]), | |
1309 | // .sel0 (arb_qsel0_a), | |
1310 | // .sel1 (arb_shift_a), | |
1311 | // .dout (q0_datain_a[99:50]), | |
1312 | // ); | |
1313 | // | |
1314 | //mux_macro i_mux_q0_0 (width=50, mux=aonpe, ports=2, stack=50c) | |
1315 | //( | |
1316 | // .din0 (src_cpx_data_a[49:0]), | |
1317 | // .din1 (q1_dataout[49:0]), | |
1318 | // .sel0 (arb_qsel0_a), | |
1319 | // .sel1 (arb_shift_a), | |
1320 | // .dout (q0_datain_a[49:0]), | |
1321 | // ); | |
1322 | // | |
1323 | //msff_macro i_dff_q0_2 (width=50, stack=50c) | |
1324 | //( | |
1325 | // .scan_in(i_dff_q0_2_scanin), | |
1326 | // .scan_out(i_dff_q0_2_scanout), | |
1327 | // .clk (l2clk), | |
1328 | // .din (q0_datain_a[149:100]), | |
1329 | // .dout (q0_dataout[149:100]), | |
1330 | // .en (arb_q0_holdbar_a), | |
1331 | // ); | |
1332 | // | |
1333 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
1334 | //( | |
1335 | // .scan_in(i_dff_q0_1_scanin), | |
1336 | // .scan_out(i_dff_q0_1_scanout), | |
1337 | // .clk (l2clk), | |
1338 | // .din (q0_datain_a[99:50]), | |
1339 | // .dout (q0_dataout[99:50]), | |
1340 | // .en (arb_q0_holdbar_a), | |
1341 | // ); | |
1342 | // | |
1343 | //msff_macro i_dff_q0_0 (width=50, stack=50c) | |
1344 | //( | |
1345 | // .scan_in(i_dff_q0_0_scanin), | |
1346 | // .scan_out(i_dff_q0_0_scanout), | |
1347 | // .clk (l2clk), | |
1348 | // .din (q0_datain_a[49:0]), | |
1349 | // .dout (q0_dataout[49:0]), | |
1350 | // .en (arb_q0_holdbar_a), | |
1351 | // ); | |
1352 | // | |
1353 | //// MUX | |
1354 | //nand_macro i_nand_data_g_2 (width=50, ports=2, stack=50c) | |
1355 | //( | |
1356 | // .din0 (q0_dataout[149:100]), | |
1357 | // .din1 ({{10{grant_x[11]}},{15{grant_x[10]}},{15{grant_x[9]}},{10{grant_x[8]}}}), | |
1358 | // .dout (data_out_x_[149:100]), | |
1359 | // ); | |
1360 | // | |
1361 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
1362 | //( | |
1363 | // .din0 (q0_dataout[99:50]), | |
1364 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
1365 | // .dout (data_out_x_[99:50]), | |
1366 | // ); | |
1367 | // | |
1368 | //nand_macro i_nand_data_g_0 (width=50, ports=2, stack=50c) | |
1369 | //( | |
1370 | // .din0 (q0_dataout[49:0]), | |
1371 | // .din1 ({{10{grant_x[3]}},{15{grant_x[2]}},{15{grant_x[1]}},{10{grant_x[0]}}}), | |
1372 | // .dout (data_out_x_[49:0]), | |
1373 | // ); | |
1374 | // | |
1375 | //// fixscan start: | |
1376 | //assign i_dff_grant_x_scanin = scan_in ; | |
1377 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1378 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1379 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1380 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1381 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1382 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1383 | //assign scan_out = i_dff_q0_0_scanout ; | |
1384 | //// fixscan end: | |
1385 | ||
1386 | `endif // `ifndef FPGA | |
1387 | ||
1388 | `ifdef FPGA | |
1389 | `timescale 1 ns / 100 ps | |
1390 | module cpx_dpsb(cpx_spc_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a, | |
1391 | arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a, | |
1392 | arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a, | |
1393 | io_cpx_data_a, scache0_cpx_data_a, scache1_cpx_data_a, | |
1394 | scache2_cpx_data_a, scache3_cpx_data_a, scache4_cpx_data_a, | |
1395 | scache5_cpx_data_a, scache6_cpx_data_a, scache7_cpx_data_a, tcu_scan_en, | |
1396 | l2clk, scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_out); | |
1397 | ||
1398 | output [149:0] cpx_spc_data_x_; | |
1399 | input [8:0] arb_grant_l_a; | |
1400 | input [8:0] arb_q0_holdbar_l_a; | |
1401 | input [8:0] arb_qsel0_l_a; | |
1402 | input [8:0] arb_qsel1_l_a; | |
1403 | input [8:0] arb_shift_l_a; | |
1404 | input [8:0] arb_grant_r_a; | |
1405 | input [8:0] arb_q0_holdbar_r_a; | |
1406 | input [8:0] arb_qsel0_r_a; | |
1407 | input [8:0] arb_qsel1_r_a; | |
1408 | input [8:0] arb_shift_r_a; | |
1409 | input [149:0] io_cpx_data_a; | |
1410 | input [149:0] scache0_cpx_data_a; | |
1411 | input [149:0] scache1_cpx_data_a; | |
1412 | input [149:0] scache2_cpx_data_a; | |
1413 | input [149:0] scache3_cpx_data_a; | |
1414 | input [149:0] scache4_cpx_data_a; | |
1415 | input [149:0] scache5_cpx_data_a; | |
1416 | input [149:0] scache6_cpx_data_a; | |
1417 | input [149:0] scache7_cpx_data_a; | |
1418 | input tcu_scan_en; | |
1419 | input l2clk; | |
1420 | input scan_in; | |
1421 | input tcu_pce_ov; | |
1422 | input ccx_aclk; | |
1423 | input ccx_bclk; | |
1424 | output scan_out; | |
1425 | ||
1426 | wire [4:0] mac0_rep_in; | |
1427 | wire [3:0] arb_grant_l_a_rep; | |
1428 | wire [3:0] arb_qsel0_l_a_rep; | |
1429 | wire [3:0] arb_qsel1_l_a_rep; | |
1430 | wire [3:0] arb_shift_l_a_rep; | |
1431 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
1432 | wire [4:0] mac0_rep_out; | |
1433 | wire [4:0] mac1_rep_in; | |
1434 | wire [4:0] mac1_rep_out; | |
1435 | wire [4:0] mac2_rep_in; | |
1436 | wire [4:0] mac2_rep_out; | |
1437 | wire [4:0] mac3_rep_in; | |
1438 | wire [4:0] mac3_rep_out; | |
1439 | wire [4:0] mac4_rep_in; | |
1440 | wire [7:5] arb_grant_r_a_rep; | |
1441 | wire [7:5] arb_q0_holdbar_r_a_rep; | |
1442 | wire [7:5] arb_qsel0_r_a_rep; | |
1443 | wire [7:5] arb_qsel1_r_a_rep; | |
1444 | wire [7:5] arb_shift_r_a_rep; | |
1445 | wire [4:0] mac4_rep_out; | |
1446 | wire [4:0] mac5_rep_in; | |
1447 | wire [4:0] mac5_rep_out; | |
1448 | wire [4:0] mac6_rep_in; | |
1449 | wire [4:0] mac6_rep_out; | |
1450 | wire scan_rep_in; | |
1451 | wire [149:0] col8_data_x_; | |
1452 | wire tcu_scan_en_out_8_unused; | |
1453 | wire tcu_pce_ov_out_8_unused; | |
1454 | wire ccx_aclk_out_8_unused; | |
1455 | wire ccx_bclk_out_8_unused; | |
1456 | wire cpx_mac8_scanin; | |
1457 | wire cpx_mac8_scanout; | |
1458 | wire [6:0] tcu_scan_en_out; | |
1459 | wire [6:0] tcu_pce_ov_out; | |
1460 | wire [6:0] ccx_aclk_out; | |
1461 | wire [6:0] ccx_bclk_out; | |
1462 | wire [149:0] col0_data_x_; | |
1463 | wire cpx_mac0_scanin; | |
1464 | wire cpx_mac0_scanout; | |
1465 | wire [149:0] col2_data_x_; | |
1466 | wire cpx_mac1_scanin; | |
1467 | wire cpx_mac1_scanout; | |
1468 | wire [149:0] col3_data_x_; | |
1469 | wire cpx_mac2_scanin; | |
1470 | wire cpx_mac2_scanout; | |
1471 | wire [149:0] col4_data_x_; | |
1472 | wire cpx_mac3_scanin; | |
1473 | wire cpx_mac3_scanout; | |
1474 | wire [149:0] col5_data_x_; | |
1475 | wire cpx_mac4_scanin; | |
1476 | wire cpx_mac4_scanout; | |
1477 | wire [149:0] col6_data_x_; | |
1478 | wire cpx_mac5_scanin; | |
1479 | wire cpx_mac5_scanout; | |
1480 | wire [149:0] col7_data_x_; | |
1481 | wire cpx_mac6_scanin; | |
1482 | wire cpx_mac6_scanout; | |
1483 | wire tcu_scan_en_out_7_unused; | |
1484 | wire tcu_pce_ov_out_7_unused; | |
1485 | wire ccx_aclk_out_7_unused; | |
1486 | wire ccx_bclk_out_7_unused; | |
1487 | wire cpx_mac7_scanin; | |
1488 | wire cpx_mac7_scanout; | |
1489 | wire [7:4] arb_grant_l_a_unused; | |
1490 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
1491 | wire [7:4] arb_qsel0_l_a_unused; | |
1492 | wire [7:4] arb_qsel1_l_a_unused; | |
1493 | wire [7:4] arb_shift_l_a_unused; | |
1494 | wire [8:0] arb_grant_r_a_unused; | |
1495 | wire [8:0] arb_q0_holdbar_r_a_unused; | |
1496 | wire [8:0] arb_qsel0_r_a_unused; | |
1497 | wire [8:0] arb_qsel1_r_a_unused; | |
1498 | wire [8:0] arb_shift_r_a_unused; | |
1499 | wire scan_rep_out; | |
1500 | ||
1501 | assign mac0_rep_in[4:0] = {arb_grant_l_a[2], arb_qsel0_l_a[2], | |
1502 | arb_qsel1_l_a[2], arb_shift_l_a[2], arb_q0_holdbar_l_a[2]}; | |
1503 | assign {arb_grant_l_a_rep[2], arb_qsel0_l_a_rep[2], | |
1504 | arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2], | |
1505 | arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0]; | |
1506 | assign mac1_rep_in[4:0] = {arb_grant_l_a[0], arb_q0_holdbar_l_a[0], | |
1507 | arb_qsel0_l_a[0], arb_qsel1_l_a[0], arb_shift_l_a[0]}; | |
1508 | assign {arb_grant_l_a_rep[0], arb_q0_holdbar_l_a_rep[0], | |
1509 | arb_qsel0_l_a_rep[0], arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0] | |
1510 | } = mac1_rep_out[4:0]; | |
1511 | assign mac2_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3], | |
1512 | arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]}; | |
1513 | assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3], | |
1514 | arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3] | |
1515 | } = mac2_rep_out[4:0]; | |
1516 | assign mac3_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1], | |
1517 | arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]}; | |
1518 | assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1], | |
1519 | arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1] | |
1520 | } = mac3_rep_out[4:0]; | |
1521 | assign mac4_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7], | |
1522 | arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]}; | |
1523 | assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7], | |
1524 | arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7] | |
1525 | } = mac4_rep_out[4:0]; | |
1526 | assign mac5_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5], | |
1527 | arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]}; | |
1528 | assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5], | |
1529 | arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5] | |
1530 | } = mac5_rep_out[4:0]; | |
1531 | assign mac6_rep_in[4:0] = {arb_grant_r_a[6], arb_q0_holdbar_r_a[6], | |
1532 | arb_qsel0_r_a[6], arb_qsel1_r_a[6], arb_shift_r_a[6]}; | |
1533 | assign {arb_grant_r_a_rep[6], arb_q0_holdbar_r_a_rep[6], | |
1534 | arb_qsel0_r_a_rep[6], arb_qsel1_r_a_rep[6], arb_shift_r_a_rep[6] | |
1535 | } = mac6_rep_out[4:0]; | |
1536 | assign scan_rep_in = scan_in; | |
1537 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
1538 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
1539 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
1540 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
1541 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
1542 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
1543 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
1544 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
1545 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
1546 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
1547 | assign arb_grant_r_a_unused[8] = arb_grant_r_a[8]; | |
1548 | assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8]; | |
1549 | assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8]; | |
1550 | assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8]; | |
1551 | assign arb_shift_r_a_unused[8] = arb_shift_r_a[8]; | |
1552 | assign cpx_mac8_scanin = scan_rep_out; | |
1553 | assign cpx_mac0_scanin = cpx_mac8_scanout; | |
1554 | assign cpx_mac1_scanin = cpx_mac0_scanout; | |
1555 | assign cpx_mac2_scanin = cpx_mac1_scanout; | |
1556 | assign cpx_mac3_scanin = cpx_mac2_scanout; | |
1557 | assign cpx_mac4_scanin = cpx_mac3_scanout; | |
1558 | assign cpx_mac5_scanin = cpx_mac4_scanout; | |
1559 | assign cpx_mac6_scanin = cpx_mac5_scanout; | |
1560 | assign cpx_mac7_scanin = cpx_mac6_scanout; | |
1561 | assign scan_out = cpx_mac7_scanout; | |
1562 | ||
1563 | cpx_rep_dp cpx_rep( | |
1564 | .mac0_rep_out (mac0_rep_out[4:0]), | |
1565 | .mac1_rep_out (mac1_rep_out[4:0]), | |
1566 | .mac2_rep_out (mac2_rep_out[4:0]), | |
1567 | .mac3_rep_out (mac3_rep_out[4:0]), | |
1568 | .mac4_rep_out (mac4_rep_out[4:0]), | |
1569 | .mac5_rep_out (mac5_rep_out[4:0]), | |
1570 | .mac6_rep_out (mac6_rep_out[4:0]), | |
1571 | .scan_rep_out (scan_rep_out), | |
1572 | .mac0_rep_in (mac0_rep_in[4:0]), | |
1573 | .mac1_rep_in (mac1_rep_in[4:0]), | |
1574 | .mac2_rep_in (mac2_rep_in[4:0]), | |
1575 | .mac3_rep_in (mac3_rep_in[4:0]), | |
1576 | .mac4_rep_in (mac4_rep_in[4:0]), | |
1577 | .mac5_rep_in (mac5_rep_in[4:0]), | |
1578 | .mac6_rep_in (mac6_rep_in[4:0]), | |
1579 | .scan_rep_in (scan_rep_in)); | |
1580 | cpx_mal_dp cpx_mac8( | |
1581 | .data_out_x_ (col8_data_x_[149:0]), | |
1582 | .tcu_scan_en_out (tcu_scan_en_out_8_unused), | |
1583 | .tcu_pce_ov_out (tcu_pce_ov_out_8_unused), | |
1584 | .ccx_aclk_out (ccx_aclk_out_8_unused), | |
1585 | .ccx_bclk_out (ccx_bclk_out_8_unused), | |
1586 | .arb_grant_a (arb_grant_l_a[8]), | |
1587 | .arb_qsel0_a (arb_qsel0_l_a[8]), | |
1588 | .arb_qsel1_a (arb_qsel1_l_a[8]), | |
1589 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]), | |
1590 | .arb_shift_a (arb_shift_l_a[8]), | |
1591 | .src_cpx_data_a (io_cpx_data_a[149:0]), | |
1592 | .scan_in (cpx_mac8_scanin), | |
1593 | .scan_out (cpx_mac8_scanout), | |
1594 | .l2clk (l2clk), | |
1595 | .tcu_scan_en (tcu_scan_en_out[0]), | |
1596 | .tcu_pce_ov (tcu_pce_ov_out[0]), | |
1597 | .ccx_aclk (ccx_aclk_out[0]), | |
1598 | .ccx_bclk (ccx_bclk_out[0])); | |
1599 | cpx_mbl_dp cpx_mac0( | |
1600 | .data_out_x_ (col0_data_x_[149:0]), | |
1601 | .tcu_scan_en_out (tcu_scan_en_out[0]), | |
1602 | .tcu_pce_ov_out (tcu_pce_ov_out[0]), | |
1603 | .ccx_aclk_out (ccx_aclk_out[0]), | |
1604 | .ccx_bclk_out (ccx_bclk_out[0]), | |
1605 | .arb_grant_a (arb_grant_l_a_rep[2]), | |
1606 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), | |
1607 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), | |
1608 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), | |
1609 | .arb_shift_a (arb_shift_l_a_rep[2]), | |
1610 | .src_cpx_data_a (scache2_cpx_data_a[149:0]), | |
1611 | .data_prev_x_ (col8_data_x_[149:0]), | |
1612 | .scan_in (cpx_mac0_scanin), | |
1613 | .scan_out (cpx_mac0_scanout), | |
1614 | .l2clk (l2clk), | |
1615 | .tcu_scan_en (tcu_scan_en_out[1]), | |
1616 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
1617 | .ccx_aclk (ccx_aclk_out[1]), | |
1618 | .ccx_bclk (ccx_bclk_out[1])); | |
1619 | cpx_mcl_dp cpx_mac1( | |
1620 | .data_out_x_ (cpx_spc_data_x_[149:0]), | |
1621 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
1622 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
1623 | .ccx_aclk_out (ccx_aclk_out[1]), | |
1624 | .ccx_bclk_out (ccx_bclk_out[1]), | |
1625 | .arb_grant_a (arb_grant_l_a_rep[0]), | |
1626 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), | |
1627 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), | |
1628 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), | |
1629 | .arb_shift_a (arb_shift_l_a_rep[0]), | |
1630 | .src_cpx_data_a (scache0_cpx_data_a[149:0]), | |
1631 | .data_crit_x_ (col2_data_x_[149:0]), | |
1632 | .data_ncrit_x_ (col0_data_x_[149:0]), | |
1633 | .scan_in (cpx_mac1_scanin), | |
1634 | .scan_out (cpx_mac1_scanout), | |
1635 | .l2clk (l2clk), | |
1636 | .tcu_scan_en (tcu_scan_en_out[2]), | |
1637 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
1638 | .ccx_aclk (ccx_aclk_out[2]), | |
1639 | .ccx_bclk (ccx_bclk_out[2])); | |
1640 | cpx_mbr_dp cpx_mac2( | |
1641 | .data_out_x_ (col2_data_x_[149:0]), | |
1642 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
1643 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
1644 | .ccx_aclk_out (ccx_aclk_out[2]), | |
1645 | .ccx_bclk_out (ccx_bclk_out[2]), | |
1646 | .arb_grant_a (arb_grant_l_a_rep[3]), | |
1647 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), | |
1648 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), | |
1649 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), | |
1650 | .arb_shift_a (arb_shift_l_a_rep[3]), | |
1651 | .src_cpx_data_a (scache3_cpx_data_a[149:0]), | |
1652 | .data_prev_x_ (col3_data_x_[149:0]), | |
1653 | .scan_in (cpx_mac2_scanin), | |
1654 | .scan_out (cpx_mac2_scanout), | |
1655 | .l2clk (l2clk), | |
1656 | .tcu_scan_en (tcu_scan_en_out[3]), | |
1657 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
1658 | .ccx_aclk (ccx_aclk_out[3]), | |
1659 | .ccx_bclk (ccx_bclk_out[3])); | |
1660 | cpx_mbr_dp cpx_mac3( | |
1661 | .data_out_x_ (col3_data_x_[149:0]), | |
1662 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
1663 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
1664 | .ccx_aclk_out (ccx_aclk_out[3]), | |
1665 | .ccx_bclk_out (ccx_bclk_out[3]), | |
1666 | .arb_grant_a (arb_grant_l_a_rep[1]), | |
1667 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), | |
1668 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), | |
1669 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), | |
1670 | .arb_shift_a (arb_shift_l_a_rep[1]), | |
1671 | .src_cpx_data_a (scache1_cpx_data_a[149:0]), | |
1672 | .data_prev_x_ (col4_data_x_[149:0]), | |
1673 | .scan_in (cpx_mac3_scanin), | |
1674 | .scan_out (cpx_mac3_scanout), | |
1675 | .l2clk (l2clk), | |
1676 | .tcu_scan_en (tcu_scan_en), | |
1677 | .tcu_pce_ov (tcu_pce_ov), | |
1678 | .ccx_aclk (ccx_aclk), | |
1679 | .ccx_bclk (ccx_bclk)); | |
1680 | cpx_mbr_dp cpx_mac4( | |
1681 | .data_out_x_ (col4_data_x_[149:0]), | |
1682 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
1683 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
1684 | .ccx_aclk_out (ccx_aclk_out[4]), | |
1685 | .ccx_bclk_out (ccx_bclk_out[4]), | |
1686 | .arb_grant_a (arb_grant_r_a_rep[7]), | |
1687 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), | |
1688 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), | |
1689 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), | |
1690 | .arb_shift_a (arb_shift_r_a_rep[7]), | |
1691 | .src_cpx_data_a (scache7_cpx_data_a[149:0]), | |
1692 | .data_prev_x_ (col5_data_x_[149:0]), | |
1693 | .scan_in (cpx_mac4_scanin), | |
1694 | .scan_out (cpx_mac4_scanout), | |
1695 | .l2clk (l2clk), | |
1696 | .tcu_scan_en (tcu_scan_en_out[3]), | |
1697 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
1698 | .ccx_aclk (ccx_aclk_out[3]), | |
1699 | .ccx_bclk (ccx_bclk_out[3])); | |
1700 | cpx_mbr_dp cpx_mac5( | |
1701 | .data_out_x_ (col5_data_x_[149:0]), | |
1702 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
1703 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
1704 | .ccx_aclk_out (ccx_aclk_out[5]), | |
1705 | .ccx_bclk_out (ccx_bclk_out[5]), | |
1706 | .arb_grant_a (arb_grant_r_a_rep[5]), | |
1707 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), | |
1708 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), | |
1709 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), | |
1710 | .arb_shift_a (arb_shift_r_a_rep[5]), | |
1711 | .src_cpx_data_a (scache5_cpx_data_a[149:0]), | |
1712 | .data_prev_x_ (col6_data_x_[149:0]), | |
1713 | .scan_in (cpx_mac5_scanin), | |
1714 | .scan_out (cpx_mac5_scanout), | |
1715 | .l2clk (l2clk), | |
1716 | .tcu_scan_en (tcu_scan_en_out[4]), | |
1717 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
1718 | .ccx_aclk (ccx_aclk_out[4]), | |
1719 | .ccx_bclk (ccx_bclk_out[4])); | |
1720 | cpx_mbr_dp cpx_mac6( | |
1721 | .data_out_x_ (col6_data_x_[149:0]), | |
1722 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
1723 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
1724 | .ccx_aclk_out (ccx_aclk_out[6]), | |
1725 | .ccx_bclk_out (ccx_bclk_out[6]), | |
1726 | .arb_grant_a (arb_grant_r_a_rep[6]), | |
1727 | .arb_qsel0_a (arb_qsel0_r_a_rep[6]), | |
1728 | .arb_qsel1_a (arb_qsel1_r_a_rep[6]), | |
1729 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]), | |
1730 | .arb_shift_a (arb_shift_r_a_rep[6]), | |
1731 | .src_cpx_data_a (scache6_cpx_data_a[149:0]), | |
1732 | .data_prev_x_ (col7_data_x_[149:0]), | |
1733 | .scan_in (cpx_mac6_scanin), | |
1734 | .scan_out (cpx_mac6_scanout), | |
1735 | .l2clk (l2clk), | |
1736 | .tcu_scan_en (tcu_scan_en_out[5]), | |
1737 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
1738 | .ccx_aclk (ccx_aclk_out[5]), | |
1739 | .ccx_bclk (ccx_bclk_out[5])); | |
1740 | cpx_mar_dp cpx_mac7( | |
1741 | .data_out_x_ (col7_data_x_[149:0]), | |
1742 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
1743 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
1744 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
1745 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
1746 | .arb_grant_a (arb_grant_r_a[4]), | |
1747 | .arb_qsel0_a (arb_qsel0_r_a[4]), | |
1748 | .arb_qsel1_a (arb_qsel1_r_a[4]), | |
1749 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]), | |
1750 | .arb_shift_a (arb_shift_r_a[4]), | |
1751 | .src_cpx_data_a (scache4_cpx_data_a[149:0]), | |
1752 | .scan_in (cpx_mac7_scanin), | |
1753 | .scan_out (cpx_mac7_scanout), | |
1754 | .l2clk (l2clk), | |
1755 | .tcu_scan_en (tcu_scan_en_out[6]), | |
1756 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
1757 | .ccx_aclk (ccx_aclk_out[6]), | |
1758 | .ccx_bclk (ccx_bclk_out[6])); | |
1759 | endmodule | |
1760 | ||
1761 | ||
1762 | `endif // `ifdef FPGA | |
1763 |