Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / cpx_dpsf.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: cpx_dpsf.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
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8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module cpx_dpsf (
37 cpx_spc_data_x_,
38 arb_grant_l_a,
39 arb_q0_holdbar_l_a,
40 arb_qsel0_l_a,
41 arb_qsel1_l_a,
42 arb_shift_l_a,
43 arb_grant_r_a,
44 arb_q0_holdbar_r_a,
45 arb_qsel0_r_a,
46 arb_qsel1_r_a,
47 arb_shift_r_a,
48 io_cpx_data_a,
49 scache0_cpx_data_a,
50 scache1_cpx_data_a,
51 scache2_cpx_data_a,
52 scache3_cpx_data_a,
53 scache4_cpx_data_a,
54 scache5_cpx_data_a,
55 scache6_cpx_data_a,
56 scache7_cpx_data_a,
57 tcu_scan_en,
58 l2clk,
59 scan_in,
60 tcu_pce_ov,
61 ccx_aclk,
62 ccx_bclk,
63 scan_out);
64wire [4:0] mac0_rep_in;
65wire [3:0] arb_grant_l_a_rep;
66wire [3:0] arb_qsel0_l_a_rep;
67wire [3:0] arb_qsel1_l_a_rep;
68wire [3:0] arb_shift_l_a_rep;
69wire [3:0] arb_q0_holdbar_l_a_rep;
70wire [4:0] mac0_rep_out;
71wire [4:0] mac1_rep_in;
72wire [4:0] mac1_rep_out;
73wire [4:0] mac2_rep_in;
74wire [4:0] mac2_rep_out;
75wire [4:0] mac3_rep_in;
76wire [4:0] mac3_rep_out;
77wire [4:0] mac4_rep_in;
78wire [7:5] arb_grant_r_a_rep;
79wire [7:5] arb_q0_holdbar_r_a_rep;
80wire [7:5] arb_qsel0_r_a_rep;
81wire [7:5] arb_qsel1_r_a_rep;
82wire [7:5] arb_shift_r_a_rep;
83wire [4:0] mac4_rep_out;
84wire [4:0] mac5_rep_in;
85wire [4:0] mac5_rep_out;
86wire [4:0] mac6_rep_in;
87wire [4:0] mac6_rep_out;
88wire scan_rep_in;
89wire [149:0] col8_data_x_;
90wire tcu_scan_en_out_8_unused;
91wire tcu_pce_ov_out_8_unused;
92wire ccx_aclk_out_8_unused;
93wire ccx_bclk_out_8_unused;
94wire cpx_mac8_scanin;
95wire cpx_mac8_scanout;
96wire [6:0] tcu_scan_en_out;
97wire [6:0] tcu_pce_ov_out;
98wire [6:0] ccx_aclk_out;
99wire [6:0] ccx_bclk_out;
100wire [149:0] col0_data_x_;
101wire cpx_mac0_scanin;
102wire cpx_mac0_scanout;
103wire [149:0] col1_data_x_;
104wire cpx_mac1_scanin;
105wire cpx_mac1_scanout;
106wire [149:0] col2_data_x_;
107wire cpx_mac2_scanin;
108wire cpx_mac2_scanout;
109wire [149:0] col3_data_x_;
110wire cpx_mac3_scanin;
111wire cpx_mac3_scanout;
112wire [149:0] col4_data_x_;
113wire cpx_mac4_scanin;
114wire cpx_mac4_scanout;
115wire [149:0] col6_data_x_;
116wire cpx_mac5_scanin;
117wire cpx_mac5_scanout;
118wire [149:0] col7_data_x_;
119wire cpx_mac6_scanin;
120wire cpx_mac6_scanout;
121wire tcu_scan_en_out_7_unused;
122wire tcu_pce_ov_out_7_unused;
123wire ccx_aclk_out_7_unused;
124wire ccx_bclk_out_7_unused;
125wire cpx_mac7_scanin;
126wire cpx_mac7_scanout;
127wire [7:4] arb_grant_l_a_unused;
128wire [7:4] arb_q0_holdbar_l_a_unused;
129wire [7:4] arb_qsel0_l_a_unused;
130wire [7:4] arb_qsel1_l_a_unused;
131wire [7:4] arb_shift_l_a_unused;
132wire [8:0] arb_grant_r_a_unused;
133wire [8:0] arb_q0_holdbar_r_a_unused;
134wire [8:0] arb_qsel0_r_a_unused;
135wire [8:0] arb_qsel1_r_a_unused;
136wire [8:0] arb_shift_r_a_unused;
137wire scan_rep_out;
138
139
140
141// Beginning of automatic outputs (from unused autoinst outputs)
142output [149:0] cpx_spc_data_x_; // From mac4 of cpx_mcr_dp.v
143// End of automatics
144
145// Beginning of automatic inputs (from unused autoinst inputs)
146input [8:0] arb_grant_l_a; // To mac0 of cpx_mar_dp.v, ...
147input [8:0] arb_q0_holdbar_l_a; // To mac0 of cpx_mar_dp.v, ...
148input [8:0] arb_qsel0_l_a; // To mac0 of cpx_mar_dp.v, ...
149input [8:0] arb_qsel1_l_a; // To mac0 of cpx_mar_dp.v, ...
150input [8:0] arb_shift_l_a; // To mac0 of cpx_mar_dp.v, ...
151input [8:0] arb_grant_r_a; // To mac0 of cpx_mar_dp.v, ...
152input [8:0] arb_q0_holdbar_r_a; // To mac0 of cpx_mar_dp.v, ...
153input [8:0] arb_qsel0_r_a; // To mac0 of cpx_mar_dp.v, ...
154input [8:0] arb_qsel1_r_a; // To mac0 of cpx_mar_dp.v, ...
155input [8:0] arb_shift_r_a; // To mac0 of cpx_mar_dp.v, ...
156input [149:0] io_cpx_data_a; // To mac8 of cpx_mal_dp.v
157input [149:0] scache0_cpx_data_a; // To mac0 of cpx_mar_dp.v
158input [149:0] scache1_cpx_data_a; // To mac1 of cpx_mbr_dp.v
159input [149:0] scache2_cpx_data_a; // To mac2 of cpx_mbr_dp.v
160input [149:0] scache3_cpx_data_a; // To mac3 of cpx_mbr_dp.v
161input [149:0] scache4_cpx_data_a; // To mac4 of cpx_mcr_dp.v
162input [149:0] scache5_cpx_data_a; // To mac5 of cpx_mbl_dp.v
163input [149:0] scache6_cpx_data_a; // To mac6 of cpx_mbl_dp.v
164input [149:0] scache7_cpx_data_a; // To cpx_mac7 of cpx_mbl_dp.v
165// End of automatics
166
167// globals
168input tcu_scan_en ;
169input l2clk;
170input scan_in;
171input tcu_pce_ov; // scan signals
172input ccx_aclk;
173input ccx_bclk;
174output scan_out;
175
176
177// io scache2 scache0 scache3 scache1 scache7 scache5 scache6 scache4
178// | | | | | | | | |
179// v v v v v v v v v
180// mac8-> mac0 -> mac1 <-mac2 <- mac3 <- mac4 <- mac5 <- mac6 <- mac7
181// al bl bl bl bl bl cr br bl
182// |
183// ---buf-------------------------------
184// |
185// v
186// to spccore
187
188// mac0 arb inputs go through 1 buffer
189assign mac0_rep_in[4:0] = {arb_grant_l_a[2],arb_qsel0_l_a[2],arb_qsel1_l_a[2],
190 arb_shift_l_a[2],arb_q0_holdbar_l_a[2]};
191
192assign {arb_grant_l_a_rep[2],arb_qsel0_l_a_rep[2],arb_qsel1_l_a_rep[2],
193 arb_shift_l_a_rep[2],arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0];
194
195// mac1 arb input go through 1 buffer
196assign mac1_rep_in[4:0] = {arb_grant_l_a[0],arb_q0_holdbar_l_a[0],arb_qsel0_l_a[0],
197 arb_qsel1_l_a[0],arb_shift_l_a[0]};
198
199assign {arb_grant_l_a_rep[0],arb_q0_holdbar_l_a_rep[0],arb_qsel0_l_a_rep[0],
200 arb_qsel1_l_a_rep[0],arb_shift_l_a_rep[0]} = mac1_rep_out[4:0];
201
202// mac2 arb inputs go through 2 buffers
203assign mac2_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3],
204 arb_qsel1_l_a[3],arb_shift_l_a[3]};
205
206assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3],
207 arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac2_rep_out[4:0];
208
209// mac3 inputs go through 2 buffers
210assign mac3_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1],
211 arb_qsel1_l_a[1],arb_shift_l_a[1]};
212
213assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1],
214 arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac3_rep_out[4:0];
215
216// mac4 inputs go through 2 buffers
217assign mac4_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7],
218 arb_qsel1_r_a[7],arb_shift_r_a[7]};
219
220assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7],
221 arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac4_rep_out[4:0];
222
223// mac5 inputs go through 1 buffer
224assign mac5_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5],
225 arb_qsel1_r_a[5],arb_shift_r_a[5]};
226
227assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5],
228 arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac5_rep_out[4:0];
229
230// mac6 inputs go through 1 buffer
231assign mac6_rep_in[4:0] = {arb_grant_r_a[6],arb_q0_holdbar_r_a[6],arb_qsel0_r_a[6],
232 arb_qsel1_r_a[6],arb_shift_r_a[6]};
233
234assign {arb_grant_r_a_rep[6],arb_q0_holdbar_r_a_rep[6],arb_qsel0_r_a_rep[6],
235 arb_qsel1_r_a_rep[6],arb_shift_r_a_rep[6]} = mac6_rep_out[4:0];
236
237assign scan_rep_in = scan_in;
238
239
240
241cpx_rep_dp cpx_rep(.mac0_rep_out(mac0_rep_out[4:0]),
242 .mac1_rep_out(mac1_rep_out[4:0]),
243 .mac2_rep_out(mac2_rep_out[4:0]),
244 .mac3_rep_out(mac3_rep_out[4:0]),
245 .mac4_rep_out(mac4_rep_out[4:0]),
246 .mac5_rep_out(mac5_rep_out[4:0]),
247 .mac6_rep_out(mac6_rep_out[4:0]),
248 .scan_rep_out(scan_rep_out),
249 .mac0_rep_in(mac0_rep_in[4:0]),
250 .mac1_rep_in(mac1_rep_in[4:0]),
251 .mac2_rep_in(mac2_rep_in[4:0]),
252 .mac3_rep_in(mac3_rep_in[4:0]),
253 .mac4_rep_in(mac4_rep_in[4:0]),
254 .mac5_rep_in(mac5_rep_in[4:0]),
255 .mac6_rep_in(mac6_rep_in[4:0]),
256 .scan_rep_in(scan_rep_in)
257 );
258
259/*
260 cpx_mal_dp AUTO_TEMPLATE
261 (
262 // Outputs
263 .data_out_x_ (col@_data_x_[149:0]),
264 // Inputs
265 .arb_grant_a(arb_grant_l_a[@]),
266 .arb_qsel0_a(arb_qsel0_l_a[@]),
267 .arb_qsel1_a(arb_qsel1_l_a[@]),
268 .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]),
269 .arb_shift_a(arb_shift_l_a[@]),
270 .src_cpx_data_a(io_cpx_data_a[149:0]),
271 .l2clk (l2clk));
272*/
273
274// do not use autoinstancing.
275// connections have been modified to match the cpu floorplan
276// src_pcx_data_a has to be manually connected.
277
278// input from io
279cpx_mal_dp cpx_mac8 (
280 // Outputs
281 .data_out_x_ (col8_data_x_[149:0]), // Templated
282 .tcu_scan_en_out (tcu_scan_en_out_8_unused),
283 .tcu_pce_ov_out (tcu_pce_ov_out_8_unused),
284 .ccx_aclk_out (ccx_aclk_out_8_unused),
285 .ccx_bclk_out (ccx_bclk_out_8_unused),
286 // Inputs
287 .arb_grant_a (arb_grant_l_a[8]), // Templated
288 .arb_qsel0_a (arb_qsel0_l_a[8]), // Templated
289 .arb_qsel1_a (arb_qsel1_l_a[8]), // Templated
290 .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]), // Templated
291 .arb_shift_a (arb_shift_l_a[8]), // Templated
292 .src_cpx_data_a (io_cpx_data_a[149:0]), // Templated
293 .scan_in(cpx_mac8_scanin),
294 .scan_out(cpx_mac8_scanout),
295 .l2clk (l2clk), // Templated
296 .tcu_scan_en (tcu_scan_en_out[0]),
297 .tcu_pce_ov (tcu_pce_ov_out[0]),
298 .ccx_aclk (ccx_aclk_out[0]),
299 .ccx_bclk (ccx_bclk_out[0])
300 );
301
302
303/*
304cpx_mbl_dp AUTO_TEMPLATE
305 (
306 // Outputs
307 .data_out_x_ (col@_data_x_[149:0]),
308 // Inputs
309 .arb_grant_a(arb_grant_l_a[@]),
310 .arb_qsel0_a(arb_qsel0_l_a[@]),
311 .arb_qsel1_a(arb_qsel1_l_a[@]),
312 .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]),
313 .arb_shift_a(arb_shift_l_a[@]),
314 .src_cpx_data_a(scache@_cpx_data_a[149:0]),
315 .data_prev_x_(col@"(- @ 1)"_data_x_[149:0]),
316 .l2clk (l2clk));
317*/
318
319
320// input from sctag2
321cpx_mbl_dp cpx_mac0 (
322 // Outputs
323 .data_out_x_ (col0_data_x_[149:0]),
324 .tcu_scan_en_out (tcu_scan_en_out[0]),
325 .tcu_pce_ov_out (tcu_pce_ov_out[0]),
326 .ccx_aclk_out (ccx_aclk_out[0]),
327 .ccx_bclk_out (ccx_bclk_out[0]),
328 // Inputs
329 .arb_grant_a (arb_grant_l_a_rep[2]),
330 .arb_qsel0_a (arb_qsel0_l_a_rep[2]),
331 .arb_qsel1_a (arb_qsel1_l_a_rep[2]),
332 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]),
333 .arb_shift_a (arb_shift_l_a_rep[2]),
334 .src_cpx_data_a (scache2_cpx_data_a[149:0]),
335 .data_prev_x_ (col8_data_x_[149:0]),
336 .scan_in(cpx_mac0_scanin),
337 .scan_out(cpx_mac0_scanout),
338 .l2clk (l2clk),
339 .tcu_scan_en (tcu_scan_en_out[1]),
340 .tcu_pce_ov (tcu_pce_ov_out[1]),
341 .ccx_aclk (ccx_aclk_out[1]),
342 .ccx_bclk (ccx_bclk_out[1])
343 );
344
345
346// input from sctag0
347cpx_mbl_dp cpx_mac1 (
348 // Outputs
349 .data_out_x_ (col1_data_x_[149:0]),
350 .tcu_scan_en_out (tcu_scan_en_out[1]),
351 .tcu_pce_ov_out (tcu_pce_ov_out[1]),
352 .ccx_aclk_out (ccx_aclk_out[1]),
353 .ccx_bclk_out (ccx_bclk_out[1]),
354 // Inputs
355 .arb_grant_a (arb_grant_l_a_rep[0]),
356 .arb_qsel0_a (arb_qsel0_l_a_rep[0]),
357 .arb_qsel1_a (arb_qsel1_l_a_rep[0]),
358 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]),
359 .arb_shift_a (arb_shift_l_a_rep[0]),
360 .src_cpx_data_a (scache0_cpx_data_a[149:0]),
361 .data_prev_x_ (col0_data_x_[149:0]),
362 .scan_in(cpx_mac1_scanin),
363 .scan_out(cpx_mac1_scanout),
364 .l2clk (l2clk),
365 .tcu_scan_en (tcu_scan_en_out[2]),
366 .tcu_pce_ov (tcu_pce_ov_out[2]),
367 .ccx_aclk (ccx_aclk_out[2]),
368 .ccx_bclk (ccx_bclk_out[2])
369 );
370
371
372// input from sctag3
373cpx_mbl_dp cpx_mac2 (
374 // Outputs
375 .data_out_x_ (col2_data_x_[149:0]),
376 .tcu_scan_en_out (tcu_scan_en_out[2]),
377 .tcu_pce_ov_out (tcu_pce_ov_out[2]),
378 .ccx_aclk_out (ccx_aclk_out[2]),
379 .ccx_bclk_out (ccx_bclk_out[2]),
380 // Inputs
381 .arb_grant_a (arb_grant_l_a_rep[3]),
382 .arb_qsel0_a (arb_qsel0_l_a_rep[3]),
383 .arb_qsel1_a (arb_qsel1_l_a_rep[3]),
384 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]),
385 .arb_shift_a (arb_shift_l_a_rep[3]),
386 .src_cpx_data_a (scache3_cpx_data_a[149:0]),
387 .data_prev_x_ (col1_data_x_[149:0]),
388 .scan_in(cpx_mac2_scanin),
389 .scan_out(cpx_mac2_scanout),
390 .l2clk (l2clk),
391 .tcu_scan_en (tcu_scan_en_out[3]),
392 .tcu_pce_ov (tcu_pce_ov_out[3]),
393 .ccx_aclk (ccx_aclk_out[3]),
394 .ccx_bclk (ccx_bclk_out[3])
395 );
396
397// input from sctag1
398cpx_mbl_dp cpx_mac3 (
399 // Outputs
400 .data_out_x_ (col3_data_x_[149:0]),
401 .tcu_scan_en_out (tcu_scan_en_out[3]),
402 .tcu_pce_ov_out (tcu_pce_ov_out[3]),
403 .ccx_aclk_out (ccx_aclk_out[3]),
404 .ccx_bclk_out (ccx_bclk_out[3]),
405 // Inputs
406 .arb_grant_a (arb_grant_l_a_rep[1]),
407 .arb_qsel0_a (arb_qsel0_l_a_rep[1]),
408 .arb_qsel1_a (arb_qsel1_l_a_rep[1]),
409 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]),
410 .arb_shift_a (arb_shift_l_a_rep[1]),
411 .src_cpx_data_a (scache1_cpx_data_a[149:0]),
412 .data_prev_x_ (col2_data_x_[149:0]),
413 .scan_in(cpx_mac3_scanin),
414 .scan_out(cpx_mac3_scanout),
415 .l2clk (l2clk),
416 .tcu_scan_en (tcu_scan_en),
417 .tcu_pce_ov (tcu_pce_ov),
418 .ccx_aclk (ccx_aclk),
419 .ccx_bclk (ccx_bclk)
420 );
421
422// input from sctag7
423cpx_mbl_dp cpx_mac4 (
424 // Outputs
425 .data_out_x_ (col4_data_x_[149:0]),
426 .tcu_scan_en_out (tcu_scan_en_out[4]),
427 .tcu_pce_ov_out (tcu_pce_ov_out[4]),
428 .ccx_aclk_out (ccx_aclk_out[4]),
429 .ccx_bclk_out (ccx_bclk_out[4]),
430 // Inputs
431 .arb_grant_a (arb_grant_r_a_rep[7]),
432 .arb_qsel0_a (arb_qsel0_r_a_rep[7]),
433 .arb_qsel1_a (arb_qsel1_r_a_rep[7]),
434 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]),
435 .arb_shift_a (arb_shift_r_a_rep[7]),
436 .src_cpx_data_a (scache7_cpx_data_a[149:0]),
437 .data_prev_x_ (col3_data_x_[149:0]),
438 .scan_in(cpx_mac4_scanin),
439 .scan_out(cpx_mac4_scanout),
440 .l2clk (l2clk),
441 .tcu_scan_en (tcu_scan_en_out[3]),
442 .tcu_pce_ov (tcu_pce_ov_out[3]),
443 .ccx_aclk (ccx_aclk_out[3]),
444 .ccx_bclk (ccx_bclk_out[3])
445);
446
447
448/*
449 cpx_mcr_dp AUTO_TEMPLATE
450 (
451 // Outputs
452 .data_out_x_ (cpx_spc_data_x_[149:0]),
453 // Inputs
454 .arb_grant_a(arb_grant_l_a_rep[@]),
455 .arb_qsel0_a(arb_qsel0_l_a_rep[@]),
456 .arb_qsel1_a(arb_qsel1_l_a_rep[@]),
457 .arb_q0_holdbar_a(arb_q0_holdbar_l_a_rep[@]),
458 .arb_shift_a(arb_shift_l_a_rep[@]),
459 .src_cpx_data_a(scache@_cpx_data_a[149:0]),
460 .data_crit_x_(col@"(+ @ 1)"_data_x_[149:0]),
461 .data_ncrit_x_(col@"(- @ 1)"_data_x_[149:0]),
462 .l2clk (l2clk));
463*/
464
465// input from sctag5
466cpx_mcr_dp cpx_mac5 (
467 // Outputs
468 .data_out_x_ (cpx_spc_data_x_[149:0]), // Templated
469 .tcu_scan_en_out (tcu_scan_en_out[5]),
470 .tcu_pce_ov_out (tcu_pce_ov_out[5]),
471 .ccx_aclk_out (ccx_aclk_out[5]),
472 .ccx_bclk_out (ccx_bclk_out[5]),
473 // Inputs
474 .arb_grant_a (arb_grant_r_a_rep[5]), // Templated
475 .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated
476 .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated
477 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated
478 .arb_shift_a (arb_shift_r_a_rep[5]), // Templated
479 .src_cpx_data_a (scache5_cpx_data_a[149:0]), // Templated
480 .data_crit_x_ (col4_data_x_[149:0]), // Templated
481 .data_ncrit_x_ (col6_data_x_[149:0]), // Templated
482 .scan_in(cpx_mac5_scanin),
483 .scan_out(cpx_mac5_scanout),
484 .l2clk (l2clk), // Templated
485 .tcu_scan_en (tcu_scan_en_out[4]),
486 .tcu_pce_ov (tcu_pce_ov_out[4]),
487 .ccx_aclk (ccx_aclk_out[4]),
488 .ccx_bclk (ccx_bclk_out[4])
489 );
490
491
492/*
493 cpx_mbr_dp AUTO_TEMPLATE
494 (
495 // Outputs
496 .data_out_x_ (col@_data_x_[149:0]),
497 // Inputs
498 .arb_grant_a(arb_grant_l_a_rep[@]),
499 .arb_qsel0_a(arb_qsel0_l_a_rep[@]),
500 .arb_qsel1_a(arb_qsel1_l_a_rep[@]),
501 .arb_q0_holdbar_a(arb_q0_holdbar_l_a_rep[@]),
502 .arb_shift_a(arb_shift_l_a_rep[@]),
503 .src_cpx_data_a(scache@_cpx_data_a_rep[149:0]),
504 .data_prev_x_(col@"(+ @ 1)"_data_x_[149:0]),
505 .l2clk (l2clk));
506*/
507
508// input from sctag6
509cpx_mbr_dp cpx_mac6 (
510 // Outputs
511 .data_out_x_ (col6_data_x_[149:0]), // Templated
512 .tcu_scan_en_out (tcu_scan_en_out[6]),
513 .tcu_pce_ov_out (tcu_pce_ov_out[6]),
514 .ccx_aclk_out (ccx_aclk_out[6]),
515 .ccx_bclk_out (ccx_bclk_out[6]),
516 // Inputs
517 .arb_grant_a (arb_grant_r_a_rep[6]), // Templated
518 .arb_qsel0_a (arb_qsel0_r_a_rep[6]), // Templated
519 .arb_qsel1_a (arb_qsel1_r_a_rep[6]), // Templated
520 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]), // Templated
521 .arb_shift_a (arb_shift_r_a_rep[6]), // Templated
522 .src_cpx_data_a (scache6_cpx_data_a[149:0]), // Templated
523 .data_prev_x_ (col7_data_x_[149:0]), // Templated
524 .scan_in(cpx_mac6_scanin),
525 .scan_out(cpx_mac6_scanout),
526 .l2clk (l2clk), // Templated
527 .tcu_scan_en (tcu_scan_en_out[5]),
528 .tcu_pce_ov (tcu_pce_ov_out[5]),
529 .ccx_aclk (ccx_aclk_out[5]),
530 .ccx_bclk (ccx_bclk_out[5])
531 );
532
533/*
534 cpx_mar_dp AUTO_TEMPLATE
535 (
536 // Outputs
537 .data_out_x_ (col@_data_x_[149:0]),
538 // Inputs
539 .arb_grant_a(arb_grant_r_a[@]),
540 .arb_qsel0_a(arb_qsel0_r_a[@]),
541 .arb_qsel1_a(arb_qsel1_r_a[@]),
542 .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]),
543 .arb_shift_a(arb_shift_r_a[@]),
544 .src_cpx_data_a(scache@_cpx_data_a[149:0]),
545 .l2clk (l2clk));
546*/
547
548// input from sctag4
549cpx_mar_dp cpx_mac7 (
550 // Outputs
551 .data_out_x_ (col7_data_x_[149:0]), // Templated
552 .tcu_scan_en_out (tcu_scan_en_out_7_unused),
553 .tcu_pce_ov_out (tcu_pce_ov_out_7_unused),
554 .ccx_aclk_out (ccx_aclk_out_7_unused),
555 .ccx_bclk_out (ccx_bclk_out_7_unused),
556 // Inputs
557 .arb_grant_a (arb_grant_r_a[4]), // Templated
558 .arb_qsel0_a (arb_qsel0_r_a[4]), // Templated
559 .arb_qsel1_a (arb_qsel1_r_a[4]), // Templated
560 .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]), // Templated
561 .arb_shift_a (arb_shift_r_a[4]), // Templated
562 .src_cpx_data_a (scache4_cpx_data_a[149:0]), // Templated
563 .scan_in(cpx_mac7_scanin),
564 .scan_out(cpx_mac7_scanout),
565 .l2clk (l2clk), // Templated
566 .tcu_scan_en (tcu_scan_en_out[6]),
567 .tcu_pce_ov (tcu_pce_ov_out[6]),
568 .ccx_aclk (ccx_aclk_out[6]),
569 .ccx_bclk (ccx_bclk_out[6])
570 );
571
572
573
574assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4];
575assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4];
576assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4];
577assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4];
578assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4];
579
580assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0];
581assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0];
582assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0];
583assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0];
584assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0];
585
586assign arb_grant_r_a_unused[8] = arb_grant_r_a[8];
587assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8];
588assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8];
589assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8];
590assign arb_shift_r_a_unused[8] = arb_shift_r_a[8];
591
592// fixscan start:
593assign cpx_mac8_scanin = scan_rep_out ;
594assign cpx_mac0_scanin = cpx_mac8_scanout ;
595assign cpx_mac1_scanin = cpx_mac0_scanout ;
596assign cpx_mac2_scanin = cpx_mac1_scanout ;
597assign cpx_mac3_scanin = cpx_mac2_scanout ;
598assign cpx_mac4_scanin = cpx_mac3_scanout ;
599assign cpx_mac5_scanin = cpx_mac4_scanout ;
600assign cpx_mac6_scanin = cpx_mac5_scanout ;
601assign cpx_mac7_scanin = cpx_mac6_scanout ;
602assign scan_out = cpx_mac7_scanout ;
603// fixscan end:
604endmodule
605
606// Local Variables:
607// verilog-library-directories:("." "v")
608// End:
609
610
611
612//
613// buff macro
614//
615//
616
617
618
619
620
621module cpx_dpsf_buff_macro__dbuff_32x__stack_6l__width_5 (
622 din,
623 dout);
624 input [4:0] din;
625 output [4:0] dout;
626
627
628
629
630
631
632buff #(5) d0_0 (
633.in(din[4:0]),
634.out(dout[4:0])
635);
636
637
638
639
640
641
642
643
644endmodule
645
646
647
648
649
650//
651// buff macro
652//
653//
654
655
656
657
658
659module cpx_dpsf_buff_macro__dbuff_32x__stack_none__width_1 (
660 din,
661 dout);
662 input [0:0] din;
663 output [0:0] dout;
664
665
666
667
668
669
670buff #(1) d0_0 (
671.in(din[0:0]),
672.out(dout[0:0])
673);
674
675
676
677
678
679
680
681
682endmodule
683
684
685
686
687//
688// buff macro
689//
690//
691
692
693
694
695
696module cpx_dpsf_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
697 din,
698 dout);
699 input [3:0] din;
700 output [3:0] dout;
701
702
703
704
705
706
707buff #(4) d0_0 (
708.in(din[3:0]),
709.out(dout[3:0])
710);
711
712
713
714
715
716
717
718
719endmodule
720
721
722
723
724
725
726
727
728
729// any PARAMS parms go into naming of macro
730
731module cpx_dpsf_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
732 l2clk,
733 l1en,
734 pce_ov,
735 stop,
736 se,
737 l1clk);
738
739
740 input l2clk;
741 input l1en;
742 input pce_ov;
743 input stop;
744 input se;
745 output l1clk;
746
747
748
749
750
751cl_sc1_l1hdr_24x c_0 (
752
753
754 .l2clk(l2clk),
755 .pce(l1en),
756 .l1clk(l1clk),
757 .se(se),
758 .pce_ov(pce_ov),
759 .stop(stop)
760);
761
762
763
764
765
766
767endmodule
768
769
770
771
772
773
774
775
776
777//
778// ccx macro
779//
780//
781
782
783
784
785
786module cpx_dpsf_ccx_new_macro__type_a (
787 l2clk,
788 l1clk,
789 pce0,
790 pce1,
791 pce_ov,
792 se,
793 stop,
794 siclk_in,
795 soclk_in,
796 scan_in,
797 grant_a,
798 qsel0,
799 shift,
800 data_a,
801 data_x_l,
802 scan_out);
803wire so5;
804wire siclk_out;
805wire soclk_out;
806wire l1clk0;
807wire l1clk1;
808wire grant_x;
809wire qsel0_buf;
810wire shift_buf;
811
812input l2clk;
813input l1clk;
814input pce0;
815input pce1;
816input pce_ov;
817input se;
818input stop;
819input siclk_in;
820input soclk_in;
821input scan_in;
822input grant_a;
823input qsel0;
824input shift;
825input [9:0] data_a;
826output [9:0] data_x_l;
827output scan_out;
828cl_dp1_ccxhdr c0 (
829.si(scan_in),
830.so(so5),
831 .l2clk(l2clk),
832 .pce0(pce0),
833 .pce1(pce1),
834 .pce_ov(pce_ov),
835 .stop(stop),
836 .siclk_in(siclk_in),
837 .soclk_in(soclk_in),
838 .siclk_out(siclk_out),
839 .soclk_out(soclk_out),
840 .l1clk0(l1clk0),
841 .l1clk1(l1clk1),
842 .se(se),
843 .l1clk(l1clk),
844 .grant_a(grant_a),
845 .grant_x(grant_x),
846 .qsel0(qsel0),
847 .qsel0_buf(qsel0_buf),
848 .shift(shift),
849 .shift_buf(shift_buf)
850);
851
852
853
854
855
856
857ccx_mac_a #(10) mac_a(
858.siclk(siclk_out),
859.soclk(soclk_out),
860.data_a(data_a[9:0]),
861.data_x_l(data_x_l[9:0]),
862.si(so5),
863.so(scan_out),
864 .l1clk0(l1clk0),
865 .l1clk1(l1clk1),
866 .grant_x(grant_x),
867 .qsel0_buf(qsel0_buf),
868 .shift_buf(shift_buf)
869);
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884endmodule
885
886
887
888//
889// ccx macro
890//
891//
892
893
894
895
896
897module cpx_dpsf_ccx_new_macro__type_b_l (
898 l2clk,
899 l1clk,
900 pce0,
901 pce1,
902 pce_ov,
903 se,
904 stop,
905 siclk_in,
906 soclk_in,
907 scan_in,
908 grant_a,
909 qsel0,
910 shift,
911 data_a,
912 data_prev_x_l,
913 data_x_l,
914 scan_out);
915wire so5;
916wire siclk_out;
917wire soclk_out;
918wire l1clk0;
919wire l1clk1;
920wire grant_x;
921wire qsel0_buf;
922wire shift_buf;
923
924input l2clk;
925input l1clk;
926input pce0;
927input pce1;
928input pce_ov;
929input se;
930input stop;
931input siclk_in;
932input soclk_in;
933input scan_in;
934input grant_a;
935input qsel0;
936input shift;
937input [9:0] data_a;
938input [9:0] data_prev_x_l;
939output [9:0] data_x_l;
940output scan_out;
941cl_dp1_ccxhdr c0 (
942.si(scan_in),
943.so(so5),
944 .l2clk(l2clk),
945 .pce0(pce0),
946 .pce1(pce1),
947 .pce_ov(pce_ov),
948 .stop(stop),
949 .siclk_in(siclk_in),
950 .soclk_in(soclk_in),
951 .siclk_out(siclk_out),
952 .soclk_out(soclk_out),
953 .l1clk0(l1clk0),
954 .l1clk1(l1clk1),
955 .se(se),
956 .l1clk(l1clk),
957 .grant_a(grant_a),
958 .grant_x(grant_x),
959 .qsel0(qsel0),
960 .qsel0_buf(qsel0_buf),
961 .shift(shift),
962 .shift_buf(shift_buf)
963);
964
965
966
967
968
969
970ccx_mac_b #(10) mac_b(
971.siclk(siclk_out),
972.soclk(soclk_out),
973.data_a(data_a[9:0]),
974.data_prev_x_l(data_prev_x_l[9:0]),
975.data_x_l(data_x_l[9:0]),
976.si(so5),
977.so(scan_out),
978 .l1clk0(l1clk0),
979 .l1clk1(l1clk1),
980 .grant_x(grant_x),
981 .qsel0_buf(qsel0_buf),
982 .shift_buf(shift_buf)
983);
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998endmodule
999
1000
1001//// scan renames
1002//assign pce_ov = tcu_pce_ov;
1003//assign stop = tcu_clk_stop;
1004//assign siclk = tcu_aclk;
1005//assign soclk = tcu_bclk;
1006//// end scan
1007//
1008//// buffer the grant signal
1009//
1010//buff_macro i_buf_grant (width=1, stack=50c)
1011//(
1012// .din (arb_grant_a),
1013// .dout (grant_a),
1014// );
1015//
1016//msff_macro i_dff_grant_x (width=12, stack=50c)
1017//(
1018// .scan_in(i_dff_grant_x_scanin),
1019// .scan_out(i_dff_grant_x_scanout),
1020// .clk (l2clk),
1021// .din ({12{grant_a}}),
1022// .dout (grant_x[11:0]),
1023// .en (1'b1),
1024// );
1025//
1026//
1027//// DATAPATH SECTION
1028//
1029//msff_macro i_dff_q1_2 (width=50, stack=50c)
1030//(
1031// .scan_in(i_dff_q1_2_scanin),
1032// .scan_out(i_dff_q1_2_scanout),
1033// .clk (l2clk),
1034// .din (src_cpx_data_a[149:100]),
1035// .dout (q1_dataout[149:100]),
1036// .en (arb_qsel1_a),
1037// );
1038//
1039//msff_macro i_dff_q1_1 (width=50, stack=50c)
1040//(
1041// .scan_in(i_dff_q1_1_scanin),
1042// .scan_out(i_dff_q1_1_scanout),
1043// .clk (l2clk),
1044// .din (src_cpx_data_a[99:50]),
1045// .dout (q1_dataout[99:50]),
1046// .en (arb_qsel1_a),
1047// );
1048//
1049//msff_macro i_dff_q1_0 (width=50, stack=50c)
1050//(
1051// .scan_in(i_dff_q1_0_scanin),
1052// .scan_out(i_dff_q1_0_scanout),
1053// .clk (l2clk),
1054// .din (src_cpx_data_a[49:0]),
1055// .dout (q1_dataout[49:0]),
1056// .en (arb_qsel1_a),
1057// );
1058//
1059////assign q0_datain_ca[149:0] =
1060//// (arb_cpxdp_qsel0_ca ? src_cpx_data_ca[149:0] : 150'd0) |
1061//// (arb_cpxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
1062//
1063//
1064//mux_macro i_mux_q0_2 (width=50, mux=aonpe, ports=2, stack=50c)
1065//(
1066// .din0 (src_cpx_data_a[149:100]),
1067// .din1 (q1_dataout[149:100]),
1068// .sel0 (arb_qsel0_a),
1069// .sel1 (arb_shift_a),
1070// .dout (q0_datain_a[149:100]),
1071// );
1072//
1073//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
1074//(
1075// .din0 (src_cpx_data_a[99:50]),
1076// .din1 (q1_dataout[99:50]),
1077// .sel0 (arb_qsel0_a),
1078// .sel1 (arb_shift_a),
1079// .dout (q0_datain_a[99:50]),
1080// );
1081//
1082//mux_macro i_mux_q0_0 (width=50, mux=aonpe, ports=2, stack=50c)
1083//(
1084// .din0 (src_cpx_data_a[49:0]),
1085// .din1 (q1_dataout[49:0]),
1086// .sel0 (arb_qsel0_a),
1087// .sel1 (arb_shift_a),
1088// .dout (q0_datain_a[49:0]),
1089// );
1090//
1091//msff_macro i_dff_q0_2 (width=50, stack=50c)
1092//(
1093// .scan_in(i_dff_q0_2_scanin),
1094// .scan_out(i_dff_q0_2_scanout),
1095// .clk (l2clk),
1096// .din (q0_datain_a[149:100]),
1097// .dout (q0_dataout[149:100]),
1098// .en (arb_q0_holdbar_a),
1099// );
1100//
1101//msff_macro i_dff_q0_1 (width=50, stack=50c)
1102//(
1103// .scan_in(i_dff_q0_1_scanin),
1104// .scan_out(i_dff_q0_1_scanout),
1105// .clk (l2clk),
1106// .din (q0_datain_a[99:50]),
1107// .dout (q0_dataout[99:50]),
1108// .en (arb_q0_holdbar_a),
1109// );
1110//
1111//msff_macro i_dff_q0_0 (width=50, stack=50c)
1112//(
1113// .scan_in(i_dff_q0_0_scanin),
1114// .scan_out(i_dff_q0_0_scanout),
1115// .clk (l2clk),
1116// .din (q0_datain_a[49:0]),
1117// .dout (q0_dataout[49:0]),
1118// .en (arb_q0_holdbar_a),
1119// );
1120//
1121////MUX
1122//
1123//nand_macro i_nand_data_g_2 (width=50, ports=2, stack=50c)
1124//(
1125// .din0 (q0_dataout[149:100]),
1126// .din1 ({{10{grant_x[11]}},{15{grant_x[10]}},{15{grant_x[9]}},{10{grant_x[8]}}}),
1127// .dout (data_x_[149:100]),
1128// );
1129//
1130//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
1131//(
1132// .din0 (q0_dataout[99:50]),
1133// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
1134// .dout (data_x_[99:50]),
1135// );
1136//
1137//nand_macro i_nand_data_g_0 (width=50, ports=2, stack=50c)
1138//(
1139// .din0 (q0_dataout[49:0]),
1140// .din1 ({{10{grant_x[3]}},{15{grant_x[2]}},{15{grant_x[1]}},{10{grant_x[0]}}}),
1141// .dout (data_x_[49:0]),
1142// );
1143//
1144//nand_macro i_nand_data_crit_2 (width=50, ports=3, stack=50c)
1145//(
1146// .din0 (data_x_[149:100]),
1147// .din1 (data_crit_x_[149:100]),
1148// .din2 (data_ncrit_x_[149:100]),
1149// .dout (data_out_x[149:100])
1150//);
1151//
1152//nand_macro i_nand_data_crit_1 (width=50, ports=3, stack=50c)
1153//(
1154// .din0 (data_x_[99:50]),
1155// .din1 (data_crit_x_[99:50]),
1156// .din2 (data_ncrit_x_[99:50]),
1157// .dout (data_out_x[99:50])
1158//);
1159//
1160//nand_macro i_nand_data_crit_0 (width=50, ports=3, stack=50c)
1161//(
1162// .din0 (data_x_[49:0]),
1163// .din1 (data_crit_x_[49:0]),
1164// .din2 (data_ncrit_x_[49:0]),
1165// .dout (data_out_x[49:0])
1166//);
1167//
1168//inv_macro i_inv_data_out_2 (width=50, stack=50c)
1169//(
1170// .din (data_out_x[149:100]),
1171// .dout (data_out_x_[149:100])
1172// );
1173//
1174//inv_macro i_inv_data_out_1 (width=50, stack=50c)
1175//(
1176// .din (data_out_x[99:50]),
1177// .dout (data_out_x_[99:50])
1178// );
1179//
1180//inv_macro i_inv_data_out_0 (width=50, stack=50c)
1181//(
1182// .din (data_out_x[49:0]),
1183// .dout (data_out_x_[49:0])
1184// );
1185//
1186//// fixscan start:
1187//assign i_dff_grant_x_scanin = scan_in ;
1188//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1189//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1190//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1191//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1192//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1193//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1194//assign scan_out = i_dff_q0_0_scanout ;
1195//// fixscan end:
1196//endmodule
1197
1198
1199//
1200// ccx macro
1201//
1202//
1203
1204
1205
1206
1207
1208module cpx_dpsf_ccx_new_macro__type_c_r (
1209 l2clk,
1210 l1clk,
1211 pce0,
1212 pce1,
1213 pce_ov,
1214 se,
1215 stop,
1216 siclk_in,
1217 soclk_in,
1218 scan_in,
1219 grant_a,
1220 qsel0,
1221 shift,
1222 data_a,
1223 data_crit_x_l,
1224 data_ncrit_x_l,
1225 data_x_l,
1226 scan_out);
1227wire so5;
1228wire siclk_out;
1229wire soclk_out;
1230wire l1clk0;
1231wire l1clk1;
1232wire grant_x;
1233wire qsel0_buf;
1234wire shift_buf;
1235
1236input l2clk;
1237input l1clk;
1238input pce0;
1239input pce1;
1240input pce_ov;
1241input se;
1242input stop;
1243input siclk_in;
1244input soclk_in;
1245input scan_in;
1246input grant_a;
1247input qsel0;
1248input shift;
1249input [9:0] data_a;
1250input [9:0] data_crit_x_l;
1251input [9:0] data_ncrit_x_l;
1252output [9:0] data_x_l;
1253output scan_out;
1254cl_dp1_ccxhdr c0 (
1255.si(scan_in),
1256.so(so5),
1257 .l2clk(l2clk),
1258 .pce0(pce0),
1259 .pce1(pce1),
1260 .pce_ov(pce_ov),
1261 .stop(stop),
1262 .siclk_in(siclk_in),
1263 .soclk_in(soclk_in),
1264 .siclk_out(siclk_out),
1265 .soclk_out(soclk_out),
1266 .l1clk0(l1clk0),
1267 .l1clk1(l1clk1),
1268 .se(se),
1269 .l1clk(l1clk),
1270 .grant_a(grant_a),
1271 .grant_x(grant_x),
1272 .qsel0(qsel0),
1273 .qsel0_buf(qsel0_buf),
1274 .shift(shift),
1275 .shift_buf(shift_buf)
1276);
1277
1278
1279
1280
1281
1282
1283ccx_mac_c #(10) mac_c(
1284.siclk(siclk_out),
1285.soclk(soclk_out),
1286.data_a(data_a[9:0]),
1287.data_crit_x_l(data_crit_x_l[9:0]),
1288.data_ncrit_x_l(data_ncrit_x_l[9:0]),
1289.data_x_l(data_x_l[9:0]),
1290.si(so5),
1291.so(scan_out),
1292 .l1clk0(l1clk0),
1293 .l1clk1(l1clk1),
1294 .grant_x(grant_x),
1295 .qsel0_buf(qsel0_buf),
1296 .shift_buf(shift_buf)
1297);
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312endmodule
1313
1314
1315
1316//
1317// ccx macro
1318//
1319//
1320
1321
1322
1323
1324
1325module cpx_dpsf_ccx_new_macro__type_b_r (
1326 l2clk,
1327 l1clk,
1328 pce0,
1329 pce1,
1330 pce_ov,
1331 se,
1332 stop,
1333 siclk_in,
1334 soclk_in,
1335 scan_in,
1336 grant_a,
1337 qsel0,
1338 shift,
1339 data_a,
1340 data_prev_x_l,
1341 data_x_l,
1342 scan_out);
1343wire so5;
1344wire siclk_out;
1345wire soclk_out;
1346wire l1clk0;
1347wire l1clk1;
1348wire grant_x;
1349wire qsel0_buf;
1350wire shift_buf;
1351
1352input l2clk;
1353input l1clk;
1354input pce0;
1355input pce1;
1356input pce_ov;
1357input se;
1358input stop;
1359input siclk_in;
1360input soclk_in;
1361input scan_in;
1362input grant_a;
1363input qsel0;
1364input shift;
1365input [9:0] data_a;
1366input [9:0] data_prev_x_l;
1367output [9:0] data_x_l;
1368output scan_out;
1369cl_dp1_ccxhdr c0 (
1370.si(scan_in),
1371.so(so5),
1372 .l2clk(l2clk),
1373 .pce0(pce0),
1374 .pce1(pce1),
1375 .pce_ov(pce_ov),
1376 .stop(stop),
1377 .siclk_in(siclk_in),
1378 .soclk_in(soclk_in),
1379 .siclk_out(siclk_out),
1380 .soclk_out(soclk_out),
1381 .l1clk0(l1clk0),
1382 .l1clk1(l1clk1),
1383 .se(se),
1384 .l1clk(l1clk),
1385 .grant_a(grant_a),
1386 .grant_x(grant_x),
1387 .qsel0(qsel0),
1388 .qsel0_buf(qsel0_buf),
1389 .shift(shift),
1390 .shift_buf(shift_buf)
1391);
1392
1393
1394
1395
1396
1397
1398ccx_mac_b #(10) mac_b(
1399.siclk(siclk_out),
1400.soclk(soclk_out),
1401.data_a(data_a[9:0]),
1402.data_prev_x_l(data_prev_x_l[9:0]),
1403.data_x_l(data_x_l[9:0]),
1404.si(so5),
1405.so(scan_out),
1406 .l1clk0(l1clk0),
1407 .l1clk1(l1clk1),
1408 .grant_x(grant_x),
1409 .qsel0_buf(qsel0_buf),
1410 .shift_buf(shift_buf)
1411);
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426endmodule
1427
1428
1429//// scan renames
1430//assign pce_ov = tcu_pce_ov;
1431//assign stop = tcu_clk_stop;
1432//assign siclk = tcu_aclk;
1433//assign soclk = tcu_bclk;
1434//// end scan
1435//
1436//// buffer the grant signal
1437//
1438//buff_macro i_buf_grant (width=1, stack=50c)
1439//(
1440// .din (arb_grant_a),
1441// .dout (grant_a),
1442// );
1443//
1444//msff_macro i_dff_grant_x (width=12, stack=50c)
1445//(
1446// .scan_in(i_dff_grant_x_scanin),
1447// .scan_out(i_dff_grant_x_scanout),
1448// .clk (l2clk),
1449// .din ({12{grant_a}}),
1450// .dout (grant_x[11:0]),
1451// .en (1'b1),
1452// );
1453//
1454//
1455//// DATAPATH SECTION
1456//
1457//msff_macro i_dff_q1_2 (width=50, stack=50c)
1458//(
1459// .scan_in(i_dff_q1_2_scanin),
1460// .scan_out(i_dff_q1_2_scanout),
1461// .clk (l2clk),
1462// .din (src_cpx_data_a[149:100]),
1463// .dout (q1_dataout[149:100]),
1464// .en (arb_qsel1_a),
1465// );
1466//
1467//msff_macro i_dff_q1_1 (width=50, stack=50c)
1468//(
1469// .scan_in(i_dff_q1_1_scanin),
1470// .scan_out(i_dff_q1_1_scanout),
1471// .clk (l2clk),
1472// .din (src_cpx_data_a[99:50]),
1473// .dout (q1_dataout[99:50]),
1474// .en (arb_qsel1_a),
1475// );
1476//
1477//msff_macro i_dff_q1_0 (width=50, stack=50c)
1478//(
1479// .scan_in(i_dff_q1_0_scanin),
1480// .scan_out(i_dff_q1_0_scanout),
1481// .clk (l2clk),
1482// .din (src_cpx_data_a[49:0]),
1483// .dout (q1_dataout[49:0]),
1484// .en (arb_qsel1_a),
1485// );
1486//
1487////assign q0_datain_ca[149:0] =
1488//// (arb_cpxdp_qsel0_ca ? src_cpx_data_ca[149:0] : 150'd0) |
1489//// (arb_cpxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
1490//
1491//
1492//mux_macro i_mux_q0_2 (width=50, mux=aonpe, ports=2, stack=50c)
1493//(
1494// .din0 (src_cpx_data_a[149:100]),
1495// .din1 (q1_dataout[149:100]),
1496// .sel0 (arb_qsel0_a),
1497// .sel1 (arb_shift_a),
1498// .dout (q0_datain_a[149:100]),
1499// );
1500//
1501//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
1502//(
1503// .din0 (src_cpx_data_a[99:50]),
1504// .din1 (q1_dataout[99:50]),
1505// .sel0 (arb_qsel0_a),
1506// .sel1 (arb_shift_a),
1507// .dout (q0_datain_a[99:50]),
1508// );
1509//
1510//mux_macro i_mux_q0_0 (width=50, mux=aonpe, ports=2, stack=50c)
1511//(
1512// .din0 (src_cpx_data_a[49:0]),
1513// .din1 (q1_dataout[49:0]),
1514// .sel0 (arb_qsel0_a),
1515// .sel1 (arb_shift_a),
1516// .dout (q0_datain_a[49:0]),
1517// );
1518//
1519//msff_macro i_dff_q0_2 (width=50, stack=50c)
1520//(
1521// .scan_in(i_dff_q0_2_scanin),
1522// .scan_out(i_dff_q0_2_scanout),
1523// .clk (l2clk),
1524// .din (q0_datain_a[149:100]),
1525// .dout (q0_dataout[149:100]),
1526// .en (arb_q0_holdbar_a),
1527// );
1528//
1529//msff_macro i_dff_q0_1 (width=50, stack=50c)
1530//(
1531// .scan_in(i_dff_q0_1_scanin),
1532// .scan_out(i_dff_q0_1_scanout),
1533// .clk (l2clk),
1534// .din (q0_datain_a[99:50]),
1535// .dout (q0_dataout[99:50]),
1536// .en (arb_q0_holdbar_a),
1537// );
1538//
1539//msff_macro i_dff_q0_0 (width=50, stack=50c)
1540//(
1541// .scan_in(i_dff_q0_0_scanin),
1542// .scan_out(i_dff_q0_0_scanout),
1543// .clk (l2clk),
1544// .din (q0_datain_a[49:0]),
1545// .dout (q0_dataout[49:0]),
1546// .en (arb_q0_holdbar_a),
1547// );
1548//
1549//// MUX
1550//nand_macro i_nand_data_g_2 (width=50, ports=2, stack=50c)
1551//(
1552// .din0 (q0_dataout[149:100]),
1553// .din1 ({{10{grant_x[11]}},{15{grant_x[10]}},{15{grant_x[9]}},{10{grant_x[8]}}}),
1554// .dout (data_out_x_[149:100]),
1555// );
1556//
1557//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
1558//(
1559// .din0 (q0_dataout[99:50]),
1560// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
1561// .dout (data_out_x_[99:50]),
1562// );
1563//
1564//nand_macro i_nand_data_g_0 (width=50, ports=2, stack=50c)
1565//(
1566// .din0 (q0_dataout[49:0]),
1567// .din1 ({{10{grant_x[3]}},{15{grant_x[2]}},{15{grant_x[1]}},{10{grant_x[0]}}}),
1568// .dout (data_out_x_[49:0]),
1569// );
1570//
1571//// fixscan start:
1572//assign i_dff_grant_x_scanin = scan_in ;
1573//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1574//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1575//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1576//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1577//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1578//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1579//assign scan_out = i_dff_q0_0_scanout ;
1580//// fixscan end:
1581
1582`endif // `ifndef FPGA
1583
1584`ifdef FPGA
1585
1586`timescale 1 ns / 100 ps
1587module cpx_dpsf(cpx_spc_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a,
1588 arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a,
1589 arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a,
1590 io_cpx_data_a, scache0_cpx_data_a, scache1_cpx_data_a,
1591 scache2_cpx_data_a, scache3_cpx_data_a, scache4_cpx_data_a,
1592 scache5_cpx_data_a, scache6_cpx_data_a, scache7_cpx_data_a, tcu_scan_en,
1593 l2clk, scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_out);
1594
1595 output [149:0] cpx_spc_data_x_;
1596 input [8:0] arb_grant_l_a;
1597 input [8:0] arb_q0_holdbar_l_a;
1598 input [8:0] arb_qsel0_l_a;
1599 input [8:0] arb_qsel1_l_a;
1600 input [8:0] arb_shift_l_a;
1601 input [8:0] arb_grant_r_a;
1602 input [8:0] arb_q0_holdbar_r_a;
1603 input [8:0] arb_qsel0_r_a;
1604 input [8:0] arb_qsel1_r_a;
1605 input [8:0] arb_shift_r_a;
1606 input [149:0] io_cpx_data_a;
1607 input [149:0] scache0_cpx_data_a;
1608 input [149:0] scache1_cpx_data_a;
1609 input [149:0] scache2_cpx_data_a;
1610 input [149:0] scache3_cpx_data_a;
1611 input [149:0] scache4_cpx_data_a;
1612 input [149:0] scache5_cpx_data_a;
1613 input [149:0] scache6_cpx_data_a;
1614 input [149:0] scache7_cpx_data_a;
1615 input tcu_scan_en;
1616 input l2clk;
1617 input scan_in;
1618 input tcu_pce_ov;
1619 input ccx_aclk;
1620 input ccx_bclk;
1621 output scan_out;
1622
1623 wire [4:0] mac0_rep_in;
1624 wire [3:0] arb_grant_l_a_rep;
1625 wire [3:0] arb_qsel0_l_a_rep;
1626 wire [3:0] arb_qsel1_l_a_rep;
1627 wire [3:0] arb_shift_l_a_rep;
1628 wire [3:0] arb_q0_holdbar_l_a_rep;
1629 wire [4:0] mac0_rep_out;
1630 wire [4:0] mac1_rep_in;
1631 wire [4:0] mac1_rep_out;
1632 wire [4:0] mac2_rep_in;
1633 wire [4:0] mac2_rep_out;
1634 wire [4:0] mac3_rep_in;
1635 wire [4:0] mac3_rep_out;
1636 wire [4:0] mac4_rep_in;
1637 wire [7:5] arb_grant_r_a_rep;
1638 wire [7:5] arb_q0_holdbar_r_a_rep;
1639 wire [7:5] arb_qsel0_r_a_rep;
1640 wire [7:5] arb_qsel1_r_a_rep;
1641 wire [7:5] arb_shift_r_a_rep;
1642 wire [4:0] mac4_rep_out;
1643 wire [4:0] mac5_rep_in;
1644 wire [4:0] mac5_rep_out;
1645 wire [4:0] mac6_rep_in;
1646 wire [4:0] mac6_rep_out;
1647 wire scan_rep_in;
1648 wire [149:0] col8_data_x_;
1649 wire tcu_scan_en_out_8_unused;
1650 wire tcu_pce_ov_out_8_unused;
1651 wire ccx_aclk_out_8_unused;
1652 wire ccx_bclk_out_8_unused;
1653 wire cpx_mac8_scanin;
1654 wire cpx_mac8_scanout;
1655 wire [6:0] tcu_scan_en_out;
1656 wire [6:0] tcu_pce_ov_out;
1657 wire [6:0] ccx_aclk_out;
1658 wire [6:0] ccx_bclk_out;
1659 wire [149:0] col0_data_x_;
1660 wire cpx_mac0_scanin;
1661 wire cpx_mac0_scanout;
1662 wire [149:0] col1_data_x_;
1663 wire cpx_mac1_scanin;
1664 wire cpx_mac1_scanout;
1665 wire [149:0] col2_data_x_;
1666 wire cpx_mac2_scanin;
1667 wire cpx_mac2_scanout;
1668 wire [149:0] col3_data_x_;
1669 wire cpx_mac3_scanin;
1670 wire cpx_mac3_scanout;
1671 wire [149:0] col4_data_x_;
1672 wire cpx_mac4_scanin;
1673 wire cpx_mac4_scanout;
1674 wire [149:0] col6_data_x_;
1675 wire cpx_mac5_scanin;
1676 wire cpx_mac5_scanout;
1677 wire [149:0] col7_data_x_;
1678 wire cpx_mac6_scanin;
1679 wire cpx_mac6_scanout;
1680 wire tcu_scan_en_out_7_unused;
1681 wire tcu_pce_ov_out_7_unused;
1682 wire ccx_aclk_out_7_unused;
1683 wire ccx_bclk_out_7_unused;
1684 wire cpx_mac7_scanin;
1685 wire cpx_mac7_scanout;
1686 wire [7:4] arb_grant_l_a_unused;
1687 wire [7:4] arb_q0_holdbar_l_a_unused;
1688 wire [7:4] arb_qsel0_l_a_unused;
1689 wire [7:4] arb_qsel1_l_a_unused;
1690 wire [7:4] arb_shift_l_a_unused;
1691 wire [8:0] arb_grant_r_a_unused;
1692 wire [8:0] arb_q0_holdbar_r_a_unused;
1693 wire [8:0] arb_qsel0_r_a_unused;
1694 wire [8:0] arb_qsel1_r_a_unused;
1695 wire [8:0] arb_shift_r_a_unused;
1696 wire scan_rep_out;
1697
1698 assign mac0_rep_in[4:0] = {arb_grant_l_a[2], arb_qsel0_l_a[2],
1699 arb_qsel1_l_a[2], arb_shift_l_a[2], arb_q0_holdbar_l_a[2]};
1700 assign {arb_grant_l_a_rep[2], arb_qsel0_l_a_rep[2],
1701 arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2],
1702 arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0];
1703 assign mac1_rep_in[4:0] = {arb_grant_l_a[0], arb_q0_holdbar_l_a[0],
1704 arb_qsel0_l_a[0], arb_qsel1_l_a[0], arb_shift_l_a[0]};
1705 assign {arb_grant_l_a_rep[0], arb_q0_holdbar_l_a_rep[0],
1706 arb_qsel0_l_a_rep[0], arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0]
1707 } = mac1_rep_out[4:0];
1708 assign mac2_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3],
1709 arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]};
1710 assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3],
1711 arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3]
1712 } = mac2_rep_out[4:0];
1713 assign mac3_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1],
1714 arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]};
1715 assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1],
1716 arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1]
1717 } = mac3_rep_out[4:0];
1718 assign mac4_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7],
1719 arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]};
1720 assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7],
1721 arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7]
1722 } = mac4_rep_out[4:0];
1723 assign mac5_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5],
1724 arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]};
1725 assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5],
1726 arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5]
1727 } = mac5_rep_out[4:0];
1728 assign mac6_rep_in[4:0] = {arb_grant_r_a[6], arb_q0_holdbar_r_a[6],
1729 arb_qsel0_r_a[6], arb_qsel1_r_a[6], arb_shift_r_a[6]};
1730 assign {arb_grant_r_a_rep[6], arb_q0_holdbar_r_a_rep[6],
1731 arb_qsel0_r_a_rep[6], arb_qsel1_r_a_rep[6], arb_shift_r_a_rep[6]
1732 } = mac6_rep_out[4:0];
1733 assign scan_rep_in = scan_in;
1734 assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4];
1735 assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4];
1736 assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4];
1737 assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4];
1738 assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4];
1739 assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0];
1740 assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0];
1741 assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0];
1742 assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0];
1743 assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0];
1744 assign arb_grant_r_a_unused[8] = arb_grant_r_a[8];
1745 assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8];
1746 assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8];
1747 assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8];
1748 assign arb_shift_r_a_unused[8] = arb_shift_r_a[8];
1749 assign cpx_mac8_scanin = scan_rep_out;
1750 assign cpx_mac0_scanin = cpx_mac8_scanout;
1751 assign cpx_mac1_scanin = cpx_mac0_scanout;
1752 assign cpx_mac2_scanin = cpx_mac1_scanout;
1753 assign cpx_mac3_scanin = cpx_mac2_scanout;
1754 assign cpx_mac4_scanin = cpx_mac3_scanout;
1755 assign cpx_mac5_scanin = cpx_mac4_scanout;
1756 assign cpx_mac6_scanin = cpx_mac5_scanout;
1757 assign cpx_mac7_scanin = cpx_mac6_scanout;
1758 assign scan_out = cpx_mac7_scanout;
1759
1760 cpx_rep_dp cpx_rep(
1761 .mac0_rep_out (mac0_rep_out[4:0]),
1762 .mac1_rep_out (mac1_rep_out[4:0]),
1763 .mac2_rep_out (mac2_rep_out[4:0]),
1764 .mac3_rep_out (mac3_rep_out[4:0]),
1765 .mac4_rep_out (mac4_rep_out[4:0]),
1766 .mac5_rep_out (mac5_rep_out[4:0]),
1767 .mac6_rep_out (mac6_rep_out[4:0]),
1768 .scan_rep_out (scan_rep_out),
1769 .mac0_rep_in (mac0_rep_in[4:0]),
1770 .mac1_rep_in (mac1_rep_in[4:0]),
1771 .mac2_rep_in (mac2_rep_in[4:0]),
1772 .mac3_rep_in (mac3_rep_in[4:0]),
1773 .mac4_rep_in (mac4_rep_in[4:0]),
1774 .mac5_rep_in (mac5_rep_in[4:0]),
1775 .mac6_rep_in (mac6_rep_in[4:0]),
1776 .scan_rep_in (scan_rep_in));
1777 cpx_mal_dp cpx_mac8(
1778 .data_out_x_ (col8_data_x_[149:0]),
1779 .tcu_scan_en_out (tcu_scan_en_out_8_unused),
1780 .tcu_pce_ov_out (tcu_pce_ov_out_8_unused),
1781 .ccx_aclk_out (ccx_aclk_out_8_unused),
1782 .ccx_bclk_out (ccx_bclk_out_8_unused),
1783 .arb_grant_a (arb_grant_l_a[8]),
1784 .arb_qsel0_a (arb_qsel0_l_a[8]),
1785 .arb_qsel1_a (arb_qsel1_l_a[8]),
1786 .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]),
1787 .arb_shift_a (arb_shift_l_a[8]),
1788 .src_cpx_data_a (io_cpx_data_a[149:0]),
1789 .scan_in (cpx_mac8_scanin),
1790 .scan_out (cpx_mac8_scanout),
1791 .l2clk (l2clk),
1792 .tcu_scan_en (tcu_scan_en_out[0]),
1793 .tcu_pce_ov (tcu_pce_ov_out[0]),
1794 .ccx_aclk (ccx_aclk_out[0]),
1795 .ccx_bclk (ccx_bclk_out[0]));
1796 cpx_mbl_dp cpx_mac0(
1797 .data_out_x_ (col0_data_x_[149:0]),
1798 .tcu_scan_en_out (tcu_scan_en_out[0]),
1799 .tcu_pce_ov_out (tcu_pce_ov_out[0]),
1800 .ccx_aclk_out (ccx_aclk_out[0]),
1801 .ccx_bclk_out (ccx_bclk_out[0]),
1802 .arb_grant_a (arb_grant_l_a_rep[2]),
1803 .arb_qsel0_a (arb_qsel0_l_a_rep[2]),
1804 .arb_qsel1_a (arb_qsel1_l_a_rep[2]),
1805 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]),
1806 .arb_shift_a (arb_shift_l_a_rep[2]),
1807 .src_cpx_data_a (scache2_cpx_data_a[149:0]),
1808 .data_prev_x_ (col8_data_x_[149:0]),
1809 .scan_in (cpx_mac0_scanin),
1810 .scan_out (cpx_mac0_scanout),
1811 .l2clk (l2clk),
1812 .tcu_scan_en (tcu_scan_en_out[1]),
1813 .tcu_pce_ov (tcu_pce_ov_out[1]),
1814 .ccx_aclk (ccx_aclk_out[1]),
1815 .ccx_bclk (ccx_bclk_out[1]));
1816 cpx_mbl_dp cpx_mac1(
1817 .data_out_x_ (col1_data_x_[149:0]),
1818 .tcu_scan_en_out (tcu_scan_en_out[1]),
1819 .tcu_pce_ov_out (tcu_pce_ov_out[1]),
1820 .ccx_aclk_out (ccx_aclk_out[1]),
1821 .ccx_bclk_out (ccx_bclk_out[1]),
1822 .arb_grant_a (arb_grant_l_a_rep[0]),
1823 .arb_qsel0_a (arb_qsel0_l_a_rep[0]),
1824 .arb_qsel1_a (arb_qsel1_l_a_rep[0]),
1825 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]),
1826 .arb_shift_a (arb_shift_l_a_rep[0]),
1827 .src_cpx_data_a (scache0_cpx_data_a[149:0]),
1828 .data_prev_x_ (col0_data_x_[149:0]),
1829 .scan_in (cpx_mac1_scanin),
1830 .scan_out (cpx_mac1_scanout),
1831 .l2clk (l2clk),
1832 .tcu_scan_en (tcu_scan_en_out[2]),
1833 .tcu_pce_ov (tcu_pce_ov_out[2]),
1834 .ccx_aclk (ccx_aclk_out[2]),
1835 .ccx_bclk (ccx_bclk_out[2]));
1836 cpx_mbl_dp cpx_mac2(
1837 .data_out_x_ (col2_data_x_[149:0]),
1838 .tcu_scan_en_out (tcu_scan_en_out[2]),
1839 .tcu_pce_ov_out (tcu_pce_ov_out[2]),
1840 .ccx_aclk_out (ccx_aclk_out[2]),
1841 .ccx_bclk_out (ccx_bclk_out[2]),
1842 .arb_grant_a (arb_grant_l_a_rep[3]),
1843 .arb_qsel0_a (arb_qsel0_l_a_rep[3]),
1844 .arb_qsel1_a (arb_qsel1_l_a_rep[3]),
1845 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]),
1846 .arb_shift_a (arb_shift_l_a_rep[3]),
1847 .src_cpx_data_a (scache3_cpx_data_a[149:0]),
1848 .data_prev_x_ (col1_data_x_[149:0]),
1849 .scan_in (cpx_mac2_scanin),
1850 .scan_out (cpx_mac2_scanout),
1851 .l2clk (l2clk),
1852 .tcu_scan_en (tcu_scan_en_out[3]),
1853 .tcu_pce_ov (tcu_pce_ov_out[3]),
1854 .ccx_aclk (ccx_aclk_out[3]),
1855 .ccx_bclk (ccx_bclk_out[3]));
1856 cpx_mbl_dp cpx_mac3(
1857 .data_out_x_ (col3_data_x_[149:0]),
1858 .tcu_scan_en_out (tcu_scan_en_out[3]),
1859 .tcu_pce_ov_out (tcu_pce_ov_out[3]),
1860 .ccx_aclk_out (ccx_aclk_out[3]),
1861 .ccx_bclk_out (ccx_bclk_out[3]),
1862 .arb_grant_a (arb_grant_l_a_rep[1]),
1863 .arb_qsel0_a (arb_qsel0_l_a_rep[1]),
1864 .arb_qsel1_a (arb_qsel1_l_a_rep[1]),
1865 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]),
1866 .arb_shift_a (arb_shift_l_a_rep[1]),
1867 .src_cpx_data_a (scache1_cpx_data_a[149:0]),
1868 .data_prev_x_ (col2_data_x_[149:0]),
1869 .scan_in (cpx_mac3_scanin),
1870 .scan_out (cpx_mac3_scanout),
1871 .l2clk (l2clk),
1872 .tcu_scan_en (tcu_scan_en),
1873 .tcu_pce_ov (tcu_pce_ov),
1874 .ccx_aclk (ccx_aclk),
1875 .ccx_bclk (ccx_bclk));
1876 cpx_mbl_dp cpx_mac4(
1877 .data_out_x_ (col4_data_x_[149:0]),
1878 .tcu_scan_en_out (tcu_scan_en_out[4]),
1879 .tcu_pce_ov_out (tcu_pce_ov_out[4]),
1880 .ccx_aclk_out (ccx_aclk_out[4]),
1881 .ccx_bclk_out (ccx_bclk_out[4]),
1882 .arb_grant_a (arb_grant_r_a_rep[7]),
1883 .arb_qsel0_a (arb_qsel0_r_a_rep[7]),
1884 .arb_qsel1_a (arb_qsel1_r_a_rep[7]),
1885 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]),
1886 .arb_shift_a (arb_shift_r_a_rep[7]),
1887 .src_cpx_data_a (scache7_cpx_data_a[149:0]),
1888 .data_prev_x_ (col3_data_x_[149:0]),
1889 .scan_in (cpx_mac4_scanin),
1890 .scan_out (cpx_mac4_scanout),
1891 .l2clk (l2clk),
1892 .tcu_scan_en (tcu_scan_en_out[3]),
1893 .tcu_pce_ov (tcu_pce_ov_out[3]),
1894 .ccx_aclk (ccx_aclk_out[3]),
1895 .ccx_bclk (ccx_bclk_out[3]));
1896 cpx_mcr_dp cpx_mac5(
1897 .data_out_x_ (cpx_spc_data_x_[149:0]),
1898 .tcu_scan_en_out (tcu_scan_en_out[5]),
1899 .tcu_pce_ov_out (tcu_pce_ov_out[5]),
1900 .ccx_aclk_out (ccx_aclk_out[5]),
1901 .ccx_bclk_out (ccx_bclk_out[5]),
1902 .arb_grant_a (arb_grant_r_a_rep[5]),
1903 .arb_qsel0_a (arb_qsel0_r_a_rep[5]),
1904 .arb_qsel1_a (arb_qsel1_r_a_rep[5]),
1905 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]),
1906 .arb_shift_a (arb_shift_r_a_rep[5]),
1907 .src_cpx_data_a (scache5_cpx_data_a[149:0]),
1908 .data_crit_x_ (col4_data_x_[149:0]),
1909 .data_ncrit_x_ (col6_data_x_[149:0]),
1910 .scan_in (cpx_mac5_scanin),
1911 .scan_out (cpx_mac5_scanout),
1912 .l2clk (l2clk),
1913 .tcu_scan_en (tcu_scan_en_out[4]),
1914 .tcu_pce_ov (tcu_pce_ov_out[4]),
1915 .ccx_aclk (ccx_aclk_out[4]),
1916 .ccx_bclk (ccx_bclk_out[4]));
1917 cpx_mbr_dp cpx_mac6(
1918 .data_out_x_ (col6_data_x_[149:0]),
1919 .tcu_scan_en_out (tcu_scan_en_out[6]),
1920 .tcu_pce_ov_out (tcu_pce_ov_out[6]),
1921 .ccx_aclk_out (ccx_aclk_out[6]),
1922 .ccx_bclk_out (ccx_bclk_out[6]),
1923 .arb_grant_a (arb_grant_r_a_rep[6]),
1924 .arb_qsel0_a (arb_qsel0_r_a_rep[6]),
1925 .arb_qsel1_a (arb_qsel1_r_a_rep[6]),
1926 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]),
1927 .arb_shift_a (arb_shift_r_a_rep[6]),
1928 .src_cpx_data_a (scache6_cpx_data_a[149:0]),
1929 .data_prev_x_ (col7_data_x_[149:0]),
1930 .scan_in (cpx_mac6_scanin),
1931 .scan_out (cpx_mac6_scanout),
1932 .l2clk (l2clk),
1933 .tcu_scan_en (tcu_scan_en_out[5]),
1934 .tcu_pce_ov (tcu_pce_ov_out[5]),
1935 .ccx_aclk (ccx_aclk_out[5]),
1936 .ccx_bclk (ccx_bclk_out[5]));
1937 cpx_mar_dp cpx_mac7(
1938 .data_out_x_ (col7_data_x_[149:0]),
1939 .tcu_scan_en_out (tcu_scan_en_out_7_unused),
1940 .tcu_pce_ov_out (tcu_pce_ov_out_7_unused),
1941 .ccx_aclk_out (ccx_aclk_out_7_unused),
1942 .ccx_bclk_out (ccx_bclk_out_7_unused),
1943 .arb_grant_a (arb_grant_r_a[4]),
1944 .arb_qsel0_a (arb_qsel0_r_a[4]),
1945 .arb_qsel1_a (arb_qsel1_r_a[4]),
1946 .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]),
1947 .arb_shift_a (arb_shift_r_a[4]),
1948 .src_cpx_data_a (scache4_cpx_data_a[149:0]),
1949 .scan_in (cpx_mac7_scanin),
1950 .scan_out (cpx_mac7_scanout),
1951 .l2clk (l2clk),
1952 .tcu_scan_en (tcu_scan_en_out[6]),
1953 .tcu_pce_ov (tcu_pce_ov_out[6]),
1954 .ccx_aclk (ccx_aclk_out[6]),
1955 .ccx_bclk (ccx_bclk_out[6]));
1956endmodule
1957
1958
1959`endif // `ifdef FPGA
1960