Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / cpx_mal_dp.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: cpx_mal_dp.v
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34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module cpx_mal_dp (
37 data_out_x_,
38 arb_grant_a,
39 arb_qsel0_a,
40 arb_qsel1_a,
41 arb_q0_holdbar_a,
42 arb_shift_a,
43 src_cpx_data_a,
44 l2clk,
45 scan_in,
46 tcu_pce_ov,
47 ccx_aclk,
48 ccx_bclk,
49 tcu_scan_en,
50 scan_out,
51 ccx_aclk_out,
52 ccx_bclk_out,
53 tcu_pce_ov_out,
54 tcu_scan_en_out);
55wire pce_ov;
56wire stop;
57wire siclk_in;
58wire soclk_in;
59wire se;
60wire [149:0] src_data_a;
61wire l1clka;
62wire l1clkb;
63wire i0_scanin;
64wire i0_scanout;
65wire i1_scanin;
66wire i1_scanout;
67wire i2_scanin;
68wire i2_scanout;
69wire i3_scanin;
70wire i3_scanout;
71wire i4_scanin;
72wire i4_scanout;
73wire i5_scanin;
74wire i5_scanout;
75wire i6_scanin;
76wire i6_scanout;
77wire i7_scanin;
78wire i7_scanout;
79wire i8_scanin;
80wire i8_scanout;
81wire i9_scanin;
82wire i9_scanout;
83wire i10_scanin;
84wire i10_scanout;
85wire i11_scanin;
86wire i11_scanout;
87wire i12_scanin;
88wire i12_scanout;
89wire i13_scanin;
90wire i13_scanout;
91wire i14_scanin;
92wire i14_scanout;
93
94
95output [149:0] data_out_x_;
96
97input arb_grant_a;
98input arb_qsel0_a;
99input arb_qsel1_a;
100input arb_q0_holdbar_a;
101input arb_shift_a;
102
103
104input [149:0] src_cpx_data_a;
105
106// globals
107input l2clk;
108input scan_in;
109input tcu_pce_ov; // scan signals
110input ccx_aclk;
111input ccx_bclk;
112input tcu_scan_en;
113
114output scan_out;
115
116// buffer the high fanout nets
117output ccx_aclk_out;
118output ccx_bclk_out;
119output tcu_pce_ov_out;
120output tcu_scan_en_out;
121
122// scan renames
123assign pce_ov = tcu_pce_ov_out;
124assign stop = 1'b0;
125assign siclk_in = ccx_aclk_out;
126assign soclk_in = ccx_bclk_out;
127assign se = tcu_scan_en_out ;
128// end scan
129
130assign src_data_a[149:0] = src_cpx_data_a[149:0];
131
132//cl_dp1_l1hdr_24x gkt_hdr (
133//.l2clk(l2clk),
134//.pce(1'b1),
135//.aclk(siclk),
136//.bclk(soclk),
137//.siclk_out(siclk_out_unused),
138//.soclk_out(soclk_out_unused),
139//.l1clk(l1clk),
140//.pce_ov(pce_ov),
141//.stop(stop)
142//);
143
144//l1clkhdr_dp_macro gkt_hdra
145// (
146// .l2clk (l2clk),
147// .l1en (1'b1 ),
148// .siclk_out (sia_unused),
149// .soclk_out (soa_unused),
150// .l1clk (l1clka)
151// );
152
153//l1clkhdr_dp_macro gkt_hdrb
154// (
155// .l2clk (l2clk),
156// .l1en (1'b1 ),
157// .siclk_out (sib_unused),
158// .soclk_out (sob_unused),
159// .l1clk (l1clkb)
160// );
161
162cpx_mal_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn (
163 .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}),
164 .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out})
165);
166
167cpx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra
168 (
169 .l2clk (l2clk),
170 .l1en (1'b1 ),
171 .l1clk (l1clka),
172 .pce_ov(pce_ov),
173 .stop(stop),
174 .se(se)
175 );
176
177cpx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb
178 (
179 .l2clk (l2clk),
180 .l1en (1'b1 ),
181 .l1clk (l1clkb),
182 .pce_ov(pce_ov),
183 .stop(stop),
184 .se(se)
185 );
186
187// ccx_new_macro_a AUTO_TEMPLATE
188// (
189//.scan_in(AUTO_TEMPLATE_scanin),
190//.scan_out(AUTO_TEMPLATE_scanout),
191//.l2clk (l2clk),
192//.l1clk (l1clk),
193//.pce0 (arb_q0_holdbar_a),
194//.pce1 (arb_qsel1_a),
195//.pce_ov (pce_ov),
196//.stop (stop),
197//.siclk_in (siclk_in),
198//.soclk_in (soclk_in),
199//.grant_a (arb_grant_a),
200//.qsel0 (arb_qsel0_a),
201//.shift (arb_shift_a),
202//.data_a (src_data_a[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
203//.data_x_l (data_out_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
204//);
205
206cpx_mal_dp_ccx_new_macro__type_a i0 (
207 // Outputs
208 .data_x_l (data_out_x_[9:0]), // Templated
209 // Inputs
210 .scan_in(i0_scanin),
211 .scan_out(i0_scanout),
212 .l2clk (l2clk), // Templated
213 .l1clk (l1clka), // Templated
214 .pce0 (arb_q0_holdbar_a), // Templated
215 .pce1 (arb_qsel1_a), // Templated
216 .pce_ov (pce_ov), // Templated
217 .stop (stop), // Templated
218 .siclk_in (siclk_in), // Templated
219 .soclk_in (soclk_in), // Templated
220 .grant_a (arb_grant_a), // Templated
221 .qsel0 (arb_qsel0_a), // Templated
222 .shift (arb_shift_a), // Templated
223 .data_a (src_data_a[9:0]),
224 .se(se)); // Templated
225
226cpx_mal_dp_ccx_new_macro__type_a i1 (
227 // Outputs
228 .data_x_l (data_out_x_[19:10]), // Templated
229 // Inputs
230 .scan_in(i1_scanin),
231 .scan_out(i1_scanout),
232 .l2clk (l2clk), // Templated
233 .l1clk (l1clka), // Templated
234 .pce0 (arb_q0_holdbar_a), // Templated
235 .pce1 (arb_qsel1_a), // Templated
236 .pce_ov (pce_ov), // Templated
237 .stop (stop), // Templated
238 .siclk_in (siclk_in), // Templated
239 .soclk_in (soclk_in), // Templated
240 .grant_a (arb_grant_a), // Templated
241 .qsel0 (arb_qsel0_a), // Templated
242 .shift (arb_shift_a), // Templated
243 .data_a (src_data_a[19:10]),
244 .se(se)); // Templated
245
246cpx_mal_dp_ccx_new_macro__type_a i2 (
247 // Outputs
248 .data_x_l (data_out_x_[29:20]), // Templated
249 // Inputs
250 .scan_in(i2_scanin),
251 .scan_out(i2_scanout),
252 .l2clk (l2clk), // Templated
253 .l1clk (l1clka), // Templated
254 .pce0 (arb_q0_holdbar_a), // Templated
255 .pce1 (arb_qsel1_a), // Templated
256 .pce_ov (pce_ov), // Templated
257 .stop (stop), // Templated
258 .siclk_in (siclk_in), // Templated
259 .soclk_in (soclk_in), // Templated
260 .grant_a (arb_grant_a), // Templated
261 .qsel0 (arb_qsel0_a), // Templated
262 .shift (arb_shift_a), // Templated
263 .data_a (src_data_a[29:20]),
264 .se(se)); // Templated
265cpx_mal_dp_ccx_new_macro__type_a i3 (
266 // Outputs
267 .data_x_l (data_out_x_[39:30]), // Templated
268 // Inputs
269 .scan_in(i3_scanin),
270 .scan_out(i3_scanout),
271 .l2clk (l2clk), // Templated
272 .l1clk (l1clka), // Templated
273 .pce0 (arb_q0_holdbar_a), // Templated
274 .pce1 (arb_qsel1_a), // Templated
275 .pce_ov (pce_ov), // Templated
276 .stop (stop), // Templated
277 .siclk_in (siclk_in), // Templated
278 .soclk_in (soclk_in), // Templated
279 .grant_a (arb_grant_a), // Templated
280 .qsel0 (arb_qsel0_a), // Templated
281 .shift (arb_shift_a), // Templated
282 .data_a (src_data_a[39:30]),
283 .se(se)); // Templated
284cpx_mal_dp_ccx_new_macro__type_a i4 (
285 // Outputs
286 .data_x_l (data_out_x_[49:40]), // Templated
287 // Inputs
288 .scan_in(i4_scanin),
289 .scan_out(i4_scanout),
290 .l2clk (l2clk), // Templated
291 .l1clk (l1clka), // Templated
292 .pce0 (arb_q0_holdbar_a), // Templated
293 .pce1 (arb_qsel1_a), // Templated
294 .pce_ov (pce_ov), // Templated
295 .stop (stop), // Templated
296 .siclk_in (siclk_in), // Templated
297 .soclk_in (soclk_in), // Templated
298 .grant_a (arb_grant_a), // Templated
299 .qsel0 (arb_qsel0_a), // Templated
300 .shift (arb_shift_a), // Templated
301 .data_a (src_data_a[49:40]),
302 .se(se)); // Templated
303cpx_mal_dp_ccx_new_macro__type_a i5 (
304 // Outputs
305 .data_x_l (data_out_x_[59:50]), // Templated
306 // Inputs
307 .scan_in(i5_scanin),
308 .scan_out(i5_scanout),
309 .l2clk (l2clk), // Templated
310 .l1clk (l1clka), // Templated
311 .pce0 (arb_q0_holdbar_a), // Templated
312 .pce1 (arb_qsel1_a), // Templated
313 .pce_ov (pce_ov), // Templated
314 .stop (stop), // Templated
315 .siclk_in (siclk_in), // Templated
316 .soclk_in (soclk_in), // Templated
317 .grant_a (arb_grant_a), // Templated
318 .qsel0 (arb_qsel0_a), // Templated
319 .shift (arb_shift_a), // Templated
320 .data_a (src_data_a[59:50]),
321 .se(se)); // Templated
322cpx_mal_dp_ccx_new_macro__type_a i6 (
323 // Outputs
324 .data_x_l (data_out_x_[69:60]), // Templated
325 // Inputs
326 .scan_in(i6_scanin),
327 .scan_out(i6_scanout),
328 .l2clk (l2clk), // Templated
329 .l1clk (l1clka), // Templated
330 .pce0 (arb_q0_holdbar_a), // Templated
331 .pce1 (arb_qsel1_a), // Templated
332 .pce_ov (pce_ov), // Templated
333 .stop (stop), // Templated
334 .siclk_in (siclk_in), // Templated
335 .soclk_in (soclk_in), // Templated
336 .grant_a (arb_grant_a), // Templated
337 .qsel0 (arb_qsel0_a), // Templated
338 .shift (arb_shift_a), // Templated
339 .data_a (src_data_a[69:60]),
340 .se(se)); // Templated
341cpx_mal_dp_ccx_new_macro__type_a i7 (
342 // Outputs
343 .data_x_l (data_out_x_[79:70]), // Templated
344 // Inputs
345 .scan_in(i7_scanin),
346 .scan_out(i7_scanout),
347 .l2clk (l2clk), // Templated
348 .l1clk (l1clka), // Templated
349 .pce0 (arb_q0_holdbar_a), // Templated
350 .pce1 (arb_qsel1_a), // Templated
351 .pce_ov (pce_ov), // Templated
352 .stop (stop), // Templated
353 .siclk_in (siclk_in), // Templated
354 .soclk_in (soclk_in), // Templated
355 .grant_a (arb_grant_a), // Templated
356 .qsel0 (arb_qsel0_a), // Templated
357 .shift (arb_shift_a), // Templated
358 .data_a (src_data_a[79:70]),
359 .se(se)); // Templated
360cpx_mal_dp_ccx_new_macro__type_a i8 (
361 // Outputs
362 .data_x_l (data_out_x_[89:80]), // Templated
363 // Inputs
364 .scan_in(i8_scanin),
365 .scan_out(i8_scanout),
366 .l2clk (l2clk), // Templated
367 .l1clk (l1clkb), // Templated
368 .pce0 (arb_q0_holdbar_a), // Templated
369 .pce1 (arb_qsel1_a), // Templated
370 .pce_ov (pce_ov), // Templated
371 .stop (stop), // Templated
372 .siclk_in (siclk_in), // Templated
373 .soclk_in (soclk_in), // Templated
374 .grant_a (arb_grant_a), // Templated
375 .qsel0 (arb_qsel0_a), // Templated
376 .shift (arb_shift_a), // Templated
377 .data_a (src_data_a[89:80]),
378 .se(se)); // Templated
379cpx_mal_dp_ccx_new_macro__type_a i9 (
380 // Outputs
381 .data_x_l (data_out_x_[99:90]), // Templated
382 // Inputs
383 .scan_in(i9_scanin),
384 .scan_out(i9_scanout),
385 .l2clk (l2clk), // Templated
386 .l1clk (l1clkb), // Templated
387 .pce0 (arb_q0_holdbar_a), // Templated
388 .pce1 (arb_qsel1_a), // Templated
389 .pce_ov (pce_ov), // Templated
390 .stop (stop), // Templated
391 .siclk_in (siclk_in), // Templated
392 .soclk_in (soclk_in), // Templated
393 .grant_a (arb_grant_a), // Templated
394 .qsel0 (arb_qsel0_a), // Templated
395 .shift (arb_shift_a), // Templated
396 .data_a (src_data_a[99:90]),
397 .se(se)); // Templated
398cpx_mal_dp_ccx_new_macro__type_a i10 (
399 // Outputs
400 .data_x_l (data_out_x_[109:100]), // Templated
401 // Inputs
402 .scan_in(i10_scanin),
403 .scan_out(i10_scanout),
404 .l2clk (l2clk), // Templated
405 .l1clk (l1clkb), // Templated
406 .pce0 (arb_q0_holdbar_a), // Templated
407 .pce1 (arb_qsel1_a), // Templated
408 .pce_ov (pce_ov), // Templated
409 .stop (stop), // Templated
410 .siclk_in (siclk_in), // Templated
411 .soclk_in (soclk_in), // Templated
412 .grant_a (arb_grant_a), // Templated
413 .qsel0 (arb_qsel0_a), // Templated
414 .shift (arb_shift_a), // Templated
415 .data_a (src_data_a[109:100]),
416 .se(se)); // Templated
417cpx_mal_dp_ccx_new_macro__type_a i11 (
418 // Outputs
419 .data_x_l (data_out_x_[119:110]), // Templated
420 // Inputs
421 .scan_in(i11_scanin),
422 .scan_out(i11_scanout),
423 .l2clk (l2clk), // Templated
424 .l1clk (l1clkb), // Templated
425 .pce0 (arb_q0_holdbar_a), // Templated
426 .pce1 (arb_qsel1_a), // Templated
427 .pce_ov (pce_ov), // Templated
428 .stop (stop), // Templated
429 .siclk_in (siclk_in), // Templated
430 .soclk_in (soclk_in), // Templated
431 .grant_a (arb_grant_a), // Templated
432 .qsel0 (arb_qsel0_a), // Templated
433 .shift (arb_shift_a), // Templated
434 .data_a (src_data_a[119:110]),
435 .se(se)); // Templated
436cpx_mal_dp_ccx_new_macro__type_a i12 (
437 // Outputs
438 .data_x_l (data_out_x_[129:120]), // Templated
439 // Inputs
440 .scan_in(i12_scanin),
441 .scan_out(i12_scanout),
442 .l2clk (l2clk), // Templated
443 .l1clk (l1clkb), // Templated
444 .pce0 (arb_q0_holdbar_a), // Templated
445 .pce1 (arb_qsel1_a), // Templated
446 .pce_ov (pce_ov), // Templated
447 .stop (stop), // Templated
448 .siclk_in (siclk_in), // Templated
449 .soclk_in (soclk_in), // Templated
450 .grant_a (arb_grant_a), // Templated
451 .qsel0 (arb_qsel0_a), // Templated
452 .shift (arb_shift_a), // Templated
453 .data_a (src_data_a[129:120]),
454 .se(se)); // Templated
455cpx_mal_dp_ccx_new_macro__type_a i13 (
456 // Outputs
457 .data_x_l (data_out_x_[139:130]), // Templated
458 // Inputs
459 .scan_in(i13_scanin),
460 .scan_out(i13_scanout),
461 .l2clk (l2clk), // Templated
462 .l1clk (l1clkb), // Templated
463 .pce0 (arb_q0_holdbar_a), // Templated
464 .pce1 (arb_qsel1_a), // Templated
465 .pce_ov (pce_ov), // Templated
466 .stop (stop), // Templated
467 .siclk_in (siclk_in), // Templated
468 .soclk_in (soclk_in), // Templated
469 .grant_a (arb_grant_a), // Templated
470 .qsel0 (arb_qsel0_a), // Templated
471 .shift (arb_shift_a), // Templated
472 .data_a (src_data_a[139:130]),
473 .se(se)); // Templated
474cpx_mal_dp_ccx_new_macro__type_a i14 (
475 // Outputs
476 .data_x_l (data_out_x_[149:140]), // Templated
477 // Inputs
478 .scan_in(i14_scanin),
479 .scan_out(i14_scanout),
480 .l2clk (l2clk), // Templated
481 .l1clk (l1clkb), // Templated
482 .pce0 (arb_q0_holdbar_a), // Templated
483 .pce1 (arb_qsel1_a), // Templated
484 .pce_ov (pce_ov), // Templated
485 .stop (stop), // Templated
486 .siclk_in (siclk_in), // Templated
487 .soclk_in (soclk_in), // Templated
488 .grant_a (arb_grant_a), // Templated
489 .qsel0 (arb_qsel0_a), // Templated
490 .shift (arb_shift_a), // Templated
491 .data_a (src_data_a[149:140]),
492 .se(se)); // Templated
493
494// fixscan start:
495assign i14_scanin = scan_in ;
496assign i13_scanin = i14_scanout ;
497assign i12_scanin = i13_scanout ;
498assign i11_scanin = i12_scanout ;
499assign i10_scanin = i11_scanout ;
500assign i9_scanin = i10_scanout ;
501assign i8_scanin = i9_scanout ;
502assign i7_scanin = i8_scanout ;
503assign i6_scanin = i7_scanout ;
504assign i5_scanin = i6_scanout ;
505assign i4_scanin = i5_scanout ;
506assign i3_scanin = i4_scanout ;
507assign i2_scanin = i3_scanout ;
508assign i1_scanin = i2_scanout ;
509assign i0_scanin = i1_scanout ;
510assign scan_out = i0_scanout ;
511// fixscan end:
512endmodule
513
514//// scan renames
515//assign pce_ov = tcu_pce_ov;
516//assign stop = tcu_clk_stop;
517//assign siclk = tcu_aclk;
518//assign soclk = tcu_bclk;
519//// end scan
520//
521//// buffer the grant signal
522//
523//buff_macro i_buf_grant (width=1, stack=50c)
524//(
525// .din (arb_grant_a),
526// .dout (grant_a),
527// );
528//
529//msff_macro i_dff_grant_x (width=12, stack=50c)
530//(
531// .scan_in(i_dff_grant_x_scanin),
532// .scan_out(i_dff_grant_x_scanout),
533// .clk (l2clk),
534// .din ({12{grant_a}}),
535// .dout (grant_x[11:0]),
536// .en (1'b1),
537// );
538//
539//
540//// DATAPATH SECTION
541//
542//msff_macro i_dff_q1_2 (width=50, stack=50c)
543//(
544// .scan_in(i_dff_q1_2_scanin),
545// .scan_out(i_dff_q1_2_scanout),
546// .clk (l2clk),
547// .din (src_cpx_data_a[149:100]),
548// .dout (q1_dataout[149:100]),
549// .en (arb_qsel1_a),
550// );
551//
552//msff_macro i_dff_q1_1 (width=50, stack=50c)
553//(
554// .scan_in(i_dff_q1_1_scanin),
555// .scan_out(i_dff_q1_1_scanout),
556// .clk (l2clk),
557// .din (src_cpx_data_a[99:50]),
558// .dout (q1_dataout[99:50]),
559// .en (arb_qsel1_a),
560// );
561//
562//msff_macro i_dff_q1_0 (width=50, stack=50c)
563//(
564// .scan_in(i_dff_q1_0_scanin),
565// .scan_out(i_dff_q1_0_scanout),
566// .clk (l2clk),
567// .din (src_cpx_data_a[49:0]),
568// .dout (q1_dataout[49:0]),
569// .en (arb_qsel1_a),
570// );
571//
572////assign q0_datain_ca[149:0] =
573//// (arb_cpxdp_qsel0_ca ? src_cpx_data_ca[149:0] : 150'd0) |
574//// (arb_cpxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
575//
576//
577//mux_macro i_mux_q0_2 (width=50, mux=aonpe, ports=2, stack=50c)
578//(
579// .din0 (src_cpx_data_a[149:100]),
580// .din1 (q1_dataout[149:100]),
581// .sel0 (arb_qsel0_a),
582// .sel1 (arb_shift_a),
583// .dout (q0_datain_a[149:100]),
584// );
585//
586//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
587//(
588// .din0 (src_cpx_data_a[99:50]),
589// .din1 (q1_dataout[99:50]),
590// .sel0 (arb_qsel0_a),
591// .sel1 (arb_shift_a),
592// .dout (q0_datain_a[99:50]),
593// );
594//
595//mux_macro i_mux_q0_0 (width=50, mux=aonpe, ports=2, stack=50c)
596//(
597// .din0 (src_cpx_data_a[49:0]),
598// .din1 (q1_dataout[49:0]),
599// .sel0 (arb_qsel0_a),
600// .sel1 (arb_shift_a),
601// .dout (q0_datain_a[49:0]),
602// );
603//
604//msff_macro i_dff_q0_2 (width=50, stack=50c)
605//(
606// .scan_in(i_dff_q0_2_scanin),
607// .scan_out(i_dff_q0_2_scanout),
608// .clk (l2clk),
609// .din (q0_datain_a[149:100]),
610// .dout (q0_dataout[149:100]),
611// .en (arb_q0_holdbar_a),
612// );
613//
614//msff_macro i_dff_q0_1 (width=50, stack=50c)
615//(
616// .scan_in(i_dff_q0_1_scanin),
617// .scan_out(i_dff_q0_1_scanout),
618// .clk (l2clk),
619// .din (q0_datain_a[99:50]),
620// .dout (q0_dataout[99:50]),
621// .en (arb_q0_holdbar_a),
622// );
623//
624//msff_macro i_dff_q0_0 (width=50, stack=50c)
625//(
626// .scan_in(i_dff_q0_0_scanin),
627// .scan_out(i_dff_q0_0_scanout),
628// .clk (l2clk),
629// .din (q0_datain_a[49:0]),
630// .dout (q0_dataout[49:0]),
631// .en (arb_q0_holdbar_a),
632// );
633//
634//// MUX
635//nand_macro i_nand_data_g_2 (width=50, ports=2, stack=50c)
636//(
637// .din0 (q0_dataout[149:100]),
638// .din1 ({{10{grant_x[11]}},{15{grant_x[10]}},{15{grant_x[9]}},{10{grant_x[8]}}}),
639// .dout (data_out_x_[149:100]),
640// );
641//
642//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
643//(
644// .din0 (q0_dataout[99:50]),
645// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
646// .dout (data_out_x_[99:50]),
647// );
648//
649//nand_macro i_nand_data_g_0 (width=50, ports=2, stack=50c)
650//(
651// .din0 (q0_dataout[49:0]),
652// .din1 ({{10{grant_x[3]}},{15{grant_x[2]}},{15{grant_x[1]}},{10{grant_x[0]}}}),
653// .dout (data_out_x_[49:0]),
654// );
655//
656//// fixscan start:
657//assign i_dff_grant_x_scanin = scan_in ;
658//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
659//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
660//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
661//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
662//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
663//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
664//assign scan_out = i_dff_q0_0_scanout ;
665//// fixscan end:
666
667
668//
669// buff macro
670//
671//
672
673
674
675
676
677module cpx_mal_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
678 din,
679 dout);
680 input [3:0] din;
681 output [3:0] dout;
682
683
684
685
686
687
688buff #(4) d0_0 (
689.in(din[3:0]),
690.out(dout[3:0])
691);
692
693
694
695
696
697
698
699
700endmodule
701
702
703
704
705
706
707
708
709
710// any PARAMS parms go into naming of macro
711
712module cpx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
713 l2clk,
714 l1en,
715 pce_ov,
716 stop,
717 se,
718 l1clk);
719
720
721 input l2clk;
722 input l1en;
723 input pce_ov;
724 input stop;
725 input se;
726 output l1clk;
727
728
729
730
731
732cl_sc1_l1hdr_24x c_0 (
733
734
735 .l2clk(l2clk),
736 .pce(l1en),
737 .l1clk(l1clk),
738 .se(se),
739 .pce_ov(pce_ov),
740 .stop(stop)
741);
742
743
744
745
746
747
748endmodule
749
750
751
752
753
754
755
756
757
758//
759// ccx macro
760//
761//
762
763
764
765
766
767module cpx_mal_dp_ccx_new_macro__type_a (
768 l2clk,
769 l1clk,
770 pce0,
771 pce1,
772 pce_ov,
773 se,
774 stop,
775 siclk_in,
776 soclk_in,
777 scan_in,
778 grant_a,
779 qsel0,
780 shift,
781 data_a,
782 data_x_l,
783 scan_out);
784wire so5;
785wire siclk_out;
786wire soclk_out;
787wire l1clk0;
788wire l1clk1;
789wire grant_x;
790wire qsel0_buf;
791wire shift_buf;
792
793input l2clk;
794input l1clk;
795input pce0;
796input pce1;
797input pce_ov;
798input se;
799input stop;
800input siclk_in;
801input soclk_in;
802input scan_in;
803input grant_a;
804input qsel0;
805input shift;
806input [9:0] data_a;
807output [9:0] data_x_l;
808output scan_out;
809cl_dp1_ccxhdr c0 (
810.si(scan_in),
811.so(so5),
812 .l2clk(l2clk),
813 .pce0(pce0),
814 .pce1(pce1),
815 .pce_ov(pce_ov),
816 .stop(stop),
817 .siclk_in(siclk_in),
818 .soclk_in(soclk_in),
819 .siclk_out(siclk_out),
820 .soclk_out(soclk_out),
821 .l1clk0(l1clk0),
822 .l1clk1(l1clk1),
823 .se(se),
824 .l1clk(l1clk),
825 .grant_a(grant_a),
826 .grant_x(grant_x),
827 .qsel0(qsel0),
828 .qsel0_buf(qsel0_buf),
829 .shift(shift),
830 .shift_buf(shift_buf)
831);
832
833
834
835
836
837
838ccx_mac_a #(10) mac_a(
839.siclk(siclk_out),
840.soclk(soclk_out),
841.data_a(data_a[9:0]),
842.data_x_l(data_x_l[9:0]),
843.si(so5),
844.so(scan_out),
845 .l1clk0(l1clk0),
846 .l1clk1(l1clk1),
847 .grant_x(grant_x),
848 .qsel0_buf(qsel0_buf),
849 .shift_buf(shift_buf)
850);
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865endmodule
866
867`endif // `ifndef FPGA
868
869`ifdef FPGA
870
871`timescale 1 ns / 100 ps
872module cpx_mal_dp(data_out_x_, arb_grant_a, arb_qsel0_a, arb_qsel1_a,
873 arb_q0_holdbar_a, arb_shift_a, src_cpx_data_a, l2clk, scan_in,
874 tcu_pce_ov, ccx_aclk, ccx_bclk, tcu_scan_en, scan_out, ccx_aclk_out,
875 ccx_bclk_out, tcu_pce_ov_out, tcu_scan_en_out);
876
877 output [149:0] data_out_x_;
878 input arb_grant_a;
879 input arb_qsel0_a;
880 input arb_qsel1_a;
881 input arb_q0_holdbar_a;
882 input arb_shift_a;
883 input [149:0] src_cpx_data_a;
884 input l2clk;
885 input scan_in;
886 input tcu_pce_ov;
887 input ccx_aclk;
888 input ccx_bclk;
889 input tcu_scan_en;
890 output scan_out;
891 output ccx_aclk_out;
892 output ccx_bclk_out;
893 output tcu_pce_ov_out;
894 output tcu_scan_en_out;
895
896 wire pce_ov;
897 wire stop;
898 wire siclk_in;
899 wire soclk_in;
900 wire se;
901 wire [149:0] src_data_a;
902 wire l1clka;
903 wire l1clkb;
904 wire i0_scanin;
905 wire i0_scanout;
906 wire i1_scanin;
907 wire i1_scanout;
908 wire i2_scanin;
909 wire i2_scanout;
910 wire i3_scanin;
911 wire i3_scanout;
912 wire i4_scanin;
913 wire i4_scanout;
914 wire i5_scanin;
915 wire i5_scanout;
916 wire i6_scanin;
917 wire i6_scanout;
918 wire i7_scanin;
919 wire i7_scanout;
920 wire i8_scanin;
921 wire i8_scanout;
922 wire i9_scanin;
923 wire i9_scanout;
924 wire i10_scanin;
925 wire i10_scanout;
926 wire i11_scanin;
927 wire i11_scanout;
928 wire i12_scanin;
929 wire i12_scanout;
930 wire i13_scanin;
931 wire i13_scanout;
932 wire i14_scanin;
933 wire i14_scanout;
934
935 assign pce_ov = tcu_pce_ov_out;
936 assign stop = 1'b0;
937 assign siclk_in = ccx_aclk_out;
938 assign soclk_in = ccx_bclk_out;
939 assign se = tcu_scan_en_out;
940 assign src_data_a[149:0] = src_cpx_data_a[149:0];
941 assign i14_scanin = scan_in;
942 assign i13_scanin = i14_scanout;
943 assign i12_scanin = i13_scanout;
944 assign i11_scanin = i12_scanout;
945 assign i10_scanin = i11_scanout;
946 assign i9_scanin = i10_scanout;
947 assign i8_scanin = i9_scanout;
948 assign i7_scanin = i8_scanout;
949 assign i6_scanin = i7_scanout;
950 assign i5_scanin = i6_scanout;
951 assign i4_scanin = i5_scanout;
952 assign i3_scanin = i4_scanout;
953 assign i2_scanin = i3_scanout;
954 assign i1_scanin = i2_scanout;
955 assign i0_scanin = i1_scanout;
956 assign scan_out = i0_scanout;
957
958 buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn(
959 .din ({ccx_aclk, ccx_bclk,
960 tcu_pce_ov, tcu_scan_en}),
961 .dout ({ccx_aclk_out, ccx_bclk_out,
962 tcu_pce_ov_out, tcu_scan_en_out}));
963 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra(
964 .l2clk (l2clk),
965 .l1en (1'b1),
966 .l1clk (l1clka),
967 .pce_ov (pce_ov),
968 .stop (stop),
969 .se (se));
970 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb(
971 .l2clk (l2clk),
972 .l1en (1'b1),
973 .l1clk (l1clkb),
974 .pce_ov (pce_ov),
975 .stop (stop),
976 .se (se));
977 ccx_new_macro__type_a i0(
978 .data_x_l (data_out_x_[9:0]),
979 .scan_in (i0_scanin),
980 .scan_out (i0_scanout),
981 .l2clk (l2clk),
982 .l1clk (l1clka),
983 .pce0 (arb_q0_holdbar_a),
984 .pce1 (arb_qsel1_a),
985 .pce_ov (pce_ov),
986 .stop (stop),
987 .siclk_in (siclk_in),
988 .soclk_in (soclk_in),
989 .grant_a (arb_grant_a),
990 .qsel0 (arb_qsel0_a),
991 .shift (arb_shift_a),
992 .data_a (src_data_a[9:0]),
993 .se (se));
994 ccx_new_macro__type_a i1(
995 .data_x_l (data_out_x_[19:10]),
996 .scan_in (i1_scanin),
997 .scan_out (i1_scanout),
998 .l2clk (l2clk),
999 .l1clk (l1clka),
1000 .pce0 (arb_q0_holdbar_a),
1001 .pce1 (arb_qsel1_a),
1002 .pce_ov (pce_ov),
1003 .stop (stop),
1004 .siclk_in (siclk_in),
1005 .soclk_in (soclk_in),
1006 .grant_a (arb_grant_a),
1007 .qsel0 (arb_qsel0_a),
1008 .shift (arb_shift_a),
1009 .data_a (src_data_a[19:10]),
1010 .se (se));
1011 ccx_new_macro__type_a i2(
1012 .data_x_l (data_out_x_[29:20]),
1013 .scan_in (i2_scanin),
1014 .scan_out (i2_scanout),
1015 .l2clk (l2clk),
1016 .l1clk (l1clka),
1017 .pce0 (arb_q0_holdbar_a),
1018 .pce1 (arb_qsel1_a),
1019 .pce_ov (pce_ov),
1020 .stop (stop),
1021 .siclk_in (siclk_in),
1022 .soclk_in (soclk_in),
1023 .grant_a (arb_grant_a),
1024 .qsel0 (arb_qsel0_a),
1025 .shift (arb_shift_a),
1026 .data_a (src_data_a[29:20]),
1027 .se (se));
1028 ccx_new_macro__type_a i3(
1029 .data_x_l (data_out_x_[39:30]),
1030 .scan_in (i3_scanin),
1031 .scan_out (i3_scanout),
1032 .l2clk (l2clk),
1033 .l1clk (l1clka),
1034 .pce0 (arb_q0_holdbar_a),
1035 .pce1 (arb_qsel1_a),
1036 .pce_ov (pce_ov),
1037 .stop (stop),
1038 .siclk_in (siclk_in),
1039 .soclk_in (soclk_in),
1040 .grant_a (arb_grant_a),
1041 .qsel0 (arb_qsel0_a),
1042 .shift (arb_shift_a),
1043 .data_a (src_data_a[39:30]),
1044 .se (se));
1045 ccx_new_macro__type_a i4(
1046 .data_x_l (data_out_x_[49:40]),
1047 .scan_in (i4_scanin),
1048 .scan_out (i4_scanout),
1049 .l2clk (l2clk),
1050 .l1clk (l1clka),
1051 .pce0 (arb_q0_holdbar_a),
1052 .pce1 (arb_qsel1_a),
1053 .pce_ov (pce_ov),
1054 .stop (stop),
1055 .siclk_in (siclk_in),
1056 .soclk_in (soclk_in),
1057 .grant_a (arb_grant_a),
1058 .qsel0 (arb_qsel0_a),
1059 .shift (arb_shift_a),
1060 .data_a (src_data_a[49:40]),
1061 .se (se));
1062 ccx_new_macro__type_a i5(
1063 .data_x_l (data_out_x_[59:50]),
1064 .scan_in (i5_scanin),
1065 .scan_out (i5_scanout),
1066 .l2clk (l2clk),
1067 .l1clk (l1clka),
1068 .pce0 (arb_q0_holdbar_a),
1069 .pce1 (arb_qsel1_a),
1070 .pce_ov (pce_ov),
1071 .stop (stop),
1072 .siclk_in (siclk_in),
1073 .soclk_in (soclk_in),
1074 .grant_a (arb_grant_a),
1075 .qsel0 (arb_qsel0_a),
1076 .shift (arb_shift_a),
1077 .data_a (src_data_a[59:50]),
1078 .se (se));
1079 ccx_new_macro__type_a i6(
1080 .data_x_l (data_out_x_[69:60]),
1081 .scan_in (i6_scanin),
1082 .scan_out (i6_scanout),
1083 .l2clk (l2clk),
1084 .l1clk (l1clka),
1085 .pce0 (arb_q0_holdbar_a),
1086 .pce1 (arb_qsel1_a),
1087 .pce_ov (pce_ov),
1088 .stop (stop),
1089 .siclk_in (siclk_in),
1090 .soclk_in (soclk_in),
1091 .grant_a (arb_grant_a),
1092 .qsel0 (arb_qsel0_a),
1093 .shift (arb_shift_a),
1094 .data_a (src_data_a[69:60]),
1095 .se (se));
1096 ccx_new_macro__type_a i7(
1097 .data_x_l (data_out_x_[79:70]),
1098 .scan_in (i7_scanin),
1099 .scan_out (i7_scanout),
1100 .l2clk (l2clk),
1101 .l1clk (l1clka),
1102 .pce0 (arb_q0_holdbar_a),
1103 .pce1 (arb_qsel1_a),
1104 .pce_ov (pce_ov),
1105 .stop (stop),
1106 .siclk_in (siclk_in),
1107 .soclk_in (soclk_in),
1108 .grant_a (arb_grant_a),
1109 .qsel0 (arb_qsel0_a),
1110 .shift (arb_shift_a),
1111 .data_a (src_data_a[79:70]),
1112 .se (se));
1113 ccx_new_macro__type_a i8(
1114 .data_x_l (data_out_x_[89:80]),
1115 .scan_in (i8_scanin),
1116 .scan_out (i8_scanout),
1117 .l2clk (l2clk),
1118 .l1clk (l1clkb),
1119 .pce0 (arb_q0_holdbar_a),
1120 .pce1 (arb_qsel1_a),
1121 .pce_ov (pce_ov),
1122 .stop (stop),
1123 .siclk_in (siclk_in),
1124 .soclk_in (soclk_in),
1125 .grant_a (arb_grant_a),
1126 .qsel0 (arb_qsel0_a),
1127 .shift (arb_shift_a),
1128 .data_a (src_data_a[89:80]),
1129 .se (se));
1130 ccx_new_macro__type_a i9(
1131 .data_x_l (data_out_x_[99:90]),
1132 .scan_in (i9_scanin),
1133 .scan_out (i9_scanout),
1134 .l2clk (l2clk),
1135 .l1clk (l1clkb),
1136 .pce0 (arb_q0_holdbar_a),
1137 .pce1 (arb_qsel1_a),
1138 .pce_ov (pce_ov),
1139 .stop (stop),
1140 .siclk_in (siclk_in),
1141 .soclk_in (soclk_in),
1142 .grant_a (arb_grant_a),
1143 .qsel0 (arb_qsel0_a),
1144 .shift (arb_shift_a),
1145 .data_a (src_data_a[99:90]),
1146 .se (se));
1147 ccx_new_macro__type_a i10(
1148 .data_x_l (data_out_x_[109:100]),
1149 .scan_in (i10_scanin),
1150 .scan_out (i10_scanout),
1151 .l2clk (l2clk),
1152 .l1clk (l1clkb),
1153 .pce0 (arb_q0_holdbar_a),
1154 .pce1 (arb_qsel1_a),
1155 .pce_ov (pce_ov),
1156 .stop (stop),
1157 .siclk_in (siclk_in),
1158 .soclk_in (soclk_in),
1159 .grant_a (arb_grant_a),
1160 .qsel0 (arb_qsel0_a),
1161 .shift (arb_shift_a),
1162 .data_a (src_data_a[109:100]),
1163 .se (se));
1164 ccx_new_macro__type_a i11(
1165 .data_x_l (data_out_x_[119:110]),
1166 .scan_in (i11_scanin),
1167 .scan_out (i11_scanout),
1168 .l2clk (l2clk),
1169 .l1clk (l1clkb),
1170 .pce0 (arb_q0_holdbar_a),
1171 .pce1 (arb_qsel1_a),
1172 .pce_ov (pce_ov),
1173 .stop (stop),
1174 .siclk_in (siclk_in),
1175 .soclk_in (soclk_in),
1176 .grant_a (arb_grant_a),
1177 .qsel0 (arb_qsel0_a),
1178 .shift (arb_shift_a),
1179 .data_a (src_data_a[119:110]),
1180 .se (se));
1181 ccx_new_macro__type_a i12(
1182 .data_x_l (data_out_x_[129:120]),
1183 .scan_in (i12_scanin),
1184 .scan_out (i12_scanout),
1185 .l2clk (l2clk),
1186 .l1clk (l1clkb),
1187 .pce0 (arb_q0_holdbar_a),
1188 .pce1 (arb_qsel1_a),
1189 .pce_ov (pce_ov),
1190 .stop (stop),
1191 .siclk_in (siclk_in),
1192 .soclk_in (soclk_in),
1193 .grant_a (arb_grant_a),
1194 .qsel0 (arb_qsel0_a),
1195 .shift (arb_shift_a),
1196 .data_a (src_data_a[129:120]),
1197 .se (se));
1198 ccx_new_macro__type_a i13(
1199 .data_x_l (data_out_x_[139:130]),
1200 .scan_in (i13_scanin),
1201 .scan_out (i13_scanout),
1202 .l2clk (l2clk),
1203 .l1clk (l1clkb),
1204 .pce0 (arb_q0_holdbar_a),
1205 .pce1 (arb_qsel1_a),
1206 .pce_ov (pce_ov),
1207 .stop (stop),
1208 .siclk_in (siclk_in),
1209 .soclk_in (soclk_in),
1210 .grant_a (arb_grant_a),
1211 .qsel0 (arb_qsel0_a),
1212 .shift (arb_shift_a),
1213 .data_a (src_data_a[139:130]),
1214 .se (se));
1215 ccx_new_macro__type_a i14(
1216 .data_x_l (data_out_x_[149:140]),
1217 .scan_in (i14_scanin),
1218 .scan_out (i14_scanout),
1219 .l2clk (l2clk),
1220 .l1clk (l1clkb),
1221 .pce0 (arb_q0_holdbar_a),
1222 .pce1 (arb_qsel1_a),
1223 .pce_ov (pce_ov),
1224 .stop (stop),
1225 .siclk_in (siclk_in),
1226 .soclk_in (soclk_in),
1227 .grant_a (arb_grant_a),
1228 .qsel0 (arb_qsel0_a),
1229 .shift (arb_shift_a),
1230 .data_a (src_data_a[149:140]),
1231 .se (se));
1232endmodule
1233
1234module buff_macro__dbuff_8x__stack_none__vertical_1__width_4(din, dout);
1235
1236 input [3:0] din;
1237 output [3:0] dout;
1238
1239 buff #(4) d0_0(
1240 .in (din[3:0]),
1241 .out (dout[3:0]));
1242endmodule
1243
1244
1245`endif // `ifdef FPGA
1246