projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: pcx_dpsa.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | `ifndef FPGA | |
| 36 | module pcx_dpsa ( | |
| 37 | pcx_scache_data_x_, | |
| 38 | arb_grant_l_a, | |
| 39 | arb_q0_holdbar_l_a, | |
| 40 | arb_qsel0_l_a, | |
| 41 | arb_qsel1_l_a, | |
| 42 | arb_shift_l_a, | |
| 43 | arb_grant_r_a, | |
| 44 | arb_q0_holdbar_r_a, | |
| 45 | arb_qsel0_r_a, | |
| 46 | arb_qsel1_r_a, | |
| 47 | arb_shift_r_a, | |
| 48 | spc0_pcx_data_a, | |
| 49 | spc1_pcx_data_a, | |
| 50 | spc2_pcx_data_a, | |
| 51 | spc3_pcx_data_a, | |
| 52 | spc4_pcx_data_a, | |
| 53 | spc5_pcx_data_a, | |
| 54 | spc6_pcx_data_a, | |
| 55 | spc7_pcx_data_a, | |
| 56 | tcu_scan_en, | |
| 57 | l2clk, | |
| 58 | tcu_pce_ov, | |
| 59 | ccx_aclk, | |
| 60 | ccx_bclk, | |
| 61 | scan_in, | |
| 62 | scan_out); | |
| 63 | wire [129:0] all_ones; | |
| 64 | wire [4:0] mac0_rep_in; | |
| 65 | wire [3:0] arb_grant_l_a_rep; | |
| 66 | wire [3:0] arb_qsel0_l_a_rep; | |
| 67 | wire [3:0] arb_qsel1_l_a_rep; | |
| 68 | wire [3:0] arb_shift_l_a_rep; | |
| 69 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
| 70 | wire [4:0] mac0_rep_out; | |
| 71 | wire [4:0] mac1_rep_in; | |
| 72 | wire [4:0] mac1_rep_out; | |
| 73 | wire [4:0] mac2_rep_in; | |
| 74 | wire [4:0] mac2_rep_out; | |
| 75 | wire [4:0] mac3_rep_in; | |
| 76 | wire [4:0] mac3_rep_out; | |
| 77 | wire [4:0] mac4_rep_in; | |
| 78 | wire [7:4] arb_grant_r_a_rep; | |
| 79 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
| 80 | wire [7:4] arb_qsel0_r_a_rep; | |
| 81 | wire [7:4] arb_qsel1_r_a_rep; | |
| 82 | wire [7:4] arb_shift_r_a_rep; | |
| 83 | wire [4:0] mac4_rep_out; | |
| 84 | wire [4:0] mac5_rep_in; | |
| 85 | wire [4:0] mac5_rep_out; | |
| 86 | wire [4:0] mac6_rep_in; | |
| 87 | wire [4:0] mac6_rep_out; | |
| 88 | wire scan_rep_in; | |
| 89 | wire tcu_scan_en_out_0_unused; | |
| 90 | wire tcu_pce_ov_out_0_unused; | |
| 91 | wire ccx_aclk_out_0_unused; | |
| 92 | wire ccx_bclk_out_0_unused; | |
| 93 | wire [129:0] col1_data_x_; | |
| 94 | wire pcx_mac0_scanin; | |
| 95 | wire pcx_mac0_scanout; | |
| 96 | wire [6:1] tcu_scan_en_out; | |
| 97 | wire [6:1] tcu_pce_ov_out; | |
| 98 | wire [6:1] ccx_aclk_out; | |
| 99 | wire [6:1] ccx_bclk_out; | |
| 100 | wire [129:0] col2_data_x_; | |
| 101 | wire pcx_mac1_scanin; | |
| 102 | wire pcx_mac1_scanout; | |
| 103 | wire [129:0] col3_data_x_; | |
| 104 | wire pcx_mac2_scanin; | |
| 105 | wire pcx_mac2_scanout; | |
| 106 | wire [129:0] col4_data_x_; | |
| 107 | wire pcx_mac3_scanin; | |
| 108 | wire pcx_mac3_scanout; | |
| 109 | wire [129:0] col5_data_x_; | |
| 110 | wire pcx_mac4_scanin; | |
| 111 | wire pcx_mac4_scanout; | |
| 112 | wire [129:0] col6_data_x_; | |
| 113 | wire pcx_mac5_scanin; | |
| 114 | wire pcx_mac5_scanout; | |
| 115 | wire [129:0] col7_data_x_; | |
| 116 | wire pcx_mac6_scanin; | |
| 117 | wire pcx_mac6_scanout; | |
| 118 | wire tcu_scan_en_out_7_unused; | |
| 119 | wire tcu_pce_ov_out_7_unused; | |
| 120 | wire ccx_aclk_out_7_unused; | |
| 121 | wire ccx_bclk_out_7_unused; | |
| 122 | wire pcx_mac7_scanin; | |
| 123 | wire pcx_mac7_scanout; | |
| 124 | wire [7:4] arb_grant_l_a_unused; | |
| 125 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
| 126 | wire [7:4] arb_qsel0_l_a_unused; | |
| 127 | wire [7:4] arb_qsel1_l_a_unused; | |
| 128 | wire [7:4] arb_shift_l_a_unused; | |
| 129 | wire [3:0] arb_grant_r_a_unused; | |
| 130 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
| 131 | wire [3:0] arb_qsel0_r_a_unused; | |
| 132 | wire [3:0] arb_qsel1_r_a_unused; | |
| 133 | wire [3:0] arb_shift_r_a_unused; | |
| 134 | wire scan_rep_out; | |
| 135 | ||
| 136 | ||
| 137 | // Beginning of automatic outputs (from unused autoinst outputs) | |
| 138 | output [129:0] pcx_scache_data_x_; // From mac3 of pcx_mcr_dp.v | |
| 139 | // End of automatics | |
| 140 | ||
| 141 | // Beginning of automatic inputs (from unused autoinst inputs) | |
| 142 | input [7:0] arb_grant_l_a; // To mac0 of pcx_mar_dp.v, ... | |
| 143 | input [7:0] arb_q0_holdbar_l_a; // To mac0 of pcx_mar_dp.v, ... | |
| 144 | input [7:0] arb_qsel0_l_a; // To mac0 of pcx_mar_dp.v, ... | |
| 145 | input [7:0] arb_qsel1_l_a; // To mac0 of pcx_mar_dp.v, ... | |
| 146 | input [7:0] arb_shift_l_a; // To mac0 of pcx_mar_dp.v, ... | |
| 147 | input [7:0] arb_grant_r_a; // To mac0 of pcx_mar_dp.v, ... | |
| 148 | input [7:0] arb_q0_holdbar_r_a; // To mac0 of pcx_mar_dp.v, ... | |
| 149 | input [7:0] arb_qsel0_r_a; // To mac0 of pcx_mar_dp.v, ... | |
| 150 | input [7:0] arb_qsel1_r_a; // To mac0 of pcx_mar_dp.v, ... | |
| 151 | input [7:0] arb_shift_r_a; // To mac0 of pcx_mar_dp.v, ... | |
| 152 | input [129:0] spc0_pcx_data_a; // To mac0 of pcx_mar_dp.v | |
| 153 | input [129:0] spc1_pcx_data_a; // To mac1 of pcx_mbr_dp.v | |
| 154 | input [129:0] spc2_pcx_data_a; // To mac2 of pcx_mbr_dp.v | |
| 155 | input [129:0] spc3_pcx_data_a; // To mac3 of pcx_mcr_dp.v | |
| 156 | input [129:0] spc4_pcx_data_a; // To mac4 of pcx_mbl_dp.v | |
| 157 | input [129:0] spc5_pcx_data_a; // To mac5 of pcx_mbl_dp.v | |
| 158 | input [129:0] spc6_pcx_data_a; // To mac6 of pcx_mbl_dp.v | |
| 159 | input [129:0] spc7_pcx_data_a; // To mac7 of pcx_mal_dp.v | |
| 160 | // End of automatics | |
| 161 | // globals | |
| 162 | input tcu_scan_en ; | |
| 163 | input l2clk; | |
| 164 | input tcu_pce_ov; // scan signals | |
| 165 | input ccx_aclk; | |
| 166 | input ccx_bclk; | |
| 167 | input scan_in; | |
| 168 | output scan_out; | |
| 169 | ||
| 170 | ||
| 171 | // sparc0 sparc2 sparc1 sparc3 sparc5 sparc7 sparc4 sparc6 | |
| 172 | // | | | | | | | | | |
| 173 | // v v v v v v v v | |
| 174 | // mac0 -> mac1 ->mac2 ->mac3 <- mac4 <- mac5 <- mac6 <- mac7 | |
| 175 | // cl br br br br br br ar | |
| 176 | // | | |
| 177 | // ---buf-- | |
| 178 | // | | |
| 179 | // v | |
| 180 | // to sctag | |
| 181 | ||
| 182 | assign all_ones[129:0] = 130'h3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF; | |
| 183 | ||
| 184 | ||
| 185 | // mac0 arb inputs go through 1 buffer | |
| 186 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0],arb_qsel0_l_a[0],arb_qsel1_l_a[0], | |
| 187 | arb_shift_l_a[0],arb_q0_holdbar_l_a[0]}; | |
| 188 | ||
| 189 | assign {arb_grant_l_a_rep[0],arb_qsel0_l_a_rep[0],arb_qsel1_l_a_rep[0], | |
| 190 | arb_shift_l_a_rep[0],arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
| 191 | ||
| 192 | // mac1 arb input go through 1 buffer | |
| 193 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2],arb_q0_holdbar_l_a[2],arb_qsel0_l_a[2], | |
| 194 | arb_qsel1_l_a[2],arb_shift_l_a[2]}; | |
| 195 | ||
| 196 | assign {arb_grant_l_a_rep[2],arb_q0_holdbar_l_a_rep[2],arb_qsel0_l_a_rep[2], | |
| 197 | arb_qsel1_l_a_rep[2],arb_shift_l_a_rep[2]} = mac1_rep_out[4:0]; | |
| 198 | ||
| 199 | // mac2 arb inputs go through 2 buffers | |
| 200 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1], | |
| 201 | arb_qsel1_l_a[1],arb_shift_l_a[1]}; | |
| 202 | ||
| 203 | assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1], | |
| 204 | arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac2_rep_out[4:0]; | |
| 205 | ||
| 206 | // mac3 inputs go through 2 buffers | |
| 207 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3], | |
| 208 | arb_qsel1_l_a[3],arb_shift_l_a[3]}; | |
| 209 | ||
| 210 | assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3], | |
| 211 | arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac3_rep_out[4:0]; | |
| 212 | ||
| 213 | // mac4 inputs go through 2 buffers | |
| 214 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5], | |
| 215 | arb_qsel1_r_a[5],arb_shift_r_a[5]}; | |
| 216 | ||
| 217 | assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5], | |
| 218 | arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac4_rep_out[4:0]; | |
| 219 | ||
| 220 | // mac5 inputs go through 1 buffer | |
| 221 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7], | |
| 222 | arb_qsel1_r_a[7],arb_shift_r_a[7]}; | |
| 223 | ||
| 224 | assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7], | |
| 225 | arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac5_rep_out[4:0]; | |
| 226 | ||
| 227 | // mac6 inputs go through 1 buffer | |
| 228 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4],arb_q0_holdbar_r_a[4],arb_qsel0_r_a[4], | |
| 229 | arb_qsel1_r_a[4],arb_shift_r_a[4]}; | |
| 230 | ||
| 231 | assign {arb_grant_r_a_rep[4],arb_q0_holdbar_r_a_rep[4],arb_qsel0_r_a_rep[4], | |
| 232 | arb_qsel1_r_a_rep[4],arb_shift_r_a_rep[4]} = mac6_rep_out[4:0]; | |
| 233 | ||
| 234 | assign scan_rep_in = scan_in; | |
| 235 | ||
| 236 | ||
| 237 | pcx_rep_dp pcx_rep(.mac0_rep_out(mac0_rep_out[4:0]), | |
| 238 | .mac1_rep_out(mac1_rep_out[4:0]), | |
| 239 | .mac2_rep_out(mac2_rep_out[4:0]), | |
| 240 | .mac3_rep_out(mac3_rep_out[4:0]), | |
| 241 | .mac4_rep_out(mac4_rep_out[4:0]), | |
| 242 | .mac5_rep_out(mac5_rep_out[4:0]), | |
| 243 | .mac6_rep_out(mac6_rep_out[4:0]), | |
| 244 | .scan_rep_out(scan_rep_out), | |
| 245 | .mac0_rep_in(mac0_rep_in[4:0]), | |
| 246 | .mac1_rep_in(mac1_rep_in[4:0]), | |
| 247 | .mac2_rep_in(mac2_rep_in[4:0]), | |
| 248 | .mac3_rep_in(mac3_rep_in[4:0]), | |
| 249 | .mac4_rep_in(mac4_rep_in[4:0]), | |
| 250 | .mac5_rep_in(mac5_rep_in[4:0]), | |
| 251 | .mac6_rep_in(mac6_rep_in[4:0]), | |
| 252 | .scan_rep_in(scan_rep_in) | |
| 253 | ); | |
| 254 | ||
| 255 | ||
| 256 | // input from spc0 | |
| 257 | pcx_mcl_dp pcx_mac0( | |
| 258 | // Outputs | |
| 259 | .data_out_x_ (pcx_scache_data_x_[129:0]), // Templated | |
| 260 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
| 261 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
| 262 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
| 263 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
| 264 | // Inputs | |
| 265 | .arb_grant_a (arb_grant_l_a_rep[0]), // Templated | |
| 266 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated | |
| 267 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated | |
| 268 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated | |
| 269 | .arb_shift_a (arb_shift_l_a_rep[0]), // Templated | |
| 270 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), // Templated | |
| 271 | .data_crit_x_ (col1_data_x_[129:0]), // Templated | |
| 272 | .data_ncrit_x_ (all_ones[129:0]), // Templated | |
| 273 | .scan_in(pcx_mac0_scanin), | |
| 274 | .scan_out(pcx_mac0_scanout), | |
| 275 | .l2clk (l2clk), | |
| 276 | .tcu_scan_en (tcu_scan_en_out[1]), | |
| 277 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
| 278 | .ccx_aclk (ccx_aclk_out[1]), | |
| 279 | .ccx_bclk (ccx_bclk_out[1]) | |
| 280 | ); | |
| 281 | ||
| 282 | ||
| 283 | /* | |
| 284 | pcx_mbr_dp AUTO_TEMPLATE | |
| 285 | ( | |
| 286 | // Outputs | |
| 287 | .data_out_x_ (col@_data_x_[129:0]), | |
| 288 | // Inputs | |
| 289 | .arb_grant_a(arb_grant_r_a[@]), | |
| 290 | .arb_qsel0_a(arb_qsel0_r_a[@]), | |
| 291 | .arb_qsel1_a(arb_qsel1_r_a[@]), | |
| 292 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), | |
| 293 | .arb_shift_a(arb_shift_r_a[@]), | |
| 294 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
| 295 | .data_prev_x_(col@"(+ @ 1)"_data_x_[129:0]), | |
| 296 | .l2clk (l2clk)) | |
| 297 | */ | |
| 298 | ||
| 299 | // do not use autoinstancing. | |
| 300 | // connections have been modified to match the cpu floorplan | |
| 301 | // src_pcx_data_a has to be manually connected. | |
| 302 | ||
| 303 | ||
| 304 | // input from spc2 | |
| 305 | pcx_mbr_dp pcx_mac1( | |
| 306 | // Outputs | |
| 307 | .data_out_x_ (col1_data_x_[129:0]), // Templated | |
| 308 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
| 309 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
| 310 | .ccx_aclk_out (ccx_aclk_out[1]), | |
| 311 | .ccx_bclk_out (ccx_bclk_out[1]), | |
| 312 | // Inputs | |
| 313 | .arb_grant_a (arb_grant_l_a_rep[2]), // Templated | |
| 314 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), // Templated | |
| 315 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), // Templated | |
| 316 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), // Templated | |
| 317 | .arb_shift_a (arb_shift_l_a_rep[2]), // Templated | |
| 318 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), // Templated | |
| 319 | .data_prev_x_ (col2_data_x_[129:0]), // Templated | |
| 320 | .scan_in(pcx_mac1_scanin), | |
| 321 | .scan_out(pcx_mac1_scanout), | |
| 322 | .l2clk (l2clk), | |
| 323 | .tcu_scan_en (tcu_scan_en_out[2]), | |
| 324 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
| 325 | .ccx_aclk (ccx_aclk_out[2]), | |
| 326 | .ccx_bclk (ccx_bclk_out[2]) | |
| 327 | ); | |
| 328 | ||
| 329 | ||
| 330 | ||
| 331 | // input from spc1 | |
| 332 | pcx_mbr_dp pcx_mac2( | |
| 333 | // Outputs | |
| 334 | .data_out_x_ (col2_data_x_[129:0]), // Templated | |
| 335 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
| 336 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
| 337 | .ccx_aclk_out (ccx_aclk_out[2]), | |
| 338 | .ccx_bclk_out (ccx_bclk_out[2]), | |
| 339 | // Inputs | |
| 340 | .arb_grant_a (arb_grant_l_a_rep[1]), // Templated | |
| 341 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated | |
| 342 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated | |
| 343 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated | |
| 344 | .arb_shift_a (arb_shift_l_a_rep[1]), // Templated | |
| 345 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), // Templated | |
| 346 | .data_prev_x_ (col3_data_x_[129:0]), // Templated | |
| 347 | .scan_in(pcx_mac2_scanin), | |
| 348 | .scan_out(pcx_mac2_scanout), | |
| 349 | .l2clk (l2clk), | |
| 350 | .tcu_scan_en (tcu_scan_en_out[3]), | |
| 351 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
| 352 | .ccx_aclk (ccx_aclk_out[3]), | |
| 353 | .ccx_bclk (ccx_bclk_out[3]) | |
| 354 | ); | |
| 355 | ||
| 356 | // input from spc3 | |
| 357 | pcx_mbr_dp pcx_mac3( | |
| 358 | // Outputs | |
| 359 | .data_out_x_ (col3_data_x_[129:0]), // Templated | |
| 360 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
| 361 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
| 362 | .ccx_aclk_out (ccx_aclk_out[3]), | |
| 363 | .ccx_bclk_out (ccx_bclk_out[3]), | |
| 364 | // Inputs | |
| 365 | .arb_grant_a (arb_grant_l_a_rep[3]), // Templated | |
| 366 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated | |
| 367 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated | |
| 368 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated | |
| 369 | .arb_shift_a (arb_shift_l_a_rep[3]), // Templated | |
| 370 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), // Templated | |
| 371 | .data_prev_x_ (col4_data_x_[129:0]), // Templated | |
| 372 | .scan_in(pcx_mac3_scanin), | |
| 373 | .scan_out(pcx_mac3_scanout), | |
| 374 | .l2clk (l2clk), | |
| 375 | .tcu_scan_en (tcu_scan_en), | |
| 376 | .tcu_pce_ov (tcu_pce_ov), | |
| 377 | .ccx_aclk (ccx_aclk), | |
| 378 | .ccx_bclk (ccx_bclk) | |
| 379 | ); | |
| 380 | ||
| 381 | ||
| 382 | // input from spc5 | |
| 383 | pcx_mbr_dp pcx_mac4( | |
| 384 | // Outputs | |
| 385 | .data_out_x_ (col4_data_x_[129:0]), // Templated | |
| 386 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
| 387 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
| 388 | .ccx_aclk_out (ccx_aclk_out[4]), | |
| 389 | .ccx_bclk_out (ccx_bclk_out[4]), | |
| 390 | // Inputs | |
| 391 | .arb_grant_a (arb_grant_r_a_rep[5]), // Templated | |
| 392 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated | |
| 393 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated | |
| 394 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated | |
| 395 | .arb_shift_a (arb_shift_r_a_rep[5]), // Templated | |
| 396 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), // Templated | |
| 397 | .data_prev_x_ (col5_data_x_[129:0]), // Templated | |
| 398 | .scan_in(pcx_mac4_scanin), | |
| 399 | .scan_out(pcx_mac4_scanout), | |
| 400 | .l2clk (l2clk), | |
| 401 | .tcu_scan_en (tcu_scan_en_out[3]), | |
| 402 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
| 403 | .ccx_aclk (ccx_aclk_out[3]), | |
| 404 | .ccx_bclk (ccx_bclk_out[3]) | |
| 405 | ); | |
| 406 | ||
| 407 | // input from spc7 | |
| 408 | pcx_mbr_dp pcx_mac5( | |
| 409 | // Outputs | |
| 410 | .data_out_x_ (col5_data_x_[129:0]), // Templated | |
| 411 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
| 412 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
| 413 | .ccx_aclk_out (ccx_aclk_out[5]), | |
| 414 | .ccx_bclk_out (ccx_bclk_out[5]), | |
| 415 | // Inputs | |
| 416 | .arb_grant_a (arb_grant_r_a_rep[7]), // Templated | |
| 417 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated | |
| 418 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated | |
| 419 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated | |
| 420 | .arb_shift_a (arb_shift_r_a_rep[7]), // Templated | |
| 421 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), // Templated | |
| 422 | .data_prev_x_ (col6_data_x_[129:0]), // Templated | |
| 423 | .scan_in(pcx_mac5_scanin), | |
| 424 | .scan_out(pcx_mac5_scanout), | |
| 425 | .l2clk (l2clk), | |
| 426 | .tcu_scan_en (tcu_scan_en_out[4]), | |
| 427 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
| 428 | .ccx_aclk (ccx_aclk_out[4]), | |
| 429 | .ccx_bclk (ccx_bclk_out[4]) | |
| 430 | ); | |
| 431 | ||
| 432 | ||
| 433 | // input from spc4 | |
| 434 | pcx_mbr_dp pcx_mac6( | |
| 435 | // Outputs | |
| 436 | .data_out_x_ (col6_data_x_[129:0]), // Templated | |
| 437 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
| 438 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
| 439 | .ccx_aclk_out (ccx_aclk_out[6]), | |
| 440 | .ccx_bclk_out (ccx_bclk_out[6]), | |
| 441 | // Inputs | |
| 442 | .arb_grant_a (arb_grant_r_a_rep[4]), // Templated | |
| 443 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), // Templated | |
| 444 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), // Templated | |
| 445 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), // Templated | |
| 446 | .arb_shift_a (arb_shift_r_a_rep[4]), // Templated | |
| 447 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), // Templated | |
| 448 | .data_prev_x_ (col7_data_x_[129:0]), // Templated | |
| 449 | .scan_in(pcx_mac6_scanin), | |
| 450 | .scan_out(pcx_mac6_scanout), | |
| 451 | .l2clk (l2clk), | |
| 452 | .tcu_scan_en (tcu_scan_en_out[5]), | |
| 453 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
| 454 | .ccx_aclk (ccx_aclk_out[5]), | |
| 455 | .ccx_bclk (ccx_bclk_out[5]) | |
| 456 | ); | |
| 457 | ||
| 458 | ||
| 459 | /* | |
| 460 | pcx_mar_dp AUTO_TEMPLATE | |
| 461 | ( | |
| 462 | // Outputs | |
| 463 | .data_out_x_ (col@_data_x_[129:0]), | |
| 464 | // Inputs | |
| 465 | .arb_grant_a(arb_grant_r_a[@]), | |
| 466 | .arb_qsel0_a(arb_qsel0_r_a[@]), | |
| 467 | .arb_qsel1_a(arb_qsel1_r_a[@]), | |
| 468 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), | |
| 469 | .arb_shift_a(arb_shift_r_a[@]), | |
| 470 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
| 471 | .l2clk (l2clk)); | |
| 472 | */ | |
| 473 | ||
| 474 | // do not use autoinstancing. | |
| 475 | // connections have been modified to match the cpu floorplan | |
| 476 | // src_pcx_data_a has to be manually connected. | |
| 477 | ||
| 478 | // input from spc6 | |
| 479 | pcx_mar_dp pcx_mac7 ( | |
| 480 | // Outputs | |
| 481 | .data_out_x_ (col7_data_x_[129:0]), // Templated | |
| 482 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
| 483 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
| 484 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
| 485 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
| 486 | // Inputs | |
| 487 | .arb_grant_a (arb_grant_r_a[6]), // Templated | |
| 488 | .arb_qsel0_a (arb_qsel0_r_a[6]), // Templated | |
| 489 | .arb_qsel1_a (arb_qsel1_r_a[6]), // Templated | |
| 490 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), // Templated | |
| 491 | .arb_shift_a (arb_shift_r_a[6]), // Templated | |
| 492 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), // Templated | |
| 493 | .scan_in(pcx_mac7_scanin), | |
| 494 | .scan_out(pcx_mac7_scanout), | |
| 495 | .l2clk (l2clk), // Templated | |
| 496 | .tcu_scan_en (tcu_scan_en_out[6]), | |
| 497 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
| 498 | .ccx_aclk (ccx_aclk_out[6]), | |
| 499 | .ccx_bclk (ccx_bclk_out[6]) | |
| 500 | ); | |
| 501 | ||
| 502 | ||
| 503 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
| 504 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
| 505 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
| 506 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
| 507 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
| 508 | ||
| 509 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
| 510 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
| 511 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
| 512 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
| 513 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
| 514 | ||
| 515 | // fixscan start: | |
| 516 | assign pcx_mac0_scanin = scan_rep_out ; | |
| 517 | assign pcx_mac1_scanin = pcx_mac0_scanout ; | |
| 518 | assign pcx_mac2_scanin = pcx_mac1_scanout ; | |
| 519 | assign pcx_mac3_scanin = pcx_mac2_scanout ; | |
| 520 | assign pcx_mac4_scanin = pcx_mac3_scanout ; | |
| 521 | assign pcx_mac5_scanin = pcx_mac4_scanout ; | |
| 522 | assign pcx_mac6_scanin = pcx_mac5_scanout ; | |
| 523 | assign pcx_mac7_scanin = pcx_mac6_scanout ; | |
| 524 | assign scan_out = pcx_mac7_scanout ; | |
| 525 | // fixscan end: | |
| 526 | endmodule | |
| 527 | ||
| 528 | // Local Variables: | |
| 529 | // verilog-library-directories:("." "v") | |
| 530 | // End: | |
| 531 | ||
| 532 | ||
| 533 | ||
| 534 | // | |
| 535 | // buff macro | |
| 536 | // | |
| 537 | // | |
| 538 | ||
| 539 | ||
| 540 | ||
| 541 | ||
| 542 | ||
| 543 | module pcx_dpsa_buff_macro__dbuff_32x__stack_6l__width_5 ( | |
| 544 | din, | |
| 545 | dout); | |
| 546 | input [4:0] din; | |
| 547 | output [4:0] dout; | |
| 548 | ||
| 549 | ||
| 550 | ||
| 551 | ||
| 552 | ||
| 553 | ||
| 554 | buff #(5) d0_0 ( | |
| 555 | .in(din[4:0]), | |
| 556 | .out(dout[4:0]) | |
| 557 | ); | |
| 558 | ||
| 559 | ||
| 560 | ||
| 561 | ||
| 562 | ||
| 563 | ||
| 564 | ||
| 565 | ||
| 566 | endmodule | |
| 567 | ||
| 568 | ||
| 569 | ||
| 570 | ||
| 571 | ||
| 572 | // | |
| 573 | // buff macro | |
| 574 | // | |
| 575 | // | |
| 576 | ||
| 577 | ||
| 578 | ||
| 579 | ||
| 580 | ||
| 581 | module pcx_dpsa_buff_macro__dbuff_32x__stack_none__width_1 ( | |
| 582 | din, | |
| 583 | dout); | |
| 584 | input [0:0] din; | |
| 585 | output [0:0] dout; | |
| 586 | ||
| 587 | ||
| 588 | ||
| 589 | ||
| 590 | ||
| 591 | ||
| 592 | buff #(1) d0_0 ( | |
| 593 | .in(din[0:0]), | |
| 594 | .out(dout[0:0]) | |
| 595 | ); | |
| 596 | ||
| 597 | ||
| 598 | ||
| 599 | ||
| 600 | ||
| 601 | ||
| 602 | ||
| 603 | ||
| 604 | endmodule | |
| 605 | ||
| 606 | ||
| 607 | ||
| 608 | // | |
| 609 | // buff macro | |
| 610 | // | |
| 611 | // | |
| 612 | ||
| 613 | ||
| 614 | ||
| 615 | ||
| 616 | ||
| 617 | module pcx_dpsa_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 ( | |
| 618 | din, | |
| 619 | dout); | |
| 620 | input [3:0] din; | |
| 621 | output [3:0] dout; | |
| 622 | ||
| 623 | ||
| 624 | ||
| 625 | ||
| 626 | ||
| 627 | ||
| 628 | buff #(4) d0_0 ( | |
| 629 | .in(din[3:0]), | |
| 630 | .out(dout[3:0]) | |
| 631 | ); | |
| 632 | ||
| 633 | ||
| 634 | ||
| 635 | ||
| 636 | ||
| 637 | ||
| 638 | ||
| 639 | ||
| 640 | endmodule | |
| 641 | ||
| 642 | ||
| 643 | ||
| 644 | ||
| 645 | ||
| 646 | ||
| 647 | ||
| 648 | ||
| 649 | ||
| 650 | // any PARAMS parms go into naming of macro | |
| 651 | ||
| 652 | module pcx_dpsa_ccx_l1clkhdr_ctl_macro__dl1hdr_24x ( | |
| 653 | l2clk, | |
| 654 | l1en, | |
| 655 | pce_ov, | |
| 656 | stop, | |
| 657 | se, | |
| 658 | l1clk); | |
| 659 | ||
| 660 | ||
| 661 | input l2clk; | |
| 662 | input l1en; | |
| 663 | input pce_ov; | |
| 664 | input stop; | |
| 665 | input se; | |
| 666 | output l1clk; | |
| 667 | ||
| 668 | ||
| 669 | ||
| 670 | ||
| 671 | ||
| 672 | cl_sc1_l1hdr_24x c_0 ( | |
| 673 | ||
| 674 | ||
| 675 | .l2clk(l2clk), | |
| 676 | .pce(l1en), | |
| 677 | .l1clk(l1clk), | |
| 678 | .se(se), | |
| 679 | .pce_ov(pce_ov), | |
| 680 | .stop(stop) | |
| 681 | ); | |
| 682 | ||
| 683 | ||
| 684 | ||
| 685 | ||
| 686 | ||
| 687 | ||
| 688 | endmodule | |
| 689 | ||
| 690 | ||
| 691 | ||
| 692 | ||
| 693 | ||
| 694 | ||
| 695 | ||
| 696 | ||
| 697 | ||
| 698 | // | |
| 699 | // ccx macro | |
| 700 | // | |
| 701 | // | |
| 702 | ||
| 703 | ||
| 704 | ||
| 705 | ||
| 706 | ||
| 707 | module pcx_dpsa_ccx_new_macro__type_c_l ( | |
| 708 | l2clk, | |
| 709 | l1clk, | |
| 710 | pce0, | |
| 711 | pce1, | |
| 712 | pce_ov, | |
| 713 | se, | |
| 714 | stop, | |
| 715 | siclk_in, | |
| 716 | soclk_in, | |
| 717 | scan_in, | |
| 718 | grant_a, | |
| 719 | qsel0, | |
| 720 | shift, | |
| 721 | data_a, | |
| 722 | data_crit_x_l, | |
| 723 | data_ncrit_x_l, | |
| 724 | data_x_l, | |
| 725 | scan_out); | |
| 726 | wire so5; | |
| 727 | wire siclk_out; | |
| 728 | wire soclk_out; | |
| 729 | wire l1clk0; | |
| 730 | wire l1clk1; | |
| 731 | wire grant_x; | |
| 732 | wire qsel0_buf; | |
| 733 | wire shift_buf; | |
| 734 | ||
| 735 | input l2clk; | |
| 736 | input l1clk; | |
| 737 | input pce0; | |
| 738 | input pce1; | |
| 739 | input pce_ov; | |
| 740 | input se; | |
| 741 | input stop; | |
| 742 | input siclk_in; | |
| 743 | input soclk_in; | |
| 744 | input scan_in; | |
| 745 | input grant_a; | |
| 746 | input qsel0; | |
| 747 | input shift; | |
| 748 | input [9:0] data_a; | |
| 749 | input [9:0] data_crit_x_l; | |
| 750 | input [9:0] data_ncrit_x_l; | |
| 751 | output [9:0] data_x_l; | |
| 752 | output scan_out; | |
| 753 | cl_dp1_ccxhdr c0 ( | |
| 754 | .si(scan_in), | |
| 755 | .so(so5), | |
| 756 | .l2clk(l2clk), | |
| 757 | .pce0(pce0), | |
| 758 | .pce1(pce1), | |
| 759 | .pce_ov(pce_ov), | |
| 760 | .stop(stop), | |
| 761 | .siclk_in(siclk_in), | |
| 762 | .soclk_in(soclk_in), | |
| 763 | .siclk_out(siclk_out), | |
| 764 | .soclk_out(soclk_out), | |
| 765 | .l1clk0(l1clk0), | |
| 766 | .l1clk1(l1clk1), | |
| 767 | .se(se), | |
| 768 | .l1clk(l1clk), | |
| 769 | .grant_a(grant_a), | |
| 770 | .grant_x(grant_x), | |
| 771 | .qsel0(qsel0), | |
| 772 | .qsel0_buf(qsel0_buf), | |
| 773 | .shift(shift), | |
| 774 | .shift_buf(shift_buf) | |
| 775 | ); | |
| 776 | ||
| 777 | ||
| 778 | ||
| 779 | ||
| 780 | ||
| 781 | ||
| 782 | ccx_mac_c #(10) mac_c( | |
| 783 | .siclk(siclk_out), | |
| 784 | .soclk(soclk_out), | |
| 785 | .data_a(data_a[9:0]), | |
| 786 | .data_crit_x_l(data_crit_x_l[9:0]), | |
| 787 | .data_ncrit_x_l(data_ncrit_x_l[9:0]), | |
| 788 | .data_x_l(data_x_l[9:0]), | |
| 789 | .si(so5), | |
| 790 | .so(scan_out), | |
| 791 | .l1clk0(l1clk0), | |
| 792 | .l1clk1(l1clk1), | |
| 793 | .grant_x(grant_x), | |
| 794 | .qsel0_buf(qsel0_buf), | |
| 795 | .shift_buf(shift_buf) | |
| 796 | ); | |
| 797 | ||
| 798 | ||
| 799 | ||
| 800 | ||
| 801 | ||
| 802 | ||
| 803 | ||
| 804 | ||
| 805 | ||
| 806 | ||
| 807 | ||
| 808 | ||
| 809 | ||
| 810 | ||
| 811 | endmodule | |
| 812 | ||
| 813 | ||
| 814 | // | |
| 815 | //// scan renames | |
| 816 | //assign pce_ov = tcu_pce_ov; | |
| 817 | //assign stop = tcu_clk_stop; | |
| 818 | //assign siclk = tcu_aclk; | |
| 819 | //assign soclk = tcu_bclk; | |
| 820 | //// end scan | |
| 821 | // | |
| 822 | //buff_macro i_buf_grant (width=1, stack=30c) | |
| 823 | //( | |
| 824 | // .din (arb_grant_a), | |
| 825 | // .dout (grant_a), | |
| 826 | // ); | |
| 827 | // | |
| 828 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
| 829 | //( | |
| 830 | // .scan_in(i_dff_grant_x_scanin), | |
| 831 | // .scan_out(i_dff_grant_x_scanout), | |
| 832 | // .clk (l2clk), | |
| 833 | // .din ({12{grant_a}}), | |
| 834 | // .dout (grant_x[11:0]), | |
| 835 | // .en (1'b1), | |
| 836 | // ); | |
| 837 | // | |
| 838 | // | |
| 839 | //// DATAPATH SECTION | |
| 840 | // | |
| 841 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
| 842 | //( | |
| 843 | // .scan_in(i_dff_q1_2_scanin), | |
| 844 | // .scan_out(i_dff_q1_2_scanout), | |
| 845 | // .clk (l2clk), | |
| 846 | // .din (src_pcx_data_a[129:90]), | |
| 847 | // .dout (q1_dataout[129:90]), | |
| 848 | // .en (arb_qsel1_a), | |
| 849 | // ); | |
| 850 | // | |
| 851 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
| 852 | //( | |
| 853 | // .scan_in(i_dff_q1_1_scanin), | |
| 854 | // .scan_out(i_dff_q1_1_scanout), | |
| 855 | // .clk (l2clk), | |
| 856 | // .din (src_pcx_data_a[89:40]), | |
| 857 | // .dout (q1_dataout[89:40]), | |
| 858 | // .en (arb_qsel1_a), | |
| 859 | // ); | |
| 860 | // | |
| 861 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
| 862 | //( | |
| 863 | // .scan_in(i_dff_q1_0_scanin), | |
| 864 | // .scan_out(i_dff_q1_0_scanout), | |
| 865 | // .clk (l2clk), | |
| 866 | // .din (src_pcx_data_a[39:0]), | |
| 867 | // .dout (q1_dataout[39:0]), | |
| 868 | // .en (arb_qsel1_a), | |
| 869 | // ); | |
| 870 | // | |
| 871 | ////assign q0_datain_ca[149:0] = | |
| 872 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
| 873 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
| 874 | // | |
| 875 | // | |
| 876 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
| 877 | //( | |
| 878 | // .din0 (src_pcx_data_a[129:90]), | |
| 879 | // .din1 (q1_dataout[129:90]), | |
| 880 | // .sel0 (arb_qsel0_a), | |
| 881 | // .sel1 (arb_shift_a), | |
| 882 | // .dout (q0_datain_a[129:90]), | |
| 883 | // ); | |
| 884 | // | |
| 885 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
| 886 | //( | |
| 887 | // .din0 (src_pcx_data_a[89:40]), | |
| 888 | // .din1 (q1_dataout[89:40]), | |
| 889 | // .sel0 (arb_qsel0_a), | |
| 890 | // .sel1 (arb_shift_a), | |
| 891 | // .dout (q0_datain_a[89:40]), | |
| 892 | // ); | |
| 893 | // | |
| 894 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
| 895 | //( | |
| 896 | // .din0 (src_pcx_data_a[39:0]), | |
| 897 | // .din1 (q1_dataout[39:0]), | |
| 898 | // .sel0 (arb_qsel0_a), | |
| 899 | // .sel1 (arb_shift_a), | |
| 900 | // .dout (q0_datain_a[39:0]), | |
| 901 | // ); | |
| 902 | // | |
| 903 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
| 904 | //( | |
| 905 | // .scan_in(i_dff_q0_2_scanin), | |
| 906 | // .scan_out(i_dff_q0_2_scanout), | |
| 907 | // .clk (l2clk), | |
| 908 | // .din (q0_datain_a[129:90]), | |
| 909 | // .dout (q0_dataout[129:90]), | |
| 910 | // .en (arb_q0_holdbar_a), | |
| 911 | // ); | |
| 912 | // | |
| 913 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
| 914 | //( | |
| 915 | // .scan_in(i_dff_q0_1_scanin), | |
| 916 | // .scan_out(i_dff_q0_1_scanout), | |
| 917 | // .clk (l2clk), | |
| 918 | // .din (q0_datain_a[89:40]), | |
| 919 | // .dout (q0_dataout[89:40]), | |
| 920 | // .en (arb_q0_holdbar_a), | |
| 921 | // ); | |
| 922 | // | |
| 923 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
| 924 | //( | |
| 925 | // .scan_in(i_dff_q0_0_scanin), | |
| 926 | // .scan_out(i_dff_q0_0_scanout), | |
| 927 | // .clk (l2clk), | |
| 928 | // .din (q0_datain_a[39:0]), | |
| 929 | // .dout (q0_dataout[39:0]), | |
| 930 | // .en (arb_q0_holdbar_a), | |
| 931 | // ); | |
| 932 | // | |
| 933 | ////MUX | |
| 934 | // | |
| 935 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
| 936 | //( | |
| 937 | // .din0 (q0_dataout[129:90]), | |
| 938 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
| 939 | // .dout (data_x_[129:90]), | |
| 940 | // ); | |
| 941 | // | |
| 942 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
| 943 | //( | |
| 944 | // .din0 (q0_dataout[89:40]), | |
| 945 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
| 946 | // .dout (data_x_[89:40]), | |
| 947 | // ); | |
| 948 | // | |
| 949 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
| 950 | //( | |
| 951 | // .din0 (q0_dataout[39:0]), | |
| 952 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
| 953 | // .dout (data_x_[39:0]), | |
| 954 | // ); | |
| 955 | // | |
| 956 | // | |
| 957 | //nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c) | |
| 958 | //( | |
| 959 | // .din0 (data_x_[129:90]), | |
| 960 | // .din1 (data_prev_x_[129:90]), | |
| 961 | // .dout (data_out_x[129:90]) | |
| 962 | // ); | |
| 963 | // | |
| 964 | //nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c) | |
| 965 | //( | |
| 966 | // .din0 (data_x_[89:40]), | |
| 967 | // .din1 (data_prev_x_[89:40]), | |
| 968 | // .dout (data_out_x[89:40]) | |
| 969 | // ); | |
| 970 | // | |
| 971 | //nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c) | |
| 972 | //( | |
| 973 | // .din0 (data_x_[39:0]), | |
| 974 | // .din1 (data_prev_x_[39:0]), | |
| 975 | // .dout (data_out_x[39:0]) | |
| 976 | // ); | |
| 977 | // | |
| 978 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
| 979 | //( | |
| 980 | // .din (data_out_x[129:90]), | |
| 981 | // .dout (data_out_x_[129:90]) | |
| 982 | // ); | |
| 983 | // | |
| 984 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
| 985 | //( | |
| 986 | // .din (data_out_x[89:40]), | |
| 987 | // .dout (data_out_x_[89:40]) | |
| 988 | // ); | |
| 989 | // | |
| 990 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
| 991 | //( | |
| 992 | // .din (data_out_x[39:0]), | |
| 993 | // .dout (data_out_x_[39:0]) | |
| 994 | // ); | |
| 995 | // | |
| 996 | //// fixscan start: | |
| 997 | //assign i_dff_grant_x_scanin = scan_in ; | |
| 998 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
| 999 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
| 1000 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
| 1001 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
| 1002 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
| 1003 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
| 1004 | //assign scan_out = i_dff_q0_0_scanout ; | |
| 1005 | //// fixscan end: | |
| 1006 | //endmodule | |
| 1007 | // | |
| 1008 | // Local Variables: | |
| 1009 | // verilog-library-directories:("." "v") | |
| 1010 | // verilog-library-files:("./v/ccx_new_macro.v") | |
| 1011 | // End: | |
| 1012 | // | |
| 1013 | ||
| 1014 | ||
| 1015 | // | |
| 1016 | // ccx macro | |
| 1017 | // | |
| 1018 | // | |
| 1019 | ||
| 1020 | ||
| 1021 | ||
| 1022 | ||
| 1023 | ||
| 1024 | module pcx_dpsa_ccx_new_macro__type_b_r ( | |
| 1025 | l2clk, | |
| 1026 | l1clk, | |
| 1027 | pce0, | |
| 1028 | pce1, | |
| 1029 | pce_ov, | |
| 1030 | se, | |
| 1031 | stop, | |
| 1032 | siclk_in, | |
| 1033 | soclk_in, | |
| 1034 | scan_in, | |
| 1035 | grant_a, | |
| 1036 | qsel0, | |
| 1037 | shift, | |
| 1038 | data_a, | |
| 1039 | data_prev_x_l, | |
| 1040 | data_x_l, | |
| 1041 | scan_out); | |
| 1042 | wire so5; | |
| 1043 | wire siclk_out; | |
| 1044 | wire soclk_out; | |
| 1045 | wire l1clk0; | |
| 1046 | wire l1clk1; | |
| 1047 | wire grant_x; | |
| 1048 | wire qsel0_buf; | |
| 1049 | wire shift_buf; | |
| 1050 | ||
| 1051 | input l2clk; | |
| 1052 | input l1clk; | |
| 1053 | input pce0; | |
| 1054 | input pce1; | |
| 1055 | input pce_ov; | |
| 1056 | input se; | |
| 1057 | input stop; | |
| 1058 | input siclk_in; | |
| 1059 | input soclk_in; | |
| 1060 | input scan_in; | |
| 1061 | input grant_a; | |
| 1062 | input qsel0; | |
| 1063 | input shift; | |
| 1064 | input [9:0] data_a; | |
| 1065 | input [9:0] data_prev_x_l; | |
| 1066 | output [9:0] data_x_l; | |
| 1067 | output scan_out; | |
| 1068 | cl_dp1_ccxhdr c0 ( | |
| 1069 | .si(scan_in), | |
| 1070 | .so(so5), | |
| 1071 | .l2clk(l2clk), | |
| 1072 | .pce0(pce0), | |
| 1073 | .pce1(pce1), | |
| 1074 | .pce_ov(pce_ov), | |
| 1075 | .stop(stop), | |
| 1076 | .siclk_in(siclk_in), | |
| 1077 | .soclk_in(soclk_in), | |
| 1078 | .siclk_out(siclk_out), | |
| 1079 | .soclk_out(soclk_out), | |
| 1080 | .l1clk0(l1clk0), | |
| 1081 | .l1clk1(l1clk1), | |
| 1082 | .se(se), | |
| 1083 | .l1clk(l1clk), | |
| 1084 | .grant_a(grant_a), | |
| 1085 | .grant_x(grant_x), | |
| 1086 | .qsel0(qsel0), | |
| 1087 | .qsel0_buf(qsel0_buf), | |
| 1088 | .shift(shift), | |
| 1089 | .shift_buf(shift_buf) | |
| 1090 | ); | |
| 1091 | ||
| 1092 | ||
| 1093 | ||
| 1094 | ||
| 1095 | ||
| 1096 | ||
| 1097 | ccx_mac_b #(10) mac_b( | |
| 1098 | .siclk(siclk_out), | |
| 1099 | .soclk(soclk_out), | |
| 1100 | .data_a(data_a[9:0]), | |
| 1101 | .data_prev_x_l(data_prev_x_l[9:0]), | |
| 1102 | .data_x_l(data_x_l[9:0]), | |
| 1103 | .si(so5), | |
| 1104 | .so(scan_out), | |
| 1105 | .l1clk0(l1clk0), | |
| 1106 | .l1clk1(l1clk1), | |
| 1107 | .grant_x(grant_x), | |
| 1108 | .qsel0_buf(qsel0_buf), | |
| 1109 | .shift_buf(shift_buf) | |
| 1110 | ); | |
| 1111 | ||
| 1112 | ||
| 1113 | ||
| 1114 | ||
| 1115 | ||
| 1116 | ||
| 1117 | ||
| 1118 | ||
| 1119 | ||
| 1120 | ||
| 1121 | ||
| 1122 | ||
| 1123 | ||
| 1124 | ||
| 1125 | endmodule | |
| 1126 | ||
| 1127 | ||
| 1128 | // | |
| 1129 | //// scan renames | |
| 1130 | //assign pce_ov = tcu_pce_ov; | |
| 1131 | //assign stop = tcu_clk_stop; | |
| 1132 | //assign siclk = ccx_aclk; | |
| 1133 | //assign soclk = ccx_bclk; | |
| 1134 | //// end scan | |
| 1135 | // | |
| 1136 | //// buffer the grant signal | |
| 1137 | // | |
| 1138 | //buff_macro i_buf_grant (width=1, stack=30c) | |
| 1139 | //( | |
| 1140 | // .din (arb_grant_a), | |
| 1141 | // .dout (grant_a), | |
| 1142 | // ); | |
| 1143 | // | |
| 1144 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
| 1145 | //( | |
| 1146 | // .scan_in(i_dff_grant_x_scanin), | |
| 1147 | // .scan_out(i_dff_grant_x_scanout), | |
| 1148 | // .clk (l2clk), | |
| 1149 | // .din ({12{grant_a}}), | |
| 1150 | // .dout (grant_x[11:0]), | |
| 1151 | // .en (1'b1), | |
| 1152 | // ); | |
| 1153 | // | |
| 1154 | // | |
| 1155 | //// DATAPATH SECTION | |
| 1156 | // | |
| 1157 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
| 1158 | //( | |
| 1159 | // .scan_in(i_dff_q1_2_scanin), | |
| 1160 | // .scan_out(i_dff_q1_2_scanout), | |
| 1161 | // .clk (l2clk), | |
| 1162 | // .din (src_pcx_data_a[129:90]), | |
| 1163 | // .dout (q1_dataout[129:90]), | |
| 1164 | // .en (arb_qsel1_a), | |
| 1165 | // ); | |
| 1166 | // | |
| 1167 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
| 1168 | //( | |
| 1169 | // .scan_in(i_dff_q1_1_scanin), | |
| 1170 | // .scan_out(i_dff_q1_1_scanout), | |
| 1171 | // .clk (l2clk), | |
| 1172 | // .din (src_pcx_data_a[89:40]), | |
| 1173 | // .dout (q1_dataout[89:40]), | |
| 1174 | // .en (arb_qsel1_a), | |
| 1175 | // ); | |
| 1176 | // | |
| 1177 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
| 1178 | //( | |
| 1179 | // .scan_in(i_dff_q1_0_scanin), | |
| 1180 | // .scan_out(i_dff_q1_0_scanout), | |
| 1181 | // .clk (l2clk), | |
| 1182 | // .din (src_pcx_data_a[39:0]), | |
| 1183 | // .dout (q1_dataout[39:0]), | |
| 1184 | // .en (arb_qsel1_a), | |
| 1185 | // ); | |
| 1186 | // | |
| 1187 | ////assign q0_datain_ca[129:0] = | |
| 1188 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[129:0] : 150'd0) | | |
| 1189 | //// (arb_pcxdp_shift_cx ? q1_dataout[129:0] : 150'd0) ; | |
| 1190 | // | |
| 1191 | // | |
| 1192 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
| 1193 | //( | |
| 1194 | // .din0 (src_pcx_data_a[129:90]), | |
| 1195 | // .din1 (q1_dataout[129:90]), | |
| 1196 | // .sel0 (arb_qsel0_a), | |
| 1197 | // .sel1 (arb_shift_a), | |
| 1198 | // .dout (q0_datain_a[129:90]), | |
| 1199 | // ); | |
| 1200 | // | |
| 1201 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
| 1202 | //( | |
| 1203 | // .din0 (src_pcx_data_a[89:40]), | |
| 1204 | // .din1 (q1_dataout[89:40]), | |
| 1205 | // .sel0 (arb_qsel0_a), | |
| 1206 | // .sel1 (arb_shift_a), | |
| 1207 | // .dout (q0_datain_a[89:40]), | |
| 1208 | // ); | |
| 1209 | // | |
| 1210 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
| 1211 | //( | |
| 1212 | // .din0 (src_pcx_data_a[39:0]), | |
| 1213 | // .din1 (q1_dataout[39:0]), | |
| 1214 | // .sel0 (arb_qsel0_a), | |
| 1215 | // .sel1 (arb_shift_a), | |
| 1216 | // .dout (q0_datain_a[39:0]), | |
| 1217 | // ); | |
| 1218 | // | |
| 1219 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
| 1220 | //( | |
| 1221 | // .scan_in(i_dff_q0_2_scanin), | |
| 1222 | // .scan_out(i_dff_q0_2_scanout), | |
| 1223 | // .clk (l2clk), | |
| 1224 | // .din (q0_datain_a[129:90]), | |
| 1225 | // .dout (q0_dataout[129:90]), | |
| 1226 | // .en (arb_q0_holdbar_a), | |
| 1227 | // ); | |
| 1228 | // | |
| 1229 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
| 1230 | //( | |
| 1231 | // .scan_in(i_dff_q0_1_scanin), | |
| 1232 | // .scan_out(i_dff_q0_1_scanout), | |
| 1233 | // .clk (l2clk), | |
| 1234 | // .din (q0_datain_a[89:40]), | |
| 1235 | // .dout (q0_dataout[89:40]), | |
| 1236 | // .en (arb_q0_holdbar_a), | |
| 1237 | // ); | |
| 1238 | // | |
| 1239 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
| 1240 | //( | |
| 1241 | // .scan_in(i_dff_q0_0_scanin), | |
| 1242 | // .scan_out(i_dff_q0_0_scanout), | |
| 1243 | // .clk (l2clk), | |
| 1244 | // .din (q0_datain_a[39:0]), | |
| 1245 | // .dout (q0_dataout[39:0]), | |
| 1246 | // .en (arb_q0_holdbar_a), | |
| 1247 | // ); | |
| 1248 | // | |
| 1249 | //// MUX | |
| 1250 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
| 1251 | //( | |
| 1252 | // .din0 (q0_dataout[129:90]), | |
| 1253 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
| 1254 | // .dout (data_out_x_[129:90]), | |
| 1255 | // ); | |
| 1256 | // | |
| 1257 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
| 1258 | //( | |
| 1259 | // .din0 (q0_dataout[89:40]), | |
| 1260 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
| 1261 | // .dout (data_out_x_[89:40]), | |
| 1262 | // ); | |
| 1263 | // | |
| 1264 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
| 1265 | //( | |
| 1266 | // .din0 (q0_dataout[39:0]), | |
| 1267 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
| 1268 | // .dout (data_out_x_[39:0]), | |
| 1269 | // ); | |
| 1270 | // | |
| 1271 | //// fixscan start: | |
| 1272 | //assign i_dff_grant_x_scanin = scan_in ; | |
| 1273 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
| 1274 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
| 1275 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
| 1276 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
| 1277 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
| 1278 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
| 1279 | //assign scan_out = i_dff_q0_0_scanout ; | |
| 1280 | //// fixscan end: | |
| 1281 | //endmodule | |
| 1282 | // | |
| 1283 | // Local Variables: | |
| 1284 | // verilog-library-directories:("." "v") | |
| 1285 | // verilog-library-files:("./v/ccx_new_macro.v") | |
| 1286 | // End: | |
| 1287 | // | |
| 1288 | ||
| 1289 | ||
| 1290 | ||
| 1291 | // | |
| 1292 | // ccx macro | |
| 1293 | // | |
| 1294 | // | |
| 1295 | ||
| 1296 | ||
| 1297 | ||
| 1298 | ||
| 1299 | ||
| 1300 | module pcx_dpsa_ccx_new_macro__type_a ( | |
| 1301 | l2clk, | |
| 1302 | l1clk, | |
| 1303 | pce0, | |
| 1304 | pce1, | |
| 1305 | pce_ov, | |
| 1306 | se, | |
| 1307 | stop, | |
| 1308 | siclk_in, | |
| 1309 | soclk_in, | |
| 1310 | scan_in, | |
| 1311 | grant_a, | |
| 1312 | qsel0, | |
| 1313 | shift, | |
| 1314 | data_a, | |
| 1315 | data_x_l, | |
| 1316 | scan_out); | |
| 1317 | wire so5; | |
| 1318 | wire siclk_out; | |
| 1319 | wire soclk_out; | |
| 1320 | wire l1clk0; | |
| 1321 | wire l1clk1; | |
| 1322 | wire grant_x; | |
| 1323 | wire qsel0_buf; | |
| 1324 | wire shift_buf; | |
| 1325 | ||
| 1326 | input l2clk; | |
| 1327 | input l1clk; | |
| 1328 | input pce0; | |
| 1329 | input pce1; | |
| 1330 | input pce_ov; | |
| 1331 | input se; | |
| 1332 | input stop; | |
| 1333 | input siclk_in; | |
| 1334 | input soclk_in; | |
| 1335 | input scan_in; | |
| 1336 | input grant_a; | |
| 1337 | input qsel0; | |
| 1338 | input shift; | |
| 1339 | input [9:0] data_a; | |
| 1340 | output [9:0] data_x_l; | |
| 1341 | output scan_out; | |
| 1342 | cl_dp1_ccxhdr c0 ( | |
| 1343 | .si(scan_in), | |
| 1344 | .so(so5), | |
| 1345 | .l2clk(l2clk), | |
| 1346 | .pce0(pce0), | |
| 1347 | .pce1(pce1), | |
| 1348 | .pce_ov(pce_ov), | |
| 1349 | .stop(stop), | |
| 1350 | .siclk_in(siclk_in), | |
| 1351 | .soclk_in(soclk_in), | |
| 1352 | .siclk_out(siclk_out), | |
| 1353 | .soclk_out(soclk_out), | |
| 1354 | .l1clk0(l1clk0), | |
| 1355 | .l1clk1(l1clk1), | |
| 1356 | .se(se), | |
| 1357 | .l1clk(l1clk), | |
| 1358 | .grant_a(grant_a), | |
| 1359 | .grant_x(grant_x), | |
| 1360 | .qsel0(qsel0), | |
| 1361 | .qsel0_buf(qsel0_buf), | |
| 1362 | .shift(shift), | |
| 1363 | .shift_buf(shift_buf) | |
| 1364 | ); | |
| 1365 | ||
| 1366 | ||
| 1367 | ||
| 1368 | ||
| 1369 | ||
| 1370 | ||
| 1371 | ccx_mac_a #(10) mac_a( | |
| 1372 | .siclk(siclk_out), | |
| 1373 | .soclk(soclk_out), | |
| 1374 | .data_a(data_a[9:0]), | |
| 1375 | .data_x_l(data_x_l[9:0]), | |
| 1376 | .si(so5), | |
| 1377 | .so(scan_out), | |
| 1378 | .l1clk0(l1clk0), | |
| 1379 | .l1clk1(l1clk1), | |
| 1380 | .grant_x(grant_x), | |
| 1381 | .qsel0_buf(qsel0_buf), | |
| 1382 | .shift_buf(shift_buf) | |
| 1383 | ); | |
| 1384 | ||
| 1385 | ||
| 1386 | ||
| 1387 | ||
| 1388 | ||
| 1389 | ||
| 1390 | ||
| 1391 | ||
| 1392 | ||
| 1393 | ||
| 1394 | ||
| 1395 | ||
| 1396 | ||
| 1397 | ||
| 1398 | endmodule | |
| 1399 | ||
| 1400 | `endif // `ifndef FPGA | |
| 1401 | ||
| 1402 | `ifdef FPGA | |
| 1403 | `timescale 1 ns / 100 ps | |
| 1404 | module pcx_dpsa(pcx_scache_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a, | |
| 1405 | arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a, | |
| 1406 | arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a, | |
| 1407 | spc0_pcx_data_a, spc1_pcx_data_a, spc2_pcx_data_a, spc3_pcx_data_a, | |
| 1408 | spc4_pcx_data_a, spc5_pcx_data_a, spc6_pcx_data_a, spc7_pcx_data_a, | |
| 1409 | tcu_scan_en, l2clk, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_in, scan_out); | |
| 1410 | ||
| 1411 | output [129:0] pcx_scache_data_x_; | |
| 1412 | input [7:0] arb_grant_l_a; | |
| 1413 | input [7:0] arb_q0_holdbar_l_a; | |
| 1414 | input [7:0] arb_qsel0_l_a; | |
| 1415 | input [7:0] arb_qsel1_l_a; | |
| 1416 | input [7:0] arb_shift_l_a; | |
| 1417 | input [7:0] arb_grant_r_a; | |
| 1418 | input [7:0] arb_q0_holdbar_r_a; | |
| 1419 | input [7:0] arb_qsel0_r_a; | |
| 1420 | input [7:0] arb_qsel1_r_a; | |
| 1421 | input [7:0] arb_shift_r_a; | |
| 1422 | input [129:0] spc0_pcx_data_a; | |
| 1423 | input [129:0] spc1_pcx_data_a; | |
| 1424 | input [129:0] spc2_pcx_data_a; | |
| 1425 | input [129:0] spc3_pcx_data_a; | |
| 1426 | input [129:0] spc4_pcx_data_a; | |
| 1427 | input [129:0] spc5_pcx_data_a; | |
| 1428 | input [129:0] spc6_pcx_data_a; | |
| 1429 | input [129:0] spc7_pcx_data_a; | |
| 1430 | input tcu_scan_en; | |
| 1431 | input l2clk; | |
| 1432 | input tcu_pce_ov; | |
| 1433 | input ccx_aclk; | |
| 1434 | input ccx_bclk; | |
| 1435 | input scan_in; | |
| 1436 | output scan_out; | |
| 1437 | ||
| 1438 | wire [129:0] all_ones; | |
| 1439 | wire [4:0] mac0_rep_in; | |
| 1440 | wire [3:0] arb_grant_l_a_rep; | |
| 1441 | wire [3:0] arb_qsel0_l_a_rep; | |
| 1442 | wire [3:0] arb_qsel1_l_a_rep; | |
| 1443 | wire [3:0] arb_shift_l_a_rep; | |
| 1444 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
| 1445 | wire [4:0] mac0_rep_out; | |
| 1446 | wire [4:0] mac1_rep_in; | |
| 1447 | wire [4:0] mac1_rep_out; | |
| 1448 | wire [4:0] mac2_rep_in; | |
| 1449 | wire [4:0] mac2_rep_out; | |
| 1450 | wire [4:0] mac3_rep_in; | |
| 1451 | wire [4:0] mac3_rep_out; | |
| 1452 | wire [4:0] mac4_rep_in; | |
| 1453 | wire [7:4] arb_grant_r_a_rep; | |
| 1454 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
| 1455 | wire [7:4] arb_qsel0_r_a_rep; | |
| 1456 | wire [7:4] arb_qsel1_r_a_rep; | |
| 1457 | wire [7:4] arb_shift_r_a_rep; | |
| 1458 | wire [4:0] mac4_rep_out; | |
| 1459 | wire [4:0] mac5_rep_in; | |
| 1460 | wire [4:0] mac5_rep_out; | |
| 1461 | wire [4:0] mac6_rep_in; | |
| 1462 | wire [4:0] mac6_rep_out; | |
| 1463 | wire scan_rep_in; | |
| 1464 | wire tcu_scan_en_out_0_unused; | |
| 1465 | wire tcu_pce_ov_out_0_unused; | |
| 1466 | wire ccx_aclk_out_0_unused; | |
| 1467 | wire ccx_bclk_out_0_unused; | |
| 1468 | wire [129:0] col1_data_x_; | |
| 1469 | wire pcx_mac0_scanin; | |
| 1470 | wire pcx_mac0_scanout; | |
| 1471 | wire [6:1] tcu_scan_en_out; | |
| 1472 | wire [6:1] tcu_pce_ov_out; | |
| 1473 | wire [6:1] ccx_aclk_out; | |
| 1474 | wire [6:1] ccx_bclk_out; | |
| 1475 | wire [129:0] col2_data_x_; | |
| 1476 | wire pcx_mac1_scanin; | |
| 1477 | wire pcx_mac1_scanout; | |
| 1478 | wire [129:0] col3_data_x_; | |
| 1479 | wire pcx_mac2_scanin; | |
| 1480 | wire pcx_mac2_scanout; | |
| 1481 | wire [129:0] col4_data_x_; | |
| 1482 | wire pcx_mac3_scanin; | |
| 1483 | wire pcx_mac3_scanout; | |
| 1484 | wire [129:0] col5_data_x_; | |
| 1485 | wire pcx_mac4_scanin; | |
| 1486 | wire pcx_mac4_scanout; | |
| 1487 | wire [129:0] col6_data_x_; | |
| 1488 | wire pcx_mac5_scanin; | |
| 1489 | wire pcx_mac5_scanout; | |
| 1490 | wire [129:0] col7_data_x_; | |
| 1491 | wire pcx_mac6_scanin; | |
| 1492 | wire pcx_mac6_scanout; | |
| 1493 | wire tcu_scan_en_out_7_unused; | |
| 1494 | wire tcu_pce_ov_out_7_unused; | |
| 1495 | wire ccx_aclk_out_7_unused; | |
| 1496 | wire ccx_bclk_out_7_unused; | |
| 1497 | wire pcx_mac7_scanin; | |
| 1498 | wire pcx_mac7_scanout; | |
| 1499 | wire [7:4] arb_grant_l_a_unused; | |
| 1500 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
| 1501 | wire [7:4] arb_qsel0_l_a_unused; | |
| 1502 | wire [7:4] arb_qsel1_l_a_unused; | |
| 1503 | wire [7:4] arb_shift_l_a_unused; | |
| 1504 | wire [3:0] arb_grant_r_a_unused; | |
| 1505 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
| 1506 | wire [3:0] arb_qsel0_r_a_unused; | |
| 1507 | wire [3:0] arb_qsel1_r_a_unused; | |
| 1508 | wire [3:0] arb_shift_r_a_unused; | |
| 1509 | wire scan_rep_out; | |
| 1510 | ||
| 1511 | assign all_ones[129:0] = 130'h3ffffffffffffffffffffffffffffffff; | |
| 1512 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0], arb_qsel0_l_a[0], | |
| 1513 | arb_qsel1_l_a[0], arb_shift_l_a[0], arb_q0_holdbar_l_a[0]}; | |
| 1514 | assign {arb_grant_l_a_rep[0], arb_qsel0_l_a_rep[0], | |
| 1515 | arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0], | |
| 1516 | arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
| 1517 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2], arb_q0_holdbar_l_a[2], | |
| 1518 | arb_qsel0_l_a[2], arb_qsel1_l_a[2], arb_shift_l_a[2]}; | |
| 1519 | assign {arb_grant_l_a_rep[2], arb_q0_holdbar_l_a_rep[2], | |
| 1520 | arb_qsel0_l_a_rep[2], arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2] | |
| 1521 | } = mac1_rep_out[4:0]; | |
| 1522 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1], | |
| 1523 | arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]}; | |
| 1524 | assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1], | |
| 1525 | arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1] | |
| 1526 | } = mac2_rep_out[4:0]; | |
| 1527 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3], | |
| 1528 | arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]}; | |
| 1529 | assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3], | |
| 1530 | arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3] | |
| 1531 | } = mac3_rep_out[4:0]; | |
| 1532 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5], | |
| 1533 | arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]}; | |
| 1534 | assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5], | |
| 1535 | arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5] | |
| 1536 | } = mac4_rep_out[4:0]; | |
| 1537 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7], | |
| 1538 | arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]}; | |
| 1539 | assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7], | |
| 1540 | arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7] | |
| 1541 | } = mac5_rep_out[4:0]; | |
| 1542 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4], arb_q0_holdbar_r_a[4], | |
| 1543 | arb_qsel0_r_a[4], arb_qsel1_r_a[4], arb_shift_r_a[4]}; | |
| 1544 | assign {arb_grant_r_a_rep[4], arb_q0_holdbar_r_a_rep[4], | |
| 1545 | arb_qsel0_r_a_rep[4], arb_qsel1_r_a_rep[4], arb_shift_r_a_rep[4] | |
| 1546 | } = mac6_rep_out[4:0]; | |
| 1547 | assign scan_rep_in = scan_in; | |
| 1548 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
| 1549 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
| 1550 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
| 1551 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
| 1552 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
| 1553 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
| 1554 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
| 1555 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
| 1556 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
| 1557 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
| 1558 | assign pcx_mac0_scanin = scan_rep_out; | |
| 1559 | assign pcx_mac1_scanin = pcx_mac0_scanout; | |
| 1560 | assign pcx_mac2_scanin = pcx_mac1_scanout; | |
| 1561 | assign pcx_mac3_scanin = pcx_mac2_scanout; | |
| 1562 | assign pcx_mac4_scanin = pcx_mac3_scanout; | |
| 1563 | assign pcx_mac5_scanin = pcx_mac4_scanout; | |
| 1564 | assign pcx_mac6_scanin = pcx_mac5_scanout; | |
| 1565 | assign pcx_mac7_scanin = pcx_mac6_scanout; | |
| 1566 | assign scan_out = pcx_mac7_scanout; | |
| 1567 | ||
| 1568 | pcx_rep_dp pcx_rep( | |
| 1569 | .mac0_rep_out (mac0_rep_out[4:0]), | |
| 1570 | .mac1_rep_out (mac1_rep_out[4:0]), | |
| 1571 | .mac2_rep_out (mac2_rep_out[4:0]), | |
| 1572 | .mac3_rep_out (mac3_rep_out[4:0]), | |
| 1573 | .mac4_rep_out (mac4_rep_out[4:0]), | |
| 1574 | .mac5_rep_out (mac5_rep_out[4:0]), | |
| 1575 | .mac6_rep_out (mac6_rep_out[4:0]), | |
| 1576 | .scan_rep_out (scan_rep_out), | |
| 1577 | .mac0_rep_in (mac0_rep_in[4:0]), | |
| 1578 | .mac1_rep_in (mac1_rep_in[4:0]), | |
| 1579 | .mac2_rep_in (mac2_rep_in[4:0]), | |
| 1580 | .mac3_rep_in (mac3_rep_in[4:0]), | |
| 1581 | .mac4_rep_in (mac4_rep_in[4:0]), | |
| 1582 | .mac5_rep_in (mac5_rep_in[4:0]), | |
| 1583 | .mac6_rep_in (mac6_rep_in[4:0]), | |
| 1584 | .scan_rep_in (scan_rep_in)); | |
| 1585 | pcx_mcl_dp pcx_mac0( | |
| 1586 | .data_out_x_ (pcx_scache_data_x_[129:0]), | |
| 1587 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
| 1588 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
| 1589 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
| 1590 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
| 1591 | .arb_grant_a (arb_grant_l_a_rep[0]), | |
| 1592 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), | |
| 1593 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), | |
| 1594 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), | |
| 1595 | .arb_shift_a (arb_shift_l_a_rep[0]), | |
| 1596 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), | |
| 1597 | .data_crit_x_ (col1_data_x_[129:0]), | |
| 1598 | .data_ncrit_x_ (all_ones[129:0]), | |
| 1599 | .scan_in (pcx_mac0_scanin), | |
| 1600 | .scan_out (pcx_mac0_scanout), | |
| 1601 | .l2clk (l2clk), | |
| 1602 | .tcu_scan_en (tcu_scan_en_out[1]), | |
| 1603 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
| 1604 | .ccx_aclk (ccx_aclk_out[1]), | |
| 1605 | .ccx_bclk (ccx_bclk_out[1])); | |
| 1606 | pcx_mbr_dp pcx_mac1( | |
| 1607 | .data_out_x_ (col1_data_x_[129:0]), | |
| 1608 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
| 1609 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
| 1610 | .ccx_aclk_out (ccx_aclk_out[1]), | |
| 1611 | .ccx_bclk_out (ccx_bclk_out[1]), | |
| 1612 | .arb_grant_a (arb_grant_l_a_rep[2]), | |
| 1613 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), | |
| 1614 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), | |
| 1615 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), | |
| 1616 | .arb_shift_a (arb_shift_l_a_rep[2]), | |
| 1617 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), | |
| 1618 | .data_prev_x_ (col2_data_x_[129:0]), | |
| 1619 | .scan_in (pcx_mac1_scanin), | |
| 1620 | .scan_out (pcx_mac1_scanout), | |
| 1621 | .l2clk (l2clk), | |
| 1622 | .tcu_scan_en (tcu_scan_en_out[2]), | |
| 1623 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
| 1624 | .ccx_aclk (ccx_aclk_out[2]), | |
| 1625 | .ccx_bclk (ccx_bclk_out[2])); | |
| 1626 | pcx_mbr_dp pcx_mac2( | |
| 1627 | .data_out_x_ (col2_data_x_[129:0]), | |
| 1628 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
| 1629 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
| 1630 | .ccx_aclk_out (ccx_aclk_out[2]), | |
| 1631 | .ccx_bclk_out (ccx_bclk_out[2]), | |
| 1632 | .arb_grant_a (arb_grant_l_a_rep[1]), | |
| 1633 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), | |
| 1634 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), | |
| 1635 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), | |
| 1636 | .arb_shift_a (arb_shift_l_a_rep[1]), | |
| 1637 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), | |
| 1638 | .data_prev_x_ (col3_data_x_[129:0]), | |
| 1639 | .scan_in (pcx_mac2_scanin), | |
| 1640 | .scan_out (pcx_mac2_scanout), | |
| 1641 | .l2clk (l2clk), | |
| 1642 | .tcu_scan_en (tcu_scan_en_out[3]), | |
| 1643 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
| 1644 | .ccx_aclk (ccx_aclk_out[3]), | |
| 1645 | .ccx_bclk (ccx_bclk_out[3])); | |
| 1646 | pcx_mbr_dp pcx_mac3( | |
| 1647 | .data_out_x_ (col3_data_x_[129:0]), | |
| 1648 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
| 1649 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
| 1650 | .ccx_aclk_out (ccx_aclk_out[3]), | |
| 1651 | .ccx_bclk_out (ccx_bclk_out[3]), | |
| 1652 | .arb_grant_a (arb_grant_l_a_rep[3]), | |
| 1653 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), | |
| 1654 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), | |
| 1655 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), | |
| 1656 | .arb_shift_a (arb_shift_l_a_rep[3]), | |
| 1657 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), | |
| 1658 | .data_prev_x_ (col4_data_x_[129:0]), | |
| 1659 | .scan_in (pcx_mac3_scanin), | |
| 1660 | .scan_out (pcx_mac3_scanout), | |
| 1661 | .l2clk (l2clk), | |
| 1662 | .tcu_scan_en (tcu_scan_en), | |
| 1663 | .tcu_pce_ov (tcu_pce_ov), | |
| 1664 | .ccx_aclk (ccx_aclk), | |
| 1665 | .ccx_bclk (ccx_bclk)); | |
| 1666 | pcx_mbr_dp pcx_mac4( | |
| 1667 | .data_out_x_ (col4_data_x_[129:0]), | |
| 1668 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
| 1669 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
| 1670 | .ccx_aclk_out (ccx_aclk_out[4]), | |
| 1671 | .ccx_bclk_out (ccx_bclk_out[4]), | |
| 1672 | .arb_grant_a (arb_grant_r_a_rep[5]), | |
| 1673 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), | |
| 1674 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), | |
| 1675 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), | |
| 1676 | .arb_shift_a (arb_shift_r_a_rep[5]), | |
| 1677 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), | |
| 1678 | .data_prev_x_ (col5_data_x_[129:0]), | |
| 1679 | .scan_in (pcx_mac4_scanin), | |
| 1680 | .scan_out (pcx_mac4_scanout), | |
| 1681 | .l2clk (l2clk), | |
| 1682 | .tcu_scan_en (tcu_scan_en_out[3]), | |
| 1683 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
| 1684 | .ccx_aclk (ccx_aclk_out[3]), | |
| 1685 | .ccx_bclk (ccx_bclk_out[3])); | |
| 1686 | pcx_mbr_dp pcx_mac5( | |
| 1687 | .data_out_x_ (col5_data_x_[129:0]), | |
| 1688 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
| 1689 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
| 1690 | .ccx_aclk_out (ccx_aclk_out[5]), | |
| 1691 | .ccx_bclk_out (ccx_bclk_out[5]), | |
| 1692 | .arb_grant_a (arb_grant_r_a_rep[7]), | |
| 1693 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), | |
| 1694 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), | |
| 1695 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), | |
| 1696 | .arb_shift_a (arb_shift_r_a_rep[7]), | |
| 1697 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), | |
| 1698 | .data_prev_x_ (col6_data_x_[129:0]), | |
| 1699 | .scan_in (pcx_mac5_scanin), | |
| 1700 | .scan_out (pcx_mac5_scanout), | |
| 1701 | .l2clk (l2clk), | |
| 1702 | .tcu_scan_en (tcu_scan_en_out[4]), | |
| 1703 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
| 1704 | .ccx_aclk (ccx_aclk_out[4]), | |
| 1705 | .ccx_bclk (ccx_bclk_out[4])); | |
| 1706 | pcx_mbr_dp pcx_mac6( | |
| 1707 | .data_out_x_ (col6_data_x_[129:0]), | |
| 1708 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
| 1709 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
| 1710 | .ccx_aclk_out (ccx_aclk_out[6]), | |
| 1711 | .ccx_bclk_out (ccx_bclk_out[6]), | |
| 1712 | .arb_grant_a (arb_grant_r_a_rep[4]), | |
| 1713 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), | |
| 1714 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), | |
| 1715 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), | |
| 1716 | .arb_shift_a (arb_shift_r_a_rep[4]), | |
| 1717 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), | |
| 1718 | .data_prev_x_ (col7_data_x_[129:0]), | |
| 1719 | .scan_in (pcx_mac6_scanin), | |
| 1720 | .scan_out (pcx_mac6_scanout), | |
| 1721 | .l2clk (l2clk), | |
| 1722 | .tcu_scan_en (tcu_scan_en_out[5]), | |
| 1723 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
| 1724 | .ccx_aclk (ccx_aclk_out[5]), | |
| 1725 | .ccx_bclk (ccx_bclk_out[5])); | |
| 1726 | pcx_mar_dp pcx_mac7( | |
| 1727 | .data_out_x_ (col7_data_x_[129:0]), | |
| 1728 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
| 1729 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
| 1730 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
| 1731 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
| 1732 | .arb_grant_a (arb_grant_r_a[6]), | |
| 1733 | .arb_qsel0_a (arb_qsel0_r_a[6]), | |
| 1734 | .arb_qsel1_a (arb_qsel1_r_a[6]), | |
| 1735 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), | |
| 1736 | .arb_shift_a (arb_shift_r_a[6]), | |
| 1737 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), | |
| 1738 | .scan_in (pcx_mac7_scanin), | |
| 1739 | .scan_out (pcx_mac7_scanout), | |
| 1740 | .l2clk (l2clk), | |
| 1741 | .tcu_scan_en (tcu_scan_en_out[6]), | |
| 1742 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
| 1743 | .ccx_aclk (ccx_aclk_out[6]), | |
| 1744 | .ccx_bclk (ccx_bclk_out[6])); | |
| 1745 | endmodule | |
| 1746 | ||
| 1747 | ||
| 1748 | ||
| 1749 | `endif // `ifdef FPGA | |
| 1750 |