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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: pcx_dpsc.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `ifndef FPGA | |
36 | module pcx_dpsc ( | |
37 | pcx_scache_data_x_, | |
38 | arb_grant_l_a, | |
39 | arb_q0_holdbar_l_a, | |
40 | arb_qsel0_l_a, | |
41 | arb_qsel1_l_a, | |
42 | arb_shift_l_a, | |
43 | arb_grant_r_a, | |
44 | arb_q0_holdbar_r_a, | |
45 | arb_qsel0_r_a, | |
46 | arb_qsel1_r_a, | |
47 | arb_shift_r_a, | |
48 | spc0_pcx_data_a, | |
49 | spc1_pcx_data_a, | |
50 | spc2_pcx_data_a, | |
51 | spc3_pcx_data_a, | |
52 | spc4_pcx_data_a, | |
53 | spc5_pcx_data_a, | |
54 | spc6_pcx_data_a, | |
55 | spc7_pcx_data_a, | |
56 | tcu_scan_en, | |
57 | l2clk, | |
58 | tcu_pce_ov, | |
59 | ccx_aclk, | |
60 | ccx_bclk, | |
61 | scan_in, | |
62 | scan_out); | |
63 | wire [4:0] mac0_rep_in; | |
64 | wire [3:0] arb_grant_l_a_rep; | |
65 | wire [3:0] arb_qsel0_l_a_rep; | |
66 | wire [3:0] arb_qsel1_l_a_rep; | |
67 | wire [3:0] arb_shift_l_a_rep; | |
68 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
69 | wire [4:0] mac0_rep_out; | |
70 | wire [4:0] mac1_rep_in; | |
71 | wire [4:0] mac1_rep_out; | |
72 | wire [4:0] mac2_rep_in; | |
73 | wire [4:0] mac2_rep_out; | |
74 | wire [4:0] mac3_rep_in; | |
75 | wire [4:0] mac3_rep_out; | |
76 | wire [4:0] mac4_rep_in; | |
77 | wire [7:4] arb_grant_r_a_rep; | |
78 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
79 | wire [7:4] arb_qsel0_r_a_rep; | |
80 | wire [7:4] arb_qsel1_r_a_rep; | |
81 | wire [7:4] arb_shift_r_a_rep; | |
82 | wire [4:0] mac4_rep_out; | |
83 | wire [4:0] mac5_rep_in; | |
84 | wire [4:0] mac5_rep_out; | |
85 | wire [4:0] mac6_rep_in; | |
86 | wire [4:0] mac6_rep_out; | |
87 | wire scan_rep_in; | |
88 | wire [129:0] col0_data_x_; | |
89 | wire tcu_scan_en_out_0_unused; | |
90 | wire tcu_pce_ov_out_0_unused; | |
91 | wire ccx_aclk_out_0_unused; | |
92 | wire ccx_bclk_out_0_unused; | |
93 | wire pcx_mac0_scanin; | |
94 | wire pcx_mac0_scanout; | |
95 | wire [6:1] tcu_scan_en_out; | |
96 | wire [6:1] tcu_pce_ov_out; | |
97 | wire [6:1] ccx_aclk_out; | |
98 | wire [6:1] ccx_bclk_out; | |
99 | wire [129:0] col1_data_x_; | |
100 | wire pcx_mac1_scanin; | |
101 | wire pcx_mac1_scanout; | |
102 | wire [129:0] col3_data_x_; | |
103 | wire pcx_mac2_scanin; | |
104 | wire pcx_mac2_scanout; | |
105 | wire [129:0] col4_data_x_; | |
106 | wire pcx_mac3_scanin; | |
107 | wire pcx_mac3_scanout; | |
108 | wire [129:0] col5_data_x_; | |
109 | wire pcx_mac4_scanin; | |
110 | wire pcx_mac4_scanout; | |
111 | wire [129:0] col6_data_x_; | |
112 | wire pcx_mac5_scanin; | |
113 | wire pcx_mac5_scanout; | |
114 | wire [129:0] col7_data_x_; | |
115 | wire pcx_mac6_scanin; | |
116 | wire pcx_mac6_scanout; | |
117 | wire tcu_scan_en_out_7_unused; | |
118 | wire tcu_pce_ov_out_7_unused; | |
119 | wire ccx_aclk_out_7_unused; | |
120 | wire ccx_bclk_out_7_unused; | |
121 | wire pcx_mac7_scanin; | |
122 | wire pcx_mac7_scanout; | |
123 | wire [7:4] arb_grant_l_a_unused; | |
124 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
125 | wire [7:4] arb_qsel0_l_a_unused; | |
126 | wire [7:4] arb_qsel1_l_a_unused; | |
127 | wire [7:4] arb_shift_l_a_unused; | |
128 | wire [3:0] arb_grant_r_a_unused; | |
129 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
130 | wire [3:0] arb_qsel0_r_a_unused; | |
131 | wire [3:0] arb_qsel1_r_a_unused; | |
132 | wire [3:0] arb_shift_r_a_unused; | |
133 | wire scan_rep_out; | |
134 | ||
135 | ||
136 | // Beginning of automatic outputs (from unused autoinst outputs) | |
137 | output [129:0] pcx_scache_data_x_; // From mac3 of pcx_mcr_dp.v | |
138 | // End of automatics | |
139 | ||
140 | // Beginning of automatic inputs (from unused autoinst inputs) | |
141 | input [7:0] arb_grant_l_a; // To mac0 of pcx_mar_dp.v, ... | |
142 | input [7:0] arb_q0_holdbar_l_a; // To mac0 of pcx_mar_dp.v, ... | |
143 | input [7:0] arb_qsel0_l_a; // To mac0 of pcx_mar_dp.v, ... | |
144 | input [7:0] arb_qsel1_l_a; // To mac0 of pcx_mar_dp.v, ... | |
145 | input [7:0] arb_shift_l_a; // To mac0 of pcx_mar_dp.v, ... | |
146 | input [7:0] arb_grant_r_a; // To mac0 of pcx_mar_dp.v, ... | |
147 | input [7:0] arb_q0_holdbar_r_a; // To mac0 of pcx_mar_dp.v, ... | |
148 | input [7:0] arb_qsel0_r_a; // To mac0 of pcx_mar_dp.v, ... | |
149 | input [7:0] arb_qsel1_r_a; // To mac0 of pcx_mar_dp.v, ... | |
150 | input [7:0] arb_shift_r_a; // To mac0 of pcx_mar_dp.v, ... | |
151 | input [129:0] spc0_pcx_data_a; // To mac0 of pcx_mar_dp.v | |
152 | input [129:0] spc1_pcx_data_a; // To mac1 of pcx_mbr_dp.v | |
153 | input [129:0] spc2_pcx_data_a; // To mac2 of pcx_mbr_dp.v | |
154 | input [129:0] spc3_pcx_data_a; // To mac3 of pcx_mcr_dp.v | |
155 | input [129:0] spc4_pcx_data_a; // To mac4 of pcx_mbl_dp.v | |
156 | input [129:0] spc5_pcx_data_a; // To mac5 of pcx_mbl_dp.v | |
157 | input [129:0] spc6_pcx_data_a; // To mac6 of pcx_mbl_dp.v | |
158 | input [129:0] spc7_pcx_data_a; // To mac7 of pcx_mal_dp.v | |
159 | // End of automatics | |
160 | // globals | |
161 | input tcu_scan_en ; | |
162 | input l2clk; | |
163 | input tcu_pce_ov; // scan signals | |
164 | input ccx_aclk; | |
165 | input ccx_bclk; | |
166 | input scan_in; | |
167 | output scan_out; | |
168 | ||
169 | ||
170 | // sparc0 sparc2 sparc1 sparc3 sparc5 sparc7 sparc4 sparc6 | |
171 | // | | | | | | | | | |
172 | // v v v v v v v v | |
173 | // mac0 -> mac1 ->mac2 <-mac3 <- mac4 <- mac5 <- mac6 <- mac7 | |
174 | // al bl cl br br br br ar | |
175 | // | | |
176 | // buf | |
177 | // | | |
178 | // v | |
179 | // to sctag | |
180 | ||
181 | // mac0 arb inputs go through 1 buffer | |
182 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0],arb_qsel0_l_a[0],arb_qsel1_l_a[0], | |
183 | arb_shift_l_a[0],arb_q0_holdbar_l_a[0]}; | |
184 | ||
185 | assign {arb_grant_l_a_rep[0],arb_qsel0_l_a_rep[0],arb_qsel1_l_a_rep[0], | |
186 | arb_shift_l_a_rep[0],arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
187 | ||
188 | // mac1 arb input go through 1 buffer | |
189 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2],arb_q0_holdbar_l_a[2],arb_qsel0_l_a[2], | |
190 | arb_qsel1_l_a[2],arb_shift_l_a[2]}; | |
191 | ||
192 | assign {arb_grant_l_a_rep[2],arb_q0_holdbar_l_a_rep[2],arb_qsel0_l_a_rep[2], | |
193 | arb_qsel1_l_a_rep[2],arb_shift_l_a_rep[2]} = mac1_rep_out[4:0]; | |
194 | ||
195 | // mac2 arb inputs go through 2 buffers | |
196 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1], | |
197 | arb_qsel1_l_a[1],arb_shift_l_a[1]}; | |
198 | ||
199 | assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1], | |
200 | arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac2_rep_out[4:0]; | |
201 | ||
202 | // mac3 inputs go through 2 buffers | |
203 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3], | |
204 | arb_qsel1_l_a[3],arb_shift_l_a[3]}; | |
205 | ||
206 | assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3], | |
207 | arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac3_rep_out[4:0]; | |
208 | ||
209 | // mac4 inputs go through 2 buffers | |
210 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5], | |
211 | arb_qsel1_r_a[5],arb_shift_r_a[5]}; | |
212 | ||
213 | assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5], | |
214 | arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac4_rep_out[4:0]; | |
215 | ||
216 | // mac5 inputs go through 1 buffer | |
217 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7], | |
218 | arb_qsel1_r_a[7],arb_shift_r_a[7]}; | |
219 | ||
220 | assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7], | |
221 | arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac5_rep_out[4:0]; | |
222 | ||
223 | // mac6 inputs go through 1 buffer | |
224 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4],arb_q0_holdbar_r_a[4],arb_qsel0_r_a[4], | |
225 | arb_qsel1_r_a[4],arb_shift_r_a[4]}; | |
226 | ||
227 | assign {arb_grant_r_a_rep[4],arb_q0_holdbar_r_a_rep[4],arb_qsel0_r_a_rep[4], | |
228 | arb_qsel1_r_a_rep[4],arb_shift_r_a_rep[4]} = mac6_rep_out[4:0]; | |
229 | ||
230 | assign scan_rep_in = scan_in; | |
231 | ||
232 | ||
233 | ||
234 | pcx_rep_dp pcx_rep(.mac0_rep_out(mac0_rep_out[4:0]), | |
235 | .mac1_rep_out(mac1_rep_out[4:0]), | |
236 | .mac2_rep_out(mac2_rep_out[4:0]), | |
237 | .mac3_rep_out(mac3_rep_out[4:0]), | |
238 | .mac4_rep_out(mac4_rep_out[4:0]), | |
239 | .mac5_rep_out(mac5_rep_out[4:0]), | |
240 | .mac6_rep_out(mac6_rep_out[4:0]), | |
241 | .scan_rep_out(scan_rep_out), | |
242 | .mac0_rep_in(mac0_rep_in[4:0]), | |
243 | .mac1_rep_in(mac1_rep_in[4:0]), | |
244 | .mac2_rep_in(mac2_rep_in[4:0]), | |
245 | .mac3_rep_in(mac3_rep_in[4:0]), | |
246 | .mac4_rep_in(mac4_rep_in[4:0]), | |
247 | .mac5_rep_in(mac5_rep_in[4:0]), | |
248 | .mac6_rep_in(mac6_rep_in[4:0]), | |
249 | .scan_rep_in(scan_rep_in) | |
250 | ); | |
251 | ||
252 | ||
253 | /* | |
254 | pcx_mal_dp AUTO_TEMPLATE | |
255 | ( | |
256 | // Outputs | |
257 | .data_out_x_ (col@_data_x_[129:0]), | |
258 | // Inputs | |
259 | .arb_grant_a(arb_grant_l_a[@]), | |
260 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
261 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
262 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
263 | .arb_shift_a(arb_shift_l_a[@]), | |
264 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
265 | .l2clk (l2clk)); | |
266 | */ | |
267 | ||
268 | // do not use autoinstancing. | |
269 | // connections have been modified to match the cpu floorplan | |
270 | // src_pcx_data_a has to be manually connected. | |
271 | ||
272 | // input from sp0 | |
273 | pcx_mal_dp pcx_mac0 ( | |
274 | // Outputs | |
275 | .data_out_x_ (col0_data_x_[129:0]), // Templated | |
276 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
277 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
278 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
279 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
280 | // Inputs | |
281 | .arb_grant_a (arb_grant_l_a_rep[0]), // Templated | |
282 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated | |
283 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated | |
284 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated | |
285 | .arb_shift_a (arb_shift_l_a_rep[0]), // Templated | |
286 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), // Templated | |
287 | .scan_in(pcx_mac0_scanin), | |
288 | .scan_out(pcx_mac0_scanout), | |
289 | .l2clk (l2clk), // Templated | |
290 | .tcu_scan_en (tcu_scan_en_out[1]), | |
291 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
292 | .ccx_aclk (ccx_aclk_out[1]), | |
293 | .ccx_bclk (ccx_bclk_out[1]) | |
294 | ); | |
295 | ||
296 | ||
297 | /* | |
298 | pcx_mbl_dp AUTO_TEMPLATE | |
299 | ( | |
300 | // Outputs | |
301 | .data_out_x_ (col@_data_x_[129:0]), | |
302 | // Inputs | |
303 | .arb_grant_a(arb_grant_l_a[@]), | |
304 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
305 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
306 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
307 | .arb_shift_a(arb_shift_l_a[@]), | |
308 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
309 | .data_prev_x_(col@"(- @ 1)"_data_x_[129:0]), | |
310 | .l2clk (l2clk)); | |
311 | */ | |
312 | ||
313 | ||
314 | ||
315 | // input from spc2 | |
316 | pcx_mbl_dp pcx_mac1( | |
317 | // Outputs | |
318 | .data_out_x_ (col1_data_x_[129:0]), // Templated | |
319 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
320 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
321 | .ccx_aclk_out (ccx_aclk_out[1]), | |
322 | .ccx_bclk_out (ccx_bclk_out[1]), | |
323 | // Inputs | |
324 | .arb_grant_a (arb_grant_l_a_rep[2]), // Templated | |
325 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), // Templated | |
326 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), // Templated | |
327 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), // Templated | |
328 | .arb_shift_a (arb_shift_l_a_rep[2]), // Templated | |
329 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), // Templated | |
330 | .data_prev_x_ (col0_data_x_[129:0]), // Templated | |
331 | .scan_in(pcx_mac1_scanin), | |
332 | .scan_out(pcx_mac1_scanout), | |
333 | .l2clk (l2clk), // Templated | |
334 | .tcu_scan_en (tcu_scan_en_out[2]), | |
335 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
336 | .ccx_aclk (ccx_aclk_out[2]), | |
337 | .ccx_bclk (ccx_bclk_out[2]) | |
338 | ); | |
339 | ||
340 | ||
341 | /* | |
342 | pcx_mcl_dp AUTO_TEMPLATE | |
343 | ( | |
344 | // Outputs | |
345 | .data_out_x_ (pcx_scache_data_x_[129:0]), | |
346 | // Inputs | |
347 | .arb_grant_a(arb_grant_l_a[@]), | |
348 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
349 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
350 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
351 | .arb_shift_a(arb_shift_l_a[@]), | |
352 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
353 | .data_crit_x_(col@"(+ @ 1)"_data_x_[129:0]), | |
354 | .data_ncrit_x_(col@"(- @ 1)"_data_x_[129:0]), | |
355 | .l2clk (l2clk)) | |
356 | */ | |
357 | ||
358 | // input from spc1 | |
359 | pcx_mcl_dp pcx_mac2( | |
360 | // Outputs | |
361 | .data_out_x_ (pcx_scache_data_x_[129:0]), // Templated | |
362 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
363 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
364 | .ccx_aclk_out (ccx_aclk_out[2]), | |
365 | .ccx_bclk_out (ccx_bclk_out[2]), | |
366 | // Inputs | |
367 | .arb_grant_a (arb_grant_l_a_rep[1]), // Templated | |
368 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated | |
369 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated | |
370 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated | |
371 | .arb_shift_a (arb_shift_l_a_rep[1]), // Templated | |
372 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), // Templated | |
373 | .data_crit_x_ (col3_data_x_[129:0]), // Templated | |
374 | .data_ncrit_x_ (col1_data_x_[129:0]), // Templated | |
375 | .scan_in(pcx_mac2_scanin), | |
376 | .scan_out(pcx_mac2_scanout), | |
377 | .l2clk (l2clk), | |
378 | .tcu_scan_en (tcu_scan_en_out[3]), | |
379 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
380 | .ccx_aclk (ccx_aclk_out[3]), | |
381 | .ccx_bclk (ccx_bclk_out[3]) | |
382 | ); | |
383 | ||
384 | /* | |
385 | pcx_mbr_dp AUTO_TEMPLATE | |
386 | ( | |
387 | // Outputs | |
388 | .data_out_x_ (col@_data_x_[129:0]), | |
389 | // Inputs | |
390 | .arb_grant_a(arb_grant_r_a_rep[@]), | |
391 | .arb_qsel0_a(arb_qsel0_r_a_rep[@]), | |
392 | .arb_qsel1_a(arb_qsel1_r_a_rep[@]), | |
393 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a_rep[@]), | |
394 | .arb_shift_a(arb_shift_r_a_rep[@]), | |
395 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
396 | .data_prev_x_(col@"(+ @ 1)"_data_x_[129:0]), | |
397 | .l2clk (l2clk)) | |
398 | */ | |
399 | ||
400 | // do not use autoinstancing. | |
401 | // connections have been modified to match the cpu floorplan | |
402 | // src_pcx_data_a has to be manually connected. | |
403 | ||
404 | // input from spc3 | |
405 | pcx_mbr_dp pcx_mac3( | |
406 | // Outputs | |
407 | .data_out_x_ (col3_data_x_[129:0]), // Templated | |
408 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
409 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
410 | .ccx_aclk_out (ccx_aclk_out[3]), | |
411 | .ccx_bclk_out (ccx_bclk_out[3]), | |
412 | // Inputs | |
413 | .arb_grant_a (arb_grant_l_a_rep[3]), // Templated | |
414 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated | |
415 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated | |
416 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated | |
417 | .arb_shift_a (arb_shift_l_a_rep[3]), // Templated | |
418 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), // Templated | |
419 | .data_prev_x_ (col4_data_x_[129:0]), // Templated | |
420 | .scan_in(pcx_mac3_scanin), | |
421 | .scan_out(pcx_mac3_scanout), | |
422 | .l2clk (l2clk), | |
423 | .tcu_scan_en (tcu_scan_en), | |
424 | .tcu_pce_ov (tcu_pce_ov), | |
425 | .ccx_aclk (ccx_aclk), | |
426 | .ccx_bclk (ccx_bclk) | |
427 | ); | |
428 | ||
429 | // input from spc5 | |
430 | pcx_mbr_dp pcx_mac4( | |
431 | // Outputs | |
432 | .data_out_x_ (col4_data_x_[129:0]), // Templated | |
433 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
434 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
435 | .ccx_aclk_out (ccx_aclk_out[4]), | |
436 | .ccx_bclk_out (ccx_bclk_out[4]), | |
437 | // Inputs | |
438 | .arb_grant_a (arb_grant_r_a_rep[5]), // Templated | |
439 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated | |
440 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated | |
441 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated | |
442 | .arb_shift_a (arb_shift_r_a_rep[5]), // Templated | |
443 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), // Templated | |
444 | .data_prev_x_ (col5_data_x_[129:0]), // Templated | |
445 | .scan_in(pcx_mac4_scanin), | |
446 | .scan_out(pcx_mac4_scanout), | |
447 | .l2clk (l2clk), | |
448 | .tcu_scan_en (tcu_scan_en_out[3]), | |
449 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
450 | .ccx_aclk (ccx_aclk_out[3]), | |
451 | .ccx_bclk (ccx_bclk_out[3]) | |
452 | ); | |
453 | ||
454 | // input from spc7 | |
455 | pcx_mbr_dp pcx_mac5( | |
456 | // Outputs | |
457 | .data_out_x_ (col5_data_x_[129:0]), // Templated | |
458 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
459 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
460 | .ccx_aclk_out (ccx_aclk_out[5]), | |
461 | .ccx_bclk_out (ccx_bclk_out[5]), | |
462 | // Inputs | |
463 | .arb_grant_a (arb_grant_r_a_rep[7]), // Templated | |
464 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated | |
465 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated | |
466 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated | |
467 | .arb_shift_a (arb_shift_r_a_rep[7]), // Templated | |
468 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), // Templated | |
469 | .data_prev_x_ (col6_data_x_[129:0]), // Templated | |
470 | .scan_in(pcx_mac5_scanin), | |
471 | .scan_out(pcx_mac5_scanout), | |
472 | .l2clk (l2clk), | |
473 | .tcu_scan_en (tcu_scan_en_out[4]), | |
474 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
475 | .ccx_aclk (ccx_aclk_out[4]), | |
476 | .ccx_bclk (ccx_bclk_out[4]) | |
477 | ); | |
478 | ||
479 | // input from spc4 | |
480 | pcx_mbr_dp pcx_mac6( | |
481 | // Outputs | |
482 | .data_out_x_ (col6_data_x_[129:0]), // Templated | |
483 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
484 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
485 | .ccx_aclk_out (ccx_aclk_out[6]), | |
486 | .ccx_bclk_out (ccx_bclk_out[6]), | |
487 | // Inputs | |
488 | .arb_grant_a (arb_grant_r_a_rep[4]), // Templated | |
489 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), // Templated | |
490 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), // Templated | |
491 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), // Templated | |
492 | .arb_shift_a (arb_shift_r_a_rep[4]), // Templated | |
493 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), // Templated | |
494 | .data_prev_x_ (col7_data_x_[129:0]), // Templated | |
495 | .scan_in(pcx_mac6_scanin), | |
496 | .scan_out(pcx_mac6_scanout), | |
497 | .l2clk (l2clk), | |
498 | .tcu_scan_en (tcu_scan_en_out[5]), | |
499 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
500 | .ccx_aclk (ccx_aclk_out[5]), | |
501 | .ccx_bclk (ccx_bclk_out[5]) | |
502 | ); | |
503 | ||
504 | /* | |
505 | pcx_mar_dp AUTO_TEMPLATE | |
506 | ( | |
507 | // Outputs | |
508 | .data_out_x_ (col@_data_x_[129:0]), | |
509 | // Inputs | |
510 | .arb_grant_a(arb_grant_r_a[@]), | |
511 | .arb_qsel0_a(arb_qsel0_r_a[@]), | |
512 | .arb_qsel1_a(arb_qsel1_r_a[@]), | |
513 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), | |
514 | .arb_shift_a(arb_shift_r_a[@]), | |
515 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
516 | .l2clk (l2clk)); | |
517 | */ | |
518 | ||
519 | // do not use autoinstancing. | |
520 | // connections have been modified to match the cpu floorplan | |
521 | // src_pcx_data_a has to be manually connected. | |
522 | ||
523 | // input from spc6 | |
524 | pcx_mar_dp pcx_mac7 ( | |
525 | // Outputs | |
526 | .data_out_x_ (col7_data_x_[129:0]), // Templated | |
527 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
528 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
529 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
530 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
531 | // Inputs | |
532 | .arb_grant_a (arb_grant_r_a[6]), // Templated | |
533 | .arb_qsel0_a (arb_qsel0_r_a[6]), // Templated | |
534 | .arb_qsel1_a (arb_qsel1_r_a[6]), // Templated | |
535 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), // Templated | |
536 | .arb_shift_a (arb_shift_r_a[6]), // Templated | |
537 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), // Templated | |
538 | .scan_in(pcx_mac7_scanin), | |
539 | .scan_out(pcx_mac7_scanout), | |
540 | .l2clk (l2clk), // Templated | |
541 | .tcu_scan_en (tcu_scan_en_out[6]), | |
542 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
543 | .ccx_aclk (ccx_aclk_out[6]), | |
544 | .ccx_bclk (ccx_bclk_out[6]) | |
545 | ); | |
546 | ||
547 | ||
548 | ||
549 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
550 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
551 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
552 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
553 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
554 | ||
555 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
556 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
557 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
558 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
559 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
560 | ||
561 | // fixscan start: | |
562 | assign pcx_mac0_scanin = scan_rep_out ; | |
563 | assign pcx_mac1_scanin = pcx_mac0_scanout ; | |
564 | assign pcx_mac2_scanin = pcx_mac1_scanout ; | |
565 | assign pcx_mac3_scanin = pcx_mac2_scanout ; | |
566 | assign pcx_mac4_scanin = pcx_mac3_scanout ; | |
567 | assign pcx_mac5_scanin = pcx_mac4_scanout ; | |
568 | assign pcx_mac6_scanin = pcx_mac5_scanout ; | |
569 | assign pcx_mac7_scanin = pcx_mac6_scanout ; | |
570 | assign scan_out = pcx_mac7_scanout ; | |
571 | // fixscan end: | |
572 | endmodule | |
573 | ||
574 | // Local Variables: | |
575 | // verilog-library-directories:("." "v") | |
576 | // End: | |
577 | ||
578 | ||
579 | ||
580 | // | |
581 | // buff macro | |
582 | // | |
583 | // | |
584 | ||
585 | ||
586 | ||
587 | ||
588 | ||
589 | module pcx_dpsc_buff_macro__dbuff_32x__stack_6l__width_5 ( | |
590 | din, | |
591 | dout); | |
592 | input [4:0] din; | |
593 | output [4:0] dout; | |
594 | ||
595 | ||
596 | ||
597 | ||
598 | ||
599 | ||
600 | buff #(5) d0_0 ( | |
601 | .in(din[4:0]), | |
602 | .out(dout[4:0]) | |
603 | ); | |
604 | ||
605 | ||
606 | ||
607 | ||
608 | ||
609 | ||
610 | ||
611 | ||
612 | endmodule | |
613 | ||
614 | ||
615 | ||
616 | ||
617 | ||
618 | // | |
619 | // buff macro | |
620 | // | |
621 | // | |
622 | ||
623 | ||
624 | ||
625 | ||
626 | ||
627 | module pcx_dpsc_buff_macro__dbuff_32x__stack_none__width_1 ( | |
628 | din, | |
629 | dout); | |
630 | input [0:0] din; | |
631 | output [0:0] dout; | |
632 | ||
633 | ||
634 | ||
635 | ||
636 | ||
637 | ||
638 | buff #(1) d0_0 ( | |
639 | .in(din[0:0]), | |
640 | .out(dout[0:0]) | |
641 | ); | |
642 | ||
643 | ||
644 | ||
645 | ||
646 | ||
647 | ||
648 | ||
649 | ||
650 | endmodule | |
651 | ||
652 | ||
653 | ||
654 | // | |
655 | // buff macro | |
656 | // | |
657 | // | |
658 | ||
659 | ||
660 | ||
661 | ||
662 | ||
663 | module pcx_dpsc_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 ( | |
664 | din, | |
665 | dout); | |
666 | input [3:0] din; | |
667 | output [3:0] dout; | |
668 | ||
669 | ||
670 | ||
671 | ||
672 | ||
673 | ||
674 | buff #(4) d0_0 ( | |
675 | .in(din[3:0]), | |
676 | .out(dout[3:0]) | |
677 | ); | |
678 | ||
679 | ||
680 | ||
681 | ||
682 | ||
683 | ||
684 | ||
685 | ||
686 | endmodule | |
687 | ||
688 | ||
689 | ||
690 | ||
691 | ||
692 | ||
693 | ||
694 | ||
695 | ||
696 | // any PARAMS parms go into naming of macro | |
697 | ||
698 | module pcx_dpsc_ccx_l1clkhdr_ctl_macro__dl1hdr_24x ( | |
699 | l2clk, | |
700 | l1en, | |
701 | pce_ov, | |
702 | stop, | |
703 | se, | |
704 | l1clk); | |
705 | ||
706 | ||
707 | input l2clk; | |
708 | input l1en; | |
709 | input pce_ov; | |
710 | input stop; | |
711 | input se; | |
712 | output l1clk; | |
713 | ||
714 | ||
715 | ||
716 | ||
717 | ||
718 | cl_sc1_l1hdr_24x c_0 ( | |
719 | ||
720 | ||
721 | .l2clk(l2clk), | |
722 | .pce(l1en), | |
723 | .l1clk(l1clk), | |
724 | .se(se), | |
725 | .pce_ov(pce_ov), | |
726 | .stop(stop) | |
727 | ); | |
728 | ||
729 | ||
730 | ||
731 | ||
732 | ||
733 | ||
734 | endmodule | |
735 | ||
736 | ||
737 | ||
738 | ||
739 | ||
740 | ||
741 | ||
742 | ||
743 | ||
744 | // | |
745 | // ccx macro | |
746 | // | |
747 | // | |
748 | ||
749 | ||
750 | ||
751 | ||
752 | ||
753 | module pcx_dpsc_ccx_new_macro__type_a ( | |
754 | l2clk, | |
755 | l1clk, | |
756 | pce0, | |
757 | pce1, | |
758 | pce_ov, | |
759 | se, | |
760 | stop, | |
761 | siclk_in, | |
762 | soclk_in, | |
763 | scan_in, | |
764 | grant_a, | |
765 | qsel0, | |
766 | shift, | |
767 | data_a, | |
768 | data_x_l, | |
769 | scan_out); | |
770 | wire so5; | |
771 | wire siclk_out; | |
772 | wire soclk_out; | |
773 | wire l1clk0; | |
774 | wire l1clk1; | |
775 | wire grant_x; | |
776 | wire qsel0_buf; | |
777 | wire shift_buf; | |
778 | ||
779 | input l2clk; | |
780 | input l1clk; | |
781 | input pce0; | |
782 | input pce1; | |
783 | input pce_ov; | |
784 | input se; | |
785 | input stop; | |
786 | input siclk_in; | |
787 | input soclk_in; | |
788 | input scan_in; | |
789 | input grant_a; | |
790 | input qsel0; | |
791 | input shift; | |
792 | input [9:0] data_a; | |
793 | output [9:0] data_x_l; | |
794 | output scan_out; | |
795 | cl_dp1_ccxhdr c0 ( | |
796 | .si(scan_in), | |
797 | .so(so5), | |
798 | .l2clk(l2clk), | |
799 | .pce0(pce0), | |
800 | .pce1(pce1), | |
801 | .pce_ov(pce_ov), | |
802 | .stop(stop), | |
803 | .siclk_in(siclk_in), | |
804 | .soclk_in(soclk_in), | |
805 | .siclk_out(siclk_out), | |
806 | .soclk_out(soclk_out), | |
807 | .l1clk0(l1clk0), | |
808 | .l1clk1(l1clk1), | |
809 | .se(se), | |
810 | .l1clk(l1clk), | |
811 | .grant_a(grant_a), | |
812 | .grant_x(grant_x), | |
813 | .qsel0(qsel0), | |
814 | .qsel0_buf(qsel0_buf), | |
815 | .shift(shift), | |
816 | .shift_buf(shift_buf) | |
817 | ); | |
818 | ||
819 | ||
820 | ||
821 | ||
822 | ||
823 | ||
824 | ccx_mac_a #(10) mac_a( | |
825 | .siclk(siclk_out), | |
826 | .soclk(soclk_out), | |
827 | .data_a(data_a[9:0]), | |
828 | .data_x_l(data_x_l[9:0]), | |
829 | .si(so5), | |
830 | .so(scan_out), | |
831 | .l1clk0(l1clk0), | |
832 | .l1clk1(l1clk1), | |
833 | .grant_x(grant_x), | |
834 | .qsel0_buf(qsel0_buf), | |
835 | .shift_buf(shift_buf) | |
836 | ); | |
837 | ||
838 | ||
839 | ||
840 | ||
841 | ||
842 | ||
843 | ||
844 | ||
845 | ||
846 | ||
847 | ||
848 | ||
849 | ||
850 | ||
851 | endmodule | |
852 | ||
853 | ||
854 | // | |
855 | //// scan renames | |
856 | //assign pce_ov = tcu_pce_ov; | |
857 | //assign stop = tcu_clk_stop; | |
858 | //assign siclk = tcu_aclk; | |
859 | //assign soclk = tcu_bclk; | |
860 | //// end scan | |
861 | // | |
862 | //buff_macro i_buf_grant (width=1, stack=30c) | |
863 | //( | |
864 | // .din (arb_grant_a), | |
865 | // .dout (grant_a), | |
866 | // ); | |
867 | // | |
868 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
869 | //( | |
870 | // .scan_in(i_dff_grant_x_scanin), | |
871 | // .scan_out(i_dff_grant_x_scanout), | |
872 | // .clk (l2clk), | |
873 | // .din ({12{grant_a}}), | |
874 | // .dout (grant_x[11:0]), | |
875 | // .en (1'b1), | |
876 | // ); | |
877 | // | |
878 | // | |
879 | //// DATAPATH SECTION | |
880 | // | |
881 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
882 | //( | |
883 | // .scan_in(i_dff_q1_2_scanin), | |
884 | // .scan_out(i_dff_q1_2_scanout), | |
885 | // .clk (l2clk), | |
886 | // .din (src_pcx_data_a[129:90]), | |
887 | // .dout (q1_dataout[129:90]), | |
888 | // .en (arb_qsel1_a), | |
889 | // ); | |
890 | // | |
891 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
892 | //( | |
893 | // .scan_in(i_dff_q1_1_scanin), | |
894 | // .scan_out(i_dff_q1_1_scanout), | |
895 | // .clk (l2clk), | |
896 | // .din (src_pcx_data_a[89:40]), | |
897 | // .dout (q1_dataout[89:40]), | |
898 | // .en (arb_qsel1_a), | |
899 | // ); | |
900 | // | |
901 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
902 | //( | |
903 | // .scan_in(i_dff_q1_0_scanin), | |
904 | // .scan_out(i_dff_q1_0_scanout), | |
905 | // .clk (l2clk), | |
906 | // .din (src_pcx_data_a[39:0]), | |
907 | // .dout (q1_dataout[39:0]), | |
908 | // .en (arb_qsel1_a), | |
909 | // ); | |
910 | // | |
911 | ////assign q0_datain_ca[149:0] = | |
912 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
913 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
914 | // | |
915 | // | |
916 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
917 | //( | |
918 | // .din0 (src_pcx_data_a[129:90]), | |
919 | // .din1 (q1_dataout[129:90]), | |
920 | // .sel0 (arb_qsel0_a), | |
921 | // .sel1 (arb_shift_a), | |
922 | // .dout (q0_datain_a[129:90]), | |
923 | // ); | |
924 | // | |
925 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
926 | //( | |
927 | // .din0 (src_pcx_data_a[89:40]), | |
928 | // .din1 (q1_dataout[89:40]), | |
929 | // .sel0 (arb_qsel0_a), | |
930 | // .sel1 (arb_shift_a), | |
931 | // .dout (q0_datain_a[89:40]), | |
932 | // ); | |
933 | // | |
934 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
935 | //( | |
936 | // .din0 (src_pcx_data_a[39:0]), | |
937 | // .din1 (q1_dataout[39:0]), | |
938 | // .sel0 (arb_qsel0_a), | |
939 | // .sel1 (arb_shift_a), | |
940 | // .dout (q0_datain_a[39:0]), | |
941 | // ); | |
942 | // | |
943 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
944 | //( | |
945 | // .scan_in(i_dff_q0_2_scanin), | |
946 | // .scan_out(i_dff_q0_2_scanout), | |
947 | // .clk (l2clk), | |
948 | // .din (q0_datain_a[129:90]), | |
949 | // .dout (q0_dataout[129:90]), | |
950 | // .en (arb_q0_holdbar_a), | |
951 | // ); | |
952 | // | |
953 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
954 | //( | |
955 | // .scan_in(i_dff_q0_1_scanin), | |
956 | // .scan_out(i_dff_q0_1_scanout), | |
957 | // .clk (l2clk), | |
958 | // .din (q0_datain_a[89:40]), | |
959 | // .dout (q0_dataout[89:40]), | |
960 | // .en (arb_q0_holdbar_a), | |
961 | // ); | |
962 | // | |
963 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
964 | //( | |
965 | // .scan_in(i_dff_q0_0_scanin), | |
966 | // .scan_out(i_dff_q0_0_scanout), | |
967 | // .clk (l2clk), | |
968 | // .din (q0_datain_a[39:0]), | |
969 | // .dout (q0_dataout[39:0]), | |
970 | // .en (arb_q0_holdbar_a), | |
971 | // ); | |
972 | // | |
973 | ////MUX | |
974 | // | |
975 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
976 | //( | |
977 | // .din0 (q0_dataout[129:90]), | |
978 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
979 | // .dout (data_x_[129:90]), | |
980 | // ); | |
981 | // | |
982 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
983 | //( | |
984 | // .din0 (q0_dataout[89:40]), | |
985 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
986 | // .dout (data_x_[89:40]), | |
987 | // ); | |
988 | // | |
989 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
990 | //( | |
991 | // .din0 (q0_dataout[39:0]), | |
992 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
993 | // .dout (data_x_[39:0]), | |
994 | // ); | |
995 | // | |
996 | // | |
997 | //nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c) | |
998 | //( | |
999 | // .din0 (data_x_[129:90]), | |
1000 | // .din1 (data_prev_x_[129:90]), | |
1001 | // .dout (data_out_x[129:90]) | |
1002 | // ); | |
1003 | // | |
1004 | //nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c) | |
1005 | //( | |
1006 | // .din0 (data_x_[89:40]), | |
1007 | // .din1 (data_prev_x_[89:40]), | |
1008 | // .dout (data_out_x[89:40]) | |
1009 | // ); | |
1010 | // | |
1011 | //nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c) | |
1012 | //( | |
1013 | // .din0 (data_x_[39:0]), | |
1014 | // .din1 (data_prev_x_[39:0]), | |
1015 | // .dout (data_out_x[39:0]) | |
1016 | // ); | |
1017 | // | |
1018 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
1019 | //( | |
1020 | // .din (data_out_x[129:90]), | |
1021 | // .dout (data_out_x_[129:90]) | |
1022 | // ); | |
1023 | // | |
1024 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
1025 | //( | |
1026 | // .din (data_out_x[89:40]), | |
1027 | // .dout (data_out_x_[89:40]) | |
1028 | // ); | |
1029 | // | |
1030 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
1031 | //( | |
1032 | // .din (data_out_x[39:0]), | |
1033 | // .dout (data_out_x_[39:0]) | |
1034 | // ); | |
1035 | // | |
1036 | //// fixscan start: | |
1037 | //assign i_dff_grant_x_scanin = scan_in ; | |
1038 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1039 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1040 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1041 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1042 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1043 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1044 | //assign scan_out = i_dff_q0_0_scanout ; | |
1045 | //// fixscan end: | |
1046 | //endmodule | |
1047 | // | |
1048 | // Local Variables: | |
1049 | // verilog-library-directories:("." "v") | |
1050 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1051 | // End: | |
1052 | // | |
1053 | ||
1054 | ||
1055 | // | |
1056 | // ccx macro | |
1057 | // | |
1058 | // | |
1059 | ||
1060 | ||
1061 | ||
1062 | ||
1063 | ||
1064 | module pcx_dpsc_ccx_new_macro__type_b_l ( | |
1065 | l2clk, | |
1066 | l1clk, | |
1067 | pce0, | |
1068 | pce1, | |
1069 | pce_ov, | |
1070 | se, | |
1071 | stop, | |
1072 | siclk_in, | |
1073 | soclk_in, | |
1074 | scan_in, | |
1075 | grant_a, | |
1076 | qsel0, | |
1077 | shift, | |
1078 | data_a, | |
1079 | data_prev_x_l, | |
1080 | data_x_l, | |
1081 | scan_out); | |
1082 | wire so5; | |
1083 | wire siclk_out; | |
1084 | wire soclk_out; | |
1085 | wire l1clk0; | |
1086 | wire l1clk1; | |
1087 | wire grant_x; | |
1088 | wire qsel0_buf; | |
1089 | wire shift_buf; | |
1090 | ||
1091 | input l2clk; | |
1092 | input l1clk; | |
1093 | input pce0; | |
1094 | input pce1; | |
1095 | input pce_ov; | |
1096 | input se; | |
1097 | input stop; | |
1098 | input siclk_in; | |
1099 | input soclk_in; | |
1100 | input scan_in; | |
1101 | input grant_a; | |
1102 | input qsel0; | |
1103 | input shift; | |
1104 | input [9:0] data_a; | |
1105 | input [9:0] data_prev_x_l; | |
1106 | output [9:0] data_x_l; | |
1107 | output scan_out; | |
1108 | cl_dp1_ccxhdr c0 ( | |
1109 | .si(scan_in), | |
1110 | .so(so5), | |
1111 | .l2clk(l2clk), | |
1112 | .pce0(pce0), | |
1113 | .pce1(pce1), | |
1114 | .pce_ov(pce_ov), | |
1115 | .stop(stop), | |
1116 | .siclk_in(siclk_in), | |
1117 | .soclk_in(soclk_in), | |
1118 | .siclk_out(siclk_out), | |
1119 | .soclk_out(soclk_out), | |
1120 | .l1clk0(l1clk0), | |
1121 | .l1clk1(l1clk1), | |
1122 | .se(se), | |
1123 | .l1clk(l1clk), | |
1124 | .grant_a(grant_a), | |
1125 | .grant_x(grant_x), | |
1126 | .qsel0(qsel0), | |
1127 | .qsel0_buf(qsel0_buf), | |
1128 | .shift(shift), | |
1129 | .shift_buf(shift_buf) | |
1130 | ); | |
1131 | ||
1132 | ||
1133 | ||
1134 | ||
1135 | ||
1136 | ||
1137 | ccx_mac_b #(10) mac_b( | |
1138 | .siclk(siclk_out), | |
1139 | .soclk(soclk_out), | |
1140 | .data_a(data_a[9:0]), | |
1141 | .data_prev_x_l(data_prev_x_l[9:0]), | |
1142 | .data_x_l(data_x_l[9:0]), | |
1143 | .si(so5), | |
1144 | .so(scan_out), | |
1145 | .l1clk0(l1clk0), | |
1146 | .l1clk1(l1clk1), | |
1147 | .grant_x(grant_x), | |
1148 | .qsel0_buf(qsel0_buf), | |
1149 | .shift_buf(shift_buf) | |
1150 | ); | |
1151 | ||
1152 | ||
1153 | ||
1154 | ||
1155 | ||
1156 | ||
1157 | ||
1158 | ||
1159 | ||
1160 | ||
1161 | ||
1162 | ||
1163 | ||
1164 | ||
1165 | endmodule | |
1166 | ||
1167 | ||
1168 | // | |
1169 | //// scan renames | |
1170 | //assign pce_ov = tcu_pce_ov; | |
1171 | //assign stop = tcu_clk_stop; | |
1172 | //assign siclk = tcu_aclk; | |
1173 | //assign soclk = tcu_bclk; | |
1174 | //// end scan | |
1175 | // | |
1176 | //buff_macro i_buf_grant (width=1, stack=30c) | |
1177 | //( | |
1178 | // .din (arb_grant_a), | |
1179 | // .dout (grant_a), | |
1180 | // ); | |
1181 | // | |
1182 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
1183 | //( | |
1184 | // .scan_in(i_dff_grant_x_scanin), | |
1185 | // .scan_out(i_dff_grant_x_scanout), | |
1186 | // .clk (l2clk), | |
1187 | // .din ({12{grant_a}}), | |
1188 | // .dout (grant_x[11:0]), | |
1189 | // .en (1'b1), | |
1190 | // ); | |
1191 | // | |
1192 | //// DATAPATH SECTION | |
1193 | // | |
1194 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
1195 | //( | |
1196 | // .scan_in(i_dff_q1_2_scanin), | |
1197 | // .scan_out(i_dff_q1_2_scanout), | |
1198 | // .clk (l2clk), | |
1199 | // .din (src_pcx_data_a[129:90]), | |
1200 | // .dout (q1_dataout[129:90]), | |
1201 | // .en (arb_qsel1_a), | |
1202 | // ); | |
1203 | // | |
1204 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
1205 | //( | |
1206 | // .scan_in(i_dff_q1_1_scanin), | |
1207 | // .scan_out(i_dff_q1_1_scanout), | |
1208 | // .clk (l2clk), | |
1209 | // .din (src_pcx_data_a[89:40]), | |
1210 | // .dout (q1_dataout[89:40]), | |
1211 | // .en (arb_qsel1_a), | |
1212 | // ); | |
1213 | // | |
1214 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
1215 | //( | |
1216 | // .scan_in(i_dff_q1_0_scanin), | |
1217 | // .scan_out(i_dff_q1_0_scanout), | |
1218 | // .clk (l2clk), | |
1219 | // .din (src_pcx_data_a[39:0]), | |
1220 | // .dout (q1_dataout[39:0]), | |
1221 | // .en (arb_qsel1_a), | |
1222 | // ); | |
1223 | // | |
1224 | ////assign q0_datain_ca[149:0] = | |
1225 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
1226 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
1227 | // | |
1228 | // | |
1229 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
1230 | //( | |
1231 | // .din0 (src_pcx_data_a[129:90]), | |
1232 | // .din1 (q1_dataout[129:90]), | |
1233 | // .sel0 (arb_qsel0_a), | |
1234 | // .sel1 (arb_shift_a), | |
1235 | // .dout (q0_datain_a[129:90]), | |
1236 | // ); | |
1237 | // | |
1238 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
1239 | //( | |
1240 | // .din0 (src_pcx_data_a[89:40]), | |
1241 | // .din1 (q1_dataout[89:40]), | |
1242 | // .sel0 (arb_qsel0_a), | |
1243 | // .sel1 (arb_shift_a), | |
1244 | // .dout (q0_datain_a[89:40]), | |
1245 | // ); | |
1246 | // | |
1247 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
1248 | //( | |
1249 | // .din0 (src_pcx_data_a[39:0]), | |
1250 | // .din1 (q1_dataout[39:0]), | |
1251 | // .sel0 (arb_qsel0_a), | |
1252 | // .sel1 (arb_shift_a), | |
1253 | // .dout (q0_datain_a[39:0]), | |
1254 | // ); | |
1255 | // | |
1256 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
1257 | //( | |
1258 | // .scan_in(i_dff_q0_2_scanin), | |
1259 | // .scan_out(i_dff_q0_2_scanout), | |
1260 | // .clk (l2clk), | |
1261 | // .din (q0_datain_a[129:90]), | |
1262 | // .dout (q0_dataout[129:90]), | |
1263 | // .en (arb_q0_holdbar_a), | |
1264 | // ); | |
1265 | // | |
1266 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
1267 | //( | |
1268 | // .scan_in(i_dff_q0_1_scanin), | |
1269 | // .scan_out(i_dff_q0_1_scanout), | |
1270 | // .clk (l2clk), | |
1271 | // .din (q0_datain_a[89:40]), | |
1272 | // .dout (q0_dataout[89:40]), | |
1273 | // .en (arb_q0_holdbar_a), | |
1274 | // ); | |
1275 | // | |
1276 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
1277 | //( | |
1278 | // .scan_in(i_dff_q0_0_scanin), | |
1279 | // .scan_out(i_dff_q0_0_scanout), | |
1280 | // .clk (l2clk), | |
1281 | // .din (q0_datain_a[39:0]), | |
1282 | // .dout (q0_dataout[39:0]), | |
1283 | // .en (arb_q0_holdbar_a), | |
1284 | // ); | |
1285 | // | |
1286 | ////MUX | |
1287 | // | |
1288 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
1289 | //( | |
1290 | // .din0 (q0_dataout[129:90]), | |
1291 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
1292 | // .dout (data_x_[129:90]), | |
1293 | // ); | |
1294 | // | |
1295 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
1296 | //( | |
1297 | // .din0 (q0_dataout[89:40]), | |
1298 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
1299 | // .dout (data_x_[89:40]), | |
1300 | // ); | |
1301 | // | |
1302 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
1303 | //( | |
1304 | // .din0 (q0_dataout[39:0]), | |
1305 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
1306 | // .dout (data_x_[39:0]), | |
1307 | // ); | |
1308 | // | |
1309 | //nand_macro i_nand_data_crit_2 (width=40, ports=3, stack=50c) | |
1310 | //( | |
1311 | // .din0 (data_x_[129:90]), | |
1312 | // .din1 (data_crit_x_[129:90]), | |
1313 | // .din2 (data_ncrit_x_[129:90]), | |
1314 | // .dout (data_out_x[129:90]) | |
1315 | //); | |
1316 | // | |
1317 | //nand_macro i_nand_data_crit_1 (width=50, ports=3, stack=50c) | |
1318 | //( | |
1319 | // .din0 (data_x_[89:40]), | |
1320 | // .din1 (data_crit_x_[89:40]), | |
1321 | // .din2 (data_ncrit_x_[89:40]), | |
1322 | // .dout (data_out_x[89:40]) | |
1323 | //); | |
1324 | // | |
1325 | //nand_macro i_nand_data_crit_0 (width=40, ports=3, stack=50c) | |
1326 | //( | |
1327 | // .din0 (data_x_[39:0]), | |
1328 | // .din1 (data_crit_x_[39:0]), | |
1329 | // .din2 (data_ncrit_x_[39:0]), | |
1330 | // .dout (data_out_x[39:0]) | |
1331 | //); | |
1332 | // | |
1333 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
1334 | //( | |
1335 | // .din (data_out_x[129:90]), | |
1336 | // .dout (data_out_x_[129:90]) | |
1337 | // ); | |
1338 | // | |
1339 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
1340 | //( | |
1341 | // .din (data_out_x[89:40]), | |
1342 | // .dout (data_out_x_[89:40]) | |
1343 | // ); | |
1344 | // | |
1345 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
1346 | //( | |
1347 | // .din (data_out_x[39:0]), | |
1348 | // .dout (data_out_x_[39:0]) | |
1349 | // ); | |
1350 | // | |
1351 | //// fixscan start: | |
1352 | //assign i_dff_grant_x_scanin = scan_in ; | |
1353 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1354 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1355 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1356 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1357 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1358 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1359 | //assign scan_out = i_dff_q0_0_scanout ; | |
1360 | //// fixscan end: | |
1361 | //endmodule | |
1362 | // Local Variables: | |
1363 | // verilog-library-directories:("." "v") | |
1364 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1365 | // End: | |
1366 | // | |
1367 | ||
1368 | ||
1369 | // | |
1370 | // ccx macro | |
1371 | // | |
1372 | // | |
1373 | ||
1374 | ||
1375 | ||
1376 | ||
1377 | ||
1378 | module pcx_dpsc_ccx_new_macro__type_c_l ( | |
1379 | l2clk, | |
1380 | l1clk, | |
1381 | pce0, | |
1382 | pce1, | |
1383 | pce_ov, | |
1384 | se, | |
1385 | stop, | |
1386 | siclk_in, | |
1387 | soclk_in, | |
1388 | scan_in, | |
1389 | grant_a, | |
1390 | qsel0, | |
1391 | shift, | |
1392 | data_a, | |
1393 | data_crit_x_l, | |
1394 | data_ncrit_x_l, | |
1395 | data_x_l, | |
1396 | scan_out); | |
1397 | wire so5; | |
1398 | wire siclk_out; | |
1399 | wire soclk_out; | |
1400 | wire l1clk0; | |
1401 | wire l1clk1; | |
1402 | wire grant_x; | |
1403 | wire qsel0_buf; | |
1404 | wire shift_buf; | |
1405 | ||
1406 | input l2clk; | |
1407 | input l1clk; | |
1408 | input pce0; | |
1409 | input pce1; | |
1410 | input pce_ov; | |
1411 | input se; | |
1412 | input stop; | |
1413 | input siclk_in; | |
1414 | input soclk_in; | |
1415 | input scan_in; | |
1416 | input grant_a; | |
1417 | input qsel0; | |
1418 | input shift; | |
1419 | input [9:0] data_a; | |
1420 | input [9:0] data_crit_x_l; | |
1421 | input [9:0] data_ncrit_x_l; | |
1422 | output [9:0] data_x_l; | |
1423 | output scan_out; | |
1424 | cl_dp1_ccxhdr c0 ( | |
1425 | .si(scan_in), | |
1426 | .so(so5), | |
1427 | .l2clk(l2clk), | |
1428 | .pce0(pce0), | |
1429 | .pce1(pce1), | |
1430 | .pce_ov(pce_ov), | |
1431 | .stop(stop), | |
1432 | .siclk_in(siclk_in), | |
1433 | .soclk_in(soclk_in), | |
1434 | .siclk_out(siclk_out), | |
1435 | .soclk_out(soclk_out), | |
1436 | .l1clk0(l1clk0), | |
1437 | .l1clk1(l1clk1), | |
1438 | .se(se), | |
1439 | .l1clk(l1clk), | |
1440 | .grant_a(grant_a), | |
1441 | .grant_x(grant_x), | |
1442 | .qsel0(qsel0), | |
1443 | .qsel0_buf(qsel0_buf), | |
1444 | .shift(shift), | |
1445 | .shift_buf(shift_buf) | |
1446 | ); | |
1447 | ||
1448 | ||
1449 | ||
1450 | ||
1451 | ||
1452 | ||
1453 | ccx_mac_c #(10) mac_c( | |
1454 | .siclk(siclk_out), | |
1455 | .soclk(soclk_out), | |
1456 | .data_a(data_a[9:0]), | |
1457 | .data_crit_x_l(data_crit_x_l[9:0]), | |
1458 | .data_ncrit_x_l(data_ncrit_x_l[9:0]), | |
1459 | .data_x_l(data_x_l[9:0]), | |
1460 | .si(so5), | |
1461 | .so(scan_out), | |
1462 | .l1clk0(l1clk0), | |
1463 | .l1clk1(l1clk1), | |
1464 | .grant_x(grant_x), | |
1465 | .qsel0_buf(qsel0_buf), | |
1466 | .shift_buf(shift_buf) | |
1467 | ); | |
1468 | ||
1469 | ||
1470 | ||
1471 | ||
1472 | ||
1473 | ||
1474 | ||
1475 | ||
1476 | ||
1477 | ||
1478 | ||
1479 | ||
1480 | ||
1481 | ||
1482 | endmodule | |
1483 | ||
1484 | ||
1485 | // | |
1486 | //// scan renames | |
1487 | //assign pce_ov = tcu_pce_ov; | |
1488 | //assign stop = tcu_clk_stop; | |
1489 | //assign siclk = tcu_aclk; | |
1490 | //assign soclk = tcu_bclk; | |
1491 | //// end scan | |
1492 | // | |
1493 | //buff_macro i_buf_grant (width=1, stack=30c) | |
1494 | //( | |
1495 | // .din (arb_grant_a), | |
1496 | // .dout (grant_a), | |
1497 | // ); | |
1498 | // | |
1499 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
1500 | //( | |
1501 | // .scan_in(i_dff_grant_x_scanin), | |
1502 | // .scan_out(i_dff_grant_x_scanout), | |
1503 | // .clk (l2clk), | |
1504 | // .din ({12{grant_a}}), | |
1505 | // .dout (grant_x[11:0]), | |
1506 | // .en (1'b1), | |
1507 | // ); | |
1508 | // | |
1509 | // | |
1510 | //// DATAPATH SECTION | |
1511 | // | |
1512 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
1513 | //( | |
1514 | // .scan_in(i_dff_q1_2_scanin), | |
1515 | // .scan_out(i_dff_q1_2_scanout), | |
1516 | // .clk (l2clk), | |
1517 | // .din (src_pcx_data_a[129:90]), | |
1518 | // .dout (q1_dataout[129:90]), | |
1519 | // .en (arb_qsel1_a), | |
1520 | // ); | |
1521 | // | |
1522 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
1523 | //( | |
1524 | // .scan_in(i_dff_q1_1_scanin), | |
1525 | // .scan_out(i_dff_q1_1_scanout), | |
1526 | // .clk (l2clk), | |
1527 | // .din (src_pcx_data_a[89:40]), | |
1528 | // .dout (q1_dataout[89:40]), | |
1529 | // .en (arb_qsel1_a), | |
1530 | // ); | |
1531 | // | |
1532 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
1533 | //( | |
1534 | // .scan_in(i_dff_q1_0_scanin), | |
1535 | // .scan_out(i_dff_q1_0_scanout), | |
1536 | // .clk (l2clk), | |
1537 | // .din (src_pcx_data_a[39:0]), | |
1538 | // .dout (q1_dataout[39:0]), | |
1539 | // .en (arb_qsel1_a), | |
1540 | // ); | |
1541 | // | |
1542 | ////assign q0_datain_ca[149:0] = | |
1543 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
1544 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
1545 | // | |
1546 | // | |
1547 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
1548 | //( | |
1549 | // .din0 (src_pcx_data_a[129:90]), | |
1550 | // .din1 (q1_dataout[129:90]), | |
1551 | // .sel0 (arb_qsel0_a), | |
1552 | // .sel1 (arb_shift_a), | |
1553 | // .dout (q0_datain_a[129:90]), | |
1554 | // ); | |
1555 | // | |
1556 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
1557 | //( | |
1558 | // .din0 (src_pcx_data_a[89:40]), | |
1559 | // .din1 (q1_dataout[89:40]), | |
1560 | // .sel0 (arb_qsel0_a), | |
1561 | // .sel1 (arb_shift_a), | |
1562 | // .dout (q0_datain_a[89:40]), | |
1563 | // ); | |
1564 | // | |
1565 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
1566 | //( | |
1567 | // .din0 (src_pcx_data_a[39:0]), | |
1568 | // .din1 (q1_dataout[39:0]), | |
1569 | // .sel0 (arb_qsel0_a), | |
1570 | // .sel1 (arb_shift_a), | |
1571 | // .dout (q0_datain_a[39:0]), | |
1572 | // ); | |
1573 | // | |
1574 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
1575 | //( | |
1576 | // .scan_in(i_dff_q0_2_scanin), | |
1577 | // .scan_out(i_dff_q0_2_scanout), | |
1578 | // .clk (l2clk), | |
1579 | // .din (q0_datain_a[129:90]), | |
1580 | // .dout (q0_dataout[129:90]), | |
1581 | // .en (arb_q0_holdbar_a), | |
1582 | // ); | |
1583 | // | |
1584 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
1585 | //( | |
1586 | // .scan_in(i_dff_q0_1_scanin), | |
1587 | // .scan_out(i_dff_q0_1_scanout), | |
1588 | // .clk (l2clk), | |
1589 | // .din (q0_datain_a[89:40]), | |
1590 | // .dout (q0_dataout[89:40]), | |
1591 | // .en (arb_q0_holdbar_a), | |
1592 | // ); | |
1593 | // | |
1594 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
1595 | //( | |
1596 | // .scan_in(i_dff_q0_0_scanin), | |
1597 | // .scan_out(i_dff_q0_0_scanout), | |
1598 | // .clk (l2clk), | |
1599 | // .din (q0_datain_a[39:0]), | |
1600 | // .dout (q0_dataout[39:0]), | |
1601 | // .en (arb_q0_holdbar_a), | |
1602 | // ); | |
1603 | // | |
1604 | ////MUX | |
1605 | // | |
1606 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
1607 | //( | |
1608 | // .din0 (q0_dataout[129:90]), | |
1609 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
1610 | // .dout (data_x_[129:90]), | |
1611 | // ); | |
1612 | // | |
1613 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
1614 | //( | |
1615 | // .din0 (q0_dataout[89:40]), | |
1616 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
1617 | // .dout (data_x_[89:40]), | |
1618 | // ); | |
1619 | // | |
1620 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
1621 | //( | |
1622 | // .din0 (q0_dataout[39:0]), | |
1623 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
1624 | // .dout (data_x_[39:0]), | |
1625 | // ); | |
1626 | // | |
1627 | // | |
1628 | //nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c) | |
1629 | //( | |
1630 | // .din0 (data_x_[129:90]), | |
1631 | // .din1 (data_prev_x_[129:90]), | |
1632 | // .dout (data_out_x[129:90]) | |
1633 | // ); | |
1634 | // | |
1635 | //nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c) | |
1636 | //( | |
1637 | // .din0 (data_x_[89:40]), | |
1638 | // .din1 (data_prev_x_[89:40]), | |
1639 | // .dout (data_out_x[89:40]) | |
1640 | // ); | |
1641 | // | |
1642 | //nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c) | |
1643 | //( | |
1644 | // .din0 (data_x_[39:0]), | |
1645 | // .din1 (data_prev_x_[39:0]), | |
1646 | // .dout (data_out_x[39:0]) | |
1647 | // ); | |
1648 | // | |
1649 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
1650 | //( | |
1651 | // .din (data_out_x[129:90]), | |
1652 | // .dout (data_out_x_[129:90]) | |
1653 | // ); | |
1654 | // | |
1655 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
1656 | //( | |
1657 | // .din (data_out_x[89:40]), | |
1658 | // .dout (data_out_x_[89:40]) | |
1659 | // ); | |
1660 | // | |
1661 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
1662 | //( | |
1663 | // .din (data_out_x[39:0]), | |
1664 | // .dout (data_out_x_[39:0]) | |
1665 | // ); | |
1666 | // | |
1667 | //// fixscan start: | |
1668 | //assign i_dff_grant_x_scanin = scan_in ; | |
1669 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1670 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1671 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1672 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1673 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1674 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1675 | //assign scan_out = i_dff_q0_0_scanout ; | |
1676 | //// fixscan end: | |
1677 | //endmodule | |
1678 | // | |
1679 | // Local Variables: | |
1680 | // verilog-library-directories:("." "v") | |
1681 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1682 | // End: | |
1683 | // | |
1684 | ||
1685 | ||
1686 | // | |
1687 | // ccx macro | |
1688 | // | |
1689 | // | |
1690 | ||
1691 | ||
1692 | ||
1693 | ||
1694 | ||
1695 | module pcx_dpsc_ccx_new_macro__type_b_r ( | |
1696 | l2clk, | |
1697 | l1clk, | |
1698 | pce0, | |
1699 | pce1, | |
1700 | pce_ov, | |
1701 | se, | |
1702 | stop, | |
1703 | siclk_in, | |
1704 | soclk_in, | |
1705 | scan_in, | |
1706 | grant_a, | |
1707 | qsel0, | |
1708 | shift, | |
1709 | data_a, | |
1710 | data_prev_x_l, | |
1711 | data_x_l, | |
1712 | scan_out); | |
1713 | wire so5; | |
1714 | wire siclk_out; | |
1715 | wire soclk_out; | |
1716 | wire l1clk0; | |
1717 | wire l1clk1; | |
1718 | wire grant_x; | |
1719 | wire qsel0_buf; | |
1720 | wire shift_buf; | |
1721 | ||
1722 | input l2clk; | |
1723 | input l1clk; | |
1724 | input pce0; | |
1725 | input pce1; | |
1726 | input pce_ov; | |
1727 | input se; | |
1728 | input stop; | |
1729 | input siclk_in; | |
1730 | input soclk_in; | |
1731 | input scan_in; | |
1732 | input grant_a; | |
1733 | input qsel0; | |
1734 | input shift; | |
1735 | input [9:0] data_a; | |
1736 | input [9:0] data_prev_x_l; | |
1737 | output [9:0] data_x_l; | |
1738 | output scan_out; | |
1739 | cl_dp1_ccxhdr c0 ( | |
1740 | .si(scan_in), | |
1741 | .so(so5), | |
1742 | .l2clk(l2clk), | |
1743 | .pce0(pce0), | |
1744 | .pce1(pce1), | |
1745 | .pce_ov(pce_ov), | |
1746 | .stop(stop), | |
1747 | .siclk_in(siclk_in), | |
1748 | .soclk_in(soclk_in), | |
1749 | .siclk_out(siclk_out), | |
1750 | .soclk_out(soclk_out), | |
1751 | .l1clk0(l1clk0), | |
1752 | .l1clk1(l1clk1), | |
1753 | .se(se), | |
1754 | .l1clk(l1clk), | |
1755 | .grant_a(grant_a), | |
1756 | .grant_x(grant_x), | |
1757 | .qsel0(qsel0), | |
1758 | .qsel0_buf(qsel0_buf), | |
1759 | .shift(shift), | |
1760 | .shift_buf(shift_buf) | |
1761 | ); | |
1762 | ||
1763 | ||
1764 | ||
1765 | ||
1766 | ||
1767 | ||
1768 | ccx_mac_b #(10) mac_b( | |
1769 | .siclk(siclk_out), | |
1770 | .soclk(soclk_out), | |
1771 | .data_a(data_a[9:0]), | |
1772 | .data_prev_x_l(data_prev_x_l[9:0]), | |
1773 | .data_x_l(data_x_l[9:0]), | |
1774 | .si(so5), | |
1775 | .so(scan_out), | |
1776 | .l1clk0(l1clk0), | |
1777 | .l1clk1(l1clk1), | |
1778 | .grant_x(grant_x), | |
1779 | .qsel0_buf(qsel0_buf), | |
1780 | .shift_buf(shift_buf) | |
1781 | ); | |
1782 | ||
1783 | ||
1784 | ||
1785 | ||
1786 | ||
1787 | ||
1788 | ||
1789 | ||
1790 | ||
1791 | ||
1792 | ||
1793 | ||
1794 | ||
1795 | ||
1796 | endmodule | |
1797 | ||
1798 | ||
1799 | // | |
1800 | //// scan renames | |
1801 | //assign pce_ov = tcu_pce_ov; | |
1802 | //assign stop = tcu_clk_stop; | |
1803 | //assign siclk = ccx_aclk; | |
1804 | //assign soclk = ccx_bclk; | |
1805 | //// end scan | |
1806 | // | |
1807 | //// buffer the grant signal | |
1808 | // | |
1809 | //buff_macro i_buf_grant (width=1, stack=30c) | |
1810 | //( | |
1811 | // .din (arb_grant_a), | |
1812 | // .dout (grant_a), | |
1813 | // ); | |
1814 | // | |
1815 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
1816 | //( | |
1817 | // .scan_in(i_dff_grant_x_scanin), | |
1818 | // .scan_out(i_dff_grant_x_scanout), | |
1819 | // .clk (l2clk), | |
1820 | // .din ({12{grant_a}}), | |
1821 | // .dout (grant_x[11:0]), | |
1822 | // .en (1'b1), | |
1823 | // ); | |
1824 | // | |
1825 | // | |
1826 | //// DATAPATH SECTION | |
1827 | // | |
1828 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
1829 | //( | |
1830 | // .scan_in(i_dff_q1_2_scanin), | |
1831 | // .scan_out(i_dff_q1_2_scanout), | |
1832 | // .clk (l2clk), | |
1833 | // .din (src_pcx_data_a[129:90]), | |
1834 | // .dout (q1_dataout[129:90]), | |
1835 | // .en (arb_qsel1_a), | |
1836 | // ); | |
1837 | // | |
1838 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
1839 | //( | |
1840 | // .scan_in(i_dff_q1_1_scanin), | |
1841 | // .scan_out(i_dff_q1_1_scanout), | |
1842 | // .clk (l2clk), | |
1843 | // .din (src_pcx_data_a[89:40]), | |
1844 | // .dout (q1_dataout[89:40]), | |
1845 | // .en (arb_qsel1_a), | |
1846 | // ); | |
1847 | // | |
1848 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
1849 | //( | |
1850 | // .scan_in(i_dff_q1_0_scanin), | |
1851 | // .scan_out(i_dff_q1_0_scanout), | |
1852 | // .clk (l2clk), | |
1853 | // .din (src_pcx_data_a[39:0]), | |
1854 | // .dout (q1_dataout[39:0]), | |
1855 | // .en (arb_qsel1_a), | |
1856 | // ); | |
1857 | // | |
1858 | ////assign q0_datain_ca[129:0] = | |
1859 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[129:0] : 150'd0) | | |
1860 | //// (arb_pcxdp_shift_cx ? q1_dataout[129:0] : 150'd0) ; | |
1861 | // | |
1862 | // | |
1863 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
1864 | //( | |
1865 | // .din0 (src_pcx_data_a[129:90]), | |
1866 | // .din1 (q1_dataout[129:90]), | |
1867 | // .sel0 (arb_qsel0_a), | |
1868 | // .sel1 (arb_shift_a), | |
1869 | // .dout (q0_datain_a[129:90]), | |
1870 | // ); | |
1871 | // | |
1872 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
1873 | //( | |
1874 | // .din0 (src_pcx_data_a[89:40]), | |
1875 | // .din1 (q1_dataout[89:40]), | |
1876 | // .sel0 (arb_qsel0_a), | |
1877 | // .sel1 (arb_shift_a), | |
1878 | // .dout (q0_datain_a[89:40]), | |
1879 | // ); | |
1880 | // | |
1881 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
1882 | //( | |
1883 | // .din0 (src_pcx_data_a[39:0]), | |
1884 | // .din1 (q1_dataout[39:0]), | |
1885 | // .sel0 (arb_qsel0_a), | |
1886 | // .sel1 (arb_shift_a), | |
1887 | // .dout (q0_datain_a[39:0]), | |
1888 | // ); | |
1889 | // | |
1890 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
1891 | //( | |
1892 | // .scan_in(i_dff_q0_2_scanin), | |
1893 | // .scan_out(i_dff_q0_2_scanout), | |
1894 | // .clk (l2clk), | |
1895 | // .din (q0_datain_a[129:90]), | |
1896 | // .dout (q0_dataout[129:90]), | |
1897 | // .en (arb_q0_holdbar_a), | |
1898 | // ); | |
1899 | // | |
1900 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
1901 | //( | |
1902 | // .scan_in(i_dff_q0_1_scanin), | |
1903 | // .scan_out(i_dff_q0_1_scanout), | |
1904 | // .clk (l2clk), | |
1905 | // .din (q0_datain_a[89:40]), | |
1906 | // .dout (q0_dataout[89:40]), | |
1907 | // .en (arb_q0_holdbar_a), | |
1908 | // ); | |
1909 | // | |
1910 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
1911 | //( | |
1912 | // .scan_in(i_dff_q0_0_scanin), | |
1913 | // .scan_out(i_dff_q0_0_scanout), | |
1914 | // .clk (l2clk), | |
1915 | // .din (q0_datain_a[39:0]), | |
1916 | // .dout (q0_dataout[39:0]), | |
1917 | // .en (arb_q0_holdbar_a), | |
1918 | // ); | |
1919 | // | |
1920 | //// MUX | |
1921 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
1922 | //( | |
1923 | // .din0 (q0_dataout[129:90]), | |
1924 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
1925 | // .dout (data_out_x_[129:90]), | |
1926 | // ); | |
1927 | // | |
1928 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
1929 | //( | |
1930 | // .din0 (q0_dataout[89:40]), | |
1931 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
1932 | // .dout (data_out_x_[89:40]), | |
1933 | // ); | |
1934 | // | |
1935 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
1936 | //( | |
1937 | // .din0 (q0_dataout[39:0]), | |
1938 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
1939 | // .dout (data_out_x_[39:0]), | |
1940 | // ); | |
1941 | // | |
1942 | //// fixscan start: | |
1943 | //assign i_dff_grant_x_scanin = scan_in ; | |
1944 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1945 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1946 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1947 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1948 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1949 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1950 | //assign scan_out = i_dff_q0_0_scanout ; | |
1951 | //// fixscan end: | |
1952 | //endmodule | |
1953 | // | |
1954 | // Local Variables: | |
1955 | // verilog-library-directories:("." "v") | |
1956 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1957 | // End: | |
1958 | // | |
1959 | ||
1960 | ||
1961 | `endif // `ifndef FPGA | |
1962 | ||
1963 | `ifdef FPGA | |
1964 | `timescale 1 ns / 100 ps | |
1965 | module pcx_dpsc(pcx_scache_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a, | |
1966 | arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a, | |
1967 | arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a, | |
1968 | spc0_pcx_data_a, spc1_pcx_data_a, spc2_pcx_data_a, spc3_pcx_data_a, | |
1969 | spc4_pcx_data_a, spc5_pcx_data_a, spc6_pcx_data_a, spc7_pcx_data_a, | |
1970 | tcu_scan_en, l2clk, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_in, scan_out); | |
1971 | ||
1972 | output [129:0] pcx_scache_data_x_; | |
1973 | input [7:0] arb_grant_l_a; | |
1974 | input [7:0] arb_q0_holdbar_l_a; | |
1975 | input [7:0] arb_qsel0_l_a; | |
1976 | input [7:0] arb_qsel1_l_a; | |
1977 | input [7:0] arb_shift_l_a; | |
1978 | input [7:0] arb_grant_r_a; | |
1979 | input [7:0] arb_q0_holdbar_r_a; | |
1980 | input [7:0] arb_qsel0_r_a; | |
1981 | input [7:0] arb_qsel1_r_a; | |
1982 | input [7:0] arb_shift_r_a; | |
1983 | input [129:0] spc0_pcx_data_a; | |
1984 | input [129:0] spc1_pcx_data_a; | |
1985 | input [129:0] spc2_pcx_data_a; | |
1986 | input [129:0] spc3_pcx_data_a; | |
1987 | input [129:0] spc4_pcx_data_a; | |
1988 | input [129:0] spc5_pcx_data_a; | |
1989 | input [129:0] spc6_pcx_data_a; | |
1990 | input [129:0] spc7_pcx_data_a; | |
1991 | input tcu_scan_en; | |
1992 | input l2clk; | |
1993 | input tcu_pce_ov; | |
1994 | input ccx_aclk; | |
1995 | input ccx_bclk; | |
1996 | input scan_in; | |
1997 | output scan_out; | |
1998 | ||
1999 | wire [4:0] mac0_rep_in; | |
2000 | wire [3:0] arb_grant_l_a_rep; | |
2001 | wire [3:0] arb_qsel0_l_a_rep; | |
2002 | wire [3:0] arb_qsel1_l_a_rep; | |
2003 | wire [3:0] arb_shift_l_a_rep; | |
2004 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
2005 | wire [4:0] mac0_rep_out; | |
2006 | wire [4:0] mac1_rep_in; | |
2007 | wire [4:0] mac1_rep_out; | |
2008 | wire [4:0] mac2_rep_in; | |
2009 | wire [4:0] mac2_rep_out; | |
2010 | wire [4:0] mac3_rep_in; | |
2011 | wire [4:0] mac3_rep_out; | |
2012 | wire [4:0] mac4_rep_in; | |
2013 | wire [7:4] arb_grant_r_a_rep; | |
2014 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
2015 | wire [7:4] arb_qsel0_r_a_rep; | |
2016 | wire [7:4] arb_qsel1_r_a_rep; | |
2017 | wire [7:4] arb_shift_r_a_rep; | |
2018 | wire [4:0] mac4_rep_out; | |
2019 | wire [4:0] mac5_rep_in; | |
2020 | wire [4:0] mac5_rep_out; | |
2021 | wire [4:0] mac6_rep_in; | |
2022 | wire [4:0] mac6_rep_out; | |
2023 | wire scan_rep_in; | |
2024 | wire [129:0] col0_data_x_; | |
2025 | wire tcu_scan_en_out_0_unused; | |
2026 | wire tcu_pce_ov_out_0_unused; | |
2027 | wire ccx_aclk_out_0_unused; | |
2028 | wire ccx_bclk_out_0_unused; | |
2029 | wire pcx_mac0_scanin; | |
2030 | wire pcx_mac0_scanout; | |
2031 | wire [6:1] tcu_scan_en_out; | |
2032 | wire [6:1] tcu_pce_ov_out; | |
2033 | wire [6:1] ccx_aclk_out; | |
2034 | wire [6:1] ccx_bclk_out; | |
2035 | wire [129:0] col1_data_x_; | |
2036 | wire pcx_mac1_scanin; | |
2037 | wire pcx_mac1_scanout; | |
2038 | wire [129:0] col3_data_x_; | |
2039 | wire pcx_mac2_scanin; | |
2040 | wire pcx_mac2_scanout; | |
2041 | wire [129:0] col4_data_x_; | |
2042 | wire pcx_mac3_scanin; | |
2043 | wire pcx_mac3_scanout; | |
2044 | wire [129:0] col5_data_x_; | |
2045 | wire pcx_mac4_scanin; | |
2046 | wire pcx_mac4_scanout; | |
2047 | wire [129:0] col6_data_x_; | |
2048 | wire pcx_mac5_scanin; | |
2049 | wire pcx_mac5_scanout; | |
2050 | wire [129:0] col7_data_x_; | |
2051 | wire pcx_mac6_scanin; | |
2052 | wire pcx_mac6_scanout; | |
2053 | wire tcu_scan_en_out_7_unused; | |
2054 | wire tcu_pce_ov_out_7_unused; | |
2055 | wire ccx_aclk_out_7_unused; | |
2056 | wire ccx_bclk_out_7_unused; | |
2057 | wire pcx_mac7_scanin; | |
2058 | wire pcx_mac7_scanout; | |
2059 | wire [7:4] arb_grant_l_a_unused; | |
2060 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
2061 | wire [7:4] arb_qsel0_l_a_unused; | |
2062 | wire [7:4] arb_qsel1_l_a_unused; | |
2063 | wire [7:4] arb_shift_l_a_unused; | |
2064 | wire [3:0] arb_grant_r_a_unused; | |
2065 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
2066 | wire [3:0] arb_qsel0_r_a_unused; | |
2067 | wire [3:0] arb_qsel1_r_a_unused; | |
2068 | wire [3:0] arb_shift_r_a_unused; | |
2069 | wire scan_rep_out; | |
2070 | ||
2071 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0], arb_qsel0_l_a[0], | |
2072 | arb_qsel1_l_a[0], arb_shift_l_a[0], arb_q0_holdbar_l_a[0]}; | |
2073 | assign {arb_grant_l_a_rep[0], arb_qsel0_l_a_rep[0], | |
2074 | arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0], | |
2075 | arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
2076 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2], arb_q0_holdbar_l_a[2], | |
2077 | arb_qsel0_l_a[2], arb_qsel1_l_a[2], arb_shift_l_a[2]}; | |
2078 | assign {arb_grant_l_a_rep[2], arb_q0_holdbar_l_a_rep[2], | |
2079 | arb_qsel0_l_a_rep[2], arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2] | |
2080 | } = mac1_rep_out[4:0]; | |
2081 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1], | |
2082 | arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]}; | |
2083 | assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1], | |
2084 | arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1] | |
2085 | } = mac2_rep_out[4:0]; | |
2086 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3], | |
2087 | arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]}; | |
2088 | assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3], | |
2089 | arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3] | |
2090 | } = mac3_rep_out[4:0]; | |
2091 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5], | |
2092 | arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]}; | |
2093 | assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5], | |
2094 | arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5] | |
2095 | } = mac4_rep_out[4:0]; | |
2096 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7], | |
2097 | arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]}; | |
2098 | assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7], | |
2099 | arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7] | |
2100 | } = mac5_rep_out[4:0]; | |
2101 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4], arb_q0_holdbar_r_a[4], | |
2102 | arb_qsel0_r_a[4], arb_qsel1_r_a[4], arb_shift_r_a[4]}; | |
2103 | assign {arb_grant_r_a_rep[4], arb_q0_holdbar_r_a_rep[4], | |
2104 | arb_qsel0_r_a_rep[4], arb_qsel1_r_a_rep[4], arb_shift_r_a_rep[4] | |
2105 | } = mac6_rep_out[4:0]; | |
2106 | assign scan_rep_in = scan_in; | |
2107 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
2108 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
2109 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
2110 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
2111 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
2112 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
2113 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
2114 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
2115 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
2116 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
2117 | assign pcx_mac0_scanin = scan_rep_out; | |
2118 | assign pcx_mac1_scanin = pcx_mac0_scanout; | |
2119 | assign pcx_mac2_scanin = pcx_mac1_scanout; | |
2120 | assign pcx_mac3_scanin = pcx_mac2_scanout; | |
2121 | assign pcx_mac4_scanin = pcx_mac3_scanout; | |
2122 | assign pcx_mac5_scanin = pcx_mac4_scanout; | |
2123 | assign pcx_mac6_scanin = pcx_mac5_scanout; | |
2124 | assign pcx_mac7_scanin = pcx_mac6_scanout; | |
2125 | assign scan_out = pcx_mac7_scanout; | |
2126 | ||
2127 | pcx_rep_dp pcx_rep( | |
2128 | .mac0_rep_out (mac0_rep_out[4:0]), | |
2129 | .mac1_rep_out (mac1_rep_out[4:0]), | |
2130 | .mac2_rep_out (mac2_rep_out[4:0]), | |
2131 | .mac3_rep_out (mac3_rep_out[4:0]), | |
2132 | .mac4_rep_out (mac4_rep_out[4:0]), | |
2133 | .mac5_rep_out (mac5_rep_out[4:0]), | |
2134 | .mac6_rep_out (mac6_rep_out[4:0]), | |
2135 | .scan_rep_out (scan_rep_out), | |
2136 | .mac0_rep_in (mac0_rep_in[4:0]), | |
2137 | .mac1_rep_in (mac1_rep_in[4:0]), | |
2138 | .mac2_rep_in (mac2_rep_in[4:0]), | |
2139 | .mac3_rep_in (mac3_rep_in[4:0]), | |
2140 | .mac4_rep_in (mac4_rep_in[4:0]), | |
2141 | .mac5_rep_in (mac5_rep_in[4:0]), | |
2142 | .mac6_rep_in (mac6_rep_in[4:0]), | |
2143 | .scan_rep_in (scan_rep_in)); | |
2144 | pcx_mal_dp pcx_mac0( | |
2145 | .data_out_x_ (col0_data_x_[129:0]), | |
2146 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
2147 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
2148 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
2149 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
2150 | .arb_grant_a (arb_grant_l_a_rep[0]), | |
2151 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), | |
2152 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), | |
2153 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), | |
2154 | .arb_shift_a (arb_shift_l_a_rep[0]), | |
2155 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), | |
2156 | .scan_in (pcx_mac0_scanin), | |
2157 | .scan_out (pcx_mac0_scanout), | |
2158 | .l2clk (l2clk), | |
2159 | .tcu_scan_en (tcu_scan_en_out[1]), | |
2160 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
2161 | .ccx_aclk (ccx_aclk_out[1]), | |
2162 | .ccx_bclk (ccx_bclk_out[1])); | |
2163 | pcx_mbl_dp pcx_mac1( | |
2164 | .data_out_x_ (col1_data_x_[129:0]), | |
2165 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
2166 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
2167 | .ccx_aclk_out (ccx_aclk_out[1]), | |
2168 | .ccx_bclk_out (ccx_bclk_out[1]), | |
2169 | .arb_grant_a (arb_grant_l_a_rep[2]), | |
2170 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), | |
2171 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), | |
2172 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), | |
2173 | .arb_shift_a (arb_shift_l_a_rep[2]), | |
2174 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), | |
2175 | .data_prev_x_ (col0_data_x_[129:0]), | |
2176 | .scan_in (pcx_mac1_scanin), | |
2177 | .scan_out (pcx_mac1_scanout), | |
2178 | .l2clk (l2clk), | |
2179 | .tcu_scan_en (tcu_scan_en_out[2]), | |
2180 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
2181 | .ccx_aclk (ccx_aclk_out[2]), | |
2182 | .ccx_bclk (ccx_bclk_out[2])); | |
2183 | pcx_mcl_dp pcx_mac2( | |
2184 | .data_out_x_ (pcx_scache_data_x_[129:0]), | |
2185 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
2186 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
2187 | .ccx_aclk_out (ccx_aclk_out[2]), | |
2188 | .ccx_bclk_out (ccx_bclk_out[2]), | |
2189 | .arb_grant_a (arb_grant_l_a_rep[1]), | |
2190 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), | |
2191 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), | |
2192 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), | |
2193 | .arb_shift_a (arb_shift_l_a_rep[1]), | |
2194 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), | |
2195 | .data_crit_x_ (col3_data_x_[129:0]), | |
2196 | .data_ncrit_x_ (col1_data_x_[129:0]), | |
2197 | .scan_in (pcx_mac2_scanin), | |
2198 | .scan_out (pcx_mac2_scanout), | |
2199 | .l2clk (l2clk), | |
2200 | .tcu_scan_en (tcu_scan_en_out[3]), | |
2201 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
2202 | .ccx_aclk (ccx_aclk_out[3]), | |
2203 | .ccx_bclk (ccx_bclk_out[3])); | |
2204 | pcx_mbr_dp pcx_mac3( | |
2205 | .data_out_x_ (col3_data_x_[129:0]), | |
2206 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
2207 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
2208 | .ccx_aclk_out (ccx_aclk_out[3]), | |
2209 | .ccx_bclk_out (ccx_bclk_out[3]), | |
2210 | .arb_grant_a (arb_grant_l_a_rep[3]), | |
2211 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), | |
2212 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), | |
2213 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), | |
2214 | .arb_shift_a (arb_shift_l_a_rep[3]), | |
2215 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), | |
2216 | .data_prev_x_ (col4_data_x_[129:0]), | |
2217 | .scan_in (pcx_mac3_scanin), | |
2218 | .scan_out (pcx_mac3_scanout), | |
2219 | .l2clk (l2clk), | |
2220 | .tcu_scan_en (tcu_scan_en), | |
2221 | .tcu_pce_ov (tcu_pce_ov), | |
2222 | .ccx_aclk (ccx_aclk), | |
2223 | .ccx_bclk (ccx_bclk)); | |
2224 | pcx_mbr_dp pcx_mac4( | |
2225 | .data_out_x_ (col4_data_x_[129:0]), | |
2226 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
2227 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
2228 | .ccx_aclk_out (ccx_aclk_out[4]), | |
2229 | .ccx_bclk_out (ccx_bclk_out[4]), | |
2230 | .arb_grant_a (arb_grant_r_a_rep[5]), | |
2231 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), | |
2232 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), | |
2233 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), | |
2234 | .arb_shift_a (arb_shift_r_a_rep[5]), | |
2235 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), | |
2236 | .data_prev_x_ (col5_data_x_[129:0]), | |
2237 | .scan_in (pcx_mac4_scanin), | |
2238 | .scan_out (pcx_mac4_scanout), | |
2239 | .l2clk (l2clk), | |
2240 | .tcu_scan_en (tcu_scan_en_out[3]), | |
2241 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
2242 | .ccx_aclk (ccx_aclk_out[3]), | |
2243 | .ccx_bclk (ccx_bclk_out[3])); | |
2244 | pcx_mbr_dp pcx_mac5( | |
2245 | .data_out_x_ (col5_data_x_[129:0]), | |
2246 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
2247 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
2248 | .ccx_aclk_out (ccx_aclk_out[5]), | |
2249 | .ccx_bclk_out (ccx_bclk_out[5]), | |
2250 | .arb_grant_a (arb_grant_r_a_rep[7]), | |
2251 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), | |
2252 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), | |
2253 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), | |
2254 | .arb_shift_a (arb_shift_r_a_rep[7]), | |
2255 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), | |
2256 | .data_prev_x_ (col6_data_x_[129:0]), | |
2257 | .scan_in (pcx_mac5_scanin), | |
2258 | .scan_out (pcx_mac5_scanout), | |
2259 | .l2clk (l2clk), | |
2260 | .tcu_scan_en (tcu_scan_en_out[4]), | |
2261 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
2262 | .ccx_aclk (ccx_aclk_out[4]), | |
2263 | .ccx_bclk (ccx_bclk_out[4])); | |
2264 | pcx_mbr_dp pcx_mac6( | |
2265 | .data_out_x_ (col6_data_x_[129:0]), | |
2266 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
2267 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
2268 | .ccx_aclk_out (ccx_aclk_out[6]), | |
2269 | .ccx_bclk_out (ccx_bclk_out[6]), | |
2270 | .arb_grant_a (arb_grant_r_a_rep[4]), | |
2271 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), | |
2272 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), | |
2273 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), | |
2274 | .arb_shift_a (arb_shift_r_a_rep[4]), | |
2275 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), | |
2276 | .data_prev_x_ (col7_data_x_[129:0]), | |
2277 | .scan_in (pcx_mac6_scanin), | |
2278 | .scan_out (pcx_mac6_scanout), | |
2279 | .l2clk (l2clk), | |
2280 | .tcu_scan_en (tcu_scan_en_out[5]), | |
2281 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
2282 | .ccx_aclk (ccx_aclk_out[5]), | |
2283 | .ccx_bclk (ccx_bclk_out[5])); | |
2284 | pcx_mar_dp pcx_mac7( | |
2285 | .data_out_x_ (col7_data_x_[129:0]), | |
2286 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
2287 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
2288 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
2289 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
2290 | .arb_grant_a (arb_grant_r_a[6]), | |
2291 | .arb_qsel0_a (arb_qsel0_r_a[6]), | |
2292 | .arb_qsel1_a (arb_qsel1_r_a[6]), | |
2293 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), | |
2294 | .arb_shift_a (arb_shift_r_a[6]), | |
2295 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), | |
2296 | .scan_in (pcx_mac7_scanin), | |
2297 | .scan_out (pcx_mac7_scanout), | |
2298 | .l2clk (l2clk), | |
2299 | .tcu_scan_en (tcu_scan_en_out[6]), | |
2300 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
2301 | .ccx_aclk (ccx_aclk_out[6]), | |
2302 | .ccx_bclk (ccx_bclk_out[6])); | |
2303 | endmodule | |
2304 | ||
2305 | ||
2306 | `endif // `ifdef FPGA | |
2307 |