Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / pcx_dpse.v
CommitLineData
86530b38
AT
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pcx_dpse.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module pcx_dpse (
37 pcx_scache_data_x_,
38 arb_grant_l_a,
39 arb_q0_holdbar_l_a,
40 arb_qsel0_l_a,
41 arb_qsel1_l_a,
42 arb_shift_l_a,
43 arb_grant_r_a,
44 arb_q0_holdbar_r_a,
45 arb_qsel0_r_a,
46 arb_qsel1_r_a,
47 arb_shift_r_a,
48 spc0_pcx_data_a,
49 spc1_pcx_data_a,
50 spc2_pcx_data_a,
51 spc3_pcx_data_a,
52 spc4_pcx_data_a,
53 spc5_pcx_data_a,
54 spc6_pcx_data_a,
55 spc7_pcx_data_a,
56 tcu_scan_en,
57 l2clk,
58 tcu_pce_ov,
59 ccx_aclk,
60 ccx_bclk,
61 scan_in,
62 scan_out);
63wire [4:0] mac0_rep_in;
64wire [3:0] arb_grant_l_a_rep;
65wire [3:0] arb_qsel0_l_a_rep;
66wire [3:0] arb_qsel1_l_a_rep;
67wire [3:0] arb_shift_l_a_rep;
68wire [3:0] arb_q0_holdbar_l_a_rep;
69wire [4:0] mac0_rep_out;
70wire [4:0] mac1_rep_in;
71wire [4:0] mac1_rep_out;
72wire [4:0] mac2_rep_in;
73wire [4:0] mac2_rep_out;
74wire [4:0] mac3_rep_in;
75wire [4:0] mac3_rep_out;
76wire [4:0] mac4_rep_in;
77wire [7:4] arb_grant_r_a_rep;
78wire [7:4] arb_q0_holdbar_r_a_rep;
79wire [7:4] arb_qsel0_r_a_rep;
80wire [7:4] arb_qsel1_r_a_rep;
81wire [7:4] arb_shift_r_a_rep;
82wire [4:0] mac4_rep_out;
83wire [4:0] mac5_rep_in;
84wire [4:0] mac5_rep_out;
85wire [4:0] mac6_rep_in;
86wire [4:0] mac6_rep_out;
87wire scan_rep_in;
88wire [129:0] col0_data_x_;
89wire tcu_scan_en_out_0_unused;
90wire tcu_pce_ov_out_0_unused;
91wire ccx_aclk_out_0_unused;
92wire ccx_bclk_out_0_unused;
93wire pcx_mac0_scanin;
94wire pcx_mac0_scanout;
95wire [6:1] tcu_scan_en_out;
96wire [6:1] tcu_pce_ov_out;
97wire [6:1] ccx_aclk_out;
98wire [6:1] ccx_bclk_out;
99wire [129:0] col1_data_x_;
100wire pcx_mac1_scanin;
101wire pcx_mac1_scanout;
102wire [129:0] col2_data_x_;
103wire pcx_mac2_scanin;
104wire pcx_mac2_scanout;
105wire [129:0] col3_data_x_;
106wire pcx_mac3_scanin;
107wire pcx_mac3_scanout;
108wire [129:0] col5_data_x_;
109wire pcx_mac4_scanin;
110wire pcx_mac4_scanout;
111wire [129:0] col6_data_x_;
112wire pcx_mac5_scanin;
113wire pcx_mac5_scanout;
114wire [129:0] col7_data_x_;
115wire pcx_mac6_scanin;
116wire pcx_mac6_scanout;
117wire tcu_scan_en_out_7_unused;
118wire tcu_pce_ov_out_7_unused;
119wire ccx_aclk_out_7_unused;
120wire ccx_bclk_out_7_unused;
121wire pcx_mac7_scanin;
122wire pcx_mac7_scanout;
123wire [7:4] arb_grant_l_a_unused;
124wire [7:4] arb_q0_holdbar_l_a_unused;
125wire [7:4] arb_qsel0_l_a_unused;
126wire [7:4] arb_qsel1_l_a_unused;
127wire [7:4] arb_shift_l_a_unused;
128wire [3:0] arb_grant_r_a_unused;
129wire [3:0] arb_q0_holdbar_r_a_unused;
130wire [3:0] arb_qsel0_r_a_unused;
131wire [3:0] arb_qsel1_r_a_unused;
132wire [3:0] arb_shift_r_a_unused;
133wire scan_rep_out;
134
135
136// Beginning of automatic outputs (from unused autoinst outputs)
137output [129:0] pcx_scache_data_x_; // From mac3 of pcx_mcr_dp.v
138// End of automatics
139
140// Beginning of automatic inputs (from unused autoinst inputs)
141input [7:0] arb_grant_l_a; // To mac0 of pcx_mar_dp.v, ...
142input [7:0] arb_q0_holdbar_l_a; // To mac0 of pcx_mar_dp.v, ...
143input [7:0] arb_qsel0_l_a; // To mac0 of pcx_mar_dp.v, ...
144input [7:0] arb_qsel1_l_a; // To mac0 of pcx_mar_dp.v, ...
145input [7:0] arb_shift_l_a; // To mac0 of pcx_mar_dp.v, ...
146input [7:0] arb_grant_r_a; // To mac0 of pcx_mar_dp.v, ...
147input [7:0] arb_q0_holdbar_r_a; // To mac0 of pcx_mar_dp.v, ...
148input [7:0] arb_qsel0_r_a; // To mac0 of pcx_mar_dp.v, ...
149input [7:0] arb_qsel1_r_a; // To mac0 of pcx_mar_dp.v, ...
150input [7:0] arb_shift_r_a; // To mac0 of pcx_mar_dp.v, ...
151input [129:0] spc0_pcx_data_a; // To mac0 of pcx_mar_dp.v
152input [129:0] spc1_pcx_data_a; // To mac1 of pcx_mbr_dp.v
153input [129:0] spc2_pcx_data_a; // To mac2 of pcx_mbr_dp.v
154input [129:0] spc3_pcx_data_a; // To mac3 of pcx_mcr_dp.v
155input [129:0] spc4_pcx_data_a; // To mac4 of pcx_mbl_dp.v
156input [129:0] spc5_pcx_data_a; // To mac5 of pcx_mbl_dp.v
157input [129:0] spc6_pcx_data_a; // To mac6 of pcx_mbl_dp.v
158input [129:0] spc7_pcx_data_a; // To mac7 of pcx_mal_dp.v
159// End of automatics
160// globals
161input tcu_scan_en ;
162input l2clk;
163input tcu_pce_ov; // scan signals
164input ccx_aclk;
165input ccx_bclk;
166input scan_in;
167output scan_out;
168
169
170// sparc0 sparc2 sparc1 sparc3 sparc5 sparc7 sparc4 sparc6
171// | | | | | | | |
172// v v v v v v v v
173// mac0 -> mac1 ->mac2 ->mac3 <- mac4 <- mac5 <- mac6 <- mac7
174// al bl bl bl cr br br ar
175// |
176// ------buf------------
177// |
178// v
179// to sctag
180
181// mac0 arb inputs go through 1 buffer
182assign mac0_rep_in[4:0] = {arb_grant_l_a[0],arb_qsel0_l_a[0],arb_qsel1_l_a[0],
183 arb_shift_l_a[0],arb_q0_holdbar_l_a[0]};
184
185assign {arb_grant_l_a_rep[0],arb_qsel0_l_a_rep[0],arb_qsel1_l_a_rep[0],
186 arb_shift_l_a_rep[0],arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0];
187
188// mac1 arb input go through 1 buffer
189assign mac1_rep_in[4:0] = {arb_grant_l_a[2],arb_q0_holdbar_l_a[2],arb_qsel0_l_a[2],
190 arb_qsel1_l_a[2],arb_shift_l_a[2]};
191
192assign {arb_grant_l_a_rep[2],arb_q0_holdbar_l_a_rep[2],arb_qsel0_l_a_rep[2],
193 arb_qsel1_l_a_rep[2],arb_shift_l_a_rep[2]} = mac1_rep_out[4:0];
194
195// mac2 arb inputs go through 2 buffers
196assign mac2_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1],
197 arb_qsel1_l_a[1],arb_shift_l_a[1]};
198
199assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1],
200 arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac2_rep_out[4:0];
201
202// mac3 inputs go through 2 buffers
203assign mac3_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3],
204 arb_qsel1_l_a[3],arb_shift_l_a[3]};
205
206assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3],
207 arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac3_rep_out[4:0];
208
209// mac4 inputs go through 2 buffers
210assign mac4_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5],
211 arb_qsel1_r_a[5],arb_shift_r_a[5]};
212
213assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5],
214 arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac4_rep_out[4:0];
215
216// mac5 inputs go through 1 buffer
217assign mac5_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7],
218 arb_qsel1_r_a[7],arb_shift_r_a[7]};
219
220assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7],
221 arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac5_rep_out[4:0];
222
223// mac6 inputs go through 1 buffer
224assign mac6_rep_in[4:0] = {arb_grant_r_a[4],arb_q0_holdbar_r_a[4],arb_qsel0_r_a[4],
225 arb_qsel1_r_a[4],arb_shift_r_a[4]};
226
227assign {arb_grant_r_a_rep[4],arb_q0_holdbar_r_a_rep[4],arb_qsel0_r_a_rep[4],
228 arb_qsel1_r_a_rep[4],arb_shift_r_a_rep[4]} = mac6_rep_out[4:0];
229
230assign scan_rep_in = scan_in;
231
232
233
234pcx_rep_dp pcx_rep(.mac0_rep_out(mac0_rep_out[4:0]),
235 .mac1_rep_out(mac1_rep_out[4:0]),
236 .mac2_rep_out(mac2_rep_out[4:0]),
237 .mac3_rep_out(mac3_rep_out[4:0]),
238 .mac4_rep_out(mac4_rep_out[4:0]),
239 .mac5_rep_out(mac5_rep_out[4:0]),
240 .mac6_rep_out(mac6_rep_out[4:0]),
241 .scan_rep_out(scan_rep_out),
242 .mac0_rep_in(mac0_rep_in[4:0]),
243 .mac1_rep_in(mac1_rep_in[4:0]),
244 .mac2_rep_in(mac2_rep_in[4:0]),
245 .mac3_rep_in(mac3_rep_in[4:0]),
246 .mac4_rep_in(mac4_rep_in[4:0]),
247 .mac5_rep_in(mac5_rep_in[4:0]),
248 .mac6_rep_in(mac6_rep_in[4:0]),
249 .scan_rep_in(scan_rep_in)
250 );
251
252
253/*
254 pcx_mal_dp AUTO_TEMPLATE
255 (
256 // Outputs
257 .data_out_x_ (col@_data_x_[129:0]),
258 // Inputs
259 .arb_grant_a(arb_grant_l_a[@]),
260 .arb_qsel0_a(arb_qsel0_l_a[@]),
261 .arb_qsel1_a(arb_qsel1_l_a[@]),
262 .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]),
263 .arb_shift_a(arb_shift_l_a[@]),
264 .src_pcx_data_a(spc@_pcx_data_a[129:0]),
265 .l2clk (l2clk));
266*/
267
268// do not use autoinstancing.
269// connections have been modified to match the cpu floorplan
270// src_pcx_data_a has to be manually connected.
271
272//input from spc0
273pcx_mal_dp pcx_mac0 (
274 // Outputs
275 .data_out_x_ (col0_data_x_[129:0]), // Templated
276 .tcu_scan_en_out (tcu_scan_en_out_0_unused),
277 .tcu_pce_ov_out (tcu_pce_ov_out_0_unused),
278 .ccx_aclk_out (ccx_aclk_out_0_unused),
279 .ccx_bclk_out (ccx_bclk_out_0_unused),
280 // Inputs
281 .arb_grant_a (arb_grant_l_a_rep[0]), // Templated
282 .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated
283 .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated
284 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated
285 .arb_shift_a (arb_shift_l_a_rep[0]), // Templated
286 .src_pcx_data_a (spc0_pcx_data_a[129:0]), // Templated
287 .scan_in(pcx_mac0_scanin),
288 .scan_out(pcx_mac0_scanout),
289 .l2clk (l2clk), // Templated
290 .tcu_scan_en (tcu_scan_en_out[1]),
291 .tcu_pce_ov (tcu_pce_ov_out[1]),
292 .ccx_aclk (ccx_aclk_out[1]),
293 .ccx_bclk (ccx_bclk_out[1])
294 );
295
296/*
297 pcx_mbl_dp AUTO_TEMPLATE
298 (
299 // Outputs
300 .data_out_x_ (col@_data_x_[129:0]),
301 // Inputs
302 .arb_grant_a(arb_grant_l_a[@]),
303 .arb_qsel0_a(arb_qsel0_l_a[@]),
304 .arb_qsel1_a(arb_qsel1_l_a[@]),
305 .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]),
306 .arb_shift_a(arb_shift_l_a[@]),
307 .src_pcx_data_a(spc@_pcx_data_a[129:0]),
308 .data_prev_x_(col@"(- @ 1)"_data_x_[129:0]),
309 .l2clk (l2clk));
310*/
311
312
313//input from spc2
314pcx_mbl_dp pcx_mac1(
315 // Outputs
316 .data_out_x_ (col1_data_x_[129:0]), // Templated
317 .tcu_scan_en_out (tcu_scan_en_out[1]),
318 .tcu_pce_ov_out (tcu_pce_ov_out[1]),
319 .ccx_aclk_out (ccx_aclk_out[1]),
320 .ccx_bclk_out (ccx_bclk_out[1]),
321 // Inputs
322 .arb_grant_a (arb_grant_l_a_rep[2]), // Templated
323 .arb_qsel0_a (arb_qsel0_l_a_rep[2]), // Templated
324 .arb_qsel1_a (arb_qsel1_l_a_rep[2]), // Templated
325 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), // Templated
326 .arb_shift_a (arb_shift_l_a_rep[2]), // Templated
327 .src_pcx_data_a (spc2_pcx_data_a[129:0]), // Templated
328 .data_prev_x_ (col0_data_x_[129:0]), // Templated
329 .scan_in(pcx_mac1_scanin),
330 .scan_out(pcx_mac1_scanout),
331 .l2clk (l2clk), // Templated
332 .tcu_scan_en (tcu_scan_en_out[2]),
333 .tcu_pce_ov (tcu_pce_ov_out[2]),
334 .ccx_aclk (ccx_aclk_out[2]),
335 .ccx_bclk (ccx_bclk_out[2])
336 );
337
338//input from spc1
339pcx_mbl_dp pcx_mac2(
340 // Outputs
341 .data_out_x_ (col2_data_x_[129:0]), // Templated
342 .tcu_scan_en_out (tcu_scan_en_out[2]),
343 .tcu_pce_ov_out (tcu_pce_ov_out[2]),
344 .ccx_aclk_out (ccx_aclk_out[2]),
345 .ccx_bclk_out (ccx_bclk_out[2]),
346 // Inputs
347 .arb_grant_a (arb_grant_l_a_rep[1]), // Templated
348 .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated
349 .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated
350 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated
351 .arb_shift_a (arb_shift_l_a_rep[1]), // Templated
352 .src_pcx_data_a (spc1_pcx_data_a[129:0]), // Templated
353 .data_prev_x_ (col1_data_x_[129:0]), // Templated
354 .scan_in(pcx_mac2_scanin),
355 .scan_out(pcx_mac2_scanout),
356 .l2clk (l2clk), // Templated
357 .tcu_scan_en (tcu_scan_en_out[3]),
358 .tcu_pce_ov (tcu_pce_ov_out[3]),
359 .ccx_aclk (ccx_aclk_out[3]),
360 .ccx_bclk (ccx_bclk_out[3])
361 );
362
363//input from spc3
364pcx_mbl_dp pcx_mac3(
365 // Outputs
366 .data_out_x_ (col3_data_x_[129:0]), // Templated
367 .tcu_scan_en_out (tcu_scan_en_out[3]),
368 .tcu_pce_ov_out (tcu_pce_ov_out[3]),
369 .ccx_aclk_out (ccx_aclk_out[3]),
370 .ccx_bclk_out (ccx_bclk_out[3]),
371 // Inputs
372 .arb_grant_a (arb_grant_l_a_rep[3]), // Templated
373 .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated
374 .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated
375 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated
376 .arb_shift_a (arb_shift_l_a_rep[3]), // Templated
377 .src_pcx_data_a (spc3_pcx_data_a[129:0]), // Templated
378 .data_prev_x_ (col2_data_x_[129:0]), // Templated
379 .scan_in(pcx_mac3_scanin),
380 .scan_out(pcx_mac3_scanout),
381 .l2clk (l2clk), // Templated
382 .tcu_scan_en (tcu_scan_en),
383 .tcu_pce_ov (tcu_pce_ov),
384 .ccx_aclk (ccx_aclk),
385 .ccx_bclk (ccx_bclk)
386 );
387/*
388 pcx_mcr_dp AUTO_TEMPLATE
389 (
390 // Outputs
391 .data_out_x_ (pcx_scache_data_x_[129:0]),
392 // Inputs
393 .arb_grant_a(arb_grant_r_a[@]),
394 .arb_qsel0_a(arb_qsel0_r_a[@]),
395 .arb_qsel1_a(arb_qsel1_r_a[@]),
396 .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]),
397 .arb_shift_a(arb_shift_r_a[@]),
398 .src_pcx_data_a(spc@_pcx_data_a[129:0]),
399 .data_crit_x_(col@"(- @ 1)"_data_x_[129:0]),
400 .data_ncrit_x_(col@"(+ @ 1)"_data_x_[129:0]),
401 .l2clk (l2clk))
402*/
403//input from spc5
404pcx_mcr_dp pcx_mac4(
405 // Outputs
406 .data_out_x_ (pcx_scache_data_x_[129:0]), // Templated
407 .tcu_scan_en_out (tcu_scan_en_out[4]),
408 .tcu_pce_ov_out (tcu_pce_ov_out[4]),
409 .ccx_aclk_out (ccx_aclk_out[4]),
410 .ccx_bclk_out (ccx_bclk_out[4]),
411 // Inputs
412 .arb_grant_a (arb_grant_r_a_rep[5]), // Templated
413 .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated
414 .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated
415 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated
416 .arb_shift_a (arb_shift_r_a_rep[5]), // Templated
417 .src_pcx_data_a (spc5_pcx_data_a[129:0]), // Templated
418 .data_crit_x_ (col3_data_x_[129:0]), // Templated
419 .data_ncrit_x_ (col5_data_x_[129:0]), // Templated
420 .scan_in(pcx_mac4_scanin),
421 .scan_out(pcx_mac4_scanout),
422 .l2clk (l2clk),
423 .tcu_scan_en (tcu_scan_en_out[3]),
424 .tcu_pce_ov (tcu_pce_ov_out[3]),
425 .ccx_aclk (ccx_aclk_out[3]),
426 .ccx_bclk (ccx_bclk_out[3])
427 );
428
429/*
430 pcx_mbr_dp AUTO_TEMPLATE
431 (
432 // Outputs
433 .data_out_x_ (col@_data_x_[129:0]),
434 // Inputs
435 .arb_grant_a(arb_grant_r_a[@]),
436 .arb_qsel0_a(arb_qsel0_r_a[@]),
437 .arb_qsel1_a(arb_qsel1_r_a[@]),
438 .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]),
439 .arb_shift_a(arb_shift_r_a[@]),
440 .src_pcx_data_a(spc@_pcx_data_a_rep[129:0]),
441 .data_prev_x_(col@"(+ @ 1)"_data_x_[129:0]),
442 .l2clk (l2clk))
443*/
444
445
446//input from spc7
447pcx_mbr_dp pcx_mac5(
448 // Outputs
449 .data_out_x_ (col5_data_x_[129:0]), // Templated
450 .tcu_scan_en_out (tcu_scan_en_out[5]),
451 .tcu_pce_ov_out (tcu_pce_ov_out[5]),
452 .ccx_aclk_out (ccx_aclk_out[5]),
453 .ccx_bclk_out (ccx_bclk_out[5]),
454 // Inputs
455 .arb_grant_a (arb_grant_r_a_rep[7]), // Templated
456 .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated
457 .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated
458 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated
459 .arb_shift_a (arb_shift_r_a_rep[7]), // Templated
460 .src_pcx_data_a (spc7_pcx_data_a[129:0]), // Templated
461 .data_prev_x_ (col6_data_x_[129:0]), // Templated
462 .scan_in(pcx_mac5_scanin),
463 .scan_out(pcx_mac5_scanout),
464 .l2clk (l2clk),
465 .tcu_scan_en (tcu_scan_en_out[4]),
466 .tcu_pce_ov (tcu_pce_ov_out[4]),
467 .ccx_aclk (ccx_aclk_out[4]),
468 .ccx_bclk (ccx_bclk_out[4])
469 );
470
471//input from spc4
472pcx_mbr_dp pcx_mac6(
473 // Outputs
474 .data_out_x_ (col6_data_x_[129:0]), // Templated
475 .tcu_scan_en_out (tcu_scan_en_out[6]),
476 .tcu_pce_ov_out (tcu_pce_ov_out[6]),
477 .ccx_aclk_out (ccx_aclk_out[6]),
478 .ccx_bclk_out (ccx_bclk_out[6]),
479 // Inputs
480 .arb_grant_a (arb_grant_r_a_rep[4]), // Templated
481 .arb_qsel0_a (arb_qsel0_r_a_rep[4]), // Templated
482 .arb_qsel1_a (arb_qsel1_r_a_rep[4]), // Templated
483 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), // Templated
484 .arb_shift_a (arb_shift_r_a_rep[4]), // Templated
485 .src_pcx_data_a (spc4_pcx_data_a[129:0]), // Templated
486 .data_prev_x_ (col7_data_x_[129:0]), // Templated
487 .scan_in(pcx_mac6_scanin),
488 .scan_out(pcx_mac6_scanout),
489 .l2clk (l2clk),
490 .tcu_scan_en (tcu_scan_en_out[5]),
491 .tcu_pce_ov (tcu_pce_ov_out[5]),
492 .ccx_aclk (ccx_aclk_out[5]),
493 .ccx_bclk (ccx_bclk_out[5])
494 );
495
496
497/*
498 pcx_mar_dp AUTO_TEMPLATE
499 (
500 // Outputs
501 .data_out_x_ (col@_data_x_[129:0]),
502 // Inputs
503 .arb_grant_a(arb_grant_r_a[@]),
504 .arb_qsel0_a(arb_qsel0_r_a[@]),
505 .arb_qsel1_a(arb_qsel1_r_a[@]),
506 .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]),
507 .arb_shift_a(arb_shift_r_a[@]),
508 .src_pcx_data_a(spc@_pcx_data_a[129:0]),
509 .l2clk (l2clk));
510*/
511
512//input from spc6
513pcx_mar_dp pcx_mac7 (
514 // Outputs
515 .data_out_x_ (col7_data_x_[129:0]), // Templated
516 .tcu_scan_en_out (tcu_scan_en_out_7_unused),
517 .tcu_pce_ov_out (tcu_pce_ov_out_7_unused),
518 .ccx_aclk_out (ccx_aclk_out_7_unused),
519 .ccx_bclk_out (ccx_bclk_out_7_unused),
520 // Inputs
521 .arb_grant_a (arb_grant_r_a[6]), // Templated
522 .arb_qsel0_a (arb_qsel0_r_a[6]), // Templated
523 .arb_qsel1_a (arb_qsel1_r_a[6]), // Templated
524 .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), // Templated
525 .arb_shift_a (arb_shift_r_a[6]), // Templated
526 .src_pcx_data_a (spc6_pcx_data_a[129:0]), // Templated
527 .scan_in(pcx_mac7_scanin),
528 .scan_out(pcx_mac7_scanout),
529 .l2clk (l2clk), // Templated
530 .tcu_scan_en (tcu_scan_en_out[6]),
531 .tcu_pce_ov (tcu_pce_ov_out[6]),
532 .ccx_aclk (ccx_aclk_out[6]),
533 .ccx_bclk (ccx_bclk_out[6])
534 );
535
536
537assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4];
538assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4];
539assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4];
540assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4];
541assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4];
542
543assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0];
544assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0];
545assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0];
546assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0];
547assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0];
548
549
550// fixscan start:
551assign pcx_mac0_scanin = scan_rep_out ;
552assign pcx_mac1_scanin = pcx_mac0_scanout ;
553assign pcx_mac2_scanin = pcx_mac1_scanout ;
554assign pcx_mac3_scanin = pcx_mac2_scanout ;
555assign pcx_mac4_scanin = pcx_mac3_scanout ;
556assign pcx_mac5_scanin = pcx_mac4_scanout ;
557assign pcx_mac6_scanin = pcx_mac5_scanout ;
558assign pcx_mac7_scanin = pcx_mac6_scanout ;
559assign scan_out = pcx_mac7_scanout ;
560// fixscan end:
561endmodule
562
563// Local Variables:
564// verilog-library-directories:("." "v")
565// End:
566
567
568
569//
570// buff macro
571//
572//
573
574
575
576
577
578module pcx_dpse_buff_macro__dbuff_32x__stack_6l__width_5 (
579 din,
580 dout);
581 input [4:0] din;
582 output [4:0] dout;
583
584
585
586
587
588
589buff #(5) d0_0 (
590.in(din[4:0]),
591.out(dout[4:0])
592);
593
594
595
596
597
598
599
600
601endmodule
602
603
604
605
606
607//
608// buff macro
609//
610//
611
612
613
614
615
616module pcx_dpse_buff_macro__dbuff_32x__stack_none__width_1 (
617 din,
618 dout);
619 input [0:0] din;
620 output [0:0] dout;
621
622
623
624
625
626
627buff #(1) d0_0 (
628.in(din[0:0]),
629.out(dout[0:0])
630);
631
632
633
634
635
636
637
638
639endmodule
640
641
642//
643// buff macro
644//
645//
646
647
648
649
650
651module pcx_dpse_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
652 din,
653 dout);
654 input [3:0] din;
655 output [3:0] dout;
656
657
658
659
660
661
662buff #(4) d0_0 (
663.in(din[3:0]),
664.out(dout[3:0])
665);
666
667
668
669
670
671
672
673
674endmodule
675
676
677
678
679
680
681
682
683
684// any PARAMS parms go into naming of macro
685
686module pcx_dpse_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
687 l2clk,
688 l1en,
689 pce_ov,
690 stop,
691 se,
692 l1clk);
693
694
695 input l2clk;
696 input l1en;
697 input pce_ov;
698 input stop;
699 input se;
700 output l1clk;
701
702
703
704
705
706cl_sc1_l1hdr_24x c_0 (
707
708
709 .l2clk(l2clk),
710 .pce(l1en),
711 .l1clk(l1clk),
712 .se(se),
713 .pce_ov(pce_ov),
714 .stop(stop)
715);
716
717
718
719
720
721
722endmodule
723
724
725
726
727
728
729
730
731
732//
733// ccx macro
734//
735//
736
737
738
739
740
741module pcx_dpse_ccx_new_macro__type_a (
742 l2clk,
743 l1clk,
744 pce0,
745 pce1,
746 pce_ov,
747 se,
748 stop,
749 siclk_in,
750 soclk_in,
751 scan_in,
752 grant_a,
753 qsel0,
754 shift,
755 data_a,
756 data_x_l,
757 scan_out);
758wire so5;
759wire siclk_out;
760wire soclk_out;
761wire l1clk0;
762wire l1clk1;
763wire grant_x;
764wire qsel0_buf;
765wire shift_buf;
766
767input l2clk;
768input l1clk;
769input pce0;
770input pce1;
771input pce_ov;
772input se;
773input stop;
774input siclk_in;
775input soclk_in;
776input scan_in;
777input grant_a;
778input qsel0;
779input shift;
780input [9:0] data_a;
781output [9:0] data_x_l;
782output scan_out;
783cl_dp1_ccxhdr c0 (
784.si(scan_in),
785.so(so5),
786 .l2clk(l2clk),
787 .pce0(pce0),
788 .pce1(pce1),
789 .pce_ov(pce_ov),
790 .stop(stop),
791 .siclk_in(siclk_in),
792 .soclk_in(soclk_in),
793 .siclk_out(siclk_out),
794 .soclk_out(soclk_out),
795 .l1clk0(l1clk0),
796 .l1clk1(l1clk1),
797 .se(se),
798 .l1clk(l1clk),
799 .grant_a(grant_a),
800 .grant_x(grant_x),
801 .qsel0(qsel0),
802 .qsel0_buf(qsel0_buf),
803 .shift(shift),
804 .shift_buf(shift_buf)
805);
806
807
808
809
810
811
812ccx_mac_a #(10) mac_a(
813.siclk(siclk_out),
814.soclk(soclk_out),
815.data_a(data_a[9:0]),
816.data_x_l(data_x_l[9:0]),
817.si(so5),
818.so(scan_out),
819 .l1clk0(l1clk0),
820 .l1clk1(l1clk1),
821 .grant_x(grant_x),
822 .qsel0_buf(qsel0_buf),
823 .shift_buf(shift_buf)
824);
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839endmodule
840
841
842//
843//// scan renames
844//assign pce_ov = tcu_pce_ov;
845//assign stop = tcu_clk_stop;
846//assign siclk = tcu_aclk;
847//assign soclk = tcu_bclk;
848//// end scan
849//
850//buff_macro i_buf_grant (width=1, stack=30c)
851//(
852// .din (arb_grant_a),
853// .dout (grant_a),
854// );
855//
856//msff_macro i_dff_grant_x (width=12, stack=30c)
857//(
858// .scan_in(i_dff_grant_x_scanin),
859// .scan_out(i_dff_grant_x_scanout),
860// .clk (l2clk),
861// .din ({12{grant_a}}),
862// .dout (grant_x[11:0]),
863// .en (1'b1),
864// );
865//
866//
867//// DATAPATH SECTION
868//
869//msff_macro i_dff_q1_2 (width=40, stack=50c)
870//(
871// .scan_in(i_dff_q1_2_scanin),
872// .scan_out(i_dff_q1_2_scanout),
873// .clk (l2clk),
874// .din (src_pcx_data_a[129:90]),
875// .dout (q1_dataout[129:90]),
876// .en (arb_qsel1_a),
877// );
878//
879//msff_macro i_dff_q1_1 (width=50, stack=50c)
880//(
881// .scan_in(i_dff_q1_1_scanin),
882// .scan_out(i_dff_q1_1_scanout),
883// .clk (l2clk),
884// .din (src_pcx_data_a[89:40]),
885// .dout (q1_dataout[89:40]),
886// .en (arb_qsel1_a),
887// );
888//
889//msff_macro i_dff_q1_0 (width=40, stack=50c)
890//(
891// .scan_in(i_dff_q1_0_scanin),
892// .scan_out(i_dff_q1_0_scanout),
893// .clk (l2clk),
894// .din (src_pcx_data_a[39:0]),
895// .dout (q1_dataout[39:0]),
896// .en (arb_qsel1_a),
897// );
898//
899////assign q0_datain_ca[149:0] =
900//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) |
901//// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
902//
903//
904//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
905//(
906// .din0 (src_pcx_data_a[129:90]),
907// .din1 (q1_dataout[129:90]),
908// .sel0 (arb_qsel0_a),
909// .sel1 (arb_shift_a),
910// .dout (q0_datain_a[129:90]),
911// );
912//
913//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
914//(
915// .din0 (src_pcx_data_a[89:40]),
916// .din1 (q1_dataout[89:40]),
917// .sel0 (arb_qsel0_a),
918// .sel1 (arb_shift_a),
919// .dout (q0_datain_a[89:40]),
920// );
921//
922//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
923//(
924// .din0 (src_pcx_data_a[39:0]),
925// .din1 (q1_dataout[39:0]),
926// .sel0 (arb_qsel0_a),
927// .sel1 (arb_shift_a),
928// .dout (q0_datain_a[39:0]),
929// );
930//
931//msff_macro i_dff_q0_2 (width=40, stack=50c)
932//(
933// .scan_in(i_dff_q0_2_scanin),
934// .scan_out(i_dff_q0_2_scanout),
935// .clk (l2clk),
936// .din (q0_datain_a[129:90]),
937// .dout (q0_dataout[129:90]),
938// .en (arb_q0_holdbar_a),
939// );
940//
941//msff_macro i_dff_q0_1 (width=50, stack=50c)
942//(
943// .scan_in(i_dff_q0_1_scanin),
944// .scan_out(i_dff_q0_1_scanout),
945// .clk (l2clk),
946// .din (q0_datain_a[89:40]),
947// .dout (q0_dataout[89:40]),
948// .en (arb_q0_holdbar_a),
949// );
950//
951//msff_macro i_dff_q0_0 (width=40, stack=50c)
952//(
953// .scan_in(i_dff_q0_0_scanin),
954// .scan_out(i_dff_q0_0_scanout),
955// .clk (l2clk),
956// .din (q0_datain_a[39:0]),
957// .dout (q0_dataout[39:0]),
958// .en (arb_q0_holdbar_a),
959// );
960//
961////MUX
962//
963//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
964//(
965// .din0 (q0_dataout[129:90]),
966// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
967// .dout (data_x_[129:90]),
968// );
969//
970//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
971//(
972// .din0 (q0_dataout[89:40]),
973// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
974// .dout (data_x_[89:40]),
975// );
976//
977//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
978//(
979// .din0 (q0_dataout[39:0]),
980// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
981// .dout (data_x_[39:0]),
982// );
983//
984//
985//nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c)
986//(
987// .din0 (data_x_[129:90]),
988// .din1 (data_prev_x_[129:90]),
989// .dout (data_out_x[129:90])
990// );
991//
992//nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c)
993//(
994// .din0 (data_x_[89:40]),
995// .din1 (data_prev_x_[89:40]),
996// .dout (data_out_x[89:40])
997// );
998//
999//nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c)
1000//(
1001// .din0 (data_x_[39:0]),
1002// .din1 (data_prev_x_[39:0]),
1003// .dout (data_out_x[39:0])
1004// );
1005//
1006//inv_macro i_inv_data_out_2 (width=40, stack=50c)
1007//(
1008// .din (data_out_x[129:90]),
1009// .dout (data_out_x_[129:90])
1010// );
1011//
1012//inv_macro i_inv_data_out_1 (width=50, stack=50c)
1013//(
1014// .din (data_out_x[89:40]),
1015// .dout (data_out_x_[89:40])
1016// );
1017//
1018//inv_macro i_inv_data_out_0 (width=40, stack=50c)
1019//(
1020// .din (data_out_x[39:0]),
1021// .dout (data_out_x_[39:0])
1022// );
1023//
1024//// fixscan start:
1025//assign i_dff_grant_x_scanin = scan_in ;
1026//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1027//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1028//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1029//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1030//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1031//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1032//assign scan_out = i_dff_q0_0_scanout ;
1033//// fixscan end:
1034//endmodule
1035//
1036// Local Variables:
1037// verilog-library-directories:("." "v")
1038// verilog-library-files:("./v/ccx_new_macro.v")
1039// End:
1040//
1041
1042
1043//
1044// ccx macro
1045//
1046//
1047
1048
1049
1050
1051
1052module pcx_dpse_ccx_new_macro__type_b_l (
1053 l2clk,
1054 l1clk,
1055 pce0,
1056 pce1,
1057 pce_ov,
1058 se,
1059 stop,
1060 siclk_in,
1061 soclk_in,
1062 scan_in,
1063 grant_a,
1064 qsel0,
1065 shift,
1066 data_a,
1067 data_prev_x_l,
1068 data_x_l,
1069 scan_out);
1070wire so5;
1071wire siclk_out;
1072wire soclk_out;
1073wire l1clk0;
1074wire l1clk1;
1075wire grant_x;
1076wire qsel0_buf;
1077wire shift_buf;
1078
1079input l2clk;
1080input l1clk;
1081input pce0;
1082input pce1;
1083input pce_ov;
1084input se;
1085input stop;
1086input siclk_in;
1087input soclk_in;
1088input scan_in;
1089input grant_a;
1090input qsel0;
1091input shift;
1092input [9:0] data_a;
1093input [9:0] data_prev_x_l;
1094output [9:0] data_x_l;
1095output scan_out;
1096cl_dp1_ccxhdr c0 (
1097.si(scan_in),
1098.so(so5),
1099 .l2clk(l2clk),
1100 .pce0(pce0),
1101 .pce1(pce1),
1102 .pce_ov(pce_ov),
1103 .stop(stop),
1104 .siclk_in(siclk_in),
1105 .soclk_in(soclk_in),
1106 .siclk_out(siclk_out),
1107 .soclk_out(soclk_out),
1108 .l1clk0(l1clk0),
1109 .l1clk1(l1clk1),
1110 .se(se),
1111 .l1clk(l1clk),
1112 .grant_a(grant_a),
1113 .grant_x(grant_x),
1114 .qsel0(qsel0),
1115 .qsel0_buf(qsel0_buf),
1116 .shift(shift),
1117 .shift_buf(shift_buf)
1118);
1119
1120
1121
1122
1123
1124
1125ccx_mac_b #(10) mac_b(
1126.siclk(siclk_out),
1127.soclk(soclk_out),
1128.data_a(data_a[9:0]),
1129.data_prev_x_l(data_prev_x_l[9:0]),
1130.data_x_l(data_x_l[9:0]),
1131.si(so5),
1132.so(scan_out),
1133 .l1clk0(l1clk0),
1134 .l1clk1(l1clk1),
1135 .grant_x(grant_x),
1136 .qsel0_buf(qsel0_buf),
1137 .shift_buf(shift_buf)
1138);
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153endmodule
1154
1155
1156//
1157//// scan renames
1158//assign pce_ov = tcu_pce_ov;
1159//assign stop = tcu_clk_stop;
1160//assign siclk = tcu_aclk;
1161//assign soclk = tcu_bclk;
1162//// end scan
1163//
1164//buff_macro i_buf_grant (width=1, stack=30c)
1165//(
1166// .din (arb_grant_a),
1167// .dout (grant_a),
1168// );
1169//
1170//msff_macro i_dff_grant_x (width=12, stack=30c)
1171//(
1172// .scan_in(i_dff_grant_x_scanin),
1173// .scan_out(i_dff_grant_x_scanout),
1174// .clk (l2clk),
1175// .din ({12{grant_a}}),
1176// .dout (grant_x[11:0]),
1177// .en (1'b1),
1178// );
1179//
1180//// DATAPATH SECTION
1181//
1182//msff_macro i_dff_q1_2 (width=40, stack=50c)
1183//(
1184// .scan_in(i_dff_q1_2_scanin),
1185// .scan_out(i_dff_q1_2_scanout),
1186// .clk (l2clk),
1187// .din (src_pcx_data_a[129:90]),
1188// .dout (q1_dataout[129:90]),
1189// .en (arb_qsel1_a),
1190// );
1191//
1192//msff_macro i_dff_q1_1 (width=50, stack=50c)
1193//(
1194// .scan_in(i_dff_q1_1_scanin),
1195// .scan_out(i_dff_q1_1_scanout),
1196// .clk (l2clk),
1197// .din (src_pcx_data_a[89:40]),
1198// .dout (q1_dataout[89:40]),
1199// .en (arb_qsel1_a),
1200// );
1201//
1202//msff_macro i_dff_q1_0 (width=40, stack=50c)
1203//(
1204// .scan_in(i_dff_q1_0_scanin),
1205// .scan_out(i_dff_q1_0_scanout),
1206// .clk (l2clk),
1207// .din (src_pcx_data_a[39:0]),
1208// .dout (q1_dataout[39:0]),
1209// .en (arb_qsel1_a),
1210// );
1211//
1212////assign q0_datain_ca[149:0] =
1213//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) |
1214//// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
1215//
1216//
1217//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
1218//(
1219// .din0 (src_pcx_data_a[129:90]),
1220// .din1 (q1_dataout[129:90]),
1221// .sel0 (arb_qsel0_a),
1222// .sel1 (arb_shift_a),
1223// .dout (q0_datain_a[129:90]),
1224// );
1225//
1226//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
1227//(
1228// .din0 (src_pcx_data_a[89:40]),
1229// .din1 (q1_dataout[89:40]),
1230// .sel0 (arb_qsel0_a),
1231// .sel1 (arb_shift_a),
1232// .dout (q0_datain_a[89:40]),
1233// );
1234//
1235//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
1236//(
1237// .din0 (src_pcx_data_a[39:0]),
1238// .din1 (q1_dataout[39:0]),
1239// .sel0 (arb_qsel0_a),
1240// .sel1 (arb_shift_a),
1241// .dout (q0_datain_a[39:0]),
1242// );
1243//
1244//msff_macro i_dff_q0_2 (width=40, stack=50c)
1245//(
1246// .scan_in(i_dff_q0_2_scanin),
1247// .scan_out(i_dff_q0_2_scanout),
1248// .clk (l2clk),
1249// .din (q0_datain_a[129:90]),
1250// .dout (q0_dataout[129:90]),
1251// .en (arb_q0_holdbar_a),
1252// );
1253//
1254//msff_macro i_dff_q0_1 (width=50, stack=50c)
1255//(
1256// .scan_in(i_dff_q0_1_scanin),
1257// .scan_out(i_dff_q0_1_scanout),
1258// .clk (l2clk),
1259// .din (q0_datain_a[89:40]),
1260// .dout (q0_dataout[89:40]),
1261// .en (arb_q0_holdbar_a),
1262// );
1263//
1264//msff_macro i_dff_q0_0 (width=40, stack=50c)
1265//(
1266// .scan_in(i_dff_q0_0_scanin),
1267// .scan_out(i_dff_q0_0_scanout),
1268// .clk (l2clk),
1269// .din (q0_datain_a[39:0]),
1270// .dout (q0_dataout[39:0]),
1271// .en (arb_q0_holdbar_a),
1272// );
1273//
1274////MUX
1275//
1276//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
1277//(
1278// .din0 (q0_dataout[129:90]),
1279// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
1280// .dout (data_x_[129:90]),
1281// );
1282//
1283//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
1284//(
1285// .din0 (q0_dataout[89:40]),
1286// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
1287// .dout (data_x_[89:40]),
1288// );
1289//
1290//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
1291//(
1292// .din0 (q0_dataout[39:0]),
1293// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
1294// .dout (data_x_[39:0]),
1295// );
1296//
1297//nand_macro i_nand_data_crit_2 (width=40, ports=3, stack=50c)
1298//(
1299// .din0 (data_x_[129:90]),
1300// .din1 (data_crit_x_[129:90]),
1301// .din2 (data_ncrit_x_[129:90]),
1302// .dout (data_out_x[129:90])
1303//);
1304//
1305//nand_macro i_nand_data_crit_1 (width=50, ports=3, stack=50c)
1306//(
1307// .din0 (data_x_[89:40]),
1308// .din1 (data_crit_x_[89:40]),
1309// .din2 (data_ncrit_x_[89:40]),
1310// .dout (data_out_x[89:40])
1311//);
1312//
1313//nand_macro i_nand_data_crit_0 (width=40, ports=3, stack=50c)
1314//(
1315// .din0 (data_x_[39:0]),
1316// .din1 (data_crit_x_[39:0]),
1317// .din2 (data_ncrit_x_[39:0]),
1318// .dout (data_out_x[39:0])
1319//);
1320//
1321//inv_macro i_inv_data_out_2 (width=40, stack=50c)
1322//(
1323// .din (data_out_x[129:90]),
1324// .dout (data_out_x_[129:90])
1325// );
1326//
1327//inv_macro i_inv_data_out_1 (width=50, stack=50c)
1328//(
1329// .din (data_out_x[89:40]),
1330// .dout (data_out_x_[89:40])
1331// );
1332//
1333//inv_macro i_inv_data_out_0 (width=40, stack=50c)
1334//(
1335// .din (data_out_x[39:0]),
1336// .dout (data_out_x_[39:0])
1337// );
1338//
1339//// fixscan start:
1340//assign i_dff_grant_x_scanin = scan_in ;
1341//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1342//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1343//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1344//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1345//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1346//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1347//assign scan_out = i_dff_q0_0_scanout ;
1348//// fixscan end:
1349//endmodule
1350// Local Variables:
1351// verilog-library-directories:("." "v")
1352// verilog-library-files:("./v/ccx_new_macro.v")
1353// End:
1354//
1355
1356
1357//
1358// ccx macro
1359//
1360//
1361
1362
1363
1364
1365
1366module pcx_dpse_ccx_new_macro__type_c_r (
1367 l2clk,
1368 l1clk,
1369 pce0,
1370 pce1,
1371 pce_ov,
1372 se,
1373 stop,
1374 siclk_in,
1375 soclk_in,
1376 scan_in,
1377 grant_a,
1378 qsel0,
1379 shift,
1380 data_a,
1381 data_crit_x_l,
1382 data_ncrit_x_l,
1383 data_x_l,
1384 scan_out);
1385wire so5;
1386wire siclk_out;
1387wire soclk_out;
1388wire l1clk0;
1389wire l1clk1;
1390wire grant_x;
1391wire qsel0_buf;
1392wire shift_buf;
1393
1394input l2clk;
1395input l1clk;
1396input pce0;
1397input pce1;
1398input pce_ov;
1399input se;
1400input stop;
1401input siclk_in;
1402input soclk_in;
1403input scan_in;
1404input grant_a;
1405input qsel0;
1406input shift;
1407input [9:0] data_a;
1408input [9:0] data_crit_x_l;
1409input [9:0] data_ncrit_x_l;
1410output [9:0] data_x_l;
1411output scan_out;
1412cl_dp1_ccxhdr c0 (
1413.si(scan_in),
1414.so(so5),
1415 .l2clk(l2clk),
1416 .pce0(pce0),
1417 .pce1(pce1),
1418 .pce_ov(pce_ov),
1419 .stop(stop),
1420 .siclk_in(siclk_in),
1421 .soclk_in(soclk_in),
1422 .siclk_out(siclk_out),
1423 .soclk_out(soclk_out),
1424 .l1clk0(l1clk0),
1425 .l1clk1(l1clk1),
1426 .se(se),
1427 .l1clk(l1clk),
1428 .grant_a(grant_a),
1429 .grant_x(grant_x),
1430 .qsel0(qsel0),
1431 .qsel0_buf(qsel0_buf),
1432 .shift(shift),
1433 .shift_buf(shift_buf)
1434);
1435
1436
1437
1438
1439
1440
1441ccx_mac_c #(10) mac_c(
1442.siclk(siclk_out),
1443.soclk(soclk_out),
1444.data_a(data_a[9:0]),
1445.data_crit_x_l(data_crit_x_l[9:0]),
1446.data_ncrit_x_l(data_ncrit_x_l[9:0]),
1447.data_x_l(data_x_l[9:0]),
1448.si(so5),
1449.so(scan_out),
1450 .l1clk0(l1clk0),
1451 .l1clk1(l1clk1),
1452 .grant_x(grant_x),
1453 .qsel0_buf(qsel0_buf),
1454 .shift_buf(shift_buf)
1455);
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470endmodule
1471
1472
1473//
1474//// scan renames
1475//assign pce_ov = tcu_pce_ov;
1476//assign stop = tcu_clk_stop;
1477//assign siclk = tcu_aclk;
1478//assign soclk = tcu_bclk;
1479//// end scan
1480//
1481//buff_macro i_buf_grant (width=1, stack=30c)
1482//(
1483// .din (arb_grant_a),
1484// .dout (grant_a),
1485// );
1486//
1487//msff_macro i_dff_grant_x (width=12, stack=30c)
1488//(
1489// .scan_in(i_dff_grant_x_scanin),
1490// .scan_out(i_dff_grant_x_scanout),
1491// .clk (l2clk),
1492// .din ({12{grant_a}}),
1493// .dout (grant_x[11:0]),
1494// .en (1'b1),
1495// );
1496//
1497//
1498//// DATAPATH SECTION
1499//
1500//msff_macro i_dff_q1_2 (width=40, stack=50c)
1501//(
1502// .scan_in(i_dff_q1_2_scanin),
1503// .scan_out(i_dff_q1_2_scanout),
1504// .clk (l2clk),
1505// .din (src_pcx_data_a[129:90]),
1506// .dout (q1_dataout[129:90]),
1507// .en (arb_qsel1_a),
1508// );
1509//
1510//msff_macro i_dff_q1_1 (width=50, stack=50c)
1511//(
1512// .scan_in(i_dff_q1_1_scanin),
1513// .scan_out(i_dff_q1_1_scanout),
1514// .clk (l2clk),
1515// .din (src_pcx_data_a[89:40]),
1516// .dout (q1_dataout[89:40]),
1517// .en (arb_qsel1_a),
1518// );
1519//
1520//msff_macro i_dff_q1_0 (width=40, stack=50c)
1521//(
1522// .scan_in(i_dff_q1_0_scanin),
1523// .scan_out(i_dff_q1_0_scanout),
1524// .clk (l2clk),
1525// .din (src_pcx_data_a[39:0]),
1526// .dout (q1_dataout[39:0]),
1527// .en (arb_qsel1_a),
1528// );
1529//
1530////assign q0_datain_ca[149:0] =
1531//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) |
1532//// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
1533//
1534//
1535//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
1536//(
1537// .din0 (src_pcx_data_a[129:90]),
1538// .din1 (q1_dataout[129:90]),
1539// .sel0 (arb_qsel0_a),
1540// .sel1 (arb_shift_a),
1541// .dout (q0_datain_a[129:90]),
1542// );
1543//
1544//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
1545//(
1546// .din0 (src_pcx_data_a[89:40]),
1547// .din1 (q1_dataout[89:40]),
1548// .sel0 (arb_qsel0_a),
1549// .sel1 (arb_shift_a),
1550// .dout (q0_datain_a[89:40]),
1551// );
1552//
1553//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
1554//(
1555// .din0 (src_pcx_data_a[39:0]),
1556// .din1 (q1_dataout[39:0]),
1557// .sel0 (arb_qsel0_a),
1558// .sel1 (arb_shift_a),
1559// .dout (q0_datain_a[39:0]),
1560// );
1561//
1562//msff_macro i_dff_q0_2 (width=40, stack=50c)
1563//(
1564// .scan_in(i_dff_q0_2_scanin),
1565// .scan_out(i_dff_q0_2_scanout),
1566// .clk (l2clk),
1567// .din (q0_datain_a[129:90]),
1568// .dout (q0_dataout[129:90]),
1569// .en (arb_q0_holdbar_a),
1570// );
1571//
1572//msff_macro i_dff_q0_1 (width=50, stack=50c)
1573//(
1574// .scan_in(i_dff_q0_1_scanin),
1575// .scan_out(i_dff_q0_1_scanout),
1576// .clk (l2clk),
1577// .din (q0_datain_a[89:40]),
1578// .dout (q0_dataout[89:40]),
1579// .en (arb_q0_holdbar_a),
1580// );
1581//
1582//msff_macro i_dff_q0_0 (width=40, stack=50c)
1583//(
1584// .scan_in(i_dff_q0_0_scanin),
1585// .scan_out(i_dff_q0_0_scanout),
1586// .clk (l2clk),
1587// .din (q0_datain_a[39:0]),
1588// .dout (q0_dataout[39:0]),
1589// .en (arb_q0_holdbar_a),
1590// );
1591//
1592////MUX
1593//
1594//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
1595//(
1596// .din0 (q0_dataout[129:90]),
1597// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
1598// .dout (data_x_[129:90]),
1599// );
1600//
1601//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
1602//(
1603// .din0 (q0_dataout[89:40]),
1604// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
1605// .dout (data_x_[89:40]),
1606// );
1607//
1608//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
1609//(
1610// .din0 (q0_dataout[39:0]),
1611// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
1612// .dout (data_x_[39:0]),
1613// );
1614//
1615//
1616//nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c)
1617//(
1618// .din0 (data_x_[129:90]),
1619// .din1 (data_prev_x_[129:90]),
1620// .dout (data_out_x[129:90])
1621// );
1622//
1623//nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c)
1624//(
1625// .din0 (data_x_[89:40]),
1626// .din1 (data_prev_x_[89:40]),
1627// .dout (data_out_x[89:40])
1628// );
1629//
1630//nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c)
1631//(
1632// .din0 (data_x_[39:0]),
1633// .din1 (data_prev_x_[39:0]),
1634// .dout (data_out_x[39:0])
1635// );
1636//
1637//inv_macro i_inv_data_out_2 (width=40, stack=50c)
1638//(
1639// .din (data_out_x[129:90]),
1640// .dout (data_out_x_[129:90])
1641// );
1642//
1643//inv_macro i_inv_data_out_1 (width=50, stack=50c)
1644//(
1645// .din (data_out_x[89:40]),
1646// .dout (data_out_x_[89:40])
1647// );
1648//
1649//inv_macro i_inv_data_out_0 (width=40, stack=50c)
1650//(
1651// .din (data_out_x[39:0]),
1652// .dout (data_out_x_[39:0])
1653// );
1654//
1655//// fixscan start:
1656//assign i_dff_grant_x_scanin = scan_in ;
1657//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1658//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1659//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1660//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1661//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1662//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1663//assign scan_out = i_dff_q0_0_scanout ;
1664//// fixscan end:
1665//endmodule
1666//
1667// Local Variables:
1668// verilog-library-directories:("." "v")
1669// verilog-library-files:("./v/ccx_new_macro.v")
1670// End:
1671//
1672
1673
1674//
1675// ccx macro
1676//
1677//
1678
1679
1680
1681
1682
1683module pcx_dpse_ccx_new_macro__type_b_r (
1684 l2clk,
1685 l1clk,
1686 pce0,
1687 pce1,
1688 pce_ov,
1689 se,
1690 stop,
1691 siclk_in,
1692 soclk_in,
1693 scan_in,
1694 grant_a,
1695 qsel0,
1696 shift,
1697 data_a,
1698 data_prev_x_l,
1699 data_x_l,
1700 scan_out);
1701wire so5;
1702wire siclk_out;
1703wire soclk_out;
1704wire l1clk0;
1705wire l1clk1;
1706wire grant_x;
1707wire qsel0_buf;
1708wire shift_buf;
1709
1710input l2clk;
1711input l1clk;
1712input pce0;
1713input pce1;
1714input pce_ov;
1715input se;
1716input stop;
1717input siclk_in;
1718input soclk_in;
1719input scan_in;
1720input grant_a;
1721input qsel0;
1722input shift;
1723input [9:0] data_a;
1724input [9:0] data_prev_x_l;
1725output [9:0] data_x_l;
1726output scan_out;
1727cl_dp1_ccxhdr c0 (
1728.si(scan_in),
1729.so(so5),
1730 .l2clk(l2clk),
1731 .pce0(pce0),
1732 .pce1(pce1),
1733 .pce_ov(pce_ov),
1734 .stop(stop),
1735 .siclk_in(siclk_in),
1736 .soclk_in(soclk_in),
1737 .siclk_out(siclk_out),
1738 .soclk_out(soclk_out),
1739 .l1clk0(l1clk0),
1740 .l1clk1(l1clk1),
1741 .se(se),
1742 .l1clk(l1clk),
1743 .grant_a(grant_a),
1744 .grant_x(grant_x),
1745 .qsel0(qsel0),
1746 .qsel0_buf(qsel0_buf),
1747 .shift(shift),
1748 .shift_buf(shift_buf)
1749);
1750
1751
1752
1753
1754
1755
1756ccx_mac_b #(10) mac_b(
1757.siclk(siclk_out),
1758.soclk(soclk_out),
1759.data_a(data_a[9:0]),
1760.data_prev_x_l(data_prev_x_l[9:0]),
1761.data_x_l(data_x_l[9:0]),
1762.si(so5),
1763.so(scan_out),
1764 .l1clk0(l1clk0),
1765 .l1clk1(l1clk1),
1766 .grant_x(grant_x),
1767 .qsel0_buf(qsel0_buf),
1768 .shift_buf(shift_buf)
1769);
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784endmodule
1785
1786
1787//
1788//// scan renames
1789//assign pce_ov = tcu_pce_ov;
1790//assign stop = tcu_clk_stop;
1791//assign siclk = ccx_aclk;
1792//assign soclk = ccx_bclk;
1793//// end scan
1794//
1795//// buffer the grant signal
1796//
1797//buff_macro i_buf_grant (width=1, stack=30c)
1798//(
1799// .din (arb_grant_a),
1800// .dout (grant_a),
1801// );
1802//
1803//msff_macro i_dff_grant_x (width=12, stack=30c)
1804//(
1805// .scan_in(i_dff_grant_x_scanin),
1806// .scan_out(i_dff_grant_x_scanout),
1807// .clk (l2clk),
1808// .din ({12{grant_a}}),
1809// .dout (grant_x[11:0]),
1810// .en (1'b1),
1811// );
1812//
1813//
1814//// DATAPATH SECTION
1815//
1816//msff_macro i_dff_q1_2 (width=40, stack=50c)
1817//(
1818// .scan_in(i_dff_q1_2_scanin),
1819// .scan_out(i_dff_q1_2_scanout),
1820// .clk (l2clk),
1821// .din (src_pcx_data_a[129:90]),
1822// .dout (q1_dataout[129:90]),
1823// .en (arb_qsel1_a),
1824// );
1825//
1826//msff_macro i_dff_q1_1 (width=50, stack=50c)
1827//(
1828// .scan_in(i_dff_q1_1_scanin),
1829// .scan_out(i_dff_q1_1_scanout),
1830// .clk (l2clk),
1831// .din (src_pcx_data_a[89:40]),
1832// .dout (q1_dataout[89:40]),
1833// .en (arb_qsel1_a),
1834// );
1835//
1836//msff_macro i_dff_q1_0 (width=40, stack=50c)
1837//(
1838// .scan_in(i_dff_q1_0_scanin),
1839// .scan_out(i_dff_q1_0_scanout),
1840// .clk (l2clk),
1841// .din (src_pcx_data_a[39:0]),
1842// .dout (q1_dataout[39:0]),
1843// .en (arb_qsel1_a),
1844// );
1845//
1846////assign q0_datain_ca[129:0] =
1847//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[129:0] : 150'd0) |
1848//// (arb_pcxdp_shift_cx ? q1_dataout[129:0] : 150'd0) ;
1849//
1850//
1851//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
1852//(
1853// .din0 (src_pcx_data_a[129:90]),
1854// .din1 (q1_dataout[129:90]),
1855// .sel0 (arb_qsel0_a),
1856// .sel1 (arb_shift_a),
1857// .dout (q0_datain_a[129:90]),
1858// );
1859//
1860//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
1861//(
1862// .din0 (src_pcx_data_a[89:40]),
1863// .din1 (q1_dataout[89:40]),
1864// .sel0 (arb_qsel0_a),
1865// .sel1 (arb_shift_a),
1866// .dout (q0_datain_a[89:40]),
1867// );
1868//
1869//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
1870//(
1871// .din0 (src_pcx_data_a[39:0]),
1872// .din1 (q1_dataout[39:0]),
1873// .sel0 (arb_qsel0_a),
1874// .sel1 (arb_shift_a),
1875// .dout (q0_datain_a[39:0]),
1876// );
1877//
1878//msff_macro i_dff_q0_2 (width=40, stack=50c)
1879//(
1880// .scan_in(i_dff_q0_2_scanin),
1881// .scan_out(i_dff_q0_2_scanout),
1882// .clk (l2clk),
1883// .din (q0_datain_a[129:90]),
1884// .dout (q0_dataout[129:90]),
1885// .en (arb_q0_holdbar_a),
1886// );
1887//
1888//msff_macro i_dff_q0_1 (width=50, stack=50c)
1889//(
1890// .scan_in(i_dff_q0_1_scanin),
1891// .scan_out(i_dff_q0_1_scanout),
1892// .clk (l2clk),
1893// .din (q0_datain_a[89:40]),
1894// .dout (q0_dataout[89:40]),
1895// .en (arb_q0_holdbar_a),
1896// );
1897//
1898//msff_macro i_dff_q0_0 (width=40, stack=50c)
1899//(
1900// .scan_in(i_dff_q0_0_scanin),
1901// .scan_out(i_dff_q0_0_scanout),
1902// .clk (l2clk),
1903// .din (q0_datain_a[39:0]),
1904// .dout (q0_dataout[39:0]),
1905// .en (arb_q0_holdbar_a),
1906// );
1907//
1908//// MUX
1909//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
1910//(
1911// .din0 (q0_dataout[129:90]),
1912// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
1913// .dout (data_out_x_[129:90]),
1914// );
1915//
1916//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
1917//(
1918// .din0 (q0_dataout[89:40]),
1919// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
1920// .dout (data_out_x_[89:40]),
1921// );
1922//
1923//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
1924//(
1925// .din0 (q0_dataout[39:0]),
1926// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
1927// .dout (data_out_x_[39:0]),
1928// );
1929//
1930//// fixscan start:
1931//assign i_dff_grant_x_scanin = scan_in ;
1932//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
1933//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
1934//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
1935//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
1936//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
1937//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
1938//assign scan_out = i_dff_q0_0_scanout ;
1939//// fixscan end:
1940//endmodule
1941//
1942// Local Variables:
1943// verilog-library-directories:("." "v")
1944// verilog-library-files:("./v/ccx_new_macro.v")
1945// End:
1946//
1947
1948`endif // `ifndef FPGA
1949
1950`ifdef FPGA
1951`timescale 1 ns / 100 ps
1952module pcx_dpse(pcx_scache_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a,
1953 arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a,
1954 arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a,
1955 spc0_pcx_data_a, spc1_pcx_data_a, spc2_pcx_data_a, spc3_pcx_data_a,
1956 spc4_pcx_data_a, spc5_pcx_data_a, spc6_pcx_data_a, spc7_pcx_data_a,
1957 tcu_scan_en, l2clk, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_in, scan_out);
1958
1959 output [129:0] pcx_scache_data_x_;
1960 input [7:0] arb_grant_l_a;
1961 input [7:0] arb_q0_holdbar_l_a;
1962 input [7:0] arb_qsel0_l_a;
1963 input [7:0] arb_qsel1_l_a;
1964 input [7:0] arb_shift_l_a;
1965 input [7:0] arb_grant_r_a;
1966 input [7:0] arb_q0_holdbar_r_a;
1967 input [7:0] arb_qsel0_r_a;
1968 input [7:0] arb_qsel1_r_a;
1969 input [7:0] arb_shift_r_a;
1970 input [129:0] spc0_pcx_data_a;
1971 input [129:0] spc1_pcx_data_a;
1972 input [129:0] spc2_pcx_data_a;
1973 input [129:0] spc3_pcx_data_a;
1974 input [129:0] spc4_pcx_data_a;
1975 input [129:0] spc5_pcx_data_a;
1976 input [129:0] spc6_pcx_data_a;
1977 input [129:0] spc7_pcx_data_a;
1978 input tcu_scan_en;
1979 input l2clk;
1980 input tcu_pce_ov;
1981 input ccx_aclk;
1982 input ccx_bclk;
1983 input scan_in;
1984 output scan_out;
1985
1986 wire [4:0] mac0_rep_in;
1987 wire [3:0] arb_grant_l_a_rep;
1988 wire [3:0] arb_qsel0_l_a_rep;
1989 wire [3:0] arb_qsel1_l_a_rep;
1990 wire [3:0] arb_shift_l_a_rep;
1991 wire [3:0] arb_q0_holdbar_l_a_rep;
1992 wire [4:0] mac0_rep_out;
1993 wire [4:0] mac1_rep_in;
1994 wire [4:0] mac1_rep_out;
1995 wire [4:0] mac2_rep_in;
1996 wire [4:0] mac2_rep_out;
1997 wire [4:0] mac3_rep_in;
1998 wire [4:0] mac3_rep_out;
1999 wire [4:0] mac4_rep_in;
2000 wire [7:4] arb_grant_r_a_rep;
2001 wire [7:4] arb_q0_holdbar_r_a_rep;
2002 wire [7:4] arb_qsel0_r_a_rep;
2003 wire [7:4] arb_qsel1_r_a_rep;
2004 wire [7:4] arb_shift_r_a_rep;
2005 wire [4:0] mac4_rep_out;
2006 wire [4:0] mac5_rep_in;
2007 wire [4:0] mac5_rep_out;
2008 wire [4:0] mac6_rep_in;
2009 wire [4:0] mac6_rep_out;
2010 wire scan_rep_in;
2011 wire [129:0] col0_data_x_;
2012 wire tcu_scan_en_out_0_unused;
2013 wire tcu_pce_ov_out_0_unused;
2014 wire ccx_aclk_out_0_unused;
2015 wire ccx_bclk_out_0_unused;
2016 wire pcx_mac0_scanin;
2017 wire pcx_mac0_scanout;
2018 wire [6:1] tcu_scan_en_out;
2019 wire [6:1] tcu_pce_ov_out;
2020 wire [6:1] ccx_aclk_out;
2021 wire [6:1] ccx_bclk_out;
2022 wire [129:0] col1_data_x_;
2023 wire pcx_mac1_scanin;
2024 wire pcx_mac1_scanout;
2025 wire [129:0] col2_data_x_;
2026 wire pcx_mac2_scanin;
2027 wire pcx_mac2_scanout;
2028 wire [129:0] col3_data_x_;
2029 wire pcx_mac3_scanin;
2030 wire pcx_mac3_scanout;
2031 wire [129:0] col5_data_x_;
2032 wire pcx_mac4_scanin;
2033 wire pcx_mac4_scanout;
2034 wire [129:0] col6_data_x_;
2035 wire pcx_mac5_scanin;
2036 wire pcx_mac5_scanout;
2037 wire [129:0] col7_data_x_;
2038 wire pcx_mac6_scanin;
2039 wire pcx_mac6_scanout;
2040 wire tcu_scan_en_out_7_unused;
2041 wire tcu_pce_ov_out_7_unused;
2042 wire ccx_aclk_out_7_unused;
2043 wire ccx_bclk_out_7_unused;
2044 wire pcx_mac7_scanin;
2045 wire pcx_mac7_scanout;
2046 wire [7:4] arb_grant_l_a_unused;
2047 wire [7:4] arb_q0_holdbar_l_a_unused;
2048 wire [7:4] arb_qsel0_l_a_unused;
2049 wire [7:4] arb_qsel1_l_a_unused;
2050 wire [7:4] arb_shift_l_a_unused;
2051 wire [3:0] arb_grant_r_a_unused;
2052 wire [3:0] arb_q0_holdbar_r_a_unused;
2053 wire [3:0] arb_qsel0_r_a_unused;
2054 wire [3:0] arb_qsel1_r_a_unused;
2055 wire [3:0] arb_shift_r_a_unused;
2056 wire scan_rep_out;
2057
2058 assign mac0_rep_in[4:0] = {arb_grant_l_a[0], arb_qsel0_l_a[0],
2059 arb_qsel1_l_a[0], arb_shift_l_a[0], arb_q0_holdbar_l_a[0]};
2060 assign {arb_grant_l_a_rep[0], arb_qsel0_l_a_rep[0],
2061 arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0],
2062 arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0];
2063 assign mac1_rep_in[4:0] = {arb_grant_l_a[2], arb_q0_holdbar_l_a[2],
2064 arb_qsel0_l_a[2], arb_qsel1_l_a[2], arb_shift_l_a[2]};
2065 assign {arb_grant_l_a_rep[2], arb_q0_holdbar_l_a_rep[2],
2066 arb_qsel0_l_a_rep[2], arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2]
2067 } = mac1_rep_out[4:0];
2068 assign mac2_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1],
2069 arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]};
2070 assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1],
2071 arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1]
2072 } = mac2_rep_out[4:0];
2073 assign mac3_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3],
2074 arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]};
2075 assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3],
2076 arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3]
2077 } = mac3_rep_out[4:0];
2078 assign mac4_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5],
2079 arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]};
2080 assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5],
2081 arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5]
2082 } = mac4_rep_out[4:0];
2083 assign mac5_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7],
2084 arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]};
2085 assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7],
2086 arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7]
2087 } = mac5_rep_out[4:0];
2088 assign mac6_rep_in[4:0] = {arb_grant_r_a[4], arb_q0_holdbar_r_a[4],
2089 arb_qsel0_r_a[4], arb_qsel1_r_a[4], arb_shift_r_a[4]};
2090 assign {arb_grant_r_a_rep[4], arb_q0_holdbar_r_a_rep[4],
2091 arb_qsel0_r_a_rep[4], arb_qsel1_r_a_rep[4], arb_shift_r_a_rep[4]
2092 } = mac6_rep_out[4:0];
2093 assign scan_rep_in = scan_in;
2094 assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4];
2095 assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4];
2096 assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4];
2097 assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4];
2098 assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4];
2099 assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0];
2100 assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0];
2101 assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0];
2102 assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0];
2103 assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0];
2104 assign pcx_mac0_scanin = scan_rep_out;
2105 assign pcx_mac1_scanin = pcx_mac0_scanout;
2106 assign pcx_mac2_scanin = pcx_mac1_scanout;
2107 assign pcx_mac3_scanin = pcx_mac2_scanout;
2108 assign pcx_mac4_scanin = pcx_mac3_scanout;
2109 assign pcx_mac5_scanin = pcx_mac4_scanout;
2110 assign pcx_mac6_scanin = pcx_mac5_scanout;
2111 assign pcx_mac7_scanin = pcx_mac6_scanout;
2112 assign scan_out = pcx_mac7_scanout;
2113
2114 pcx_rep_dp pcx_rep(
2115 .mac0_rep_out (mac0_rep_out[4:0]),
2116 .mac1_rep_out (mac1_rep_out[4:0]),
2117 .mac2_rep_out (mac2_rep_out[4:0]),
2118 .mac3_rep_out (mac3_rep_out[4:0]),
2119 .mac4_rep_out (mac4_rep_out[4:0]),
2120 .mac5_rep_out (mac5_rep_out[4:0]),
2121 .mac6_rep_out (mac6_rep_out[4:0]),
2122 .scan_rep_out (scan_rep_out),
2123 .mac0_rep_in (mac0_rep_in[4:0]),
2124 .mac1_rep_in (mac1_rep_in[4:0]),
2125 .mac2_rep_in (mac2_rep_in[4:0]),
2126 .mac3_rep_in (mac3_rep_in[4:0]),
2127 .mac4_rep_in (mac4_rep_in[4:0]),
2128 .mac5_rep_in (mac5_rep_in[4:0]),
2129 .mac6_rep_in (mac6_rep_in[4:0]),
2130 .scan_rep_in (scan_rep_in));
2131 pcx_mal_dp pcx_mac0(
2132 .data_out_x_ (col0_data_x_[129:0]),
2133 .tcu_scan_en_out (tcu_scan_en_out_0_unused),
2134 .tcu_pce_ov_out (tcu_pce_ov_out_0_unused),
2135 .ccx_aclk_out (ccx_aclk_out_0_unused),
2136 .ccx_bclk_out (ccx_bclk_out_0_unused),
2137 .arb_grant_a (arb_grant_l_a_rep[0]),
2138 .arb_qsel0_a (arb_qsel0_l_a_rep[0]),
2139 .arb_qsel1_a (arb_qsel1_l_a_rep[0]),
2140 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]),
2141 .arb_shift_a (arb_shift_l_a_rep[0]),
2142 .src_pcx_data_a (spc0_pcx_data_a[129:0]),
2143 .scan_in (pcx_mac0_scanin),
2144 .scan_out (pcx_mac0_scanout),
2145 .l2clk (l2clk),
2146 .tcu_scan_en (tcu_scan_en_out[1]),
2147 .tcu_pce_ov (tcu_pce_ov_out[1]),
2148 .ccx_aclk (ccx_aclk_out[1]),
2149 .ccx_bclk (ccx_bclk_out[1]));
2150 pcx_mbl_dp pcx_mac1(
2151 .data_out_x_ (col1_data_x_[129:0]),
2152 .tcu_scan_en_out (tcu_scan_en_out[1]),
2153 .tcu_pce_ov_out (tcu_pce_ov_out[1]),
2154 .ccx_aclk_out (ccx_aclk_out[1]),
2155 .ccx_bclk_out (ccx_bclk_out[1]),
2156 .arb_grant_a (arb_grant_l_a_rep[2]),
2157 .arb_qsel0_a (arb_qsel0_l_a_rep[2]),
2158 .arb_qsel1_a (arb_qsel1_l_a_rep[2]),
2159 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]),
2160 .arb_shift_a (arb_shift_l_a_rep[2]),
2161 .src_pcx_data_a (spc2_pcx_data_a[129:0]),
2162 .data_prev_x_ (col0_data_x_[129:0]),
2163 .scan_in (pcx_mac1_scanin),
2164 .scan_out (pcx_mac1_scanout),
2165 .l2clk (l2clk),
2166 .tcu_scan_en (tcu_scan_en_out[2]),
2167 .tcu_pce_ov (tcu_pce_ov_out[2]),
2168 .ccx_aclk (ccx_aclk_out[2]),
2169 .ccx_bclk (ccx_bclk_out[2]));
2170 pcx_mbl_dp pcx_mac2(
2171 .data_out_x_ (col2_data_x_[129:0]),
2172 .tcu_scan_en_out (tcu_scan_en_out[2]),
2173 .tcu_pce_ov_out (tcu_pce_ov_out[2]),
2174 .ccx_aclk_out (ccx_aclk_out[2]),
2175 .ccx_bclk_out (ccx_bclk_out[2]),
2176 .arb_grant_a (arb_grant_l_a_rep[1]),
2177 .arb_qsel0_a (arb_qsel0_l_a_rep[1]),
2178 .arb_qsel1_a (arb_qsel1_l_a_rep[1]),
2179 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]),
2180 .arb_shift_a (arb_shift_l_a_rep[1]),
2181 .src_pcx_data_a (spc1_pcx_data_a[129:0]),
2182 .data_prev_x_ (col1_data_x_[129:0]),
2183 .scan_in (pcx_mac2_scanin),
2184 .scan_out (pcx_mac2_scanout),
2185 .l2clk (l2clk),
2186 .tcu_scan_en (tcu_scan_en_out[3]),
2187 .tcu_pce_ov (tcu_pce_ov_out[3]),
2188 .ccx_aclk (ccx_aclk_out[3]),
2189 .ccx_bclk (ccx_bclk_out[3]));
2190 pcx_mbl_dp pcx_mac3(
2191 .data_out_x_ (col3_data_x_[129:0]),
2192 .tcu_scan_en_out (tcu_scan_en_out[3]),
2193 .tcu_pce_ov_out (tcu_pce_ov_out[3]),
2194 .ccx_aclk_out (ccx_aclk_out[3]),
2195 .ccx_bclk_out (ccx_bclk_out[3]),
2196 .arb_grant_a (arb_grant_l_a_rep[3]),
2197 .arb_qsel0_a (arb_qsel0_l_a_rep[3]),
2198 .arb_qsel1_a (arb_qsel1_l_a_rep[3]),
2199 .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]),
2200 .arb_shift_a (arb_shift_l_a_rep[3]),
2201 .src_pcx_data_a (spc3_pcx_data_a[129:0]),
2202 .data_prev_x_ (col2_data_x_[129:0]),
2203 .scan_in (pcx_mac3_scanin),
2204 .scan_out (pcx_mac3_scanout),
2205 .l2clk (l2clk),
2206 .tcu_scan_en (tcu_scan_en),
2207 .tcu_pce_ov (tcu_pce_ov),
2208 .ccx_aclk (ccx_aclk),
2209 .ccx_bclk (ccx_bclk));
2210 pcx_mcr_dp pcx_mac4(
2211 .data_out_x_ (pcx_scache_data_x_[129:0]),
2212 .tcu_scan_en_out (tcu_scan_en_out[4]),
2213 .tcu_pce_ov_out (tcu_pce_ov_out[4]),
2214 .ccx_aclk_out (ccx_aclk_out[4]),
2215 .ccx_bclk_out (ccx_bclk_out[4]),
2216 .arb_grant_a (arb_grant_r_a_rep[5]),
2217 .arb_qsel0_a (arb_qsel0_r_a_rep[5]),
2218 .arb_qsel1_a (arb_qsel1_r_a_rep[5]),
2219 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]),
2220 .arb_shift_a (arb_shift_r_a_rep[5]),
2221 .src_pcx_data_a (spc5_pcx_data_a[129:0]),
2222 .data_crit_x_ (col3_data_x_[129:0]),
2223 .data_ncrit_x_ (col5_data_x_[129:0]),
2224 .scan_in (pcx_mac4_scanin),
2225 .scan_out (pcx_mac4_scanout),
2226 .l2clk (l2clk),
2227 .tcu_scan_en (tcu_scan_en_out[3]),
2228 .tcu_pce_ov (tcu_pce_ov_out[3]),
2229 .ccx_aclk (ccx_aclk_out[3]),
2230 .ccx_bclk (ccx_bclk_out[3]));
2231 pcx_mbr_dp pcx_mac5(
2232 .data_out_x_ (col5_data_x_[129:0]),
2233 .tcu_scan_en_out (tcu_scan_en_out[5]),
2234 .tcu_pce_ov_out (tcu_pce_ov_out[5]),
2235 .ccx_aclk_out (ccx_aclk_out[5]),
2236 .ccx_bclk_out (ccx_bclk_out[5]),
2237 .arb_grant_a (arb_grant_r_a_rep[7]),
2238 .arb_qsel0_a (arb_qsel0_r_a_rep[7]),
2239 .arb_qsel1_a (arb_qsel1_r_a_rep[7]),
2240 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]),
2241 .arb_shift_a (arb_shift_r_a_rep[7]),
2242 .src_pcx_data_a (spc7_pcx_data_a[129:0]),
2243 .data_prev_x_ (col6_data_x_[129:0]),
2244 .scan_in (pcx_mac5_scanin),
2245 .scan_out (pcx_mac5_scanout),
2246 .l2clk (l2clk),
2247 .tcu_scan_en (tcu_scan_en_out[4]),
2248 .tcu_pce_ov (tcu_pce_ov_out[4]),
2249 .ccx_aclk (ccx_aclk_out[4]),
2250 .ccx_bclk (ccx_bclk_out[4]));
2251 pcx_mbr_dp pcx_mac6(
2252 .data_out_x_ (col6_data_x_[129:0]),
2253 .tcu_scan_en_out (tcu_scan_en_out[6]),
2254 .tcu_pce_ov_out (tcu_pce_ov_out[6]),
2255 .ccx_aclk_out (ccx_aclk_out[6]),
2256 .ccx_bclk_out (ccx_bclk_out[6]),
2257 .arb_grant_a (arb_grant_r_a_rep[4]),
2258 .arb_qsel0_a (arb_qsel0_r_a_rep[4]),
2259 .arb_qsel1_a (arb_qsel1_r_a_rep[4]),
2260 .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]),
2261 .arb_shift_a (arb_shift_r_a_rep[4]),
2262 .src_pcx_data_a (spc4_pcx_data_a[129:0]),
2263 .data_prev_x_ (col7_data_x_[129:0]),
2264 .scan_in (pcx_mac6_scanin),
2265 .scan_out (pcx_mac6_scanout),
2266 .l2clk (l2clk),
2267 .tcu_scan_en (tcu_scan_en_out[5]),
2268 .tcu_pce_ov (tcu_pce_ov_out[5]),
2269 .ccx_aclk (ccx_aclk_out[5]),
2270 .ccx_bclk (ccx_bclk_out[5]));
2271 pcx_mar_dp pcx_mac7(
2272 .data_out_x_ (col7_data_x_[129:0]),
2273 .tcu_scan_en_out (tcu_scan_en_out_7_unused),
2274 .tcu_pce_ov_out (tcu_pce_ov_out_7_unused),
2275 .ccx_aclk_out (ccx_aclk_out_7_unused),
2276 .ccx_bclk_out (ccx_bclk_out_7_unused),
2277 .arb_grant_a (arb_grant_r_a[6]),
2278 .arb_qsel0_a (arb_qsel0_r_a[6]),
2279 .arb_qsel1_a (arb_qsel1_r_a[6]),
2280 .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]),
2281 .arb_shift_a (arb_shift_r_a[6]),
2282 .src_pcx_data_a (spc6_pcx_data_a[129:0]),
2283 .scan_in (pcx_mac7_scanin),
2284 .scan_out (pcx_mac7_scanout),
2285 .l2clk (l2clk),
2286 .tcu_scan_en (tcu_scan_en_out[6]),
2287 .tcu_pce_ov (tcu_pce_ov_out[6]),
2288 .ccx_aclk (ccx_aclk_out[6]),
2289 .ccx_bclk (ccx_bclk_out[6]));
2290endmodule
2291
2292
2293`endif // `ifdef FPGA
2294