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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / pcx_mal_dp.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pcx_mal_dp.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
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27// may be used, or where a choice of which version of the GPL is applied is
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30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module pcx_mal_dp (
37 data_out_x_,
38 arb_grant_a,
39 arb_qsel0_a,
40 arb_qsel1_a,
41 arb_q0_holdbar_a,
42 arb_shift_a,
43 src_pcx_data_a,
44 l2clk,
45 scan_in,
46 tcu_pce_ov,
47 ccx_aclk,
48 ccx_bclk,
49 tcu_scan_en,
50 scan_out,
51 ccx_aclk_out,
52 ccx_bclk_out,
53 tcu_pce_ov_out,
54 tcu_scan_en_out);
55wire pce_ov;
56wire stop;
57wire siclk_in;
58wire soclk_in;
59wire se;
60wire [129:0] src_data_a;
61wire l1clka;
62wire l1clkb;
63wire i0_scanin;
64wire i0_scanout;
65wire i1_scanin;
66wire i1_scanout;
67wire i2_scanin;
68wire i2_scanout;
69wire i3_scanin;
70wire i3_scanout;
71wire i4_scanin;
72wire i4_scanout;
73wire i5_scanin;
74wire i5_scanout;
75wire i6_scanin;
76wire i6_scanout;
77wire i7_scanin;
78wire i7_scanout;
79wire i8_scanin;
80wire i8_scanout;
81wire i9_scanin;
82wire i9_scanout;
83wire i10_scanin;
84wire i10_scanout;
85wire i11_scanin;
86wire i11_scanout;
87wire i12_scanin;
88wire i12_scanout;
89
90
91output [129:0] data_out_x_;
92
93input arb_grant_a;
94input arb_qsel0_a;
95input arb_qsel1_a;
96input arb_q0_holdbar_a;
97input arb_shift_a;
98
99
100input [129:0] src_pcx_data_a;
101
102// globals
103input l2clk;
104input scan_in;
105input tcu_pce_ov; // scan signals
106input ccx_aclk;
107input ccx_bclk;
108input tcu_scan_en;
109
110output scan_out;
111
112// buffer the high fanout nets
113output ccx_aclk_out;
114output ccx_bclk_out;
115output tcu_pce_ov_out;
116output tcu_scan_en_out;
117
118
119// scan renames
120assign pce_ov = tcu_pce_ov_out;
121assign stop = 1'b0;
122assign siclk_in = ccx_aclk_out;
123assign soclk_in = ccx_bclk_out;
124assign se = tcu_scan_en_out ;
125// end scan
126
127assign src_data_a[129:0] = src_pcx_data_a[129:0];
128
129//cl_dp1_l1hdr_24x gkt_hdr (
130//.l2clk(l2clk),
131//.pce(1'b1),
132//.aclk(siclk),
133//.bclk(soclk),
134//.siclk_out(siclk_out_unused),
135//.soclk_out(soclk_out_unused),
136//.l1clk(l1clk),
137//.pce_ov(pce_ov),
138//.stop(stop)
139//);
140
141
142//l1clkhdr_dp_macro gkt_hdra
143// (
144// .l2clk (l2clk),
145// .l1en (1'b1 ),
146// .siclk_out (sia_unused),
147// .soclk_out (soa_unused),
148// .l1clk (l1clka)
149// );
150
151//l1clkhdr_dp_macro gkt_hdrb
152// (
153// .l2clk (l2clk),
154// .l1en (1'b1 ),
155// .siclk_out (sib_unused),
156// .soclk_out (sob_unused),
157// .l1clk (l1clkb)
158// );
159
160pcx_mal_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn (
161 .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}),
162 .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out})
163);
164
165pcx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra
166 (
167 .l2clk (l2clk),
168 .l1en (1'b1 ),
169 .l1clk (l1clka),
170 .pce_ov(pce_ov),
171 .stop(stop),
172 .se(se)
173 );
174
175pcx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb
176 (
177 .l2clk (l2clk),
178 .l1en (1'b1 ),
179 .l1clk (l1clkb),
180 .pce_ov(pce_ov),
181 .stop(stop),
182 .se(se)
183 );
184
185// ccx_new_macro_a AUTO_TEMPLATE
186// (
187//.scan_in(AUTO_TEMPLATE_scanin),
188//.scan_out(AUTO_TEMPLATE_scanout),
189//.l2clk (l2clk),
190//.l1clk (l1clk),
191//.pce0 (arb_q0_holdbar_a),
192//.pce1 (arb_qsel1_a),
193//.pce_ov (pce_ov),
194//.stop (stop),
195//.siclk_in (siclk_in),
196//.soclk_in (soclk_in),
197//.grant_a (arb_grant_a),
198//.qsel0 (arb_qsel0_a),
199//.shift (arb_shift_a),
200//.data_a (src_data_a[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
201//.data_x_l (data_out_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
202//);
203
204pcx_mal_dp_ccx_new_macro__type_a i0 (
205 // Outputs
206 .data_x_l (data_out_x_[9:0]), // Templated
207 // Inputs
208 .scan_in(i0_scanin),
209 .scan_out(i0_scanout),
210 .l2clk (l2clk), // Templated
211 .l1clk (l1clka), // Templated
212 .pce0 (arb_q0_holdbar_a), // Templated
213 .pce1 (arb_qsel1_a), // Templated
214 .pce_ov (pce_ov), // Templated
215 .stop (stop), // Templated
216 .siclk_in (siclk_in), // Templated
217 .soclk_in (soclk_in), // Templated
218 .grant_a (arb_grant_a), // Templated
219 .qsel0 (arb_qsel0_a), // Templated
220 .shift (arb_shift_a), // Templated
221 .data_a (src_data_a[9:0]),
222 .se(se)); // Templated
223
224pcx_mal_dp_ccx_new_macro__type_a i1 (
225 // Outputs
226 .data_x_l (data_out_x_[19:10]), // Templated
227 // Inputs
228 .scan_in(i1_scanin),
229 .scan_out(i1_scanout),
230 .l2clk (l2clk), // Templated
231 .l1clk (l1clka), // Templated
232 .pce0 (arb_q0_holdbar_a), // Templated
233 .pce1 (arb_qsel1_a), // Templated
234 .pce_ov (pce_ov), // Templated
235 .stop (stop), // Templated
236 .siclk_in (siclk_in), // Templated
237 .soclk_in (soclk_in), // Templated
238 .grant_a (arb_grant_a), // Templated
239 .qsel0 (arb_qsel0_a), // Templated
240 .shift (arb_shift_a), // Templated
241 .data_a (src_data_a[19:10]),
242 .se(se)); // Templated
243
244pcx_mal_dp_ccx_new_macro__type_a i2 (
245 // Outputs
246 .data_x_l (data_out_x_[29:20]), // Templated
247 // Inputs
248 .scan_in(i2_scanin),
249 .scan_out(i2_scanout),
250 .l2clk (l2clk), // Templated
251 .l1clk (l1clka), // Templated
252 .pce0 (arb_q0_holdbar_a), // Templated
253 .pce1 (arb_qsel1_a), // Templated
254 .pce_ov (pce_ov), // Templated
255 .stop (stop), // Templated
256 .siclk_in (siclk_in), // Templated
257 .soclk_in (soclk_in), // Templated
258 .grant_a (arb_grant_a), // Templated
259 .qsel0 (arb_qsel0_a), // Templated
260 .shift (arb_shift_a), // Templated
261 .data_a (src_data_a[29:20]),
262 .se(se)); // Templated
263pcx_mal_dp_ccx_new_macro__type_a i3 (
264 // Outputs
265 .data_x_l (data_out_x_[39:30]), // Templated
266 // Inputs
267 .scan_in(i3_scanin),
268 .scan_out(i3_scanout),
269 .l2clk (l2clk), // Templated
270 .l1clk (l1clka), // Templated
271 .pce0 (arb_q0_holdbar_a), // Templated
272 .pce1 (arb_qsel1_a), // Templated
273 .pce_ov (pce_ov), // Templated
274 .stop (stop), // Templated
275 .siclk_in (siclk_in), // Templated
276 .soclk_in (soclk_in), // Templated
277 .grant_a (arb_grant_a), // Templated
278 .qsel0 (arb_qsel0_a), // Templated
279 .shift (arb_shift_a), // Templated
280 .data_a (src_data_a[39:30]),
281 .se(se)); // Templated
282pcx_mal_dp_ccx_new_macro__type_a i4 (
283 // Outputs
284 .data_x_l (data_out_x_[49:40]), // Templated
285 // Inputs
286 .scan_in(i4_scanin),
287 .scan_out(i4_scanout),
288 .l2clk (l2clk), // Templated
289 .l1clk (l1clka), // Templated
290 .pce0 (arb_q0_holdbar_a), // Templated
291 .pce1 (arb_qsel1_a), // Templated
292 .pce_ov (pce_ov), // Templated
293 .stop (stop), // Templated
294 .siclk_in (siclk_in), // Templated
295 .soclk_in (soclk_in), // Templated
296 .grant_a (arb_grant_a), // Templated
297 .qsel0 (arb_qsel0_a), // Templated
298 .shift (arb_shift_a), // Templated
299 .data_a (src_data_a[49:40]),
300 .se(se)); // Templated
301pcx_mal_dp_ccx_new_macro__type_a i5 (
302 // Outputs
303 .data_x_l (data_out_x_[59:50]), // Templated
304 // Inputs
305 .scan_in(i5_scanin),
306 .scan_out(i5_scanout),
307 .l2clk (l2clk), // Templated
308 .l1clk (l1clka), // Templated
309 .pce0 (arb_q0_holdbar_a), // Templated
310 .pce1 (arb_qsel1_a), // Templated
311 .pce_ov (pce_ov), // Templated
312 .stop (stop), // Templated
313 .siclk_in (siclk_in), // Templated
314 .soclk_in (soclk_in), // Templated
315 .grant_a (arb_grant_a), // Templated
316 .qsel0 (arb_qsel0_a), // Templated
317 .shift (arb_shift_a), // Templated
318 .data_a (src_data_a[59:50]),
319 .se(se)); // Templated
320pcx_mal_dp_ccx_new_macro__type_a i6 (
321 // Outputs
322 .data_x_l (data_out_x_[69:60]), // Templated
323 // Inputs
324 .scan_in(i6_scanin),
325 .scan_out(i6_scanout),
326 .l2clk (l2clk), // Templated
327 .l1clk (l1clka), // Templated
328 .pce0 (arb_q0_holdbar_a), // Templated
329 .pce1 (arb_qsel1_a), // Templated
330 .pce_ov (pce_ov), // Templated
331 .stop (stop), // Templated
332 .siclk_in (siclk_in), // Templated
333 .soclk_in (soclk_in), // Templated
334 .grant_a (arb_grant_a), // Templated
335 .qsel0 (arb_qsel0_a), // Templated
336 .shift (arb_shift_a), // Templated
337 .data_a (src_data_a[69:60]),
338 .se(se)); // Templated
339pcx_mal_dp_ccx_new_macro__type_a i7 (
340 // Outputs
341 .data_x_l (data_out_x_[79:70]), // Templated
342 // Inputs
343 .scan_in(i7_scanin),
344 .scan_out(i7_scanout),
345 .l2clk (l2clk), // Templated
346 .l1clk (l1clkb), // Templated
347 .pce0 (arb_q0_holdbar_a), // Templated
348 .pce1 (arb_qsel1_a), // Templated
349 .pce_ov (pce_ov), // Templated
350 .stop (stop), // Templated
351 .siclk_in (siclk_in), // Templated
352 .soclk_in (soclk_in), // Templated
353 .grant_a (arb_grant_a), // Templated
354 .qsel0 (arb_qsel0_a), // Templated
355 .shift (arb_shift_a), // Templated
356 .data_a (src_data_a[79:70]),
357 .se(se)); // Templated
358pcx_mal_dp_ccx_new_macro__type_a i8 (
359 // Outputs
360 .data_x_l (data_out_x_[89:80]), // Templated
361 // Inputs
362 .scan_in(i8_scanin),
363 .scan_out(i8_scanout),
364 .l2clk (l2clk), // Templated
365 .l1clk (l1clkb), // Templated
366 .pce0 (arb_q0_holdbar_a), // Templated
367 .pce1 (arb_qsel1_a), // Templated
368 .pce_ov (pce_ov), // Templated
369 .stop (stop), // Templated
370 .siclk_in (siclk_in), // Templated
371 .soclk_in (soclk_in), // Templated
372 .grant_a (arb_grant_a), // Templated
373 .qsel0 (arb_qsel0_a), // Templated
374 .shift (arb_shift_a), // Templated
375 .data_a (src_data_a[89:80]),
376 .se(se)); // Templated
377pcx_mal_dp_ccx_new_macro__type_a i9 (
378 // Outputs
379 .data_x_l (data_out_x_[99:90]), // Templated
380 // Inputs
381 .scan_in(i9_scanin),
382 .scan_out(i9_scanout),
383 .l2clk (l2clk), // Templated
384 .l1clk (l1clkb), // Templated
385 .pce0 (arb_q0_holdbar_a), // Templated
386 .pce1 (arb_qsel1_a), // Templated
387 .pce_ov (pce_ov), // Templated
388 .stop (stop), // Templated
389 .siclk_in (siclk_in), // Templated
390 .soclk_in (soclk_in), // Templated
391 .grant_a (arb_grant_a), // Templated
392 .qsel0 (arb_qsel0_a), // Templated
393 .shift (arb_shift_a), // Templated
394 .data_a (src_data_a[99:90]),
395 .se(se)); // Templated
396pcx_mal_dp_ccx_new_macro__type_a i10 (
397 // Outputs
398 .data_x_l (data_out_x_[109:100]), // Templated
399 // Inputs
400 .scan_in(i10_scanin),
401 .scan_out(i10_scanout),
402 .l2clk (l2clk), // Templated
403 .l1clk (l1clkb), // Templated
404 .pce0 (arb_q0_holdbar_a), // Templated
405 .pce1 (arb_qsel1_a), // Templated
406 .pce_ov (pce_ov), // Templated
407 .stop (stop), // Templated
408 .siclk_in (siclk_in), // Templated
409 .soclk_in (soclk_in), // Templated
410 .grant_a (arb_grant_a), // Templated
411 .qsel0 (arb_qsel0_a), // Templated
412 .shift (arb_shift_a), // Templated
413 .data_a (src_data_a[109:100]),
414 .se(se)); // Templated
415pcx_mal_dp_ccx_new_macro__type_a i11 (
416 // Outputs
417 .data_x_l (data_out_x_[119:110]), // Templated
418 // Inputs
419 .scan_in(i11_scanin),
420 .scan_out(i11_scanout),
421 .l2clk (l2clk), // Templated
422 .l1clk (l1clkb), // Templated
423 .pce0 (arb_q0_holdbar_a), // Templated
424 .pce1 (arb_qsel1_a), // Templated
425 .pce_ov (pce_ov), // Templated
426 .stop (stop), // Templated
427 .siclk_in (siclk_in), // Templated
428 .soclk_in (soclk_in), // Templated
429 .grant_a (arb_grant_a), // Templated
430 .qsel0 (arb_qsel0_a), // Templated
431 .shift (arb_shift_a), // Templated
432 .data_a (src_data_a[119:110]),
433 .se(se)); // Templated
434pcx_mal_dp_ccx_new_macro__type_a i12 (
435 // Outputs
436 .data_x_l (data_out_x_[129:120]), // Templated
437 // Inputs
438 .scan_in(i12_scanin),
439 .scan_out(i12_scanout),
440 .l2clk (l2clk), // Templated
441 .l1clk (l1clkb), // Templated
442 .pce0 (arb_q0_holdbar_a), // Templated
443 .pce1 (arb_qsel1_a), // Templated
444 .pce_ov (pce_ov), // Templated
445 .stop (stop), // Templated
446 .siclk_in (siclk_in), // Templated
447 .soclk_in (soclk_in), // Templated
448 .grant_a (arb_grant_a), // Templated
449 .qsel0 (arb_qsel0_a), // Templated
450 .shift (arb_shift_a), // Templated
451 .data_a (src_data_a[129:120]),
452 .se(se)); // Templated
453
454// fixscan start:
455assign i12_scanin = scan_in ;
456assign i11_scanin = i12_scanout ;
457assign i10_scanin = i11_scanout ;
458assign i9_scanin = i10_scanout ;
459assign i8_scanin = i9_scanout ;
460assign i7_scanin = i8_scanout ;
461assign i6_scanin = i7_scanout ;
462assign i5_scanin = i6_scanout ;
463assign i4_scanin = i5_scanout ;
464assign i3_scanin = i4_scanout ;
465assign i2_scanin = i3_scanout ;
466assign i1_scanin = i2_scanout ;
467assign i0_scanin = i1_scanout ;
468assign scan_out = i0_scanout ;
469// fixscan end:
470endmodule
471
472//
473//// scan renames
474//assign pce_ov = tcu_pce_ov;
475//assign stop = tcu_clk_stop;
476//assign siclk = tcu_aclk;
477//assign soclk = tcu_bclk;
478//// end scan
479//
480//// buffer the grant signal
481//
482//buff_macro i_buf_grant (width=1, stack=30c)
483//(
484// .din (arb_grant_a),
485// .dout (grant_a),
486// );
487//
488//msff_macro i_dff_grant_x (width=12, stack=30c)
489//(
490// .scan_in(i_dff_grant_x_scanin),
491// .scan_out(i_dff_grant_x_scanout),
492// .clk (l2clk),
493// .din ({12{grant_a}}),
494// .dout (grant_x[11:0]),
495// .en (1'b1),
496// );
497//
498//
499//// DATAPATH SECTION
500//
501//msff_macro i_dff_q1_2 (width=40, stack=50c)
502//(
503// .scan_in(i_dff_q1_2_scanin),
504// .scan_out(i_dff_q1_2_scanout),
505// .clk (l2clk),
506// .din (src_pcx_data_a[129:90]),
507// .dout (q1_dataout[129:90]),
508// .en (arb_qsel1_a),
509// );
510//
511//msff_macro i_dff_q1_1 (width=50, stack=50c)
512//(
513// .scan_in(i_dff_q1_1_scanin),
514// .scan_out(i_dff_q1_1_scanout),
515// .clk (l2clk),
516// .din (src_pcx_data_a[89:40]),
517// .dout (q1_dataout[89:40]),
518// .en (arb_qsel1_a),
519// );
520//
521//msff_macro i_dff_q1_0 (width=40, stack=50c)
522//(
523// .scan_in(i_dff_q1_0_scanin),
524// .scan_out(i_dff_q1_0_scanout),
525// .clk (l2clk),
526// .din (src_pcx_data_a[39:0]),
527// .dout (q1_dataout[39:0]),
528// .en (arb_qsel1_a),
529// );
530//
531////assign q0_datain_ca[129:0] =
532//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[129:0] : 150'd0) |
533//// (arb_pcxdp_shift_cx ? q1_dataout[129:0] : 150'd0) ;
534//
535//
536//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
537//(
538// .din0 (src_pcx_data_a[129:90]),
539// .din1 (q1_dataout[129:90]),
540// .sel0 (arb_qsel0_a),
541// .sel1 (arb_shift_a),
542// .dout (q0_datain_a[129:90]),
543// );
544//
545//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
546//(
547// .din0 (src_pcx_data_a[89:40]),
548// .din1 (q1_dataout[89:40]),
549// .sel0 (arb_qsel0_a),
550// .sel1 (arb_shift_a),
551// .dout (q0_datain_a[89:40]),
552// );
553//
554//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
555//(
556// .din0 (src_pcx_data_a[39:0]),
557// .din1 (q1_dataout[39:0]),
558// .sel0 (arb_qsel0_a),
559// .sel1 (arb_shift_a),
560// .dout (q0_datain_a[39:0]),
561// );
562//
563//msff_macro i_dff_q0_2 (width=40, stack=50c)
564//(
565// .scan_in(i_dff_q0_2_scanin),
566// .scan_out(i_dff_q0_2_scanout),
567// .clk (l2clk),
568// .din (q0_datain_a[129:90]),
569// .dout (q0_dataout[129:90]),
570// .en (arb_q0_holdbar_a),
571// );
572//
573//msff_macro i_dff_q0_1 (width=50, stack=50c)
574//(
575// .scan_in(i_dff_q0_1_scanin),
576// .scan_out(i_dff_q0_1_scanout),
577// .clk (l2clk),
578// .din (q0_datain_a[89:40]),
579// .dout (q0_dataout[89:40]),
580// .en (arb_q0_holdbar_a),
581// );
582//
583//msff_macro i_dff_q0_0 (width=40, stack=50c)
584//(
585// .scan_in(i_dff_q0_0_scanin),
586// .scan_out(i_dff_q0_0_scanout),
587// .clk (l2clk),
588// .din (q0_datain_a[39:0]),
589// .dout (q0_dataout[39:0]),
590// .en (arb_q0_holdbar_a),
591// );
592//
593//// MUX
594//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
595//(
596// .din0 (q0_dataout[129:90]),
597// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
598// .dout (data_out_x_[129:90]),
599// );
600//
601//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
602//(
603// .din0 (q0_dataout[89:40]),
604// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
605// .dout (data_out_x_[89:40]),
606// );
607//
608//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
609//(
610// .din0 (q0_dataout[39:0]),
611// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
612// .dout (data_out_x_[39:0]),
613// );
614//
615//// fixscan start:
616//assign i_dff_grant_x_scanin = scan_in ;
617//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
618//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
619//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
620//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
621//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
622//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
623//assign scan_out = i_dff_q0_0_scanout ;
624//// fixscan end:
625//endmodule
626//
627// Local Variables:
628// verilog-library-directories:("." "v")
629// verilog-library-files:("./v/ccx_new_macro.v")
630// End:
631//
632
633
634//
635// buff macro
636//
637//
638
639
640
641
642
643module pcx_mal_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
644 din,
645 dout);
646 input [3:0] din;
647 output [3:0] dout;
648
649
650
651
652
653
654buff #(4) d0_0 (
655.in(din[3:0]),
656.out(dout[3:0])
657);
658
659
660
661
662
663
664
665
666endmodule
667
668
669
670
671
672
673
674
675
676// any PARAMS parms go into naming of macro
677
678module pcx_mal_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
679 l2clk,
680 l1en,
681 pce_ov,
682 stop,
683 se,
684 l1clk);
685
686
687 input l2clk;
688 input l1en;
689 input pce_ov;
690 input stop;
691 input se;
692 output l1clk;
693
694
695
696
697
698cl_sc1_l1hdr_24x c_0 (
699
700
701 .l2clk(l2clk),
702 .pce(l1en),
703 .l1clk(l1clk),
704 .se(se),
705 .pce_ov(pce_ov),
706 .stop(stop)
707);
708
709
710
711
712
713
714endmodule
715
716
717
718
719
720
721
722
723
724//
725// ccx macro
726//
727//
728
729
730
731
732
733module pcx_mal_dp_ccx_new_macro__type_a (
734 l2clk,
735 l1clk,
736 pce0,
737 pce1,
738 pce_ov,
739 se,
740 stop,
741 siclk_in,
742 soclk_in,
743 scan_in,
744 grant_a,
745 qsel0,
746 shift,
747 data_a,
748 data_x_l,
749 scan_out);
750wire so5;
751wire siclk_out;
752wire soclk_out;
753wire l1clk0;
754wire l1clk1;
755wire grant_x;
756wire qsel0_buf;
757wire shift_buf;
758
759input l2clk;
760input l1clk;
761input pce0;
762input pce1;
763input pce_ov;
764input se;
765input stop;
766input siclk_in;
767input soclk_in;
768input scan_in;
769input grant_a;
770input qsel0;
771input shift;
772input [9:0] data_a;
773output [9:0] data_x_l;
774output scan_out;
775cl_dp1_ccxhdr c0 (
776.si(scan_in),
777.so(so5),
778 .l2clk(l2clk),
779 .pce0(pce0),
780 .pce1(pce1),
781 .pce_ov(pce_ov),
782 .stop(stop),
783 .siclk_in(siclk_in),
784 .soclk_in(soclk_in),
785 .siclk_out(siclk_out),
786 .soclk_out(soclk_out),
787 .l1clk0(l1clk0),
788 .l1clk1(l1clk1),
789 .se(se),
790 .l1clk(l1clk),
791 .grant_a(grant_a),
792 .grant_x(grant_x),
793 .qsel0(qsel0),
794 .qsel0_buf(qsel0_buf),
795 .shift(shift),
796 .shift_buf(shift_buf)
797);
798
799
800
801
802
803
804ccx_mac_a #(10) mac_a(
805.siclk(siclk_out),
806.soclk(soclk_out),
807.data_a(data_a[9:0]),
808.data_x_l(data_x_l[9:0]),
809.si(so5),
810.so(scan_out),
811 .l1clk0(l1clk0),
812 .l1clk1(l1clk1),
813 .grant_x(grant_x),
814 .qsel0_buf(qsel0_buf),
815 .shift_buf(shift_buf)
816);
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831endmodule
832`endif // `ifndef FPGA
833
834`ifdef FPGA
835
836`timescale 1 ns / 100 ps
837module pcx_mal_dp(data_out_x_, arb_grant_a, arb_qsel0_a, arb_qsel1_a,
838 arb_q0_holdbar_a, arb_shift_a, src_pcx_data_a, l2clk, scan_in,
839 tcu_pce_ov, ccx_aclk, ccx_bclk, tcu_scan_en, scan_out, ccx_aclk_out,
840 ccx_bclk_out, tcu_pce_ov_out, tcu_scan_en_out);
841
842 output [129:0] data_out_x_;
843 input arb_grant_a;
844 input arb_qsel0_a;
845 input arb_qsel1_a;
846 input arb_q0_holdbar_a;
847 input arb_shift_a;
848 input [129:0] src_pcx_data_a;
849 input l2clk;
850 input scan_in;
851 input tcu_pce_ov;
852 input ccx_aclk;
853 input ccx_bclk;
854 input tcu_scan_en;
855 output scan_out;
856 output ccx_aclk_out;
857 output ccx_bclk_out;
858 output tcu_pce_ov_out;
859 output tcu_scan_en_out;
860
861 wire pce_ov;
862 wire stop;
863 wire siclk_in;
864 wire soclk_in;
865 wire se;
866 wire [129:0] src_data_a;
867 wire l1clka;
868 wire l1clkb;
869 wire i0_scanin;
870 wire i0_scanout;
871 wire i1_scanin;
872 wire i1_scanout;
873 wire i2_scanin;
874 wire i2_scanout;
875 wire i3_scanin;
876 wire i3_scanout;
877 wire i4_scanin;
878 wire i4_scanout;
879 wire i5_scanin;
880 wire i5_scanout;
881 wire i6_scanin;
882 wire i6_scanout;
883 wire i7_scanin;
884 wire i7_scanout;
885 wire i8_scanin;
886 wire i8_scanout;
887 wire i9_scanin;
888 wire i9_scanout;
889 wire i10_scanin;
890 wire i10_scanout;
891 wire i11_scanin;
892 wire i11_scanout;
893 wire i12_scanin;
894 wire i12_scanout;
895
896 assign pce_ov = tcu_pce_ov_out;
897 assign stop = 1'b0;
898 assign siclk_in = ccx_aclk_out;
899 assign soclk_in = ccx_bclk_out;
900 assign se = tcu_scan_en_out;
901 assign src_data_a[129:0] = src_pcx_data_a[129:0];
902 assign i12_scanin = scan_in;
903 assign i11_scanin = i12_scanout;
904 assign i10_scanin = i11_scanout;
905 assign i9_scanin = i10_scanout;
906 assign i8_scanin = i9_scanout;
907 assign i7_scanin = i8_scanout;
908 assign i6_scanin = i7_scanout;
909 assign i5_scanin = i6_scanout;
910 assign i4_scanin = i5_scanout;
911 assign i3_scanin = i4_scanout;
912 assign i2_scanin = i3_scanout;
913 assign i1_scanin = i2_scanout;
914 assign i0_scanin = i1_scanout;
915 assign scan_out = i0_scanout;
916
917 buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn(
918 .din ({ccx_aclk, ccx_bclk,
919 tcu_pce_ov, tcu_scan_en}),
920 .dout ({ccx_aclk_out, ccx_bclk_out,
921 tcu_pce_ov_out, tcu_scan_en_out}));
922 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra(
923 .l2clk (l2clk),
924 .l1en (1'b1),
925 .l1clk (l1clka),
926 .pce_ov (pce_ov),
927 .stop (stop),
928 .se (se));
929 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb(
930 .l2clk (l2clk),
931 .l1en (1'b1),
932 .l1clk (l1clkb),
933 .pce_ov (pce_ov),
934 .stop (stop),
935 .se (se));
936 ccx_new_macro__type_a i0(
937 .data_x_l (data_out_x_[9:0]),
938 .scan_in (i0_scanin),
939 .scan_out (i0_scanout),
940 .l2clk (l2clk),
941 .l1clk (l1clka),
942 .pce0 (arb_q0_holdbar_a),
943 .pce1 (arb_qsel1_a),
944 .pce_ov (pce_ov),
945 .stop (stop),
946 .siclk_in (siclk_in),
947 .soclk_in (soclk_in),
948 .grant_a (arb_grant_a),
949 .qsel0 (arb_qsel0_a),
950 .shift (arb_shift_a),
951 .data_a (src_data_a[9:0]),
952 .se (se));
953 ccx_new_macro__type_a i1(
954 .data_x_l (data_out_x_[19:10]),
955 .scan_in (i1_scanin),
956 .scan_out (i1_scanout),
957 .l2clk (l2clk),
958 .l1clk (l1clka),
959 .pce0 (arb_q0_holdbar_a),
960 .pce1 (arb_qsel1_a),
961 .pce_ov (pce_ov),
962 .stop (stop),
963 .siclk_in (siclk_in),
964 .soclk_in (soclk_in),
965 .grant_a (arb_grant_a),
966 .qsel0 (arb_qsel0_a),
967 .shift (arb_shift_a),
968 .data_a (src_data_a[19:10]),
969 .se (se));
970 ccx_new_macro__type_a i2(
971 .data_x_l (data_out_x_[29:20]),
972 .scan_in (i2_scanin),
973 .scan_out (i2_scanout),
974 .l2clk (l2clk),
975 .l1clk (l1clka),
976 .pce0 (arb_q0_holdbar_a),
977 .pce1 (arb_qsel1_a),
978 .pce_ov (pce_ov),
979 .stop (stop),
980 .siclk_in (siclk_in),
981 .soclk_in (soclk_in),
982 .grant_a (arb_grant_a),
983 .qsel0 (arb_qsel0_a),
984 .shift (arb_shift_a),
985 .data_a (src_data_a[29:20]),
986 .se (se));
987 ccx_new_macro__type_a i3(
988 .data_x_l (data_out_x_[39:30]),
989 .scan_in (i3_scanin),
990 .scan_out (i3_scanout),
991 .l2clk (l2clk),
992 .l1clk (l1clka),
993 .pce0 (arb_q0_holdbar_a),
994 .pce1 (arb_qsel1_a),
995 .pce_ov (pce_ov),
996 .stop (stop),
997 .siclk_in (siclk_in),
998 .soclk_in (soclk_in),
999 .grant_a (arb_grant_a),
1000 .qsel0 (arb_qsel0_a),
1001 .shift (arb_shift_a),
1002 .data_a (src_data_a[39:30]),
1003 .se (se));
1004 ccx_new_macro__type_a i4(
1005 .data_x_l (data_out_x_[49:40]),
1006 .scan_in (i4_scanin),
1007 .scan_out (i4_scanout),
1008 .l2clk (l2clk),
1009 .l1clk (l1clka),
1010 .pce0 (arb_q0_holdbar_a),
1011 .pce1 (arb_qsel1_a),
1012 .pce_ov (pce_ov),
1013 .stop (stop),
1014 .siclk_in (siclk_in),
1015 .soclk_in (soclk_in),
1016 .grant_a (arb_grant_a),
1017 .qsel0 (arb_qsel0_a),
1018 .shift (arb_shift_a),
1019 .data_a (src_data_a[49:40]),
1020 .se (se));
1021 ccx_new_macro__type_a i5(
1022 .data_x_l (data_out_x_[59:50]),
1023 .scan_in (i5_scanin),
1024 .scan_out (i5_scanout),
1025 .l2clk (l2clk),
1026 .l1clk (l1clka),
1027 .pce0 (arb_q0_holdbar_a),
1028 .pce1 (arb_qsel1_a),
1029 .pce_ov (pce_ov),
1030 .stop (stop),
1031 .siclk_in (siclk_in),
1032 .soclk_in (soclk_in),
1033 .grant_a (arb_grant_a),
1034 .qsel0 (arb_qsel0_a),
1035 .shift (arb_shift_a),
1036 .data_a (src_data_a[59:50]),
1037 .se (se));
1038 ccx_new_macro__type_a i6(
1039 .data_x_l (data_out_x_[69:60]),
1040 .scan_in (i6_scanin),
1041 .scan_out (i6_scanout),
1042 .l2clk (l2clk),
1043 .l1clk (l1clka),
1044 .pce0 (arb_q0_holdbar_a),
1045 .pce1 (arb_qsel1_a),
1046 .pce_ov (pce_ov),
1047 .stop (stop),
1048 .siclk_in (siclk_in),
1049 .soclk_in (soclk_in),
1050 .grant_a (arb_grant_a),
1051 .qsel0 (arb_qsel0_a),
1052 .shift (arb_shift_a),
1053 .data_a (src_data_a[69:60]),
1054 .se (se));
1055 ccx_new_macro__type_a i7(
1056 .data_x_l (data_out_x_[79:70]),
1057 .scan_in (i7_scanin),
1058 .scan_out (i7_scanout),
1059 .l2clk (l2clk),
1060 .l1clk (l1clkb),
1061 .pce0 (arb_q0_holdbar_a),
1062 .pce1 (arb_qsel1_a),
1063 .pce_ov (pce_ov),
1064 .stop (stop),
1065 .siclk_in (siclk_in),
1066 .soclk_in (soclk_in),
1067 .grant_a (arb_grant_a),
1068 .qsel0 (arb_qsel0_a),
1069 .shift (arb_shift_a),
1070 .data_a (src_data_a[79:70]),
1071 .se (se));
1072 ccx_new_macro__type_a i8(
1073 .data_x_l (data_out_x_[89:80]),
1074 .scan_in (i8_scanin),
1075 .scan_out (i8_scanout),
1076 .l2clk (l2clk),
1077 .l1clk (l1clkb),
1078 .pce0 (arb_q0_holdbar_a),
1079 .pce1 (arb_qsel1_a),
1080 .pce_ov (pce_ov),
1081 .stop (stop),
1082 .siclk_in (siclk_in),
1083 .soclk_in (soclk_in),
1084 .grant_a (arb_grant_a),
1085 .qsel0 (arb_qsel0_a),
1086 .shift (arb_shift_a),
1087 .data_a (src_data_a[89:80]),
1088 .se (se));
1089 ccx_new_macro__type_a i9(
1090 .data_x_l (data_out_x_[99:90]),
1091 .scan_in (i9_scanin),
1092 .scan_out (i9_scanout),
1093 .l2clk (l2clk),
1094 .l1clk (l1clkb),
1095 .pce0 (arb_q0_holdbar_a),
1096 .pce1 (arb_qsel1_a),
1097 .pce_ov (pce_ov),
1098 .stop (stop),
1099 .siclk_in (siclk_in),
1100 .soclk_in (soclk_in),
1101 .grant_a (arb_grant_a),
1102 .qsel0 (arb_qsel0_a),
1103 .shift (arb_shift_a),
1104 .data_a (src_data_a[99:90]),
1105 .se (se));
1106 ccx_new_macro__type_a i10(
1107 .data_x_l (data_out_x_[109:100]),
1108 .scan_in (i10_scanin),
1109 .scan_out (i10_scanout),
1110 .l2clk (l2clk),
1111 .l1clk (l1clkb),
1112 .pce0 (arb_q0_holdbar_a),
1113 .pce1 (arb_qsel1_a),
1114 .pce_ov (pce_ov),
1115 .stop (stop),
1116 .siclk_in (siclk_in),
1117 .soclk_in (soclk_in),
1118 .grant_a (arb_grant_a),
1119 .qsel0 (arb_qsel0_a),
1120 .shift (arb_shift_a),
1121 .data_a (src_data_a[109:100]),
1122 .se (se));
1123 ccx_new_macro__type_a i11(
1124 .data_x_l (data_out_x_[119:110]),
1125 .scan_in (i11_scanin),
1126 .scan_out (i11_scanout),
1127 .l2clk (l2clk),
1128 .l1clk (l1clkb),
1129 .pce0 (arb_q0_holdbar_a),
1130 .pce1 (arb_qsel1_a),
1131 .pce_ov (pce_ov),
1132 .stop (stop),
1133 .siclk_in (siclk_in),
1134 .soclk_in (soclk_in),
1135 .grant_a (arb_grant_a),
1136 .qsel0 (arb_qsel0_a),
1137 .shift (arb_shift_a),
1138 .data_a (src_data_a[119:110]),
1139 .se (se));
1140 ccx_new_macro__type_a i12(
1141 .data_x_l (data_out_x_[129:120]),
1142 .scan_in (i12_scanin),
1143 .scan_out (i12_scanout),
1144 .l2clk (l2clk),
1145 .l1clk (l1clkb),
1146 .pce0 (arb_q0_holdbar_a),
1147 .pce1 (arb_qsel1_a),
1148 .pce_ov (pce_ov),
1149 .stop (stop),
1150 .siclk_in (siclk_in),
1151 .soclk_in (soclk_in),
1152 .grant_a (arb_grant_a),
1153 .qsel0 (arb_qsel0_a),
1154 .shift (arb_shift_a),
1155 .data_a (src_data_a[129:120]),
1156 .se (se));
1157endmodule
1158
1159`endif // `ifdef FPGA
1160
1161
1162
1163
1164
Full OpenSPARC design & verification tarball including full HDL.