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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / pcx_mar_dp.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pcx_mar_dp.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
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30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module pcx_mar_dp (
37 data_out_x_,
38 arb_grant_a,
39 arb_qsel0_a,
40 arb_qsel1_a,
41 arb_q0_holdbar_a,
42 arb_shift_a,
43 src_pcx_data_a,
44 l2clk,
45 scan_in,
46 tcu_pce_ov,
47 ccx_aclk,
48 ccx_bclk,
49 tcu_scan_en,
50 scan_out,
51 ccx_aclk_out,
52 ccx_bclk_out,
53 tcu_pce_ov_out,
54 tcu_scan_en_out);
55wire pce_ov;
56wire stop;
57wire siclk_in;
58wire soclk_in;
59wire se;
60wire [129:0] src_data_a;
61wire l1clka;
62wire l1clkb;
63wire i0_scanin;
64wire i0_scanout;
65wire i1_scanin;
66wire i1_scanout;
67wire i2_scanin;
68wire i2_scanout;
69wire i3_scanin;
70wire i3_scanout;
71wire i4_scanin;
72wire i4_scanout;
73wire i5_scanin;
74wire i5_scanout;
75wire i6_scanin;
76wire i6_scanout;
77wire i7_scanin;
78wire i7_scanout;
79wire i8_scanin;
80wire i8_scanout;
81wire i9_scanin;
82wire i9_scanout;
83wire i10_scanin;
84wire i10_scanout;
85wire i11_scanin;
86wire i11_scanout;
87wire i12_scanin;
88wire i12_scanout;
89
90
91output [129:0] data_out_x_;
92
93input arb_grant_a;
94input arb_qsel0_a;
95input arb_qsel1_a;
96input arb_q0_holdbar_a;
97input arb_shift_a;
98
99
100input [129:0] src_pcx_data_a;
101
102// globals
103input l2clk;
104input scan_in;
105input tcu_pce_ov; // scan signals
106input ccx_aclk;
107input ccx_bclk;
108input tcu_scan_en;
109
110output scan_out;
111
112// buffer the high fanout nets
113output ccx_aclk_out;
114output ccx_bclk_out;
115output tcu_pce_ov_out;
116output tcu_scan_en_out;
117
118// scan renames
119assign pce_ov = tcu_pce_ov_out;
120assign stop = 1'b0;
121assign siclk_in = ccx_aclk_out;
122assign soclk_in = ccx_bclk_out;
123assign se = tcu_scan_en_out ;
124// end scan
125
126assign src_data_a[129:0] = src_pcx_data_a[129:0];
127
128//cl_dp1_l1hdr_24x gkt_hdr (
129//.l2clk(l2clk),
130//.pce(1'b1),
131//.aclk(siclk),
132//.bclk(soclk),
133//.siclk_out(siclk_out_unused),
134//.soclk_out(soclk_out_unused),
135//.l1clk(l1clk),
136//.pce_ov(pce_ov),
137//.stop(stop)
138//);
139
140
141//l1clkhdr_dp_macro gkt_hdra
142// (
143// .l2clk (l2clk),
144// .l1en (1'b1 ),
145// .siclk_out (sia_unused),
146// .soclk_out (soa_unused),
147// .l1clk (l1clka)
148// );
149
150//l1clkhdr_dp_macro gkt_hdrb
151// (
152// .l2clk (l2clk),
153// .l1en (1'b1 ),
154// .siclk_out (sib_unused),
155// .soclk_out (sob_unused),
156// .l1clk (l1clkb)
157// );
158
159pcx_mar_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn (
160 .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}),
161 .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out})
162);
163
164pcx_mar_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra
165 (
166 .l2clk (l2clk),
167 .l1en (1'b1 ),
168 .l1clk (l1clka),
169 .pce_ov(pce_ov),
170 .stop(stop),
171 .se(se)
172 );
173
174pcx_mar_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb
175 (
176 .l2clk (l2clk),
177 .l1en (1'b1 ),
178 .l1clk (l1clkb),
179 .pce_ov(pce_ov),
180 .stop(stop),
181 .se(se)
182 );
183
184
185// ccx_new_macro_a AUTO_TEMPLATE
186// (
187//.scan_in(AUTO_TEMPLATE_scanin),
188//.scan_out(AUTO_TEMPLATE_scanout),
189//.l2clk (l2clk),
190//.l1clk (l1clk),
191//.pce0 (arb_q0_holdbar_a),
192//.pce1 (arb_qsel1_a),
193//.pce_ov (pce_ov),
194//.stop (stop),
195//.siclk_in (siclk_in),
196//.soclk_in (soclk_in),
197//.grant_a (arb_grant_a),
198//.qsel0 (arb_qsel0_a),
199//.shift (arb_shift_a),
200//.data_a (src_data_a[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
201//.data_x_l (data_out_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
202//);
203
204pcx_mar_dp_ccx_new_macro__type_a i0 (
205 // Outputs
206 .data_x_l (data_out_x_[9:0]), // Templated
207 // Inputs
208 .scan_in(i0_scanin),
209 .scan_out(i0_scanout),
210 .l2clk (l2clk), // Templated
211 .l1clk (l1clka), // Templated
212 .pce0 (arb_q0_holdbar_a), // Templated
213 .pce1 (arb_qsel1_a), // Templated
214 .pce_ov (pce_ov), // Templated
215 .stop (stop), // Templated
216 .siclk_in (siclk_in), // Templated
217 .soclk_in (soclk_in), // Templated
218 .grant_a (arb_grant_a), // Templated
219 .qsel0 (arb_qsel0_a), // Templated
220 .shift (arb_shift_a), // Templated
221 .data_a (src_data_a[9:0]),
222 .se(se)); // Templated
223
224pcx_mar_dp_ccx_new_macro__type_a i1 (
225 // Outputs
226 .data_x_l (data_out_x_[19:10]), // Templated
227 // Inputs
228 .scan_in(i1_scanin),
229 .scan_out(i1_scanout),
230 .l2clk (l2clk), // Templated
231 .l1clk (l1clka), // Templated
232 .pce0 (arb_q0_holdbar_a), // Templated
233 .pce1 (arb_qsel1_a), // Templated
234 .pce_ov (pce_ov), // Templated
235 .stop (stop), // Templated
236 .siclk_in (siclk_in), // Templated
237 .soclk_in (soclk_in), // Templated
238 .grant_a (arb_grant_a), // Templated
239 .qsel0 (arb_qsel0_a), // Templated
240 .shift (arb_shift_a), // Templated
241 .data_a (src_data_a[19:10]),
242 .se(se)); // Templated
243
244pcx_mar_dp_ccx_new_macro__type_a i2 (
245 // Outputs
246 .data_x_l (data_out_x_[29:20]), // Templated
247 // Inputs
248 .scan_in(i2_scanin),
249 .scan_out(i2_scanout),
250 .l2clk (l2clk), // Templated
251 .l1clk (l1clka), // Templated
252 .pce0 (arb_q0_holdbar_a), // Templated
253 .pce1 (arb_qsel1_a), // Templated
254 .pce_ov (pce_ov), // Templated
255 .stop (stop), // Templated
256 .siclk_in (siclk_in), // Templated
257 .soclk_in (soclk_in), // Templated
258 .grant_a (arb_grant_a), // Templated
259 .qsel0 (arb_qsel0_a), // Templated
260 .shift (arb_shift_a), // Templated
261 .data_a (src_data_a[29:20]),
262 .se(se)); // Templated
263pcx_mar_dp_ccx_new_macro__type_a i3 (
264 // Outputs
265 .data_x_l (data_out_x_[39:30]), // Templated
266 // Inputs
267 .scan_in(i3_scanin),
268 .scan_out(i3_scanout),
269 .l2clk (l2clk), // Templated
270 .l1clk (l1clka), // Templated
271 .pce0 (arb_q0_holdbar_a), // Templated
272 .pce1 (arb_qsel1_a), // Templated
273 .pce_ov (pce_ov), // Templated
274 .stop (stop), // Templated
275 .siclk_in (siclk_in), // Templated
276 .soclk_in (soclk_in), // Templated
277 .grant_a (arb_grant_a), // Templated
278 .qsel0 (arb_qsel0_a), // Templated
279 .shift (arb_shift_a), // Templated
280 .data_a (src_data_a[39:30]),
281 .se(se)); // Templated
282pcx_mar_dp_ccx_new_macro__type_a i4 (
283 // Outputs
284 .data_x_l (data_out_x_[49:40]), // Templated
285 // Inputs
286 .scan_in(i4_scanin),
287 .scan_out(i4_scanout),
288 .l2clk (l2clk), // Templated
289 .l1clk (l1clka), // Templated
290 .pce0 (arb_q0_holdbar_a), // Templated
291 .pce1 (arb_qsel1_a), // Templated
292 .pce_ov (pce_ov), // Templated
293 .stop (stop), // Templated
294 .siclk_in (siclk_in), // Templated
295 .soclk_in (soclk_in), // Templated
296 .grant_a (arb_grant_a), // Templated
297 .qsel0 (arb_qsel0_a), // Templated
298 .shift (arb_shift_a), // Templated
299 .data_a (src_data_a[49:40]),
300 .se(se)); // Templated
301pcx_mar_dp_ccx_new_macro__type_a i5 (
302 // Outputs
303 .data_x_l (data_out_x_[59:50]), // Templated
304 // Inputs
305 .scan_in(i5_scanin),
306 .scan_out(i5_scanout),
307 .l2clk (l2clk), // Templated
308 .l1clk (l1clka), // Templated
309 .pce0 (arb_q0_holdbar_a), // Templated
310 .pce1 (arb_qsel1_a), // Templated
311 .pce_ov (pce_ov), // Templated
312 .stop (stop), // Templated
313 .siclk_in (siclk_in), // Templated
314 .soclk_in (soclk_in), // Templated
315 .grant_a (arb_grant_a), // Templated
316 .qsel0 (arb_qsel0_a), // Templated
317 .shift (arb_shift_a), // Templated
318 .data_a (src_data_a[59:50]),
319 .se(se)); // Templated
320pcx_mar_dp_ccx_new_macro__type_a i6 (
321 // Outputs
322 .data_x_l (data_out_x_[69:60]), // Templated
323 // Inputs
324 .scan_in(i6_scanin),
325 .scan_out(i6_scanout),
326 .l2clk (l2clk), // Templated
327 .l1clk (l1clka), // Templated
328 .pce0 (arb_q0_holdbar_a), // Templated
329 .pce1 (arb_qsel1_a), // Templated
330 .pce_ov (pce_ov), // Templated
331 .stop (stop), // Templated
332 .siclk_in (siclk_in), // Templated
333 .soclk_in (soclk_in), // Templated
334 .grant_a (arb_grant_a), // Templated
335 .qsel0 (arb_qsel0_a), // Templated
336 .shift (arb_shift_a), // Templated
337 .data_a (src_data_a[69:60]),
338 .se(se)); // Templated
339pcx_mar_dp_ccx_new_macro__type_a i7 (
340 // Outputs
341 .data_x_l (data_out_x_[79:70]), // Templated
342 // Inputs
343 .scan_in(i7_scanin),
344 .scan_out(i7_scanout),
345 .l2clk (l2clk), // Templated
346 .l1clk (l1clkb), // Templated
347 .pce0 (arb_q0_holdbar_a), // Templated
348 .pce1 (arb_qsel1_a), // Templated
349 .pce_ov (pce_ov), // Templated
350 .stop (stop), // Templated
351 .siclk_in (siclk_in), // Templated
352 .soclk_in (soclk_in), // Templated
353 .grant_a (arb_grant_a), // Templated
354 .qsel0 (arb_qsel0_a), // Templated
355 .shift (arb_shift_a), // Templated
356 .data_a (src_data_a[79:70]),
357 .se(se)); // Templated
358pcx_mar_dp_ccx_new_macro__type_a i8 (
359 // Outputs
360 .data_x_l (data_out_x_[89:80]), // Templated
361 // Inputs
362 .scan_in(i8_scanin),
363 .scan_out(i8_scanout),
364 .l2clk (l2clk), // Templated
365 .l1clk (l1clkb), // Templated
366 .pce0 (arb_q0_holdbar_a), // Templated
367 .pce1 (arb_qsel1_a), // Templated
368 .pce_ov (pce_ov), // Templated
369 .stop (stop), // Templated
370 .siclk_in (siclk_in), // Templated
371 .soclk_in (soclk_in), // Templated
372 .grant_a (arb_grant_a), // Templated
373 .qsel0 (arb_qsel0_a), // Templated
374 .shift (arb_shift_a), // Templated
375 .data_a (src_data_a[89:80]),
376 .se(se)); // Templated
377pcx_mar_dp_ccx_new_macro__type_a i9 (
378 // Outputs
379 .data_x_l (data_out_x_[99:90]), // Templated
380 // Inputs
381 .scan_in(i9_scanin),
382 .scan_out(i9_scanout),
383 .l2clk (l2clk), // Templated
384 .l1clk (l1clkb), // Templated
385 .pce0 (arb_q0_holdbar_a), // Templated
386 .pce1 (arb_qsel1_a), // Templated
387 .pce_ov (pce_ov), // Templated
388 .stop (stop), // Templated
389 .siclk_in (siclk_in), // Templated
390 .soclk_in (soclk_in), // Templated
391 .grant_a (arb_grant_a), // Templated
392 .qsel0 (arb_qsel0_a), // Templated
393 .shift (arb_shift_a), // Templated
394 .data_a (src_data_a[99:90]),
395 .se(se)); // Templated
396pcx_mar_dp_ccx_new_macro__type_a i10 (
397 // Outputs
398 .data_x_l (data_out_x_[109:100]), // Templated
399 // Inputs
400 .scan_in(i10_scanin),
401 .scan_out(i10_scanout),
402 .l2clk (l2clk), // Templated
403 .l1clk (l1clkb), // Templated
404 .pce0 (arb_q0_holdbar_a), // Templated
405 .pce1 (arb_qsel1_a), // Templated
406 .pce_ov (pce_ov), // Templated
407 .stop (stop), // Templated
408 .siclk_in (siclk_in), // Templated
409 .soclk_in (soclk_in), // Templated
410 .grant_a (arb_grant_a), // Templated
411 .qsel0 (arb_qsel0_a), // Templated
412 .shift (arb_shift_a), // Templated
413 .data_a (src_data_a[109:100]),
414 .se(se)); // Templated
415pcx_mar_dp_ccx_new_macro__type_a i11 (
416 // Outputs
417 .data_x_l (data_out_x_[119:110]), // Templated
418 // Inputs
419 .scan_in(i11_scanin),
420 .scan_out(i11_scanout),
421 .l2clk (l2clk), // Templated
422 .l1clk (l1clkb), // Templated
423 .pce0 (arb_q0_holdbar_a), // Templated
424 .pce1 (arb_qsel1_a), // Templated
425 .pce_ov (pce_ov), // Templated
426 .stop (stop), // Templated
427 .siclk_in (siclk_in), // Templated
428 .soclk_in (soclk_in), // Templated
429 .grant_a (arb_grant_a), // Templated
430 .qsel0 (arb_qsel0_a), // Templated
431 .shift (arb_shift_a), // Templated
432 .data_a (src_data_a[119:110]),
433 .se(se)); // Templated
434pcx_mar_dp_ccx_new_macro__type_a i12 (
435 // Outputs
436 .data_x_l (data_out_x_[129:120]), // Templated
437 // Inputs
438 .scan_in(i12_scanin),
439 .scan_out(i12_scanout),
440 .l2clk (l2clk), // Templated
441 .l1clk (l1clkb), // Templated
442 .pce0 (arb_q0_holdbar_a), // Templated
443 .pce1 (arb_qsel1_a), // Templated
444 .pce_ov (pce_ov), // Templated
445 .stop (stop), // Templated
446 .siclk_in (siclk_in), // Templated
447 .soclk_in (soclk_in), // Templated
448 .grant_a (arb_grant_a), // Templated
449 .qsel0 (arb_qsel0_a), // Templated
450 .shift (arb_shift_a), // Templated
451 .data_a (src_data_a[129:120]),
452 .se(se)); // Templated
453
454// fixscan start:
455assign i12_scanin = scan_in ;
456assign i11_scanin = i12_scanout ;
457assign i10_scanin = i11_scanout ;
458assign i9_scanin = i10_scanout ;
459assign i8_scanin = i9_scanout ;
460assign i7_scanin = i8_scanout ;
461assign i6_scanin = i7_scanout ;
462assign i5_scanin = i6_scanout ;
463assign i4_scanin = i5_scanout ;
464assign i3_scanin = i4_scanout ;
465assign i2_scanin = i3_scanout ;
466assign i1_scanin = i2_scanout ;
467assign i0_scanin = i1_scanout ;
468assign scan_out = i0_scanout ;
469// fixscan end:
470endmodule
471
472//
473//// scan renames
474//assign pce_ov = tcu_pce_ov;
475//assign stop = tcu_clk_stop;
476//assign siclk = ccx_aclk;
477//assign soclk = ccx_bclk;
478//// end scan
479//
480//// buffer the grant signal
481//
482//buff_macro i_buf_grant (width=1, stack=30c)
483//(
484// .din (arb_grant_a),
485// .dout (grant_a),
486// );
487//
488//msff_macro i_dff_grant_x (width=12, stack=30c)
489//(
490// .scan_in(i_dff_grant_x_scanin),
491// .scan_out(i_dff_grant_x_scanout),
492// .clk (l2clk),
493// .din ({12{grant_a}}),
494// .dout (grant_x[11:0]),
495// .en (1'b1),
496// );
497//
498//
499//// DATAPATH SECTION
500//
501//msff_macro i_dff_q1_2 (width=40, stack=50c)
502//(
503// .scan_in(i_dff_q1_2_scanin),
504// .scan_out(i_dff_q1_2_scanout),
505// .clk (l2clk),
506// .din (src_pcx_data_a[129:90]),
507// .dout (q1_dataout[129:90]),
508// .en (arb_qsel1_a),
509// );
510//
511//msff_macro i_dff_q1_1 (width=50, stack=50c)
512//(
513// .scan_in(i_dff_q1_1_scanin),
514// .scan_out(i_dff_q1_1_scanout),
515// .clk (l2clk),
516// .din (src_pcx_data_a[89:40]),
517// .dout (q1_dataout[89:40]),
518// .en (arb_qsel1_a),
519// );
520//
521//msff_macro i_dff_q1_0 (width=40, stack=50c)
522//(
523// .scan_in(i_dff_q1_0_scanin),
524// .scan_out(i_dff_q1_0_scanout),
525// .clk (l2clk),
526// .din (src_pcx_data_a[39:0]),
527// .dout (q1_dataout[39:0]),
528// .en (arb_qsel1_a),
529// );
530//
531////assign q0_datain_ca[129:0] =
532//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[129:0] : 150'd0) |
533//// (arb_pcxdp_shift_cx ? q1_dataout[129:0] : 150'd0) ;
534//
535//
536//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
537//(
538// .din0 (src_pcx_data_a[129:90]),
539// .din1 (q1_dataout[129:90]),
540// .sel0 (arb_qsel0_a),
541// .sel1 (arb_shift_a),
542// .dout (q0_datain_a[129:90]),
543// );
544//
545//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
546//(
547// .din0 (src_pcx_data_a[89:40]),
548// .din1 (q1_dataout[89:40]),
549// .sel0 (arb_qsel0_a),
550// .sel1 (arb_shift_a),
551// .dout (q0_datain_a[89:40]),
552// );
553//
554//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
555//(
556// .din0 (src_pcx_data_a[39:0]),
557// .din1 (q1_dataout[39:0]),
558// .sel0 (arb_qsel0_a),
559// .sel1 (arb_shift_a),
560// .dout (q0_datain_a[39:0]),
561// );
562//
563//msff_macro i_dff_q0_2 (width=40, stack=50c)
564//(
565// .scan_in(i_dff_q0_2_scanin),
566// .scan_out(i_dff_q0_2_scanout),
567// .clk (l2clk),
568// .din (q0_datain_a[129:90]),
569// .dout (q0_dataout[129:90]),
570// .en (arb_q0_holdbar_a),
571// );
572//
573//msff_macro i_dff_q0_1 (width=50, stack=50c)
574//(
575// .scan_in(i_dff_q0_1_scanin),
576// .scan_out(i_dff_q0_1_scanout),
577// .clk (l2clk),
578// .din (q0_datain_a[89:40]),
579// .dout (q0_dataout[89:40]),
580// .en (arb_q0_holdbar_a),
581// );
582//
583//msff_macro i_dff_q0_0 (width=40, stack=50c)
584//(
585// .scan_in(i_dff_q0_0_scanin),
586// .scan_out(i_dff_q0_0_scanout),
587// .clk (l2clk),
588// .din (q0_datain_a[39:0]),
589// .dout (q0_dataout[39:0]),
590// .en (arb_q0_holdbar_a),
591// );
592//
593//// MUX
594//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
595//(
596// .din0 (q0_dataout[129:90]),
597// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
598// .dout (data_out_x_[129:90]),
599// );
600//
601//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
602//(
603// .din0 (q0_dataout[89:40]),
604// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
605// .dout (data_out_x_[89:40]),
606// );
607//
608//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
609//(
610// .din0 (q0_dataout[39:0]),
611// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
612// .dout (data_out_x_[39:0]),
613// );
614//
615//// fixscan start:
616//assign i_dff_grant_x_scanin = scan_in ;
617//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
618//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
619//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
620//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
621//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
622//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
623//assign scan_out = i_dff_q0_0_scanout ;
624//// fixscan end:
625//endmodule
626//
627// Local Variables:
628// verilog-library-directories:("." "v")
629// verilog-library-files:("./v/ccx_new_macro.v")
630// End:
631//
632
633
634
635//
636// buff macro
637//
638//
639
640
641
642
643
644module pcx_mar_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
645 din,
646 dout);
647 input [3:0] din;
648 output [3:0] dout;
649
650
651
652
653
654
655buff #(4) d0_0 (
656.in(din[3:0]),
657.out(dout[3:0])
658);
659
660
661
662
663
664
665
666
667endmodule
668
669
670
671
672
673
674
675
676
677// any PARAMS parms go into naming of macro
678
679module pcx_mar_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
680 l2clk,
681 l1en,
682 pce_ov,
683 stop,
684 se,
685 l1clk);
686
687
688 input l2clk;
689 input l1en;
690 input pce_ov;
691 input stop;
692 input se;
693 output l1clk;
694
695
696
697
698
699cl_sc1_l1hdr_24x c_0 (
700
701
702 .l2clk(l2clk),
703 .pce(l1en),
704 .l1clk(l1clk),
705 .se(se),
706 .pce_ov(pce_ov),
707 .stop(stop)
708);
709
710
711
712
713
714
715endmodule
716
717
718
719
720
721
722
723
724
725//
726// ccx macro
727//
728//
729
730
731
732
733
734module pcx_mar_dp_ccx_new_macro__type_a (
735 l2clk,
736 l1clk,
737 pce0,
738 pce1,
739 pce_ov,
740 se,
741 stop,
742 siclk_in,
743 soclk_in,
744 scan_in,
745 grant_a,
746 qsel0,
747 shift,
748 data_a,
749 data_x_l,
750 scan_out);
751wire so5;
752wire siclk_out;
753wire soclk_out;
754wire l1clk0;
755wire l1clk1;
756wire grant_x;
757wire qsel0_buf;
758wire shift_buf;
759
760input l2clk;
761input l1clk;
762input pce0;
763input pce1;
764input pce_ov;
765input se;
766input stop;
767input siclk_in;
768input soclk_in;
769input scan_in;
770input grant_a;
771input qsel0;
772input shift;
773input [9:0] data_a;
774output [9:0] data_x_l;
775output scan_out;
776cl_dp1_ccxhdr c0 (
777.si(scan_in),
778.so(so5),
779 .l2clk(l2clk),
780 .pce0(pce0),
781 .pce1(pce1),
782 .pce_ov(pce_ov),
783 .stop(stop),
784 .siclk_in(siclk_in),
785 .soclk_in(soclk_in),
786 .siclk_out(siclk_out),
787 .soclk_out(soclk_out),
788 .l1clk0(l1clk0),
789 .l1clk1(l1clk1),
790 .se(se),
791 .l1clk(l1clk),
792 .grant_a(grant_a),
793 .grant_x(grant_x),
794 .qsel0(qsel0),
795 .qsel0_buf(qsel0_buf),
796 .shift(shift),
797 .shift_buf(shift_buf)
798);
799
800
801
802
803
804
805ccx_mac_a #(10) mac_a(
806.siclk(siclk_out),
807.soclk(soclk_out),
808.data_a(data_a[9:0]),
809.data_x_l(data_x_l[9:0]),
810.si(so5),
811.so(scan_out),
812 .l1clk0(l1clk0),
813 .l1clk1(l1clk1),
814 .grant_x(grant_x),
815 .qsel0_buf(qsel0_buf),
816 .shift_buf(shift_buf)
817);
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832endmodule
833`endif // `ifndef FPGA
834
835`ifdef FPGA
836
837/* Source file "1_core_8_thrd_dut_rtl.v.edt.2", line 192751 */
838`timescale 1 ns / 100 ps
839module pcx_mar_dp(data_out_x_, arb_grant_a, arb_qsel0_a, arb_qsel1_a,
840 arb_q0_holdbar_a, arb_shift_a, src_pcx_data_a, l2clk, scan_in,
841 tcu_pce_ov, ccx_aclk, ccx_bclk, tcu_scan_en, scan_out, ccx_aclk_out,
842 ccx_bclk_out, tcu_pce_ov_out, tcu_scan_en_out);
843
844 output [129:0] data_out_x_;
845 input arb_grant_a;
846 input arb_qsel0_a;
847 input arb_qsel1_a;
848 input arb_q0_holdbar_a;
849 input arb_shift_a;
850 input [129:0] src_pcx_data_a;
851 input l2clk;
852 input scan_in;
853 input tcu_pce_ov;
854 input ccx_aclk;
855 input ccx_bclk;
856 input tcu_scan_en;
857 output scan_out;
858 output ccx_aclk_out;
859 output ccx_bclk_out;
860 output tcu_pce_ov_out;
861 output tcu_scan_en_out;
862
863 wire pce_ov;
864 wire stop;
865 wire siclk_in;
866 wire soclk_in;
867 wire se;
868 wire [129:0] src_data_a;
869 wire l1clka;
870 wire l1clkb;
871 wire i0_scanin;
872 wire i0_scanout;
873 wire i1_scanin;
874 wire i1_scanout;
875 wire i2_scanin;
876 wire i2_scanout;
877 wire i3_scanin;
878 wire i3_scanout;
879 wire i4_scanin;
880 wire i4_scanout;
881 wire i5_scanin;
882 wire i5_scanout;
883 wire i6_scanin;
884 wire i6_scanout;
885 wire i7_scanin;
886 wire i7_scanout;
887 wire i8_scanin;
888 wire i8_scanout;
889 wire i9_scanin;
890 wire i9_scanout;
891 wire i10_scanin;
892 wire i10_scanout;
893 wire i11_scanin;
894 wire i11_scanout;
895 wire i12_scanin;
896 wire i12_scanout;
897
898 assign pce_ov = tcu_pce_ov_out;
899 assign stop = 1'b0;
900 assign siclk_in = ccx_aclk_out;
901 assign soclk_in = ccx_bclk_out;
902 assign se = tcu_scan_en_out;
903 assign src_data_a[129:0] = src_pcx_data_a[129:0];
904 assign i12_scanin = scan_in;
905 assign i11_scanin = i12_scanout;
906 assign i10_scanin = i11_scanout;
907 assign i9_scanin = i10_scanout;
908 assign i8_scanin = i9_scanout;
909 assign i7_scanin = i8_scanout;
910 assign i6_scanin = i7_scanout;
911 assign i5_scanin = i6_scanout;
912 assign i4_scanin = i5_scanout;
913 assign i3_scanin = i4_scanout;
914 assign i2_scanin = i3_scanout;
915 assign i1_scanin = i2_scanout;
916 assign i0_scanin = i1_scanout;
917 assign scan_out = i0_scanout;
918
919 buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn(
920 .din ({ccx_aclk, ccx_bclk,
921 tcu_pce_ov, tcu_scan_en}),
922 .dout ({ccx_aclk_out, ccx_bclk_out,
923 tcu_pce_ov_out, tcu_scan_en_out}));
924 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra(
925 .l2clk (l2clk),
926 .l1en (1'b1),
927 .l1clk (l1clka),
928 .pce_ov (pce_ov),
929 .stop (stop),
930 .se (se));
931 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb(
932 .l2clk (l2clk),
933 .l1en (1'b1),
934 .l1clk (l1clkb),
935 .pce_ov (pce_ov),
936 .stop (stop),
937 .se (se));
938 ccx_new_macro__type_a i0(
939 .data_x_l (data_out_x_[9:0]),
940 .scan_in (i0_scanin),
941 .scan_out (i0_scanout),
942 .l2clk (l2clk),
943 .l1clk (l1clka),
944 .pce0 (arb_q0_holdbar_a),
945 .pce1 (arb_qsel1_a),
946 .pce_ov (pce_ov),
947 .stop (stop),
948 .siclk_in (siclk_in),
949 .soclk_in (soclk_in),
950 .grant_a (arb_grant_a),
951 .qsel0 (arb_qsel0_a),
952 .shift (arb_shift_a),
953 .data_a (src_data_a[9:0]),
954 .se (se));
955 ccx_new_macro__type_a i1(
956 .data_x_l (data_out_x_[19:10]),
957 .scan_in (i1_scanin),
958 .scan_out (i1_scanout),
959 .l2clk (l2clk),
960 .l1clk (l1clka),
961 .pce0 (arb_q0_holdbar_a),
962 .pce1 (arb_qsel1_a),
963 .pce_ov (pce_ov),
964 .stop (stop),
965 .siclk_in (siclk_in),
966 .soclk_in (soclk_in),
967 .grant_a (arb_grant_a),
968 .qsel0 (arb_qsel0_a),
969 .shift (arb_shift_a),
970 .data_a (src_data_a[19:10]),
971 .se (se));
972 ccx_new_macro__type_a i2(
973 .data_x_l (data_out_x_[29:20]),
974 .scan_in (i2_scanin),
975 .scan_out (i2_scanout),
976 .l2clk (l2clk),
977 .l1clk (l1clka),
978 .pce0 (arb_q0_holdbar_a),
979 .pce1 (arb_qsel1_a),
980 .pce_ov (pce_ov),
981 .stop (stop),
982 .siclk_in (siclk_in),
983 .soclk_in (soclk_in),
984 .grant_a (arb_grant_a),
985 .qsel0 (arb_qsel0_a),
986 .shift (arb_shift_a),
987 .data_a (src_data_a[29:20]),
988 .se (se));
989 ccx_new_macro__type_a i3(
990 .data_x_l (data_out_x_[39:30]),
991 .scan_in (i3_scanin),
992 .scan_out (i3_scanout),
993 .l2clk (l2clk),
994 .l1clk (l1clka),
995 .pce0 (arb_q0_holdbar_a),
996 .pce1 (arb_qsel1_a),
997 .pce_ov (pce_ov),
998 .stop (stop),
999 .siclk_in (siclk_in),
1000 .soclk_in (soclk_in),
1001 .grant_a (arb_grant_a),
1002 .qsel0 (arb_qsel0_a),
1003 .shift (arb_shift_a),
1004 .data_a (src_data_a[39:30]),
1005 .se (se));
1006 ccx_new_macro__type_a i4(
1007 .data_x_l (data_out_x_[49:40]),
1008 .scan_in (i4_scanin),
1009 .scan_out (i4_scanout),
1010 .l2clk (l2clk),
1011 .l1clk (l1clka),
1012 .pce0 (arb_q0_holdbar_a),
1013 .pce1 (arb_qsel1_a),
1014 .pce_ov (pce_ov),
1015 .stop (stop),
1016 .siclk_in (siclk_in),
1017 .soclk_in (soclk_in),
1018 .grant_a (arb_grant_a),
1019 .qsel0 (arb_qsel0_a),
1020 .shift (arb_shift_a),
1021 .data_a (src_data_a[49:40]),
1022 .se (se));
1023 ccx_new_macro__type_a i5(
1024 .data_x_l (data_out_x_[59:50]),
1025 .scan_in (i5_scanin),
1026 .scan_out (i5_scanout),
1027 .l2clk (l2clk),
1028 .l1clk (l1clka),
1029 .pce0 (arb_q0_holdbar_a),
1030 .pce1 (arb_qsel1_a),
1031 .pce_ov (pce_ov),
1032 .stop (stop),
1033 .siclk_in (siclk_in),
1034 .soclk_in (soclk_in),
1035 .grant_a (arb_grant_a),
1036 .qsel0 (arb_qsel0_a),
1037 .shift (arb_shift_a),
1038 .data_a (src_data_a[59:50]),
1039 .se (se));
1040 ccx_new_macro__type_a i6(
1041 .data_x_l (data_out_x_[69:60]),
1042 .scan_in (i6_scanin),
1043 .scan_out (i6_scanout),
1044 .l2clk (l2clk),
1045 .l1clk (l1clka),
1046 .pce0 (arb_q0_holdbar_a),
1047 .pce1 (arb_qsel1_a),
1048 .pce_ov (pce_ov),
1049 .stop (stop),
1050 .siclk_in (siclk_in),
1051 .soclk_in (soclk_in),
1052 .grant_a (arb_grant_a),
1053 .qsel0 (arb_qsel0_a),
1054 .shift (arb_shift_a),
1055 .data_a (src_data_a[69:60]),
1056 .se (se));
1057 ccx_new_macro__type_a i7(
1058 .data_x_l (data_out_x_[79:70]),
1059 .scan_in (i7_scanin),
1060 .scan_out (i7_scanout),
1061 .l2clk (l2clk),
1062 .l1clk (l1clkb),
1063 .pce0 (arb_q0_holdbar_a),
1064 .pce1 (arb_qsel1_a),
1065 .pce_ov (pce_ov),
1066 .stop (stop),
1067 .siclk_in (siclk_in),
1068 .soclk_in (soclk_in),
1069 .grant_a (arb_grant_a),
1070 .qsel0 (arb_qsel0_a),
1071 .shift (arb_shift_a),
1072 .data_a (src_data_a[79:70]),
1073 .se (se));
1074 ccx_new_macro__type_a i8(
1075 .data_x_l (data_out_x_[89:80]),
1076 .scan_in (i8_scanin),
1077 .scan_out (i8_scanout),
1078 .l2clk (l2clk),
1079 .l1clk (l1clkb),
1080 .pce0 (arb_q0_holdbar_a),
1081 .pce1 (arb_qsel1_a),
1082 .pce_ov (pce_ov),
1083 .stop (stop),
1084 .siclk_in (siclk_in),
1085 .soclk_in (soclk_in),
1086 .grant_a (arb_grant_a),
1087 .qsel0 (arb_qsel0_a),
1088 .shift (arb_shift_a),
1089 .data_a (src_data_a[89:80]),
1090 .se (se));
1091 ccx_new_macro__type_a i9(
1092 .data_x_l (data_out_x_[99:90]),
1093 .scan_in (i9_scanin),
1094 .scan_out (i9_scanout),
1095 .l2clk (l2clk),
1096 .l1clk (l1clkb),
1097 .pce0 (arb_q0_holdbar_a),
1098 .pce1 (arb_qsel1_a),
1099 .pce_ov (pce_ov),
1100 .stop (stop),
1101 .siclk_in (siclk_in),
1102 .soclk_in (soclk_in),
1103 .grant_a (arb_grant_a),
1104 .qsel0 (arb_qsel0_a),
1105 .shift (arb_shift_a),
1106 .data_a (src_data_a[99:90]),
1107 .se (se));
1108 ccx_new_macro__type_a i10(
1109 .data_x_l (data_out_x_[109:100]),
1110 .scan_in (i10_scanin),
1111 .scan_out (i10_scanout),
1112 .l2clk (l2clk),
1113 .l1clk (l1clkb),
1114 .pce0 (arb_q0_holdbar_a),
1115 .pce1 (arb_qsel1_a),
1116 .pce_ov (pce_ov),
1117 .stop (stop),
1118 .siclk_in (siclk_in),
1119 .soclk_in (soclk_in),
1120 .grant_a (arb_grant_a),
1121 .qsel0 (arb_qsel0_a),
1122 .shift (arb_shift_a),
1123 .data_a (src_data_a[109:100]),
1124 .se (se));
1125 ccx_new_macro__type_a i11(
1126 .data_x_l (data_out_x_[119:110]),
1127 .scan_in (i11_scanin),
1128 .scan_out (i11_scanout),
1129 .l2clk (l2clk),
1130 .l1clk (l1clkb),
1131 .pce0 (arb_q0_holdbar_a),
1132 .pce1 (arb_qsel1_a),
1133 .pce_ov (pce_ov),
1134 .stop (stop),
1135 .siclk_in (siclk_in),
1136 .soclk_in (soclk_in),
1137 .grant_a (arb_grant_a),
1138 .qsel0 (arb_qsel0_a),
1139 .shift (arb_shift_a),
1140 .data_a (src_data_a[119:110]),
1141 .se (se));
1142 ccx_new_macro__type_a i12(
1143 .data_x_l (data_out_x_[129:120]),
1144 .scan_in (i12_scanin),
1145 .scan_out (i12_scanout),
1146 .l2clk (l2clk),
1147 .l1clk (l1clkb),
1148 .pce0 (arb_q0_holdbar_a),
1149 .pce1 (arb_qsel1_a),
1150 .pce_ov (pce_ov),
1151 .stop (stop),
1152 .siclk_in (siclk_in),
1153 .soclk_in (soclk_in),
1154 .grant_a (arb_grant_a),
1155 .qsel0 (arb_qsel0_a),
1156 .shift (arb_shift_a),
1157 .data_a (src_data_a[129:120]),
1158 .se (se));
1159endmodule
1160
1161module ccx_l1clkhdr_ctl_macro__dl1hdr_24x(l2clk, l1en, pce_ov, stop, se, l1clk);
1162
1163 input l2clk;
1164 input l1en;
1165 input pce_ov;
1166 input stop;
1167 input se;
1168 output l1clk;
1169
1170 cl_sc1_l1hdr_24x c_0(
1171 .l2clk (l2clk),
1172 .pce (l1en),
1173 .l1clk (l1clk),
1174 .se (se),
1175 .pce_ov (pce_ov),
1176 .stop (stop));
1177endmodule
1178
1179
1180`endif // `ifdef FPGA
1181
1182
1183
Full OpenSPARC design & verification tarball including full HDL.