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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / pcx_mbr_dp.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pcx_mbr_dp.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module pcx_mbr_dp (
37 data_out_x_,
38 arb_grant_a,
39 arb_qsel0_a,
40 arb_qsel1_a,
41 arb_q0_holdbar_a,
42 arb_shift_a,
43 src_pcx_data_a,
44 data_prev_x_,
45 l2clk,
46 scan_in,
47 tcu_pce_ov,
48 ccx_aclk,
49 ccx_bclk,
50 tcu_scan_en,
51 scan_out,
52 ccx_aclk_out,
53 ccx_bclk_out,
54 tcu_pce_ov_out,
55 tcu_scan_en_out);
56wire pce_ov;
57wire stop;
58wire siclk_in;
59wire soclk_in;
60wire se;
61wire [129:0] src_data_a;
62wire l1clka;
63wire l1clkb;
64wire i0_scanin;
65wire i0_scanout;
66wire i1_scanin;
67wire i1_scanout;
68wire i2_scanin;
69wire i2_scanout;
70wire i3_scanin;
71wire i3_scanout;
72wire i4_scanin;
73wire i4_scanout;
74wire i5_scanin;
75wire i5_scanout;
76wire i6_scanin;
77wire i6_scanout;
78wire i7_scanin;
79wire i7_scanout;
80wire i8_scanin;
81wire i8_scanout;
82wire i9_scanin;
83wire i9_scanout;
84wire i10_scanin;
85wire i10_scanout;
86wire i11_scanin;
87wire i11_scanout;
88wire i12_scanin;
89wire i12_scanout;
90
91
92output [129:0] data_out_x_;
93
94input arb_grant_a;
95input arb_qsel0_a;
96input arb_qsel1_a;
97input arb_q0_holdbar_a;
98input arb_shift_a;
99
100
101input [129:0] src_pcx_data_a;
102input [129:0] data_prev_x_;
103
104// globals
105input l2clk;
106input scan_in;
107input tcu_pce_ov; // scan signals
108input ccx_aclk;
109input ccx_bclk;
110input tcu_scan_en;
111
112output scan_out;
113
114// buffer the high fanout nets
115output ccx_aclk_out;
116output ccx_bclk_out;
117output tcu_pce_ov_out;
118output tcu_scan_en_out;
119
120// scan renames
121assign pce_ov = tcu_pce_ov_out;
122assign stop = 1'b0;
123assign siclk_in = ccx_aclk_out;
124assign soclk_in = ccx_bclk_out;
125assign se = tcu_scan_en_out ;
126// end scan
127
128assign src_data_a[129:0] = src_pcx_data_a[129:0];
129
130//cl_dp1_l1hdr_24x gkt_hdr (
131//.l2clk(l2clk),
132//.pce(1'b1),
133//.aclk(siclk),
134//.bclk(soclk),
135//.siclk_out(siclk_out_unused),
136//.soclk_out(soclk_out_unused),
137//.l1clk(l1clk),
138//.pce_ov(pce_ov),
139//.stop(stop)
140//);
141
142
143//l1clkhdr_dp_macro gkt_hdra
144// (
145// .l2clk (l2clk),
146// .l1en (1'b1 ),
147// .siclk_out (sia_unused),
148// .soclk_out (soa_unused),
149// .l1clk (l1clka)
150// );
151
152//l1clkhdr_dp_macro gkt_hdrb
153// (
154// .l2clk (l2clk),
155// .l1en (1'b1 ),
156// .siclk_out (sib_unused),
157// .soclk_out (sob_unused),
158// .l1clk (l1clkb)
159// );
160
161pcx_mbr_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn (
162 .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}),
163 .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out})
164);
165
166pcx_mbr_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra
167 (
168 .l2clk (l2clk),
169 .l1en (1'b1 ),
170 .l1clk (l1clka),
171 .pce_ov(pce_ov),
172 .stop(stop),
173 .se(se)
174 );
175
176pcx_mbr_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb
177 (
178 .l2clk (l2clk),
179 .l1en (1'b1 ),
180 .l1clk (l1clkb),
181 .pce_ov(pce_ov),
182 .stop(stop),
183 .se(se)
184 );
185
186// ccx_new_macro_b AUTO_TEMPLATE
187// (
188//.l2clk (l2clk),
189//.l1clk (l1clk),
190//.pce0 (arb_q0_holdbar_a),
191//.pce1 (arb_qsel1_a),
192//.pce_ov (pce_ov),
193//.stop (stop),
194//.siclk_in (siclk_in),
195//.soclk_in (soclk_in),
196//.grant_a (arb_grant_a),
197//.qsel0 (arb_qsel0_a),
198//.shift (arb_shift_a),
199//.data_a (src_data_a[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
200//.data_prev_x_l (data_prev_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
201//.data_x_l (data_out_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
202//);
203
204pcx_mbr_dp_ccx_new_macro__type_b_r i0 (
205 // Outputs
206 .data_x_l (data_out_x_[9:0]), // Templated
207 // Inputs
208 .scan_in(i0_scanin),
209 .scan_out(i0_scanout),
210 .l2clk (l2clk), // Templated
211 .l1clk (l1clka), // Templated
212 .pce0 (arb_q0_holdbar_a), // Templated
213 .pce1 (arb_qsel1_a), // Templated
214 .pce_ov (pce_ov), // Templated
215 .stop (stop), // Templated
216 .siclk_in (siclk_in), // Templated
217 .soclk_in (soclk_in), // Templated
218 .grant_a (arb_grant_a), // Templated
219 .qsel0 (arb_qsel0_a), // Templated
220 .shift (arb_shift_a), // Templated
221 .data_a (src_data_a[9:0]), // Templated
222 .data_prev_x_l (data_prev_x_[9:0]),
223 .se(se)); // Templated
224
225pcx_mbr_dp_ccx_new_macro__type_b_r i1 (
226 // Outputs
227 .data_x_l (data_out_x_[19:10]), // Templated
228 // Inputs
229 .scan_in(i1_scanin),
230 .scan_out(i1_scanout),
231 .l2clk (l2clk), // Templated
232 .l1clk (l1clka), // Templated
233 .pce0 (arb_q0_holdbar_a), // Templated
234 .pce1 (arb_qsel1_a), // Templated
235 .pce_ov (pce_ov), // Templated
236 .stop (stop), // Templated
237 .siclk_in (siclk_in), // Templated
238 .soclk_in (soclk_in), // Templated
239 .grant_a (arb_grant_a), // Templated
240 .qsel0 (arb_qsel0_a), // Templated
241 .shift (arb_shift_a), // Templated
242 .data_a (src_data_a[19:10]), // Templated
243 .data_prev_x_l (data_prev_x_[19:10]),
244 .se(se)); // Templated
245
246pcx_mbr_dp_ccx_new_macro__type_b_r i2 (
247 // Outputs
248 .data_x_l (data_out_x_[29:20]), // Templated
249 // Inputs
250 .scan_in(i2_scanin),
251 .scan_out(i2_scanout),
252 .l2clk (l2clk), // Templated
253 .l1clk (l1clka), // Templated
254 .pce0 (arb_q0_holdbar_a), // Templated
255 .pce1 (arb_qsel1_a), // Templated
256 .pce_ov (pce_ov), // Templated
257 .stop (stop), // Templated
258 .siclk_in (siclk_in), // Templated
259 .soclk_in (soclk_in), // Templated
260 .grant_a (arb_grant_a), // Templated
261 .qsel0 (arb_qsel0_a), // Templated
262 .shift (arb_shift_a), // Templated
263 .data_a (src_data_a[29:20]), // Templated
264 .data_prev_x_l (data_prev_x_[29:20]),
265 .se(se)); // Templated
266pcx_mbr_dp_ccx_new_macro__type_b_r i3 (
267 // Outputs
268 .data_x_l (data_out_x_[39:30]), // Templated
269 // Inputs
270 .scan_in(i3_scanin),
271 .scan_out(i3_scanout),
272 .l2clk (l2clk), // Templated
273 .l1clk (l1clka), // Templated
274 .pce0 (arb_q0_holdbar_a), // Templated
275 .pce1 (arb_qsel1_a), // Templated
276 .pce_ov (pce_ov), // Templated
277 .stop (stop), // Templated
278 .siclk_in (siclk_in), // Templated
279 .soclk_in (soclk_in), // Templated
280 .grant_a (arb_grant_a), // Templated
281 .qsel0 (arb_qsel0_a), // Templated
282 .shift (arb_shift_a), // Templated
283 .data_a (src_data_a[39:30]), // Templated
284 .data_prev_x_l (data_prev_x_[39:30]),
285 .se(se)); // Templated
286pcx_mbr_dp_ccx_new_macro__type_b_r i4 (
287 // Outputs
288 .data_x_l (data_out_x_[49:40]), // Templated
289 // Inputs
290 .scan_in(i4_scanin),
291 .scan_out(i4_scanout),
292 .l2clk (l2clk), // Templated
293 .l1clk (l1clka), // Templated
294 .pce0 (arb_q0_holdbar_a), // Templated
295 .pce1 (arb_qsel1_a), // Templated
296 .pce_ov (pce_ov), // Templated
297 .stop (stop), // Templated
298 .siclk_in (siclk_in), // Templated
299 .soclk_in (soclk_in), // Templated
300 .grant_a (arb_grant_a), // Templated
301 .qsel0 (arb_qsel0_a), // Templated
302 .shift (arb_shift_a), // Templated
303 .data_a (src_data_a[49:40]), // Templated
304 .data_prev_x_l (data_prev_x_[49:40]),
305 .se(se)); // Templated
306pcx_mbr_dp_ccx_new_macro__type_b_r i5 (
307 // Outputs
308 .data_x_l (data_out_x_[59:50]), // Templated
309 // Inputs
310 .scan_in(i5_scanin),
311 .scan_out(i5_scanout),
312 .l2clk (l2clk), // Templated
313 .l1clk (l1clka), // Templated
314 .pce0 (arb_q0_holdbar_a), // Templated
315 .pce1 (arb_qsel1_a), // Templated
316 .pce_ov (pce_ov), // Templated
317 .stop (stop), // Templated
318 .siclk_in (siclk_in), // Templated
319 .soclk_in (soclk_in), // Templated
320 .grant_a (arb_grant_a), // Templated
321 .qsel0 (arb_qsel0_a), // Templated
322 .shift (arb_shift_a), // Templated
323 .data_a (src_data_a[59:50]), // Templated
324 .data_prev_x_l (data_prev_x_[59:50]),
325 .se(se)); // Templated
326pcx_mbr_dp_ccx_new_macro__type_b_r i6 (
327 // Outputs
328 .data_x_l (data_out_x_[69:60]), // Templated
329 // Inputs
330 .scan_in(i6_scanin),
331 .scan_out(i6_scanout),
332 .l2clk (l2clk), // Templated
333 .l1clk (l1clka), // Templated
334 .pce0 (arb_q0_holdbar_a), // Templated
335 .pce1 (arb_qsel1_a), // Templated
336 .pce_ov (pce_ov), // Templated
337 .stop (stop), // Templated
338 .siclk_in (siclk_in), // Templated
339 .soclk_in (soclk_in), // Templated
340 .grant_a (arb_grant_a), // Templated
341 .qsel0 (arb_qsel0_a), // Templated
342 .shift (arb_shift_a), // Templated
343 .data_a (src_data_a[69:60]), // Templated
344 .data_prev_x_l (data_prev_x_[69:60]),
345 .se(se)); // Templated
346pcx_mbr_dp_ccx_new_macro__type_b_r i7 (
347 // Outputs
348 .data_x_l (data_out_x_[79:70]), // Templated
349 // Inputs
350 .scan_in(i7_scanin),
351 .scan_out(i7_scanout),
352 .l2clk (l2clk), // Templated
353 .l1clk (l1clkb), // Templated
354 .pce0 (arb_q0_holdbar_a), // Templated
355 .pce1 (arb_qsel1_a), // Templated
356 .pce_ov (pce_ov), // Templated
357 .stop (stop), // Templated
358 .siclk_in (siclk_in), // Templated
359 .soclk_in (soclk_in), // Templated
360 .grant_a (arb_grant_a), // Templated
361 .qsel0 (arb_qsel0_a), // Templated
362 .shift (arb_shift_a), // Templated
363 .data_a (src_data_a[79:70]), // Templated
364 .data_prev_x_l (data_prev_x_[79:70]),
365 .se(se)); // Templated
366pcx_mbr_dp_ccx_new_macro__type_b_r i8 (
367 // Outputs
368 .data_x_l (data_out_x_[89:80]), // Templated
369 // Inputs
370 .scan_in(i8_scanin),
371 .scan_out(i8_scanout),
372 .l2clk (l2clk), // Templated
373 .l1clk (l1clkb), // Templated
374 .pce0 (arb_q0_holdbar_a), // Templated
375 .pce1 (arb_qsel1_a), // Templated
376 .pce_ov (pce_ov), // Templated
377 .stop (stop), // Templated
378 .siclk_in (siclk_in), // Templated
379 .soclk_in (soclk_in), // Templated
380 .grant_a (arb_grant_a), // Templated
381 .qsel0 (arb_qsel0_a), // Templated
382 .shift (arb_shift_a), // Templated
383 .data_a (src_data_a[89:80]), // Templated
384 .data_prev_x_l (data_prev_x_[89:80]),
385 .se(se)); // Templated
386pcx_mbr_dp_ccx_new_macro__type_b_r i9 (
387 // Outputs
388 .data_x_l (data_out_x_[99:90]), // Templated
389 // Inputs
390 .scan_in(i9_scanin),
391 .scan_out(i9_scanout),
392 .l2clk (l2clk), // Templated
393 .l1clk (l1clkb), // Templated
394 .pce0 (arb_q0_holdbar_a), // Templated
395 .pce1 (arb_qsel1_a), // Templated
396 .pce_ov (pce_ov), // Templated
397 .stop (stop), // Templated
398 .siclk_in (siclk_in), // Templated
399 .soclk_in (soclk_in), // Templated
400 .grant_a (arb_grant_a), // Templated
401 .qsel0 (arb_qsel0_a), // Templated
402 .shift (arb_shift_a), // Templated
403 .data_a (src_data_a[99:90]), // Templated
404 .data_prev_x_l (data_prev_x_[99:90]),
405 .se(se)); // Templated
406pcx_mbr_dp_ccx_new_macro__type_b_r i10 (
407 // Outputs
408 .data_x_l (data_out_x_[109:100]), // Templated
409 // Inputs
410 .scan_in(i10_scanin),
411 .scan_out(i10_scanout),
412 .l2clk (l2clk), // Templated
413 .l1clk (l1clkb), // Templated
414 .pce0 (arb_q0_holdbar_a), // Templated
415 .pce1 (arb_qsel1_a), // Templated
416 .pce_ov (pce_ov), // Templated
417 .stop (stop), // Templated
418 .siclk_in (siclk_in), // Templated
419 .soclk_in (soclk_in), // Templated
420 .grant_a (arb_grant_a), // Templated
421 .qsel0 (arb_qsel0_a), // Templated
422 .shift (arb_shift_a), // Templated
423 .data_a (src_data_a[109:100]), // Templated
424 .data_prev_x_l (data_prev_x_[109:100]),
425 .se(se)); // Templated
426pcx_mbr_dp_ccx_new_macro__type_b_r i11 (
427 // Outputs
428 .data_x_l (data_out_x_[119:110]), // Templated
429 // Inputs
430 .scan_in(i11_scanin),
431 .scan_out(i11_scanout),
432 .l2clk (l2clk), // Templated
433 .l1clk (l1clkb), // Templated
434 .pce0 (arb_q0_holdbar_a), // Templated
435 .pce1 (arb_qsel1_a), // Templated
436 .pce_ov (pce_ov), // Templated
437 .stop (stop), // Templated
438 .siclk_in (siclk_in), // Templated
439 .soclk_in (soclk_in), // Templated
440 .grant_a (arb_grant_a), // Templated
441 .qsel0 (arb_qsel0_a), // Templated
442 .shift (arb_shift_a), // Templated
443 .data_a (src_data_a[119:110]), // Templated
444 .data_prev_x_l (data_prev_x_[119:110]),
445 .se(se)); // Templated
446pcx_mbr_dp_ccx_new_macro__type_b_r i12 (
447 // Outputs
448 .data_x_l (data_out_x_[129:120]), // Templated
449 // Inputs
450 .scan_in(i12_scanin),
451 .scan_out(i12_scanout),
452 .l2clk (l2clk), // Templated
453 .l1clk (l1clkb), // Templated
454 .pce0 (arb_q0_holdbar_a), // Templated
455 .pce1 (arb_qsel1_a), // Templated
456 .pce_ov (pce_ov), // Templated
457 .stop (stop), // Templated
458 .siclk_in (siclk_in), // Templated
459 .soclk_in (soclk_in), // Templated
460 .grant_a (arb_grant_a), // Templated
461 .qsel0 (arb_qsel0_a), // Templated
462 .shift (arb_shift_a), // Templated
463 .data_a (src_data_a[129:120]), // Templated
464 .data_prev_x_l (data_prev_x_[129:120]),
465 .se(se)); // Templated
466// fixscan start:
467assign i12_scanin = scan_in ;
468assign i11_scanin = i12_scanout ;
469assign i10_scanin = i11_scanout ;
470assign i9_scanin = i10_scanout ;
471assign i8_scanin = i9_scanout ;
472assign i7_scanin = i8_scanout ;
473assign i6_scanin = i7_scanout ;
474assign i5_scanin = i6_scanout ;
475assign i4_scanin = i5_scanout ;
476assign i3_scanin = i4_scanout ;
477assign i2_scanin = i3_scanout ;
478assign i1_scanin = i2_scanout ;
479assign i0_scanin = i1_scanout ;
480assign scan_out = i0_scanout ;
481// fixscan end:
482endmodule
483
484//
485//// scan renames
486//assign pce_ov = tcu_pce_ov;
487//assign stop = tcu_clk_stop;
488//assign siclk = tcu_aclk;
489//assign soclk = tcu_bclk;
490//// end scan
491//
492//buff_macro i_buf_grant (width=1, stack=30c)
493//(
494// .din (arb_grant_a),
495// .dout (grant_a),
496// );
497//
498//msff_macro i_dff_grant_x (width=12, stack=30c)
499//(
500// .scan_in(i_dff_grant_x_scanin),
501// .scan_out(i_dff_grant_x_scanout),
502// .clk (l2clk),
503// .din ({12{grant_a}}),
504// .dout (grant_x[11:0]),
505// .en (1'b1),
506// );
507//
508//
509//// DATAPATH SECTION
510//
511//msff_macro i_dff_q1_2 (width=40, stack=50c)
512//(
513// .scan_in(i_dff_q1_2_scanin),
514// .scan_out(i_dff_q1_2_scanout),
515// .clk (l2clk),
516// .din (src_pcx_data_a[129:90]),
517// .dout (q1_dataout[129:90]),
518// .en (arb_qsel1_a),
519// );
520//
521//msff_macro i_dff_q1_1 (width=50, stack=50c)
522//(
523// .scan_in(i_dff_q1_1_scanin),
524// .scan_out(i_dff_q1_1_scanout),
525// .clk (l2clk),
526// .din (src_pcx_data_a[89:40]),
527// .dout (q1_dataout[89:40]),
528// .en (arb_qsel1_a),
529// );
530//
531//msff_macro i_dff_q1_0 (width=40, stack=50c)
532//(
533// .scan_in(i_dff_q1_0_scanin),
534// .scan_out(i_dff_q1_0_scanout),
535// .clk (l2clk),
536// .din (src_pcx_data_a[39:0]),
537// .dout (q1_dataout[39:0]),
538// .en (arb_qsel1_a),
539// );
540//
541////assign q0_datain_ca[149:0] =
542//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) |
543//// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
544//
545//
546//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
547//(
548// .din0 (src_pcx_data_a[129:90]),
549// .din1 (q1_dataout[129:90]),
550// .sel0 (arb_qsel0_a),
551// .sel1 (arb_shift_a),
552// .dout (q0_datain_a[129:90]),
553// );
554//
555//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
556//(
557// .din0 (src_pcx_data_a[89:40]),
558// .din1 (q1_dataout[89:40]),
559// .sel0 (arb_qsel0_a),
560// .sel1 (arb_shift_a),
561// .dout (q0_datain_a[89:40]),
562// );
563//
564//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
565//(
566// .din0 (src_pcx_data_a[39:0]),
567// .din1 (q1_dataout[39:0]),
568// .sel0 (arb_qsel0_a),
569// .sel1 (arb_shift_a),
570// .dout (q0_datain_a[39:0]),
571// );
572//
573//msff_macro i_dff_q0_2 (width=40, stack=50c)
574//(
575// .scan_in(i_dff_q0_2_scanin),
576// .scan_out(i_dff_q0_2_scanout),
577// .clk (l2clk),
578// .din (q0_datain_a[129:90]),
579// .dout (q0_dataout[129:90]),
580// .en (arb_q0_holdbar_a),
581// );
582//
583//msff_macro i_dff_q0_1 (width=50, stack=50c)
584//(
585// .scan_in(i_dff_q0_1_scanin),
586// .scan_out(i_dff_q0_1_scanout),
587// .clk (l2clk),
588// .din (q0_datain_a[89:40]),
589// .dout (q0_dataout[89:40]),
590// .en (arb_q0_holdbar_a),
591// );
592//
593//msff_macro i_dff_q0_0 (width=40, stack=50c)
594//(
595// .scan_in(i_dff_q0_0_scanin),
596// .scan_out(i_dff_q0_0_scanout),
597// .clk (l2clk),
598// .din (q0_datain_a[39:0]),
599// .dout (q0_dataout[39:0]),
600// .en (arb_q0_holdbar_a),
601// );
602//
603////MUX
604//
605//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
606//(
607// .din0 (q0_dataout[129:90]),
608// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
609// .dout (data_x_[129:90]),
610// );
611//
612//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
613//(
614// .din0 (q0_dataout[89:40]),
615// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
616// .dout (data_x_[89:40]),
617// );
618//
619//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
620//(
621// .din0 (q0_dataout[39:0]),
622// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
623// .dout (data_x_[39:0]),
624// );
625//
626//
627//nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c)
628//(
629// .din0 (data_x_[129:90]),
630// .din1 (data_prev_x_[129:90]),
631// .dout (data_out_x[129:90])
632// );
633//
634//nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c)
635//(
636// .din0 (data_x_[89:40]),
637// .din1 (data_prev_x_[89:40]),
638// .dout (data_out_x[89:40])
639// );
640//
641//nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c)
642//(
643// .din0 (data_x_[39:0]),
644// .din1 (data_prev_x_[39:0]),
645// .dout (data_out_x[39:0])
646// );
647//
648//inv_macro i_inv_data_out_2 (width=40, stack=50c)
649//(
650// .din (data_out_x[129:90]),
651// .dout (data_out_x_[129:90])
652// );
653//
654//inv_macro i_inv_data_out_1 (width=50, stack=50c)
655//(
656// .din (data_out_x[89:40]),
657// .dout (data_out_x_[89:40])
658// );
659//
660//inv_macro i_inv_data_out_0 (width=40, stack=50c)
661//(
662// .din (data_out_x[39:0]),
663// .dout (data_out_x_[39:0])
664// );
665//
666//// fixscan start:
667//assign i_dff_grant_x_scanin = scan_in ;
668//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
669//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
670//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
671//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
672//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
673//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
674//assign scan_out = i_dff_q0_0_scanout ;
675//// fixscan end:
676//endmodule
677//
678// Local Variables:
679// verilog-library-directories:("." "v")
680// verilog-library-files:("./v/ccx_new_macro.v")
681// End:
682//
683
684
685//
686// buff macro
687//
688//
689
690
691
692
693
694module pcx_mbr_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
695 din,
696 dout);
697 input [3:0] din;
698 output [3:0] dout;
699
700
701
702
703
704
705buff #(4) d0_0 (
706.in(din[3:0]),
707.out(dout[3:0])
708);
709
710
711
712
713
714
715
716
717endmodule
718
719
720
721
722
723
724
725
726
727// any PARAMS parms go into naming of macro
728
729module pcx_mbr_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
730 l2clk,
731 l1en,
732 pce_ov,
733 stop,
734 se,
735 l1clk);
736
737
738 input l2clk;
739 input l1en;
740 input pce_ov;
741 input stop;
742 input se;
743 output l1clk;
744
745
746
747
748
749cl_sc1_l1hdr_24x c_0 (
750
751
752 .l2clk(l2clk),
753 .pce(l1en),
754 .l1clk(l1clk),
755 .se(se),
756 .pce_ov(pce_ov),
757 .stop(stop)
758);
759
760
761
762
763
764
765endmodule
766
767
768
769
770
771
772
773
774
775//
776// ccx macro
777//
778//
779
780
781
782
783
784module pcx_mbr_dp_ccx_new_macro__type_b_r (
785 l2clk,
786 l1clk,
787 pce0,
788 pce1,
789 pce_ov,
790 se,
791 stop,
792 siclk_in,
793 soclk_in,
794 scan_in,
795 grant_a,
796 qsel0,
797 shift,
798 data_a,
799 data_prev_x_l,
800 data_x_l,
801 scan_out);
802wire so5;
803wire siclk_out;
804wire soclk_out;
805wire l1clk0;
806wire l1clk1;
807wire grant_x;
808wire qsel0_buf;
809wire shift_buf;
810
811input l2clk;
812input l1clk;
813input pce0;
814input pce1;
815input pce_ov;
816input se;
817input stop;
818input siclk_in;
819input soclk_in;
820input scan_in;
821input grant_a;
822input qsel0;
823input shift;
824input [9:0] data_a;
825input [9:0] data_prev_x_l;
826output [9:0] data_x_l;
827output scan_out;
828cl_dp1_ccxhdr c0 (
829.si(scan_in),
830.so(so5),
831 .l2clk(l2clk),
832 .pce0(pce0),
833 .pce1(pce1),
834 .pce_ov(pce_ov),
835 .stop(stop),
836 .siclk_in(siclk_in),
837 .soclk_in(soclk_in),
838 .siclk_out(siclk_out),
839 .soclk_out(soclk_out),
840 .l1clk0(l1clk0),
841 .l1clk1(l1clk1),
842 .se(se),
843 .l1clk(l1clk),
844 .grant_a(grant_a),
845 .grant_x(grant_x),
846 .qsel0(qsel0),
847 .qsel0_buf(qsel0_buf),
848 .shift(shift),
849 .shift_buf(shift_buf)
850);
851
852
853
854
855
856
857ccx_mac_b #(10) mac_b(
858.siclk(siclk_out),
859.soclk(soclk_out),
860.data_a(data_a[9:0]),
861.data_prev_x_l(data_prev_x_l[9:0]),
862.data_x_l(data_x_l[9:0]),
863.si(so5),
864.so(scan_out),
865 .l1clk0(l1clk0),
866 .l1clk1(l1clk1),
867 .grant_x(grant_x),
868 .qsel0_buf(qsel0_buf),
869 .shift_buf(shift_buf)
870);
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885endmodule
886
887`endif // `ifndef FPGA
888
889`ifdef FPGA
890
891`timescale 1 ns / 100 ps
892module pcx_mbr_dp(data_out_x_, arb_grant_a, arb_qsel0_a, arb_qsel1_a,
893 arb_q0_holdbar_a, arb_shift_a, src_pcx_data_a, data_prev_x_, l2clk,
894 scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk, tcu_scan_en, scan_out,
895 ccx_aclk_out, ccx_bclk_out, tcu_pce_ov_out, tcu_scan_en_out);
896
897 output [129:0] data_out_x_;
898 input arb_grant_a;
899 input arb_qsel0_a;
900 input arb_qsel1_a;
901 input arb_q0_holdbar_a;
902 input arb_shift_a;
903 input [129:0] src_pcx_data_a;
904 input [129:0] data_prev_x_;
905 input l2clk;
906 input scan_in;
907 input tcu_pce_ov;
908 input ccx_aclk;
909 input ccx_bclk;
910 input tcu_scan_en;
911 output scan_out;
912 output ccx_aclk_out;
913 output ccx_bclk_out;
914 output tcu_pce_ov_out;
915 output tcu_scan_en_out;
916
917 wire pce_ov;
918 wire stop;
919 wire siclk_in;
920 wire soclk_in;
921 wire se;
922 wire [129:0] src_data_a;
923 wire l1clka;
924 wire l1clkb;
925 wire i0_scanin;
926 wire i0_scanout;
927 wire i1_scanin;
928 wire i1_scanout;
929 wire i2_scanin;
930 wire i2_scanout;
931 wire i3_scanin;
932 wire i3_scanout;
933 wire i4_scanin;
934 wire i4_scanout;
935 wire i5_scanin;
936 wire i5_scanout;
937 wire i6_scanin;
938 wire i6_scanout;
939 wire i7_scanin;
940 wire i7_scanout;
941 wire i8_scanin;
942 wire i8_scanout;
943 wire i9_scanin;
944 wire i9_scanout;
945 wire i10_scanin;
946 wire i10_scanout;
947 wire i11_scanin;
948 wire i11_scanout;
949 wire i12_scanin;
950 wire i12_scanout;
951
952 assign pce_ov = tcu_pce_ov_out;
953 assign stop = 1'b0;
954 assign siclk_in = ccx_aclk_out;
955 assign soclk_in = ccx_bclk_out;
956 assign se = tcu_scan_en_out;
957 assign src_data_a[129:0] = src_pcx_data_a[129:0];
958 assign i12_scanin = scan_in;
959 assign i11_scanin = i12_scanout;
960 assign i10_scanin = i11_scanout;
961 assign i9_scanin = i10_scanout;
962 assign i8_scanin = i9_scanout;
963 assign i7_scanin = i8_scanout;
964 assign i6_scanin = i7_scanout;
965 assign i5_scanin = i6_scanout;
966 assign i4_scanin = i5_scanout;
967 assign i3_scanin = i4_scanout;
968 assign i2_scanin = i3_scanout;
969 assign i1_scanin = i2_scanout;
970 assign i0_scanin = i1_scanout;
971 assign scan_out = i0_scanout;
972
973 buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn(
974 .din ({ccx_aclk, ccx_bclk,
975 tcu_pce_ov, tcu_scan_en}),
976 .dout ({ccx_aclk_out, ccx_bclk_out,
977 tcu_pce_ov_out, tcu_scan_en_out}));
978 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra(
979 .l2clk (l2clk),
980 .l1en (1'b1),
981 .l1clk (l1clka),
982 .pce_ov (pce_ov),
983 .stop (stop),
984 .se (se));
985 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb(
986 .l2clk (l2clk),
987 .l1en (1'b1),
988 .l1clk (l1clkb),
989 .pce_ov (pce_ov),
990 .stop (stop),
991 .se (se));
992 ccx_new_macro__type_b_r i0(
993 .data_x_l (data_out_x_[9:0]),
994 .scan_in (i0_scanin),
995 .scan_out (i0_scanout),
996 .l2clk (l2clk),
997 .l1clk (l1clka),
998 .pce0 (arb_q0_holdbar_a),
999 .pce1 (arb_qsel1_a),
1000 .pce_ov (pce_ov),
1001 .stop (stop),
1002 .siclk_in (siclk_in),
1003 .soclk_in (soclk_in),
1004 .grant_a (arb_grant_a),
1005 .qsel0 (arb_qsel0_a),
1006 .shift (arb_shift_a),
1007 .data_a (src_data_a[9:0]),
1008 .data_prev_x_l (data_prev_x_[9:0]),
1009 .se (se));
1010 ccx_new_macro__type_b_r i1(
1011 .data_x_l (data_out_x_[19:10]),
1012 .scan_in (i1_scanin),
1013 .scan_out (i1_scanout),
1014 .l2clk (l2clk),
1015 .l1clk (l1clka),
1016 .pce0 (arb_q0_holdbar_a),
1017 .pce1 (arb_qsel1_a),
1018 .pce_ov (pce_ov),
1019 .stop (stop),
1020 .siclk_in (siclk_in),
1021 .soclk_in (soclk_in),
1022 .grant_a (arb_grant_a),
1023 .qsel0 (arb_qsel0_a),
1024 .shift (arb_shift_a),
1025 .data_a (src_data_a[19:10]),
1026 .data_prev_x_l (data_prev_x_[19:10]),
1027 .se (se));
1028 ccx_new_macro__type_b_r i2(
1029 .data_x_l (data_out_x_[29:20]),
1030 .scan_in (i2_scanin),
1031 .scan_out (i2_scanout),
1032 .l2clk (l2clk),
1033 .l1clk (l1clka),
1034 .pce0 (arb_q0_holdbar_a),
1035 .pce1 (arb_qsel1_a),
1036 .pce_ov (pce_ov),
1037 .stop (stop),
1038 .siclk_in (siclk_in),
1039 .soclk_in (soclk_in),
1040 .grant_a (arb_grant_a),
1041 .qsel0 (arb_qsel0_a),
1042 .shift (arb_shift_a),
1043 .data_a (src_data_a[29:20]),
1044 .data_prev_x_l (data_prev_x_[29:20]),
1045 .se (se));
1046 ccx_new_macro__type_b_r i3(
1047 .data_x_l (data_out_x_[39:30]),
1048 .scan_in (i3_scanin),
1049 .scan_out (i3_scanout),
1050 .l2clk (l2clk),
1051 .l1clk (l1clka),
1052 .pce0 (arb_q0_holdbar_a),
1053 .pce1 (arb_qsel1_a),
1054 .pce_ov (pce_ov),
1055 .stop (stop),
1056 .siclk_in (siclk_in),
1057 .soclk_in (soclk_in),
1058 .grant_a (arb_grant_a),
1059 .qsel0 (arb_qsel0_a),
1060 .shift (arb_shift_a),
1061 .data_a (src_data_a[39:30]),
1062 .data_prev_x_l (data_prev_x_[39:30]),
1063 .se (se));
1064 ccx_new_macro__type_b_r i4(
1065 .data_x_l (data_out_x_[49:40]),
1066 .scan_in (i4_scanin),
1067 .scan_out (i4_scanout),
1068 .l2clk (l2clk),
1069 .l1clk (l1clka),
1070 .pce0 (arb_q0_holdbar_a),
1071 .pce1 (arb_qsel1_a),
1072 .pce_ov (pce_ov),
1073 .stop (stop),
1074 .siclk_in (siclk_in),
1075 .soclk_in (soclk_in),
1076 .grant_a (arb_grant_a),
1077 .qsel0 (arb_qsel0_a),
1078 .shift (arb_shift_a),
1079 .data_a (src_data_a[49:40]),
1080 .data_prev_x_l (data_prev_x_[49:40]),
1081 .se (se));
1082 ccx_new_macro__type_b_r i5(
1083 .data_x_l (data_out_x_[59:50]),
1084 .scan_in (i5_scanin),
1085 .scan_out (i5_scanout),
1086 .l2clk (l2clk),
1087 .l1clk (l1clka),
1088 .pce0 (arb_q0_holdbar_a),
1089 .pce1 (arb_qsel1_a),
1090 .pce_ov (pce_ov),
1091 .stop (stop),
1092 .siclk_in (siclk_in),
1093 .soclk_in (soclk_in),
1094 .grant_a (arb_grant_a),
1095 .qsel0 (arb_qsel0_a),
1096 .shift (arb_shift_a),
1097 .data_a (src_data_a[59:50]),
1098 .data_prev_x_l (data_prev_x_[59:50]),
1099 .se (se));
1100 ccx_new_macro__type_b_r i6(
1101 .data_x_l (data_out_x_[69:60]),
1102 .scan_in (i6_scanin),
1103 .scan_out (i6_scanout),
1104 .l2clk (l2clk),
1105 .l1clk (l1clka),
1106 .pce0 (arb_q0_holdbar_a),
1107 .pce1 (arb_qsel1_a),
1108 .pce_ov (pce_ov),
1109 .stop (stop),
1110 .siclk_in (siclk_in),
1111 .soclk_in (soclk_in),
1112 .grant_a (arb_grant_a),
1113 .qsel0 (arb_qsel0_a),
1114 .shift (arb_shift_a),
1115 .data_a (src_data_a[69:60]),
1116 .data_prev_x_l (data_prev_x_[69:60]),
1117 .se (se));
1118 ccx_new_macro__type_b_r i7(
1119 .data_x_l (data_out_x_[79:70]),
1120 .scan_in (i7_scanin),
1121 .scan_out (i7_scanout),
1122 .l2clk (l2clk),
1123 .l1clk (l1clkb),
1124 .pce0 (arb_q0_holdbar_a),
1125 .pce1 (arb_qsel1_a),
1126 .pce_ov (pce_ov),
1127 .stop (stop),
1128 .siclk_in (siclk_in),
1129 .soclk_in (soclk_in),
1130 .grant_a (arb_grant_a),
1131 .qsel0 (arb_qsel0_a),
1132 .shift (arb_shift_a),
1133 .data_a (src_data_a[79:70]),
1134 .data_prev_x_l (data_prev_x_[79:70]),
1135 .se (se));
1136 ccx_new_macro__type_b_r i8(
1137 .data_x_l (data_out_x_[89:80]),
1138 .scan_in (i8_scanin),
1139 .scan_out (i8_scanout),
1140 .l2clk (l2clk),
1141 .l1clk (l1clkb),
1142 .pce0 (arb_q0_holdbar_a),
1143 .pce1 (arb_qsel1_a),
1144 .pce_ov (pce_ov),
1145 .stop (stop),
1146 .siclk_in (siclk_in),
1147 .soclk_in (soclk_in),
1148 .grant_a (arb_grant_a),
1149 .qsel0 (arb_qsel0_a),
1150 .shift (arb_shift_a),
1151 .data_a (src_data_a[89:80]),
1152 .data_prev_x_l (data_prev_x_[89:80]),
1153 .se (se));
1154 ccx_new_macro__type_b_r i9(
1155 .data_x_l (data_out_x_[99:90]),
1156 .scan_in (i9_scanin),
1157 .scan_out (i9_scanout),
1158 .l2clk (l2clk),
1159 .l1clk (l1clkb),
1160 .pce0 (arb_q0_holdbar_a),
1161 .pce1 (arb_qsel1_a),
1162 .pce_ov (pce_ov),
1163 .stop (stop),
1164 .siclk_in (siclk_in),
1165 .soclk_in (soclk_in),
1166 .grant_a (arb_grant_a),
1167 .qsel0 (arb_qsel0_a),
1168 .shift (arb_shift_a),
1169 .data_a (src_data_a[99:90]),
1170 .data_prev_x_l (data_prev_x_[99:90]),
1171 .se (se));
1172 ccx_new_macro__type_b_r i10(
1173 .data_x_l (data_out_x_[109:100]),
1174 .scan_in (i10_scanin),
1175 .scan_out (i10_scanout),
1176 .l2clk (l2clk),
1177 .l1clk (l1clkb),
1178 .pce0 (arb_q0_holdbar_a),
1179 .pce1 (arb_qsel1_a),
1180 .pce_ov (pce_ov),
1181 .stop (stop),
1182 .siclk_in (siclk_in),
1183 .soclk_in (soclk_in),
1184 .grant_a (arb_grant_a),
1185 .qsel0 (arb_qsel0_a),
1186 .shift (arb_shift_a),
1187 .data_a (src_data_a[109:100]),
1188 .data_prev_x_l (data_prev_x_[109:100]),
1189 .se (se));
1190 ccx_new_macro__type_b_r i11(
1191 .data_x_l (data_out_x_[119:110]),
1192 .scan_in (i11_scanin),
1193 .scan_out (i11_scanout),
1194 .l2clk (l2clk),
1195 .l1clk (l1clkb),
1196 .pce0 (arb_q0_holdbar_a),
1197 .pce1 (arb_qsel1_a),
1198 .pce_ov (pce_ov),
1199 .stop (stop),
1200 .siclk_in (siclk_in),
1201 .soclk_in (soclk_in),
1202 .grant_a (arb_grant_a),
1203 .qsel0 (arb_qsel0_a),
1204 .shift (arb_shift_a),
1205 .data_a (src_data_a[119:110]),
1206 .data_prev_x_l (data_prev_x_[119:110]),
1207 .se (se));
1208 ccx_new_macro__type_b_r i12(
1209 .data_x_l (data_out_x_[129:120]),
1210 .scan_in (i12_scanin),
1211 .scan_out (i12_scanout),
1212 .l2clk (l2clk),
1213 .l1clk (l1clkb),
1214 .pce0 (arb_q0_holdbar_a),
1215 .pce1 (arb_qsel1_a),
1216 .pce_ov (pce_ov),
1217 .stop (stop),
1218 .siclk_in (siclk_in),
1219 .soclk_in (soclk_in),
1220 .grant_a (arb_grant_a),
1221 .qsel0 (arb_qsel0_a),
1222 .shift (arb_shift_a),
1223 .data_a (src_data_a[129:120]),
1224 .data_prev_x_l (data_prev_x_[129:120]),
1225 .se (se));
1226endmodule
1227
1228module ccx_new_macro__type_b_r(l2clk, l1clk, pce0, pce1, pce_ov, se, stop,
1229 siclk_in, soclk_in, scan_in, grant_a, qsel0, shift, data_a,
1230 data_prev_x_l, data_x_l, scan_out);
1231
1232 input l2clk;
1233 input l1clk;
1234 input pce0;
1235 input pce1;
1236 input pce_ov;
1237 input se;
1238 input stop;
1239 input siclk_in;
1240 input soclk_in;
1241 input scan_in;
1242 input grant_a;
1243 input qsel0;
1244 input shift;
1245 input [9:0] data_a;
1246 input [9:0] data_prev_x_l;
1247 output [9:0] data_x_l;
1248 output scan_out;
1249
1250 wire so5;
1251 wire siclk_out;
1252 wire soclk_out;
1253 wire l1clk0;
1254 wire l1clk1;
1255 wire grant_x;
1256 wire qsel0_buf;
1257 wire shift_buf;
1258
1259 cl_dp1_ccxhdr c0(
1260 .si (scan_in),
1261 .so (so5),
1262 .l2clk (l2clk),
1263 .pce0 (pce0),
1264 .pce1 (pce1),
1265 .pce_ov (pce_ov),
1266 .stop (stop),
1267 .siclk_in (siclk_in),
1268 .soclk_in (soclk_in),
1269 .siclk_out (siclk_out),
1270 .soclk_out (soclk_out),
1271 .l1clk0 (l1clk0),
1272 .l1clk1 (l1clk1),
1273 .se (se),
1274 .l1clk (l1clk),
1275 .grant_a (grant_a),
1276 .grant_x (grant_x),
1277 .qsel0 (qsel0),
1278 .qsel0_buf (qsel0_buf),
1279 .shift (shift),
1280 .shift_buf (shift_buf));
1281 ccx_mac_b #(10) mac_b(
1282 .siclk (siclk_out),
1283 .soclk (soclk_out),
1284 .data_a (data_a[9:0]),
1285 .data_prev_x_l (data_prev_x_l[9:0]),
1286 .data_x_l (data_x_l[9:0]),
1287 .si (so5),
1288 .so (scan_out),
1289 .l1clk0 (l1clk0),
1290 .l1clk1 (l1clk1),
1291 .grant_x (grant_x),
1292 .qsel0_buf (qsel0_buf),
1293 .shift_buf (shift_buf));
1294endmodule
1295
1296
1297`endif // `ifdef FPGA
1298
1299
1300
1301
1302
Full OpenSPARC design & verification tarball including full HDL.