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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ccx / rtl / pcx_mcl_dp.v
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pcx_mcl_dp.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35`ifndef FPGA
36module pcx_mcl_dp (
37 data_out_x_,
38 arb_grant_a,
39 arb_qsel0_a,
40 arb_qsel1_a,
41 arb_q0_holdbar_a,
42 arb_shift_a,
43 src_pcx_data_a,
44 data_crit_x_,
45 data_ncrit_x_,
46 l2clk,
47 scan_in,
48 tcu_pce_ov,
49 ccx_aclk,
50 ccx_bclk,
51 tcu_scan_en,
52 scan_out,
53 ccx_aclk_out,
54 ccx_bclk_out,
55 tcu_pce_ov_out,
56 tcu_scan_en_out);
57wire pce_ov;
58wire stop;
59wire siclk_in;
60wire soclk_in;
61wire se;
62wire [129:0] src_data_a;
63wire l1clka;
64wire l1clkb;
65wire i0_scanin;
66wire i0_scanout;
67wire i1_scanin;
68wire i1_scanout;
69wire i2_scanin;
70wire i2_scanout;
71wire i3_scanin;
72wire i3_scanout;
73wire i4_scanin;
74wire i4_scanout;
75wire i5_scanin;
76wire i5_scanout;
77wire i6_scanin;
78wire i6_scanout;
79wire i7_scanin;
80wire i7_scanout;
81wire i8_scanin;
82wire i8_scanout;
83wire i9_scanin;
84wire i9_scanout;
85wire i10_scanin;
86wire i10_scanout;
87wire i11_scanin;
88wire i11_scanout;
89wire i12_scanin;
90wire i12_scanout;
91
92
93output [129:0] data_out_x_;
94
95input arb_grant_a;
96input arb_qsel0_a;
97input arb_qsel1_a;
98input arb_q0_holdbar_a;
99input arb_shift_a;
100
101
102input [129:0] src_pcx_data_a;
103input [129:0] data_crit_x_;
104input [129:0] data_ncrit_x_;
105
106// globals
107input l2clk;
108input scan_in;
109input tcu_pce_ov; // scan signals
110input ccx_aclk;
111input ccx_bclk;
112input tcu_scan_en;
113
114output scan_out;
115
116// buffer the high fanout nets
117output ccx_aclk_out;
118output ccx_bclk_out;
119output tcu_pce_ov_out;
120output tcu_scan_en_out;
121
122// scan renames
123assign pce_ov = tcu_pce_ov_out;
124assign stop = 1'b0;
125assign siclk_in = ccx_aclk_out;
126assign soclk_in = ccx_bclk_out;
127assign se = tcu_scan_en_out ;
128// end scan
129
130assign src_data_a[129:0] = src_pcx_data_a[129:0];
131
132//cl_dp1_l1hdr_24x gkt_hdr (
133//.l2clk(l2clk),
134//.pce(1'b1),
135//.aclk(siclk),
136//.bclk(soclk),
137//.siclk_out(siclk_out_unused),
138//.soclk_out(soclk_out_unused),
139//.l1clk(l1clk),
140//.pce_ov(pce_ov),
141//.stop(stop)
142//);
143
144
145//l1clkhdr_dp_macro gkt_hdra
146// (
147// .l2clk (l2clk),
148// .l1en (1'b1 ),
149// .siclk_out (sia_unused),
150// .soclk_out (soa_unused),
151// .l1clk (l1clka)
152// );
153
154//l1clkhdr_dp_macro gkt_hdrb
155// (
156// .l2clk (l2clk),
157// .l1en (1'b1 ),
158// .siclk_out (sib_unused),
159// .soclk_out (sob_unused),
160// .l1clk (l1clkb)
161// );
162
163pcx_mcl_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn (
164 .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}),
165 .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out})
166);
167
168pcx_mcl_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra
169 (
170 .l2clk (l2clk),
171 .l1en (1'b1 ),
172 .l1clk (l1clka),
173 .pce_ov(pce_ov),
174 .stop(stop),
175 .se(se)
176 );
177
178pcx_mcl_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb
179 (
180 .l2clk (l2clk),
181 .l1en (1'b1 ),
182 .l1clk (l1clkb),
183 .pce_ov(pce_ov),
184 .stop(stop),
185 .se(se)
186 );
187
188// ccx_new_macro_c AUTO_TEMPLATE
189// (
190//.l2clk (l2clk),
191//.l1clk (l1clk),
192//.pce0 (arb_q0_holdbar_a),
193//.pce1 (arb_qsel1_a),
194//.pce_ov (pce_ov),
195//.stop (stop),
196//.siclk_in (siclk_in),
197//.soclk_in (soclk_in),
198//.scan_in (scan_in),
199//.grant_a (arb_grant_a),
200//.qsel0 (arb_qsel0_a),
201//.shift (arb_shift_a),
202//.data_a (src_data_a[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
203//.data_crit_x_l (data_crit_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
204//.data_ncrit_x_l (data_ncrit_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
205//.data_x_l (data_out_x_[@"(+ 9 (* 10 @))":@"(* 10 @)"]),
206//);
207
208
209pcx_mcl_dp_ccx_new_macro__type_c_l i0 (
210 // Outputs
211 .data_x_l (data_out_x_[9:0]), // Templated
212 // Inputs
213 .scan_in(i0_scanin),
214 .scan_out(i0_scanout),
215 .l2clk (l2clk), // Templated
216 .l1clk (l1clka), // Templated
217 .pce0 (arb_q0_holdbar_a), // Templated
218 .pce1 (arb_qsel1_a), // Templated
219 .pce_ov (pce_ov), // Templated
220 .stop (stop), // Templated
221 .siclk_in (siclk_in), // Templated
222 .soclk_in (soclk_in), // Templated
223 .grant_a (arb_grant_a), // Templated
224 .qsel0 (arb_qsel0_a), // Templated
225 .shift (arb_shift_a), // Templated
226 .data_a (src_data_a[9:0]), // Templated
227 .data_crit_x_l (data_crit_x_[9:0]), // Templated
228 .data_ncrit_x_l (data_ncrit_x_[9:0]),
229 .se(se)); // Templated
230
231pcx_mcl_dp_ccx_new_macro__type_c_l i1 (
232 // Outputs
233 .data_x_l (data_out_x_[19:10]), // Templated
234 // Inputs
235 .scan_in(i1_scanin),
236 .scan_out(i1_scanout),
237 .l2clk (l2clk), // Templated
238 .l1clk (l1clka), // Templated
239 .pce0 (arb_q0_holdbar_a), // Templated
240 .pce1 (arb_qsel1_a), // Templated
241 .pce_ov (pce_ov), // Templated
242 .stop (stop), // Templated
243 .siclk_in (siclk_in), // Templated
244 .soclk_in (soclk_in), // Templated
245 .grant_a (arb_grant_a), // Templated
246 .qsel0 (arb_qsel0_a), // Templated
247 .shift (arb_shift_a), // Templated
248 .data_a (src_data_a[19:10]), // Templated
249 .data_crit_x_l (data_crit_x_[19:10]), // Templated
250 .data_ncrit_x_l (data_ncrit_x_[19:10]),
251 .se(se)); // Templated
252
253pcx_mcl_dp_ccx_new_macro__type_c_l i2 (
254 // Outputs
255 .data_x_l (data_out_x_[29:20]), // Templated
256 // Inputs
257 .scan_in(i2_scanin),
258 .scan_out(i2_scanout),
259 .l2clk (l2clk), // Templated
260 .l1clk (l1clka), // Templated
261 .pce0 (arb_q0_holdbar_a), // Templated
262 .pce1 (arb_qsel1_a), // Templated
263 .pce_ov (pce_ov), // Templated
264 .stop (stop), // Templated
265 .siclk_in (siclk_in), // Templated
266 .soclk_in (soclk_in), // Templated
267 .grant_a (arb_grant_a), // Templated
268 .qsel0 (arb_qsel0_a), // Templated
269 .shift (arb_shift_a), // Templated
270 .data_a (src_data_a[29:20]), // Templated
271 .data_crit_x_l (data_crit_x_[29:20]), // Templated
272 .data_ncrit_x_l (data_ncrit_x_[29:20]),
273 .se(se)); // Templated
274pcx_mcl_dp_ccx_new_macro__type_c_l i3 (
275 // Outputs
276 .data_x_l (data_out_x_[39:30]), // Templated
277 // Inputs
278 .scan_in(i3_scanin),
279 .scan_out(i3_scanout),
280 .l2clk (l2clk), // Templated
281 .l1clk (l1clka), // Templated
282 .pce0 (arb_q0_holdbar_a), // Templated
283 .pce1 (arb_qsel1_a), // Templated
284 .pce_ov (pce_ov), // Templated
285 .stop (stop), // Templated
286 .siclk_in (siclk_in), // Templated
287 .soclk_in (soclk_in), // Templated
288 .grant_a (arb_grant_a), // Templated
289 .qsel0 (arb_qsel0_a), // Templated
290 .shift (arb_shift_a), // Templated
291 .data_a (src_data_a[39:30]), // Templated
292 .data_crit_x_l (data_crit_x_[39:30]), // Templated
293 .data_ncrit_x_l (data_ncrit_x_[39:30]),
294 .se(se)); // Templated
295pcx_mcl_dp_ccx_new_macro__type_c_l i4 (
296 // Outputs
297 .data_x_l (data_out_x_[49:40]), // Templated
298 // Inputs
299 .scan_in(i4_scanin),
300 .scan_out(i4_scanout),
301 .l2clk (l2clk), // Templated
302 .l1clk (l1clka), // Templated
303 .pce0 (arb_q0_holdbar_a), // Templated
304 .pce1 (arb_qsel1_a), // Templated
305 .pce_ov (pce_ov), // Templated
306 .stop (stop), // Templated
307 .siclk_in (siclk_in), // Templated
308 .soclk_in (soclk_in), // Templated
309 .grant_a (arb_grant_a), // Templated
310 .qsel0 (arb_qsel0_a), // Templated
311 .shift (arb_shift_a), // Templated
312 .data_a (src_data_a[49:40]), // Templated
313 .data_crit_x_l (data_crit_x_[49:40]), // Templated
314 .data_ncrit_x_l (data_ncrit_x_[49:40]),
315 .se(se)); // Templated
316pcx_mcl_dp_ccx_new_macro__type_c_l i5 (
317 // Outputs
318 .data_x_l (data_out_x_[59:50]), // Templated
319 // Inputs
320 .scan_in(i5_scanin),
321 .scan_out(i5_scanout),
322 .l2clk (l2clk), // Templated
323 .l1clk (l1clka), // Templated
324 .pce0 (arb_q0_holdbar_a), // Templated
325 .pce1 (arb_qsel1_a), // Templated
326 .pce_ov (pce_ov), // Templated
327 .stop (stop), // Templated
328 .siclk_in (siclk_in), // Templated
329 .soclk_in (soclk_in), // Templated
330 .grant_a (arb_grant_a), // Templated
331 .qsel0 (arb_qsel0_a), // Templated
332 .shift (arb_shift_a), // Templated
333 .data_a (src_data_a[59:50]), // Templated
334 .data_crit_x_l (data_crit_x_[59:50]), // Templated
335 .data_ncrit_x_l (data_ncrit_x_[59:50]),
336 .se(se)); // Templated
337pcx_mcl_dp_ccx_new_macro__type_c_l i6 (
338 // Outputs
339 .data_x_l (data_out_x_[69:60]), // Templated
340 // Inputs
341 .scan_in(i6_scanin),
342 .scan_out(i6_scanout),
343 .l2clk (l2clk), // Templated
344 .l1clk (l1clka), // Templated
345 .pce0 (arb_q0_holdbar_a), // Templated
346 .pce1 (arb_qsel1_a), // Templated
347 .pce_ov (pce_ov), // Templated
348 .stop (stop), // Templated
349 .siclk_in (siclk_in), // Templated
350 .soclk_in (soclk_in), // Templated
351 .grant_a (arb_grant_a), // Templated
352 .qsel0 (arb_qsel0_a), // Templated
353 .shift (arb_shift_a), // Templated
354 .data_a (src_data_a[69:60]), // Templated
355 .data_crit_x_l (data_crit_x_[69:60]), // Templated
356 .data_ncrit_x_l (data_ncrit_x_[69:60]),
357 .se(se)); // Templated
358pcx_mcl_dp_ccx_new_macro__type_c_l i7 (
359 // Outputs
360 .data_x_l (data_out_x_[79:70]), // Templated
361 // Inputs
362 .scan_in(i7_scanin),
363 .scan_out(i7_scanout),
364 .l2clk (l2clk), // Templated
365 .l1clk (l1clkb), // Templated
366 .pce0 (arb_q0_holdbar_a), // Templated
367 .pce1 (arb_qsel1_a), // Templated
368 .pce_ov (pce_ov), // Templated
369 .stop (stop), // Templated
370 .siclk_in (siclk_in), // Templated
371 .soclk_in (soclk_in), // Templated
372 .grant_a (arb_grant_a), // Templated
373 .qsel0 (arb_qsel0_a), // Templated
374 .shift (arb_shift_a), // Templated
375 .data_a (src_data_a[79:70]), // Templated
376 .data_crit_x_l (data_crit_x_[79:70]), // Templated
377 .data_ncrit_x_l (data_ncrit_x_[79:70]),
378 .se(se)); // Templated
379pcx_mcl_dp_ccx_new_macro__type_c_l i8 (
380 // Outputs
381 .data_x_l (data_out_x_[89:80]), // Templated
382 // Inputs
383 .scan_in(i8_scanin),
384 .scan_out(i8_scanout),
385 .l2clk (l2clk), // Templated
386 .l1clk (l1clkb), // Templated
387 .pce0 (arb_q0_holdbar_a), // Templated
388 .pce1 (arb_qsel1_a), // Templated
389 .pce_ov (pce_ov), // Templated
390 .stop (stop), // Templated
391 .siclk_in (siclk_in), // Templated
392 .soclk_in (soclk_in), // Templated
393 .grant_a (arb_grant_a), // Templated
394 .qsel0 (arb_qsel0_a), // Templated
395 .shift (arb_shift_a), // Templated
396 .data_a (src_data_a[89:80]), // Templated
397 .data_crit_x_l (data_crit_x_[89:80]), // Templated
398 .data_ncrit_x_l (data_ncrit_x_[89:80]),
399 .se(se)); // Templated
400pcx_mcl_dp_ccx_new_macro__type_c_l i9 (
401 // Outputs
402 .data_x_l (data_out_x_[99:90]), // Templated
403 // Inputs
404 .scan_in(i9_scanin),
405 .scan_out(i9_scanout),
406 .l2clk (l2clk), // Templated
407 .l1clk (l1clkb), // Templated
408 .pce0 (arb_q0_holdbar_a), // Templated
409 .pce1 (arb_qsel1_a), // Templated
410 .pce_ov (pce_ov), // Templated
411 .stop (stop), // Templated
412 .siclk_in (siclk_in), // Templated
413 .soclk_in (soclk_in), // Templated
414 .grant_a (arb_grant_a), // Templated
415 .qsel0 (arb_qsel0_a), // Templated
416 .shift (arb_shift_a), // Templated
417 .data_a (src_data_a[99:90]), // Templated
418 .data_crit_x_l (data_crit_x_[99:90]), // Templated
419 .data_ncrit_x_l (data_ncrit_x_[99:90]),
420 .se(se)); // Templated
421pcx_mcl_dp_ccx_new_macro__type_c_l i10 (
422 // Outputs
423 .data_x_l (data_out_x_[109:100]), // Templated
424 // Inputs
425 .scan_in(i10_scanin),
426 .scan_out(i10_scanout),
427 .l2clk (l2clk), // Templated
428 .l1clk (l1clkb), // Templated
429 .pce0 (arb_q0_holdbar_a), // Templated
430 .pce1 (arb_qsel1_a), // Templated
431 .pce_ov (pce_ov), // Templated
432 .stop (stop), // Templated
433 .siclk_in (siclk_in), // Templated
434 .soclk_in (soclk_in), // Templated
435 .grant_a (arb_grant_a), // Templated
436 .qsel0 (arb_qsel0_a), // Templated
437 .shift (arb_shift_a), // Templated
438 .data_a (src_data_a[109:100]), // Templated
439 .data_crit_x_l (data_crit_x_[109:100]), // Templated
440 .data_ncrit_x_l (data_ncrit_x_[109:100]),
441 .se(se)); // Templated
442pcx_mcl_dp_ccx_new_macro__type_c_l i11 (
443 // Outputs
444 .data_x_l (data_out_x_[119:110]), // Templated
445 // Inputs
446 .scan_in(i11_scanin),
447 .scan_out(i11_scanout),
448 .l2clk (l2clk), // Templated
449 .l1clk (l1clkb), // Templated
450 .pce0 (arb_q0_holdbar_a), // Templated
451 .pce1 (arb_qsel1_a), // Templated
452 .pce_ov (pce_ov), // Templated
453 .stop (stop), // Templated
454 .siclk_in (siclk_in), // Templated
455 .soclk_in (soclk_in), // Templated
456 .grant_a (arb_grant_a), // Templated
457 .qsel0 (arb_qsel0_a), // Templated
458 .shift (arb_shift_a), // Templated
459 .data_a (src_data_a[119:110]), // Templated
460 .data_crit_x_l (data_crit_x_[119:110]), // Templated
461 .data_ncrit_x_l (data_ncrit_x_[119:110]),
462 .se(se)); // Templated
463pcx_mcl_dp_ccx_new_macro__type_c_l i12 (
464 // Outputs
465 .data_x_l (data_out_x_[129:120]), // Templated
466 // Inputs
467 .scan_in(i12_scanin),
468 .scan_out(i12_scanout),
469 .l2clk (l2clk), // Templated
470 .l1clk (l1clkb), // Templated
471 .pce0 (arb_q0_holdbar_a), // Templated
472 .pce1 (arb_qsel1_a), // Templated
473 .pce_ov (pce_ov), // Templated
474 .stop (stop), // Templated
475 .siclk_in (siclk_in), // Templated
476 .soclk_in (soclk_in), // Templated
477 .grant_a (arb_grant_a), // Templated
478 .qsel0 (arb_qsel0_a), // Templated
479 .shift (arb_shift_a), // Templated
480 .data_a (src_data_a[129:120]), // Templated
481 .data_crit_x_l (data_crit_x_[129:120]), // Templated
482 .data_ncrit_x_l (data_ncrit_x_[129:120]),
483 .se(se)); // Templated
484
485// fixscan start:
486assign i12_scanin = scan_in ;
487assign i11_scanin = i12_scanout ;
488assign i10_scanin = i11_scanout ;
489assign i9_scanin = i10_scanout ;
490assign i8_scanin = i9_scanout ;
491assign i7_scanin = i8_scanout ;
492assign i6_scanin = i7_scanout ;
493assign i5_scanin = i6_scanout ;
494assign i4_scanin = i5_scanout ;
495assign i3_scanin = i4_scanout ;
496assign i2_scanin = i3_scanout ;
497assign i1_scanin = i2_scanout ;
498assign i0_scanin = i1_scanout ;
499assign scan_out = i0_scanout ;
500// fixscan end:
501endmodule
502
503//
504//// scan renames
505//assign pce_ov = tcu_pce_ov;
506//assign stop = tcu_clk_stop;
507//assign siclk = tcu_aclk;
508//assign soclk = tcu_bclk;
509//// end scan
510//
511//buff_macro i_buf_grant (width=1, stack=30c)
512//(
513// .din (arb_grant_a),
514// .dout (grant_a),
515// );
516//
517//msff_macro i_dff_grant_x (width=12, stack=30c)
518//(
519// .scan_in(i_dff_grant_x_scanin),
520// .scan_out(i_dff_grant_x_scanout),
521// .clk (l2clk),
522// .din ({12{grant_a}}),
523// .dout (grant_x[11:0]),
524// .en (1'b1),
525// );
526//
527//// DATAPATH SECTION
528//
529//msff_macro i_dff_q1_2 (width=40, stack=50c)
530//(
531// .scan_in(i_dff_q1_2_scanin),
532// .scan_out(i_dff_q1_2_scanout),
533// .clk (l2clk),
534// .din (src_pcx_data_a[129:90]),
535// .dout (q1_dataout[129:90]),
536// .en (arb_qsel1_a),
537// );
538//
539//msff_macro i_dff_q1_1 (width=50, stack=50c)
540//(
541// .scan_in(i_dff_q1_1_scanin),
542// .scan_out(i_dff_q1_1_scanout),
543// .clk (l2clk),
544// .din (src_pcx_data_a[89:40]),
545// .dout (q1_dataout[89:40]),
546// .en (arb_qsel1_a),
547// );
548//
549//msff_macro i_dff_q1_0 (width=40, stack=50c)
550//(
551// .scan_in(i_dff_q1_0_scanin),
552// .scan_out(i_dff_q1_0_scanout),
553// .clk (l2clk),
554// .din (src_pcx_data_a[39:0]),
555// .dout (q1_dataout[39:0]),
556// .en (arb_qsel1_a),
557// );
558//
559////assign q0_datain_ca[149:0] =
560//// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) |
561//// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ;
562//
563//
564//mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c)
565//(
566// .din0 (src_pcx_data_a[129:90]),
567// .din1 (q1_dataout[129:90]),
568// .sel0 (arb_qsel0_a),
569// .sel1 (arb_shift_a),
570// .dout (q0_datain_a[129:90]),
571// );
572//
573//mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c)
574//(
575// .din0 (src_pcx_data_a[89:40]),
576// .din1 (q1_dataout[89:40]),
577// .sel0 (arb_qsel0_a),
578// .sel1 (arb_shift_a),
579// .dout (q0_datain_a[89:40]),
580// );
581//
582//mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c)
583//(
584// .din0 (src_pcx_data_a[39:0]),
585// .din1 (q1_dataout[39:0]),
586// .sel0 (arb_qsel0_a),
587// .sel1 (arb_shift_a),
588// .dout (q0_datain_a[39:0]),
589// );
590//
591//msff_macro i_dff_q0_2 (width=40, stack=50c)
592//(
593// .scan_in(i_dff_q0_2_scanin),
594// .scan_out(i_dff_q0_2_scanout),
595// .clk (l2clk),
596// .din (q0_datain_a[129:90]),
597// .dout (q0_dataout[129:90]),
598// .en (arb_q0_holdbar_a),
599// );
600//
601//msff_macro i_dff_q0_1 (width=50, stack=50c)
602//(
603// .scan_in(i_dff_q0_1_scanin),
604// .scan_out(i_dff_q0_1_scanout),
605// .clk (l2clk),
606// .din (q0_datain_a[89:40]),
607// .dout (q0_dataout[89:40]),
608// .en (arb_q0_holdbar_a),
609// );
610//
611//msff_macro i_dff_q0_0 (width=40, stack=50c)
612//(
613// .scan_in(i_dff_q0_0_scanin),
614// .scan_out(i_dff_q0_0_scanout),
615// .clk (l2clk),
616// .din (q0_datain_a[39:0]),
617// .dout (q0_dataout[39:0]),
618// .en (arb_q0_holdbar_a),
619// );
620//
621////MUX
622//
623//nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c)
624//(
625// .din0 (q0_dataout[129:90]),
626// .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}),
627// .dout (data_x_[129:90]),
628// );
629//
630//nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c)
631//(
632// .din0 (q0_dataout[89:40]),
633// .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}),
634// .dout (data_x_[89:40]),
635// );
636//
637//nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c)
638//(
639// .din0 (q0_dataout[39:0]),
640// .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}),
641// .dout (data_x_[39:0]),
642// );
643//
644//nand_macro i_nand_data_crit_2 (width=40, ports=3, stack=50c)
645//(
646// .din0 (data_x_[129:90]),
647// .din1 (data_crit_x_[129:90]),
648// .din2 (data_ncrit_x_[129:90]),
649// .dout (data_out_x[129:90])
650//);
651//
652//nand_macro i_nand_data_crit_1 (width=50, ports=3, stack=50c)
653//(
654// .din0 (data_x_[89:40]),
655// .din1 (data_crit_x_[89:40]),
656// .din2 (data_ncrit_x_[89:40]),
657// .dout (data_out_x[89:40])
658//);
659//
660//nand_macro i_nand_data_crit_0 (width=40, ports=3, stack=50c)
661//(
662// .din0 (data_x_[39:0]),
663// .din1 (data_crit_x_[39:0]),
664// .din2 (data_ncrit_x_[39:0]),
665// .dout (data_out_x[39:0])
666//);
667//
668//inv_macro i_inv_data_out_2 (width=40, stack=50c)
669//(
670// .din (data_out_x[129:90]),
671// .dout (data_out_x_[129:90])
672// );
673//
674//inv_macro i_inv_data_out_1 (width=50, stack=50c)
675//(
676// .din (data_out_x[89:40]),
677// .dout (data_out_x_[89:40])
678// );
679//
680//inv_macro i_inv_data_out_0 (width=40, stack=50c)
681//(
682// .din (data_out_x[39:0]),
683// .dout (data_out_x_[39:0])
684// );
685//
686//// fixscan start:
687//assign i_dff_grant_x_scanin = scan_in ;
688//assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ;
689//assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ;
690//assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ;
691//assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ;
692//assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ;
693//assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ;
694//assign scan_out = i_dff_q0_0_scanout ;
695//// fixscan end:
696//endmodule
697// Local Variables:
698// verilog-library-directories:("." "v")
699// verilog-library-files:("./v/ccx_new_macro.v")
700// End:
701//
702
703
704//
705// buff macro
706//
707//
708
709
710
711
712
713module pcx_mcl_dp_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 (
714 din,
715 dout);
716 input [3:0] din;
717 output [3:0] dout;
718
719
720
721
722
723
724buff #(4) d0_0 (
725.in(din[3:0]),
726.out(dout[3:0])
727);
728
729
730
731
732
733
734
735
736endmodule
737
738
739
740
741
742
743
744
745
746// any PARAMS parms go into naming of macro
747
748module pcx_mcl_dp_ccx_l1clkhdr_ctl_macro__dl1hdr_24x (
749 l2clk,
750 l1en,
751 pce_ov,
752 stop,
753 se,
754 l1clk);
755
756
757 input l2clk;
758 input l1en;
759 input pce_ov;
760 input stop;
761 input se;
762 output l1clk;
763
764
765
766
767
768cl_sc1_l1hdr_24x c_0 (
769
770
771 .l2clk(l2clk),
772 .pce(l1en),
773 .l1clk(l1clk),
774 .se(se),
775 .pce_ov(pce_ov),
776 .stop(stop)
777);
778
779
780
781
782
783
784endmodule
785
786
787
788
789
790
791
792
793
794//
795// ccx macro
796//
797//
798
799
800
801
802
803module pcx_mcl_dp_ccx_new_macro__type_c_l (
804 l2clk,
805 l1clk,
806 pce0,
807 pce1,
808 pce_ov,
809 se,
810 stop,
811 siclk_in,
812 soclk_in,
813 scan_in,
814 grant_a,
815 qsel0,
816 shift,
817 data_a,
818 data_crit_x_l,
819 data_ncrit_x_l,
820 data_x_l,
821 scan_out);
822wire so5;
823wire siclk_out;
824wire soclk_out;
825wire l1clk0;
826wire l1clk1;
827wire grant_x;
828wire qsel0_buf;
829wire shift_buf;
830
831input l2clk;
832input l1clk;
833input pce0;
834input pce1;
835input pce_ov;
836input se;
837input stop;
838input siclk_in;
839input soclk_in;
840input scan_in;
841input grant_a;
842input qsel0;
843input shift;
844input [9:0] data_a;
845input [9:0] data_crit_x_l;
846input [9:0] data_ncrit_x_l;
847output [9:0] data_x_l;
848output scan_out;
849cl_dp1_ccxhdr c0 (
850.si(scan_in),
851.so(so5),
852 .l2clk(l2clk),
853 .pce0(pce0),
854 .pce1(pce1),
855 .pce_ov(pce_ov),
856 .stop(stop),
857 .siclk_in(siclk_in),
858 .soclk_in(soclk_in),
859 .siclk_out(siclk_out),
860 .soclk_out(soclk_out),
861 .l1clk0(l1clk0),
862 .l1clk1(l1clk1),
863 .se(se),
864 .l1clk(l1clk),
865 .grant_a(grant_a),
866 .grant_x(grant_x),
867 .qsel0(qsel0),
868 .qsel0_buf(qsel0_buf),
869 .shift(shift),
870 .shift_buf(shift_buf)
871);
872
873
874
875
876
877
878ccx_mac_c #(10) mac_c(
879.siclk(siclk_out),
880.soclk(soclk_out),
881.data_a(data_a[9:0]),
882.data_crit_x_l(data_crit_x_l[9:0]),
883.data_ncrit_x_l(data_ncrit_x_l[9:0]),
884.data_x_l(data_x_l[9:0]),
885.si(so5),
886.so(scan_out),
887 .l1clk0(l1clk0),
888 .l1clk1(l1clk1),
889 .grant_x(grant_x),
890 .qsel0_buf(qsel0_buf),
891 .shift_buf(shift_buf)
892);
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907endmodule
908`endif // `ifndef FPGA
909
910`ifdef FPGA
911`timescale 1 ns / 100 ps
912module pcx_mcl_dp(data_out_x_, arb_grant_a, arb_qsel0_a, arb_qsel1_a,
913 arb_q0_holdbar_a, arb_shift_a, src_pcx_data_a, data_crit_x_,
914 data_ncrit_x_, l2clk, scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk,
915 tcu_scan_en, scan_out, ccx_aclk_out, ccx_bclk_out, tcu_pce_ov_out,
916 tcu_scan_en_out);
917
918 output [129:0] data_out_x_;
919 input arb_grant_a;
920 input arb_qsel0_a;
921 input arb_qsel1_a;
922 input arb_q0_holdbar_a;
923 input arb_shift_a;
924 input [129:0] src_pcx_data_a;
925 input [129:0] data_crit_x_;
926 input [129:0] data_ncrit_x_;
927 input l2clk;
928 input scan_in;
929 input tcu_pce_ov;
930 input ccx_aclk;
931 input ccx_bclk;
932 input tcu_scan_en;
933 output scan_out;
934 output ccx_aclk_out;
935 output ccx_bclk_out;
936 output tcu_pce_ov_out;
937 output tcu_scan_en_out;
938
939 wire pce_ov;
940 wire stop;
941 wire siclk_in;
942 wire soclk_in;
943 wire se;
944 wire [129:0] src_data_a;
945 wire l1clka;
946 wire l1clkb;
947 wire i0_scanin;
948 wire i0_scanout;
949 wire i1_scanin;
950 wire i1_scanout;
951 wire i2_scanin;
952 wire i2_scanout;
953 wire i3_scanin;
954 wire i3_scanout;
955 wire i4_scanin;
956 wire i4_scanout;
957 wire i5_scanin;
958 wire i5_scanout;
959 wire i6_scanin;
960 wire i6_scanout;
961 wire i7_scanin;
962 wire i7_scanout;
963 wire i8_scanin;
964 wire i8_scanout;
965 wire i9_scanin;
966 wire i9_scanout;
967 wire i10_scanin;
968 wire i10_scanout;
969 wire i11_scanin;
970 wire i11_scanout;
971 wire i12_scanin;
972 wire i12_scanout;
973
974 assign pce_ov = tcu_pce_ov_out;
975 assign stop = 1'b0;
976 assign siclk_in = ccx_aclk_out;
977 assign soclk_in = ccx_bclk_out;
978 assign se = tcu_scan_en_out;
979 assign src_data_a[129:0] = src_pcx_data_a[129:0];
980 assign i12_scanin = scan_in;
981 assign i11_scanin = i12_scanout;
982 assign i10_scanin = i11_scanout;
983 assign i9_scanin = i10_scanout;
984 assign i8_scanin = i9_scanout;
985 assign i7_scanin = i8_scanout;
986 assign i6_scanin = i7_scanout;
987 assign i5_scanin = i6_scanout;
988 assign i4_scanin = i5_scanout;
989 assign i3_scanin = i4_scanout;
990 assign i2_scanin = i3_scanout;
991 assign i1_scanin = i2_scanout;
992 assign i0_scanin = i1_scanout;
993 assign scan_out = i0_scanout;
994
995 buff_macro__dbuff_8x__stack_none__vertical_1__width_4 buf_hfn(
996 .din ({ccx_aclk, ccx_bclk,
997 tcu_pce_ov, tcu_scan_en}),
998 .dout ({ccx_aclk_out, ccx_bclk_out,
999 tcu_pce_ov_out, tcu_scan_en_out}));
1000 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdra(
1001 .l2clk (l2clk),
1002 .l1en (1'b1),
1003 .l1clk (l1clka),
1004 .pce_ov (pce_ov),
1005 .stop (stop),
1006 .se (se));
1007 ccx_l1clkhdr_ctl_macro__dl1hdr_24x gkt_hdrb(
1008 .l2clk (l2clk),
1009 .l1en (1'b1),
1010 .l1clk (l1clkb),
1011 .pce_ov (pce_ov),
1012 .stop (stop),
1013 .se (se));
1014 ccx_new_macro__type_c_l i0(
1015 .data_x_l (data_out_x_[9:0]),
1016 .scan_in (i0_scanin),
1017 .scan_out (i0_scanout),
1018 .l2clk (l2clk),
1019 .l1clk (l1clka),
1020 .pce0 (arb_q0_holdbar_a),
1021 .pce1 (arb_qsel1_a),
1022 .pce_ov (pce_ov),
1023 .stop (stop),
1024 .siclk_in (siclk_in),
1025 .soclk_in (soclk_in),
1026 .grant_a (arb_grant_a),
1027 .qsel0 (arb_qsel0_a),
1028 .shift (arb_shift_a),
1029 .data_a (src_data_a[9:0]),
1030 .data_crit_x_l (data_crit_x_[9:0]),
1031 .data_ncrit_x_l (data_ncrit_x_[9:0]),
1032 .se (se));
1033 ccx_new_macro__type_c_l i1(
1034 .data_x_l (data_out_x_[19:10]),
1035 .scan_in (i1_scanin),
1036 .scan_out (i1_scanout),
1037 .l2clk (l2clk),
1038 .l1clk (l1clka),
1039 .pce0 (arb_q0_holdbar_a),
1040 .pce1 (arb_qsel1_a),
1041 .pce_ov (pce_ov),
1042 .stop (stop),
1043 .siclk_in (siclk_in),
1044 .soclk_in (soclk_in),
1045 .grant_a (arb_grant_a),
1046 .qsel0 (arb_qsel0_a),
1047 .shift (arb_shift_a),
1048 .data_a (src_data_a[19:10]),
1049 .data_crit_x_l (data_crit_x_[19:10]),
1050 .data_ncrit_x_l (data_ncrit_x_[19:10]),
1051 .se (se));
1052 ccx_new_macro__type_c_l i2(
1053 .data_x_l (data_out_x_[29:20]),
1054 .scan_in (i2_scanin),
1055 .scan_out (i2_scanout),
1056 .l2clk (l2clk),
1057 .l1clk (l1clka),
1058 .pce0 (arb_q0_holdbar_a),
1059 .pce1 (arb_qsel1_a),
1060 .pce_ov (pce_ov),
1061 .stop (stop),
1062 .siclk_in (siclk_in),
1063 .soclk_in (soclk_in),
1064 .grant_a (arb_grant_a),
1065 .qsel0 (arb_qsel0_a),
1066 .shift (arb_shift_a),
1067 .data_a (src_data_a[29:20]),
1068 .data_crit_x_l (data_crit_x_[29:20]),
1069 .data_ncrit_x_l (data_ncrit_x_[29:20]),
1070 .se (se));
1071 ccx_new_macro__type_c_l i3(
1072 .data_x_l (data_out_x_[39:30]),
1073 .scan_in (i3_scanin),
1074 .scan_out (i3_scanout),
1075 .l2clk (l2clk),
1076 .l1clk (l1clka),
1077 .pce0 (arb_q0_holdbar_a),
1078 .pce1 (arb_qsel1_a),
1079 .pce_ov (pce_ov),
1080 .stop (stop),
1081 .siclk_in (siclk_in),
1082 .soclk_in (soclk_in),
1083 .grant_a (arb_grant_a),
1084 .qsel0 (arb_qsel0_a),
1085 .shift (arb_shift_a),
1086 .data_a (src_data_a[39:30]),
1087 .data_crit_x_l (data_crit_x_[39:30]),
1088 .data_ncrit_x_l (data_ncrit_x_[39:30]),
1089 .se (se));
1090 ccx_new_macro__type_c_l i4(
1091 .data_x_l (data_out_x_[49:40]),
1092 .scan_in (i4_scanin),
1093 .scan_out (i4_scanout),
1094 .l2clk (l2clk),
1095 .l1clk (l1clka),
1096 .pce0 (arb_q0_holdbar_a),
1097 .pce1 (arb_qsel1_a),
1098 .pce_ov (pce_ov),
1099 .stop (stop),
1100 .siclk_in (siclk_in),
1101 .soclk_in (soclk_in),
1102 .grant_a (arb_grant_a),
1103 .qsel0 (arb_qsel0_a),
1104 .shift (arb_shift_a),
1105 .data_a (src_data_a[49:40]),
1106 .data_crit_x_l (data_crit_x_[49:40]),
1107 .data_ncrit_x_l (data_ncrit_x_[49:40]),
1108 .se (se));
1109 ccx_new_macro__type_c_l i5(
1110 .data_x_l (data_out_x_[59:50]),
1111 .scan_in (i5_scanin),
1112 .scan_out (i5_scanout),
1113 .l2clk (l2clk),
1114 .l1clk (l1clka),
1115 .pce0 (arb_q0_holdbar_a),
1116 .pce1 (arb_qsel1_a),
1117 .pce_ov (pce_ov),
1118 .stop (stop),
1119 .siclk_in (siclk_in),
1120 .soclk_in (soclk_in),
1121 .grant_a (arb_grant_a),
1122 .qsel0 (arb_qsel0_a),
1123 .shift (arb_shift_a),
1124 .data_a (src_data_a[59:50]),
1125 .data_crit_x_l (data_crit_x_[59:50]),
1126 .data_ncrit_x_l (data_ncrit_x_[59:50]),
1127 .se (se));
1128 ccx_new_macro__type_c_l i6(
1129 .data_x_l (data_out_x_[69:60]),
1130 .scan_in (i6_scanin),
1131 .scan_out (i6_scanout),
1132 .l2clk (l2clk),
1133 .l1clk (l1clka),
1134 .pce0 (arb_q0_holdbar_a),
1135 .pce1 (arb_qsel1_a),
1136 .pce_ov (pce_ov),
1137 .stop (stop),
1138 .siclk_in (siclk_in),
1139 .soclk_in (soclk_in),
1140 .grant_a (arb_grant_a),
1141 .qsel0 (arb_qsel0_a),
1142 .shift (arb_shift_a),
1143 .data_a (src_data_a[69:60]),
1144 .data_crit_x_l (data_crit_x_[69:60]),
1145 .data_ncrit_x_l (data_ncrit_x_[69:60]),
1146 .se (se));
1147 ccx_new_macro__type_c_l i7(
1148 .data_x_l (data_out_x_[79:70]),
1149 .scan_in (i7_scanin),
1150 .scan_out (i7_scanout),
1151 .l2clk (l2clk),
1152 .l1clk (l1clkb),
1153 .pce0 (arb_q0_holdbar_a),
1154 .pce1 (arb_qsel1_a),
1155 .pce_ov (pce_ov),
1156 .stop (stop),
1157 .siclk_in (siclk_in),
1158 .soclk_in (soclk_in),
1159 .grant_a (arb_grant_a),
1160 .qsel0 (arb_qsel0_a),
1161 .shift (arb_shift_a),
1162 .data_a (src_data_a[79:70]),
1163 .data_crit_x_l (data_crit_x_[79:70]),
1164 .data_ncrit_x_l (data_ncrit_x_[79:70]),
1165 .se (se));
1166 ccx_new_macro__type_c_l i8(
1167 .data_x_l (data_out_x_[89:80]),
1168 .scan_in (i8_scanin),
1169 .scan_out (i8_scanout),
1170 .l2clk (l2clk),
1171 .l1clk (l1clkb),
1172 .pce0 (arb_q0_holdbar_a),
1173 .pce1 (arb_qsel1_a),
1174 .pce_ov (pce_ov),
1175 .stop (stop),
1176 .siclk_in (siclk_in),
1177 .soclk_in (soclk_in),
1178 .grant_a (arb_grant_a),
1179 .qsel0 (arb_qsel0_a),
1180 .shift (arb_shift_a),
1181 .data_a (src_data_a[89:80]),
1182 .data_crit_x_l (data_crit_x_[89:80]),
1183 .data_ncrit_x_l (data_ncrit_x_[89:80]),
1184 .se (se));
1185 ccx_new_macro__type_c_l i9(
1186 .data_x_l (data_out_x_[99:90]),
1187 .scan_in (i9_scanin),
1188 .scan_out (i9_scanout),
1189 .l2clk (l2clk),
1190 .l1clk (l1clkb),
1191 .pce0 (arb_q0_holdbar_a),
1192 .pce1 (arb_qsel1_a),
1193 .pce_ov (pce_ov),
1194 .stop (stop),
1195 .siclk_in (siclk_in),
1196 .soclk_in (soclk_in),
1197 .grant_a (arb_grant_a),
1198 .qsel0 (arb_qsel0_a),
1199 .shift (arb_shift_a),
1200 .data_a (src_data_a[99:90]),
1201 .data_crit_x_l (data_crit_x_[99:90]),
1202 .data_ncrit_x_l (data_ncrit_x_[99:90]),
1203 .se (se));
1204 ccx_new_macro__type_c_l i10(
1205 .data_x_l (data_out_x_[109:100]),
1206 .scan_in (i10_scanin),
1207 .scan_out (i10_scanout),
1208 .l2clk (l2clk),
1209 .l1clk (l1clkb),
1210 .pce0 (arb_q0_holdbar_a),
1211 .pce1 (arb_qsel1_a),
1212 .pce_ov (pce_ov),
1213 .stop (stop),
1214 .siclk_in (siclk_in),
1215 .soclk_in (soclk_in),
1216 .grant_a (arb_grant_a),
1217 .qsel0 (arb_qsel0_a),
1218 .shift (arb_shift_a),
1219 .data_a (src_data_a[109:100]),
1220 .data_crit_x_l (data_crit_x_[109:100]),
1221 .data_ncrit_x_l (data_ncrit_x_[109:100]),
1222 .se (se));
1223 ccx_new_macro__type_c_l i11(
1224 .data_x_l (data_out_x_[119:110]),
1225 .scan_in (i11_scanin),
1226 .scan_out (i11_scanout),
1227 .l2clk (l2clk),
1228 .l1clk (l1clkb),
1229 .pce0 (arb_q0_holdbar_a),
1230 .pce1 (arb_qsel1_a),
1231 .pce_ov (pce_ov),
1232 .stop (stop),
1233 .siclk_in (siclk_in),
1234 .soclk_in (soclk_in),
1235 .grant_a (arb_grant_a),
1236 .qsel0 (arb_qsel0_a),
1237 .shift (arb_shift_a),
1238 .data_a (src_data_a[119:110]),
1239 .data_crit_x_l (data_crit_x_[119:110]),
1240 .data_ncrit_x_l (data_ncrit_x_[119:110]),
1241 .se (se));
1242 ccx_new_macro__type_c_l i12(
1243 .data_x_l (data_out_x_[129:120]),
1244 .scan_in (i12_scanin),
1245 .scan_out (i12_scanout),
1246 .l2clk (l2clk),
1247 .l1clk (l1clkb),
1248 .pce0 (arb_q0_holdbar_a),
1249 .pce1 (arb_qsel1_a),
1250 .pce_ov (pce_ov),
1251 .stop (stop),
1252 .siclk_in (siclk_in),
1253 .soclk_in (soclk_in),
1254 .grant_a (arb_grant_a),
1255 .qsel0 (arb_qsel0_a),
1256 .shift (arb_shift_a),
1257 .data_a (src_data_a[129:120]),
1258 .data_crit_x_l (data_crit_x_[129:120]),
1259 .data_ncrit_x_l (data_ncrit_x_[129:120]),
1260 .se (se));
1261endmodule
1262
1263`endif // `ifdef FPGA
1264
Full OpenSPARC design & verification tarball including full HDL.