Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / db1 / rtl / db1_spare_ctl_macro__num_5.v
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2//
3// OpenSPARC T2 Processor File: db1_spare_ctl_macro__num_5.v
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35module db1_spare_ctl_macro__num_5 (
36 l1clk,
37 scan_in,
38 siclk,
39 soclk,
40 scan_out);
41wire si_0;
42wire so_0;
43wire spare0_flop_unused;
44wire spare0_buf_32x_unused;
45wire spare0_nand3_8x_unused;
46wire spare0_inv_8x_unused;
47wire spare0_aoi22_4x_unused;
48wire spare0_buf_8x_unused;
49wire spare0_oai22_4x_unused;
50wire spare0_inv_16x_unused;
51wire spare0_nand2_16x_unused;
52wire spare0_nor3_4x_unused;
53wire spare0_nand2_8x_unused;
54wire spare0_buf_16x_unused;
55wire spare0_nor2_16x_unused;
56wire spare0_inv_32x_unused;
57wire si_1;
58wire so_1;
59wire spare1_flop_unused;
60wire spare1_buf_32x_unused;
61wire spare1_nand3_8x_unused;
62wire spare1_inv_8x_unused;
63wire spare1_aoi22_4x_unused;
64wire spare1_buf_8x_unused;
65wire spare1_oai22_4x_unused;
66wire spare1_inv_16x_unused;
67wire spare1_nand2_16x_unused;
68wire spare1_nor3_4x_unused;
69wire spare1_nand2_8x_unused;
70wire spare1_buf_16x_unused;
71wire spare1_nor2_16x_unused;
72wire spare1_inv_32x_unused;
73wire si_2;
74wire so_2;
75wire spare2_flop_unused;
76wire spare2_buf_32x_unused;
77wire spare2_nand3_8x_unused;
78wire spare2_inv_8x_unused;
79wire spare2_aoi22_4x_unused;
80wire spare2_buf_8x_unused;
81wire spare2_oai22_4x_unused;
82wire spare2_inv_16x_unused;
83wire spare2_nand2_16x_unused;
84wire spare2_nor3_4x_unused;
85wire spare2_nand2_8x_unused;
86wire spare2_buf_16x_unused;
87wire spare2_nor2_16x_unused;
88wire spare2_inv_32x_unused;
89wire si_3;
90wire so_3;
91wire spare3_flop_unused;
92wire spare3_buf_32x_unused;
93wire spare3_nand3_8x_unused;
94wire spare3_inv_8x_unused;
95wire spare3_aoi22_4x_unused;
96wire spare3_buf_8x_unused;
97wire spare3_oai22_4x_unused;
98wire spare3_inv_16x_unused;
99wire spare3_nand2_16x_unused;
100wire spare3_nor3_4x_unused;
101wire spare3_nand2_8x_unused;
102wire spare3_buf_16x_unused;
103wire spare3_nor2_16x_unused;
104wire spare3_inv_32x_unused;
105wire si_4;
106wire so_4;
107wire spare4_flop_unused;
108wire spare4_buf_32x_unused;
109wire spare4_nand3_8x_unused;
110wire spare4_inv_8x_unused;
111wire spare4_aoi22_4x_unused;
112wire spare4_buf_8x_unused;
113wire spare4_oai22_4x_unused;
114wire spare4_inv_16x_unused;
115wire spare4_nand2_16x_unused;
116wire spare4_nor3_4x_unused;
117wire spare4_nand2_8x_unused;
118wire spare4_buf_16x_unused;
119wire spare4_nor2_16x_unused;
120wire spare4_inv_32x_unused;
121
122
123input l1clk;
124input scan_in;
125input siclk;
126input soclk;
127output scan_out;
128
129cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
130 .siclk(siclk),
131 .soclk(soclk),
132 .si(si_0),
133 .so(so_0),
134 .d(1'b0),
135 .q(spare0_flop_unused));
136assign si_0 = scan_in;
137
138cl_u1_buf_32x spare0_buf_32x (.in(1'b1),
139 .out(spare0_buf_32x_unused));
140cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
141 .in1(1'b1),
142 .in2(1'b1),
143 .out(spare0_nand3_8x_unused));
144cl_u1_inv_8x spare0_inv_8x (.in(1'b1),
145 .out(spare0_inv_8x_unused));
146cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
147 .in01(1'b1),
148 .in10(1'b1),
149 .in11(1'b1),
150 .out(spare0_aoi22_4x_unused));
151cl_u1_buf_8x spare0_buf_8x (.in(1'b1),
152 .out(spare0_buf_8x_unused));
153cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
154 .in01(1'b1),
155 .in10(1'b1),
156 .in11(1'b1),
157 .out(spare0_oai22_4x_unused));
158cl_u1_inv_16x spare0_inv_16x (.in(1'b1),
159 .out(spare0_inv_16x_unused));
160cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
161 .in1(1'b1),
162 .out(spare0_nand2_16x_unused));
163cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
164 .in1(1'b0),
165 .in2(1'b0),
166 .out(spare0_nor3_4x_unused));
167cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
168 .in1(1'b1),
169 .out(spare0_nand2_8x_unused));
170cl_u1_buf_16x spare0_buf_16x (.in(1'b1),
171 .out(spare0_buf_16x_unused));
172cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
173 .in1(1'b0),
174 .out(spare0_nor2_16x_unused));
175cl_u1_inv_32x spare0_inv_32x (.in(1'b1),
176 .out(spare0_inv_32x_unused));
177
178cl_sc1_msff_8x spare1_flop (.l1clk(l1clk),
179 .siclk(siclk),
180 .soclk(soclk),
181 .si(si_1),
182 .so(so_1),
183 .d(1'b0),
184 .q(spare1_flop_unused));
185assign si_1 = so_0;
186
187cl_u1_buf_32x spare1_buf_32x (.in(1'b1),
188 .out(spare1_buf_32x_unused));
189cl_u1_nand3_8x spare1_nand3_8x (.in0(1'b1),
190 .in1(1'b1),
191 .in2(1'b1),
192 .out(spare1_nand3_8x_unused));
193cl_u1_inv_8x spare1_inv_8x (.in(1'b1),
194 .out(spare1_inv_8x_unused));
195cl_u1_aoi22_4x spare1_aoi22_4x (.in00(1'b1),
196 .in01(1'b1),
197 .in10(1'b1),
198 .in11(1'b1),
199 .out(spare1_aoi22_4x_unused));
200cl_u1_buf_8x spare1_buf_8x (.in(1'b1),
201 .out(spare1_buf_8x_unused));
202cl_u1_oai22_4x spare1_oai22_4x (.in00(1'b1),
203 .in01(1'b1),
204 .in10(1'b1),
205 .in11(1'b1),
206 .out(spare1_oai22_4x_unused));
207cl_u1_inv_16x spare1_inv_16x (.in(1'b1),
208 .out(spare1_inv_16x_unused));
209cl_u1_nand2_16x spare1_nand2_16x (.in0(1'b1),
210 .in1(1'b1),
211 .out(spare1_nand2_16x_unused));
212cl_u1_nor3_4x spare1_nor3_4x (.in0(1'b0),
213 .in1(1'b0),
214 .in2(1'b0),
215 .out(spare1_nor3_4x_unused));
216cl_u1_nand2_8x spare1_nand2_8x (.in0(1'b1),
217 .in1(1'b1),
218 .out(spare1_nand2_8x_unused));
219cl_u1_buf_16x spare1_buf_16x (.in(1'b1),
220 .out(spare1_buf_16x_unused));
221cl_u1_nor2_16x spare1_nor2_16x (.in0(1'b0),
222 .in1(1'b0),
223 .out(spare1_nor2_16x_unused));
224cl_u1_inv_32x spare1_inv_32x (.in(1'b1),
225 .out(spare1_inv_32x_unused));
226
227cl_sc1_msff_8x spare2_flop (.l1clk(l1clk),
228 .siclk(siclk),
229 .soclk(soclk),
230 .si(si_2),
231 .so(so_2),
232 .d(1'b0),
233 .q(spare2_flop_unused));
234assign si_2 = so_1;
235
236cl_u1_buf_32x spare2_buf_32x (.in(1'b1),
237 .out(spare2_buf_32x_unused));
238cl_u1_nand3_8x spare2_nand3_8x (.in0(1'b1),
239 .in1(1'b1),
240 .in2(1'b1),
241 .out(spare2_nand3_8x_unused));
242cl_u1_inv_8x spare2_inv_8x (.in(1'b1),
243 .out(spare2_inv_8x_unused));
244cl_u1_aoi22_4x spare2_aoi22_4x (.in00(1'b1),
245 .in01(1'b1),
246 .in10(1'b1),
247 .in11(1'b1),
248 .out(spare2_aoi22_4x_unused));
249cl_u1_buf_8x spare2_buf_8x (.in(1'b1),
250 .out(spare2_buf_8x_unused));
251cl_u1_oai22_4x spare2_oai22_4x (.in00(1'b1),
252 .in01(1'b1),
253 .in10(1'b1),
254 .in11(1'b1),
255 .out(spare2_oai22_4x_unused));
256cl_u1_inv_16x spare2_inv_16x (.in(1'b1),
257 .out(spare2_inv_16x_unused));
258cl_u1_nand2_16x spare2_nand2_16x (.in0(1'b1),
259 .in1(1'b1),
260 .out(spare2_nand2_16x_unused));
261cl_u1_nor3_4x spare2_nor3_4x (.in0(1'b0),
262 .in1(1'b0),
263 .in2(1'b0),
264 .out(spare2_nor3_4x_unused));
265cl_u1_nand2_8x spare2_nand2_8x (.in0(1'b1),
266 .in1(1'b1),
267 .out(spare2_nand2_8x_unused));
268cl_u1_buf_16x spare2_buf_16x (.in(1'b1),
269 .out(spare2_buf_16x_unused));
270cl_u1_nor2_16x spare2_nor2_16x (.in0(1'b0),
271 .in1(1'b0),
272 .out(spare2_nor2_16x_unused));
273cl_u1_inv_32x spare2_inv_32x (.in(1'b1),
274 .out(spare2_inv_32x_unused));
275
276cl_sc1_msff_8x spare3_flop (.l1clk(l1clk),
277 .siclk(siclk),
278 .soclk(soclk),
279 .si(si_3),
280 .so(so_3),
281 .d(1'b0),
282 .q(spare3_flop_unused));
283assign si_3 = so_2;
284
285cl_u1_buf_32x spare3_buf_32x (.in(1'b1),
286 .out(spare3_buf_32x_unused));
287cl_u1_nand3_8x spare3_nand3_8x (.in0(1'b1),
288 .in1(1'b1),
289 .in2(1'b1),
290 .out(spare3_nand3_8x_unused));
291cl_u1_inv_8x spare3_inv_8x (.in(1'b1),
292 .out(spare3_inv_8x_unused));
293cl_u1_aoi22_4x spare3_aoi22_4x (.in00(1'b1),
294 .in01(1'b1),
295 .in10(1'b1),
296 .in11(1'b1),
297 .out(spare3_aoi22_4x_unused));
298cl_u1_buf_8x spare3_buf_8x (.in(1'b1),
299 .out(spare3_buf_8x_unused));
300cl_u1_oai22_4x spare3_oai22_4x (.in00(1'b1),
301 .in01(1'b1),
302 .in10(1'b1),
303 .in11(1'b1),
304 .out(spare3_oai22_4x_unused));
305cl_u1_inv_16x spare3_inv_16x (.in(1'b1),
306 .out(spare3_inv_16x_unused));
307cl_u1_nand2_16x spare3_nand2_16x (.in0(1'b1),
308 .in1(1'b1),
309 .out(spare3_nand2_16x_unused));
310cl_u1_nor3_4x spare3_nor3_4x (.in0(1'b0),
311 .in1(1'b0),
312 .in2(1'b0),
313 .out(spare3_nor3_4x_unused));
314cl_u1_nand2_8x spare3_nand2_8x (.in0(1'b1),
315 .in1(1'b1),
316 .out(spare3_nand2_8x_unused));
317cl_u1_buf_16x spare3_buf_16x (.in(1'b1),
318 .out(spare3_buf_16x_unused));
319cl_u1_nor2_16x spare3_nor2_16x (.in0(1'b0),
320 .in1(1'b0),
321 .out(spare3_nor2_16x_unused));
322cl_u1_inv_32x spare3_inv_32x (.in(1'b1),
323 .out(spare3_inv_32x_unused));
324
325cl_sc1_msff_8x spare4_flop (.l1clk(l1clk),
326 .siclk(siclk),
327 .soclk(soclk),
328 .si(si_4),
329 .so(so_4),
330 .d(1'b0),
331 .q(spare4_flop_unused));
332assign si_4 = so_3;
333
334cl_u1_buf_32x spare4_buf_32x (.in(1'b1),
335 .out(spare4_buf_32x_unused));
336cl_u1_nand3_8x spare4_nand3_8x (.in0(1'b1),
337 .in1(1'b1),
338 .in2(1'b1),
339 .out(spare4_nand3_8x_unused));
340cl_u1_inv_8x spare4_inv_8x (.in(1'b1),
341 .out(spare4_inv_8x_unused));
342cl_u1_aoi22_4x spare4_aoi22_4x (.in00(1'b1),
343 .in01(1'b1),
344 .in10(1'b1),
345 .in11(1'b1),
346 .out(spare4_aoi22_4x_unused));
347cl_u1_buf_8x spare4_buf_8x (.in(1'b1),
348 .out(spare4_buf_8x_unused));
349cl_u1_oai22_4x spare4_oai22_4x (.in00(1'b1),
350 .in01(1'b1),
351 .in10(1'b1),
352 .in11(1'b1),
353 .out(spare4_oai22_4x_unused));
354cl_u1_inv_16x spare4_inv_16x (.in(1'b1),
355 .out(spare4_inv_16x_unused));
356cl_u1_nand2_16x spare4_nand2_16x (.in0(1'b1),
357 .in1(1'b1),
358 .out(spare4_nand2_16x_unused));
359cl_u1_nor3_4x spare4_nor3_4x (.in0(1'b0),
360 .in1(1'b0),
361 .in2(1'b0),
362 .out(spare4_nor3_4x_unused));
363cl_u1_nand2_8x spare4_nand2_8x (.in0(1'b1),
364 .in1(1'b1),
365 .out(spare4_nand2_8x_unused));
366cl_u1_buf_16x spare4_buf_16x (.in(1'b1),
367 .out(spare4_buf_16x_unused));
368cl_u1_nor2_16x spare4_nor2_16x (.in0(1'b0),
369 .in1(1'b0),
370 .out(spare4_nor2_16x_unused));
371cl_u1_inv_32x spare4_inv_32x (.in(1'b1),
372 .out(spare4_inv_32x_unused));
373assign scan_out = so_4;
374
375
376
377endmodule
378