Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / db1 / rtl / db1_spare_ctl_macro__num_6.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: db1_spare_ctl_macro__num_6.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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35module db1_spare_ctl_macro__num_6 (
36 l1clk,
37 scan_in,
38 siclk,
39 soclk,
40 scan_out);
41wire si_0;
42wire so_0;
43wire spare0_flop_unused;
44wire spare0_buf_32x_unused;
45wire spare0_nand3_8x_unused;
46wire spare0_inv_8x_unused;
47wire spare0_aoi22_4x_unused;
48wire spare0_buf_8x_unused;
49wire spare0_oai22_4x_unused;
50wire spare0_inv_16x_unused;
51wire spare0_nand2_16x_unused;
52wire spare0_nor3_4x_unused;
53wire spare0_nand2_8x_unused;
54wire spare0_buf_16x_unused;
55wire spare0_nor2_16x_unused;
56wire spare0_inv_32x_unused;
57wire si_1;
58wire so_1;
59wire spare1_flop_unused;
60wire spare1_buf_32x_unused;
61wire spare1_nand3_8x_unused;
62wire spare1_inv_8x_unused;
63wire spare1_aoi22_4x_unused;
64wire spare1_buf_8x_unused;
65wire spare1_oai22_4x_unused;
66wire spare1_inv_16x_unused;
67wire spare1_nand2_16x_unused;
68wire spare1_nor3_4x_unused;
69wire spare1_nand2_8x_unused;
70wire spare1_buf_16x_unused;
71wire spare1_nor2_16x_unused;
72wire spare1_inv_32x_unused;
73wire si_2;
74wire so_2;
75wire spare2_flop_unused;
76wire spare2_buf_32x_unused;
77wire spare2_nand3_8x_unused;
78wire spare2_inv_8x_unused;
79wire spare2_aoi22_4x_unused;
80wire spare2_buf_8x_unused;
81wire spare2_oai22_4x_unused;
82wire spare2_inv_16x_unused;
83wire spare2_nand2_16x_unused;
84wire spare2_nor3_4x_unused;
85wire spare2_nand2_8x_unused;
86wire spare2_buf_16x_unused;
87wire spare2_nor2_16x_unused;
88wire spare2_inv_32x_unused;
89wire si_3;
90wire so_3;
91wire spare3_flop_unused;
92wire spare3_buf_32x_unused;
93wire spare3_nand3_8x_unused;
94wire spare3_inv_8x_unused;
95wire spare3_aoi22_4x_unused;
96wire spare3_buf_8x_unused;
97wire spare3_oai22_4x_unused;
98wire spare3_inv_16x_unused;
99wire spare3_nand2_16x_unused;
100wire spare3_nor3_4x_unused;
101wire spare3_nand2_8x_unused;
102wire spare3_buf_16x_unused;
103wire spare3_nor2_16x_unused;
104wire spare3_inv_32x_unused;
105wire si_4;
106wire so_4;
107wire spare4_flop_unused;
108wire spare4_buf_32x_unused;
109wire spare4_nand3_8x_unused;
110wire spare4_inv_8x_unused;
111wire spare4_aoi22_4x_unused;
112wire spare4_buf_8x_unused;
113wire spare4_oai22_4x_unused;
114wire spare4_inv_16x_unused;
115wire spare4_nand2_16x_unused;
116wire spare4_nor3_4x_unused;
117wire spare4_nand2_8x_unused;
118wire spare4_buf_16x_unused;
119wire spare4_nor2_16x_unused;
120wire spare4_inv_32x_unused;
121wire si_5;
122wire so_5;
123wire spare5_flop_unused;
124wire spare5_buf_32x_unused;
125wire spare5_nand3_8x_unused;
126wire spare5_inv_8x_unused;
127wire spare5_aoi22_4x_unused;
128wire spare5_buf_8x_unused;
129wire spare5_oai22_4x_unused;
130wire spare5_inv_16x_unused;
131wire spare5_nand2_16x_unused;
132wire spare5_nor3_4x_unused;
133wire spare5_nand2_8x_unused;
134wire spare5_buf_16x_unused;
135wire spare5_nor2_16x_unused;
136wire spare5_inv_32x_unused;
137
138
139input l1clk;
140input scan_in;
141input siclk;
142input soclk;
143output scan_out;
144
145cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
146 .siclk(siclk),
147 .soclk(soclk),
148 .si(si_0),
149 .so(so_0),
150 .d(1'b0),
151 .q(spare0_flop_unused));
152assign si_0 = scan_in;
153
154cl_u1_buf_32x spare0_buf_32x (.in(1'b1),
155 .out(spare0_buf_32x_unused));
156cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
157 .in1(1'b1),
158 .in2(1'b1),
159 .out(spare0_nand3_8x_unused));
160cl_u1_inv_8x spare0_inv_8x (.in(1'b1),
161 .out(spare0_inv_8x_unused));
162cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
163 .in01(1'b1),
164 .in10(1'b1),
165 .in11(1'b1),
166 .out(spare0_aoi22_4x_unused));
167cl_u1_buf_8x spare0_buf_8x (.in(1'b1),
168 .out(spare0_buf_8x_unused));
169cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
170 .in01(1'b1),
171 .in10(1'b1),
172 .in11(1'b1),
173 .out(spare0_oai22_4x_unused));
174cl_u1_inv_16x spare0_inv_16x (.in(1'b1),
175 .out(spare0_inv_16x_unused));
176cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
177 .in1(1'b1),
178 .out(spare0_nand2_16x_unused));
179cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
180 .in1(1'b0),
181 .in2(1'b0),
182 .out(spare0_nor3_4x_unused));
183cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
184 .in1(1'b1),
185 .out(spare0_nand2_8x_unused));
186cl_u1_buf_16x spare0_buf_16x (.in(1'b1),
187 .out(spare0_buf_16x_unused));
188cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
189 .in1(1'b0),
190 .out(spare0_nor2_16x_unused));
191cl_u1_inv_32x spare0_inv_32x (.in(1'b1),
192 .out(spare0_inv_32x_unused));
193
194cl_sc1_msff_8x spare1_flop (.l1clk(l1clk),
195 .siclk(siclk),
196 .soclk(soclk),
197 .si(si_1),
198 .so(so_1),
199 .d(1'b0),
200 .q(spare1_flop_unused));
201assign si_1 = so_0;
202
203cl_u1_buf_32x spare1_buf_32x (.in(1'b1),
204 .out(spare1_buf_32x_unused));
205cl_u1_nand3_8x spare1_nand3_8x (.in0(1'b1),
206 .in1(1'b1),
207 .in2(1'b1),
208 .out(spare1_nand3_8x_unused));
209cl_u1_inv_8x spare1_inv_8x (.in(1'b1),
210 .out(spare1_inv_8x_unused));
211cl_u1_aoi22_4x spare1_aoi22_4x (.in00(1'b1),
212 .in01(1'b1),
213 .in10(1'b1),
214 .in11(1'b1),
215 .out(spare1_aoi22_4x_unused));
216cl_u1_buf_8x spare1_buf_8x (.in(1'b1),
217 .out(spare1_buf_8x_unused));
218cl_u1_oai22_4x spare1_oai22_4x (.in00(1'b1),
219 .in01(1'b1),
220 .in10(1'b1),
221 .in11(1'b1),
222 .out(spare1_oai22_4x_unused));
223cl_u1_inv_16x spare1_inv_16x (.in(1'b1),
224 .out(spare1_inv_16x_unused));
225cl_u1_nand2_16x spare1_nand2_16x (.in0(1'b1),
226 .in1(1'b1),
227 .out(spare1_nand2_16x_unused));
228cl_u1_nor3_4x spare1_nor3_4x (.in0(1'b0),
229 .in1(1'b0),
230 .in2(1'b0),
231 .out(spare1_nor3_4x_unused));
232cl_u1_nand2_8x spare1_nand2_8x (.in0(1'b1),
233 .in1(1'b1),
234 .out(spare1_nand2_8x_unused));
235cl_u1_buf_16x spare1_buf_16x (.in(1'b1),
236 .out(spare1_buf_16x_unused));
237cl_u1_nor2_16x spare1_nor2_16x (.in0(1'b0),
238 .in1(1'b0),
239 .out(spare1_nor2_16x_unused));
240cl_u1_inv_32x spare1_inv_32x (.in(1'b1),
241 .out(spare1_inv_32x_unused));
242
243cl_sc1_msff_8x spare2_flop (.l1clk(l1clk),
244 .siclk(siclk),
245 .soclk(soclk),
246 .si(si_2),
247 .so(so_2),
248 .d(1'b0),
249 .q(spare2_flop_unused));
250assign si_2 = so_1;
251
252cl_u1_buf_32x spare2_buf_32x (.in(1'b1),
253 .out(spare2_buf_32x_unused));
254cl_u1_nand3_8x spare2_nand3_8x (.in0(1'b1),
255 .in1(1'b1),
256 .in2(1'b1),
257 .out(spare2_nand3_8x_unused));
258cl_u1_inv_8x spare2_inv_8x (.in(1'b1),
259 .out(spare2_inv_8x_unused));
260cl_u1_aoi22_4x spare2_aoi22_4x (.in00(1'b1),
261 .in01(1'b1),
262 .in10(1'b1),
263 .in11(1'b1),
264 .out(spare2_aoi22_4x_unused));
265cl_u1_buf_8x spare2_buf_8x (.in(1'b1),
266 .out(spare2_buf_8x_unused));
267cl_u1_oai22_4x spare2_oai22_4x (.in00(1'b1),
268 .in01(1'b1),
269 .in10(1'b1),
270 .in11(1'b1),
271 .out(spare2_oai22_4x_unused));
272cl_u1_inv_16x spare2_inv_16x (.in(1'b1),
273 .out(spare2_inv_16x_unused));
274cl_u1_nand2_16x spare2_nand2_16x (.in0(1'b1),
275 .in1(1'b1),
276 .out(spare2_nand2_16x_unused));
277cl_u1_nor3_4x spare2_nor3_4x (.in0(1'b0),
278 .in1(1'b0),
279 .in2(1'b0),
280 .out(spare2_nor3_4x_unused));
281cl_u1_nand2_8x spare2_nand2_8x (.in0(1'b1),
282 .in1(1'b1),
283 .out(spare2_nand2_8x_unused));
284cl_u1_buf_16x spare2_buf_16x (.in(1'b1),
285 .out(spare2_buf_16x_unused));
286cl_u1_nor2_16x spare2_nor2_16x (.in0(1'b0),
287 .in1(1'b0),
288 .out(spare2_nor2_16x_unused));
289cl_u1_inv_32x spare2_inv_32x (.in(1'b1),
290 .out(spare2_inv_32x_unused));
291
292cl_sc1_msff_8x spare3_flop (.l1clk(l1clk),
293 .siclk(siclk),
294 .soclk(soclk),
295 .si(si_3),
296 .so(so_3),
297 .d(1'b0),
298 .q(spare3_flop_unused));
299assign si_3 = so_2;
300
301cl_u1_buf_32x spare3_buf_32x (.in(1'b1),
302 .out(spare3_buf_32x_unused));
303cl_u1_nand3_8x spare3_nand3_8x (.in0(1'b1),
304 .in1(1'b1),
305 .in2(1'b1),
306 .out(spare3_nand3_8x_unused));
307cl_u1_inv_8x spare3_inv_8x (.in(1'b1),
308 .out(spare3_inv_8x_unused));
309cl_u1_aoi22_4x spare3_aoi22_4x (.in00(1'b1),
310 .in01(1'b1),
311 .in10(1'b1),
312 .in11(1'b1),
313 .out(spare3_aoi22_4x_unused));
314cl_u1_buf_8x spare3_buf_8x (.in(1'b1),
315 .out(spare3_buf_8x_unused));
316cl_u1_oai22_4x spare3_oai22_4x (.in00(1'b1),
317 .in01(1'b1),
318 .in10(1'b1),
319 .in11(1'b1),
320 .out(spare3_oai22_4x_unused));
321cl_u1_inv_16x spare3_inv_16x (.in(1'b1),
322 .out(spare3_inv_16x_unused));
323cl_u1_nand2_16x spare3_nand2_16x (.in0(1'b1),
324 .in1(1'b1),
325 .out(spare3_nand2_16x_unused));
326cl_u1_nor3_4x spare3_nor3_4x (.in0(1'b0),
327 .in1(1'b0),
328 .in2(1'b0),
329 .out(spare3_nor3_4x_unused));
330cl_u1_nand2_8x spare3_nand2_8x (.in0(1'b1),
331 .in1(1'b1),
332 .out(spare3_nand2_8x_unused));
333cl_u1_buf_16x spare3_buf_16x (.in(1'b1),
334 .out(spare3_buf_16x_unused));
335cl_u1_nor2_16x spare3_nor2_16x (.in0(1'b0),
336 .in1(1'b0),
337 .out(spare3_nor2_16x_unused));
338cl_u1_inv_32x spare3_inv_32x (.in(1'b1),
339 .out(spare3_inv_32x_unused));
340
341cl_sc1_msff_8x spare4_flop (.l1clk(l1clk),
342 .siclk(siclk),
343 .soclk(soclk),
344 .si(si_4),
345 .so(so_4),
346 .d(1'b0),
347 .q(spare4_flop_unused));
348assign si_4 = so_3;
349
350cl_u1_buf_32x spare4_buf_32x (.in(1'b1),
351 .out(spare4_buf_32x_unused));
352cl_u1_nand3_8x spare4_nand3_8x (.in0(1'b1),
353 .in1(1'b1),
354 .in2(1'b1),
355 .out(spare4_nand3_8x_unused));
356cl_u1_inv_8x spare4_inv_8x (.in(1'b1),
357 .out(spare4_inv_8x_unused));
358cl_u1_aoi22_4x spare4_aoi22_4x (.in00(1'b1),
359 .in01(1'b1),
360 .in10(1'b1),
361 .in11(1'b1),
362 .out(spare4_aoi22_4x_unused));
363cl_u1_buf_8x spare4_buf_8x (.in(1'b1),
364 .out(spare4_buf_8x_unused));
365cl_u1_oai22_4x spare4_oai22_4x (.in00(1'b1),
366 .in01(1'b1),
367 .in10(1'b1),
368 .in11(1'b1),
369 .out(spare4_oai22_4x_unused));
370cl_u1_inv_16x spare4_inv_16x (.in(1'b1),
371 .out(spare4_inv_16x_unused));
372cl_u1_nand2_16x spare4_nand2_16x (.in0(1'b1),
373 .in1(1'b1),
374 .out(spare4_nand2_16x_unused));
375cl_u1_nor3_4x spare4_nor3_4x (.in0(1'b0),
376 .in1(1'b0),
377 .in2(1'b0),
378 .out(spare4_nor3_4x_unused));
379cl_u1_nand2_8x spare4_nand2_8x (.in0(1'b1),
380 .in1(1'b1),
381 .out(spare4_nand2_8x_unused));
382cl_u1_buf_16x spare4_buf_16x (.in(1'b1),
383 .out(spare4_buf_16x_unused));
384cl_u1_nor2_16x spare4_nor2_16x (.in0(1'b0),
385 .in1(1'b0),
386 .out(spare4_nor2_16x_unused));
387cl_u1_inv_32x spare4_inv_32x (.in(1'b1),
388 .out(spare4_inv_32x_unused));
389
390cl_sc1_msff_8x spare5_flop (.l1clk(l1clk),
391 .siclk(siclk),
392 .soclk(soclk),
393 .si(si_5),
394 .so(so_5),
395 .d(1'b0),
396 .q(spare5_flop_unused));
397assign si_5 = so_4;
398
399cl_u1_buf_32x spare5_buf_32x (.in(1'b1),
400 .out(spare5_buf_32x_unused));
401cl_u1_nand3_8x spare5_nand3_8x (.in0(1'b1),
402 .in1(1'b1),
403 .in2(1'b1),
404 .out(spare5_nand3_8x_unused));
405cl_u1_inv_8x spare5_inv_8x (.in(1'b1),
406 .out(spare5_inv_8x_unused));
407cl_u1_aoi22_4x spare5_aoi22_4x (.in00(1'b1),
408 .in01(1'b1),
409 .in10(1'b1),
410 .in11(1'b1),
411 .out(spare5_aoi22_4x_unused));
412cl_u1_buf_8x spare5_buf_8x (.in(1'b1),
413 .out(spare5_buf_8x_unused));
414cl_u1_oai22_4x spare5_oai22_4x (.in00(1'b1),
415 .in01(1'b1),
416 .in10(1'b1),
417 .in11(1'b1),
418 .out(spare5_oai22_4x_unused));
419cl_u1_inv_16x spare5_inv_16x (.in(1'b1),
420 .out(spare5_inv_16x_unused));
421cl_u1_nand2_16x spare5_nand2_16x (.in0(1'b1),
422 .in1(1'b1),
423 .out(spare5_nand2_16x_unused));
424cl_u1_nor3_4x spare5_nor3_4x (.in0(1'b0),
425 .in1(1'b0),
426 .in2(1'b0),
427 .out(spare5_nor3_4x_unused));
428cl_u1_nand2_8x spare5_nand2_8x (.in0(1'b1),
429 .in1(1'b1),
430 .out(spare5_nand2_8x_unused));
431cl_u1_buf_16x spare5_buf_16x (.in(1'b1),
432 .out(spare5_buf_16x_unused));
433cl_u1_nor2_16x spare5_nor2_16x (.in0(1'b0),
434 .in1(1'b0),
435 .out(spare5_nor2_16x_unused));
436cl_u1_inv_32x spare5_inv_32x (.in(1'b1),
437 .out(spare5_inv_32x_unused));
438assign scan_out = so_5;
439
440
441
442endmodule
443